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brcmfmac: use platform specific alignment in SDIO
[deliverable/linux.git] / drivers / net / wireless / brcm80211 / brcmfmac / dhd_sdio.c
1 /*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <linux/debugfs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/platform_data/brcmfmac-sdio.h>
35 #include <linux/moduleparam.h>
36 #include <asm/unaligned.h>
37 #include <defs.h>
38 #include <brcmu_wifi.h>
39 #include <brcmu_utils.h>
40 #include <brcm_hw_ids.h>
41 #include <soc.h>
42 #include "sdio_host.h"
43 #include "sdio_chip.h"
44
45 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
46
47 #ifdef DEBUG
48
49 #define BRCMF_TRAP_INFO_SIZE 80
50
51 #define CBUF_LEN (128)
52
53 /* Device console log buffer state */
54 #define CONSOLE_BUFFER_MAX 2024
55
56 struct rte_log_le {
57 __le32 buf; /* Can't be pointer on (64-bit) hosts */
58 __le32 buf_size;
59 __le32 idx;
60 char *_buf_compat; /* Redundant pointer for backward compat. */
61 };
62
63 struct rte_console {
64 /* Virtual UART
65 * When there is no UART (e.g. Quickturn),
66 * the host should write a complete
67 * input line directly into cbuf and then write
68 * the length into vcons_in.
69 * This may also be used when there is a real UART
70 * (at risk of conflicting with
71 * the real UART). vcons_out is currently unused.
72 */
73 uint vcons_in;
74 uint vcons_out;
75
76 /* Output (logging) buffer
77 * Console output is written to a ring buffer log_buf at index log_idx.
78 * The host may read the output when it sees log_idx advance.
79 * Output will be lost if the output wraps around faster than the host
80 * polls.
81 */
82 struct rte_log_le log_le;
83
84 /* Console input line buffer
85 * Characters are read one at a time into cbuf
86 * until <CR> is received, then
87 * the buffer is processed as a command line.
88 * Also used for virtual UART.
89 */
90 uint cbuf_idx;
91 char cbuf[CBUF_LEN];
92 };
93
94 #endif /* DEBUG */
95 #include <chipcommon.h>
96
97 #include "dhd_bus.h"
98 #include "dhd_dbg.h"
99 #include "tracepoint.h"
100
101 #define TXQLEN 2048 /* bulk tx queue length */
102 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
103 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
104 #define PRIOMASK 7
105
106 #define TXRETRIES 2 /* # of retries for tx frames */
107
108 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
109 one scheduling */
110
111 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
112 one scheduling */
113
114 #define BRCMF_DEFAULT_TXGLOM_SIZE 32 /* max tx frames in glom chain */
115
116 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
117
118 #define MEMBLOCK 2048 /* Block size used for downloading
119 of dongle image */
120 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
121 biggest possible glom */
122
123 #define BRCMF_FIRSTREAD (1 << 6)
124
125
126 /* SBSDIO_DEVICE_CTL */
127
128 /* 1: device will assert busy signal when receiving CMD53 */
129 #define SBSDIO_DEVCTL_SETBUSY 0x01
130 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
131 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
132 /* 1: mask all interrupts to host except the chipActive (rev 8) */
133 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
134 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
135 * sdio bus power cycle to clear (rev 9) */
136 #define SBSDIO_DEVCTL_PADS_ISO 0x08
137 /* Force SD->SB reset mapping (rev 11) */
138 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
139 /* Determined by CoreControl bit */
140 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
141 /* Force backplane reset */
142 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
143 /* Force no backplane reset */
144 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
145
146 /* direct(mapped) cis space */
147
148 /* MAPPED common CIS address */
149 #define SBSDIO_CIS_BASE_COMMON 0x1000
150 /* maximum bytes in one CIS */
151 #define SBSDIO_CIS_SIZE_LIMIT 0x200
152 /* cis offset addr is < 17 bits */
153 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
154
155 /* manfid tuple length, include tuple, link bytes */
156 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
157
158 /* intstatus */
159 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
160 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
161 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
162 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
163 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
164 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
165 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
166 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
167 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
168 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
169 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
170 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
171 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
172 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
173 #define I_PC (1 << 10) /* descriptor error */
174 #define I_PD (1 << 11) /* data error */
175 #define I_DE (1 << 12) /* Descriptor protocol Error */
176 #define I_RU (1 << 13) /* Receive descriptor Underflow */
177 #define I_RO (1 << 14) /* Receive fifo Overflow */
178 #define I_XU (1 << 15) /* Transmit fifo Underflow */
179 #define I_RI (1 << 16) /* Receive Interrupt */
180 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
181 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
182 #define I_XI (1 << 24) /* Transmit Interrupt */
183 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
184 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
185 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
186 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
187 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
188 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
189 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
190 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
191 #define I_DMA (I_RI | I_XI | I_ERRORS)
192
193 /* corecontrol */
194 #define CC_CISRDY (1 << 0) /* CIS Ready */
195 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
196 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
197 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
198 #define CC_XMTDATAAVAIL_MODE (1 << 4)
199 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
200
201 /* SDA_FRAMECTRL */
202 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
203 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
204 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
205 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
206
207 /*
208 * Software allocation of To SB Mailbox resources
209 */
210
211 /* tosbmailbox bits corresponding to intstatus bits */
212 #define SMB_NAK (1 << 0) /* Frame NAK */
213 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
214 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
215 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
216
217 /* tosbmailboxdata */
218 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
219
220 /*
221 * Software allocation of To Host Mailbox resources
222 */
223
224 /* intstatus bits */
225 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
226 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
227 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
228 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
229
230 /* tohostmailboxdata */
231 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
232 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
233 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
234 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
235
236 #define HMB_DATA_FCDATA_MASK 0xff000000
237 #define HMB_DATA_FCDATA_SHIFT 24
238
239 #define HMB_DATA_VERSION_MASK 0x00ff0000
240 #define HMB_DATA_VERSION_SHIFT 16
241
242 /*
243 * Software-defined protocol header
244 */
245
246 /* Current protocol version */
247 #define SDPCM_PROT_VERSION 4
248
249 /*
250 * Shared structure between dongle and the host.
251 * The structure contains pointers to trap or assert information.
252 */
253 #define SDPCM_SHARED_VERSION 0x0003
254 #define SDPCM_SHARED_VERSION_MASK 0x00FF
255 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
256 #define SDPCM_SHARED_ASSERT 0x0200
257 #define SDPCM_SHARED_TRAP 0x0400
258
259 /* Space for header read, limit for data packets */
260 #define MAX_HDR_READ (1 << 6)
261 #define MAX_RX_DATASZ 2048
262
263 /* Maximum milliseconds to wait for F2 to come up */
264 #define BRCMF_WAIT_F2RDY 3000
265
266 /* Bump up limit on waiting for HT to account for first startup;
267 * if the image is doing a CRC calculation before programming the PMU
268 * for HT availability, it could take a couple hundred ms more, so
269 * max out at a 1 second (1000000us).
270 */
271 #undef PMU_MAX_TRANSITION_DLY
272 #define PMU_MAX_TRANSITION_DLY 1000000
273
274 /* Value for ChipClockCSR during initial setup */
275 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
276 SBSDIO_ALP_AVAIL_REQ)
277
278 /* Flags for SDH calls */
279 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
280
281 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
282 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
283 * when idle
284 */
285 #define BRCMF_IDLE_INTERVAL 1
286
287 #define KSO_WAIT_US 50
288 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
289
290 /*
291 * Conversion of 802.1D priority to precedence level
292 */
293 static uint prio2prec(u32 prio)
294 {
295 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
296 (prio^2) : prio;
297 }
298
299 #ifdef DEBUG
300 /* Device console log buffer state */
301 struct brcmf_console {
302 uint count; /* Poll interval msec counter */
303 uint log_addr; /* Log struct address (fixed) */
304 struct rte_log_le log_le; /* Log struct (host copy) */
305 uint bufsize; /* Size of log buffer */
306 u8 *buf; /* Log buffer (host copy) */
307 uint last; /* Last buffer read index */
308 };
309
310 struct brcmf_trap_info {
311 __le32 type;
312 __le32 epc;
313 __le32 cpsr;
314 __le32 spsr;
315 __le32 r0; /* a1 */
316 __le32 r1; /* a2 */
317 __le32 r2; /* a3 */
318 __le32 r3; /* a4 */
319 __le32 r4; /* v1 */
320 __le32 r5; /* v2 */
321 __le32 r6; /* v3 */
322 __le32 r7; /* v4 */
323 __le32 r8; /* v5 */
324 __le32 r9; /* sb/v6 */
325 __le32 r10; /* sl/v7 */
326 __le32 r11; /* fp/v8 */
327 __le32 r12; /* ip */
328 __le32 r13; /* sp */
329 __le32 r14; /* lr */
330 __le32 pc; /* r15 */
331 };
332 #endif /* DEBUG */
333
334 struct sdpcm_shared {
335 u32 flags;
336 u32 trap_addr;
337 u32 assert_exp_addr;
338 u32 assert_file_addr;
339 u32 assert_line;
340 u32 console_addr; /* Address of struct rte_console */
341 u32 msgtrace_addr;
342 u8 tag[32];
343 u32 brpt_addr;
344 };
345
346 struct sdpcm_shared_le {
347 __le32 flags;
348 __le32 trap_addr;
349 __le32 assert_exp_addr;
350 __le32 assert_file_addr;
351 __le32 assert_line;
352 __le32 console_addr; /* Address of struct rte_console */
353 __le32 msgtrace_addr;
354 u8 tag[32];
355 __le32 brpt_addr;
356 };
357
358 /* dongle SDIO bus specific header info */
359 struct brcmf_sdio_hdrinfo {
360 u8 seq_num;
361 u8 channel;
362 u16 len;
363 u16 len_left;
364 u16 len_nxtfrm;
365 u8 dat_offset;
366 bool lastfrm;
367 u16 tail_pad;
368 };
369
370 /* misc chip info needed by some of the routines */
371 /* Private data for SDIO bus interaction */
372 struct brcmf_sdio {
373 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
374 struct chip_info *ci; /* Chip info struct */
375 char *vars; /* Variables (from CIS and/or other) */
376 uint varsz; /* Size of variables buffer */
377
378 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
379
380 u32 hostintmask; /* Copy of Host Interrupt Mask */
381 atomic_t intstatus; /* Intstatus bits (events) pending */
382 atomic_t fcstate; /* State of dongle flow-control */
383
384 uint blocksize; /* Block size of SDIO transfers */
385 uint roundup; /* Max roundup limit */
386
387 struct pktq txq; /* Queue length used for flow-control */
388 u8 flowcontrol; /* per prio flow control bitmask */
389 u8 tx_seq; /* Transmit sequence number (next) */
390 u8 tx_max; /* Maximum transmit sequence allowed */
391
392 u8 *hdrbuf; /* buffer for handling rx frame */
393 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
394 u8 rx_seq; /* Receive sequence number (expected) */
395 struct brcmf_sdio_hdrinfo cur_read;
396 /* info of current read frame */
397 bool rxskip; /* Skip receive (awaiting NAK ACK) */
398 bool rxpending; /* Data frame pending in dongle */
399
400 uint rxbound; /* Rx frames to read before resched */
401 uint txbound; /* Tx frames to send before resched */
402 uint txminmax;
403
404 struct sk_buff *glomd; /* Packet containing glomming descriptor */
405 struct sk_buff_head glom; /* Packet list for glommed superframe */
406 uint glomerr; /* Glom packet read errors */
407
408 u8 *rxbuf; /* Buffer for receiving control packets */
409 uint rxblen; /* Allocated length of rxbuf */
410 u8 *rxctl; /* Aligned pointer into rxbuf */
411 u8 *rxctl_orig; /* pointer for freeing rxctl */
412 uint rxlen; /* Length of valid data in buffer */
413 spinlock_t rxctl_lock; /* protection lock for ctrl frame resources */
414
415 u8 sdpcm_ver; /* Bus protocol reported by dongle */
416
417 bool intr; /* Use interrupts */
418 bool poll; /* Use polling */
419 atomic_t ipend; /* Device interrupt is pending */
420 uint spurious; /* Count of spurious interrupts */
421 uint pollrate; /* Ticks between device polls */
422 uint polltick; /* Tick counter */
423
424 #ifdef DEBUG
425 uint console_interval;
426 struct brcmf_console console; /* Console output polling support */
427 uint console_addr; /* Console address from shared struct */
428 #endif /* DEBUG */
429
430 uint clkstate; /* State of sd and backplane clock(s) */
431 bool activity; /* Activity flag for clock down */
432 s32 idletime; /* Control for activity timeout */
433 s32 idlecount; /* Activity timeout counter */
434 s32 idleclock; /* How to set bus driver when idle */
435 bool rxflow_mode; /* Rx flow control mode */
436 bool rxflow; /* Is rx flow control on */
437 bool alp_only; /* Don't use HT clock (ALP only) */
438
439 u8 *ctrl_frame_buf;
440 u32 ctrl_frame_len;
441 bool ctrl_frame_stat;
442
443 spinlock_t txqlock;
444 wait_queue_head_t ctrl_wait;
445 wait_queue_head_t dcmd_resp_wait;
446
447 struct timer_list timer;
448 struct completion watchdog_wait;
449 struct task_struct *watchdog_tsk;
450 bool wd_timer_valid;
451 uint save_ms;
452
453 struct workqueue_struct *brcmf_wq;
454 struct work_struct datawork;
455 atomic_t dpc_tskcnt;
456
457 bool txoff; /* Transmit flow-controlled */
458 struct brcmf_sdio_count sdcnt;
459 bool sr_enabled; /* SaveRestore enabled */
460 bool sleeping; /* SDIO bus sleeping */
461
462 u8 tx_hdrlen; /* sdio bus header length for tx packet */
463 bool txglom; /* host tx glomming enable flag */
464 struct sk_buff *txglom_sgpad; /* scatter-gather padding buffer */
465 u16 head_align; /* buffer pointer alignment */
466 u16 sgentry_align; /* scatter-gather buffer alignment */
467 };
468
469 /* clkstate */
470 #define CLK_NONE 0
471 #define CLK_SDONLY 1
472 #define CLK_PENDING 2
473 #define CLK_AVAIL 3
474
475 #ifdef DEBUG
476 static int qcount[NUMPRIO];
477 #endif /* DEBUG */
478
479 #define DEFAULT_SDIO_DRIVE_STRENGTH 6 /* in milliamps */
480
481 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
482
483 /* Retry count for register access failures */
484 static const uint retry_limit = 2;
485
486 /* Limit on rounding up frames */
487 static const uint max_roundup = 512;
488
489 #define ALIGNMENT 4
490
491 static int brcmf_sdio_txglomsz = BRCMF_DEFAULT_TXGLOM_SIZE;
492 module_param_named(txglomsz, brcmf_sdio_txglomsz, int, 0);
493 MODULE_PARM_DESC(txglomsz, "maximum tx packet chain size [SDIO]");
494
495 enum brcmf_sdio_frmtype {
496 BRCMF_SDIO_FT_NORMAL,
497 BRCMF_SDIO_FT_SUPER,
498 BRCMF_SDIO_FT_SUB,
499 };
500
501 #define BCM43143_FIRMWARE_NAME "brcm/brcmfmac43143-sdio.bin"
502 #define BCM43143_NVRAM_NAME "brcm/brcmfmac43143-sdio.txt"
503 #define BCM43241B0_FIRMWARE_NAME "brcm/brcmfmac43241b0-sdio.bin"
504 #define BCM43241B0_NVRAM_NAME "brcm/brcmfmac43241b0-sdio.txt"
505 #define BCM43241B4_FIRMWARE_NAME "brcm/brcmfmac43241b4-sdio.bin"
506 #define BCM43241B4_NVRAM_NAME "brcm/brcmfmac43241b4-sdio.txt"
507 #define BCM4329_FIRMWARE_NAME "brcm/brcmfmac4329-sdio.bin"
508 #define BCM4329_NVRAM_NAME "brcm/brcmfmac4329-sdio.txt"
509 #define BCM4330_FIRMWARE_NAME "brcm/brcmfmac4330-sdio.bin"
510 #define BCM4330_NVRAM_NAME "brcm/brcmfmac4330-sdio.txt"
511 #define BCM4334_FIRMWARE_NAME "brcm/brcmfmac4334-sdio.bin"
512 #define BCM4334_NVRAM_NAME "brcm/brcmfmac4334-sdio.txt"
513 #define BCM4335_FIRMWARE_NAME "brcm/brcmfmac4335-sdio.bin"
514 #define BCM4335_NVRAM_NAME "brcm/brcmfmac4335-sdio.txt"
515 #define BCM4339_FIRMWARE_NAME "brcm/brcmfmac4339-sdio.bin"
516 #define BCM4339_NVRAM_NAME "brcm/brcmfmac4339-sdio.txt"
517
518 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
519 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
520 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
521 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
522 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
523 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
524 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
525 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
526 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
527 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
528 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
529 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
530 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
531 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
532 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
533 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
534
535 struct brcmf_firmware_names {
536 u32 chipid;
537 u32 revmsk;
538 const char *bin;
539 const char *nv;
540 };
541
542 enum brcmf_firmware_type {
543 BRCMF_FIRMWARE_BIN,
544 BRCMF_FIRMWARE_NVRAM
545 };
546
547 #define BRCMF_FIRMWARE_NVRAM(name) \
548 name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
549
550 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
551 { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
552 { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
553 { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
554 { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
555 { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
556 { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
557 { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
558 { BCM4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) }
559 };
560
561
562 static const struct firmware *brcmf_sdbrcm_get_fw(struct brcmf_sdio *bus,
563 enum brcmf_firmware_type type)
564 {
565 const struct firmware *fw;
566 const char *name;
567 int err, i;
568
569 for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
570 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
571 brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
572 switch (type) {
573 case BRCMF_FIRMWARE_BIN:
574 name = brcmf_fwname_data[i].bin;
575 break;
576 case BRCMF_FIRMWARE_NVRAM:
577 name = brcmf_fwname_data[i].nv;
578 break;
579 default:
580 brcmf_err("invalid firmware type (%d)\n", type);
581 return NULL;
582 }
583 goto found;
584 }
585 }
586 brcmf_err("Unknown chipid %d [%d]\n",
587 bus->ci->chip, bus->ci->chiprev);
588 return NULL;
589
590 found:
591 err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
592 if ((err) || (!fw)) {
593 brcmf_err("fail to request firmware %s (%d)\n", name, err);
594 return NULL;
595 }
596
597 return fw;
598 }
599
600 static void pkt_align(struct sk_buff *p, int len, int align)
601 {
602 uint datalign;
603 datalign = (unsigned long)(p->data);
604 datalign = roundup(datalign, (align)) - datalign;
605 if (datalign)
606 skb_pull(p, datalign);
607 __skb_trim(p, len);
608 }
609
610 /* To check if there's window offered */
611 static bool data_ok(struct brcmf_sdio *bus)
612 {
613 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
614 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
615 }
616
617 /*
618 * Reads a register in the SDIO hardware block. This block occupies a series of
619 * adresses on the 32 bit backplane bus.
620 */
621 static int
622 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
623 {
624 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
625 int ret;
626
627 *regvar = brcmf_sdio_regrl(bus->sdiodev,
628 bus->ci->c_inf[idx].base + offset, &ret);
629
630 return ret;
631 }
632
633 static int
634 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
635 {
636 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
637 int ret;
638
639 brcmf_sdio_regwl(bus->sdiodev,
640 bus->ci->c_inf[idx].base + reg_offset,
641 regval, &ret);
642
643 return ret;
644 }
645
646 static int
647 brcmf_sdbrcm_kso_control(struct brcmf_sdio *bus, bool on)
648 {
649 u8 wr_val = 0, rd_val, cmp_val, bmask;
650 int err = 0;
651 int try_cnt = 0;
652
653 brcmf_dbg(TRACE, "Enter\n");
654
655 wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
656 /* 1st KSO write goes to AOS wake up core if device is asleep */
657 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
658 wr_val, &err);
659 if (err) {
660 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
661 return err;
662 }
663
664 if (on) {
665 /* device WAKEUP through KSO:
666 * write bit 0 & read back until
667 * both bits 0 (kso bit) & 1 (dev on status) are set
668 */
669 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
670 SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
671 bmask = cmp_val;
672 usleep_range(2000, 3000);
673 } else {
674 /* Put device to sleep, turn off KSO */
675 cmp_val = 0;
676 /* only check for bit0, bit1(dev on status) may not
677 * get cleared right away
678 */
679 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
680 }
681
682 do {
683 /* reliable KSO bit set/clr:
684 * the sdiod sleep write access is synced to PMU 32khz clk
685 * just one write attempt may fail,
686 * read it back until it matches written value
687 */
688 rd_val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
689 &err);
690 if (((rd_val & bmask) == cmp_val) && !err)
691 break;
692 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
693 try_cnt, MAX_KSO_ATTEMPTS, err);
694 udelay(KSO_WAIT_US);
695 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
696 wr_val, &err);
697 } while (try_cnt++ < MAX_KSO_ATTEMPTS);
698
699 return err;
700 }
701
702 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
703
704 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
705
706 /* Turn backplane clock on or off */
707 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
708 {
709 int err;
710 u8 clkctl, clkreq, devctl;
711 unsigned long timeout;
712
713 brcmf_dbg(SDIO, "Enter\n");
714
715 clkctl = 0;
716
717 if (bus->sr_enabled) {
718 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
719 return 0;
720 }
721
722 if (on) {
723 /* Request HT Avail */
724 clkreq =
725 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
726
727 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
728 clkreq, &err);
729 if (err) {
730 brcmf_err("HT Avail request error: %d\n", err);
731 return -EBADE;
732 }
733
734 /* Check current status */
735 clkctl = brcmf_sdio_regrb(bus->sdiodev,
736 SBSDIO_FUNC1_CHIPCLKCSR, &err);
737 if (err) {
738 brcmf_err("HT Avail read error: %d\n", err);
739 return -EBADE;
740 }
741
742 /* Go to pending and await interrupt if appropriate */
743 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
744 /* Allow only clock-available interrupt */
745 devctl = brcmf_sdio_regrb(bus->sdiodev,
746 SBSDIO_DEVICE_CTL, &err);
747 if (err) {
748 brcmf_err("Devctl error setting CA: %d\n",
749 err);
750 return -EBADE;
751 }
752
753 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
754 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
755 devctl, &err);
756 brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
757 bus->clkstate = CLK_PENDING;
758
759 return 0;
760 } else if (bus->clkstate == CLK_PENDING) {
761 /* Cancel CA-only interrupt filter */
762 devctl = brcmf_sdio_regrb(bus->sdiodev,
763 SBSDIO_DEVICE_CTL, &err);
764 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
765 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
766 devctl, &err);
767 }
768
769 /* Otherwise, wait here (polling) for HT Avail */
770 timeout = jiffies +
771 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
772 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
773 clkctl = brcmf_sdio_regrb(bus->sdiodev,
774 SBSDIO_FUNC1_CHIPCLKCSR,
775 &err);
776 if (time_after(jiffies, timeout))
777 break;
778 else
779 usleep_range(5000, 10000);
780 }
781 if (err) {
782 brcmf_err("HT Avail request error: %d\n", err);
783 return -EBADE;
784 }
785 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
786 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
787 PMU_MAX_TRANSITION_DLY, clkctl);
788 return -EBADE;
789 }
790
791 /* Mark clock available */
792 bus->clkstate = CLK_AVAIL;
793 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
794
795 #if defined(DEBUG)
796 if (!bus->alp_only) {
797 if (SBSDIO_ALPONLY(clkctl))
798 brcmf_err("HT Clock should be on\n");
799 }
800 #endif /* defined (DEBUG) */
801
802 bus->activity = true;
803 } else {
804 clkreq = 0;
805
806 if (bus->clkstate == CLK_PENDING) {
807 /* Cancel CA-only interrupt filter */
808 devctl = brcmf_sdio_regrb(bus->sdiodev,
809 SBSDIO_DEVICE_CTL, &err);
810 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
811 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
812 devctl, &err);
813 }
814
815 bus->clkstate = CLK_SDONLY;
816 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
817 clkreq, &err);
818 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
819 if (err) {
820 brcmf_err("Failed access turning clock off: %d\n",
821 err);
822 return -EBADE;
823 }
824 }
825 return 0;
826 }
827
828 /* Change idle/active SD state */
829 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
830 {
831 brcmf_dbg(SDIO, "Enter\n");
832
833 if (on)
834 bus->clkstate = CLK_SDONLY;
835 else
836 bus->clkstate = CLK_NONE;
837
838 return 0;
839 }
840
841 /* Transition SD and backplane clock readiness */
842 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
843 {
844 #ifdef DEBUG
845 uint oldstate = bus->clkstate;
846 #endif /* DEBUG */
847
848 brcmf_dbg(SDIO, "Enter\n");
849
850 /* Early exit if we're already there */
851 if (bus->clkstate == target) {
852 if (target == CLK_AVAIL) {
853 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
854 bus->activity = true;
855 }
856 return 0;
857 }
858
859 switch (target) {
860 case CLK_AVAIL:
861 /* Make sure SD clock is available */
862 if (bus->clkstate == CLK_NONE)
863 brcmf_sdbrcm_sdclk(bus, true);
864 /* Now request HT Avail on the backplane */
865 brcmf_sdbrcm_htclk(bus, true, pendok);
866 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
867 bus->activity = true;
868 break;
869
870 case CLK_SDONLY:
871 /* Remove HT request, or bring up SD clock */
872 if (bus->clkstate == CLK_NONE)
873 brcmf_sdbrcm_sdclk(bus, true);
874 else if (bus->clkstate == CLK_AVAIL)
875 brcmf_sdbrcm_htclk(bus, false, false);
876 else
877 brcmf_err("request for %d -> %d\n",
878 bus->clkstate, target);
879 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
880 break;
881
882 case CLK_NONE:
883 /* Make sure to remove HT request */
884 if (bus->clkstate == CLK_AVAIL)
885 brcmf_sdbrcm_htclk(bus, false, false);
886 /* Now remove the SD clock */
887 brcmf_sdbrcm_sdclk(bus, false);
888 brcmf_sdbrcm_wd_timer(bus, 0);
889 break;
890 }
891 #ifdef DEBUG
892 brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
893 #endif /* DEBUG */
894
895 return 0;
896 }
897
898 static int
899 brcmf_sdbrcm_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
900 {
901 int err = 0;
902 brcmf_dbg(TRACE, "Enter\n");
903 brcmf_dbg(SDIO, "request %s currently %s\n",
904 (sleep ? "SLEEP" : "WAKE"),
905 (bus->sleeping ? "SLEEP" : "WAKE"));
906
907 /* If SR is enabled control bus state with KSO */
908 if (bus->sr_enabled) {
909 /* Done if we're already in the requested state */
910 if (sleep == bus->sleeping)
911 goto end;
912
913 /* Going to sleep */
914 if (sleep) {
915 /* Don't sleep if something is pending */
916 if (atomic_read(&bus->intstatus) ||
917 atomic_read(&bus->ipend) > 0 ||
918 (!atomic_read(&bus->fcstate) &&
919 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
920 data_ok(bus)))
921 return -EBUSY;
922 err = brcmf_sdbrcm_kso_control(bus, false);
923 /* disable watchdog */
924 if (!err)
925 brcmf_sdbrcm_wd_timer(bus, 0);
926 } else {
927 bus->idlecount = 0;
928 err = brcmf_sdbrcm_kso_control(bus, true);
929 }
930 if (!err) {
931 /* Change state */
932 bus->sleeping = sleep;
933 brcmf_dbg(SDIO, "new state %s\n",
934 (sleep ? "SLEEP" : "WAKE"));
935 } else {
936 brcmf_err("error while changing bus sleep state %d\n",
937 err);
938 return err;
939 }
940 }
941
942 end:
943 /* control clocks */
944 if (sleep) {
945 if (!bus->sr_enabled)
946 brcmf_sdbrcm_clkctl(bus, CLK_NONE, pendok);
947 } else {
948 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, pendok);
949 }
950
951 return err;
952
953 }
954
955 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
956 {
957 u32 intstatus = 0;
958 u32 hmb_data;
959 u8 fcbits;
960 int ret;
961
962 brcmf_dbg(SDIO, "Enter\n");
963
964 /* Read mailbox data and ack that we did so */
965 ret = r_sdreg32(bus, &hmb_data,
966 offsetof(struct sdpcmd_regs, tohostmailboxdata));
967
968 if (ret == 0)
969 w_sdreg32(bus, SMB_INT_ACK,
970 offsetof(struct sdpcmd_regs, tosbmailbox));
971 bus->sdcnt.f1regdata += 2;
972
973 /* Dongle recomposed rx frames, accept them again */
974 if (hmb_data & HMB_DATA_NAKHANDLED) {
975 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
976 bus->rx_seq);
977 if (!bus->rxskip)
978 brcmf_err("unexpected NAKHANDLED!\n");
979
980 bus->rxskip = false;
981 intstatus |= I_HMB_FRAME_IND;
982 }
983
984 /*
985 * DEVREADY does not occur with gSPI.
986 */
987 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
988 bus->sdpcm_ver =
989 (hmb_data & HMB_DATA_VERSION_MASK) >>
990 HMB_DATA_VERSION_SHIFT;
991 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
992 brcmf_err("Version mismatch, dongle reports %d, "
993 "expecting %d\n",
994 bus->sdpcm_ver, SDPCM_PROT_VERSION);
995 else
996 brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
997 bus->sdpcm_ver);
998 }
999
1000 /*
1001 * Flow Control has been moved into the RX headers and this out of band
1002 * method isn't used any more.
1003 * remaining backward compatible with older dongles.
1004 */
1005 if (hmb_data & HMB_DATA_FC) {
1006 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1007 HMB_DATA_FCDATA_SHIFT;
1008
1009 if (fcbits & ~bus->flowcontrol)
1010 bus->sdcnt.fc_xoff++;
1011
1012 if (bus->flowcontrol & ~fcbits)
1013 bus->sdcnt.fc_xon++;
1014
1015 bus->sdcnt.fc_rcvd++;
1016 bus->flowcontrol = fcbits;
1017 }
1018
1019 /* Shouldn't be any others */
1020 if (hmb_data & ~(HMB_DATA_DEVREADY |
1021 HMB_DATA_NAKHANDLED |
1022 HMB_DATA_FC |
1023 HMB_DATA_FWREADY |
1024 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1025 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1026 hmb_data);
1027
1028 return intstatus;
1029 }
1030
1031 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1032 {
1033 uint retries = 0;
1034 u16 lastrbc;
1035 u8 hi, lo;
1036 int err;
1037
1038 brcmf_err("%sterminate frame%s\n",
1039 abort ? "abort command, " : "",
1040 rtx ? ", send NAK" : "");
1041
1042 if (abort)
1043 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1044
1045 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1046 SFC_RF_TERM, &err);
1047 bus->sdcnt.f1regdata++;
1048
1049 /* Wait until the packet has been flushed (device/FIFO stable) */
1050 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1051 hi = brcmf_sdio_regrb(bus->sdiodev,
1052 SBSDIO_FUNC1_RFRAMEBCHI, &err);
1053 lo = brcmf_sdio_regrb(bus->sdiodev,
1054 SBSDIO_FUNC1_RFRAMEBCLO, &err);
1055 bus->sdcnt.f1regdata += 2;
1056
1057 if ((hi == 0) && (lo == 0))
1058 break;
1059
1060 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1061 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1062 lastrbc, (hi << 8) + lo);
1063 }
1064 lastrbc = (hi << 8) + lo;
1065 }
1066
1067 if (!retries)
1068 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1069 else
1070 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1071
1072 if (rtx) {
1073 bus->sdcnt.rxrtx++;
1074 err = w_sdreg32(bus, SMB_NAK,
1075 offsetof(struct sdpcmd_regs, tosbmailbox));
1076
1077 bus->sdcnt.f1regdata++;
1078 if (err == 0)
1079 bus->rxskip = true;
1080 }
1081
1082 /* Clear partial in any case */
1083 bus->cur_read.len = 0;
1084
1085 /* If we can't reach the device, signal failure */
1086 if (err)
1087 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1088 }
1089
1090 /* return total length of buffer chain */
1091 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1092 {
1093 struct sk_buff *p;
1094 uint total;
1095
1096 total = 0;
1097 skb_queue_walk(&bus->glom, p)
1098 total += p->len;
1099 return total;
1100 }
1101
1102 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1103 {
1104 struct sk_buff *cur, *next;
1105
1106 skb_queue_walk_safe(&bus->glom, cur, next) {
1107 skb_unlink(cur, &bus->glom);
1108 brcmu_pkt_buf_free_skb(cur);
1109 }
1110 }
1111
1112 /**
1113 * brcmfmac sdio bus specific header
1114 * This is the lowest layer header wrapped on the packets transmitted between
1115 * host and WiFi dongle which contains information needed for SDIO core and
1116 * firmware
1117 *
1118 * It consists of 3 parts: hardware header, hardware extension header and
1119 * software header
1120 * hardware header (frame tag) - 4 bytes
1121 * Byte 0~1: Frame length
1122 * Byte 2~3: Checksum, bit-wise inverse of frame length
1123 * hardware extension header - 8 bytes
1124 * Tx glom mode only, N/A for Rx or normal Tx
1125 * Byte 0~1: Packet length excluding hw frame tag
1126 * Byte 2: Reserved
1127 * Byte 3: Frame flags, bit 0: last frame indication
1128 * Byte 4~5: Reserved
1129 * Byte 6~7: Tail padding length
1130 * software header - 8 bytes
1131 * Byte 0: Rx/Tx sequence number
1132 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1133 * Byte 2: Length of next data frame, reserved for Tx
1134 * Byte 3: Data offset
1135 * Byte 4: Flow control bits, reserved for Tx
1136 * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1137 * Byte 6~7: Reserved
1138 */
1139 #define SDPCM_HWHDR_LEN 4
1140 #define SDPCM_HWEXT_LEN 8
1141 #define SDPCM_SWHDR_LEN 8
1142 #define SDPCM_HDRLEN (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1143 /* software header */
1144 #define SDPCM_SEQ_MASK 0x000000ff
1145 #define SDPCM_SEQ_WRAP 256
1146 #define SDPCM_CHANNEL_MASK 0x00000f00
1147 #define SDPCM_CHANNEL_SHIFT 8
1148 #define SDPCM_CONTROL_CHANNEL 0 /* Control */
1149 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication */
1150 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv */
1151 #define SDPCM_GLOM_CHANNEL 3 /* Coalesced packets */
1152 #define SDPCM_TEST_CHANNEL 15 /* Test/debug packets */
1153 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
1154 #define SDPCM_NEXTLEN_MASK 0x00ff0000
1155 #define SDPCM_NEXTLEN_SHIFT 16
1156 #define SDPCM_DOFFSET_MASK 0xff000000
1157 #define SDPCM_DOFFSET_SHIFT 24
1158 #define SDPCM_FCMASK_MASK 0x000000ff
1159 #define SDPCM_WINDOW_MASK 0x0000ff00
1160 #define SDPCM_WINDOW_SHIFT 8
1161
1162 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1163 {
1164 u32 hdrvalue;
1165 hdrvalue = *(u32 *)swheader;
1166 return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1167 }
1168
1169 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1170 struct brcmf_sdio_hdrinfo *rd,
1171 enum brcmf_sdio_frmtype type)
1172 {
1173 u16 len, checksum;
1174 u8 rx_seq, fc, tx_seq_max;
1175 u32 swheader;
1176
1177 trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1178
1179 /* hw header */
1180 len = get_unaligned_le16(header);
1181 checksum = get_unaligned_le16(header + sizeof(u16));
1182 /* All zero means no more to read */
1183 if (!(len | checksum)) {
1184 bus->rxpending = false;
1185 return -ENODATA;
1186 }
1187 if ((u16)(~(len ^ checksum))) {
1188 brcmf_err("HW header checksum error\n");
1189 bus->sdcnt.rx_badhdr++;
1190 brcmf_sdbrcm_rxfail(bus, false, false);
1191 return -EIO;
1192 }
1193 if (len < SDPCM_HDRLEN) {
1194 brcmf_err("HW header length error\n");
1195 return -EPROTO;
1196 }
1197 if (type == BRCMF_SDIO_FT_SUPER &&
1198 (roundup(len, bus->blocksize) != rd->len)) {
1199 brcmf_err("HW superframe header length error\n");
1200 return -EPROTO;
1201 }
1202 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1203 brcmf_err("HW subframe header length error\n");
1204 return -EPROTO;
1205 }
1206 rd->len = len;
1207
1208 /* software header */
1209 header += SDPCM_HWHDR_LEN;
1210 swheader = le32_to_cpu(*(__le32 *)header);
1211 if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1212 brcmf_err("Glom descriptor found in superframe head\n");
1213 rd->len = 0;
1214 return -EINVAL;
1215 }
1216 rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1217 rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1218 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1219 type != BRCMF_SDIO_FT_SUPER) {
1220 brcmf_err("HW header length too long\n");
1221 bus->sdcnt.rx_toolong++;
1222 brcmf_sdbrcm_rxfail(bus, false, false);
1223 rd->len = 0;
1224 return -EPROTO;
1225 }
1226 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1227 brcmf_err("Wrong channel for superframe\n");
1228 rd->len = 0;
1229 return -EINVAL;
1230 }
1231 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1232 rd->channel != SDPCM_EVENT_CHANNEL) {
1233 brcmf_err("Wrong channel for subframe\n");
1234 rd->len = 0;
1235 return -EINVAL;
1236 }
1237 rd->dat_offset = brcmf_sdio_getdatoffset(header);
1238 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1239 brcmf_err("seq %d: bad data offset\n", rx_seq);
1240 bus->sdcnt.rx_badhdr++;
1241 brcmf_sdbrcm_rxfail(bus, false, false);
1242 rd->len = 0;
1243 return -ENXIO;
1244 }
1245 if (rd->seq_num != rx_seq) {
1246 brcmf_err("seq %d: sequence number error, expect %d\n",
1247 rx_seq, rd->seq_num);
1248 bus->sdcnt.rx_badseq++;
1249 rd->seq_num = rx_seq;
1250 }
1251 /* no need to check the reset for subframe */
1252 if (type == BRCMF_SDIO_FT_SUB)
1253 return 0;
1254 rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1255 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1256 /* only warm for NON glom packet */
1257 if (rd->channel != SDPCM_GLOM_CHANNEL)
1258 brcmf_err("seq %d: next length error\n", rx_seq);
1259 rd->len_nxtfrm = 0;
1260 }
1261 swheader = le32_to_cpu(*(__le32 *)(header + 4));
1262 fc = swheader & SDPCM_FCMASK_MASK;
1263 if (bus->flowcontrol != fc) {
1264 if (~bus->flowcontrol & fc)
1265 bus->sdcnt.fc_xoff++;
1266 if (bus->flowcontrol & ~fc)
1267 bus->sdcnt.fc_xon++;
1268 bus->sdcnt.fc_rcvd++;
1269 bus->flowcontrol = fc;
1270 }
1271 tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1272 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1273 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1274 tx_seq_max = bus->tx_seq + 2;
1275 }
1276 bus->tx_max = tx_seq_max;
1277
1278 return 0;
1279 }
1280
1281 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1282 {
1283 *(__le16 *)header = cpu_to_le16(frm_length);
1284 *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1285 }
1286
1287 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1288 struct brcmf_sdio_hdrinfo *hd_info)
1289 {
1290 u32 hdrval;
1291 u8 hdr_offset;
1292
1293 brcmf_sdio_update_hwhdr(header, hd_info->len);
1294 hdr_offset = SDPCM_HWHDR_LEN;
1295
1296 if (bus->txglom) {
1297 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1298 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1299 hdrval = (u16)hd_info->tail_pad << 16;
1300 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1301 hdr_offset += SDPCM_HWEXT_LEN;
1302 }
1303
1304 hdrval = hd_info->seq_num;
1305 hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1306 SDPCM_CHANNEL_MASK;
1307 hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1308 SDPCM_DOFFSET_MASK;
1309 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1310 *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1311 trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1312 }
1313
1314 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1315 {
1316 u16 dlen, totlen;
1317 u8 *dptr, num = 0;
1318 u16 sublen;
1319 struct sk_buff *pfirst, *pnext;
1320
1321 int errcode;
1322 u8 doff, sfdoff;
1323
1324 struct brcmf_sdio_hdrinfo rd_new;
1325
1326 /* If packets, issue read(s) and send up packet chain */
1327 /* Return sequence numbers consumed? */
1328
1329 brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1330 bus->glomd, skb_peek(&bus->glom));
1331
1332 /* If there's a descriptor, generate the packet chain */
1333 if (bus->glomd) {
1334 pfirst = pnext = NULL;
1335 dlen = (u16) (bus->glomd->len);
1336 dptr = bus->glomd->data;
1337 if (!dlen || (dlen & 1)) {
1338 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1339 dlen);
1340 dlen = 0;
1341 }
1342
1343 for (totlen = num = 0; dlen; num++) {
1344 /* Get (and move past) next length */
1345 sublen = get_unaligned_le16(dptr);
1346 dlen -= sizeof(u16);
1347 dptr += sizeof(u16);
1348 if ((sublen < SDPCM_HDRLEN) ||
1349 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1350 brcmf_err("descriptor len %d bad: %d\n",
1351 num, sublen);
1352 pnext = NULL;
1353 break;
1354 }
1355 if (sublen % bus->sgentry_align) {
1356 brcmf_err("sublen %d not multiple of %d\n",
1357 sublen, bus->sgentry_align);
1358 }
1359 totlen += sublen;
1360
1361 /* For last frame, adjust read len so total
1362 is a block multiple */
1363 if (!dlen) {
1364 sublen +=
1365 (roundup(totlen, bus->blocksize) - totlen);
1366 totlen = roundup(totlen, bus->blocksize);
1367 }
1368
1369 /* Allocate/chain packet for next subframe */
1370 pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1371 if (pnext == NULL) {
1372 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1373 num, sublen);
1374 break;
1375 }
1376 skb_queue_tail(&bus->glom, pnext);
1377
1378 /* Adhere to start alignment requirements */
1379 pkt_align(pnext, sublen, bus->sgentry_align);
1380 }
1381
1382 /* If all allocations succeeded, save packet chain
1383 in bus structure */
1384 if (pnext) {
1385 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1386 totlen, num);
1387 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1388 totlen != bus->cur_read.len) {
1389 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1390 bus->cur_read.len, totlen, rxseq);
1391 }
1392 pfirst = pnext = NULL;
1393 } else {
1394 brcmf_sdbrcm_free_glom(bus);
1395 num = 0;
1396 }
1397
1398 /* Done with descriptor packet */
1399 brcmu_pkt_buf_free_skb(bus->glomd);
1400 bus->glomd = NULL;
1401 bus->cur_read.len = 0;
1402 }
1403
1404 /* Ok -- either we just generated a packet chain,
1405 or had one from before */
1406 if (!skb_queue_empty(&bus->glom)) {
1407 if (BRCMF_GLOM_ON()) {
1408 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1409 skb_queue_walk(&bus->glom, pnext) {
1410 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1411 pnext, (u8 *) (pnext->data),
1412 pnext->len, pnext->len);
1413 }
1414 }
1415
1416 pfirst = skb_peek(&bus->glom);
1417 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1418
1419 /* Do an SDIO read for the superframe. Configurable iovar to
1420 * read directly into the chained packet, or allocate a large
1421 * packet and and copy into the chain.
1422 */
1423 sdio_claim_host(bus->sdiodev->func[1]);
1424 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1425 bus->sdiodev->sbwad,
1426 SDIO_FUNC_2, F2SYNC, &bus->glom, dlen);
1427 sdio_release_host(bus->sdiodev->func[1]);
1428 bus->sdcnt.f2rxdata++;
1429
1430 /* On failure, kill the superframe, allow a couple retries */
1431 if (errcode < 0) {
1432 brcmf_err("glom read of %d bytes failed: %d\n",
1433 dlen, errcode);
1434
1435 sdio_claim_host(bus->sdiodev->func[1]);
1436 if (bus->glomerr++ < 3) {
1437 brcmf_sdbrcm_rxfail(bus, true, true);
1438 } else {
1439 bus->glomerr = 0;
1440 brcmf_sdbrcm_rxfail(bus, true, false);
1441 bus->sdcnt.rxglomfail++;
1442 brcmf_sdbrcm_free_glom(bus);
1443 }
1444 sdio_release_host(bus->sdiodev->func[1]);
1445 return 0;
1446 }
1447
1448 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1449 pfirst->data, min_t(int, pfirst->len, 48),
1450 "SUPERFRAME:\n");
1451
1452 rd_new.seq_num = rxseq;
1453 rd_new.len = dlen;
1454 sdio_claim_host(bus->sdiodev->func[1]);
1455 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1456 BRCMF_SDIO_FT_SUPER);
1457 sdio_release_host(bus->sdiodev->func[1]);
1458 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1459
1460 /* Remove superframe header, remember offset */
1461 skb_pull(pfirst, rd_new.dat_offset);
1462 sfdoff = rd_new.dat_offset;
1463 num = 0;
1464
1465 /* Validate all the subframe headers */
1466 skb_queue_walk(&bus->glom, pnext) {
1467 /* leave when invalid subframe is found */
1468 if (errcode)
1469 break;
1470
1471 rd_new.len = pnext->len;
1472 rd_new.seq_num = rxseq++;
1473 sdio_claim_host(bus->sdiodev->func[1]);
1474 errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1475 BRCMF_SDIO_FT_SUB);
1476 sdio_release_host(bus->sdiodev->func[1]);
1477 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1478 pnext->data, 32, "subframe:\n");
1479
1480 num++;
1481 }
1482
1483 if (errcode) {
1484 /* Terminate frame on error, request
1485 a couple retries */
1486 sdio_claim_host(bus->sdiodev->func[1]);
1487 if (bus->glomerr++ < 3) {
1488 /* Restore superframe header space */
1489 skb_push(pfirst, sfdoff);
1490 brcmf_sdbrcm_rxfail(bus, true, true);
1491 } else {
1492 bus->glomerr = 0;
1493 brcmf_sdbrcm_rxfail(bus, true, false);
1494 bus->sdcnt.rxglomfail++;
1495 brcmf_sdbrcm_free_glom(bus);
1496 }
1497 sdio_release_host(bus->sdiodev->func[1]);
1498 bus->cur_read.len = 0;
1499 return 0;
1500 }
1501
1502 /* Basic SD framing looks ok - process each packet (header) */
1503
1504 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1505 dptr = (u8 *) (pfirst->data);
1506 sublen = get_unaligned_le16(dptr);
1507 doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1508
1509 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1510 dptr, pfirst->len,
1511 "Rx Subframe Data:\n");
1512
1513 __skb_trim(pfirst, sublen);
1514 skb_pull(pfirst, doff);
1515
1516 if (pfirst->len == 0) {
1517 skb_unlink(pfirst, &bus->glom);
1518 brcmu_pkt_buf_free_skb(pfirst);
1519 continue;
1520 }
1521
1522 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1523 pfirst->data,
1524 min_t(int, pfirst->len, 32),
1525 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1526 bus->glom.qlen, pfirst, pfirst->data,
1527 pfirst->len, pfirst->next,
1528 pfirst->prev);
1529 skb_unlink(pfirst, &bus->glom);
1530 brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1531 bus->sdcnt.rxglompkts++;
1532 }
1533
1534 bus->sdcnt.rxglomframes++;
1535 }
1536 return num;
1537 }
1538
1539 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1540 bool *pending)
1541 {
1542 DECLARE_WAITQUEUE(wait, current);
1543 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1544
1545 /* Wait until control frame is available */
1546 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1547 set_current_state(TASK_INTERRUPTIBLE);
1548
1549 while (!(*condition) && (!signal_pending(current) && timeout))
1550 timeout = schedule_timeout(timeout);
1551
1552 if (signal_pending(current))
1553 *pending = true;
1554
1555 set_current_state(TASK_RUNNING);
1556 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1557
1558 return timeout;
1559 }
1560
1561 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1562 {
1563 if (waitqueue_active(&bus->dcmd_resp_wait))
1564 wake_up_interruptible(&bus->dcmd_resp_wait);
1565
1566 return 0;
1567 }
1568 static void
1569 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1570 {
1571 uint rdlen, pad;
1572 u8 *buf = NULL, *rbuf;
1573 int sdret;
1574
1575 brcmf_dbg(TRACE, "Enter\n");
1576
1577 if (bus->rxblen)
1578 buf = vzalloc(bus->rxblen);
1579 if (!buf)
1580 goto done;
1581
1582 rbuf = bus->rxbuf;
1583 pad = ((unsigned long)rbuf % bus->head_align);
1584 if (pad)
1585 rbuf += (bus->head_align - pad);
1586
1587 /* Copy the already-read portion over */
1588 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1589 if (len <= BRCMF_FIRSTREAD)
1590 goto gotpkt;
1591
1592 /* Raise rdlen to next SDIO block to avoid tail command */
1593 rdlen = len - BRCMF_FIRSTREAD;
1594 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1595 pad = bus->blocksize - (rdlen % bus->blocksize);
1596 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1597 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1598 rdlen += pad;
1599 } else if (rdlen % bus->head_align) {
1600 rdlen += bus->head_align - (rdlen % bus->head_align);
1601 }
1602
1603 /* Drop if the read is too big or it exceeds our maximum */
1604 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1605 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1606 rdlen, bus->sdiodev->bus_if->maxctl);
1607 brcmf_sdbrcm_rxfail(bus, false, false);
1608 goto done;
1609 }
1610
1611 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1612 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1613 len, len - doff, bus->sdiodev->bus_if->maxctl);
1614 bus->sdcnt.rx_toolong++;
1615 brcmf_sdbrcm_rxfail(bus, false, false);
1616 goto done;
1617 }
1618
1619 /* Read remain of frame body */
1620 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1621 bus->sdiodev->sbwad,
1622 SDIO_FUNC_2,
1623 F2SYNC, rbuf, rdlen);
1624 bus->sdcnt.f2rxdata++;
1625
1626 /* Control frame failures need retransmission */
1627 if (sdret < 0) {
1628 brcmf_err("read %d control bytes failed: %d\n",
1629 rdlen, sdret);
1630 bus->sdcnt.rxc_errors++;
1631 brcmf_sdbrcm_rxfail(bus, true, true);
1632 goto done;
1633 } else
1634 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1635
1636 gotpkt:
1637
1638 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1639 buf, len, "RxCtrl:\n");
1640
1641 /* Point to valid data and indicate its length */
1642 spin_lock_bh(&bus->rxctl_lock);
1643 if (bus->rxctl) {
1644 brcmf_err("last control frame is being processed.\n");
1645 spin_unlock_bh(&bus->rxctl_lock);
1646 vfree(buf);
1647 goto done;
1648 }
1649 bus->rxctl = buf + doff;
1650 bus->rxctl_orig = buf;
1651 bus->rxlen = len - doff;
1652 spin_unlock_bh(&bus->rxctl_lock);
1653
1654 done:
1655 /* Awake any waiters */
1656 brcmf_sdbrcm_dcmd_resp_wake(bus);
1657 }
1658
1659 /* Pad read to blocksize for efficiency */
1660 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1661 {
1662 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1663 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1664 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1665 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1666 *rdlen += *pad;
1667 } else if (*rdlen % bus->head_align) {
1668 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1669 }
1670 }
1671
1672 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1673 {
1674 struct sk_buff *pkt; /* Packet for event or data frames */
1675 u16 pad; /* Number of pad bytes to read */
1676 uint rxleft = 0; /* Remaining number of frames allowed */
1677 int ret; /* Return code from calls */
1678 uint rxcount = 0; /* Total frames read */
1679 struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1680 u8 head_read = 0;
1681
1682 brcmf_dbg(TRACE, "Enter\n");
1683
1684 /* Not finished unless we encounter no more frames indication */
1685 bus->rxpending = true;
1686
1687 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1688 !bus->rxskip && rxleft &&
1689 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1690 rd->seq_num++, rxleft--) {
1691
1692 /* Handle glomming separately */
1693 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1694 u8 cnt;
1695 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1696 bus->glomd, skb_peek(&bus->glom));
1697 cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1698 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1699 rd->seq_num += cnt - 1;
1700 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1701 continue;
1702 }
1703
1704 rd->len_left = rd->len;
1705 /* read header first for unknow frame length */
1706 sdio_claim_host(bus->sdiodev->func[1]);
1707 if (!rd->len) {
1708 ret = brcmf_sdcard_recv_buf(bus->sdiodev,
1709 bus->sdiodev->sbwad,
1710 SDIO_FUNC_2, F2SYNC,
1711 bus->rxhdr,
1712 BRCMF_FIRSTREAD);
1713 bus->sdcnt.f2rxhdrs++;
1714 if (ret < 0) {
1715 brcmf_err("RXHEADER FAILED: %d\n",
1716 ret);
1717 bus->sdcnt.rx_hdrfail++;
1718 brcmf_sdbrcm_rxfail(bus, true, true);
1719 sdio_release_host(bus->sdiodev->func[1]);
1720 continue;
1721 }
1722
1723 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1724 bus->rxhdr, SDPCM_HDRLEN,
1725 "RxHdr:\n");
1726
1727 if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1728 BRCMF_SDIO_FT_NORMAL)) {
1729 sdio_release_host(bus->sdiodev->func[1]);
1730 if (!bus->rxpending)
1731 break;
1732 else
1733 continue;
1734 }
1735
1736 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1737 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1738 rd->len,
1739 rd->dat_offset);
1740 /* prepare the descriptor for the next read */
1741 rd->len = rd->len_nxtfrm << 4;
1742 rd->len_nxtfrm = 0;
1743 /* treat all packet as event if we don't know */
1744 rd->channel = SDPCM_EVENT_CHANNEL;
1745 sdio_release_host(bus->sdiodev->func[1]);
1746 continue;
1747 }
1748 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1749 rd->len - BRCMF_FIRSTREAD : 0;
1750 head_read = BRCMF_FIRSTREAD;
1751 }
1752
1753 brcmf_pad(bus, &pad, &rd->len_left);
1754
1755 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1756 bus->head_align);
1757 if (!pkt) {
1758 /* Give up on data, request rtx of events */
1759 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1760 brcmf_sdbrcm_rxfail(bus, false,
1761 RETRYCHAN(rd->channel));
1762 sdio_release_host(bus->sdiodev->func[1]);
1763 continue;
1764 }
1765 skb_pull(pkt, head_read);
1766 pkt_align(pkt, rd->len_left, bus->head_align);
1767
1768 ret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1769 SDIO_FUNC_2, F2SYNC, pkt);
1770 bus->sdcnt.f2rxdata++;
1771 sdio_release_host(bus->sdiodev->func[1]);
1772
1773 if (ret < 0) {
1774 brcmf_err("read %d bytes from channel %d failed: %d\n",
1775 rd->len, rd->channel, ret);
1776 brcmu_pkt_buf_free_skb(pkt);
1777 sdio_claim_host(bus->sdiodev->func[1]);
1778 brcmf_sdbrcm_rxfail(bus, true,
1779 RETRYCHAN(rd->channel));
1780 sdio_release_host(bus->sdiodev->func[1]);
1781 continue;
1782 }
1783
1784 if (head_read) {
1785 skb_push(pkt, head_read);
1786 memcpy(pkt->data, bus->rxhdr, head_read);
1787 head_read = 0;
1788 } else {
1789 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1790 rd_new.seq_num = rd->seq_num;
1791 sdio_claim_host(bus->sdiodev->func[1]);
1792 if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1793 BRCMF_SDIO_FT_NORMAL)) {
1794 rd->len = 0;
1795 brcmu_pkt_buf_free_skb(pkt);
1796 }
1797 bus->sdcnt.rx_readahead_cnt++;
1798 if (rd->len != roundup(rd_new.len, 16)) {
1799 brcmf_err("frame length mismatch:read %d, should be %d\n",
1800 rd->len,
1801 roundup(rd_new.len, 16) >> 4);
1802 rd->len = 0;
1803 brcmf_sdbrcm_rxfail(bus, true, true);
1804 sdio_release_host(bus->sdiodev->func[1]);
1805 brcmu_pkt_buf_free_skb(pkt);
1806 continue;
1807 }
1808 sdio_release_host(bus->sdiodev->func[1]);
1809 rd->len_nxtfrm = rd_new.len_nxtfrm;
1810 rd->channel = rd_new.channel;
1811 rd->dat_offset = rd_new.dat_offset;
1812
1813 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1814 BRCMF_DATA_ON()) &&
1815 BRCMF_HDRS_ON(),
1816 bus->rxhdr, SDPCM_HDRLEN,
1817 "RxHdr:\n");
1818
1819 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1820 brcmf_err("readahead on control packet %d?\n",
1821 rd_new.seq_num);
1822 /* Force retry w/normal header read */
1823 rd->len = 0;
1824 sdio_claim_host(bus->sdiodev->func[1]);
1825 brcmf_sdbrcm_rxfail(bus, false, true);
1826 sdio_release_host(bus->sdiodev->func[1]);
1827 brcmu_pkt_buf_free_skb(pkt);
1828 continue;
1829 }
1830 }
1831
1832 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1833 pkt->data, rd->len, "Rx Data:\n");
1834
1835 /* Save superframe descriptor and allocate packet frame */
1836 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1837 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1838 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1839 rd->len);
1840 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1841 pkt->data, rd->len,
1842 "Glom Data:\n");
1843 __skb_trim(pkt, rd->len);
1844 skb_pull(pkt, SDPCM_HDRLEN);
1845 bus->glomd = pkt;
1846 } else {
1847 brcmf_err("%s: glom superframe w/o "
1848 "descriptor!\n", __func__);
1849 sdio_claim_host(bus->sdiodev->func[1]);
1850 brcmf_sdbrcm_rxfail(bus, false, false);
1851 sdio_release_host(bus->sdiodev->func[1]);
1852 }
1853 /* prepare the descriptor for the next read */
1854 rd->len = rd->len_nxtfrm << 4;
1855 rd->len_nxtfrm = 0;
1856 /* treat all packet as event if we don't know */
1857 rd->channel = SDPCM_EVENT_CHANNEL;
1858 continue;
1859 }
1860
1861 /* Fill in packet len and prio, deliver upward */
1862 __skb_trim(pkt, rd->len);
1863 skb_pull(pkt, rd->dat_offset);
1864
1865 /* prepare the descriptor for the next read */
1866 rd->len = rd->len_nxtfrm << 4;
1867 rd->len_nxtfrm = 0;
1868 /* treat all packet as event if we don't know */
1869 rd->channel = SDPCM_EVENT_CHANNEL;
1870
1871 if (pkt->len == 0) {
1872 brcmu_pkt_buf_free_skb(pkt);
1873 continue;
1874 }
1875
1876 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1877 }
1878
1879 rxcount = maxframes - rxleft;
1880 /* Message if we hit the limit */
1881 if (!rxleft)
1882 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1883 else
1884 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1885 /* Back off rxseq if awaiting rtx, update rx_seq */
1886 if (bus->rxskip)
1887 rd->seq_num--;
1888 bus->rx_seq = rd->seq_num;
1889
1890 return rxcount;
1891 }
1892
1893 static void
1894 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1895 {
1896 if (waitqueue_active(&bus->ctrl_wait))
1897 wake_up_interruptible(&bus->ctrl_wait);
1898 return;
1899 }
1900
1901 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
1902 {
1903 u16 head_pad;
1904 u8 *dat_buf;
1905
1906 dat_buf = (u8 *)(pkt->data);
1907
1908 /* Check head padding */
1909 head_pad = ((unsigned long)dat_buf % bus->head_align);
1910 if (head_pad) {
1911 if (skb_headroom(pkt) < head_pad) {
1912 bus->sdiodev->bus_if->tx_realloc++;
1913 head_pad = 0;
1914 if (skb_cow(pkt, head_pad))
1915 return -ENOMEM;
1916 }
1917 skb_push(pkt, head_pad);
1918 dat_buf = (u8 *)(pkt->data);
1919 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1920 }
1921 return head_pad;
1922 }
1923
1924 /**
1925 * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1926 * bus layer usage.
1927 */
1928 /* flag marking a dummy skb added for DMA alignment requirement */
1929 #define ALIGN_SKB_FLAG 0x8000
1930 /* bit mask of data length chopped from the previous packet */
1931 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1932
1933 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
1934 struct sk_buff_head *pktq,
1935 struct sk_buff *pkt, u16 total_len)
1936 {
1937 struct brcmf_sdio_dev *sdiodev;
1938 struct sk_buff *pkt_pad;
1939 u16 tail_pad, tail_chop, chain_pad;
1940 unsigned int blksize;
1941 bool lastfrm;
1942 int ntail, ret;
1943
1944 sdiodev = bus->sdiodev;
1945 blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1946 /* sg entry alignment should be a divisor of block size */
1947 WARN_ON(blksize % bus->sgentry_align);
1948
1949 /* Check tail padding */
1950 lastfrm = skb_queue_is_last(pktq, pkt);
1951 tail_pad = 0;
1952 tail_chop = pkt->len % bus->sgentry_align;
1953 if (tail_chop)
1954 tail_pad = bus->sgentry_align - tail_chop;
1955 chain_pad = (total_len + tail_pad) % blksize;
1956 if (lastfrm && chain_pad)
1957 tail_pad += blksize - chain_pad;
1958 if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
1959 pkt_pad = bus->txglom_sgpad;
1960 if (pkt_pad == NULL)
1961 brcmu_pkt_buf_get_skb(tail_pad + tail_chop);
1962 if (pkt_pad == NULL)
1963 return -ENOMEM;
1964 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
1965 if (unlikely(ret < 0))
1966 return ret;
1967 memcpy(pkt_pad->data,
1968 pkt->data + pkt->len - tail_chop,
1969 tail_chop);
1970 *(u32 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
1971 skb_trim(pkt, pkt->len - tail_chop);
1972 __skb_queue_after(pktq, pkt, pkt_pad);
1973 } else {
1974 ntail = pkt->data_len + tail_pad -
1975 (pkt->end - pkt->tail);
1976 if (skb_cloned(pkt) || ntail > 0)
1977 if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
1978 return -ENOMEM;
1979 if (skb_linearize(pkt))
1980 return -ENOMEM;
1981 __skb_put(pkt, tail_pad);
1982 }
1983
1984 return tail_pad;
1985 }
1986
1987 /**
1988 * brcmf_sdio_txpkt_prep - packet preparation for transmit
1989 * @bus: brcmf_sdio structure pointer
1990 * @pktq: packet list pointer
1991 * @chan: virtual channel to transmit the packet
1992 *
1993 * Processes to be applied to the packet
1994 * - Align data buffer pointer
1995 * - Align data buffer length
1996 * - Prepare header
1997 * Return: negative value if there is error
1998 */
1999 static int
2000 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2001 uint chan)
2002 {
2003 u16 head_pad, total_len;
2004 struct sk_buff *pkt_next;
2005 u8 txseq;
2006 int ret;
2007 struct brcmf_sdio_hdrinfo hd_info = {0};
2008
2009 txseq = bus->tx_seq;
2010 total_len = 0;
2011 skb_queue_walk(pktq, pkt_next) {
2012 /* alignment packet inserted in previous
2013 * loop cycle can be skipped as it is
2014 * already properly aligned and does not
2015 * need an sdpcm header.
2016 */
2017 if (*(u32 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2018 continue;
2019
2020 /* align packet data pointer */
2021 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2022 if (ret < 0)
2023 return ret;
2024 head_pad = (u16)ret;
2025 if (head_pad)
2026 memset(pkt_next->data, 0, head_pad + bus->tx_hdrlen);
2027
2028 total_len += pkt_next->len;
2029
2030 hd_info.len = pkt_next->len;
2031 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2032 if (bus->txglom && pktq->qlen > 1) {
2033 ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2034 pkt_next, total_len);
2035 if (ret < 0)
2036 return ret;
2037 hd_info.tail_pad = (u16)ret;
2038 total_len += (u16)ret;
2039 }
2040
2041 hd_info.channel = chan;
2042 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2043 hd_info.seq_num = txseq++;
2044
2045 /* Now fill the header */
2046 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2047
2048 if (BRCMF_BYTES_ON() &&
2049 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2050 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2051 brcmf_dbg_hex_dump(true, pkt_next, hd_info.len,
2052 "Tx Frame:\n");
2053 else if (BRCMF_HDRS_ON())
2054 brcmf_dbg_hex_dump(true, pkt_next,
2055 head_pad + bus->tx_hdrlen,
2056 "Tx Header:\n");
2057 }
2058 /* Hardware length tag of the first packet should be total
2059 * length of the chain (including padding)
2060 */
2061 if (bus->txglom)
2062 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2063 return 0;
2064 }
2065
2066 /**
2067 * brcmf_sdio_txpkt_postp - packet post processing for transmit
2068 * @bus: brcmf_sdio structure pointer
2069 * @pktq: packet list pointer
2070 *
2071 * Processes to be applied to the packet
2072 * - Remove head padding
2073 * - Remove tail padding
2074 */
2075 static void
2076 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2077 {
2078 u8 *hdr;
2079 u32 dat_offset;
2080 u16 tail_pad;
2081 u32 dummy_flags, chop_len;
2082 struct sk_buff *pkt_next, *tmp, *pkt_prev;
2083
2084 skb_queue_walk_safe(pktq, pkt_next, tmp) {
2085 dummy_flags = *(u32 *)(pkt_next->cb);
2086 if (dummy_flags & ALIGN_SKB_FLAG) {
2087 chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2088 if (chop_len) {
2089 pkt_prev = pkt_next->prev;
2090 skb_put(pkt_prev, chop_len);
2091 }
2092 __skb_unlink(pkt_next, pktq);
2093 brcmu_pkt_buf_free_skb(pkt_next);
2094 } else {
2095 hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2096 dat_offset = le32_to_cpu(*(__le32 *)hdr);
2097 dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2098 SDPCM_DOFFSET_SHIFT;
2099 skb_pull(pkt_next, dat_offset);
2100 if (bus->txglom) {
2101 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2102 skb_trim(pkt_next, pkt_next->len - tail_pad);
2103 }
2104 }
2105 }
2106 }
2107
2108 /* Writes a HW/SW header into the packet and sends it. */
2109 /* Assumes: (a) header space already there, (b) caller holds lock */
2110 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2111 uint chan)
2112 {
2113 int ret;
2114 int i;
2115 struct sk_buff *pkt_next, *tmp;
2116
2117 brcmf_dbg(TRACE, "Enter\n");
2118
2119 ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2120 if (ret)
2121 goto done;
2122
2123 sdio_claim_host(bus->sdiodev->func[1]);
2124 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2125 SDIO_FUNC_2, F2SYNC, pktq);
2126 bus->sdcnt.f2txdata++;
2127
2128 if (ret < 0) {
2129 /* On failure, abort the command and terminate the frame */
2130 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2131 ret);
2132 bus->sdcnt.tx_sderrs++;
2133
2134 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2135 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2136 SFC_WF_TERM, NULL);
2137 bus->sdcnt.f1regdata++;
2138
2139 for (i = 0; i < 3; i++) {
2140 u8 hi, lo;
2141 hi = brcmf_sdio_regrb(bus->sdiodev,
2142 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2143 lo = brcmf_sdio_regrb(bus->sdiodev,
2144 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2145 bus->sdcnt.f1regdata += 2;
2146 if ((hi == 0) && (lo == 0))
2147 break;
2148 }
2149 }
2150 sdio_release_host(bus->sdiodev->func[1]);
2151
2152 done:
2153 brcmf_sdio_txpkt_postp(bus, pktq);
2154 if (ret == 0)
2155 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2156 skb_queue_walk_safe(pktq, pkt_next, tmp) {
2157 __skb_unlink(pkt_next, pktq);
2158 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2159 }
2160 return ret;
2161 }
2162
2163 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2164 {
2165 struct sk_buff *pkt;
2166 struct sk_buff_head pktq;
2167 u32 intstatus = 0;
2168 int ret = 0, prec_out, i;
2169 uint cnt = 0;
2170 u8 tx_prec_map, pkt_num;
2171
2172 brcmf_dbg(TRACE, "Enter\n");
2173
2174 tx_prec_map = ~bus->flowcontrol;
2175
2176 /* Send frames until the limit or some other event */
2177 for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2178 pkt_num = 1;
2179 __skb_queue_head_init(&pktq);
2180 if (bus->txglom)
2181 pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2182 brcmf_sdio_txglomsz);
2183 pkt_num = min_t(u32, pkt_num,
2184 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2185 spin_lock_bh(&bus->txqlock);
2186 for (i = 0; i < pkt_num; i++) {
2187 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2188 &prec_out);
2189 if (pkt == NULL)
2190 break;
2191 __skb_queue_tail(&pktq, pkt);
2192 }
2193 spin_unlock_bh(&bus->txqlock);
2194 if (i == 0)
2195 break;
2196
2197 ret = brcmf_sdbrcm_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2198 cnt += i;
2199
2200 /* In poll mode, need to check for other events */
2201 if (!bus->intr && cnt) {
2202 /* Check device status, signal pending interrupt */
2203 sdio_claim_host(bus->sdiodev->func[1]);
2204 ret = r_sdreg32(bus, &intstatus,
2205 offsetof(struct sdpcmd_regs,
2206 intstatus));
2207 sdio_release_host(bus->sdiodev->func[1]);
2208 bus->sdcnt.f2txdata++;
2209 if (ret != 0)
2210 break;
2211 if (intstatus & bus->hostintmask)
2212 atomic_set(&bus->ipend, 1);
2213 }
2214 }
2215
2216 /* Deflow-control stack if needed */
2217 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2218 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2219 bus->txoff = false;
2220 brcmf_txflowblock(bus->sdiodev->dev, false);
2221 }
2222
2223 return cnt;
2224 }
2225
2226 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2227 {
2228 u32 local_hostintmask;
2229 u8 saveclk;
2230 int err;
2231 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2232 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2233 struct brcmf_sdio *bus = sdiodev->bus;
2234
2235 brcmf_dbg(TRACE, "Enter\n");
2236
2237 if (bus->watchdog_tsk) {
2238 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2239 kthread_stop(bus->watchdog_tsk);
2240 bus->watchdog_tsk = NULL;
2241 }
2242
2243 sdio_claim_host(bus->sdiodev->func[1]);
2244
2245 /* Enable clock for device interrupts */
2246 brcmf_sdbrcm_bus_sleep(bus, false, false);
2247
2248 /* Disable and clear interrupts at the chip level also */
2249 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2250 local_hostintmask = bus->hostintmask;
2251 bus->hostintmask = 0;
2252
2253 /* Change our idea of bus state */
2254 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2255
2256 /* Force clocks on backplane to be sure F2 interrupt propagates */
2257 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2258 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2259 if (!err) {
2260 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2261 (saveclk | SBSDIO_FORCE_HT), &err);
2262 }
2263 if (err)
2264 brcmf_err("Failed to force clock for F2: err %d\n", err);
2265
2266 /* Turn off the bus (F2), free any pending packets */
2267 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2268 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2269 NULL);
2270
2271 /* Clear any pending interrupts now that F2 is disabled */
2272 w_sdreg32(bus, local_hostintmask,
2273 offsetof(struct sdpcmd_regs, intstatus));
2274
2275 /* Turn off the backplane clock (only) */
2276 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2277 sdio_release_host(bus->sdiodev->func[1]);
2278
2279 /* Clear the data packet queues */
2280 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2281
2282 /* Clear any held glomming stuff */
2283 if (bus->glomd)
2284 brcmu_pkt_buf_free_skb(bus->glomd);
2285 brcmf_sdbrcm_free_glom(bus);
2286
2287 /* Clear rx control and wake any waiters */
2288 spin_lock_bh(&bus->rxctl_lock);
2289 bus->rxlen = 0;
2290 spin_unlock_bh(&bus->rxctl_lock);
2291 brcmf_sdbrcm_dcmd_resp_wake(bus);
2292
2293 /* Reset some F2 state stuff */
2294 bus->rxskip = false;
2295 bus->tx_seq = bus->rx_seq = 0;
2296 }
2297
2298 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2299 {
2300 unsigned long flags;
2301
2302 if (bus->sdiodev->oob_irq_requested) {
2303 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2304 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2305 enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2306 bus->sdiodev->irq_en = true;
2307 }
2308 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2309 }
2310 }
2311
2312 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2313 {
2314 u8 idx;
2315 u32 addr;
2316 unsigned long val;
2317 int n, ret;
2318
2319 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2320 addr = bus->ci->c_inf[idx].base +
2321 offsetof(struct sdpcmd_regs, intstatus);
2322
2323 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2324 bus->sdcnt.f1regdata++;
2325 if (ret != 0)
2326 val = 0;
2327
2328 val &= bus->hostintmask;
2329 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2330
2331 /* Clear interrupts */
2332 if (val) {
2333 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2334 bus->sdcnt.f1regdata++;
2335 }
2336
2337 if (ret) {
2338 atomic_set(&bus->intstatus, 0);
2339 } else if (val) {
2340 for_each_set_bit(n, &val, 32)
2341 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2342 }
2343
2344 return ret;
2345 }
2346
2347 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2348 {
2349 u32 newstatus = 0;
2350 unsigned long intstatus;
2351 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2352 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2353 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2354 int err = 0, n;
2355
2356 brcmf_dbg(TRACE, "Enter\n");
2357
2358 sdio_claim_host(bus->sdiodev->func[1]);
2359
2360 /* If waiting for HTAVAIL, check status */
2361 if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2362 u8 clkctl, devctl = 0;
2363
2364 #ifdef DEBUG
2365 /* Check for inconsistent device control */
2366 devctl = brcmf_sdio_regrb(bus->sdiodev,
2367 SBSDIO_DEVICE_CTL, &err);
2368 if (err) {
2369 brcmf_err("error reading DEVCTL: %d\n", err);
2370 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2371 }
2372 #endif /* DEBUG */
2373
2374 /* Read CSR, if clock on switch to AVAIL, else ignore */
2375 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2376 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2377 if (err) {
2378 brcmf_err("error reading CSR: %d\n",
2379 err);
2380 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2381 }
2382
2383 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2384 devctl, clkctl);
2385
2386 if (SBSDIO_HTAV(clkctl)) {
2387 devctl = brcmf_sdio_regrb(bus->sdiodev,
2388 SBSDIO_DEVICE_CTL, &err);
2389 if (err) {
2390 brcmf_err("error reading DEVCTL: %d\n",
2391 err);
2392 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2393 }
2394 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2395 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2396 devctl, &err);
2397 if (err) {
2398 brcmf_err("error writing DEVCTL: %d\n",
2399 err);
2400 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2401 }
2402 bus->clkstate = CLK_AVAIL;
2403 }
2404 }
2405
2406 /* Make sure backplane clock is on */
2407 brcmf_sdbrcm_bus_sleep(bus, false, true);
2408
2409 /* Pending interrupt indicates new device status */
2410 if (atomic_read(&bus->ipend) > 0) {
2411 atomic_set(&bus->ipend, 0);
2412 err = brcmf_sdio_intr_rstatus(bus);
2413 }
2414
2415 /* Start with leftover status bits */
2416 intstatus = atomic_xchg(&bus->intstatus, 0);
2417
2418 /* Handle flow-control change: read new state in case our ack
2419 * crossed another change interrupt. If change still set, assume
2420 * FC ON for safety, let next loop through do the debounce.
2421 */
2422 if (intstatus & I_HMB_FC_CHANGE) {
2423 intstatus &= ~I_HMB_FC_CHANGE;
2424 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2425 offsetof(struct sdpcmd_regs, intstatus));
2426
2427 err = r_sdreg32(bus, &newstatus,
2428 offsetof(struct sdpcmd_regs, intstatus));
2429 bus->sdcnt.f1regdata += 2;
2430 atomic_set(&bus->fcstate,
2431 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2432 intstatus |= (newstatus & bus->hostintmask);
2433 }
2434
2435 /* Handle host mailbox indication */
2436 if (intstatus & I_HMB_HOST_INT) {
2437 intstatus &= ~I_HMB_HOST_INT;
2438 intstatus |= brcmf_sdbrcm_hostmail(bus);
2439 }
2440
2441 sdio_release_host(bus->sdiodev->func[1]);
2442
2443 /* Generally don't ask for these, can get CRC errors... */
2444 if (intstatus & I_WR_OOSYNC) {
2445 brcmf_err("Dongle reports WR_OOSYNC\n");
2446 intstatus &= ~I_WR_OOSYNC;
2447 }
2448
2449 if (intstatus & I_RD_OOSYNC) {
2450 brcmf_err("Dongle reports RD_OOSYNC\n");
2451 intstatus &= ~I_RD_OOSYNC;
2452 }
2453
2454 if (intstatus & I_SBINT) {
2455 brcmf_err("Dongle reports SBINT\n");
2456 intstatus &= ~I_SBINT;
2457 }
2458
2459 /* Would be active due to wake-wlan in gSPI */
2460 if (intstatus & I_CHIPACTIVE) {
2461 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2462 intstatus &= ~I_CHIPACTIVE;
2463 }
2464
2465 /* Ignore frame indications if rxskip is set */
2466 if (bus->rxskip)
2467 intstatus &= ~I_HMB_FRAME_IND;
2468
2469 /* On frame indication, read available frames */
2470 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2471 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2472 if (!bus->rxpending)
2473 intstatus &= ~I_HMB_FRAME_IND;
2474 rxlimit -= min(framecnt, rxlimit);
2475 }
2476
2477 /* Keep still-pending events for next scheduling */
2478 if (intstatus) {
2479 for_each_set_bit(n, &intstatus, 32)
2480 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2481 }
2482
2483 brcmf_sdbrcm_clrintr(bus);
2484
2485 if (data_ok(bus) && bus->ctrl_frame_stat &&
2486 (bus->clkstate == CLK_AVAIL)) {
2487 int i;
2488
2489 sdio_claim_host(bus->sdiodev->func[1]);
2490 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2491 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2492 (u32) bus->ctrl_frame_len);
2493
2494 if (err < 0) {
2495 /* On failure, abort the command and
2496 terminate the frame */
2497 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2498 err);
2499 bus->sdcnt.tx_sderrs++;
2500
2501 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2502
2503 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2504 SFC_WF_TERM, &err);
2505 bus->sdcnt.f1regdata++;
2506
2507 for (i = 0; i < 3; i++) {
2508 u8 hi, lo;
2509 hi = brcmf_sdio_regrb(bus->sdiodev,
2510 SBSDIO_FUNC1_WFRAMEBCHI,
2511 &err);
2512 lo = brcmf_sdio_regrb(bus->sdiodev,
2513 SBSDIO_FUNC1_WFRAMEBCLO,
2514 &err);
2515 bus->sdcnt.f1regdata += 2;
2516 if ((hi == 0) && (lo == 0))
2517 break;
2518 }
2519
2520 } else {
2521 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2522 }
2523 sdio_release_host(bus->sdiodev->func[1]);
2524 bus->ctrl_frame_stat = false;
2525 brcmf_sdbrcm_wait_event_wakeup(bus);
2526 }
2527 /* Send queued frames (limit 1 if rx may still be pending) */
2528 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2529 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2530 && data_ok(bus)) {
2531 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2532 txlimit;
2533 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2534 txlimit -= framecnt;
2535 }
2536
2537 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2538 brcmf_err("failed backplane access over SDIO, halting operation\n");
2539 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2540 atomic_set(&bus->intstatus, 0);
2541 } else if (atomic_read(&bus->intstatus) ||
2542 atomic_read(&bus->ipend) > 0 ||
2543 (!atomic_read(&bus->fcstate) &&
2544 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2545 data_ok(bus)) || PKT_AVAILABLE()) {
2546 atomic_inc(&bus->dpc_tskcnt);
2547 }
2548
2549 /* If we're done for now, turn off clock request. */
2550 if ((bus->clkstate != CLK_PENDING)
2551 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2552 bus->activity = false;
2553 brcmf_dbg(SDIO, "idle state\n");
2554 sdio_claim_host(bus->sdiodev->func[1]);
2555 brcmf_sdbrcm_bus_sleep(bus, true, false);
2556 sdio_release_host(bus->sdiodev->func[1]);
2557 }
2558 }
2559
2560 static struct pktq *brcmf_sdbrcm_bus_gettxq(struct device *dev)
2561 {
2562 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2563 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2564 struct brcmf_sdio *bus = sdiodev->bus;
2565
2566 return &bus->txq;
2567 }
2568
2569 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2570 {
2571 int ret = -EBADE;
2572 uint datalen, prec;
2573 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2574 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2575 struct brcmf_sdio *bus = sdiodev->bus;
2576 ulong flags;
2577
2578 brcmf_dbg(TRACE, "Enter\n");
2579
2580 datalen = pkt->len;
2581
2582 /* Add space for the header */
2583 skb_push(pkt, bus->tx_hdrlen);
2584 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2585
2586 prec = prio2prec((pkt->priority & PRIOMASK));
2587
2588 /* Check for existing queue, current flow-control,
2589 pending event, or pending clock */
2590 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2591 bus->sdcnt.fcqueued++;
2592
2593 /* Priority based enq */
2594 spin_lock_irqsave(&bus->txqlock, flags);
2595 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2596 skb_pull(pkt, bus->tx_hdrlen);
2597 brcmf_err("out of bus->txq !!!\n");
2598 ret = -ENOSR;
2599 } else {
2600 ret = 0;
2601 }
2602
2603 if (pktq_len(&bus->txq) >= TXHI) {
2604 bus->txoff = true;
2605 brcmf_txflowblock(bus->sdiodev->dev, true);
2606 }
2607 spin_unlock_irqrestore(&bus->txqlock, flags);
2608
2609 #ifdef DEBUG
2610 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2611 qcount[prec] = pktq_plen(&bus->txq, prec);
2612 #endif
2613
2614 if (atomic_read(&bus->dpc_tskcnt) == 0) {
2615 atomic_inc(&bus->dpc_tskcnt);
2616 queue_work(bus->brcmf_wq, &bus->datawork);
2617 }
2618
2619 return ret;
2620 }
2621
2622 #ifdef DEBUG
2623 #define CONSOLE_LINE_MAX 192
2624
2625 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2626 {
2627 struct brcmf_console *c = &bus->console;
2628 u8 line[CONSOLE_LINE_MAX], ch;
2629 u32 n, idx, addr;
2630 int rv;
2631
2632 /* Don't do anything until FWREADY updates console address */
2633 if (bus->console_addr == 0)
2634 return 0;
2635
2636 /* Read console log struct */
2637 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2638 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2639 sizeof(c->log_le));
2640 if (rv < 0)
2641 return rv;
2642
2643 /* Allocate console buffer (one time only) */
2644 if (c->buf == NULL) {
2645 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2646 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2647 if (c->buf == NULL)
2648 return -ENOMEM;
2649 }
2650
2651 idx = le32_to_cpu(c->log_le.idx);
2652
2653 /* Protect against corrupt value */
2654 if (idx > c->bufsize)
2655 return -EBADE;
2656
2657 /* Skip reading the console buffer if the index pointer
2658 has not moved */
2659 if (idx == c->last)
2660 return 0;
2661
2662 /* Read the console buffer */
2663 addr = le32_to_cpu(c->log_le.buf);
2664 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2665 if (rv < 0)
2666 return rv;
2667
2668 while (c->last != idx) {
2669 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2670 if (c->last == idx) {
2671 /* This would output a partial line.
2672 * Instead, back up
2673 * the buffer pointer and output this
2674 * line next time around.
2675 */
2676 if (c->last >= n)
2677 c->last -= n;
2678 else
2679 c->last = c->bufsize - n;
2680 goto break2;
2681 }
2682 ch = c->buf[c->last];
2683 c->last = (c->last + 1) % c->bufsize;
2684 if (ch == '\n')
2685 break;
2686 line[n] = ch;
2687 }
2688
2689 if (n > 0) {
2690 if (line[n - 1] == '\r')
2691 n--;
2692 line[n] = 0;
2693 pr_debug("CONSOLE: %s\n", line);
2694 }
2695 }
2696 break2:
2697
2698 return 0;
2699 }
2700 #endif /* DEBUG */
2701
2702 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2703 {
2704 int i;
2705 int ret;
2706
2707 bus->ctrl_frame_stat = false;
2708 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2709 SDIO_FUNC_2, F2SYNC, frame, len);
2710
2711 if (ret < 0) {
2712 /* On failure, abort the command and terminate the frame */
2713 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2714 ret);
2715 bus->sdcnt.tx_sderrs++;
2716
2717 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2718
2719 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2720 SFC_WF_TERM, NULL);
2721 bus->sdcnt.f1regdata++;
2722
2723 for (i = 0; i < 3; i++) {
2724 u8 hi, lo;
2725 hi = brcmf_sdio_regrb(bus->sdiodev,
2726 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2727 lo = brcmf_sdio_regrb(bus->sdiodev,
2728 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2729 bus->sdcnt.f1regdata += 2;
2730 if (hi == 0 && lo == 0)
2731 break;
2732 }
2733 return ret;
2734 }
2735
2736 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2737
2738 return ret;
2739 }
2740
2741 static int
2742 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2743 {
2744 u8 *frame;
2745 u16 len, pad;
2746 uint retries = 0;
2747 u8 doff = 0;
2748 int ret = -1;
2749 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2750 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2751 struct brcmf_sdio *bus = sdiodev->bus;
2752 struct brcmf_sdio_hdrinfo hd_info = {0};
2753
2754 brcmf_dbg(TRACE, "Enter\n");
2755
2756 /* Back the pointer to make a room for bus header */
2757 frame = msg - bus->tx_hdrlen;
2758 len = (msglen += bus->tx_hdrlen);
2759
2760 /* Add alignment padding (optional for ctl frames) */
2761 doff = ((unsigned long)frame % bus->head_align);
2762 if (doff) {
2763 frame -= doff;
2764 len += doff;
2765 msglen += doff;
2766 memset(frame, 0, doff + bus->tx_hdrlen);
2767 }
2768 /* precondition: doff < bus->head_align */
2769 doff += bus->tx_hdrlen;
2770
2771 /* Round send length to next SDIO block */
2772 pad = 0;
2773 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2774 pad = bus->blocksize - (len % bus->blocksize);
2775 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2776 pad = 0;
2777 } else if (len % bus->head_align) {
2778 pad = bus->head_align - (len % bus->head_align);
2779 }
2780 len += pad;
2781
2782 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2783
2784 /* Make sure backplane clock is on */
2785 sdio_claim_host(bus->sdiodev->func[1]);
2786 brcmf_sdbrcm_bus_sleep(bus, false, false);
2787 sdio_release_host(bus->sdiodev->func[1]);
2788
2789 hd_info.len = (u16)msglen;
2790 hd_info.channel = SDPCM_CONTROL_CHANNEL;
2791 hd_info.dat_offset = doff;
2792 hd_info.seq_num = bus->tx_seq;
2793 hd_info.lastfrm = true;
2794 hd_info.tail_pad = pad;
2795 brcmf_sdio_hdpack(bus, frame, &hd_info);
2796
2797 if (bus->txglom)
2798 brcmf_sdio_update_hwhdr(frame, len);
2799
2800 if (!data_ok(bus)) {
2801 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2802 bus->tx_max, bus->tx_seq);
2803 bus->ctrl_frame_stat = true;
2804 /* Send from dpc */
2805 bus->ctrl_frame_buf = frame;
2806 bus->ctrl_frame_len = len;
2807
2808 wait_event_interruptible_timeout(bus->ctrl_wait,
2809 !bus->ctrl_frame_stat,
2810 msecs_to_jiffies(2000));
2811
2812 if (!bus->ctrl_frame_stat) {
2813 brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2814 ret = 0;
2815 } else {
2816 brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2817 ret = -1;
2818 }
2819 }
2820
2821 if (ret == -1) {
2822 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2823 frame, len, "Tx Frame:\n");
2824 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2825 BRCMF_HDRS_ON(),
2826 frame, min_t(u16, len, 16), "TxHdr:\n");
2827
2828 do {
2829 sdio_claim_host(bus->sdiodev->func[1]);
2830 ret = brcmf_tx_frame(bus, frame, len);
2831 sdio_release_host(bus->sdiodev->func[1]);
2832 } while (ret < 0 && retries++ < TXRETRIES);
2833 }
2834
2835 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2836 atomic_read(&bus->dpc_tskcnt) == 0) {
2837 bus->activity = false;
2838 sdio_claim_host(bus->sdiodev->func[1]);
2839 brcmf_dbg(INFO, "idle\n");
2840 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2841 sdio_release_host(bus->sdiodev->func[1]);
2842 }
2843
2844 if (ret)
2845 bus->sdcnt.tx_ctlerrs++;
2846 else
2847 bus->sdcnt.tx_ctlpkts++;
2848
2849 return ret ? -EIO : 0;
2850 }
2851
2852 #ifdef DEBUG
2853 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2854 {
2855 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2856 }
2857
2858 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2859 struct sdpcm_shared *sh)
2860 {
2861 u32 addr;
2862 int rv;
2863 u32 shaddr = 0;
2864 struct sdpcm_shared_le sh_le;
2865 __le32 addr_le;
2866
2867 shaddr = bus->ci->rambase + bus->ramsize - 4;
2868
2869 /*
2870 * Read last word in socram to determine
2871 * address of sdpcm_shared structure
2872 */
2873 sdio_claim_host(bus->sdiodev->func[1]);
2874 brcmf_sdbrcm_bus_sleep(bus, false, false);
2875 rv = brcmf_sdio_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2876 sdio_release_host(bus->sdiodev->func[1]);
2877 if (rv < 0)
2878 return rv;
2879
2880 addr = le32_to_cpu(addr_le);
2881
2882 brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2883
2884 /*
2885 * Check if addr is valid.
2886 * NVRAM length at the end of memory should have been overwritten.
2887 */
2888 if (!brcmf_sdio_valid_shared_address(addr)) {
2889 brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2890 addr);
2891 return -EINVAL;
2892 }
2893
2894 /* Read hndrte_shared structure */
2895 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2896 sizeof(struct sdpcm_shared_le));
2897 if (rv < 0)
2898 return rv;
2899
2900 /* Endianness */
2901 sh->flags = le32_to_cpu(sh_le.flags);
2902 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2903 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2904 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2905 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2906 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2907 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2908
2909 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2910 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2911 SDPCM_SHARED_VERSION,
2912 sh->flags & SDPCM_SHARED_VERSION_MASK);
2913 return -EPROTO;
2914 }
2915
2916 return 0;
2917 }
2918
2919 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2920 struct sdpcm_shared *sh, char __user *data,
2921 size_t count)
2922 {
2923 u32 addr, console_ptr, console_size, console_index;
2924 char *conbuf = NULL;
2925 __le32 sh_val;
2926 int rv;
2927 loff_t pos = 0;
2928 int nbytes = 0;
2929
2930 /* obtain console information from device memory */
2931 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2932 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2933 (u8 *)&sh_val, sizeof(u32));
2934 if (rv < 0)
2935 return rv;
2936 console_ptr = le32_to_cpu(sh_val);
2937
2938 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2939 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2940 (u8 *)&sh_val, sizeof(u32));
2941 if (rv < 0)
2942 return rv;
2943 console_size = le32_to_cpu(sh_val);
2944
2945 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2946 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2947 (u8 *)&sh_val, sizeof(u32));
2948 if (rv < 0)
2949 return rv;
2950 console_index = le32_to_cpu(sh_val);
2951
2952 /* allocate buffer for console data */
2953 if (console_size <= CONSOLE_BUFFER_MAX)
2954 conbuf = vzalloc(console_size+1);
2955
2956 if (!conbuf)
2957 return -ENOMEM;
2958
2959 /* obtain the console data from device */
2960 conbuf[console_size] = '\0';
2961 rv = brcmf_sdio_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2962 console_size);
2963 if (rv < 0)
2964 goto done;
2965
2966 rv = simple_read_from_buffer(data, count, &pos,
2967 conbuf + console_index,
2968 console_size - console_index);
2969 if (rv < 0)
2970 goto done;
2971
2972 nbytes = rv;
2973 if (console_index > 0) {
2974 pos = 0;
2975 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2976 conbuf, console_index - 1);
2977 if (rv < 0)
2978 goto done;
2979 rv += nbytes;
2980 }
2981 done:
2982 vfree(conbuf);
2983 return rv;
2984 }
2985
2986 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2987 char __user *data, size_t count)
2988 {
2989 int error, res;
2990 char buf[350];
2991 struct brcmf_trap_info tr;
2992 loff_t pos = 0;
2993
2994 if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2995 brcmf_dbg(INFO, "no trap in firmware\n");
2996 return 0;
2997 }
2998
2999 error = brcmf_sdio_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
3000 sizeof(struct brcmf_trap_info));
3001 if (error < 0)
3002 return error;
3003
3004 res = scnprintf(buf, sizeof(buf),
3005 "dongle trap info: type 0x%x @ epc 0x%08x\n"
3006 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3007 " lr 0x%08x pc 0x%08x offset 0x%x\n"
3008 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
3009 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
3010 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3011 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3012 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3013 le32_to_cpu(tr.pc), sh->trap_addr,
3014 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3015 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3016 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3017 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3018
3019 return simple_read_from_buffer(data, count, &pos, buf, res);
3020 }
3021
3022 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3023 struct sdpcm_shared *sh, char __user *data,
3024 size_t count)
3025 {
3026 int error = 0;
3027 char buf[200];
3028 char file[80] = "?";
3029 char expr[80] = "<???>";
3030 int res;
3031 loff_t pos = 0;
3032
3033 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3034 brcmf_dbg(INFO, "firmware not built with -assert\n");
3035 return 0;
3036 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3037 brcmf_dbg(INFO, "no assert in dongle\n");
3038 return 0;
3039 }
3040
3041 sdio_claim_host(bus->sdiodev->func[1]);
3042 if (sh->assert_file_addr != 0) {
3043 error = brcmf_sdio_ramrw(bus->sdiodev, false,
3044 sh->assert_file_addr, (u8 *)file, 80);
3045 if (error < 0)
3046 return error;
3047 }
3048 if (sh->assert_exp_addr != 0) {
3049 error = brcmf_sdio_ramrw(bus->sdiodev, false,
3050 sh->assert_exp_addr, (u8 *)expr, 80);
3051 if (error < 0)
3052 return error;
3053 }
3054 sdio_release_host(bus->sdiodev->func[1]);
3055
3056 res = scnprintf(buf, sizeof(buf),
3057 "dongle assert: %s:%d: assert(%s)\n",
3058 file, sh->assert_line, expr);
3059 return simple_read_from_buffer(data, count, &pos, buf, res);
3060 }
3061
3062 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3063 {
3064 int error;
3065 struct sdpcm_shared sh;
3066
3067 error = brcmf_sdio_readshared(bus, &sh);
3068
3069 if (error < 0)
3070 return error;
3071
3072 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3073 brcmf_dbg(INFO, "firmware not built with -assert\n");
3074 else if (sh.flags & SDPCM_SHARED_ASSERT)
3075 brcmf_err("assertion in dongle\n");
3076
3077 if (sh.flags & SDPCM_SHARED_TRAP)
3078 brcmf_err("firmware trap in dongle\n");
3079
3080 return 0;
3081 }
3082
3083 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
3084 size_t count, loff_t *ppos)
3085 {
3086 int error = 0;
3087 struct sdpcm_shared sh;
3088 int nbytes = 0;
3089 loff_t pos = *ppos;
3090
3091 if (pos != 0)
3092 return 0;
3093
3094 error = brcmf_sdio_readshared(bus, &sh);
3095 if (error < 0)
3096 goto done;
3097
3098 error = brcmf_sdio_assert_info(bus, &sh, data, count);
3099 if (error < 0)
3100 goto done;
3101 nbytes = error;
3102
3103 error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3104 if (error < 0)
3105 goto done;
3106 nbytes += error;
3107
3108 error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3109 if (error < 0)
3110 goto done;
3111 nbytes += error;
3112
3113 error = nbytes;
3114 *ppos += nbytes;
3115 done:
3116 return error;
3117 }
3118
3119 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3120 size_t count, loff_t *ppos)
3121 {
3122 struct brcmf_sdio *bus = f->private_data;
3123 int res;
3124
3125 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
3126 if (res > 0)
3127 *ppos += res;
3128 return (ssize_t)res;
3129 }
3130
3131 static const struct file_operations brcmf_sdio_forensic_ops = {
3132 .owner = THIS_MODULE,
3133 .open = simple_open,
3134 .read = brcmf_sdio_forensic_read
3135 };
3136
3137 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3138 {
3139 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3140 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3141
3142 if (IS_ERR_OR_NULL(dentry))
3143 return;
3144
3145 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3146 &brcmf_sdio_forensic_ops);
3147 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3148 }
3149 #else
3150 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3151 {
3152 return 0;
3153 }
3154
3155 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3156 {
3157 }
3158 #endif /* DEBUG */
3159
3160 static int
3161 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3162 {
3163 int timeleft;
3164 uint rxlen = 0;
3165 bool pending;
3166 u8 *buf;
3167 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3168 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3169 struct brcmf_sdio *bus = sdiodev->bus;
3170
3171 brcmf_dbg(TRACE, "Enter\n");
3172
3173 /* Wait until control frame is available */
3174 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3175
3176 spin_lock_bh(&bus->rxctl_lock);
3177 rxlen = bus->rxlen;
3178 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3179 bus->rxctl = NULL;
3180 buf = bus->rxctl_orig;
3181 bus->rxctl_orig = NULL;
3182 bus->rxlen = 0;
3183 spin_unlock_bh(&bus->rxctl_lock);
3184 vfree(buf);
3185
3186 if (rxlen) {
3187 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3188 rxlen, msglen);
3189 } else if (timeleft == 0) {
3190 brcmf_err("resumed on timeout\n");
3191 brcmf_sdbrcm_checkdied(bus);
3192 } else if (pending) {
3193 brcmf_dbg(CTL, "cancelled\n");
3194 return -ERESTARTSYS;
3195 } else {
3196 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3197 brcmf_sdbrcm_checkdied(bus);
3198 }
3199
3200 if (rxlen)
3201 bus->sdcnt.rx_ctlpkts++;
3202 else
3203 bus->sdcnt.rx_ctlerrs++;
3204
3205 return rxlen ? (int)rxlen : -ETIMEDOUT;
3206 }
3207
3208 static bool brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3209 {
3210 struct chip_info *ci = bus->ci;
3211
3212 /* To enter download state, disable ARM and reset SOCRAM.
3213 * To exit download state, simply reset ARM (default is RAM boot).
3214 */
3215 if (enter) {
3216 bus->alp_only = true;
3217
3218 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
3219 } else {
3220 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci, bus->vars,
3221 bus->varsz))
3222 return false;
3223
3224 /* Allow HT Clock now that the ARM is running. */
3225 bus->alp_only = false;
3226
3227 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3228 }
3229
3230 return true;
3231 }
3232
3233 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3234 {
3235 const struct firmware *fw;
3236 int err;
3237 int offset;
3238 int address;
3239 int len;
3240
3241 fw = brcmf_sdbrcm_get_fw(bus, BRCMF_FIRMWARE_BIN);
3242 if (fw == NULL)
3243 return -ENOENT;
3244
3245 if (brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4) !=
3246 BRCMF_MAX_CORENUM)
3247 memcpy(&bus->ci->rst_vec, fw->data, sizeof(bus->ci->rst_vec));
3248
3249 err = 0;
3250 offset = 0;
3251 address = bus->ci->rambase;
3252 while (offset < fw->size) {
3253 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3254 fw->size - offset;
3255 err = brcmf_sdio_ramrw(bus->sdiodev, true, address,
3256 (u8 *)&fw->data[offset], len);
3257 if (err) {
3258 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3259 err, len, address);
3260 goto failure;
3261 }
3262 offset += len;
3263 address += len;
3264 }
3265
3266 failure:
3267 release_firmware(fw);
3268
3269 return err;
3270 }
3271
3272 /*
3273 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3274 * and ending in a NUL.
3275 * Removes carriage returns, empty lines, comment lines, and converts
3276 * newlines to NULs.
3277 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3278 * by two NULs.
3279 */
3280
3281 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus,
3282 const struct firmware *nv)
3283 {
3284 char *varbuf;
3285 char *dp;
3286 bool findNewline;
3287 int column;
3288 int ret = 0;
3289 uint buf_len, n, len;
3290
3291 len = nv->size;
3292 varbuf = vmalloc(len);
3293 if (!varbuf)
3294 return -ENOMEM;
3295
3296 memcpy(varbuf, nv->data, len);
3297 dp = varbuf;
3298
3299 findNewline = false;
3300 column = 0;
3301
3302 for (n = 0; n < len; n++) {
3303 if (varbuf[n] == 0)
3304 break;
3305 if (varbuf[n] == '\r')
3306 continue;
3307 if (findNewline && varbuf[n] != '\n')
3308 continue;
3309 findNewline = false;
3310 if (varbuf[n] == '#') {
3311 findNewline = true;
3312 continue;
3313 }
3314 if (varbuf[n] == '\n') {
3315 if (column == 0)
3316 continue;
3317 *dp++ = 0;
3318 column = 0;
3319 continue;
3320 }
3321 *dp++ = varbuf[n];
3322 column++;
3323 }
3324 buf_len = dp - varbuf;
3325 while (dp < varbuf + n)
3326 *dp++ = 0;
3327
3328 kfree(bus->vars);
3329 /* roundup needed for download to device */
3330 bus->varsz = roundup(buf_len + 1, 4);
3331 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3332 if (bus->vars == NULL) {
3333 bus->varsz = 0;
3334 ret = -ENOMEM;
3335 goto err;
3336 }
3337
3338 /* copy the processed variables and add null termination */
3339 memcpy(bus->vars, varbuf, buf_len);
3340 bus->vars[buf_len] = 0;
3341 err:
3342 vfree(varbuf);
3343 return ret;
3344 }
3345
3346 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3347 {
3348 const struct firmware *nv;
3349 int ret;
3350
3351 nv = brcmf_sdbrcm_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3352 if (nv == NULL)
3353 return -ENOENT;
3354
3355 ret = brcmf_process_nvram_vars(bus, nv);
3356
3357 release_firmware(nv);
3358
3359 return ret;
3360 }
3361
3362 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3363 {
3364 int bcmerror = -1;
3365
3366 /* Keep arm in reset */
3367 if (!brcmf_sdbrcm_download_state(bus, true)) {
3368 brcmf_err("error placing ARM core in reset\n");
3369 goto err;
3370 }
3371
3372 if (brcmf_sdbrcm_download_code_file(bus)) {
3373 brcmf_err("dongle image file download failed\n");
3374 goto err;
3375 }
3376
3377 if (brcmf_sdbrcm_download_nvram(bus)) {
3378 brcmf_err("dongle nvram file download failed\n");
3379 goto err;
3380 }
3381
3382 /* Take arm out of reset */
3383 if (!brcmf_sdbrcm_download_state(bus, false)) {
3384 brcmf_err("error getting out of ARM core reset\n");
3385 goto err;
3386 }
3387
3388 bcmerror = 0;
3389
3390 err:
3391 return bcmerror;
3392 }
3393
3394 static bool brcmf_sdbrcm_sr_capable(struct brcmf_sdio *bus)
3395 {
3396 u32 addr, reg;
3397
3398 brcmf_dbg(TRACE, "Enter\n");
3399
3400 /* old chips with PMU version less than 17 don't support save restore */
3401 if (bus->ci->pmurev < 17)
3402 return false;
3403
3404 /* read PMU chipcontrol register 3*/
3405 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3406 brcmf_sdio_regwl(bus->sdiodev, addr, 3, NULL);
3407 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3408 reg = brcmf_sdio_regrl(bus->sdiodev, addr, NULL);
3409
3410 return (bool)reg;
3411 }
3412
3413 static void brcmf_sdbrcm_sr_init(struct brcmf_sdio *bus)
3414 {
3415 int err = 0;
3416 u8 val;
3417
3418 brcmf_dbg(TRACE, "Enter\n");
3419
3420 val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3421 &err);
3422 if (err) {
3423 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3424 return;
3425 }
3426
3427 val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3428 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3429 val, &err);
3430 if (err) {
3431 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3432 return;
3433 }
3434
3435 /* Add CMD14 Support */
3436 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3437 (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3438 SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3439 &err);
3440 if (err) {
3441 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3442 return;
3443 }
3444
3445 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3446 SBSDIO_FORCE_HT, &err);
3447 if (err) {
3448 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3449 return;
3450 }
3451
3452 /* set flag */
3453 bus->sr_enabled = true;
3454 brcmf_dbg(INFO, "SR enabled\n");
3455 }
3456
3457 /* enable KSO bit */
3458 static int brcmf_sdbrcm_kso_init(struct brcmf_sdio *bus)
3459 {
3460 u8 val;
3461 int err = 0;
3462
3463 brcmf_dbg(TRACE, "Enter\n");
3464
3465 /* KSO bit added in SDIO core rev 12 */
3466 if (bus->ci->c_inf[1].rev < 12)
3467 return 0;
3468
3469 val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3470 &err);
3471 if (err) {
3472 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3473 return err;
3474 }
3475
3476 if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3477 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3478 SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3479 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3480 val, &err);
3481 if (err) {
3482 brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3483 return err;
3484 }
3485 }
3486
3487 return 0;
3488 }
3489
3490
3491 static bool
3492 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3493 {
3494 bool ret;
3495
3496 sdio_claim_host(bus->sdiodev->func[1]);
3497
3498 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3499
3500 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3501
3502 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3503
3504 sdio_release_host(bus->sdiodev->func[1]);
3505
3506 return ret;
3507 }
3508
3509 static int brcmf_sdbrcm_bus_preinit(struct device *dev)
3510 {
3511 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3512 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3513 struct brcmf_sdio *bus = sdiodev->bus;
3514 uint pad_size;
3515 u32 value;
3516 u8 idx;
3517 int err;
3518
3519 /* the commands below use the terms tx and rx from
3520 * a device perspective, ie. bus:txglom affects the
3521 * bus transfers from device to host.
3522 */
3523 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3524 if (bus->ci->c_inf[idx].rev < 12) {
3525 /* for sdio core rev < 12, disable txgloming */
3526 value = 0;
3527 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3528 sizeof(u32));
3529 } else {
3530 /* otherwise, set txglomalign */
3531 value = 4;
3532 if (sdiodev->pdata)
3533 value = sdiodev->pdata->sd_sgentry_align;
3534 /* SDIO ADMA requires at least 32 bit alignment */
3535 value = max_t(u32, value, 4);
3536 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3537 sizeof(u32));
3538 }
3539
3540 if (err < 0)
3541 goto done;
3542
3543 bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3544 if (sdiodev->sg_support) {
3545 bus->txglom = false;
3546 value = 1;
3547 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3548 bus->txglom_sgpad = brcmu_pkt_buf_get_skb(pad_size);
3549 if (!bus->txglom_sgpad)
3550 brcmf_err("allocating txglom padding skb failed, reduced performance\n");
3551
3552 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3553 &value, sizeof(u32));
3554 if (err < 0) {
3555 /* bus:rxglom is allowed to fail */
3556 err = 0;
3557 } else {
3558 bus->txglom = true;
3559 bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3560 }
3561 }
3562 brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3563
3564 done:
3565 return err;
3566 }
3567
3568 static int brcmf_sdbrcm_bus_init(struct device *dev)
3569 {
3570 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3571 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3572 struct brcmf_sdio *bus = sdiodev->bus;
3573 unsigned long timeout;
3574 u8 ready, enable;
3575 int err, ret = 0;
3576 u8 saveclk;
3577
3578 brcmf_dbg(TRACE, "Enter\n");
3579
3580 /* try to download image and nvram to the dongle */
3581 if (bus_if->state == BRCMF_BUS_DOWN) {
3582 if (!(brcmf_sdbrcm_download_firmware(bus)))
3583 return -1;
3584 }
3585
3586 if (!bus->sdiodev->bus_if->drvr)
3587 return 0;
3588
3589 /* Start the watchdog timer */
3590 bus->sdcnt.tickcnt = 0;
3591 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3592
3593 sdio_claim_host(bus->sdiodev->func[1]);
3594
3595 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3596 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3597 if (bus->clkstate != CLK_AVAIL)
3598 goto exit;
3599
3600 /* Force clocks on backplane to be sure F2 interrupt propagates */
3601 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3602 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3603 if (!err) {
3604 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3605 (saveclk | SBSDIO_FORCE_HT), &err);
3606 }
3607 if (err) {
3608 brcmf_err("Failed to force clock for F2: err %d\n", err);
3609 goto exit;
3610 }
3611
3612 /* Enable function 2 (frame transfers) */
3613 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3614 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3615 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3616
3617 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3618
3619 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3620 ready = 0;
3621 while (enable != ready) {
3622 ready = brcmf_sdio_regrb(bus->sdiodev,
3623 SDIO_CCCR_IORx, NULL);
3624 if (time_after(jiffies, timeout))
3625 break;
3626 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3627 /* prevent busy waiting if it takes too long */
3628 msleep_interruptible(20);
3629 }
3630
3631 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3632
3633 /* If F2 successfully enabled, set core and enable interrupts */
3634 if (ready == enable) {
3635 /* Set up the interrupt mask and enable interrupts */
3636 bus->hostintmask = HOSTINTMASK;
3637 w_sdreg32(bus, bus->hostintmask,
3638 offsetof(struct sdpcmd_regs, hostintmask));
3639
3640 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3641 } else {
3642 /* Disable F2 again */
3643 enable = SDIO_FUNC_ENABLE_1;
3644 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3645 ret = -ENODEV;
3646 }
3647
3648 if (brcmf_sdbrcm_sr_capable(bus)) {
3649 brcmf_sdbrcm_sr_init(bus);
3650 } else {
3651 /* Restore previous clock setting */
3652 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3653 saveclk, &err);
3654 }
3655
3656 if (ret == 0) {
3657 ret = brcmf_sdio_intr_register(bus->sdiodev);
3658 if (ret != 0)
3659 brcmf_err("intr register failed:%d\n", ret);
3660 }
3661
3662 /* If we didn't come up, turn off backplane clock */
3663 if (bus_if->state != BRCMF_BUS_DATA)
3664 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3665
3666 exit:
3667 sdio_release_host(bus->sdiodev->func[1]);
3668
3669 return ret;
3670 }
3671
3672 void brcmf_sdbrcm_isr(void *arg)
3673 {
3674 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3675
3676 brcmf_dbg(TRACE, "Enter\n");
3677
3678 if (!bus) {
3679 brcmf_err("bus is null pointer, exiting\n");
3680 return;
3681 }
3682
3683 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3684 brcmf_err("bus is down. we have nothing to do\n");
3685 return;
3686 }
3687 /* Count the interrupt call */
3688 bus->sdcnt.intrcount++;
3689 if (in_interrupt())
3690 atomic_set(&bus->ipend, 1);
3691 else
3692 if (brcmf_sdio_intr_rstatus(bus)) {
3693 brcmf_err("failed backplane access\n");
3694 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3695 }
3696
3697 /* Disable additional interrupts (is this needed now)? */
3698 if (!bus->intr)
3699 brcmf_err("isr w/o interrupt configured!\n");
3700
3701 atomic_inc(&bus->dpc_tskcnt);
3702 queue_work(bus->brcmf_wq, &bus->datawork);
3703 }
3704
3705 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3706 {
3707 #ifdef DEBUG
3708 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3709 #endif /* DEBUG */
3710
3711 brcmf_dbg(TIMER, "Enter\n");
3712
3713 /* Poll period: check device if appropriate. */
3714 if (!bus->sr_enabled &&
3715 bus->poll && (++bus->polltick >= bus->pollrate)) {
3716 u32 intstatus = 0;
3717
3718 /* Reset poll tick */
3719 bus->polltick = 0;
3720
3721 /* Check device if no interrupts */
3722 if (!bus->intr ||
3723 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3724
3725 if (atomic_read(&bus->dpc_tskcnt) == 0) {
3726 u8 devpend;
3727
3728 sdio_claim_host(bus->sdiodev->func[1]);
3729 devpend = brcmf_sdio_regrb(bus->sdiodev,
3730 SDIO_CCCR_INTx,
3731 NULL);
3732 sdio_release_host(bus->sdiodev->func[1]);
3733 intstatus =
3734 devpend & (INTR_STATUS_FUNC1 |
3735 INTR_STATUS_FUNC2);
3736 }
3737
3738 /* If there is something, make like the ISR and
3739 schedule the DPC */
3740 if (intstatus) {
3741 bus->sdcnt.pollcnt++;
3742 atomic_set(&bus->ipend, 1);
3743
3744 atomic_inc(&bus->dpc_tskcnt);
3745 queue_work(bus->brcmf_wq, &bus->datawork);
3746 }
3747 }
3748
3749 /* Update interrupt tracking */
3750 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3751 }
3752 #ifdef DEBUG
3753 /* Poll for console output periodically */
3754 if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3755 bus->console_interval != 0) {
3756 bus->console.count += BRCMF_WD_POLL_MS;
3757 if (bus->console.count >= bus->console_interval) {
3758 bus->console.count -= bus->console_interval;
3759 sdio_claim_host(bus->sdiodev->func[1]);
3760 /* Make sure backplane clock is on */
3761 brcmf_sdbrcm_bus_sleep(bus, false, false);
3762 if (brcmf_sdbrcm_readconsole(bus) < 0)
3763 /* stop on error */
3764 bus->console_interval = 0;
3765 sdio_release_host(bus->sdiodev->func[1]);
3766 }
3767 }
3768 #endif /* DEBUG */
3769
3770 /* On idle timeout clear activity flag and/or turn off clock */
3771 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3772 if (++bus->idlecount >= bus->idletime) {
3773 bus->idlecount = 0;
3774 if (bus->activity) {
3775 bus->activity = false;
3776 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3777 } else {
3778 brcmf_dbg(SDIO, "idle\n");
3779 sdio_claim_host(bus->sdiodev->func[1]);
3780 brcmf_sdbrcm_bus_sleep(bus, true, false);
3781 sdio_release_host(bus->sdiodev->func[1]);
3782 }
3783 }
3784 }
3785
3786 return (atomic_read(&bus->ipend) > 0);
3787 }
3788
3789 static void brcmf_sdio_dataworker(struct work_struct *work)
3790 {
3791 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3792 datawork);
3793
3794 while (atomic_read(&bus->dpc_tskcnt)) {
3795 brcmf_sdbrcm_dpc(bus);
3796 atomic_dec(&bus->dpc_tskcnt);
3797 }
3798 }
3799
3800 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3801 {
3802 brcmf_dbg(TRACE, "Enter\n");
3803
3804 kfree(bus->rxbuf);
3805 bus->rxctl = bus->rxbuf = NULL;
3806 bus->rxlen = 0;
3807 }
3808
3809 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3810 {
3811 brcmf_dbg(TRACE, "Enter\n");
3812
3813 if (bus->sdiodev->bus_if->maxctl) {
3814 bus->rxblen =
3815 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3816 ALIGNMENT) + bus->head_align;
3817 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3818 if (!(bus->rxbuf))
3819 return false;
3820 }
3821
3822 return true;
3823 }
3824
3825 static bool
3826 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3827 {
3828 u8 clkctl = 0;
3829 int err = 0;
3830 int reg_addr;
3831 u32 reg_val;
3832 u32 drivestrength;
3833
3834 bus->alp_only = true;
3835
3836 sdio_claim_host(bus->sdiodev->func[1]);
3837
3838 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3839 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3840
3841 /*
3842 * Force PLL off until brcmf_sdio_chip_attach()
3843 * programs PLL control regs
3844 */
3845
3846 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3847 BRCMF_INIT_CLKCTL1, &err);
3848 if (!err)
3849 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3850 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3851
3852 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3853 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3854 err, BRCMF_INIT_CLKCTL1, clkctl);
3855 goto fail;
3856 }
3857
3858 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3859 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3860 goto fail;
3861 }
3862
3863 if (brcmf_sdbrcm_kso_init(bus)) {
3864 brcmf_err("error enabling KSO\n");
3865 goto fail;
3866 }
3867
3868 if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3869 drivestrength = bus->sdiodev->pdata->drive_strength;
3870 else
3871 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3872 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3873
3874 /* Get info on the SOCRAM cores... */
3875 bus->ramsize = bus->ci->ramsize;
3876 if (!(bus->ramsize)) {
3877 brcmf_err("failed to find SOCRAM memory!\n");
3878 goto fail;
3879 }
3880
3881 /* Set card control so an SDIO card reset does a WLAN backplane reset */
3882 reg_val = brcmf_sdio_regrb(bus->sdiodev,
3883 SDIO_CCCR_BRCM_CARDCTRL, &err);
3884 if (err)
3885 goto fail;
3886
3887 reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3888
3889 brcmf_sdio_regwb(bus->sdiodev,
3890 SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3891 if (err)
3892 goto fail;
3893
3894 /* set PMUControl so a backplane reset does PMU state reload */
3895 reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3896 pmucontrol);
3897 reg_val = brcmf_sdio_regrl(bus->sdiodev,
3898 reg_addr,
3899 &err);
3900 if (err)
3901 goto fail;
3902
3903 reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3904
3905 brcmf_sdio_regwl(bus->sdiodev,
3906 reg_addr,
3907 reg_val,
3908 &err);
3909 if (err)
3910 goto fail;
3911
3912
3913 sdio_release_host(bus->sdiodev->func[1]);
3914
3915 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3916
3917 /* allocate header buffer */
3918 bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3919 if (!bus->hdrbuf)
3920 return false;
3921 /* Locate an appropriately-aligned portion of hdrbuf */
3922 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3923 bus->head_align);
3924
3925 /* Set the poll and/or interrupt flags */
3926 bus->intr = true;
3927 bus->poll = false;
3928 if (bus->poll)
3929 bus->pollrate = 1;
3930
3931 return true;
3932
3933 fail:
3934 sdio_release_host(bus->sdiodev->func[1]);
3935 return false;
3936 }
3937
3938 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3939 {
3940 brcmf_dbg(TRACE, "Enter\n");
3941
3942 sdio_claim_host(bus->sdiodev->func[1]);
3943
3944 /* Disable F2 to clear any intermediate frame state on the dongle */
3945 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3946 SDIO_FUNC_ENABLE_1, NULL);
3947
3948 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3949 bus->rxflow = false;
3950
3951 /* Done with backplane-dependent accesses, can drop clock... */
3952 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3953
3954 sdio_release_host(bus->sdiodev->func[1]);
3955
3956 /* ...and initialize clock/power states */
3957 bus->clkstate = CLK_SDONLY;
3958 bus->idletime = BRCMF_IDLE_INTERVAL;
3959 bus->idleclock = BRCMF_IDLE_ACTIVE;
3960
3961 /* Query the F2 block size, set roundup accordingly */
3962 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3963 bus->roundup = min(max_roundup, bus->blocksize);
3964
3965 /* SR state */
3966 bus->sleeping = false;
3967 bus->sr_enabled = false;
3968
3969 return true;
3970 }
3971
3972 static int
3973 brcmf_sdbrcm_watchdog_thread(void *data)
3974 {
3975 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3976
3977 allow_signal(SIGTERM);
3978 /* Run until signal received */
3979 while (1) {
3980 if (kthread_should_stop())
3981 break;
3982 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3983 brcmf_sdbrcm_bus_watchdog(bus);
3984 /* Count the tick for reference */
3985 bus->sdcnt.tickcnt++;
3986 } else
3987 break;
3988 }
3989 return 0;
3990 }
3991
3992 static void
3993 brcmf_sdbrcm_watchdog(unsigned long data)
3994 {
3995 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3996
3997 if (bus->watchdog_tsk) {
3998 complete(&bus->watchdog_wait);
3999 /* Reschedule the watchdog */
4000 if (bus->wd_timer_valid)
4001 mod_timer(&bus->timer,
4002 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4003 }
4004 }
4005
4006 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
4007 {
4008 brcmf_dbg(TRACE, "Enter\n");
4009
4010 if (bus->ci) {
4011 sdio_claim_host(bus->sdiodev->func[1]);
4012 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
4013 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
4014 sdio_release_host(bus->sdiodev->func[1]);
4015 brcmf_sdio_chip_detach(&bus->ci);
4016 if (bus->vars && bus->varsz)
4017 kfree(bus->vars);
4018 bus->vars = NULL;
4019 }
4020
4021 brcmf_dbg(TRACE, "Disconnected\n");
4022 }
4023
4024 /* Detach and free everything */
4025 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
4026 {
4027 brcmf_dbg(TRACE, "Enter\n");
4028
4029 if (bus) {
4030 /* De-register interrupt handler */
4031 brcmf_sdio_intr_unregister(bus->sdiodev);
4032
4033 cancel_work_sync(&bus->datawork);
4034 if (bus->brcmf_wq)
4035 destroy_workqueue(bus->brcmf_wq);
4036
4037 if (bus->sdiodev->bus_if->drvr) {
4038 brcmf_detach(bus->sdiodev->dev);
4039 brcmf_sdbrcm_release_dongle(bus);
4040 }
4041
4042 brcmu_pkt_buf_free_skb(bus->txglom_sgpad);
4043 brcmf_sdbrcm_release_malloc(bus);
4044 kfree(bus->hdrbuf);
4045 kfree(bus);
4046 }
4047
4048 brcmf_dbg(TRACE, "Disconnected\n");
4049 }
4050
4051 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
4052 .stop = brcmf_sdbrcm_bus_stop,
4053 .preinit = brcmf_sdbrcm_bus_preinit,
4054 .init = brcmf_sdbrcm_bus_init,
4055 .txdata = brcmf_sdbrcm_bus_txdata,
4056 .txctl = brcmf_sdbrcm_bus_txctl,
4057 .rxctl = brcmf_sdbrcm_bus_rxctl,
4058 .gettxq = brcmf_sdbrcm_bus_gettxq,
4059 };
4060
4061 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
4062 {
4063 int ret;
4064 struct brcmf_sdio *bus;
4065
4066 brcmf_dbg(TRACE, "Enter\n");
4067
4068 /* We make an assumption about address window mappings:
4069 * regsva == SI_ENUM_BASE*/
4070
4071 /* Allocate private bus interface state */
4072 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4073 if (!bus)
4074 goto fail;
4075
4076 bus->sdiodev = sdiodev;
4077 sdiodev->bus = bus;
4078 skb_queue_head_init(&bus->glom);
4079 bus->txbound = BRCMF_TXBOUND;
4080 bus->rxbound = BRCMF_RXBOUND;
4081 bus->txminmax = BRCMF_TXMINMAX;
4082 bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4083
4084 /* platform specific configuration:
4085 * alignments must be at least 4 bytes for ADMA
4086 */
4087 bus->head_align = ALIGNMENT;
4088 bus->sgentry_align = ALIGNMENT;
4089 if (sdiodev->pdata) {
4090 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
4091 bus->head_align = sdiodev->pdata->sd_head_align;
4092 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
4093 bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
4094 }
4095
4096 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4097 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
4098 if (bus->brcmf_wq == NULL) {
4099 brcmf_err("insufficient memory to create txworkqueue\n");
4100 goto fail;
4101 }
4102
4103 /* attempt to attach to the dongle */
4104 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
4105 brcmf_err("brcmf_sdbrcm_probe_attach failed\n");
4106 goto fail;
4107 }
4108
4109 spin_lock_init(&bus->rxctl_lock);
4110 spin_lock_init(&bus->txqlock);
4111 init_waitqueue_head(&bus->ctrl_wait);
4112 init_waitqueue_head(&bus->dcmd_resp_wait);
4113
4114 /* Set up the watchdog timer */
4115 init_timer(&bus->timer);
4116 bus->timer.data = (unsigned long)bus;
4117 bus->timer.function = brcmf_sdbrcm_watchdog;
4118
4119 /* Initialize watchdog thread */
4120 init_completion(&bus->watchdog_wait);
4121 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
4122 bus, "brcmf_watchdog");
4123 if (IS_ERR(bus->watchdog_tsk)) {
4124 pr_warn("brcmf_watchdog thread failed to start\n");
4125 bus->watchdog_tsk = NULL;
4126 }
4127 /* Initialize DPC thread */
4128 atomic_set(&bus->dpc_tskcnt, 0);
4129
4130 /* Assign bus interface call back */
4131 bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4132 bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4133 bus->sdiodev->bus_if->chip = bus->ci->chip;
4134 bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4135
4136 /* default sdio bus header length for tx packet */
4137 bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4138
4139 /* Attach to the common layer, reserve hdr space */
4140 ret = brcmf_attach(bus->sdiodev->dev);
4141 if (ret != 0) {
4142 brcmf_err("brcmf_attach failed\n");
4143 goto fail;
4144 }
4145
4146 /* Allocate buffers */
4147 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
4148 brcmf_err("brcmf_sdbrcm_probe_malloc failed\n");
4149 goto fail;
4150 }
4151
4152 if (!(brcmf_sdbrcm_probe_init(bus))) {
4153 brcmf_err("brcmf_sdbrcm_probe_init failed\n");
4154 goto fail;
4155 }
4156
4157 brcmf_sdio_debugfs_create(bus);
4158 brcmf_dbg(INFO, "completed!!\n");
4159
4160 /* if firmware path present try to download and bring up bus */
4161 ret = brcmf_bus_start(bus->sdiodev->dev);
4162 if (ret != 0) {
4163 brcmf_err("dongle is not responding\n");
4164 goto fail;
4165 }
4166
4167 return bus;
4168
4169 fail:
4170 brcmf_sdbrcm_release(bus);
4171 return NULL;
4172 }
4173
4174 void brcmf_sdbrcm_disconnect(void *ptr)
4175 {
4176 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4177
4178 brcmf_dbg(TRACE, "Enter\n");
4179
4180 if (bus)
4181 brcmf_sdbrcm_release(bus);
4182
4183 brcmf_dbg(TRACE, "Disconnected\n");
4184 }
4185
4186 void
4187 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4188 {
4189 /* Totally stop the timer */
4190 if (!wdtick && bus->wd_timer_valid) {
4191 del_timer_sync(&bus->timer);
4192 bus->wd_timer_valid = false;
4193 bus->save_ms = wdtick;
4194 return;
4195 }
4196
4197 /* don't start the wd until fw is loaded */
4198 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4199 return;
4200
4201 if (wdtick) {
4202 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4203 if (bus->wd_timer_valid)
4204 /* Stop timer and restart at new value */
4205 del_timer_sync(&bus->timer);
4206
4207 /* Create timer again when watchdog period is
4208 dynamically changed or in the first instance
4209 */
4210 bus->timer.expires =
4211 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4212 add_timer(&bus->timer);
4213
4214 } else {
4215 /* Re arm the timer, at last watchdog period */
4216 mod_timer(&bus->timer,
4217 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4218 }
4219
4220 bus->wd_timer_valid = true;
4221 bus->save_ms = wdtick;
4222 }
4223 }
Linux kernel - Deliverables
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