2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/kthread.h>
22 #include <linux/printk.h>
23 #include <linux/pci_ids.h>
24 #include <linux/netdevice.h>
25 #include <linux/interrupt.h>
26 #include <linux/sched.h>
27 #include <linux/mmc/sdio.h>
28 #include <linux/mmc/sdio_func.h>
29 #include <linux/mmc/card.h>
30 #include <linux/semaphore.h>
31 #include <linux/firmware.h>
32 #include <linux/module.h>
33 #include <linux/bcma/bcma.h>
34 #include <asm/unaligned.h>
36 #include <brcmu_wifi.h>
37 #include <brcmu_utils.h>
38 #include <brcm_hw_ids.h>
40 #include "sdio_host.h"
41 #include "sdio_chip.h"
43 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
47 #define BRCMF_TRAP_INFO_SIZE 80
49 #define CBUF_LEN (128)
52 __le32 buf
; /* Can't be pointer on (64-bit) hosts */
55 char *_buf_compat
; /* Redundant pointer for backward compat. */
60 * When there is no UART (e.g. Quickturn),
61 * the host should write a complete
62 * input line directly into cbuf and then write
63 * the length into vcons_in.
64 * This may also be used when there is a real UART
65 * (at risk of conflicting with
66 * the real UART). vcons_out is currently unused.
71 /* Output (logging) buffer
72 * Console output is written to a ring buffer log_buf at index log_idx.
73 * The host may read the output when it sees log_idx advance.
74 * Output will be lost if the output wraps around faster than the host
77 struct rte_log_le log_le
;
79 /* Console input line buffer
80 * Characters are read one at a time into cbuf
81 * until <CR> is received, then
82 * the buffer is processed as a command line.
83 * Also used for virtual UART.
90 #include <chipcommon.h>
95 #define TXQLEN 2048 /* bulk tx queue length */
96 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
97 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
100 #define TXRETRIES 2 /* # of retries for tx frames */
102 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
105 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
108 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
110 #define MEMBLOCK 2048 /* Block size used for downloading
112 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
113 biggest possible glom */
115 #define BRCMF_FIRSTREAD (1 << 6)
118 /* SBSDIO_DEVICE_CTL */
120 /* 1: device will assert busy signal when receiving CMD53 */
121 #define SBSDIO_DEVCTL_SETBUSY 0x01
122 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
123 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
124 /* 1: mask all interrupts to host except the chipActive (rev 8) */
125 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
126 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
127 * sdio bus power cycle to clear (rev 9) */
128 #define SBSDIO_DEVCTL_PADS_ISO 0x08
129 /* Force SD->SB reset mapping (rev 11) */
130 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
131 /* Determined by CoreControl bit */
132 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
133 /* Force backplane reset */
134 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
135 /* Force no backplane reset */
136 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
138 /* direct(mapped) cis space */
140 /* MAPPED common CIS address */
141 #define SBSDIO_CIS_BASE_COMMON 0x1000
142 /* maximum bytes in one CIS */
143 #define SBSDIO_CIS_SIZE_LIMIT 0x200
144 /* cis offset addr is < 17 bits */
145 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
147 /* manfid tuple length, include tuple, link bytes */
148 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
151 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
152 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
153 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
154 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
155 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
156 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
157 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
158 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
159 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
160 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
161 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
162 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
163 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
164 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
165 #define I_PC (1 << 10) /* descriptor error */
166 #define I_PD (1 << 11) /* data error */
167 #define I_DE (1 << 12) /* Descriptor protocol Error */
168 #define I_RU (1 << 13) /* Receive descriptor Underflow */
169 #define I_RO (1 << 14) /* Receive fifo Overflow */
170 #define I_XU (1 << 15) /* Transmit fifo Underflow */
171 #define I_RI (1 << 16) /* Receive Interrupt */
172 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
173 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
174 #define I_XI (1 << 24) /* Transmit Interrupt */
175 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
176 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
177 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
178 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
179 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
180 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
181 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
182 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
183 #define I_DMA (I_RI | I_XI | I_ERRORS)
186 #define CC_CISRDY (1 << 0) /* CIS Ready */
187 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
188 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
189 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
190 #define CC_XMTDATAAVAIL_MODE (1 << 4)
191 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
194 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
195 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
196 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
197 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
200 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
202 /* Total length of frame header for dongle protocol */
203 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
204 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
207 * Software allocation of To SB Mailbox resources
210 /* tosbmailbox bits corresponding to intstatus bits */
211 #define SMB_NAK (1 << 0) /* Frame NAK */
212 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
213 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
214 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
216 /* tosbmailboxdata */
217 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
220 * Software allocation of To Host Mailbox resources
224 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
225 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
226 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
227 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
229 /* tohostmailboxdata */
230 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
231 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
232 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
233 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
235 #define HMB_DATA_FCDATA_MASK 0xff000000
236 #define HMB_DATA_FCDATA_SHIFT 24
238 #define HMB_DATA_VERSION_MASK 0x00ff0000
239 #define HMB_DATA_VERSION_SHIFT 16
242 * Software-defined protocol header
245 /* Current protocol version */
246 #define SDPCM_PROT_VERSION 4
248 /* SW frame header */
249 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
251 #define SDPCM_CHANNEL_MASK 0x00000f00
252 #define SDPCM_CHANNEL_SHIFT 8
253 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
255 #define SDPCM_NEXTLEN_OFFSET 2
257 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
258 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
259 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
260 #define SDPCM_DOFFSET_MASK 0xff000000
261 #define SDPCM_DOFFSET_SHIFT 24
262 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
263 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
264 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
265 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
267 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
269 /* logical channel numbers */
270 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
271 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
272 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
273 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
274 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
276 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
278 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
281 * Shared structure between dongle and the host.
282 * The structure contains pointers to trap or assert information.
284 #define SDPCM_SHARED_VERSION 0x0002
285 #define SDPCM_SHARED_VERSION_MASK 0x00FF
286 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
287 #define SDPCM_SHARED_ASSERT 0x0200
288 #define SDPCM_SHARED_TRAP 0x0400
290 /* Space for header read, limit for data packets */
291 #define MAX_HDR_READ (1 << 6)
292 #define MAX_RX_DATASZ 2048
294 /* Maximum milliseconds to wait for F2 to come up */
295 #define BRCMF_WAIT_F2RDY 3000
297 /* Bump up limit on waiting for HT to account for first startup;
298 * if the image is doing a CRC calculation before programming the PMU
299 * for HT availability, it could take a couple hundred ms more, so
300 * max out at a 1 second (1000000us).
302 #undef PMU_MAX_TRANSITION_DLY
303 #define PMU_MAX_TRANSITION_DLY 1000000
305 /* Value for ChipClockCSR during initial setup */
306 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
307 SBSDIO_ALP_AVAIL_REQ)
309 /* Flags for SDH calls */
310 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
312 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
313 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
314 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME
);
315 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME
);
317 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
318 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
321 #define BRCMF_IDLE_INTERVAL 1
324 * Conversion of 802.1D priority to precedence level
326 static uint
prio2prec(u32 prio
)
328 return (prio
== PRIO_8021D_NONE
|| prio
== PRIO_8021D_BE
) ?
334 u32 corecontrol
; /* 0x00, rev8 */
335 u32 corestatus
; /* rev8 */
337 u32 biststatus
; /* rev8 */
340 u16 pcmciamesportaladdr
; /* 0x010, rev8 */
342 u16 pcmciamesportalmask
; /* rev8 */
344 u16 pcmciawrframebc
; /* rev8 */
346 u16 pcmciaunderflowtimer
; /* rev8 */
350 u32 intstatus
; /* 0x020, rev8 */
351 u32 hostintmask
; /* rev8 */
352 u32 intmask
; /* rev8 */
353 u32 sbintstatus
; /* rev8 */
354 u32 sbintmask
; /* rev8 */
355 u32 funcintmask
; /* rev4 */
357 u32 tosbmailbox
; /* 0x040, rev8 */
358 u32 tohostmailbox
; /* rev8 */
359 u32 tosbmailboxdata
; /* rev8 */
360 u32 tohostmailboxdata
; /* rev8 */
362 /* synchronized access to registers in SDIO clock domain */
363 u32 sdioaccess
; /* 0x050, rev8 */
366 /* PCMCIA frame control */
367 u8 pcmciaframectrl
; /* 0x060, rev8 */
369 u8 pcmciawatermark
; /* rev8 */
372 /* interrupt batching control */
373 u32 intrcvlazy
; /* 0x100, rev8 */
377 u32 cmd52rd
; /* 0x110, rev8 */
378 u32 cmd52wr
; /* rev8 */
379 u32 cmd53rd
; /* rev8 */
380 u32 cmd53wr
; /* rev8 */
381 u32 abort
; /* rev8 */
382 u32 datacrcerror
; /* rev8 */
383 u32 rdoutofsync
; /* rev8 */
384 u32 wroutofsync
; /* rev8 */
385 u32 writebusy
; /* rev8 */
386 u32 readwait
; /* rev8 */
387 u32 readterm
; /* rev8 */
388 u32 writeterm
; /* rev8 */
390 u32 clockctlstatus
; /* rev8 */
393 u32 PAD
[128]; /* DMA engines */
395 /* SDIO/PCMCIA CIS region */
396 char cis
[512]; /* 0x400-0x5ff, rev6 */
398 /* PCMCIA function control registers */
399 char pcmciafcr
[256]; /* 0x600-6ff, rev6 */
402 /* PCMCIA backplane access */
403 u16 backplanecsr
; /* 0x76E, rev6 */
404 u16 backplaneaddr0
; /* rev6 */
405 u16 backplaneaddr1
; /* rev6 */
406 u16 backplaneaddr2
; /* rev6 */
407 u16 backplaneaddr3
; /* rev6 */
408 u16 backplanedata0
; /* rev6 */
409 u16 backplanedata1
; /* rev6 */
410 u16 backplanedata2
; /* rev6 */
411 u16 backplanedata3
; /* rev6 */
414 /* sprom "size" & "blank" info */
415 u16 spromstatus
; /* 0x7BE, rev2 */
422 /* Device console log buffer state */
423 struct brcmf_console
{
424 uint count
; /* Poll interval msec counter */
425 uint log_addr
; /* Log struct address (fixed) */
426 struct rte_log_le log_le
; /* Log struct (host copy) */
427 uint bufsize
; /* Size of log buffer */
428 u8
*buf
; /* Log buffer (host copy) */
429 uint last
; /* Last buffer read index */
433 struct sdpcm_shared
{
437 u32 assert_file_addr
;
439 u32 console_addr
; /* Address of struct rte_console */
444 struct sdpcm_shared_le
{
447 __le32 assert_exp_addr
;
448 __le32 assert_file_addr
;
450 __le32 console_addr
; /* Address of struct rte_console */
451 __le32 msgtrace_addr
;
456 /* misc chip info needed by some of the routines */
457 /* Private data for SDIO bus interaction */
459 struct brcmf_sdio_dev
*sdiodev
; /* sdio device handler */
460 struct chip_info
*ci
; /* Chip info struct */
461 char *vars
; /* Variables (from CIS and/or other) */
462 uint varsz
; /* Size of variables buffer */
464 u32 ramsize
; /* Size of RAM in SOCRAM (bytes) */
466 u32 hostintmask
; /* Copy of Host Interrupt Mask */
467 u32 intstatus
; /* Intstatus bits (events) pending */
468 bool dpc_sched
; /* Indicates DPC schedule (intrpt rcvd) */
469 bool fcstate
; /* State of dongle flow-control */
471 uint blocksize
; /* Block size of SDIO transfers */
472 uint roundup
; /* Max roundup limit */
474 struct pktq txq
; /* Queue length used for flow-control */
475 u8 flowcontrol
; /* per prio flow control bitmask */
476 u8 tx_seq
; /* Transmit sequence number (next) */
477 u8 tx_max
; /* Maximum transmit sequence allowed */
479 u8 hdrbuf
[MAX_HDR_READ
+ BRCMF_SDALIGN
];
480 u8
*rxhdr
; /* Header of current rx frame (in hdrbuf) */
481 u16 nextlen
; /* Next Read Len from last header */
482 u8 rx_seq
; /* Receive sequence number (expected) */
483 bool rxskip
; /* Skip receive (awaiting NAK ACK) */
485 uint rxbound
; /* Rx frames to read before resched */
486 uint txbound
; /* Tx frames to send before resched */
489 struct sk_buff
*glomd
; /* Packet containing glomming descriptor */
490 struct sk_buff_head glom
; /* Packet list for glommed superframe */
491 uint glomerr
; /* Glom packet read errors */
493 u8
*rxbuf
; /* Buffer for receiving control packets */
494 uint rxblen
; /* Allocated length of rxbuf */
495 u8
*rxctl
; /* Aligned pointer into rxbuf */
496 u8
*databuf
; /* Buffer for receiving big glom packet */
497 u8
*dataptr
; /* Aligned pointer into databuf */
498 uint rxlen
; /* Length of valid data in buffer */
500 u8 sdpcm_ver
; /* Bus protocol reported by dongle */
502 bool intr
; /* Use interrupts */
503 bool poll
; /* Use polling */
504 bool ipend
; /* Device interrupt is pending */
505 uint intrcount
; /* Count of device interrupt callbacks */
506 uint lastintrs
; /* Count as of last watchdog timer */
507 uint spurious
; /* Count of spurious interrupts */
508 uint pollrate
; /* Ticks between device polls */
509 uint polltick
; /* Tick counter */
510 uint pollcnt
; /* Count of active polls */
513 uint console_interval
;
514 struct brcmf_console console
; /* Console output polling support */
515 uint console_addr
; /* Console address from shared struct */
518 uint regfails
; /* Count of R_REG failures */
520 uint clkstate
; /* State of sd and backplane clock(s) */
521 bool activity
; /* Activity flag for clock down */
522 s32 idletime
; /* Control for activity timeout */
523 s32 idlecount
; /* Activity timeout counter */
524 s32 idleclock
; /* How to set bus driver when idle */
526 bool use_rxchain
; /* If brcmf should use PKT chains */
527 bool sleeping
; /* Is SDIO bus sleeping? */
528 bool rxflow_mode
; /* Rx flow control mode */
529 bool rxflow
; /* Is rx flow control on */
530 bool alp_only
; /* Don't use HT clock (ALP only) */
531 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
534 /* Some additional counters */
535 uint tx_sderrs
; /* Count of tx attempts with sd errors */
536 uint fcqueued
; /* Tx packets that got queued */
537 uint rxrtx
; /* Count of rtx requests (NAK to dongle) */
538 uint rx_toolong
; /* Receive frames too long to receive */
539 uint rxc_errors
; /* SDIO errors when reading control frames */
540 uint rx_hdrfail
; /* SDIO errors on header reads */
541 uint rx_badhdr
; /* Bad received headers (roosync?) */
542 uint rx_badseq
; /* Mismatched rx sequence number */
543 uint fc_rcvd
; /* Number of flow-control events received */
544 uint fc_xoff
; /* Number which turned on flow-control */
545 uint fc_xon
; /* Number which turned off flow-control */
546 uint rxglomfail
; /* Failed deglom attempts */
547 uint rxglomframes
; /* Number of glom frames (superframes) */
548 uint rxglompkts
; /* Number of packets from glom frames */
549 uint f2rxhdrs
; /* Number of header reads */
550 uint f2rxdata
; /* Number of frame data reads */
551 uint f2txdata
; /* Number of f2 frame writes */
552 uint f1regdata
; /* Number of f1 register accesses */
553 uint tickcnt
; /* Number of watchdog been schedule */
554 unsigned long tx_ctlerrs
; /* Err of sending ctrl frames */
555 unsigned long tx_ctlpkts
; /* Ctrl frames sent to dongle */
556 unsigned long rx_ctlerrs
; /* Err of processing rx ctrl frames */
557 unsigned long rx_ctlpkts
; /* Ctrl frames processed from dongle */
558 unsigned long rx_readahead_cnt
; /* Number of packets where header
559 * read-ahead was used. */
563 bool ctrl_frame_stat
;
566 wait_queue_head_t ctrl_wait
;
567 wait_queue_head_t dcmd_resp_wait
;
569 struct timer_list timer
;
570 struct completion watchdog_wait
;
571 struct task_struct
*watchdog_tsk
;
575 struct task_struct
*dpc_tsk
;
576 struct completion dpc_wait
;
577 struct list_head dpc_tsklst
;
578 spinlock_t dpc_tl_lock
;
580 struct semaphore sdsem
;
582 const struct firmware
*firmware
;
585 bool txoff
; /* Transmit flow-controlled */
591 #define CLK_PENDING 2 /* Not used yet */
595 static int qcount
[NUMPRIO
];
596 static int tx_packets
[NUMPRIO
];
599 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
601 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
603 /* Retry count for register access failures */
604 static const uint retry_limit
= 2;
606 /* Limit on rounding up frames */
607 static const uint max_roundup
= 512;
611 static void pkt_align(struct sk_buff
*p
, int len
, int align
)
614 datalign
= (unsigned long)(p
->data
);
615 datalign
= roundup(datalign
, (align
)) - datalign
;
617 skb_pull(p
, datalign
);
621 /* To check if there's window offered */
622 static bool data_ok(struct brcmf_sdio
*bus
)
624 return (u8
)(bus
->tx_max
- bus
->tx_seq
) != 0 &&
625 ((u8
)(bus
->tx_max
- bus
->tx_seq
) & 0x80) == 0;
629 * Reads a register in the SDIO hardware block. This block occupies a series of
630 * adresses on the 32 bit backplane bus.
633 r_sdreg32(struct brcmf_sdio
*bus
, u32
*regvar
, u32 offset
)
635 u8 idx
= brcmf_sdio_chip_getinfidx(bus
->ci
, BCMA_CORE_SDIO_DEV
);
638 *regvar
= brcmf_sdio_regrl(bus
->sdiodev
,
639 bus
->ci
->c_inf
[idx
].base
+ offset
, &ret
);
645 w_sdreg32(struct brcmf_sdio
*bus
, u32 regval
, u32 reg_offset
)
647 u8 idx
= brcmf_sdio_chip_getinfidx(bus
->ci
, BCMA_CORE_SDIO_DEV
);
650 brcmf_sdio_regwl(bus
->sdiodev
,
651 bus
->ci
->c_inf
[idx
].base
+ reg_offset
,
657 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
659 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
661 /* Packet free applicable unconditionally for sdio and sdspi.
662 * Conditional if bufpool was present for gspi bus.
664 static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio
*bus
, struct sk_buff
*pkt
)
667 brcmu_pkt_buf_free_skb(pkt
);
670 /* Turn backplane clock on or off */
671 static int brcmf_sdbrcm_htclk(struct brcmf_sdio
*bus
, bool on
, bool pendok
)
674 u8 clkctl
, clkreq
, devctl
;
675 unsigned long timeout
;
677 brcmf_dbg(TRACE
, "Enter\n");
682 /* Request HT Avail */
684 bus
->alp_only
? SBSDIO_ALP_AVAIL_REQ
: SBSDIO_HT_AVAIL_REQ
;
686 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
689 brcmf_dbg(ERROR
, "HT Avail request error: %d\n", err
);
693 /* Check current status */
694 clkctl
= brcmf_sdio_regrb(bus
->sdiodev
,
695 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
697 brcmf_dbg(ERROR
, "HT Avail read error: %d\n", err
);
701 /* Go to pending and await interrupt if appropriate */
702 if (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
) && pendok
) {
703 /* Allow only clock-available interrupt */
704 devctl
= brcmf_sdio_regrb(bus
->sdiodev
,
705 SBSDIO_DEVICE_CTL
, &err
);
707 brcmf_dbg(ERROR
, "Devctl error setting CA: %d\n",
712 devctl
|= SBSDIO_DEVCTL_CA_INT_ONLY
;
713 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
715 brcmf_dbg(INFO
, "CLKCTL: set PENDING\n");
716 bus
->clkstate
= CLK_PENDING
;
719 } else if (bus
->clkstate
== CLK_PENDING
) {
720 /* Cancel CA-only interrupt filter */
721 devctl
= brcmf_sdio_regrb(bus
->sdiodev
,
722 SBSDIO_DEVICE_CTL
, &err
);
723 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
724 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
728 /* Otherwise, wait here (polling) for HT Avail */
730 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY
/1000);
731 while (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
)) {
732 clkctl
= brcmf_sdio_regrb(bus
->sdiodev
,
733 SBSDIO_FUNC1_CHIPCLKCSR
,
735 if (time_after(jiffies
, timeout
))
738 usleep_range(5000, 10000);
741 brcmf_dbg(ERROR
, "HT Avail request error: %d\n", err
);
744 if (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
)) {
745 brcmf_dbg(ERROR
, "HT Avail timeout (%d): clkctl 0x%02x\n",
746 PMU_MAX_TRANSITION_DLY
, clkctl
);
750 /* Mark clock available */
751 bus
->clkstate
= CLK_AVAIL
;
752 brcmf_dbg(INFO
, "CLKCTL: turned ON\n");
755 if (!bus
->alp_only
) {
756 if (SBSDIO_ALPONLY(clkctl
))
757 brcmf_dbg(ERROR
, "HT Clock should be on\n");
759 #endif /* defined (DEBUG) */
761 bus
->activity
= true;
765 if (bus
->clkstate
== CLK_PENDING
) {
766 /* Cancel CA-only interrupt filter */
767 devctl
= brcmf_sdio_regrb(bus
->sdiodev
,
768 SBSDIO_DEVICE_CTL
, &err
);
769 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
770 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
774 bus
->clkstate
= CLK_SDONLY
;
775 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
777 brcmf_dbg(INFO
, "CLKCTL: turned OFF\n");
779 brcmf_dbg(ERROR
, "Failed access turning clock off: %d\n",
787 /* Change idle/active SD state */
788 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio
*bus
, bool on
)
790 brcmf_dbg(TRACE
, "Enter\n");
793 bus
->clkstate
= CLK_SDONLY
;
795 bus
->clkstate
= CLK_NONE
;
800 /* Transition SD and backplane clock readiness */
801 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio
*bus
, uint target
, bool pendok
)
804 uint oldstate
= bus
->clkstate
;
807 brcmf_dbg(TRACE
, "Enter\n");
809 /* Early exit if we're already there */
810 if (bus
->clkstate
== target
) {
811 if (target
== CLK_AVAIL
) {
812 brcmf_sdbrcm_wd_timer(bus
, BRCMF_WD_POLL_MS
);
813 bus
->activity
= true;
820 /* Make sure SD clock is available */
821 if (bus
->clkstate
== CLK_NONE
)
822 brcmf_sdbrcm_sdclk(bus
, true);
823 /* Now request HT Avail on the backplane */
824 brcmf_sdbrcm_htclk(bus
, true, pendok
);
825 brcmf_sdbrcm_wd_timer(bus
, BRCMF_WD_POLL_MS
);
826 bus
->activity
= true;
830 /* Remove HT request, or bring up SD clock */
831 if (bus
->clkstate
== CLK_NONE
)
832 brcmf_sdbrcm_sdclk(bus
, true);
833 else if (bus
->clkstate
== CLK_AVAIL
)
834 brcmf_sdbrcm_htclk(bus
, false, false);
836 brcmf_dbg(ERROR
, "request for %d -> %d\n",
837 bus
->clkstate
, target
);
838 brcmf_sdbrcm_wd_timer(bus
, BRCMF_WD_POLL_MS
);
842 /* Make sure to remove HT request */
843 if (bus
->clkstate
== CLK_AVAIL
)
844 brcmf_sdbrcm_htclk(bus
, false, false);
845 /* Now remove the SD clock */
846 brcmf_sdbrcm_sdclk(bus
, false);
847 brcmf_sdbrcm_wd_timer(bus
, 0);
851 brcmf_dbg(INFO
, "%d -> %d\n", oldstate
, bus
->clkstate
);
857 static int brcmf_sdbrcm_bussleep(struct brcmf_sdio
*bus
, bool sleep
)
861 brcmf_dbg(INFO
, "request %s (currently %s)\n",
862 sleep
? "SLEEP" : "WAKE",
863 bus
->sleeping
? "SLEEP" : "WAKE");
865 /* Done if we're already in the requested state */
866 if (sleep
== bus
->sleeping
)
869 /* Going to sleep: set the alarm and turn off the lights... */
871 /* Don't sleep if something is pending */
872 if (bus
->dpc_sched
|| bus
->rxskip
|| pktq_len(&bus
->txq
))
875 /* Make sure the controller has the bus up */
876 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
878 /* Tell device to start using OOB wakeup */
879 ret
= w_sdreg32(bus
, SMB_USE_OOB
,
880 offsetof(struct sdpcmd_regs
, tosbmailbox
));
882 brcmf_dbg(ERROR
, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n");
884 /* Turn off our contribution to the HT clock request */
885 brcmf_sdbrcm_clkctl(bus
, CLK_SDONLY
, false);
887 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
888 SBSDIO_FORCE_HW_CLKREQ_OFF
, NULL
);
890 /* Isolate the bus */
891 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
892 SBSDIO_DEVCTL_PADS_ISO
, NULL
);
895 bus
->sleeping
= true;
898 /* Waking up: bus power up is ok, set local state */
900 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
903 /* Make sure the controller has the bus up */
904 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
906 /* Send misc interrupt to indicate OOB not needed */
907 ret
= w_sdreg32(bus
, 0,
908 offsetof(struct sdpcmd_regs
, tosbmailboxdata
));
910 ret
= w_sdreg32(bus
, SMB_DEV_INT
,
911 offsetof(struct sdpcmd_regs
, tosbmailbox
));
914 brcmf_dbg(ERROR
, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n");
916 /* Make sure we have SD bus access */
917 brcmf_sdbrcm_clkctl(bus
, CLK_SDONLY
, false);
920 bus
->sleeping
= false;
926 static void bus_wake(struct brcmf_sdio
*bus
)
929 brcmf_sdbrcm_bussleep(bus
, false);
932 static u32
brcmf_sdbrcm_hostmail(struct brcmf_sdio
*bus
)
939 brcmf_dbg(TRACE
, "Enter\n");
941 /* Read mailbox data and ack that we did so */
942 ret
= r_sdreg32(bus
, &hmb_data
,
943 offsetof(struct sdpcmd_regs
, tohostmailboxdata
));
946 w_sdreg32(bus
, SMB_INT_ACK
,
947 offsetof(struct sdpcmd_regs
, tosbmailbox
));
950 /* Dongle recomposed rx frames, accept them again */
951 if (hmb_data
& HMB_DATA_NAKHANDLED
) {
952 brcmf_dbg(INFO
, "Dongle reports NAK handled, expect rtx of %d\n",
955 brcmf_dbg(ERROR
, "unexpected NAKHANDLED!\n");
958 intstatus
|= I_HMB_FRAME_IND
;
962 * DEVREADY does not occur with gSPI.
964 if (hmb_data
& (HMB_DATA_DEVREADY
| HMB_DATA_FWREADY
)) {
966 (hmb_data
& HMB_DATA_VERSION_MASK
) >>
967 HMB_DATA_VERSION_SHIFT
;
968 if (bus
->sdpcm_ver
!= SDPCM_PROT_VERSION
)
969 brcmf_dbg(ERROR
, "Version mismatch, dongle reports %d, "
971 bus
->sdpcm_ver
, SDPCM_PROT_VERSION
);
973 brcmf_dbg(INFO
, "Dongle ready, protocol version %d\n",
978 * Flow Control has been moved into the RX headers and this out of band
979 * method isn't used any more.
980 * remaining backward compatible with older dongles.
982 if (hmb_data
& HMB_DATA_FC
) {
983 fcbits
= (hmb_data
& HMB_DATA_FCDATA_MASK
) >>
984 HMB_DATA_FCDATA_SHIFT
;
986 if (fcbits
& ~bus
->flowcontrol
)
989 if (bus
->flowcontrol
& ~fcbits
)
993 bus
->flowcontrol
= fcbits
;
996 /* Shouldn't be any others */
997 if (hmb_data
& ~(HMB_DATA_DEVREADY
|
998 HMB_DATA_NAKHANDLED
|
1001 HMB_DATA_FCDATA_MASK
| HMB_DATA_VERSION_MASK
))
1002 brcmf_dbg(ERROR
, "Unknown mailbox data content: 0x%02x\n",
1008 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio
*bus
, bool abort
, bool rtx
)
1015 brcmf_dbg(ERROR
, "%sterminate frame%s\n",
1016 abort
? "abort command, " : "",
1017 rtx
? ", send NAK" : "");
1020 brcmf_sdcard_abort(bus
->sdiodev
, SDIO_FUNC_2
);
1022 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_FRAMECTRL
,
1026 /* Wait until the packet has been flushed (device/FIFO stable) */
1027 for (lastrbc
= retries
= 0xffff; retries
> 0; retries
--) {
1028 hi
= brcmf_sdio_regrb(bus
->sdiodev
,
1029 SBSDIO_FUNC1_RFRAMEBCHI
, &err
);
1030 lo
= brcmf_sdio_regrb(bus
->sdiodev
,
1031 SBSDIO_FUNC1_RFRAMEBCLO
, &err
);
1032 bus
->f1regdata
+= 2;
1034 if ((hi
== 0) && (lo
== 0))
1037 if ((hi
> (lastrbc
>> 8)) && (lo
> (lastrbc
& 0x00ff))) {
1038 brcmf_dbg(ERROR
, "count growing: last 0x%04x now 0x%04x\n",
1039 lastrbc
, (hi
<< 8) + lo
);
1041 lastrbc
= (hi
<< 8) + lo
;
1045 brcmf_dbg(ERROR
, "count never zeroed: last 0x%04x\n", lastrbc
);
1047 brcmf_dbg(INFO
, "flush took %d iterations\n", 0xffff - retries
);
1051 err
= w_sdreg32(bus
, SMB_NAK
,
1052 offsetof(struct sdpcmd_regs
, tosbmailbox
));
1059 /* Clear partial in any case */
1062 /* If we can't reach the device, signal failure */
1064 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
1067 /* copy a buffer into a pkt buffer chain */
1068 static uint
brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio
*bus
, uint len
)
1077 skb_queue_walk(&bus
->glom
, p
) {
1078 n
= min_t(uint
, p
->len
, len
);
1079 memcpy(p
->data
, buf
, n
);
1090 /* return total length of buffer chain */
1091 static uint
brcmf_sdbrcm_glom_len(struct brcmf_sdio
*bus
)
1097 skb_queue_walk(&bus
->glom
, p
)
1102 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio
*bus
)
1104 struct sk_buff
*cur
, *next
;
1106 skb_queue_walk_safe(&bus
->glom
, cur
, next
) {
1107 skb_unlink(cur
, &bus
->glom
);
1108 brcmu_pkt_buf_free_skb(cur
);
1112 static u8
brcmf_sdbrcm_rxglom(struct brcmf_sdio
*bus
, u8 rxseq
)
1118 struct sk_buff
*pfirst
, *pnext
;
1121 u8 chan
, seq
, doff
, sfdoff
;
1125 bool usechain
= bus
->use_rxchain
;
1127 /* If packets, issue read(s) and send up packet chain */
1128 /* Return sequence numbers consumed? */
1130 brcmf_dbg(TRACE
, "start: glomd %p glom %p\n",
1131 bus
->glomd
, skb_peek(&bus
->glom
));
1133 /* If there's a descriptor, generate the packet chain */
1135 pfirst
= pnext
= NULL
;
1136 dlen
= (u16
) (bus
->glomd
->len
);
1137 dptr
= bus
->glomd
->data
;
1138 if (!dlen
|| (dlen
& 1)) {
1139 brcmf_dbg(ERROR
, "bad glomd len(%d), ignore descriptor\n",
1144 for (totlen
= num
= 0; dlen
; num
++) {
1145 /* Get (and move past) next length */
1146 sublen
= get_unaligned_le16(dptr
);
1147 dlen
-= sizeof(u16
);
1148 dptr
+= sizeof(u16
);
1149 if ((sublen
< SDPCM_HDRLEN
) ||
1150 ((num
== 0) && (sublen
< (2 * SDPCM_HDRLEN
)))) {
1151 brcmf_dbg(ERROR
, "descriptor len %d bad: %d\n",
1156 if (sublen
% BRCMF_SDALIGN
) {
1157 brcmf_dbg(ERROR
, "sublen %d not multiple of %d\n",
1158 sublen
, BRCMF_SDALIGN
);
1163 /* For last frame, adjust read len so total
1164 is a block multiple */
1167 (roundup(totlen
, bus
->blocksize
) - totlen
);
1168 totlen
= roundup(totlen
, bus
->blocksize
);
1171 /* Allocate/chain packet for next subframe */
1172 pnext
= brcmu_pkt_buf_get_skb(sublen
+ BRCMF_SDALIGN
);
1173 if (pnext
== NULL
) {
1174 brcmf_dbg(ERROR
, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1178 skb_queue_tail(&bus
->glom
, pnext
);
1180 /* Adhere to start alignment requirements */
1181 pkt_align(pnext
, sublen
, BRCMF_SDALIGN
);
1184 /* If all allocations succeeded, save packet chain
1187 brcmf_dbg(GLOM
, "allocated %d-byte packet chain for %d subframes\n",
1189 if (BRCMF_GLOM_ON() && bus
->nextlen
&&
1190 totlen
!= bus
->nextlen
) {
1191 brcmf_dbg(GLOM
, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1192 bus
->nextlen
, totlen
, rxseq
);
1194 pfirst
= pnext
= NULL
;
1196 brcmf_sdbrcm_free_glom(bus
);
1200 /* Done with descriptor packet */
1201 brcmu_pkt_buf_free_skb(bus
->glomd
);
1206 /* Ok -- either we just generated a packet chain,
1207 or had one from before */
1208 if (!skb_queue_empty(&bus
->glom
)) {
1209 if (BRCMF_GLOM_ON()) {
1210 brcmf_dbg(GLOM
, "try superframe read, packet chain:\n");
1211 skb_queue_walk(&bus
->glom
, pnext
) {
1212 brcmf_dbg(GLOM
, " %p: %p len 0x%04x (%d)\n",
1213 pnext
, (u8
*) (pnext
->data
),
1214 pnext
->len
, pnext
->len
);
1218 pfirst
= skb_peek(&bus
->glom
);
1219 dlen
= (u16
) brcmf_sdbrcm_glom_len(bus
);
1221 /* Do an SDIO read for the superframe. Configurable iovar to
1222 * read directly into the chained packet, or allocate a large
1223 * packet and and copy into the chain.
1226 errcode
= brcmf_sdcard_recv_chain(bus
->sdiodev
,
1227 bus
->sdiodev
->sbwad
,
1228 SDIO_FUNC_2
, F2SYNC
, &bus
->glom
);
1229 } else if (bus
->dataptr
) {
1230 errcode
= brcmf_sdcard_recv_buf(bus
->sdiodev
,
1231 bus
->sdiodev
->sbwad
,
1232 SDIO_FUNC_2
, F2SYNC
,
1233 bus
->dataptr
, dlen
);
1234 sublen
= (u16
) brcmf_sdbrcm_glom_from_buf(bus
, dlen
);
1235 if (sublen
!= dlen
) {
1236 brcmf_dbg(ERROR
, "FAILED TO COPY, dlen %d sublen %d\n",
1242 brcmf_dbg(ERROR
, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1248 /* On failure, kill the superframe, allow a couple retries */
1250 brcmf_dbg(ERROR
, "glom read of %d bytes failed: %d\n",
1252 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1254 if (bus
->glomerr
++ < 3) {
1255 brcmf_sdbrcm_rxfail(bus
, true, true);
1258 brcmf_sdbrcm_rxfail(bus
, true, false);
1260 brcmf_sdbrcm_free_glom(bus
);
1265 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1266 pfirst
->data
, min_t(int, pfirst
->len
, 48),
1269 /* Validate the superframe header */
1270 dptr
= (u8
*) (pfirst
->data
);
1271 sublen
= get_unaligned_le16(dptr
);
1272 check
= get_unaligned_le16(dptr
+ sizeof(u16
));
1274 chan
= SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]);
1275 seq
= SDPCM_PACKET_SEQUENCE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1276 bus
->nextlen
= dptr
[SDPCM_FRAMETAG_LEN
+ SDPCM_NEXTLEN_OFFSET
];
1277 if ((bus
->nextlen
<< 4) > MAX_RX_DATASZ
) {
1278 brcmf_dbg(INFO
, "nextlen too large (%d) seq %d\n",
1282 doff
= SDPCM_DOFFSET_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1283 txmax
= SDPCM_WINDOW_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1286 if ((u16
)~(sublen
^ check
)) {
1287 brcmf_dbg(ERROR
, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1290 } else if (roundup(sublen
, bus
->blocksize
) != dlen
) {
1291 brcmf_dbg(ERROR
, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1292 sublen
, roundup(sublen
, bus
->blocksize
),
1295 } else if (SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]) !=
1296 SDPCM_GLOM_CHANNEL
) {
1297 brcmf_dbg(ERROR
, "(superframe): bad channel %d\n",
1298 SDPCM_PACKET_CHANNEL(
1299 &dptr
[SDPCM_FRAMETAG_LEN
]));
1301 } else if (SDPCM_GLOMDESC(&dptr
[SDPCM_FRAMETAG_LEN
])) {
1302 brcmf_dbg(ERROR
, "(superframe): got 2nd descriptor?\n");
1304 } else if ((doff
< SDPCM_HDRLEN
) ||
1305 (doff
> (pfirst
->len
- SDPCM_HDRLEN
))) {
1306 brcmf_dbg(ERROR
, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1307 doff
, sublen
, pfirst
->len
, SDPCM_HDRLEN
);
1311 /* Check sequence number of superframe SW header */
1313 brcmf_dbg(INFO
, "(superframe) rx_seq %d, expected %d\n",
1319 /* Check window for sanity */
1320 if ((u8
) (txmax
- bus
->tx_seq
) > 0x40) {
1321 brcmf_dbg(ERROR
, "unlikely tx max %d with tx_seq %d\n",
1322 txmax
, bus
->tx_seq
);
1323 txmax
= bus
->tx_seq
+ 2;
1325 bus
->tx_max
= txmax
;
1327 /* Remove superframe header, remember offset */
1328 skb_pull(pfirst
, doff
);
1332 /* Validate all the subframe headers */
1333 skb_queue_walk(&bus
->glom
, pnext
) {
1334 /* leave when invalid subframe is found */
1338 dptr
= (u8
*) (pnext
->data
);
1339 dlen
= (u16
) (pnext
->len
);
1340 sublen
= get_unaligned_le16(dptr
);
1341 check
= get_unaligned_le16(dptr
+ sizeof(u16
));
1342 chan
= SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]);
1343 doff
= SDPCM_DOFFSET_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1344 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1345 dptr
, 32, "subframe:\n");
1347 if ((u16
)~(sublen
^ check
)) {
1348 brcmf_dbg(ERROR
, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1349 num
, sublen
, check
);
1351 } else if ((sublen
> dlen
) || (sublen
< SDPCM_HDRLEN
)) {
1352 brcmf_dbg(ERROR
, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1355 } else if ((chan
!= SDPCM_DATA_CHANNEL
) &&
1356 (chan
!= SDPCM_EVENT_CHANNEL
)) {
1357 brcmf_dbg(ERROR
, "(subframe %d): bad channel %d\n",
1360 } else if ((doff
< SDPCM_HDRLEN
) || (doff
> sublen
)) {
1361 brcmf_dbg(ERROR
, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1362 num
, doff
, sublen
, SDPCM_HDRLEN
);
1365 /* increase the subframe count */
1370 /* Terminate frame on error, request
1372 if (bus
->glomerr
++ < 3) {
1373 /* Restore superframe header space */
1374 skb_push(pfirst
, sfdoff
);
1375 brcmf_sdbrcm_rxfail(bus
, true, true);
1378 brcmf_sdbrcm_rxfail(bus
, true, false);
1380 brcmf_sdbrcm_free_glom(bus
);
1386 /* Basic SD framing looks ok - process each packet (header) */
1388 skb_queue_walk_safe(&bus
->glom
, pfirst
, pnext
) {
1389 dptr
= (u8
*) (pfirst
->data
);
1390 sublen
= get_unaligned_le16(dptr
);
1391 chan
= SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]);
1392 seq
= SDPCM_PACKET_SEQUENCE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1393 doff
= SDPCM_DOFFSET_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1395 brcmf_dbg(GLOM
, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1396 num
, pfirst
, pfirst
->data
,
1397 pfirst
->len
, sublen
, chan
, seq
);
1399 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1400 chan == SDPCM_EVENT_CHANNEL */
1403 brcmf_dbg(GLOM
, "rx_seq %d, expected %d\n",
1410 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1411 dptr
, dlen
, "Rx Subframe Data:\n");
1413 __skb_trim(pfirst
, sublen
);
1414 skb_pull(pfirst
, doff
);
1416 if (pfirst
->len
== 0) {
1417 skb_unlink(pfirst
, &bus
->glom
);
1418 brcmu_pkt_buf_free_skb(pfirst
);
1420 } else if (brcmf_proto_hdrpull(bus
->sdiodev
->dev
,
1421 &ifidx
, pfirst
) != 0) {
1422 brcmf_dbg(ERROR
, "rx protocol error\n");
1423 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1424 skb_unlink(pfirst
, &bus
->glom
);
1425 brcmu_pkt_buf_free_skb(pfirst
);
1429 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1431 min_t(int, pfirst
->len
, 32),
1432 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1433 bus
->glom
.qlen
, pfirst
, pfirst
->data
,
1434 pfirst
->len
, pfirst
->next
,
1437 /* sent any remaining packets up */
1438 if (bus
->glom
.qlen
) {
1440 brcmf_rx_frame(bus
->sdiodev
->dev
, ifidx
, &bus
->glom
);
1444 bus
->rxglomframes
++;
1445 bus
->rxglompkts
+= bus
->glom
.qlen
;
1450 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio
*bus
, uint
*condition
,
1453 DECLARE_WAITQUEUE(wait
, current
);
1454 int timeout
= msecs_to_jiffies(DCMD_RESP_TIMEOUT
);
1456 /* Wait until control frame is available */
1457 add_wait_queue(&bus
->dcmd_resp_wait
, &wait
);
1458 set_current_state(TASK_INTERRUPTIBLE
);
1460 while (!(*condition
) && (!signal_pending(current
) && timeout
))
1461 timeout
= schedule_timeout(timeout
);
1463 if (signal_pending(current
))
1466 set_current_state(TASK_RUNNING
);
1467 remove_wait_queue(&bus
->dcmd_resp_wait
, &wait
);
1472 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio
*bus
)
1474 if (waitqueue_active(&bus
->dcmd_resp_wait
))
1475 wake_up_interruptible(&bus
->dcmd_resp_wait
);
1480 brcmf_sdbrcm_read_control(struct brcmf_sdio
*bus
, u8
*hdr
, uint len
, uint doff
)
1486 brcmf_dbg(TRACE
, "Enter\n");
1488 /* Set rxctl for frame (w/optional alignment) */
1489 bus
->rxctl
= bus
->rxbuf
;
1490 bus
->rxctl
+= BRCMF_FIRSTREAD
;
1491 pad
= ((unsigned long)bus
->rxctl
% BRCMF_SDALIGN
);
1493 bus
->rxctl
+= (BRCMF_SDALIGN
- pad
);
1494 bus
->rxctl
-= BRCMF_FIRSTREAD
;
1496 /* Copy the already-read portion over */
1497 memcpy(bus
->rxctl
, hdr
, BRCMF_FIRSTREAD
);
1498 if (len
<= BRCMF_FIRSTREAD
)
1501 /* Raise rdlen to next SDIO block to avoid tail command */
1502 rdlen
= len
- BRCMF_FIRSTREAD
;
1503 if (bus
->roundup
&& bus
->blocksize
&& (rdlen
> bus
->blocksize
)) {
1504 pad
= bus
->blocksize
- (rdlen
% bus
->blocksize
);
1505 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
) &&
1506 ((len
+ pad
) < bus
->sdiodev
->bus_if
->maxctl
))
1508 } else if (rdlen
% BRCMF_SDALIGN
) {
1509 rdlen
+= BRCMF_SDALIGN
- (rdlen
% BRCMF_SDALIGN
);
1512 /* Satisfy length-alignment requirements */
1513 if (rdlen
& (ALIGNMENT
- 1))
1514 rdlen
= roundup(rdlen
, ALIGNMENT
);
1516 /* Drop if the read is too big or it exceeds our maximum */
1517 if ((rdlen
+ BRCMF_FIRSTREAD
) > bus
->sdiodev
->bus_if
->maxctl
) {
1518 brcmf_dbg(ERROR
, "%d-byte control read exceeds %d-byte buffer\n",
1519 rdlen
, bus
->sdiodev
->bus_if
->maxctl
);
1520 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1521 brcmf_sdbrcm_rxfail(bus
, false, false);
1525 if ((len
- doff
) > bus
->sdiodev
->bus_if
->maxctl
) {
1526 brcmf_dbg(ERROR
, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1527 len
, len
- doff
, bus
->sdiodev
->bus_if
->maxctl
);
1528 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1530 brcmf_sdbrcm_rxfail(bus
, false, false);
1534 /* Read remainder of frame body into the rxctl buffer */
1535 sdret
= brcmf_sdcard_recv_buf(bus
->sdiodev
,
1536 bus
->sdiodev
->sbwad
,
1538 F2SYNC
, (bus
->rxctl
+ BRCMF_FIRSTREAD
), rdlen
);
1541 /* Control frame failures need retransmission */
1543 brcmf_dbg(ERROR
, "read %d control bytes failed: %d\n",
1546 brcmf_sdbrcm_rxfail(bus
, true, true);
1552 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1553 bus
->rxctl
, len
, "RxCtrl:\n");
1555 /* Point to valid data and indicate its length */
1557 bus
->rxlen
= len
- doff
;
1560 /* Awake any waiters */
1561 brcmf_sdbrcm_dcmd_resp_wake(bus
);
1564 /* Pad read to blocksize for efficiency */
1565 static void brcmf_pad(struct brcmf_sdio
*bus
, u16
*pad
, u16
*rdlen
)
1567 if (bus
->roundup
&& bus
->blocksize
&& *rdlen
> bus
->blocksize
) {
1568 *pad
= bus
->blocksize
- (*rdlen
% bus
->blocksize
);
1569 if (*pad
<= bus
->roundup
&& *pad
< bus
->blocksize
&&
1570 *rdlen
+ *pad
+ BRCMF_FIRSTREAD
< MAX_RX_DATASZ
)
1572 } else if (*rdlen
% BRCMF_SDALIGN
) {
1573 *rdlen
+= BRCMF_SDALIGN
- (*rdlen
% BRCMF_SDALIGN
);
1578 brcmf_alloc_pkt_and_read(struct brcmf_sdio
*bus
, u16 rdlen
,
1579 struct sk_buff
**pkt
, u8
**rxbuf
)
1581 int sdret
; /* Return code from calls */
1583 *pkt
= brcmu_pkt_buf_get_skb(rdlen
+ BRCMF_SDALIGN
);
1587 pkt_align(*pkt
, rdlen
, BRCMF_SDALIGN
);
1588 *rxbuf
= (u8
*) ((*pkt
)->data
);
1589 /* Read the entire frame */
1590 sdret
= brcmf_sdcard_recv_pkt(bus
->sdiodev
, bus
->sdiodev
->sbwad
,
1591 SDIO_FUNC_2
, F2SYNC
, *pkt
);
1595 brcmf_dbg(ERROR
, "(nextlen): read %d bytes failed: %d\n",
1597 brcmu_pkt_buf_free_skb(*pkt
);
1598 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1599 /* Force retry w/normal header read.
1600 * Don't attempt NAK for
1603 brcmf_sdbrcm_rxfail(bus
, true, true);
1608 /* Checks the header */
1610 brcmf_check_rxbuf(struct brcmf_sdio
*bus
, struct sk_buff
*pkt
, u8
*rxbuf
,
1611 u8 rxseq
, u16 nextlen
, u16
*len
)
1614 bool len_consistent
; /* Result of comparing readahead len and
1617 memcpy(bus
->rxhdr
, rxbuf
, SDPCM_HDRLEN
);
1619 /* Extract hardware header fields */
1620 *len
= get_unaligned_le16(bus
->rxhdr
);
1621 check
= get_unaligned_le16(bus
->rxhdr
+ sizeof(u16
));
1623 /* All zeros means readahead info was bad */
1624 if (!(*len
| check
)) {
1625 brcmf_dbg(INFO
, "(nextlen): read zeros in HW header???\n");
1629 /* Validate check bytes */
1630 if ((u16
)~(*len
^ check
)) {
1631 brcmf_dbg(ERROR
, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1632 nextlen
, *len
, check
);
1634 brcmf_sdbrcm_rxfail(bus
, false, false);
1638 /* Validate frame length */
1639 if (*len
< SDPCM_HDRLEN
) {
1640 brcmf_dbg(ERROR
, "(nextlen): HW hdr length invalid: %d\n",
1645 /* Check for consistency with readahead info */
1646 len_consistent
= (nextlen
!= (roundup(*len
, 16) >> 4));
1647 if (len_consistent
) {
1648 /* Mismatch, force retry w/normal
1649 header (may be >4K) */
1650 brcmf_dbg(ERROR
, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1651 nextlen
, *len
, roundup(*len
, 16),
1653 brcmf_sdbrcm_rxfail(bus
, true, true);
1660 brcmf_sdbrcm_pktfree2(bus
, pkt
);
1664 /* Return true if there may be more frames to read */
1666 brcmf_sdbrcm_readframes(struct brcmf_sdio
*bus
, uint maxframes
, bool *finished
)
1668 u16 len
, check
; /* Extracted hardware header fields */
1669 u8 chan
, seq
, doff
; /* Extracted software header fields */
1670 u8 fcbits
; /* Extracted fcbits from software header */
1672 struct sk_buff
*pkt
; /* Packet for event or data frames */
1673 u16 pad
; /* Number of pad bytes to read */
1674 u16 rdlen
; /* Total number of bytes to read */
1675 u8 rxseq
; /* Next sequence number to expect */
1676 uint rxleft
= 0; /* Remaining number of frames allowed */
1677 int sdret
; /* Return code from calls */
1678 u8 txmax
; /* Maximum tx sequence offered */
1681 uint rxcount
= 0; /* Total frames read */
1683 brcmf_dbg(TRACE
, "Enter\n");
1685 /* Not finished unless we encounter no more frames indication */
1688 for (rxseq
= bus
->rx_seq
, rxleft
= maxframes
;
1689 !bus
->rxskip
&& rxleft
&&
1690 bus
->sdiodev
->bus_if
->state
!= BRCMF_BUS_DOWN
;
1691 rxseq
++, rxleft
--) {
1693 /* Handle glomming separately */
1694 if (bus
->glomd
|| !skb_queue_empty(&bus
->glom
)) {
1696 brcmf_dbg(GLOM
, "calling rxglom: glomd %p, glom %p\n",
1697 bus
->glomd
, skb_peek(&bus
->glom
));
1698 cnt
= brcmf_sdbrcm_rxglom(bus
, rxseq
);
1699 brcmf_dbg(GLOM
, "rxglom returned %d\n", cnt
);
1701 rxleft
= (rxleft
> cnt
) ? (rxleft
- cnt
) : 1;
1705 /* Try doing single read if we can */
1707 u16 nextlen
= bus
->nextlen
;
1710 rdlen
= len
= nextlen
<< 4;
1711 brcmf_pad(bus
, &pad
, &rdlen
);
1714 * After the frame is received we have to
1715 * distinguish whether it is data
1716 * or non-data frame.
1718 brcmf_alloc_pkt_and_read(bus
, rdlen
, &pkt
, &rxbuf
);
1720 /* Give up on data, request rtx of events */
1721 brcmf_dbg(ERROR
, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1726 if (brcmf_check_rxbuf(bus
, pkt
, rxbuf
, rxseq
, nextlen
,
1730 /* Extract software header fields */
1731 chan
= SDPCM_PACKET_CHANNEL(
1732 &bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
1733 seq
= SDPCM_PACKET_SEQUENCE(
1734 &bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
1735 doff
= SDPCM_DOFFSET_VALUE(
1736 &bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
1737 txmax
= SDPCM_WINDOW_VALUE(
1738 &bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
1741 bus
->rxhdr
[SDPCM_FRAMETAG_LEN
+
1742 SDPCM_NEXTLEN_OFFSET
];
1743 if ((bus
->nextlen
<< 4) > MAX_RX_DATASZ
) {
1744 brcmf_dbg(INFO
, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1749 bus
->rx_readahead_cnt
++;
1751 /* Handle Flow Control */
1752 fcbits
= SDPCM_FCMASK_VALUE(
1753 &bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
1755 if (bus
->flowcontrol
!= fcbits
) {
1756 if (~bus
->flowcontrol
& fcbits
)
1759 if (bus
->flowcontrol
& ~fcbits
)
1763 bus
->flowcontrol
= fcbits
;
1766 /* Check and update sequence number */
1768 brcmf_dbg(INFO
, "(nextlen): rx_seq %d, expected %d\n",
1774 /* Check window for sanity */
1775 if ((u8
) (txmax
- bus
->tx_seq
) > 0x40) {
1776 brcmf_dbg(ERROR
, "got unlikely tx max %d with tx_seq %d\n",
1777 txmax
, bus
->tx_seq
);
1778 txmax
= bus
->tx_seq
+ 2;
1780 bus
->tx_max
= txmax
;
1782 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1783 rxbuf
, len
, "Rx Data:\n");
1784 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1787 bus
->rxhdr
, SDPCM_HDRLEN
,
1790 if (chan
== SDPCM_CONTROL_CHANNEL
) {
1791 brcmf_dbg(ERROR
, "(nextlen): readahead on control packet %d?\n",
1793 /* Force retry w/normal header read */
1795 brcmf_sdbrcm_rxfail(bus
, false, true);
1796 brcmf_sdbrcm_pktfree2(bus
, pkt
);
1800 /* Validate data offset */
1801 if ((doff
< SDPCM_HDRLEN
) || (doff
> len
)) {
1802 brcmf_dbg(ERROR
, "(nextlen): bad data offset %d: HW len %d min %d\n",
1803 doff
, len
, SDPCM_HDRLEN
);
1804 brcmf_sdbrcm_rxfail(bus
, false, false);
1805 brcmf_sdbrcm_pktfree2(bus
, pkt
);
1809 /* All done with this one -- now deliver the packet */
1813 /* Read frame header (hardware and software) */
1814 sdret
= brcmf_sdcard_recv_buf(bus
->sdiodev
, bus
->sdiodev
->sbwad
,
1815 SDIO_FUNC_2
, F2SYNC
, bus
->rxhdr
,
1820 brcmf_dbg(ERROR
, "RXHEADER FAILED: %d\n", sdret
);
1822 brcmf_sdbrcm_rxfail(bus
, true, true);
1825 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1826 bus
->rxhdr
, SDPCM_HDRLEN
, "RxHdr:\n");
1829 /* Extract hardware header fields */
1830 len
= get_unaligned_le16(bus
->rxhdr
);
1831 check
= get_unaligned_le16(bus
->rxhdr
+ sizeof(u16
));
1833 /* All zeros means no more frames */
1834 if (!(len
| check
)) {
1839 /* Validate check bytes */
1840 if ((u16
) ~(len
^ check
)) {
1841 brcmf_dbg(ERROR
, "HW hdr err: len/check 0x%04x/0x%04x\n",
1844 brcmf_sdbrcm_rxfail(bus
, false, false);
1848 /* Validate frame length */
1849 if (len
< SDPCM_HDRLEN
) {
1850 brcmf_dbg(ERROR
, "HW hdr length invalid: %d\n", len
);
1854 /* Extract software header fields */
1855 chan
= SDPCM_PACKET_CHANNEL(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
1856 seq
= SDPCM_PACKET_SEQUENCE(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
1857 doff
= SDPCM_DOFFSET_VALUE(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
1858 txmax
= SDPCM_WINDOW_VALUE(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
1860 /* Validate data offset */
1861 if ((doff
< SDPCM_HDRLEN
) || (doff
> len
)) {
1862 brcmf_dbg(ERROR
, "Bad data offset %d: HW len %d, min %d seq %d\n",
1863 doff
, len
, SDPCM_HDRLEN
, seq
);
1865 brcmf_sdbrcm_rxfail(bus
, false, false);
1869 /* Save the readahead length if there is one */
1871 bus
->rxhdr
[SDPCM_FRAMETAG_LEN
+ SDPCM_NEXTLEN_OFFSET
];
1872 if ((bus
->nextlen
<< 4) > MAX_RX_DATASZ
) {
1873 brcmf_dbg(INFO
, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1878 /* Handle Flow Control */
1879 fcbits
= SDPCM_FCMASK_VALUE(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
]);
1881 if (bus
->flowcontrol
!= fcbits
) {
1882 if (~bus
->flowcontrol
& fcbits
)
1885 if (bus
->flowcontrol
& ~fcbits
)
1889 bus
->flowcontrol
= fcbits
;
1892 /* Check and update sequence number */
1894 brcmf_dbg(INFO
, "rx_seq %d, expected %d\n", seq
, rxseq
);
1899 /* Check window for sanity */
1900 if ((u8
) (txmax
- bus
->tx_seq
) > 0x40) {
1901 brcmf_dbg(ERROR
, "unlikely tx max %d with tx_seq %d\n",
1902 txmax
, bus
->tx_seq
);
1903 txmax
= bus
->tx_seq
+ 2;
1905 bus
->tx_max
= txmax
;
1907 /* Call a separate function for control frames */
1908 if (chan
== SDPCM_CONTROL_CHANNEL
) {
1909 brcmf_sdbrcm_read_control(bus
, bus
->rxhdr
, len
, doff
);
1913 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1914 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1915 SDPCM_GLOM_CHANNEL */
1917 /* Length to read */
1918 rdlen
= (len
> BRCMF_FIRSTREAD
) ? (len
- BRCMF_FIRSTREAD
) : 0;
1920 /* May pad read to blocksize for efficiency */
1921 if (bus
->roundup
&& bus
->blocksize
&&
1922 (rdlen
> bus
->blocksize
)) {
1923 pad
= bus
->blocksize
- (rdlen
% bus
->blocksize
);
1924 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
) &&
1925 ((rdlen
+ pad
+ BRCMF_FIRSTREAD
) < MAX_RX_DATASZ
))
1927 } else if (rdlen
% BRCMF_SDALIGN
) {
1928 rdlen
+= BRCMF_SDALIGN
- (rdlen
% BRCMF_SDALIGN
);
1931 /* Satisfy length-alignment requirements */
1932 if (rdlen
& (ALIGNMENT
- 1))
1933 rdlen
= roundup(rdlen
, ALIGNMENT
);
1935 if ((rdlen
+ BRCMF_FIRSTREAD
) > MAX_RX_DATASZ
) {
1936 /* Too long -- skip this frame */
1937 brcmf_dbg(ERROR
, "too long: len %d rdlen %d\n",
1939 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1941 brcmf_sdbrcm_rxfail(bus
, false, false);
1945 pkt
= brcmu_pkt_buf_get_skb(rdlen
+
1946 BRCMF_FIRSTREAD
+ BRCMF_SDALIGN
);
1948 /* Give up on data, request rtx of events */
1949 brcmf_dbg(ERROR
, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1951 bus
->sdiodev
->bus_if
->dstats
.rx_dropped
++;
1952 brcmf_sdbrcm_rxfail(bus
, false, RETRYCHAN(chan
));
1956 /* Leave room for what we already read, and align remainder */
1957 skb_pull(pkt
, BRCMF_FIRSTREAD
);
1958 pkt_align(pkt
, rdlen
, BRCMF_SDALIGN
);
1960 /* Read the remaining frame data */
1961 sdret
= brcmf_sdcard_recv_pkt(bus
->sdiodev
, bus
->sdiodev
->sbwad
,
1962 SDIO_FUNC_2
, F2SYNC
, pkt
);
1966 brcmf_dbg(ERROR
, "read %d %s bytes failed: %d\n", rdlen
,
1967 ((chan
== SDPCM_EVENT_CHANNEL
) ? "event"
1968 : ((chan
== SDPCM_DATA_CHANNEL
) ? "data"
1970 brcmu_pkt_buf_free_skb(pkt
);
1971 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1972 brcmf_sdbrcm_rxfail(bus
, true, RETRYCHAN(chan
));
1976 /* Copy the already-read portion */
1977 skb_push(pkt
, BRCMF_FIRSTREAD
);
1978 memcpy(pkt
->data
, bus
->rxhdr
, BRCMF_FIRSTREAD
);
1980 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1981 pkt
->data
, len
, "Rx Data:\n");
1984 /* Save superframe descriptor and allocate packet frame */
1985 if (chan
== SDPCM_GLOM_CHANNEL
) {
1986 if (SDPCM_GLOMDESC(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
])) {
1987 brcmf_dbg(GLOM
, "glom descriptor, %d bytes:\n",
1989 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1992 __skb_trim(pkt
, len
);
1993 skb_pull(pkt
, SDPCM_HDRLEN
);
1996 brcmf_dbg(ERROR
, "%s: glom superframe w/o "
1997 "descriptor!\n", __func__
);
1998 brcmf_sdbrcm_rxfail(bus
, false, false);
2003 /* Fill in packet len and prio, deliver upward */
2004 __skb_trim(pkt
, len
);
2005 skb_pull(pkt
, doff
);
2007 if (pkt
->len
== 0) {
2008 brcmu_pkt_buf_free_skb(pkt
);
2010 } else if (brcmf_proto_hdrpull(bus
->sdiodev
->dev
, &ifidx
,
2012 brcmf_dbg(ERROR
, "rx protocol error\n");
2013 brcmu_pkt_buf_free_skb(pkt
);
2014 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
2018 /* Unlock during rx call */
2020 brcmf_rx_packet(bus
->sdiodev
->dev
, ifidx
, pkt
);
2023 rxcount
= maxframes
- rxleft
;
2024 /* Message if we hit the limit */
2026 brcmf_dbg(DATA
, "hit rx limit of %d frames\n",
2029 brcmf_dbg(DATA
, "processed %d frames\n", rxcount
);
2030 /* Back off rxseq if awaiting rtx, update rx_seq */
2033 bus
->rx_seq
= rxseq
;
2039 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio
*bus
, bool *lockvar
)
2042 wait_event_interruptible_timeout(bus
->ctrl_wait
, !*lockvar
, HZ
* 2);
2048 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio
*bus
)
2050 if (waitqueue_active(&bus
->ctrl_wait
))
2051 wake_up_interruptible(&bus
->ctrl_wait
);
2055 /* Writes a HW/SW header into the packet and sends it. */
2056 /* Assumes: (a) header space already there, (b) caller holds lock */
2057 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio
*bus
, struct sk_buff
*pkt
,
2058 uint chan
, bool free_pkt
)
2064 struct sk_buff
*new;
2067 brcmf_dbg(TRACE
, "Enter\n");
2069 frame
= (u8
*) (pkt
->data
);
2071 /* Add alignment padding, allocate new packet if needed */
2072 pad
= ((unsigned long)frame
% BRCMF_SDALIGN
);
2074 if (skb_headroom(pkt
) < pad
) {
2075 brcmf_dbg(INFO
, "insufficient headroom %d for %d pad\n",
2076 skb_headroom(pkt
), pad
);
2077 bus
->sdiodev
->bus_if
->tx_realloc
++;
2078 new = brcmu_pkt_buf_get_skb(pkt
->len
+ BRCMF_SDALIGN
);
2080 brcmf_dbg(ERROR
, "couldn't allocate new %d-byte packet\n",
2081 pkt
->len
+ BRCMF_SDALIGN
);
2086 pkt_align(new, pkt
->len
, BRCMF_SDALIGN
);
2087 memcpy(new->data
, pkt
->data
, pkt
->len
);
2089 brcmu_pkt_buf_free_skb(pkt
);
2090 /* free the pkt if canned one is not used */
2093 frame
= (u8
*) (pkt
->data
);
2094 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2098 frame
= (u8
*) (pkt
->data
);
2099 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2100 memset(frame
, 0, pad
+ SDPCM_HDRLEN
);
2103 /* precondition: pad < BRCMF_SDALIGN */
2105 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2106 len
= (u16
) (pkt
->len
);
2107 *(__le16
*) frame
= cpu_to_le16(len
);
2108 *(((__le16
*) frame
) + 1) = cpu_to_le16(~len
);
2110 /* Software tag: channel, sequence number, data offset */
2112 ((chan
<< SDPCM_CHANNEL_SHIFT
) & SDPCM_CHANNEL_MASK
) | bus
->tx_seq
|
2114 SDPCM_HDRLEN
) << SDPCM_DOFFSET_SHIFT
) & SDPCM_DOFFSET_MASK
);
2116 put_unaligned_le32(swheader
, frame
+ SDPCM_FRAMETAG_LEN
);
2117 put_unaligned_le32(0, frame
+ SDPCM_FRAMETAG_LEN
+ sizeof(swheader
));
2120 tx_packets
[pkt
->priority
]++;
2123 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
2124 ((BRCMF_CTL_ON() && chan
== SDPCM_CONTROL_CHANNEL
) ||
2125 (BRCMF_DATA_ON() && chan
!= SDPCM_CONTROL_CHANNEL
)),
2126 frame
, len
, "Tx Frame:\n");
2127 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2129 chan
== SDPCM_CONTROL_CHANNEL
) ||
2131 chan
!= SDPCM_CONTROL_CHANNEL
))) &&
2133 frame
, min_t(u16
, len
, 16), "TxHdr:\n");
2135 /* Raise len to next SDIO block to eliminate tail command */
2136 if (bus
->roundup
&& bus
->blocksize
&& (len
> bus
->blocksize
)) {
2137 u16 pad
= bus
->blocksize
- (len
% bus
->blocksize
);
2138 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
))
2140 } else if (len
% BRCMF_SDALIGN
) {
2141 len
+= BRCMF_SDALIGN
- (len
% BRCMF_SDALIGN
);
2144 /* Some controllers have trouble with odd bytes -- round to even */
2145 if (len
& (ALIGNMENT
- 1))
2146 len
= roundup(len
, ALIGNMENT
);
2148 ret
= brcmf_sdcard_send_pkt(bus
->sdiodev
, bus
->sdiodev
->sbwad
,
2149 SDIO_FUNC_2
, F2SYNC
, pkt
);
2153 /* On failure, abort the command and terminate the frame */
2154 brcmf_dbg(INFO
, "sdio error %d, abort command and terminate frame\n",
2158 brcmf_sdcard_abort(bus
->sdiodev
, SDIO_FUNC_2
);
2159 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_FRAMECTRL
,
2163 for (i
= 0; i
< 3; i
++) {
2165 hi
= brcmf_sdio_regrb(bus
->sdiodev
,
2166 SBSDIO_FUNC1_WFRAMEBCHI
, NULL
);
2167 lo
= brcmf_sdio_regrb(bus
->sdiodev
,
2168 SBSDIO_FUNC1_WFRAMEBCLO
, NULL
);
2169 bus
->f1regdata
+= 2;
2170 if ((hi
== 0) && (lo
== 0))
2176 bus
->tx_seq
= (bus
->tx_seq
+ 1) % SDPCM_SEQUENCE_WRAP
;
2179 /* restore pkt buffer pointer before calling tx complete routine */
2180 skb_pull(pkt
, SDPCM_HDRLEN
+ pad
);
2182 brcmf_txcomplete(bus
->sdiodev
->dev
, pkt
, ret
!= 0);
2186 brcmu_pkt_buf_free_skb(pkt
);
2191 static uint
brcmf_sdbrcm_sendfromq(struct brcmf_sdio
*bus
, uint maxframes
)
2193 struct sk_buff
*pkt
;
2195 int ret
= 0, prec_out
;
2200 brcmf_dbg(TRACE
, "Enter\n");
2202 tx_prec_map
= ~bus
->flowcontrol
;
2204 /* Send frames until the limit or some other event */
2205 for (cnt
= 0; (cnt
< maxframes
) && data_ok(bus
); cnt
++) {
2206 spin_lock_bh(&bus
->txqlock
);
2207 pkt
= brcmu_pktq_mdeq(&bus
->txq
, tx_prec_map
, &prec_out
);
2209 spin_unlock_bh(&bus
->txqlock
);
2212 spin_unlock_bh(&bus
->txqlock
);
2213 datalen
= pkt
->len
- SDPCM_HDRLEN
;
2215 ret
= brcmf_sdbrcm_txpkt(bus
, pkt
, SDPCM_DATA_CHANNEL
, true);
2217 bus
->sdiodev
->bus_if
->dstats
.tx_errors
++;
2219 bus
->sdiodev
->bus_if
->dstats
.tx_bytes
+= datalen
;
2221 /* In poll mode, need to check for other events */
2222 if (!bus
->intr
&& cnt
) {
2223 /* Check device status, signal pending interrupt */
2224 ret
= r_sdreg32(bus
, &intstatus
,
2225 offsetof(struct sdpcmd_regs
,
2230 if (intstatus
& bus
->hostintmask
)
2235 /* Deflow-control stack if needed */
2236 if (bus
->sdiodev
->bus_if
->drvr_up
&&
2237 (bus
->sdiodev
->bus_if
->state
== BRCMF_BUS_DATA
) &&
2238 bus
->txoff
&& (pktq_len(&bus
->txq
) < TXLOW
)) {
2240 brcmf_txflowcontrol(bus
->sdiodev
->dev
, 0, OFF
);
2246 static void brcmf_sdbrcm_bus_stop(struct device
*dev
)
2248 u32 local_hostintmask
;
2251 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2252 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2253 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2255 brcmf_dbg(TRACE
, "Enter\n");
2257 if (bus
->watchdog_tsk
) {
2258 send_sig(SIGTERM
, bus
->watchdog_tsk
, 1);
2259 kthread_stop(bus
->watchdog_tsk
);
2260 bus
->watchdog_tsk
= NULL
;
2263 if (bus
->dpc_tsk
&& bus
->dpc_tsk
!= current
) {
2264 send_sig(SIGTERM
, bus
->dpc_tsk
, 1);
2265 kthread_stop(bus
->dpc_tsk
);
2266 bus
->dpc_tsk
= NULL
;
2273 /* Enable clock for device interrupts */
2274 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
2276 /* Disable and clear interrupts at the chip level also */
2277 w_sdreg32(bus
, 0, offsetof(struct sdpcmd_regs
, hostintmask
));
2278 local_hostintmask
= bus
->hostintmask
;
2279 bus
->hostintmask
= 0;
2281 /* Change our idea of bus state */
2282 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2284 /* Force clocks on backplane to be sure F2 interrupt propagates */
2285 saveclk
= brcmf_sdio_regrb(bus
->sdiodev
,
2286 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
2288 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
2289 (saveclk
| SBSDIO_FORCE_HT
), &err
);
2292 brcmf_dbg(ERROR
, "Failed to force clock for F2: err %d\n", err
);
2294 /* Turn off the bus (F2), free any pending packets */
2295 brcmf_dbg(INTR
, "disable SDIO interrupts\n");
2296 brcmf_sdio_regwb(bus
->sdiodev
, SDIO_CCCR_IOEx
, SDIO_FUNC_ENABLE_1
,
2299 /* Clear any pending interrupts now that F2 is disabled */
2300 w_sdreg32(bus
, local_hostintmask
,
2301 offsetof(struct sdpcmd_regs
, intstatus
));
2303 /* Turn off the backplane clock (only) */
2304 brcmf_sdbrcm_clkctl(bus
, CLK_SDONLY
, false);
2306 /* Clear the data packet queues */
2307 brcmu_pktq_flush(&bus
->txq
, true, NULL
, NULL
);
2309 /* Clear any held glomming stuff */
2311 brcmu_pkt_buf_free_skb(bus
->glomd
);
2312 brcmf_sdbrcm_free_glom(bus
);
2314 /* Clear rx control and wake any waiters */
2316 brcmf_sdbrcm_dcmd_resp_wake(bus
);
2318 /* Reset some F2 state stuff */
2319 bus
->rxskip
= false;
2320 bus
->tx_seq
= bus
->rx_seq
= 0;
2325 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
2326 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio
*bus
)
2328 unsigned long flags
;
2330 spin_lock_irqsave(&bus
->sdiodev
->irq_en_lock
, flags
);
2331 if (!bus
->sdiodev
->irq_en
&& !bus
->ipend
) {
2332 enable_irq(bus
->sdiodev
->irq
);
2333 bus
->sdiodev
->irq_en
= true;
2335 spin_unlock_irqrestore(&bus
->sdiodev
->irq_en_lock
, flags
);
2338 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio
*bus
)
2341 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
2343 static bool brcmf_sdbrcm_dpc(struct brcmf_sdio
*bus
)
2345 u32 intstatus
, newstatus
= 0;
2346 uint rxlimit
= bus
->rxbound
; /* Rx frames to read before resched */
2347 uint txlimit
= bus
->txbound
; /* Tx frames to send before resched */
2348 uint framecnt
= 0; /* Temporary counter of tx/rx frames */
2349 bool rxdone
= true; /* Flag for no more read data */
2350 bool resched
= false; /* Flag indicating resched wanted */
2353 brcmf_dbg(TRACE
, "Enter\n");
2355 /* Start with leftover status bits */
2356 intstatus
= bus
->intstatus
;
2360 /* If waiting for HTAVAIL, check status */
2361 if (bus
->clkstate
== CLK_PENDING
) {
2362 u8 clkctl
, devctl
= 0;
2365 /* Check for inconsistent device control */
2366 devctl
= brcmf_sdio_regrb(bus
->sdiodev
,
2367 SBSDIO_DEVICE_CTL
, &err
);
2369 brcmf_dbg(ERROR
, "error reading DEVCTL: %d\n", err
);
2370 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2374 /* Read CSR, if clock on switch to AVAIL, else ignore */
2375 clkctl
= brcmf_sdio_regrb(bus
->sdiodev
,
2376 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
2378 brcmf_dbg(ERROR
, "error reading CSR: %d\n",
2380 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2383 brcmf_dbg(INFO
, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2386 if (SBSDIO_HTAV(clkctl
)) {
2387 devctl
= brcmf_sdio_regrb(bus
->sdiodev
,
2388 SBSDIO_DEVICE_CTL
, &err
);
2390 brcmf_dbg(ERROR
, "error reading DEVCTL: %d\n",
2392 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2394 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
2395 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
2398 brcmf_dbg(ERROR
, "error writing DEVCTL: %d\n",
2400 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2402 bus
->clkstate
= CLK_AVAIL
;
2410 /* Make sure backplane clock is on */
2411 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, true);
2412 if (bus
->clkstate
== CLK_PENDING
)
2415 /* Pending interrupt indicates new device status */
2418 err
= r_sdreg32(bus
, &newstatus
,
2419 offsetof(struct sdpcmd_regs
, intstatus
));
2423 newstatus
&= bus
->hostintmask
;
2424 bus
->fcstate
= !!(newstatus
& I_HMB_FC_STATE
);
2426 err
= w_sdreg32(bus
, newstatus
,
2427 offsetof(struct sdpcmd_regs
,
2433 /* Merge new bits with previous */
2434 intstatus
|= newstatus
;
2437 /* Handle flow-control change: read new state in case our ack
2438 * crossed another change interrupt. If change still set, assume
2439 * FC ON for safety, let next loop through do the debounce.
2441 if (intstatus
& I_HMB_FC_CHANGE
) {
2442 intstatus
&= ~I_HMB_FC_CHANGE
;
2443 err
= w_sdreg32(bus
, I_HMB_FC_CHANGE
,
2444 offsetof(struct sdpcmd_regs
, intstatus
));
2446 err
= r_sdreg32(bus
, &newstatus
,
2447 offsetof(struct sdpcmd_regs
, intstatus
));
2448 bus
->f1regdata
+= 2;
2450 !!(newstatus
& (I_HMB_FC_STATE
| I_HMB_FC_CHANGE
));
2451 intstatus
|= (newstatus
& bus
->hostintmask
);
2454 /* Handle host mailbox indication */
2455 if (intstatus
& I_HMB_HOST_INT
) {
2456 intstatus
&= ~I_HMB_HOST_INT
;
2457 intstatus
|= brcmf_sdbrcm_hostmail(bus
);
2460 /* Generally don't ask for these, can get CRC errors... */
2461 if (intstatus
& I_WR_OOSYNC
) {
2462 brcmf_dbg(ERROR
, "Dongle reports WR_OOSYNC\n");
2463 intstatus
&= ~I_WR_OOSYNC
;
2466 if (intstatus
& I_RD_OOSYNC
) {
2467 brcmf_dbg(ERROR
, "Dongle reports RD_OOSYNC\n");
2468 intstatus
&= ~I_RD_OOSYNC
;
2471 if (intstatus
& I_SBINT
) {
2472 brcmf_dbg(ERROR
, "Dongle reports SBINT\n");
2473 intstatus
&= ~I_SBINT
;
2476 /* Would be active due to wake-wlan in gSPI */
2477 if (intstatus
& I_CHIPACTIVE
) {
2478 brcmf_dbg(INFO
, "Dongle reports CHIPACTIVE\n");
2479 intstatus
&= ~I_CHIPACTIVE
;
2482 /* Ignore frame indications if rxskip is set */
2484 intstatus
&= ~I_HMB_FRAME_IND
;
2486 /* On frame indication, read available frames */
2487 if (PKT_AVAILABLE()) {
2488 framecnt
= brcmf_sdbrcm_readframes(bus
, rxlimit
, &rxdone
);
2489 if (rxdone
|| bus
->rxskip
)
2490 intstatus
&= ~I_HMB_FRAME_IND
;
2491 rxlimit
-= min(framecnt
, rxlimit
);
2494 /* Keep still-pending events for next scheduling */
2495 bus
->intstatus
= intstatus
;
2498 brcmf_sdbrcm_clrintr(bus
);
2500 if (data_ok(bus
) && bus
->ctrl_frame_stat
&&
2501 (bus
->clkstate
== CLK_AVAIL
)) {
2504 ret
= brcmf_sdcard_send_buf(bus
->sdiodev
, bus
->sdiodev
->sbwad
,
2505 SDIO_FUNC_2
, F2SYNC
, (u8
*) bus
->ctrl_frame_buf
,
2506 (u32
) bus
->ctrl_frame_len
);
2509 /* On failure, abort the command and
2510 terminate the frame */
2511 brcmf_dbg(INFO
, "sdio error %d, abort command and terminate frame\n",
2515 brcmf_sdcard_abort(bus
->sdiodev
, SDIO_FUNC_2
);
2517 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_FRAMECTRL
,
2521 for (i
= 0; i
< 3; i
++) {
2523 hi
= brcmf_sdio_regrb(bus
->sdiodev
,
2524 SBSDIO_FUNC1_WFRAMEBCHI
,
2526 lo
= brcmf_sdio_regrb(bus
->sdiodev
,
2527 SBSDIO_FUNC1_WFRAMEBCLO
,
2529 bus
->f1regdata
+= 2;
2530 if ((hi
== 0) && (lo
== 0))
2536 bus
->tx_seq
= (bus
->tx_seq
+ 1) % SDPCM_SEQUENCE_WRAP
;
2538 brcmf_dbg(INFO
, "Return_dpc value is : %d\n", ret
);
2539 bus
->ctrl_frame_stat
= false;
2540 brcmf_sdbrcm_wait_event_wakeup(bus
);
2542 /* Send queued frames (limit 1 if rx may still be pending) */
2543 else if ((bus
->clkstate
== CLK_AVAIL
) && !bus
->fcstate
&&
2544 brcmu_pktq_mlen(&bus
->txq
, ~bus
->flowcontrol
) && txlimit
2546 framecnt
= rxdone
? txlimit
: min(txlimit
, bus
->txminmax
);
2547 framecnt
= brcmf_sdbrcm_sendfromq(bus
, framecnt
);
2548 txlimit
-= framecnt
;
2551 /* Resched if events or tx frames are pending,
2552 else await next interrupt */
2553 /* On failed register access, all bets are off:
2554 no resched or interrupts */
2555 if ((bus
->sdiodev
->bus_if
->state
== BRCMF_BUS_DOWN
) || (err
!= 0)) {
2556 brcmf_dbg(ERROR
, "failed backplane access over SDIO, halting operation\n");
2557 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2559 } else if (bus
->clkstate
== CLK_PENDING
) {
2560 brcmf_dbg(INFO
, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
2562 } else if (bus
->intstatus
|| bus
->ipend
||
2563 (!bus
->fcstate
&& brcmu_pktq_mlen(&bus
->txq
, ~bus
->flowcontrol
)
2564 && data_ok(bus
)) || PKT_AVAILABLE()) {
2568 bus
->dpc_sched
= resched
;
2570 /* If we're done for now, turn off clock request. */
2571 if ((bus
->clkstate
!= CLK_PENDING
)
2572 && bus
->idletime
== BRCMF_IDLE_IMMEDIATE
) {
2573 bus
->activity
= false;
2574 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
2582 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio
*bus
)
2584 struct list_head
*new_hd
;
2585 unsigned long flags
;
2588 new_hd
= kzalloc(sizeof(struct list_head
), GFP_ATOMIC
);
2590 new_hd
= kzalloc(sizeof(struct list_head
), GFP_KERNEL
);
2594 spin_lock_irqsave(&bus
->dpc_tl_lock
, flags
);
2595 list_add_tail(new_hd
, &bus
->dpc_tsklst
);
2596 spin_unlock_irqrestore(&bus
->dpc_tl_lock
, flags
);
2599 static int brcmf_sdbrcm_dpc_thread(void *data
)
2601 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*) data
;
2602 struct list_head
*cur_hd
, *tmp_hd
;
2603 unsigned long flags
;
2605 allow_signal(SIGTERM
);
2606 /* Run until signal received */
2608 if (kthread_should_stop())
2611 if (list_empty(&bus
->dpc_tsklst
))
2612 if (wait_for_completion_interruptible(&bus
->dpc_wait
))
2615 spin_lock_irqsave(&bus
->dpc_tl_lock
, flags
);
2616 list_for_each_safe(cur_hd
, tmp_hd
, &bus
->dpc_tsklst
) {
2617 spin_unlock_irqrestore(&bus
->dpc_tl_lock
, flags
);
2619 if (bus
->sdiodev
->bus_if
->state
== BRCMF_BUS_DOWN
) {
2620 /* after stopping the bus, exit thread */
2621 brcmf_sdbrcm_bus_stop(bus
->sdiodev
->dev
);
2622 bus
->dpc_tsk
= NULL
;
2623 spin_lock_irqsave(&bus
->dpc_tl_lock
, flags
);
2627 if (brcmf_sdbrcm_dpc(bus
))
2628 brcmf_sdbrcm_adddpctsk(bus
);
2630 spin_lock_irqsave(&bus
->dpc_tl_lock
, flags
);
2634 spin_unlock_irqrestore(&bus
->dpc_tl_lock
, flags
);
2639 static int brcmf_sdbrcm_bus_txdata(struct device
*dev
, struct sk_buff
*pkt
)
2643 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2644 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2645 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2647 brcmf_dbg(TRACE
, "Enter\n");
2651 /* Add space for the header */
2652 skb_push(pkt
, SDPCM_HDRLEN
);
2653 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2655 prec
= prio2prec((pkt
->priority
& PRIOMASK
));
2657 /* Check for existing queue, current flow-control,
2658 pending event, or pending clock */
2659 brcmf_dbg(TRACE
, "deferring pktq len %d\n", pktq_len(&bus
->txq
));
2662 /* Priority based enq */
2663 spin_lock_bh(&bus
->txqlock
);
2664 if (!brcmf_c_prec_enq(bus
->sdiodev
->dev
, &bus
->txq
, pkt
, prec
)) {
2665 skb_pull(pkt
, SDPCM_HDRLEN
);
2666 brcmf_txcomplete(bus
->sdiodev
->dev
, pkt
, false);
2667 brcmu_pkt_buf_free_skb(pkt
);
2668 brcmf_dbg(ERROR
, "out of bus->txq !!!\n");
2673 spin_unlock_bh(&bus
->txqlock
);
2675 if (pktq_len(&bus
->txq
) >= TXHI
) {
2677 brcmf_txflowcontrol(bus
->sdiodev
->dev
, 0, ON
);
2681 if (pktq_plen(&bus
->txq
, prec
) > qcount
[prec
])
2682 qcount
[prec
] = pktq_plen(&bus
->txq
, prec
);
2684 /* Schedule DPC if needed to send queued packet(s) */
2685 if (!bus
->dpc_sched
) {
2686 bus
->dpc_sched
= true;
2688 brcmf_sdbrcm_adddpctsk(bus
);
2689 complete(&bus
->dpc_wait
);
2697 brcmf_sdbrcm_membytes(struct brcmf_sdio
*bus
, bool write
, u32 address
, u8
*data
,
2704 /* Determine initial transfer parameters */
2705 sdaddr
= address
& SBSDIO_SB_OFT_ADDR_MASK
;
2706 if ((sdaddr
+ size
) & SBSDIO_SBWINDOW_MASK
)
2707 dsize
= (SBSDIO_SB_OFT_ADDR_LIMIT
- sdaddr
);
2711 /* Set the backplane window to include the start address */
2712 bcmerror
= brcmf_sdcard_set_sbaddr_window(bus
->sdiodev
, address
);
2714 brcmf_dbg(ERROR
, "window change failed\n");
2718 /* Do the transfer(s) */
2720 brcmf_dbg(INFO
, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2721 write
? "write" : "read", dsize
,
2722 sdaddr
, address
& SBSDIO_SBWINDOW_MASK
);
2723 bcmerror
= brcmf_sdcard_rwdata(bus
->sdiodev
, write
,
2724 sdaddr
, data
, dsize
);
2726 brcmf_dbg(ERROR
, "membytes transfer failed\n");
2730 /* Adjust for next transfer (if any) */
2735 bcmerror
= brcmf_sdcard_set_sbaddr_window(bus
->sdiodev
,
2738 brcmf_dbg(ERROR
, "window change failed\n");
2742 dsize
= min_t(uint
, SBSDIO_SB_OFT_ADDR_LIMIT
, size
);
2747 /* Return the window to backplane enumeration space for core access */
2748 if (brcmf_sdcard_set_sbaddr_window(bus
->sdiodev
, bus
->sdiodev
->sbwad
))
2749 brcmf_dbg(ERROR
, "FAILED to set window back to 0x%x\n",
2750 bus
->sdiodev
->sbwad
);
2756 #define CONSOLE_LINE_MAX 192
2758 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio
*bus
)
2760 struct brcmf_console
*c
= &bus
->console
;
2761 u8 line
[CONSOLE_LINE_MAX
], ch
;
2765 /* Don't do anything until FWREADY updates console address */
2766 if (bus
->console_addr
== 0)
2769 /* Read console log struct */
2770 addr
= bus
->console_addr
+ offsetof(struct rte_console
, log_le
);
2771 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
, (u8
*)&c
->log_le
,
2776 /* Allocate console buffer (one time only) */
2777 if (c
->buf
== NULL
) {
2778 c
->bufsize
= le32_to_cpu(c
->log_le
.buf_size
);
2779 c
->buf
= kmalloc(c
->bufsize
, GFP_ATOMIC
);
2784 idx
= le32_to_cpu(c
->log_le
.idx
);
2786 /* Protect against corrupt value */
2787 if (idx
> c
->bufsize
)
2790 /* Skip reading the console buffer if the index pointer
2795 /* Read the console buffer */
2796 addr
= le32_to_cpu(c
->log_le
.buf
);
2797 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
, c
->buf
, c
->bufsize
);
2801 while (c
->last
!= idx
) {
2802 for (n
= 0; n
< CONSOLE_LINE_MAX
- 2; n
++) {
2803 if (c
->last
== idx
) {
2804 /* This would output a partial line.
2806 * the buffer pointer and output this
2807 * line next time around.
2812 c
->last
= c
->bufsize
- n
;
2815 ch
= c
->buf
[c
->last
];
2816 c
->last
= (c
->last
+ 1) % c
->bufsize
;
2823 if (line
[n
- 1] == '\r')
2826 pr_debug("CONSOLE: %s\n", line
);
2835 static int brcmf_tx_frame(struct brcmf_sdio
*bus
, u8
*frame
, u16 len
)
2840 bus
->ctrl_frame_stat
= false;
2841 ret
= brcmf_sdcard_send_buf(bus
->sdiodev
, bus
->sdiodev
->sbwad
,
2842 SDIO_FUNC_2
, F2SYNC
, frame
, len
);
2845 /* On failure, abort the command and terminate the frame */
2846 brcmf_dbg(INFO
, "sdio error %d, abort command and terminate frame\n",
2850 brcmf_sdcard_abort(bus
->sdiodev
, SDIO_FUNC_2
);
2852 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_FRAMECTRL
,
2856 for (i
= 0; i
< 3; i
++) {
2858 hi
= brcmf_sdio_regrb(bus
->sdiodev
,
2859 SBSDIO_FUNC1_WFRAMEBCHI
, NULL
);
2860 lo
= brcmf_sdio_regrb(bus
->sdiodev
,
2861 SBSDIO_FUNC1_WFRAMEBCLO
, NULL
);
2862 bus
->f1regdata
+= 2;
2863 if (hi
== 0 && lo
== 0)
2869 bus
->tx_seq
= (bus
->tx_seq
+ 1) % SDPCM_SEQUENCE_WRAP
;
2875 brcmf_sdbrcm_bus_txctl(struct device
*dev
, unsigned char *msg
, uint msglen
)
2883 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2884 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2885 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2887 brcmf_dbg(TRACE
, "Enter\n");
2889 /* Back the pointer to make a room for bus header */
2890 frame
= msg
- SDPCM_HDRLEN
;
2891 len
= (msglen
+= SDPCM_HDRLEN
);
2893 /* Add alignment padding (optional for ctl frames) */
2894 doff
= ((unsigned long)frame
% BRCMF_SDALIGN
);
2899 memset(frame
, 0, doff
+ SDPCM_HDRLEN
);
2901 /* precondition: doff < BRCMF_SDALIGN */
2902 doff
+= SDPCM_HDRLEN
;
2904 /* Round send length to next SDIO block */
2905 if (bus
->roundup
&& bus
->blocksize
&& (len
> bus
->blocksize
)) {
2906 u16 pad
= bus
->blocksize
- (len
% bus
->blocksize
);
2907 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
))
2909 } else if (len
% BRCMF_SDALIGN
) {
2910 len
+= BRCMF_SDALIGN
- (len
% BRCMF_SDALIGN
);
2913 /* Satisfy length-alignment requirements */
2914 if (len
& (ALIGNMENT
- 1))
2915 len
= roundup(len
, ALIGNMENT
);
2917 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2919 /* Need to lock here to protect txseq and SDIO tx calls */
2924 /* Make sure backplane clock is on */
2925 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
2927 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2928 *(__le16
*) frame
= cpu_to_le16((u16
) msglen
);
2929 *(((__le16
*) frame
) + 1) = cpu_to_le16(~msglen
);
2931 /* Software tag: channel, sequence number, data offset */
2933 ((SDPCM_CONTROL_CHANNEL
<< SDPCM_CHANNEL_SHIFT
) &
2935 | bus
->tx_seq
| ((doff
<< SDPCM_DOFFSET_SHIFT
) &
2936 SDPCM_DOFFSET_MASK
);
2937 put_unaligned_le32(swheader
, frame
+ SDPCM_FRAMETAG_LEN
);
2938 put_unaligned_le32(0, frame
+ SDPCM_FRAMETAG_LEN
+ sizeof(swheader
));
2940 if (!data_ok(bus
)) {
2941 brcmf_dbg(INFO
, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2942 bus
->tx_max
, bus
->tx_seq
);
2943 bus
->ctrl_frame_stat
= true;
2945 bus
->ctrl_frame_buf
= frame
;
2946 bus
->ctrl_frame_len
= len
;
2948 brcmf_sdbrcm_wait_for_event(bus
, &bus
->ctrl_frame_stat
);
2950 if (!bus
->ctrl_frame_stat
) {
2951 brcmf_dbg(INFO
, "ctrl_frame_stat == false\n");
2954 brcmf_dbg(INFO
, "ctrl_frame_stat == true\n");
2960 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2961 frame
, len
, "Tx Frame:\n");
2962 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2964 frame
, min_t(u16
, len
, 16), "TxHdr:\n");
2967 ret
= brcmf_tx_frame(bus
, frame
, len
);
2968 } while (ret
< 0 && retries
++ < TXRETRIES
);
2971 if ((bus
->idletime
== BRCMF_IDLE_IMMEDIATE
) && !bus
->dpc_sched
) {
2972 bus
->activity
= false;
2973 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, true);
2983 return ret
? -EIO
: 0;
2987 brcmf_sdbrcm_bus_rxctl(struct device
*dev
, unsigned char *msg
, uint msglen
)
2992 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2993 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2994 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2996 brcmf_dbg(TRACE
, "Enter\n");
2998 /* Wait until control frame is available */
2999 timeleft
= brcmf_sdbrcm_dcmd_resp_wait(bus
, &bus
->rxlen
, &pending
);
3003 memcpy(msg
, bus
->rxctl
, min(msglen
, rxlen
));
3008 brcmf_dbg(CTL
, "resumed on rxctl frame, got %d expected %d\n",
3010 } else if (timeleft
== 0) {
3011 brcmf_dbg(ERROR
, "resumed on timeout\n");
3012 } else if (pending
) {
3013 brcmf_dbg(CTL
, "cancelled\n");
3014 return -ERESTARTSYS
;
3016 brcmf_dbg(CTL
, "resumed for unknown reason?\n");
3024 return rxlen
? (int)rxlen
: -ETIMEDOUT
;
3027 static int brcmf_sdbrcm_downloadvars(struct brcmf_sdio
*bus
, void *arg
, int len
)
3031 brcmf_dbg(TRACE
, "Enter\n");
3033 /* Basic sanity checks */
3034 if (bus
->sdiodev
->bus_if
->drvr_up
) {
3035 bcmerror
= -EISCONN
;
3039 bcmerror
= -EOVERFLOW
;
3043 /* Free the old ones and replace with passed variables */
3046 bus
->vars
= kmalloc(len
, GFP_ATOMIC
);
3047 bus
->varsz
= bus
->vars
? len
: 0;
3048 if (bus
->vars
== NULL
) {
3053 /* Copy the passed variables, which should include the
3054 terminating double-null */
3055 memcpy(bus
->vars
, arg
, bus
->varsz
);
3060 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio
*bus
)
3069 char *nvram_ularray
;
3072 /* Even if there are no vars are to be written, we still
3073 need to set the ramsize. */
3074 varsize
= bus
->varsz
? roundup(bus
->varsz
, 4) : 0;
3075 varaddr
= (bus
->ramsize
- 4) - varsize
;
3078 vbuffer
= kzalloc(varsize
, GFP_ATOMIC
);
3082 memcpy(vbuffer
, bus
->vars
, bus
->varsz
);
3084 /* Write the vars list */
3086 brcmf_sdbrcm_membytes(bus
, true, varaddr
, vbuffer
, varsize
);
3088 /* Verify NVRAM bytes */
3089 brcmf_dbg(INFO
, "Compare NVRAM dl & ul; varsize=%d\n", varsize
);
3090 nvram_ularray
= kmalloc(varsize
, GFP_ATOMIC
);
3091 if (!nvram_ularray
) {
3096 /* Upload image to verify downloaded contents. */
3097 memset(nvram_ularray
, 0xaa, varsize
);
3099 /* Read the vars list to temp buffer for comparison */
3101 brcmf_sdbrcm_membytes(bus
, false, varaddr
, nvram_ularray
,
3104 brcmf_dbg(ERROR
, "error %d on reading %d nvram bytes at 0x%08x\n",
3105 bcmerror
, varsize
, varaddr
);
3107 /* Compare the org NVRAM with the one read from RAM */
3108 if (memcmp(vbuffer
, nvram_ularray
, varsize
))
3109 brcmf_dbg(ERROR
, "Downloaded NVRAM image is corrupted\n");
3111 brcmf_dbg(ERROR
, "Download/Upload/Compare of NVRAM ok\n");
3113 kfree(nvram_ularray
);
3119 /* adjust to the user specified RAM */
3120 brcmf_dbg(INFO
, "Physical memory size: %d\n", bus
->ramsize
);
3121 brcmf_dbg(INFO
, "Vars are at %d, orig varsize is %d\n",
3123 varsize
= ((bus
->ramsize
- 4) - varaddr
);
3126 * Determine the length token:
3127 * Varsize, converted to words, in lower 16-bits, checksum
3132 varsizew_le
= cpu_to_le32(0);
3134 varsizew
= varsize
/ 4;
3135 varsizew
= (~varsizew
<< 16) | (varsizew
& 0x0000FFFF);
3136 varsizew_le
= cpu_to_le32(varsizew
);
3139 brcmf_dbg(INFO
, "New varsize is %d, length token=0x%08x\n",
3142 /* Write the length token to the last word */
3143 bcmerror
= brcmf_sdbrcm_membytes(bus
, true, (bus
->ramsize
- 4),
3144 (u8
*)&varsizew_le
, 4);
3149 static int brcmf_sdbrcm_download_state(struct brcmf_sdio
*bus
, bool enter
)
3152 struct chip_info
*ci
= bus
->ci
;
3154 /* To enter download state, disable ARM and reset SOCRAM.
3155 * To exit download state, simply reset ARM (default is RAM boot).
3158 bus
->alp_only
= true;
3160 ci
->coredisable(bus
->sdiodev
, ci
, BCMA_CORE_ARM_CM3
);
3162 ci
->resetcore(bus
->sdiodev
, ci
, BCMA_CORE_INTERNAL_MEM
);
3164 /* Clear the top bit of memory */
3167 brcmf_sdbrcm_membytes(bus
, true, bus
->ramsize
- 4,
3171 if (!ci
->iscoreup(bus
->sdiodev
, ci
, BCMA_CORE_INTERNAL_MEM
)) {
3172 brcmf_dbg(ERROR
, "SOCRAM core is down after reset?\n");
3177 bcmerror
= brcmf_sdbrcm_write_vars(bus
);
3179 brcmf_dbg(ERROR
, "no vars written to RAM\n");
3183 w_sdreg32(bus
, 0xFFFFFFFF,
3184 offsetof(struct sdpcmd_regs
, intstatus
));
3186 ci
->resetcore(bus
->sdiodev
, ci
, BCMA_CORE_ARM_CM3
);
3188 /* Allow HT Clock now that the ARM is running. */
3189 bus
->alp_only
= false;
3191 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_LOAD
;
3197 static int brcmf_sdbrcm_get_image(char *buf
, int len
, struct brcmf_sdio
*bus
)
3199 if (bus
->firmware
->size
< bus
->fw_ptr
+ len
)
3200 len
= bus
->firmware
->size
- bus
->fw_ptr
;
3202 memcpy(buf
, &bus
->firmware
->data
[bus
->fw_ptr
], len
);
3207 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio
*bus
)
3211 u8
*memblock
= NULL
, *memptr
;
3214 brcmf_dbg(INFO
, "Enter\n");
3216 ret
= request_firmware(&bus
->firmware
, BRCMF_SDIO_FW_NAME
,
3217 &bus
->sdiodev
->func
[2]->dev
);
3219 brcmf_dbg(ERROR
, "Fail to request firmware %d\n", ret
);
3224 memptr
= memblock
= kmalloc(MEMBLOCK
+ BRCMF_SDALIGN
, GFP_ATOMIC
);
3225 if (memblock
== NULL
) {
3229 if ((u32
)(unsigned long)memblock
% BRCMF_SDALIGN
)
3230 memptr
+= (BRCMF_SDALIGN
-
3231 ((u32
)(unsigned long)memblock
% BRCMF_SDALIGN
));
3233 /* Download image */
3235 brcmf_sdbrcm_get_image((char *)memptr
, MEMBLOCK
, bus
))) {
3236 ret
= brcmf_sdbrcm_membytes(bus
, true, offset
, memptr
, len
);
3238 brcmf_dbg(ERROR
, "error %d on writing %d membytes at 0x%08x\n",
3239 ret
, MEMBLOCK
, offset
);
3249 release_firmware(bus
->firmware
);
3256 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3257 * and ending in a NUL.
3258 * Removes carriage returns, empty lines, comment lines, and converts
3260 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3264 static uint
brcmf_process_nvram_vars(char *varbuf
, uint len
)
3273 findNewline
= false;
3276 for (n
= 0; n
< len
; n
++) {
3279 if (varbuf
[n
] == '\r')
3281 if (findNewline
&& varbuf
[n
] != '\n')
3283 findNewline
= false;
3284 if (varbuf
[n
] == '#') {
3288 if (varbuf
[n
] == '\n') {
3298 buf_len
= dp
- varbuf
;
3300 while (dp
< varbuf
+ n
)
3306 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio
*bus
)
3309 char *memblock
= NULL
;
3313 ret
= request_firmware(&bus
->firmware
, BRCMF_SDIO_NV_NAME
,
3314 &bus
->sdiodev
->func
[2]->dev
);
3316 brcmf_dbg(ERROR
, "Fail to request nvram %d\n", ret
);
3321 memblock
= kmalloc(MEMBLOCK
, GFP_ATOMIC
);
3322 if (memblock
== NULL
) {
3327 len
= brcmf_sdbrcm_get_image(memblock
, MEMBLOCK
, bus
);
3329 if (len
> 0 && len
< MEMBLOCK
) {
3330 bufp
= (char *)memblock
;
3332 len
= brcmf_process_nvram_vars(bufp
, len
);
3336 ret
= brcmf_sdbrcm_downloadvars(bus
, memblock
, len
+ 1);
3338 brcmf_dbg(ERROR
, "error downloading vars: %d\n", ret
);
3340 brcmf_dbg(ERROR
, "error reading nvram file: %d\n", len
);
3347 release_firmware(bus
->firmware
);
3353 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio
*bus
)
3357 /* Keep arm in reset */
3358 if (brcmf_sdbrcm_download_state(bus
, true)) {
3359 brcmf_dbg(ERROR
, "error placing ARM core in reset\n");
3363 /* External image takes precedence if specified */
3364 if (brcmf_sdbrcm_download_code_file(bus
)) {
3365 brcmf_dbg(ERROR
, "dongle image file download failed\n");
3369 /* External nvram takes precedence if specified */
3370 if (brcmf_sdbrcm_download_nvram(bus
))
3371 brcmf_dbg(ERROR
, "dongle nvram file download failed\n");
3373 /* Take arm out of reset */
3374 if (brcmf_sdbrcm_download_state(bus
, false)) {
3375 brcmf_dbg(ERROR
, "error getting out of ARM core reset\n");
3386 brcmf_sdbrcm_download_firmware(struct brcmf_sdio
*bus
)
3390 /* Download the firmware */
3391 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3393 ret
= _brcmf_sdbrcm_download_firmware(bus
) == 0;
3395 brcmf_sdbrcm_clkctl(bus
, CLK_SDONLY
, false);
3400 static int brcmf_sdbrcm_bus_init(struct device
*dev
)
3402 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
3403 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
3404 struct brcmf_sdio
*bus
= sdiodev
->bus
;
3405 unsigned long timeout
;
3410 brcmf_dbg(TRACE
, "Enter\n");
3412 /* try to download image and nvram to the dongle */
3413 if (bus_if
->state
== BRCMF_BUS_DOWN
) {
3414 if (!(brcmf_sdbrcm_download_firmware(bus
)))
3418 if (!bus
->sdiodev
->bus_if
->drvr
)
3421 /* Start the watchdog timer */
3423 brcmf_sdbrcm_wd_timer(bus
, BRCMF_WD_POLL_MS
);
3427 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3428 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3429 if (bus
->clkstate
!= CLK_AVAIL
)
3432 /* Force clocks on backplane to be sure F2 interrupt propagates */
3433 saveclk
= brcmf_sdio_regrb(bus
->sdiodev
,
3434 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
3436 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
3437 (saveclk
| SBSDIO_FORCE_HT
), &err
);
3440 brcmf_dbg(ERROR
, "Failed to force clock for F2: err %d\n", err
);
3444 /* Enable function 2 (frame transfers) */
3445 w_sdreg32(bus
, SDPCM_PROT_VERSION
<< SMB_DATA_VERSION_SHIFT
,
3446 offsetof(struct sdpcmd_regs
, tosbmailboxdata
));
3447 enable
= (SDIO_FUNC_ENABLE_1
| SDIO_FUNC_ENABLE_2
);
3449 brcmf_sdio_regwb(bus
->sdiodev
, SDIO_CCCR_IOEx
, enable
, NULL
);
3451 timeout
= jiffies
+ msecs_to_jiffies(BRCMF_WAIT_F2RDY
);
3453 while (enable
!= ready
) {
3454 ready
= brcmf_sdio_regrb(bus
->sdiodev
,
3455 SDIO_CCCR_IORx
, NULL
);
3456 if (time_after(jiffies
, timeout
))
3458 else if (time_after(jiffies
, timeout
- BRCMF_WAIT_F2RDY
+ 50))
3459 /* prevent busy waiting if it takes too long */
3460 msleep_interruptible(20);
3463 brcmf_dbg(INFO
, "enable 0x%02x, ready 0x%02x\n", enable
, ready
);
3465 /* If F2 successfully enabled, set core and enable interrupts */
3466 if (ready
== enable
) {
3467 /* Set up the interrupt mask and enable interrupts */
3468 bus
->hostintmask
= HOSTINTMASK
;
3469 w_sdreg32(bus
, bus
->hostintmask
,
3470 offsetof(struct sdpcmd_regs
, hostintmask
));
3472 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_WATERMARK
, 8, &err
);
3474 /* Disable F2 again */
3475 enable
= SDIO_FUNC_ENABLE_1
;
3476 brcmf_sdio_regwb(bus
->sdiodev
, SDIO_CCCR_IOEx
, enable
, NULL
);
3480 /* Restore previous clock setting */
3481 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
, saveclk
, &err
);
3484 ret
= brcmf_sdio_intr_register(bus
->sdiodev
);
3486 brcmf_dbg(ERROR
, "intr register failed:%d\n", ret
);
3489 /* If we didn't come up, turn off backplane clock */
3490 if (bus_if
->state
!= BRCMF_BUS_DATA
)
3491 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
3499 void brcmf_sdbrcm_isr(void *arg
)
3501 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*) arg
;
3503 brcmf_dbg(TRACE
, "Enter\n");
3506 brcmf_dbg(ERROR
, "bus is null pointer, exiting\n");
3510 if (bus
->sdiodev
->bus_if
->state
== BRCMF_BUS_DOWN
) {
3511 brcmf_dbg(ERROR
, "bus is down. we have nothing to do\n");
3514 /* Count the interrupt call */
3518 /* Shouldn't get this interrupt if we're sleeping? */
3519 if (bus
->sleeping
) {
3520 brcmf_dbg(ERROR
, "INTERRUPT WHILE SLEEPING??\n");
3524 /* Disable additional interrupts (is this needed now)? */
3526 brcmf_dbg(ERROR
, "isr w/o interrupt configured!\n");
3528 bus
->dpc_sched
= true;
3530 brcmf_sdbrcm_adddpctsk(bus
);
3531 complete(&bus
->dpc_wait
);
3535 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio
*bus
)
3538 struct brcmf_bus
*bus_if
= dev_get_drvdata(bus
->sdiodev
->dev
);
3541 brcmf_dbg(TIMER
, "Enter\n");
3543 /* Ignore the timer if simulating bus down */
3549 /* Poll period: check device if appropriate. */
3550 if (bus
->poll
&& (++bus
->polltick
>= bus
->pollrate
)) {
3553 /* Reset poll tick */
3556 /* Check device if no interrupts */
3557 if (!bus
->intr
|| (bus
->intrcount
== bus
->lastintrs
)) {
3559 if (!bus
->dpc_sched
) {
3561 devpend
= brcmf_sdio_regrb(bus
->sdiodev
,
3565 devpend
& (INTR_STATUS_FUNC1
|
3569 /* If there is something, make like the ISR and
3575 bus
->dpc_sched
= true;
3577 brcmf_sdbrcm_adddpctsk(bus
);
3578 complete(&bus
->dpc_wait
);
3583 /* Update interrupt tracking */
3584 bus
->lastintrs
= bus
->intrcount
;
3587 /* Poll for console output periodically */
3588 if (bus_if
->state
== BRCMF_BUS_DATA
&&
3589 bus
->console_interval
!= 0) {
3590 bus
->console
.count
+= BRCMF_WD_POLL_MS
;
3591 if (bus
->console
.count
>= bus
->console_interval
) {
3592 bus
->console
.count
-= bus
->console_interval
;
3593 /* Make sure backplane clock is on */
3594 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3595 if (brcmf_sdbrcm_readconsole(bus
) < 0)
3597 bus
->console_interval
= 0;
3602 /* On idle timeout clear activity flag and/or turn off clock */
3603 if ((bus
->idletime
> 0) && (bus
->clkstate
== CLK_AVAIL
)) {
3604 if (++bus
->idlecount
>= bus
->idletime
) {
3606 if (bus
->activity
) {
3607 bus
->activity
= false;
3608 brcmf_sdbrcm_wd_timer(bus
, BRCMF_WD_POLL_MS
);
3610 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
3620 static bool brcmf_sdbrcm_chipmatch(u16 chipid
)
3622 if (chipid
== BCM4329_CHIP_ID
)
3624 if (chipid
== BCM4330_CHIP_ID
)
3629 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio
*bus
)
3631 brcmf_dbg(TRACE
, "Enter\n");
3634 bus
->rxctl
= bus
->rxbuf
= NULL
;
3637 kfree(bus
->databuf
);
3638 bus
->databuf
= NULL
;
3641 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio
*bus
)
3643 brcmf_dbg(TRACE
, "Enter\n");
3645 if (bus
->sdiodev
->bus_if
->maxctl
) {
3647 roundup((bus
->sdiodev
->bus_if
->maxctl
+ SDPCM_HDRLEN
),
3648 ALIGNMENT
) + BRCMF_SDALIGN
;
3649 bus
->rxbuf
= kmalloc(bus
->rxblen
, GFP_ATOMIC
);
3654 /* Allocate buffer to receive glomed packet */
3655 bus
->databuf
= kmalloc(MAX_DATA_BUF
, GFP_ATOMIC
);
3656 if (!(bus
->databuf
)) {
3657 /* release rxbuf which was already located as above */
3663 /* Align the buffer */
3664 if ((unsigned long)bus
->databuf
% BRCMF_SDALIGN
)
3665 bus
->dataptr
= bus
->databuf
+ (BRCMF_SDALIGN
-
3666 ((unsigned long)bus
->databuf
% BRCMF_SDALIGN
));
3668 bus
->dataptr
= bus
->databuf
;
3677 brcmf_sdbrcm_probe_attach(struct brcmf_sdio
*bus
, u32 regsva
)
3685 bus
->alp_only
= true;
3687 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3688 brcmf_sdio_regrl(bus
->sdiodev
, SI_ENUM_BASE
, NULL
));
3691 * Force PLL off until brcmf_sdio_chip_attach()
3692 * programs PLL control regs
3695 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
3696 BRCMF_INIT_CLKCTL1
, &err
);
3698 clkctl
= brcmf_sdio_regrb(bus
->sdiodev
,
3699 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
3701 if (err
|| ((clkctl
& ~SBSDIO_AVBITS
) != BRCMF_INIT_CLKCTL1
)) {
3702 brcmf_dbg(ERROR
, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3703 err
, BRCMF_INIT_CLKCTL1
, clkctl
);
3707 if (brcmf_sdio_chip_attach(bus
->sdiodev
, &bus
->ci
, regsva
)) {
3708 brcmf_dbg(ERROR
, "brcmf_sdio_chip_attach failed!\n");
3712 if (!brcmf_sdbrcm_chipmatch((u16
) bus
->ci
->chip
)) {
3713 brcmf_dbg(ERROR
, "unsupported chip: 0x%04x\n", bus
->ci
->chip
);
3717 brcmf_sdio_chip_drivestrengthinit(bus
->sdiodev
, bus
->ci
,
3718 SDIO_DRIVE_STRENGTH
);
3720 /* Get info on the SOCRAM cores... */
3721 bus
->ramsize
= bus
->ci
->ramsize
;
3722 if (!(bus
->ramsize
)) {
3723 brcmf_dbg(ERROR
, "failed to find SOCRAM memory!\n");
3727 /* Set core control so an SDIO reset does a backplane reset */
3728 idx
= brcmf_sdio_chip_getinfidx(bus
->ci
, BCMA_CORE_SDIO_DEV
);
3729 reg_addr
= bus
->ci
->c_inf
[idx
].base
+
3730 offsetof(struct sdpcmd_regs
, corecontrol
);
3731 reg_val
= brcmf_sdio_regrl(bus
->sdiodev
, reg_addr
, NULL
);
3732 brcmf_sdio_regwl(bus
->sdiodev
, reg_addr
, reg_val
| CC_BPRESEN
, NULL
);
3734 brcmu_pktq_init(&bus
->txq
, (PRIOMASK
+ 1), TXQLEN
);
3736 /* Locate an appropriately-aligned portion of hdrbuf */
3737 bus
->rxhdr
= (u8
*) roundup((unsigned long)&bus
->hdrbuf
[0],
3740 /* Set the poll and/or interrupt flags */
3752 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio
*bus
)
3754 brcmf_dbg(TRACE
, "Enter\n");
3756 /* Disable F2 to clear any intermediate frame state on the dongle */
3757 brcmf_sdio_regwb(bus
->sdiodev
, SDIO_CCCR_IOEx
,
3758 SDIO_FUNC_ENABLE_1
, NULL
);
3760 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
3761 bus
->sleeping
= false;
3762 bus
->rxflow
= false;
3764 /* Done with backplane-dependent accesses, can drop clock... */
3765 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
, 0, NULL
);
3767 /* ...and initialize clock/power states */
3768 bus
->clkstate
= CLK_SDONLY
;
3769 bus
->idletime
= BRCMF_IDLE_INTERVAL
;
3770 bus
->idleclock
= BRCMF_IDLE_ACTIVE
;
3772 /* Query the F2 block size, set roundup accordingly */
3773 bus
->blocksize
= bus
->sdiodev
->func
[2]->cur_blksize
;
3774 bus
->roundup
= min(max_roundup
, bus
->blocksize
);
3776 /* bus module does not support packet chaining */
3777 bus
->use_rxchain
= false;
3778 bus
->sd_rxchain
= false;
3784 brcmf_sdbrcm_watchdog_thread(void *data
)
3786 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*)data
;
3788 allow_signal(SIGTERM
);
3789 /* Run until signal received */
3791 if (kthread_should_stop())
3793 if (!wait_for_completion_interruptible(&bus
->watchdog_wait
)) {
3794 brcmf_sdbrcm_bus_watchdog(bus
);
3795 /* Count the tick for reference */
3804 brcmf_sdbrcm_watchdog(unsigned long data
)
3806 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*)data
;
3808 if (bus
->watchdog_tsk
) {
3809 complete(&bus
->watchdog_wait
);
3810 /* Reschedule the watchdog */
3811 if (bus
->wd_timer_valid
)
3812 mod_timer(&bus
->timer
,
3813 jiffies
+ BRCMF_WD_POLL_MS
* HZ
/ 1000);
3817 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio
*bus
)
3819 brcmf_dbg(TRACE
, "Enter\n");
3822 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3823 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
3824 brcmf_sdio_chip_detach(&bus
->ci
);
3825 if (bus
->vars
&& bus
->varsz
)
3830 brcmf_dbg(TRACE
, "Disconnected\n");
3833 /* Detach and free everything */
3834 static void brcmf_sdbrcm_release(struct brcmf_sdio
*bus
)
3836 brcmf_dbg(TRACE
, "Enter\n");
3839 /* De-register interrupt handler */
3840 brcmf_sdio_intr_unregister(bus
->sdiodev
);
3842 if (bus
->sdiodev
->bus_if
->drvr
) {
3843 brcmf_detach(bus
->sdiodev
->dev
);
3844 brcmf_sdbrcm_release_dongle(bus
);
3847 brcmf_sdbrcm_release_malloc(bus
);
3852 brcmf_dbg(TRACE
, "Disconnected\n");
3855 void *brcmf_sdbrcm_probe(u32 regsva
, struct brcmf_sdio_dev
*sdiodev
)
3858 struct brcmf_sdio
*bus
;
3860 brcmf_dbg(TRACE
, "Enter\n");
3862 /* We make an assumption about address window mappings:
3863 * regsva == SI_ENUM_BASE*/
3865 /* Allocate private bus interface state */
3866 bus
= kzalloc(sizeof(struct brcmf_sdio
), GFP_ATOMIC
);
3870 bus
->sdiodev
= sdiodev
;
3872 skb_queue_head_init(&bus
->glom
);
3873 bus
->txbound
= BRCMF_TXBOUND
;
3874 bus
->rxbound
= BRCMF_RXBOUND
;
3875 bus
->txminmax
= BRCMF_TXMINMAX
;
3876 bus
->tx_seq
= SDPCM_SEQUENCE_WRAP
- 1;
3877 bus
->usebufpool
= false; /* Use bufpool if allocated,
3878 else use locally malloced rxbuf */
3880 /* attempt to attach to the dongle */
3881 if (!(brcmf_sdbrcm_probe_attach(bus
, regsva
))) {
3882 brcmf_dbg(ERROR
, "brcmf_sdbrcm_probe_attach failed\n");
3886 spin_lock_init(&bus
->txqlock
);
3887 init_waitqueue_head(&bus
->ctrl_wait
);
3888 init_waitqueue_head(&bus
->dcmd_resp_wait
);
3890 /* Set up the watchdog timer */
3891 init_timer(&bus
->timer
);
3892 bus
->timer
.data
= (unsigned long)bus
;
3893 bus
->timer
.function
= brcmf_sdbrcm_watchdog
;
3895 /* Initialize thread based operation and lock */
3896 sema_init(&bus
->sdsem
, 1);
3898 /* Initialize watchdog thread */
3899 init_completion(&bus
->watchdog_wait
);
3900 bus
->watchdog_tsk
= kthread_run(brcmf_sdbrcm_watchdog_thread
,
3901 bus
, "brcmf_watchdog");
3902 if (IS_ERR(bus
->watchdog_tsk
)) {
3903 pr_warn("brcmf_watchdog thread failed to start\n");
3904 bus
->watchdog_tsk
= NULL
;
3906 /* Initialize DPC thread */
3907 init_completion(&bus
->dpc_wait
);
3908 INIT_LIST_HEAD(&bus
->dpc_tsklst
);
3909 spin_lock_init(&bus
->dpc_tl_lock
);
3910 bus
->dpc_tsk
= kthread_run(brcmf_sdbrcm_dpc_thread
,
3912 if (IS_ERR(bus
->dpc_tsk
)) {
3913 pr_warn("brcmf_dpc thread failed to start\n");
3914 bus
->dpc_tsk
= NULL
;
3917 /* Assign bus interface call back */
3918 bus
->sdiodev
->bus_if
->brcmf_bus_stop
= brcmf_sdbrcm_bus_stop
;
3919 bus
->sdiodev
->bus_if
->brcmf_bus_init
= brcmf_sdbrcm_bus_init
;
3920 bus
->sdiodev
->bus_if
->brcmf_bus_txdata
= brcmf_sdbrcm_bus_txdata
;
3921 bus
->sdiodev
->bus_if
->brcmf_bus_txctl
= brcmf_sdbrcm_bus_txctl
;
3922 bus
->sdiodev
->bus_if
->brcmf_bus_rxctl
= brcmf_sdbrcm_bus_rxctl
;
3923 /* Attach to the brcmf/OS/network interface */
3924 ret
= brcmf_attach(SDPCM_RESERVE
, bus
->sdiodev
->dev
);
3926 brcmf_dbg(ERROR
, "brcmf_attach failed\n");
3930 /* Allocate buffers */
3931 if (!(brcmf_sdbrcm_probe_malloc(bus
))) {
3932 brcmf_dbg(ERROR
, "brcmf_sdbrcm_probe_malloc failed\n");
3936 if (!(brcmf_sdbrcm_probe_init(bus
))) {
3937 brcmf_dbg(ERROR
, "brcmf_sdbrcm_probe_init failed\n");
3941 brcmf_dbg(INFO
, "completed!!\n");
3943 /* if firmware path present try to download and bring up bus */
3944 ret
= brcmf_bus_start(bus
->sdiodev
->dev
);
3946 if (ret
== -ENOLINK
) {
3947 brcmf_dbg(ERROR
, "dongle is not responding\n");
3955 brcmf_sdbrcm_release(bus
);
3959 void brcmf_sdbrcm_disconnect(void *ptr
)
3961 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*)ptr
;
3963 brcmf_dbg(TRACE
, "Enter\n");
3966 brcmf_sdbrcm_release(bus
);
3968 brcmf_dbg(TRACE
, "Disconnected\n");
3972 brcmf_sdbrcm_wd_timer(struct brcmf_sdio
*bus
, uint wdtick
)
3974 /* Totally stop the timer */
3975 if (!wdtick
&& bus
->wd_timer_valid
) {
3976 del_timer_sync(&bus
->timer
);
3977 bus
->wd_timer_valid
= false;
3978 bus
->save_ms
= wdtick
;
3982 /* don't start the wd until fw is loaded */
3983 if (bus
->sdiodev
->bus_if
->state
== BRCMF_BUS_DOWN
)
3987 if (bus
->save_ms
!= BRCMF_WD_POLL_MS
) {
3988 if (bus
->wd_timer_valid
)
3989 /* Stop timer and restart at new value */
3990 del_timer_sync(&bus
->timer
);
3992 /* Create timer again when watchdog period is
3993 dynamically changed or in the first instance
3995 bus
->timer
.expires
=
3996 jiffies
+ BRCMF_WD_POLL_MS
* HZ
/ 1000;
3997 add_timer(&bus
->timer
);
4000 /* Re arm the timer, at last watchdog period */
4001 mod_timer(&bus
->timer
,
4002 jiffies
+ BRCMF_WD_POLL_MS
* HZ
/ 1000);
4005 bus
->wd_timer_valid
= true;
4006 bus
->save_ms
= wdtick
;