2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/skbuff.h>
26 #define SDIOD_FBR_SIZE 0x100
29 #define SDIO_FUNC_ENABLE_1 0x02
30 #define SDIO_FUNC_ENABLE_2 0x04
33 #define SDIO_FUNC_READY_1 0x02
34 #define SDIO_FUNC_READY_2 0x04
37 #define INTR_STATUS_FUNC1 0x2
38 #define INTR_STATUS_FUNC2 0x4
40 /* Maximum number of I/O funcs */
41 #define SDIOD_MAX_IOFUNCS 7
43 /* as of sdiod rev 0, supports 3 functions */
44 #define SBSDIO_NUM_FUNCTION 3
46 /* function 0 vendor specific CCCR registers */
47 #define SDIO_CCCR_BRCM_SEPINT 0xf2
49 #define SDIO_SEPINT_MASK 0x01
50 #define SDIO_SEPINT_OE 0x02
51 #define SDIO_SEPINT_ACT_HI 0x04
53 /* function 1 miscellaneous registers */
55 /* sprom command and status */
56 #define SBSDIO_SPROM_CS 0x10000
57 /* sprom info register */
58 #define SBSDIO_SPROM_INFO 0x10001
59 /* sprom indirect access data byte 0 */
60 #define SBSDIO_SPROM_DATA_LOW 0x10002
61 /* sprom indirect access data byte 1 */
62 #define SBSDIO_SPROM_DATA_HIGH 0x10003
63 /* sprom indirect access addr byte 0 */
64 #define SBSDIO_SPROM_ADDR_LOW 0x10004
65 /* sprom indirect access addr byte 0 */
66 #define SBSDIO_SPROM_ADDR_HIGH 0x10005
67 /* xtal_pu (gpio) output */
68 #define SBSDIO_CHIP_CTRL_DATA 0x10006
69 /* xtal_pu (gpio) enable */
70 #define SBSDIO_CHIP_CTRL_EN 0x10007
71 /* rev < 7, watermark for sdio device */
72 #define SBSDIO_WATERMARK 0x10008
73 /* control busy signal generation */
74 #define SBSDIO_DEVICE_CTL 0x10009
76 /* SB Address Window Low (b15) */
77 #define SBSDIO_FUNC1_SBADDRLOW 0x1000A
78 /* SB Address Window Mid (b23:b16) */
79 #define SBSDIO_FUNC1_SBADDRMID 0x1000B
80 /* SB Address Window High (b31:b24) */
81 #define SBSDIO_FUNC1_SBADDRHIGH 0x1000C
82 /* Frame Control (frame term/abort) */
83 #define SBSDIO_FUNC1_FRAMECTRL 0x1000D
84 /* ChipClockCSR (ALP/HT ctl/status) */
85 #define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E
86 /* SdioPullUp (on cmd, d0-d2) */
87 #define SBSDIO_FUNC1_SDIOPULLUP 0x1000F
88 /* Write Frame Byte Count Low */
89 #define SBSDIO_FUNC1_WFRAMEBCLO 0x10019
90 /* Write Frame Byte Count High */
91 #define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A
92 /* Read Frame Byte Count Low */
93 #define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B
94 /* Read Frame Byte Count High */
95 #define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C
97 #define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
98 #define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */
100 /* function 1 OCP space */
102 /* sb offset addr is <= 15 bits, 32k */
103 #define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF
104 #define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
105 /* with b15, maps to 32-bit SB access */
106 #define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
108 /* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
110 #define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
111 #define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
112 #define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
113 /* Address bits from SBADDR regs */
114 #define SBSDIO_SBWINDOW_MASK 0xffff8000
116 #define SDIOH_READ 0 /* Read request */
117 #define SDIOH_WRITE 1 /* Write request */
119 #define SDIOH_DATA_FIX 0 /* Fixed addressing */
120 #define SDIOH_DATA_INC 1 /* Incremental addressing */
122 /* internal return code */
126 /* Packet alignment for most efficient SDIO (can change based on platform) */
127 #define BRCMF_SDALIGN (1 << 6)
129 /* watchdog polling interval in ms */
130 #define BRCMF_WD_POLL_MS 10
140 struct brcmf_sdio_dev
{
141 struct sdio_func
*func
[SDIO_MAX_FUNCS
];
142 u8 num_funcs
; /* Supported funcs on client */
143 u32 func_cis_ptr
[SDIOD_MAX_IOFUNCS
];
144 u32 sbwad
; /* Save backplane window address */
145 bool regfail
; /* status of last reg_r/w call */
147 atomic_t suspend
; /* suspend flag */
148 wait_queue_head_t request_byte_wait
;
149 wait_queue_head_t request_word_wait
;
150 wait_queue_head_t request_chain_wait
;
151 wait_queue_head_t request_buffer_wait
;
153 struct brcmf_bus
*bus_if
;
154 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
155 unsigned int irq
; /* oob interrupt number */
156 unsigned long irq_flags
; /* board specific oob flags */
157 bool irq_en
; /* irq enable flags */
158 spinlock_t irq_en_lock
;
159 bool irq_wake
; /* irq wake enable flags */
160 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
163 /* Register/deregister interrupt handler. */
164 extern int brcmf_sdio_intr_register(struct brcmf_sdio_dev
*sdiodev
);
165 extern int brcmf_sdio_intr_unregister(struct brcmf_sdio_dev
*sdiodev
);
167 /* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface).
168 * fn: function number
169 * addr: unmodified SDIO-space address
170 * data: data byte to write
171 * err: pointer to error code (or NULL)
173 extern u8
brcmf_sdcard_cfg_read(struct brcmf_sdio_dev
*sdiodev
, uint func
,
175 extern void brcmf_sdcard_cfg_write(struct brcmf_sdio_dev
*sdiodev
, uint func
,
176 u32 addr
, u8 data
, int *err
);
178 /* Synchronous access to device (client) core registers via CMD53 to F1.
179 * addr: backplane address (i.e. >= regsva from attach)
180 * size: register width in bytes (2 or 4)
181 * data: data for register write
184 brcmf_sdcard_reg_read(struct brcmf_sdio_dev
*sdiodev
, u32 addr
);
187 brcmf_sdcard_reg_write(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, u32 data
);
189 /* Indicate if last reg read/write failed */
190 extern bool brcmf_sdcard_regfail(struct brcmf_sdio_dev
*sdiodev
);
192 /* Buffer transfer to/from device (client) core via cmd53.
193 * fn: function number
194 * addr: backplane address (i.e. >= regsva from attach)
195 * flags: backplane width, address increment, sync/async
196 * buf: pointer to memory data buffer
197 * nbytes: number of bytes to transfer to/from buf
198 * pkt: pointer to packet associated with buf (if any)
199 * complete: callback function for command completion (async only)
200 * handle: handle for completion callback (first arg in callback)
201 * Returns 0 or error code.
202 * NOTE: Async operation is not currently supported.
205 brcmf_sdcard_send_pkt(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, uint fn
,
206 uint flags
, struct sk_buff
*pkt
);
208 brcmf_sdcard_send_buf(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, uint fn
,
209 uint flags
, u8
*buf
, uint nbytes
);
212 brcmf_sdcard_recv_pkt(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, uint fn
,
213 uint flags
, struct sk_buff
*pkt
);
215 brcmf_sdcard_recv_buf(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, uint fn
,
216 uint flags
, u8
*buf
, uint nbytes
);
218 brcmf_sdcard_recv_chain(struct brcmf_sdio_dev
*sdiodev
, u32 addr
, uint fn
,
219 uint flags
, struct sk_buff_head
*pktq
);
223 /* Four-byte target (backplane) width (vs. two-byte) */
224 #define SDIO_REQ_4BYTE 0x1
225 /* Fixed address (FIFO) (vs. incrementing address) */
226 #define SDIO_REQ_FIXED 0x2
227 /* Async request (vs. sync request) */
228 #define SDIO_REQ_ASYNC 0x4
230 /* Read/write to memory block (F1, no FIFO) via CMD53 (sync only).
231 * rw: read or write (0/1)
232 * addr: direct SDIO address
233 * buf: pointer to memory data buffer
234 * nbytes: number of bytes to transfer to/from buf
235 * Returns 0 or error code.
237 extern int brcmf_sdcard_rwdata(struct brcmf_sdio_dev
*sdiodev
, uint rw
,
238 u32 addr
, u8
*buf
, uint nbytes
);
240 /* Issue an abort to the specified function */
241 extern int brcmf_sdcard_abort(struct brcmf_sdio_dev
*sdiodev
, uint fn
);
243 /* platform specific/high level functions */
244 extern int brcmf_sdio_probe(struct brcmf_sdio_dev
*sdiodev
);
245 extern int brcmf_sdio_remove(struct brcmf_sdio_dev
*sdiodev
);
247 extern int brcmf_sdcard_set_sbaddr_window(struct brcmf_sdio_dev
*sdiodev
,
250 /* attach, return handler on success, NULL if failed.
251 * The handler shall be provided by all subsequent calls. No local cache
252 * cfghdl points to the starting address of pci device mapped memory
254 extern int brcmf_sdioh_attach(struct brcmf_sdio_dev
*sdiodev
);
255 extern void brcmf_sdioh_detach(struct brcmf_sdio_dev
*sdiodev
);
257 /* read or write one byte using cmd52 */
258 extern int brcmf_sdioh_request_byte(struct brcmf_sdio_dev
*sdiodev
, uint rw
,
259 uint fnc
, uint addr
, u8
*byte
);
261 /* read or write 2/4 bytes using cmd53 */
263 brcmf_sdioh_request_word(struct brcmf_sdio_dev
*sdiodev
,
264 uint rw
, uint fnc
, uint addr
,
265 u32
*word
, uint nbyte
);
267 /* read or write any buffer using cmd53 */
269 brcmf_sdioh_request_buffer(struct brcmf_sdio_dev
*sdiodev
,
270 uint fix_inc
, uint rw
, uint fnc_num
, u32 addr
,
271 struct sk_buff
*pkt
);
273 brcmf_sdioh_request_chain(struct brcmf_sdio_dev
*sdiodev
, uint fix_inc
,
274 uint write
, uint func
, uint addr
,
275 struct sk_buff_head
*pktq
);
277 /* Watchdog timer interface for pm ops */
278 extern void brcmf_sdio_wdtmr_enable(struct brcmf_sdio_dev
*sdiodev
,
281 extern void *brcmf_sdbrcm_probe(u32 regsva
, struct brcmf_sdio_dev
*sdiodev
);
282 extern void brcmf_sdbrcm_disconnect(void *ptr
);
283 extern void brcmf_sdbrcm_isr(void *arg
);
285 extern void brcmf_sdbrcm_wd_timer(struct brcmf_sdio
*bus
, uint wdtick
);
286 #endif /* _BRCM_SDH_H_ */