2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/pci_ids.h>
20 #include <linux/if_ether.h>
21 #include <net/cfg80211.h>
22 #include <net/mac80211.h>
23 #include <brcm_hw_ids.h>
25 #include <chipcommon.h>
28 #include "phy/phy_hal.h"
33 #include "mac80211_if.h"
34 #include "ucode_loader.h"
39 * Indication for txflowcontrol that all priority bits in
40 * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
44 /* watchdog timer, in unit of ms */
45 #define TIMER_INTERVAL_WATCHDOG 1000
46 /* radio monitor timer, in unit of ms */
47 #define TIMER_INTERVAL_RADIOCHK 800
49 /* beacon interval, in unit of 1024TU */
50 #define BEACON_INTERVAL_DEFAULT 100
52 /* n-mode support capability */
53 /* 2x2 includes both 1x1 & 2x2 devices
54 * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
55 * control it independently
61 #define EDCF_ACI_MASK 0x60
62 #define EDCF_ACI_SHIFT 5
63 #define EDCF_ECWMIN_MASK 0x0f
64 #define EDCF_ECWMAX_SHIFT 4
65 #define EDCF_AIFSN_MASK 0x0f
66 #define EDCF_AIFSN_MAX 15
67 #define EDCF_ECWMAX_MASK 0xf0
69 #define EDCF_AC_BE_TXOP_STA 0x0000
70 #define EDCF_AC_BK_TXOP_STA 0x0000
71 #define EDCF_AC_VO_ACI_STA 0x62
72 #define EDCF_AC_VO_ECW_STA 0x32
73 #define EDCF_AC_VI_ACI_STA 0x42
74 #define EDCF_AC_VI_ECW_STA 0x43
75 #define EDCF_AC_BK_ECW_STA 0xA4
76 #define EDCF_AC_VI_TXOP_STA 0x005e
77 #define EDCF_AC_VO_TXOP_STA 0x002f
78 #define EDCF_AC_BE_ACI_STA 0x03
79 #define EDCF_AC_BE_ECW_STA 0xA4
80 #define EDCF_AC_BK_ACI_STA 0x27
81 #define EDCF_AC_VO_TXOP_AP 0x002f
83 #define EDCF_TXOP2USEC(txop) ((txop) << 5)
84 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
86 #define APHY_SYMBOL_TIME 4
87 #define APHY_PREAMBLE_TIME 16
88 #define APHY_SIGNAL_TIME 4
89 #define APHY_SIFS_TIME 16
90 #define APHY_SERVICE_NBITS 16
91 #define APHY_TAIL_NBITS 6
92 #define BPHY_SIFS_TIME 10
93 #define BPHY_PLCP_SHORT_TIME 96
95 #define PREN_PREAMBLE 24
96 #define PREN_MM_EXT 12
97 #define PREN_PREAMBLE_EXT 4
99 #define DOT11_MAC_HDR_LEN 24
100 #define DOT11_ACK_LEN 10
101 #define DOT11_BA_LEN 4
102 #define DOT11_OFDM_SIGNAL_EXTENSION 6
103 #define DOT11_MIN_FRAG_LEN 256
104 #define DOT11_RTS_LEN 16
105 #define DOT11_CTS_LEN 10
106 #define DOT11_BA_BITMAP_LEN 128
107 #define DOT11_MIN_BEACON_PERIOD 1
108 #define DOT11_MAX_BEACON_PERIOD 0xFFFF
109 #define DOT11_MAXNUMFRAGS 16
110 #define DOT11_MAX_FRAG_LEN 2346
112 #define BPHY_PLCP_TIME 192
113 #define RIFS_11N_TIME 2
115 /* length of the BCN template area */
116 #define BCN_TMPL_LEN 512
118 /* brcms_bss_info flag bit values */
119 #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */
121 /* chip rx buffer offset */
122 #define BRCMS_HWRXOFF 38
124 /* rfdisable delay timer 500 ms, runs of ALP clock */
125 #define RFDISABLE_DEFAULT 10000000
127 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */
129 /* precedences numbers for wlc queues. These are twice as may levels as
131 * Odd numbers are used for HI priority traffic at same precedence levels
132 * These constants are used ONLY by wlc_prio2prec_map. Do not use them
135 #define _BRCMS_PREC_NONE 0 /* None = - */
136 #define _BRCMS_PREC_BK 2 /* BK - Background */
137 #define _BRCMS_PREC_BE 4 /* BE - Best-effort */
138 #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */
139 #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */
140 #define _BRCMS_PREC_VI 10 /* Vi - Video */
141 #define _BRCMS_PREC_VO 12 /* Vo - Voice */
142 #define _BRCMS_PREC_NC 14 /* NC - Network Control */
144 /* synthpu_dly times in us */
145 #define SYNTHPU_DLY_APHY_US 3700
146 #define SYNTHPU_DLY_BPHY_US 1050
147 #define SYNTHPU_DLY_NPHY_US 2048
148 #define SYNTHPU_DLY_LPPHY_US 300
150 #define ANTCNT 10 /* vanilla M_MAX_ANTCNT val */
152 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
153 #define EDCF_SHORT_S 0
155 #define EDCF_LONG_S 8
156 #define EDCF_LFB_S 12
157 #define EDCF_SHORT_M BITFIELD_MASK(4)
158 #define EDCF_SFB_M BITFIELD_MASK(4)
159 #define EDCF_LONG_M BITFIELD_MASK(4)
160 #define EDCF_LFB_M BITFIELD_MASK(4)
162 #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */
163 #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */
164 #define RETRY_LONG_DEF 4 /* Default Long retry count */
165 #define RETRY_SHORT_FB 3 /* Short count for fb rate */
166 #define RETRY_LONG_FB 2 /* Long count for fb rate */
168 #define APHY_CWMIN 15
169 #define PHY_CWMAX 1023
171 #define EDCF_AIFSN_MIN 1
173 #define FRAGNUM_MASK 0xF
175 #define APHY_SLOT_TIME 9
176 #define BPHY_SLOT_TIME 20
178 #define WL_SPURAVOID_OFF 0
179 #define WL_SPURAVOID_ON1 1
180 #define WL_SPURAVOID_ON2 2
182 /* invalid core flags, use the saved coreflags */
183 #define BRCMS_USE_COREFLAGS 0xffffffff
185 /* values for PLCPHdr_override */
186 #define BRCMS_PLCP_AUTO -1
187 #define BRCMS_PLCP_SHORT 0
188 #define BRCMS_PLCP_LONG 1
190 /* values for g_protection_override and n_protection_override */
191 #define BRCMS_PROTECTION_AUTO -1
192 #define BRCMS_PROTECTION_OFF 0
193 #define BRCMS_PROTECTION_ON 1
194 #define BRCMS_PROTECTION_MMHDR_ONLY 2
195 #define BRCMS_PROTECTION_CTS_ONLY 3
197 /* values for g_protection_control and n_protection_control */
198 #define BRCMS_PROTECTION_CTL_OFF 0
199 #define BRCMS_PROTECTION_CTL_LOCAL 1
200 #define BRCMS_PROTECTION_CTL_OVERLAP 2
202 /* values for n_protection */
203 #define BRCMS_N_PROTECTION_OFF 0
204 #define BRCMS_N_PROTECTION_OPTIONAL 1
205 #define BRCMS_N_PROTECTION_20IN40 2
206 #define BRCMS_N_PROTECTION_MIXEDMODE 3
208 /* values for band specific 40MHz capabilities */
209 #define BRCMS_N_BW_20ALL 0
210 #define BRCMS_N_BW_40ALL 1
211 #define BRCMS_N_BW_20IN2G_40IN5G 2
213 /* bitflags for SGI support (sgi_rx iovar) */
214 #define BRCMS_N_SGI_20 0x01
215 #define BRCMS_N_SGI_40 0x02
217 /* defines used by the nrate iovar */
218 /* MSC in use,indicates b0-6 holds an mcs */
219 #define NRATE_MCS_INUSE 0x00000080
221 #define NRATE_RATE_MASK 0x0000007f
222 /* stf mode mask: siso, cdd, stbc, sdm */
223 #define NRATE_STF_MASK 0x0000ff00
225 #define NRATE_STF_SHIFT 8
226 /* bit indicate to override mcs only */
227 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
228 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
229 #define NRATE_SGI_SHIFT 23 /* sgi mode */
230 #define NRATE_LDPC_CODING 0x00400000 /* adv coding in use */
231 #define NRATE_LDPC_SHIFT 22 /* ldpc shift */
233 #define NRATE_STF_SISO 0 /* stf mode SISO */
234 #define NRATE_STF_CDD 1 /* stf mode CDD */
235 #define NRATE_STF_STBC 2 /* stf mode STBC */
236 #define NRATE_STF_SDM 3 /* stf mode SDM */
238 #define MAX_DMA_SEGS 4
240 /* Max # of entries in Tx FIFO based on 4kb page size */
242 /* Max # of entries in Rx FIFO based on 4kb page size */
245 /* try to keep this # rbufs posted to the chip */
246 #define NRXBUFPOST 32
248 /* data msg txq hiwat mark */
249 #define BRCMS_DATAHIWAT 50
251 /* max # frames to process in brcms_c_recv() */
253 /* max # tx status to process in wlc_txstatus() */
256 /* brcmu_format_flags() bit description structure */
257 struct brcms_c_bit_desc
{
263 * The following table lists the buffer memory allocated to xmt fifos in HW.
264 * the size is in units of 256bytes(one block), total size is HW dependent
265 * ucode has default fifo partition, sw can overwrite if necessary
267 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
268 * the twiki is updated before making changes.
271 /* Starting corerev for the fifo size table */
272 #define XMTFIFOTBL_STARTREV 20
280 struct edcf_acparam
{
286 const u8 prio2fifo
[NUMPRIO
] = {
287 TX_AC_BE_FIFO
, /* 0 BE AC_BE Best Effort */
288 TX_AC_BK_FIFO
, /* 1 BK AC_BK Background */
289 TX_AC_BK_FIFO
, /* 2 -- AC_BK Background */
290 TX_AC_BE_FIFO
, /* 3 EE AC_BE Best Effort */
291 TX_AC_VI_FIFO
, /* 4 CL AC_VI Video */
292 TX_AC_VI_FIFO
, /* 5 VI AC_VI Video */
293 TX_AC_VO_FIFO
, /* 6 VO AC_VO Voice */
294 TX_AC_VO_FIFO
/* 7 NC AC_VO Voice */
298 uint brcm_msg_level
=
305 /* TX FIFO number to WME/802.1E Access Category */
306 static const u8 wme_fifo2ac
[] = {
315 /* ieee80211 Access Category to TX FIFO number */
316 static const u8 wme_ac2fifo
[] = {
323 /* 802.1D Priority to precedence queue mapping */
324 const u8 wlc_prio2prec_map
[] = {
325 _BRCMS_PREC_BE
, /* 0 BE - Best-effort */
326 _BRCMS_PREC_BK
, /* 1 BK - Background */
327 _BRCMS_PREC_NONE
, /* 2 None = - */
328 _BRCMS_PREC_EE
, /* 3 EE - Excellent-effort */
329 _BRCMS_PREC_CL
, /* 4 CL - Controlled Load */
330 _BRCMS_PREC_VI
, /* 5 Vi - Video */
331 _BRCMS_PREC_VO
, /* 6 Vo - Voice */
332 _BRCMS_PREC_NC
, /* 7 NC - Network Control */
335 static const u16 xmtfifo_sz
[][NFIFO
] = {
336 /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
337 {20, 192, 192, 21, 17, 5},
338 /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
339 {9, 58, 22, 14, 14, 5},
340 /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
341 {20, 192, 192, 21, 17, 5},
342 /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
343 {20, 192, 192, 21, 17, 5},
344 /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
345 {9, 58, 22, 14, 14, 5},
349 static const char * const fifo_names
[] = {
350 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
352 static const char fifo_names
[6][0];
356 /* pointer to most recently allocated wl/wlc */
357 static struct brcms_c_info
*wlc_info_dbg
= (struct brcms_c_info
*) (NULL
);
360 /* Find basic rate for a given rate */
361 static u8
brcms_basic_rate(struct brcms_c_info
*wlc
, u32 rspec
)
363 if (is_mcs_rate(rspec
))
364 return wlc
->band
->basic_rate
[mcs_table
[rspec
& RSPEC_RATE_MASK
]
366 return wlc
->band
->basic_rate
[rspec
& RSPEC_RATE_MASK
];
369 static u16
frametype(u32 rspec
, u8 mimoframe
)
371 if (is_mcs_rate(rspec
))
373 return is_cck_rate(rspec
) ? FT_CCK
: FT_OFDM
;
376 /* currently the best mechanism for determining SIFS is the band in use */
377 static u16
get_sifs(struct brcms_band
*band
)
379 return band
->bandtype
== BRCM_BAND_5G
? APHY_SIFS_TIME
:
384 * Detect Card removed.
385 * Even checking an sbconfig register read will not false trigger when the core
386 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
387 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
388 * reg with fixed 0/1 pattern (some platforms return all 0).
389 * If clocks are present, call the sb routine which will figure out if the
392 static bool brcms_deviceremoved(struct brcms_c_info
*wlc
)
397 return ai_deviceremoved(wlc
->hw
->sih
);
398 macctrl
= bcma_read32(wlc
->hw
->d11core
,
399 D11REGOFFS(maccontrol
));
400 return (macctrl
& (MCTL_PSM_JMP_0
| MCTL_IHR_EN
)) != MCTL_IHR_EN
;
403 /* sum the individual fifo tx pending packet counts */
404 static s16
brcms_txpktpendtot(struct brcms_c_info
*wlc
)
406 return wlc
->core
->txpktpend
[0] + wlc
->core
->txpktpend
[1] +
407 wlc
->core
->txpktpend
[2] + wlc
->core
->txpktpend
[3];
410 static bool brcms_is_mband_unlocked(struct brcms_c_info
*wlc
)
412 return wlc
->pub
->_nbands
> 1 && !wlc
->bandlocked
;
415 static int brcms_chspec_bw(u16 chanspec
)
417 if (CHSPEC_IS40(chanspec
))
419 if (CHSPEC_IS20(chanspec
))
425 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg
*cfg
)
430 kfree(cfg
->current_bss
);
434 static void brcms_c_detach_mfree(struct brcms_c_info
*wlc
)
439 brcms_c_bsscfg_mfree(wlc
->bsscfg
);
441 kfree(wlc
->modulecb
);
442 kfree(wlc
->default_bss
);
443 kfree(wlc
->protection
);
445 kfree(wlc
->bandstate
[0]);
446 kfree(wlc
->corestate
->macstat_snapshot
);
447 kfree(wlc
->corestate
);
448 kfree(wlc
->hw
->bandstate
[0]);
456 static struct brcms_bss_cfg
*brcms_c_bsscfg_malloc(uint unit
)
458 struct brcms_bss_cfg
*cfg
;
460 cfg
= kzalloc(sizeof(struct brcms_bss_cfg
), GFP_ATOMIC
);
464 cfg
->current_bss
= kzalloc(sizeof(struct brcms_bss_info
), GFP_ATOMIC
);
465 if (cfg
->current_bss
== NULL
)
471 brcms_c_bsscfg_mfree(cfg
);
475 static struct brcms_c_info
*
476 brcms_c_attach_malloc(uint unit
, uint
*err
, uint devid
)
478 struct brcms_c_info
*wlc
;
480 wlc
= kzalloc(sizeof(struct brcms_c_info
), GFP_ATOMIC
);
486 /* allocate struct brcms_c_pub state structure */
487 wlc
->pub
= kzalloc(sizeof(struct brcms_pub
), GFP_ATOMIC
);
488 if (wlc
->pub
== NULL
) {
494 /* allocate struct brcms_hardware state structure */
496 wlc
->hw
= kzalloc(sizeof(struct brcms_hardware
), GFP_ATOMIC
);
497 if (wlc
->hw
== NULL
) {
503 wlc
->hw
->bandstate
[0] =
504 kzalloc(sizeof(struct brcms_hw_band
) * MAXBANDS
, GFP_ATOMIC
);
505 if (wlc
->hw
->bandstate
[0] == NULL
) {
511 for (i
= 1; i
< MAXBANDS
; i
++)
512 wlc
->hw
->bandstate
[i
] = (struct brcms_hw_band
*)
513 ((unsigned long)wlc
->hw
->bandstate
[0] +
514 (sizeof(struct brcms_hw_band
) * i
));
518 kzalloc(sizeof(struct modulecb
) * BRCMS_MAXMODULES
, GFP_ATOMIC
);
519 if (wlc
->modulecb
== NULL
) {
524 wlc
->default_bss
= kzalloc(sizeof(struct brcms_bss_info
), GFP_ATOMIC
);
525 if (wlc
->default_bss
== NULL
) {
530 wlc
->bsscfg
= brcms_c_bsscfg_malloc(unit
);
531 if (wlc
->bsscfg
== NULL
) {
536 wlc
->protection
= kzalloc(sizeof(struct brcms_protection
),
538 if (wlc
->protection
== NULL
) {
543 wlc
->stf
= kzalloc(sizeof(struct brcms_stf
), GFP_ATOMIC
);
544 if (wlc
->stf
== NULL
) {
550 kzalloc(sizeof(struct brcms_band
)*MAXBANDS
, GFP_ATOMIC
);
551 if (wlc
->bandstate
[0] == NULL
) {
557 for (i
= 1; i
< MAXBANDS
; i
++)
558 wlc
->bandstate
[i
] = (struct brcms_band
*)
559 ((unsigned long)wlc
->bandstate
[0]
560 + (sizeof(struct brcms_band
)*i
));
563 wlc
->corestate
= kzalloc(sizeof(struct brcms_core
), GFP_ATOMIC
);
564 if (wlc
->corestate
== NULL
) {
569 wlc
->corestate
->macstat_snapshot
=
570 kzalloc(sizeof(struct macstat
), GFP_ATOMIC
);
571 if (wlc
->corestate
->macstat_snapshot
== NULL
) {
579 brcms_c_detach_mfree(wlc
);
584 * Update the slot timing for standard 11b/g (20us slots)
585 * or shortslot 11g (9us slots)
586 * The PSM needs to be suspended for this call.
588 static void brcms_b_update_slot_timing(struct brcms_hardware
*wlc_hw
,
591 struct bcma_device
*core
= wlc_hw
->d11core
;
594 /* 11g short slot: 11a timing */
595 bcma_write16(core
, D11REGOFFS(ifs_slot
), 0x0207);
596 brcms_b_write_shm(wlc_hw
, M_DOT11_SLOT
, APHY_SLOT_TIME
);
598 /* 11g long slot: 11b timing */
599 bcma_write16(core
, D11REGOFFS(ifs_slot
), 0x0212);
600 brcms_b_write_shm(wlc_hw
, M_DOT11_SLOT
, BPHY_SLOT_TIME
);
605 * calculate frame duration of a given rate and length, return
608 static uint
brcms_c_calc_frame_time(struct brcms_c_info
*wlc
, u32 ratespec
,
609 u8 preamble_type
, uint mac_len
)
611 uint nsyms
, dur
= 0, Ndps
, kNdps
;
612 uint rate
= rspec2rate(ratespec
);
615 wiphy_err(wlc
->wiphy
, "wl%d: WAR: using rate of 1 mbps\n",
620 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
621 wlc
->pub
->unit
, ratespec
, preamble_type
, mac_len
);
623 if (is_mcs_rate(ratespec
)) {
624 uint mcs
= ratespec
& RSPEC_RATE_MASK
;
625 int tot_streams
= mcs_2_txstreams(mcs
) + rspec_stc(ratespec
);
627 dur
= PREN_PREAMBLE
+ (tot_streams
* PREN_PREAMBLE_EXT
);
628 if (preamble_type
== BRCMS_MM_PREAMBLE
)
630 /* 1000Ndbps = kbps * 4 */
631 kNdps
= mcs_2_rate(mcs
, rspec_is40mhz(ratespec
),
632 rspec_issgi(ratespec
)) * 4;
634 if (rspec_stc(ratespec
) == 0)
636 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
637 APHY_TAIL_NBITS
) * 1000, kNdps
);
639 /* STBC needs to have even number of symbols */
642 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
643 APHY_TAIL_NBITS
) * 1000, 2 * kNdps
);
645 dur
+= APHY_SYMBOL_TIME
* nsyms
;
646 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
647 dur
+= DOT11_OFDM_SIGNAL_EXTENSION
;
648 } else if (is_ofdm_rate(rate
)) {
649 dur
= APHY_PREAMBLE_TIME
;
650 dur
+= APHY_SIGNAL_TIME
;
651 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
653 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
655 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+ APHY_TAIL_NBITS
),
657 dur
+= APHY_SYMBOL_TIME
* nsyms
;
658 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
659 dur
+= DOT11_OFDM_SIGNAL_EXTENSION
;
662 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
665 mac_len
= mac_len
* 8 * 2;
666 /* calc ceiling of bits/rate = microseconds of air time */
667 dur
= (mac_len
+ rate
- 1) / rate
;
668 if (preamble_type
& BRCMS_SHORT_PREAMBLE
)
669 dur
+= BPHY_PLCP_SHORT_TIME
;
671 dur
+= BPHY_PLCP_TIME
;
676 static void brcms_c_write_inits(struct brcms_hardware
*wlc_hw
,
677 const struct d11init
*inits
)
679 struct bcma_device
*core
= wlc_hw
->d11core
;
685 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
687 for (i
= 0; inits
[i
].addr
!= cpu_to_le16(0xffff); i
++) {
688 size
= le16_to_cpu(inits
[i
].size
);
689 offset
= le16_to_cpu(inits
[i
].addr
);
690 value
= le32_to_cpu(inits
[i
].value
);
692 bcma_write16(core
, offset
, value
);
694 bcma_write32(core
, offset
, value
);
700 static void brcms_c_write_mhf(struct brcms_hardware
*wlc_hw
, u16
*mhfs
)
704 M_HOST_FLAGS1
, M_HOST_FLAGS2
, M_HOST_FLAGS3
, M_HOST_FLAGS4
,
708 for (idx
= 0; idx
< MHFMAX
; idx
++)
709 brcms_b_write_shm(wlc_hw
, addr
[idx
], mhfs
[idx
]);
712 static void brcms_c_ucode_bsinit(struct brcms_hardware
*wlc_hw
)
714 struct wiphy
*wiphy
= wlc_hw
->wlc
->wiphy
;
715 struct brcms_ucode
*ucode
= &wlc_hw
->wlc
->wl
->ucode
;
717 /* init microcode host flags */
718 brcms_c_write_mhf(wlc_hw
, wlc_hw
->band
->mhfs
);
720 /* do band-specific ucode IHR, SHM, and SCR inits */
721 if (D11REV_IS(wlc_hw
->corerev
, 23)) {
722 if (BRCMS_ISNPHY(wlc_hw
->band
))
723 brcms_c_write_inits(wlc_hw
, ucode
->d11n0bsinitvals16
);
725 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in corerev"
726 " %d\n", __func__
, wlc_hw
->unit
,
729 if (D11REV_IS(wlc_hw
->corerev
, 24)) {
730 if (BRCMS_ISLCNPHY(wlc_hw
->band
))
731 brcms_c_write_inits(wlc_hw
,
732 ucode
->d11lcn0bsinitvals24
);
734 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in"
735 " core rev %d\n", __func__
,
736 wlc_hw
->unit
, wlc_hw
->corerev
);
738 wiphy_err(wiphy
, "%s: wl%d: unsupported corerev %d\n",
739 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
744 static void brcms_b_core_ioctl(struct brcms_hardware
*wlc_hw
, u32 m
, u32 v
)
746 struct bcma_device
*core
= wlc_hw
->d11core
;
747 u32 ioctl
= bcma_aread32(core
, BCMA_IOCTL
) & ~m
;
749 bcma_awrite32(core
, BCMA_IOCTL
, ioctl
| v
);
752 static void brcms_b_core_phy_clk(struct brcms_hardware
*wlc_hw
, bool clk
)
754 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: clk %d\n", wlc_hw
->unit
, clk
);
756 wlc_hw
->phyclk
= clk
;
758 if (OFF
== clk
) { /* clear gmode bit, put phy into reset */
760 brcms_b_core_ioctl(wlc_hw
, (SICF_PRST
| SICF_FGC
| SICF_GMODE
),
761 (SICF_PRST
| SICF_FGC
));
763 brcms_b_core_ioctl(wlc_hw
, (SICF_PRST
| SICF_FGC
), SICF_PRST
);
766 } else { /* take phy out of reset */
768 brcms_b_core_ioctl(wlc_hw
, (SICF_PRST
| SICF_FGC
), SICF_FGC
);
770 brcms_b_core_ioctl(wlc_hw
, SICF_FGC
, 0);
776 /* low-level band switch utility routine */
777 static void brcms_c_setxband(struct brcms_hardware
*wlc_hw
, uint bandunit
)
779 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
782 wlc_hw
->band
= wlc_hw
->bandstate
[bandunit
];
786 * until we eliminate need for wlc->band refs in low level code
788 wlc_hw
->wlc
->band
= wlc_hw
->wlc
->bandstate
[bandunit
];
790 /* set gmode core flag */
791 if (wlc_hw
->sbclk
&& !wlc_hw
->noreset
) {
797 brcms_b_core_ioctl(wlc_hw
, SICF_GMODE
, gmode
);
801 /* switch to new band but leave it inactive */
802 static u32
brcms_c_setband_inact(struct brcms_c_info
*wlc
, uint bandunit
)
804 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
808 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
809 macctrl
= bcma_read32(wlc_hw
->d11core
,
810 D11REGOFFS(maccontrol
));
811 WARN_ON((macctrl
& MCTL_EN_MAC
) != 0);
813 /* disable interrupts */
814 macintmask
= brcms_intrsoff(wlc
->wl
);
817 wlc_phy_switch_radio(wlc_hw
->band
->pi
, OFF
);
819 brcms_b_core_phy_clk(wlc_hw
, OFF
);
821 brcms_c_setxband(wlc_hw
, bandunit
);
826 /* process an individual struct tx_status */
828 brcms_c_dotxstatus(struct brcms_c_info
*wlc
, struct tx_status
*txs
)
833 struct scb
*scb
= NULL
;
835 int tx_rts
, tx_frame_count
, tx_rts_count
;
836 uint totlen
, supr_status
;
838 struct ieee80211_hdr
*h
;
840 struct ieee80211_tx_info
*tx_info
;
841 struct ieee80211_tx_rate
*txrate
;
844 /* discard intermediate indications for ucode with one legitimate case:
845 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
846 * but the subsequent tx of DATA failed. so it will start rts/cts
847 * from the beginning (resetting the rts transmission count)
849 if (!(txs
->status
& TX_STATUS_AMPDU
)
850 && (txs
->status
& TX_STATUS_INTERMEDIATE
)) {
851 BCMMSG(wlc
->wiphy
, "INTERMEDIATE but not AMPDU\n");
855 queue
= txs
->frameid
& TXFID_QUEUE_MASK
;
856 if (queue
>= NFIFO
) {
861 p
= dma_getnexttxp(wlc
->hw
->di
[queue
], DMA_RANGE_TRANSMITTED
);
865 txh
= (struct d11txh
*) (p
->data
);
866 mcl
= le16_to_cpu(txh
->MacTxControlLow
);
869 if (brcm_msg_level
& LOG_ERROR_VAL
) {
870 wiphy_err(wlc
->wiphy
, "phyerr 0x%x, rate 0x%x\n",
871 txs
->phyerr
, txh
->MainRates
);
872 brcms_c_print_txdesc(txh
);
874 brcms_c_print_txstatus(txs
);
877 if (txs
->frameid
!= le16_to_cpu(txh
->TxFrameID
))
879 tx_info
= IEEE80211_SKB_CB(p
);
880 h
= (struct ieee80211_hdr
*)((u8
*) (txh
+ 1) + D11_PHY_HDR_LEN
);
882 if (tx_info
->control
.sta
)
885 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) {
886 brcms_c_ampdu_dotxstatus(wlc
->ampdu
, scb
, p
, txs
);
890 supr_status
= txs
->status
& TX_STATUS_SUPR_MASK
;
891 if (supr_status
== TX_STATUS_SUPR_BADCH
)
893 "%s: Pkt tx suppressed, possibly channel %d\n",
894 __func__
, CHSPEC_CHANNEL(wlc
->default_bss
->chanspec
));
896 tx_rts
= le16_to_cpu(txh
->MacTxControlLow
) & TXC_SENDRTS
;
898 (txs
->status
& TX_STATUS_FRM_RTX_MASK
) >> TX_STATUS_FRM_RTX_SHIFT
;
900 (txs
->status
& TX_STATUS_RTS_RTX_MASK
) >> TX_STATUS_RTS_RTX_SHIFT
;
902 lastframe
= !ieee80211_has_morefrags(h
->frame_control
);
905 wiphy_err(wlc
->wiphy
, "Not last frame!\n");
908 * Set information to be consumed by Minstrel ht.
910 * The "fallback limit" is the number of tx attempts a given
911 * MPDU is sent at the "primary" rate. Tx attempts beyond that
912 * limit are sent at the "secondary" rate.
913 * A 'short frame' does not exceed RTS treshold.
915 u16 sfbl
, /* Short Frame Rate Fallback Limit */
916 lfbl
, /* Long Frame Rate Fallback Limit */
919 if (queue
< IEEE80211_NUM_ACS
) {
920 sfbl
= GFIELD(wlc
->wme_retries
[wme_fifo2ac
[queue
]],
922 lfbl
= GFIELD(wlc
->wme_retries
[wme_fifo2ac
[queue
]],
929 txrate
= tx_info
->status
.rates
;
930 if (txrate
[0].flags
& IEEE80211_TX_RC_USE_RTS_CTS
)
935 ieee80211_tx_info_clear_status(tx_info
);
937 if ((tx_frame_count
> fbl
) && (txrate
[1].idx
>= 0)) {
939 * rate selection requested a fallback rate
942 txrate
[0].count
= fbl
;
943 txrate
[1].count
= tx_frame_count
- fbl
;
946 * rate selection did not request fallback rate, or
949 txrate
[0].count
= tx_frame_count
;
951 * rc80211_minstrel.c:minstrel_tx_status() expects
952 * unused rates to be marked with idx = -1
958 /* clear the rest of the rates */
959 for (i
= 2; i
< IEEE80211_TX_MAX_RATES
; i
++) {
964 if (txs
->status
& TX_STATUS_ACK_RCV
)
965 tx_info
->flags
|= IEEE80211_TX_STAT_ACK
;
971 brcms_c_txfifo_complete(wlc
, queue
, 1);
974 /* remove PLCP & Broadcom tx descriptor header */
975 skb_pull(p
, D11_PHY_HDR_LEN
);
976 skb_pull(p
, D11_TXH_LEN
);
977 ieee80211_tx_status_irqsafe(wlc
->pub
->ieee_hw
, p
);
979 wiphy_err(wlc
->wiphy
, "%s: Not last frame => not calling "
980 "tx_status\n", __func__
);
987 brcmu_pkt_buf_free_skb(p
);
993 /* process tx completion events in BMAC
994 * Return true if more tx status need to be processed. false otherwise.
997 brcms_b_txstatus(struct brcms_hardware
*wlc_hw
, bool bound
, bool *fatal
)
999 bool morepending
= false;
1000 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1001 struct bcma_device
*core
;
1002 struct tx_status txstatus
, *txs
;
1006 * Param 'max_tx_num' indicates max. # tx status to process before
1009 uint max_tx_num
= bound
? TXSBND
: -1;
1011 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1014 core
= wlc_hw
->d11core
;
1016 s1
= bcma_read32(core
, D11REGOFFS(frmtxstatus
));
1020 if (s1
== 0xffffffff) {
1021 wiphy_err(wlc
->wiphy
, "wl%d: %s: dead chip\n",
1022 wlc_hw
->unit
, __func__
);
1025 s2
= bcma_read32(core
, D11REGOFFS(frmtxstatus2
));
1027 txs
->status
= s1
& TXS_STATUS_MASK
;
1028 txs
->frameid
= (s1
& TXS_FID_MASK
) >> TXS_FID_SHIFT
;
1029 txs
->sequence
= s2
& TXS_SEQ_MASK
;
1030 txs
->phyerr
= (s2
& TXS_PTX_MASK
) >> TXS_PTX_SHIFT
;
1031 txs
->lasttxtime
= 0;
1033 *fatal
= brcms_c_dotxstatus(wlc_hw
->wlc
, txs
);
1035 /* !give others some time to run! */
1036 if (++n
>= max_tx_num
)
1038 s1
= bcma_read32(core
, D11REGOFFS(frmtxstatus
));
1044 if (n
>= max_tx_num
)
1047 if (!pktq_empty(&wlc
->pkt_queue
->q
))
1048 brcms_c_send_q(wlc
);
1053 static void brcms_c_tbtt(struct brcms_c_info
*wlc
)
1055 if (!wlc
->bsscfg
->BSS
)
1057 * DirFrmQ is now valid...defer setting until end
1060 wlc
->qvalid
|= MCMD_DIRFRMQVAL
;
1063 /* set initial host flags value */
1065 brcms_c_mhfdef(struct brcms_c_info
*wlc
, u16
*mhfs
, u16 mhf2_init
)
1067 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
1069 memset(mhfs
, 0, MHFMAX
* sizeof(u16
));
1071 mhfs
[MHF2
] |= mhf2_init
;
1073 /* prohibit use of slowclock on multifunction boards */
1074 if (wlc_hw
->boardflags
& BFL_NOPLLDOWN
)
1075 mhfs
[MHF1
] |= MHF1_FORCEFASTCLK
;
1077 if (BRCMS_ISNPHY(wlc_hw
->band
) && NREV_LT(wlc_hw
->band
->phyrev
, 2)) {
1078 mhfs
[MHF2
] |= MHF2_NPHY40MHZ_WAR
;
1079 mhfs
[MHF1
] |= MHF1_IQSWAP_WAR
;
1084 dmareg(uint direction
, uint fifonum
)
1086 if (direction
== DMA_TX
)
1087 return offsetof(struct d11regs
, fifo64regs
[fifonum
].dmaxmt
);
1088 return offsetof(struct d11regs
, fifo64regs
[fifonum
].dmarcv
);
1091 static bool brcms_b_attach_dmapio(struct brcms_c_info
*wlc
, uint j
, bool wme
)
1096 * ucode host flag 2 needed for pio mode, independent of band and fifo
1099 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
1100 uint unit
= wlc_hw
->unit
;
1101 struct wiphy
*wiphy
= wlc
->wiphy
;
1103 /* name and offsets for dma_attach */
1104 snprintf(name
, sizeof(name
), "wl%d", unit
);
1106 if (wlc_hw
->di
[0] == NULL
) { /* Init FIFOs */
1107 int dma_attach_err
= 0;
1111 * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1112 * RX: RX_FIFO (RX data packets)
1114 wlc_hw
->di
[0] = dma_attach(name
, wlc_hw
->sih
, wlc_hw
->d11core
,
1115 (wme
? dmareg(DMA_TX
, 0) : 0),
1117 (wme
? NTXD
: 0), NRXD
,
1118 RXBUFSZ
, -1, NRXBUFPOST
,
1119 BRCMS_HWRXOFF
, &brcm_msg_level
);
1120 dma_attach_err
|= (NULL
== wlc_hw
->di
[0]);
1124 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1125 * (legacy) TX_DATA_FIFO (TX data packets)
1128 wlc_hw
->di
[1] = dma_attach(name
, wlc_hw
->sih
, wlc_hw
->d11core
,
1129 dmareg(DMA_TX
, 1), 0,
1130 NTXD
, 0, 0, -1, 0, 0,
1132 dma_attach_err
|= (NULL
== wlc_hw
->di
[1]);
1136 * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1139 wlc_hw
->di
[2] = dma_attach(name
, wlc_hw
->sih
, wlc_hw
->d11core
,
1140 dmareg(DMA_TX
, 2), 0,
1141 NTXD
, 0, 0, -1, 0, 0,
1143 dma_attach_err
|= (NULL
== wlc_hw
->di
[2]);
1146 * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1147 * (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1149 wlc_hw
->di
[3] = dma_attach(name
, wlc_hw
->sih
, wlc_hw
->d11core
,
1152 0, 0, &brcm_msg_level
);
1153 dma_attach_err
|= (NULL
== wlc_hw
->di
[3]);
1154 /* Cleaner to leave this as if with AP defined */
1156 if (dma_attach_err
) {
1157 wiphy_err(wiphy
, "wl%d: wlc_attach: dma_attach failed"
1162 /* get pointer to dma engine tx flow control variable */
1163 for (i
= 0; i
< NFIFO
; i
++)
1165 wlc_hw
->txavail
[i
] =
1166 (uint
*) dma_getvar(wlc_hw
->di
[i
],
1170 /* initial ucode host flags */
1171 brcms_c_mhfdef(wlc
, wlc_hw
->band
->mhfs
, pio_mhf2
);
1176 static void brcms_b_detach_dmapio(struct brcms_hardware
*wlc_hw
)
1180 for (j
= 0; j
< NFIFO
; j
++) {
1181 if (wlc_hw
->di
[j
]) {
1182 dma_detach(wlc_hw
->di
[j
]);
1183 wlc_hw
->di
[j
] = NULL
;
1189 * Initialize brcms_c_info default values ...
1190 * may get overrides later in this function
1191 * BMAC_NOTES, move low out and resolve the dangling ones
1193 static void brcms_b_info_init(struct brcms_hardware
*wlc_hw
)
1195 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1197 /* set default sw macintmask value */
1198 wlc
->defmacintmask
= DEF_MACINTMASK
;
1200 /* various 802.11g modes */
1201 wlc_hw
->shortslot
= false;
1203 wlc_hw
->SFBL
= RETRY_SHORT_FB
;
1204 wlc_hw
->LFBL
= RETRY_LONG_FB
;
1206 /* default mac retry limits */
1207 wlc_hw
->SRL
= RETRY_SHORT_DEF
;
1208 wlc_hw
->LRL
= RETRY_LONG_DEF
;
1209 wlc_hw
->chanspec
= ch20mhz_chspec(1);
1212 static void brcms_b_wait_for_wake(struct brcms_hardware
*wlc_hw
)
1214 /* delay before first read of ucode state */
1217 /* wait until ucode is no longer asleep */
1218 SPINWAIT((brcms_b_read_shm(wlc_hw
, M_UCODE_DBGST
) ==
1219 DBGST_ASLEEP
), wlc_hw
->wlc
->fastpwrup_dly
);
1222 /* control chip clock to save power, enable dynamic clock or force fast clock */
1223 static void brcms_b_clkctl_clk(struct brcms_hardware
*wlc_hw
, enum bcma_clkmode mode
)
1225 if (ai_get_cccaps(wlc_hw
->sih
) & CC_CAP_PMU
) {
1226 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1227 * on backplane, but mac core will still run on ALP(not HT) when
1228 * it enters powersave mode, which means the FCA bit may not be
1229 * set. Should wakeup mac if driver wants it to run on HT.
1233 if (mode
== BCMA_CLKMODE_FAST
) {
1234 bcma_set32(wlc_hw
->d11core
,
1235 D11REGOFFS(clk_ctl_st
),
1241 ((bcma_read32(wlc_hw
->d11core
,
1242 D11REGOFFS(clk_ctl_st
)) &
1244 PMU_MAX_TRANSITION_DLY
);
1245 WARN_ON(!(bcma_read32(wlc_hw
->d11core
,
1246 D11REGOFFS(clk_ctl_st
)) &
1249 if ((ai_get_pmurev(wlc_hw
->sih
) == 0) &&
1250 (bcma_read32(wlc_hw
->d11core
,
1251 D11REGOFFS(clk_ctl_st
)) &
1252 (CCS_FORCEHT
| CCS_HTAREQ
)))
1254 ((bcma_read32(wlc_hw
->d11core
,
1255 offsetof(struct d11regs
,
1258 PMU_MAX_TRANSITION_DLY
);
1259 bcma_mask32(wlc_hw
->d11core
,
1260 D11REGOFFS(clk_ctl_st
),
1264 wlc_hw
->forcefastclk
= (mode
== BCMA_CLKMODE_FAST
);
1267 /* old chips w/o PMU, force HT through cc,
1268 * then use FCA to verify mac is running fast clock
1271 wlc_hw
->forcefastclk
= ai_clkctl_cc(wlc_hw
->sih
, mode
);
1273 /* check fast clock is available (if core is not in reset) */
1274 if (wlc_hw
->forcefastclk
&& wlc_hw
->clk
)
1275 WARN_ON(!(bcma_aread32(wlc_hw
->d11core
, BCMA_IOST
) &
1279 * keep the ucode wake bit on if forcefastclk is on since we
1280 * do not want ucode to put us back to slow clock when it dozes
1281 * for PM mode. Code below matches the wake override bit with
1282 * current forcefastclk state. Only setting bit in wake_override
1283 * instead of waking ucode immediately since old code had this
1284 * behavior. Older code set wlc->forcefastclk but only had the
1285 * wake happen if the wakup_ucode work (protected by an up
1286 * check) was executed just below.
1288 if (wlc_hw
->forcefastclk
)
1289 mboolset(wlc_hw
->wake_override
,
1290 BRCMS_WAKE_OVERRIDE_FORCEFAST
);
1292 mboolclr(wlc_hw
->wake_override
,
1293 BRCMS_WAKE_OVERRIDE_FORCEFAST
);
1297 /* set or clear ucode host flag bits
1298 * it has an optimization for no-change write
1299 * it only writes through shared memory when the core has clock;
1300 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1303 * bands values are: BRCM_BAND_AUTO <--- Current band only
1304 * BRCM_BAND_5G <--- 5G band only
1305 * BRCM_BAND_2G <--- 2G band only
1306 * BRCM_BAND_ALL <--- All bands
1309 brcms_b_mhf(struct brcms_hardware
*wlc_hw
, u8 idx
, u16 mask
, u16 val
,
1313 u16 addr
[MHFMAX
] = {
1314 M_HOST_FLAGS1
, M_HOST_FLAGS2
, M_HOST_FLAGS3
, M_HOST_FLAGS4
,
1317 struct brcms_hw_band
*band
;
1319 if ((val
& ~mask
) || idx
>= MHFMAX
)
1320 return; /* error condition */
1323 /* Current band only or all bands,
1324 * then set the band to current band
1326 case BRCM_BAND_AUTO
:
1328 band
= wlc_hw
->band
;
1331 band
= wlc_hw
->bandstate
[BAND_5G_INDEX
];
1334 band
= wlc_hw
->bandstate
[BAND_2G_INDEX
];
1337 band
= NULL
; /* error condition */
1341 save
= band
->mhfs
[idx
];
1342 band
->mhfs
[idx
] = (band
->mhfs
[idx
] & ~mask
) | val
;
1344 /* optimization: only write through if changed, and
1345 * changed band is the current band
1347 if (wlc_hw
->clk
&& (band
->mhfs
[idx
] != save
)
1348 && (band
== wlc_hw
->band
))
1349 brcms_b_write_shm(wlc_hw
, addr
[idx
],
1350 (u16
) band
->mhfs
[idx
]);
1353 if (bands
== BRCM_BAND_ALL
) {
1354 wlc_hw
->bandstate
[0]->mhfs
[idx
] =
1355 (wlc_hw
->bandstate
[0]->mhfs
[idx
] & ~mask
) | val
;
1356 wlc_hw
->bandstate
[1]->mhfs
[idx
] =
1357 (wlc_hw
->bandstate
[1]->mhfs
[idx
] & ~mask
) | val
;
1361 /* set the maccontrol register to desired reset state and
1362 * initialize the sw cache of the register
1364 static void brcms_c_mctrl_reset(struct brcms_hardware
*wlc_hw
)
1366 /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1367 wlc_hw
->maccontrol
= 0;
1368 wlc_hw
->suspended_fifos
= 0;
1369 wlc_hw
->wake_override
= 0;
1370 wlc_hw
->mute_override
= 0;
1371 brcms_b_mctrl(wlc_hw
, ~0, MCTL_IHR_EN
| MCTL_WAKE
);
1375 * write the software state of maccontrol and
1376 * overrides to the maccontrol register
1378 static void brcms_c_mctrl_write(struct brcms_hardware
*wlc_hw
)
1380 u32 maccontrol
= wlc_hw
->maccontrol
;
1382 /* OR in the wake bit if overridden */
1383 if (wlc_hw
->wake_override
)
1384 maccontrol
|= MCTL_WAKE
;
1386 /* set AP and INFRA bits for mute if needed */
1387 if (wlc_hw
->mute_override
) {
1388 maccontrol
&= ~(MCTL_AP
);
1389 maccontrol
|= MCTL_INFRA
;
1392 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(maccontrol
),
1396 /* set or clear maccontrol bits */
1397 void brcms_b_mctrl(struct brcms_hardware
*wlc_hw
, u32 mask
, u32 val
)
1403 return; /* error condition */
1404 maccontrol
= wlc_hw
->maccontrol
;
1405 new_maccontrol
= (maccontrol
& ~mask
) | val
;
1407 /* if the new maccontrol value is the same as the old, nothing to do */
1408 if (new_maccontrol
== maccontrol
)
1411 /* something changed, cache the new value */
1412 wlc_hw
->maccontrol
= new_maccontrol
;
1414 /* write the new values with overrides applied */
1415 brcms_c_mctrl_write(wlc_hw
);
1418 void brcms_c_ucode_wake_override_set(struct brcms_hardware
*wlc_hw
,
1421 if (wlc_hw
->wake_override
|| (wlc_hw
->maccontrol
& MCTL_WAKE
)) {
1422 mboolset(wlc_hw
->wake_override
, override_bit
);
1426 mboolset(wlc_hw
->wake_override
, override_bit
);
1428 brcms_c_mctrl_write(wlc_hw
);
1429 brcms_b_wait_for_wake(wlc_hw
);
1432 void brcms_c_ucode_wake_override_clear(struct brcms_hardware
*wlc_hw
,
1435 mboolclr(wlc_hw
->wake_override
, override_bit
);
1437 if (wlc_hw
->wake_override
|| (wlc_hw
->maccontrol
& MCTL_WAKE
))
1440 brcms_c_mctrl_write(wlc_hw
);
1443 /* When driver needs ucode to stop beaconing, it has to make sure that
1444 * MCTL_AP is clear and MCTL_INFRA is set
1445 * Mode MCTL_AP MCTL_INFRA
1447 * STA 0 1 <--- This will ensure no beacons
1450 static void brcms_c_ucode_mute_override_set(struct brcms_hardware
*wlc_hw
)
1452 wlc_hw
->mute_override
= 1;
1454 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1455 * override, then there is no change to write
1457 if ((wlc_hw
->maccontrol
& (MCTL_AP
| MCTL_INFRA
)) == MCTL_INFRA
)
1460 brcms_c_mctrl_write(wlc_hw
);
1463 /* Clear the override on AP and INFRA bits */
1464 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware
*wlc_hw
)
1466 if (wlc_hw
->mute_override
== 0)
1469 wlc_hw
->mute_override
= 0;
1471 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1472 * override, then there is no change to write
1474 if ((wlc_hw
->maccontrol
& (MCTL_AP
| MCTL_INFRA
)) == MCTL_INFRA
)
1477 brcms_c_mctrl_write(wlc_hw
);
1481 * Write a MAC address to the given match reg offset in the RXE match engine.
1484 brcms_b_set_addrmatch(struct brcms_hardware
*wlc_hw
, int match_reg_offset
,
1487 struct bcma_device
*core
= wlc_hw
->d11core
;
1492 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: brcms_b_set_addrmatch\n",
1495 mac_l
= addr
[0] | (addr
[1] << 8);
1496 mac_m
= addr
[2] | (addr
[3] << 8);
1497 mac_h
= addr
[4] | (addr
[5] << 8);
1499 /* enter the MAC addr into the RXE match registers */
1500 bcma_write16(core
, D11REGOFFS(rcm_ctl
),
1501 RCM_INC_DATA
| match_reg_offset
);
1502 bcma_write16(core
, D11REGOFFS(rcm_mat_data
), mac_l
);
1503 bcma_write16(core
, D11REGOFFS(rcm_mat_data
), mac_m
);
1504 bcma_write16(core
, D11REGOFFS(rcm_mat_data
), mac_h
);
1508 brcms_b_write_template_ram(struct brcms_hardware
*wlc_hw
, int offset
, int len
,
1511 struct bcma_device
*core
= wlc_hw
->d11core
;
1516 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1518 bcma_write32(core
, D11REGOFFS(tplatewrptr
), offset
);
1520 /* if MCTL_BIGEND bit set in mac control register,
1521 * the chip swaps data in fifo, as well as data in
1524 be_bit
= (bcma_read32(core
, D11REGOFFS(maccontrol
)) & MCTL_BIGEND
) != 0;
1527 memcpy(&word
, buf
, sizeof(u32
));
1530 word_be
= cpu_to_be32(word
);
1531 word
= *(u32
*)&word_be
;
1533 word_le
= cpu_to_le32(word
);
1534 word
= *(u32
*)&word_le
;
1537 bcma_write32(core
, D11REGOFFS(tplatewrdata
), word
);
1539 buf
= (u8
*) buf
+ sizeof(u32
);
1544 static void brcms_b_set_cwmin(struct brcms_hardware
*wlc_hw
, u16 newmin
)
1546 wlc_hw
->band
->CWmin
= newmin
;
1548 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objaddr
),
1549 OBJADDR_SCR_SEL
| S_DOT11_CWMIN
);
1550 (void)bcma_read32(wlc_hw
->d11core
, D11REGOFFS(objaddr
));
1551 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objdata
), newmin
);
1554 static void brcms_b_set_cwmax(struct brcms_hardware
*wlc_hw
, u16 newmax
)
1556 wlc_hw
->band
->CWmax
= newmax
;
1558 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objaddr
),
1559 OBJADDR_SCR_SEL
| S_DOT11_CWMAX
);
1560 (void)bcma_read32(wlc_hw
->d11core
, D11REGOFFS(objaddr
));
1561 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objdata
), newmax
);
1564 void brcms_b_bw_set(struct brcms_hardware
*wlc_hw
, u16 bw
)
1568 /* request FAST clock if not on */
1569 fastclk
= wlc_hw
->forcefastclk
;
1571 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_FAST
);
1573 wlc_phy_bw_state_set(wlc_hw
->band
->pi
, bw
);
1575 brcms_b_phy_reset(wlc_hw
);
1576 wlc_phy_init(wlc_hw
->band
->pi
, wlc_phy_chanspec_get(wlc_hw
->band
->pi
));
1578 /* restore the clk */
1580 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_DYNAMIC
);
1583 static void brcms_b_upd_synthpu(struct brcms_hardware
*wlc_hw
)
1586 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1587 /* update SYNTHPU_DLY */
1589 if (BRCMS_ISLCNPHY(wlc
->band
))
1590 v
= SYNTHPU_DLY_LPPHY_US
;
1591 else if (BRCMS_ISNPHY(wlc
->band
) && (NREV_GE(wlc
->band
->phyrev
, 3)))
1592 v
= SYNTHPU_DLY_NPHY_US
;
1594 v
= SYNTHPU_DLY_BPHY_US
;
1596 brcms_b_write_shm(wlc_hw
, M_SYNTHPU_DLY
, v
);
1599 static void brcms_c_ucode_txant_set(struct brcms_hardware
*wlc_hw
)
1602 u16 phytxant
= wlc_hw
->bmac_phytxant
;
1603 u16 mask
= PHY_TXC_ANT_MASK
;
1605 /* set the Probe Response frame phy control word */
1606 phyctl
= brcms_b_read_shm(wlc_hw
, M_CTXPRS_BLK
+ C_CTX_PCTLWD_POS
);
1607 phyctl
= (phyctl
& ~mask
) | phytxant
;
1608 brcms_b_write_shm(wlc_hw
, M_CTXPRS_BLK
+ C_CTX_PCTLWD_POS
, phyctl
);
1610 /* set the Response (ACK/CTS) frame phy control word */
1611 phyctl
= brcms_b_read_shm(wlc_hw
, M_RSP_PCTLWD
);
1612 phyctl
= (phyctl
& ~mask
) | phytxant
;
1613 brcms_b_write_shm(wlc_hw
, M_RSP_PCTLWD
, phyctl
);
1616 static u16
brcms_b_ofdm_ratetable_offset(struct brcms_hardware
*wlc_hw
,
1621 struct plcp_signal_rate_lookup
{
1625 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1626 const struct plcp_signal_rate_lookup rate_lookup
[] = {
1627 {BRCM_RATE_6M
, 0xB},
1628 {BRCM_RATE_9M
, 0xF},
1629 {BRCM_RATE_12M
, 0xA},
1630 {BRCM_RATE_18M
, 0xE},
1631 {BRCM_RATE_24M
, 0x9},
1632 {BRCM_RATE_36M
, 0xD},
1633 {BRCM_RATE_48M
, 0x8},
1634 {BRCM_RATE_54M
, 0xC}
1637 for (i
= 0; i
< ARRAY_SIZE(rate_lookup
); i
++) {
1638 if (rate
== rate_lookup
[i
].rate
) {
1639 plcp_rate
= rate_lookup
[i
].signal_rate
;
1644 /* Find the SHM pointer to the rate table entry by looking in the
1647 return 2 * brcms_b_read_shm(wlc_hw
, M_RT_DIRMAP_A
+ (plcp_rate
* 2));
1650 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware
*wlc_hw
)
1654 BRCM_RATE_6M
, BRCM_RATE_9M
, BRCM_RATE_12M
, BRCM_RATE_18M
,
1655 BRCM_RATE_24M
, BRCM_RATE_36M
, BRCM_RATE_48M
, BRCM_RATE_54M
1661 if (!BRCMS_PHY_11N_CAP(wlc_hw
->band
))
1664 /* walk the phy rate table and update the entries */
1665 for (i
= 0; i
< ARRAY_SIZE(rates
); i
++) {
1668 entry_ptr
= brcms_b_ofdm_ratetable_offset(wlc_hw
, rate
);
1670 /* read the SHM Rate Table entry OFDM PCTL1 values */
1672 brcms_b_read_shm(wlc_hw
, entry_ptr
+ M_RT_OFDM_PCTL1_POS
);
1674 /* modify the value */
1675 pctl1
&= ~PHY_TXC1_MODE_MASK
;
1676 pctl1
|= (wlc_hw
->hw_stf_ss_opmode
<< PHY_TXC1_MODE_SHIFT
);
1678 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1679 brcms_b_write_shm(wlc_hw
, entry_ptr
+ M_RT_OFDM_PCTL1_POS
,
1684 /* band-specific init */
1685 static void brcms_b_bsinit(struct brcms_c_info
*wlc
, u16 chanspec
)
1687 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
1689 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
1690 wlc_hw
->band
->bandunit
);
1692 brcms_c_ucode_bsinit(wlc_hw
);
1694 wlc_phy_init(wlc_hw
->band
->pi
, chanspec
);
1696 brcms_c_ucode_txant_set(wlc_hw
);
1699 * cwmin is band-specific, update hardware
1700 * with value for current band
1702 brcms_b_set_cwmin(wlc_hw
, wlc_hw
->band
->CWmin
);
1703 brcms_b_set_cwmax(wlc_hw
, wlc_hw
->band
->CWmax
);
1705 brcms_b_update_slot_timing(wlc_hw
,
1706 wlc_hw
->band
->bandtype
== BRCM_BAND_5G
?
1707 true : wlc_hw
->shortslot
);
1709 /* write phytype and phyvers */
1710 brcms_b_write_shm(wlc_hw
, M_PHYTYPE
, (u16
) wlc_hw
->band
->phytype
);
1711 brcms_b_write_shm(wlc_hw
, M_PHYVER
, (u16
) wlc_hw
->band
->phyrev
);
1714 * initialize the txphyctl1 rate table since
1715 * shmem is shared between bands
1717 brcms_upd_ofdm_pctl1_table(wlc_hw
);
1719 brcms_b_upd_synthpu(wlc_hw
);
1722 /* Perform a soft reset of the PHY PLL */
1723 void brcms_b_core_phypll_reset(struct brcms_hardware
*wlc_hw
)
1725 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1727 ai_cc_reg(wlc_hw
->sih
, offsetof(struct chipcregs
, chipcontrol_addr
),
1730 ai_cc_reg(wlc_hw
->sih
, offsetof(struct chipcregs
, chipcontrol_data
),
1733 ai_cc_reg(wlc_hw
->sih
, offsetof(struct chipcregs
, chipcontrol_data
),
1736 ai_cc_reg(wlc_hw
->sih
, offsetof(struct chipcregs
, chipcontrol_data
),
1741 /* light way to turn on phy clock without reset for NPHY only
1742 * refer to brcms_b_core_phy_clk for full version
1744 void brcms_b_phyclk_fgc(struct brcms_hardware
*wlc_hw
, bool clk
)
1746 /* support(necessary for NPHY and HYPHY) only */
1747 if (!BRCMS_ISNPHY(wlc_hw
->band
))
1751 brcms_b_core_ioctl(wlc_hw
, SICF_FGC
, SICF_FGC
);
1753 brcms_b_core_ioctl(wlc_hw
, SICF_FGC
, 0);
1757 void brcms_b_macphyclk_set(struct brcms_hardware
*wlc_hw
, bool clk
)
1760 brcms_b_core_ioctl(wlc_hw
, SICF_MPCLKE
, SICF_MPCLKE
);
1762 brcms_b_core_ioctl(wlc_hw
, SICF_MPCLKE
, 0);
1765 void brcms_b_phy_reset(struct brcms_hardware
*wlc_hw
)
1767 struct brcms_phy_pub
*pih
= wlc_hw
->band
->pi
;
1769 bool phy_in_reset
= false;
1771 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1776 phy_bw_clkbits
= wlc_phy_clk_bwbits(wlc_hw
->band
->pi
);
1778 /* Specific reset sequence required for NPHY rev 3 and 4 */
1779 if (BRCMS_ISNPHY(wlc_hw
->band
) && NREV_GE(wlc_hw
->band
->phyrev
, 3) &&
1780 NREV_LE(wlc_hw
->band
->phyrev
, 4)) {
1781 /* Set the PHY bandwidth */
1782 brcms_b_core_ioctl(wlc_hw
, SICF_BWMASK
, phy_bw_clkbits
);
1786 /* Perform a soft reset of the PHY PLL */
1787 brcms_b_core_phypll_reset(wlc_hw
);
1790 brcms_b_core_ioctl(wlc_hw
, (SICF_PRST
| SICF_PCLKE
),
1791 (SICF_PRST
| SICF_PCLKE
));
1792 phy_in_reset
= true;
1794 brcms_b_core_ioctl(wlc_hw
,
1795 (SICF_PRST
| SICF_PCLKE
| SICF_BWMASK
),
1796 (SICF_PRST
| SICF_PCLKE
| phy_bw_clkbits
));
1800 brcms_b_core_phy_clk(wlc_hw
, ON
);
1803 wlc_phy_anacore(pih
, ON
);
1806 /* switch to and initialize new band */
1807 static void brcms_b_setband(struct brcms_hardware
*wlc_hw
, uint bandunit
,
1809 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
1812 /* Enable the d11 core before accessing it */
1813 if (!bcma_core_is_enabled(wlc_hw
->d11core
)) {
1814 bcma_core_enable(wlc_hw
->d11core
, 0);
1815 brcms_c_mctrl_reset(wlc_hw
);
1818 macintmask
= brcms_c_setband_inact(wlc
, bandunit
);
1823 brcms_b_core_phy_clk(wlc_hw
, ON
);
1825 /* band-specific initializations */
1826 brcms_b_bsinit(wlc
, chanspec
);
1829 * If there are any pending software interrupt bits,
1830 * then replace these with a harmless nonzero value
1831 * so brcms_c_dpc() will re-enable interrupts when done.
1833 if (wlc
->macintstatus
)
1834 wlc
->macintstatus
= MI_DMAINT
;
1836 /* restore macintmask */
1837 brcms_intrsrestore(wlc
->wl
, macintmask
);
1839 /* ucode should still be suspended.. */
1840 WARN_ON((bcma_read32(wlc_hw
->d11core
, D11REGOFFS(maccontrol
)) &
1844 static bool brcms_c_isgoodchip(struct brcms_hardware
*wlc_hw
)
1847 /* reject unsupported corerev */
1848 if (!CONF_HAS(D11CONF
, wlc_hw
->corerev
)) {
1849 wiphy_err(wlc_hw
->wlc
->wiphy
, "unsupported core rev %d\n",
1857 /* Validate some board info parameters */
1858 static bool brcms_c_validboardtype(struct brcms_hardware
*wlc_hw
)
1860 uint boardrev
= wlc_hw
->boardrev
;
1862 /* 4 bits each for board type, major, minor, and tiny version */
1863 uint brt
= (boardrev
& 0xf000) >> 12;
1864 uint b0
= (boardrev
& 0xf00) >> 8;
1865 uint b1
= (boardrev
& 0xf0) >> 4;
1866 uint b2
= boardrev
& 0xf;
1868 /* voards from other vendors are always considered valid */
1869 if (ai_get_boardvendor(wlc_hw
->sih
) != PCI_VENDOR_ID_BROADCOM
)
1872 /* do some boardrev sanity checks when boardvendor is Broadcom */
1876 if (boardrev
<= 0xff)
1879 if ((brt
> 2) || (brt
== 0) || (b0
> 9) || (b0
== 0) || (b1
> 9)
1886 static void brcms_c_get_macaddr(struct brcms_hardware
*wlc_hw
, u8 etheraddr
[ETH_ALEN
])
1888 struct ssb_sprom
*sprom
= &wlc_hw
->d11core
->bus
->sprom
;
1890 /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1891 if (!is_zero_ether_addr(sprom
->il0mac
)) {
1892 memcpy(etheraddr
, sprom
->il0mac
, 6);
1896 if (wlc_hw
->_nbands
> 1)
1897 memcpy(etheraddr
, sprom
->et1mac
, 6);
1899 memcpy(etheraddr
, sprom
->il0mac
, 6);
1902 /* power both the pll and external oscillator on/off */
1903 static void brcms_b_xtal(struct brcms_hardware
*wlc_hw
, bool want
)
1905 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: want %d\n", wlc_hw
->unit
, want
);
1908 * dont power down if plldown is false or
1909 * we must poll hw radio disable
1911 if (!want
&& wlc_hw
->pllreq
)
1914 wlc_hw
->sbclk
= want
;
1915 if (!wlc_hw
->sbclk
) {
1916 wlc_hw
->clk
= false;
1917 if (wlc_hw
->band
&& wlc_hw
->band
->pi
)
1918 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, false);
1923 * Return true if radio is disabled, otherwise false.
1924 * hw radio disable signal is an external pin, users activate it asynchronously
1925 * this function could be called when driver is down and w/o clock
1926 * it operates on different registers depending on corerev and boardflag.
1928 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware
*wlc_hw
)
1933 xtal
= wlc_hw
->sbclk
;
1935 brcms_b_xtal(wlc_hw
, ON
);
1937 /* may need to take core out of reset first */
1941 * mac no longer enables phyclk automatically when driver
1942 * accesses phyreg throughput mac. This can be skipped since
1943 * only mac reg is accessed below
1945 flags
|= SICF_PCLKE
;
1948 * TODO: test suspend/resume
1950 * AI chip doesn't restore bar0win2 on
1951 * hibernation/resume, need sw fixup
1954 bcma_core_enable(wlc_hw
->d11core
, flags
);
1955 brcms_c_mctrl_reset(wlc_hw
);
1958 v
= ((bcma_read32(wlc_hw
->d11core
,
1959 D11REGOFFS(phydebug
)) & PDBG_RFD
) != 0);
1961 /* put core back into reset */
1963 bcma_core_disable(wlc_hw
->d11core
, 0);
1966 brcms_b_xtal(wlc_hw
, OFF
);
1971 static bool wlc_dma_rxreset(struct brcms_hardware
*wlc_hw
, uint fifo
)
1973 struct dma_pub
*di
= wlc_hw
->di
[fifo
];
1974 return dma_rxreset(di
);
1978 * ensure fask clock during reset
1980 * reset d11(out of reset)
1981 * reset phy(out of reset)
1982 * clear software macintstatus for fresh new start
1983 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
1985 void brcms_b_corereset(struct brcms_hardware
*wlc_hw
, u32 flags
)
1990 if (flags
== BRCMS_USE_COREFLAGS
)
1991 flags
= (wlc_hw
->band
->pi
? wlc_hw
->band
->core_flags
: 0);
1993 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
1995 /* request FAST clock if not on */
1996 fastclk
= wlc_hw
->forcefastclk
;
1998 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_FAST
);
2000 /* reset the dma engines except first time thru */
2001 if (bcma_core_is_enabled(wlc_hw
->d11core
)) {
2002 for (i
= 0; i
< NFIFO
; i
++)
2003 if ((wlc_hw
->di
[i
]) && (!dma_txreset(wlc_hw
->di
[i
])))
2004 wiphy_err(wlc_hw
->wlc
->wiphy
, "wl%d: %s: "
2005 "dma_txreset[%d]: cannot stop dma\n",
2006 wlc_hw
->unit
, __func__
, i
);
2008 if ((wlc_hw
->di
[RX_FIFO
])
2009 && (!wlc_dma_rxreset(wlc_hw
, RX_FIFO
)))
2010 wiphy_err(wlc_hw
->wlc
->wiphy
, "wl%d: %s: dma_rxreset"
2011 "[%d]: cannot stop dma\n",
2012 wlc_hw
->unit
, __func__
, RX_FIFO
);
2014 /* if noreset, just stop the psm and return */
2015 if (wlc_hw
->noreset
) {
2016 wlc_hw
->wlc
->macintstatus
= 0; /* skip wl_dpc after down */
2017 brcms_b_mctrl(wlc_hw
, MCTL_PSM_RUN
| MCTL_EN_MAC
, 0);
2022 * mac no longer enables phyclk automatically when driver accesses
2023 * phyreg throughput mac, AND phy_reset is skipped at early stage when
2024 * band->pi is invalid. need to enable PHY CLK
2026 flags
|= SICF_PCLKE
;
2030 * In chips with PMU, the fastclk request goes through d11 core
2031 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2033 * This adds some delay and we can optimize it by also requesting
2034 * fastclk through chipcommon during this period if necessary. But
2035 * that has to work coordinate with other driver like mips/arm since
2036 * they may touch chipcommon as well.
2038 wlc_hw
->clk
= false;
2039 bcma_core_enable(wlc_hw
->d11core
, flags
);
2041 if (wlc_hw
->band
&& wlc_hw
->band
->pi
)
2042 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, true);
2044 brcms_c_mctrl_reset(wlc_hw
);
2046 if (ai_get_cccaps(wlc_hw
->sih
) & CC_CAP_PMU
)
2047 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_FAST
);
2049 brcms_b_phy_reset(wlc_hw
);
2051 /* turn on PHY_PLL */
2052 brcms_b_core_phypll_ctl(wlc_hw
, true);
2054 /* clear sw intstatus */
2055 wlc_hw
->wlc
->macintstatus
= 0;
2057 /* restore the clk setting */
2059 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_DYNAMIC
);
2062 /* txfifo sizes needs to be modified(increased) since the newer cores
2065 static void brcms_b_corerev_fifofixup(struct brcms_hardware
*wlc_hw
)
2067 struct bcma_device
*core
= wlc_hw
->d11core
;
2069 u16 txfifo_startblk
= TXFIFO_START_BLK
, txfifo_endblk
;
2070 u16 txfifo_def
, txfifo_def1
;
2073 /* tx fifos start at TXFIFO_START_BLK from the Base address */
2074 txfifo_startblk
= TXFIFO_START_BLK
;
2076 /* sequence of operations: reset fifo, set fifo size, reset fifo */
2077 for (fifo_nu
= 0; fifo_nu
< NFIFO
; fifo_nu
++) {
2079 txfifo_endblk
= txfifo_startblk
+ wlc_hw
->xmtfifo_sz
[fifo_nu
];
2080 txfifo_def
= (txfifo_startblk
& 0xff) |
2081 (((txfifo_endblk
- 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT
);
2082 txfifo_def1
= ((txfifo_startblk
>> 8) & 0x1) |
2084 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT
);
2086 TXFIFOCMD_RESET_MASK
| (fifo_nu
<< TXFIFOCMD_FIFOSEL_SHIFT
);
2088 bcma_write16(core
, D11REGOFFS(xmtfifocmd
), txfifo_cmd
);
2089 bcma_write16(core
, D11REGOFFS(xmtfifodef
), txfifo_def
);
2090 bcma_write16(core
, D11REGOFFS(xmtfifodef1
), txfifo_def1
);
2092 bcma_write16(core
, D11REGOFFS(xmtfifocmd
), txfifo_cmd
);
2094 txfifo_startblk
+= wlc_hw
->xmtfifo_sz
[fifo_nu
];
2097 * need to propagate to shm location to be in sync since ucode/hw won't
2100 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE0
,
2101 wlc_hw
->xmtfifo_sz
[TX_AC_BE_FIFO
]);
2102 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE1
,
2103 wlc_hw
->xmtfifo_sz
[TX_AC_VI_FIFO
]);
2104 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE2
,
2105 ((wlc_hw
->xmtfifo_sz
[TX_AC_VO_FIFO
] << 8) | wlc_hw
->
2106 xmtfifo_sz
[TX_AC_BK_FIFO
]));
2107 brcms_b_write_shm(wlc_hw
, M_FIFOSIZE3
,
2108 ((wlc_hw
->xmtfifo_sz
[TX_ATIM_FIFO
] << 8) | wlc_hw
->
2109 xmtfifo_sz
[TX_BCMC_FIFO
]));
2112 /* This function is used for changing the tsf frac register
2113 * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2114 * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2115 * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2116 * HTPHY Formula is 2^26/freq(MHz) e.g.
2117 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2118 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2119 * For spuron: 123MHz -> 2^26/123 = 545600.5
2120 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2121 * For spur off: 120MHz -> 2^26/120 = 559240.5
2122 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2125 void brcms_b_switch_macfreq(struct brcms_hardware
*wlc_hw
, u8 spurmode
)
2127 struct bcma_device
*core
= wlc_hw
->d11core
;
2129 if ((ai_get_chip_id(wlc_hw
->sih
) == BCM43224_CHIP_ID
) ||
2130 (ai_get_chip_id(wlc_hw
->sih
) == BCM43225_CHIP_ID
)) {
2131 if (spurmode
== WL_SPURAVOID_ON2
) { /* 126Mhz */
2132 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_l
), 0x2082);
2133 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_h
), 0x8);
2134 } else if (spurmode
== WL_SPURAVOID_ON1
) { /* 123Mhz */
2135 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_l
), 0x5341);
2136 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_h
), 0x8);
2137 } else { /* 120Mhz */
2138 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_l
), 0x8889);
2139 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_h
), 0x8);
2141 } else if (BRCMS_ISLCNPHY(wlc_hw
->band
)) {
2142 if (spurmode
== WL_SPURAVOID_ON1
) { /* 82Mhz */
2143 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_l
), 0x7CE0);
2144 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_h
), 0xC);
2145 } else { /* 80Mhz */
2146 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_l
), 0xCCCD);
2147 bcma_write16(core
, D11REGOFFS(tsf_clk_frac_h
), 0xC);
2152 /* Initialize GPIOs that are controlled by D11 core */
2153 static void brcms_c_gpio_init(struct brcms_c_info
*wlc
)
2155 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2158 /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2159 brcms_b_mctrl(wlc_hw
, MCTL_GPOUT_SEL_MASK
, 0);
2162 * Common GPIO setup:
2163 * G0 = LED 0 = WLAN Activity
2164 * G1 = LED 1 = WLAN 2.4 GHz Radio State
2165 * G2 = LED 2 = WLAN 5 GHz Radio State
2166 * G4 = radio disable input (HI enabled, LO disabled)
2171 /* Allocate GPIOs for mimo antenna diversity feature */
2172 if (wlc_hw
->antsel_type
== ANTSEL_2x3
) {
2173 /* Enable antenna diversity, use 2x3 mode */
2174 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_EN
,
2175 MHF3_ANTSEL_EN
, BRCM_BAND_ALL
);
2176 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_MODE
,
2177 MHF3_ANTSEL_MODE
, BRCM_BAND_ALL
);
2179 /* init superswitch control */
2180 wlc_phy_antsel_init(wlc_hw
->band
->pi
, false);
2182 } else if (wlc_hw
->antsel_type
== ANTSEL_2x4
) {
2183 gm
|= gc
|= (BOARD_GPIO_12
| BOARD_GPIO_13
);
2185 * The board itself is powered by these GPIOs
2186 * (when not sending pattern) so set them high
2188 bcma_set16(wlc_hw
->d11core
, D11REGOFFS(psm_gpio_oe
),
2189 (BOARD_GPIO_12
| BOARD_GPIO_13
));
2190 bcma_set16(wlc_hw
->d11core
, D11REGOFFS(psm_gpio_out
),
2191 (BOARD_GPIO_12
| BOARD_GPIO_13
));
2193 /* Enable antenna diversity, use 2x4 mode */
2194 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_EN
,
2195 MHF3_ANTSEL_EN
, BRCM_BAND_ALL
);
2196 brcms_b_mhf(wlc_hw
, MHF3
, MHF3_ANTSEL_MODE
, 0,
2199 /* Configure the desired clock to be 4Mhz */
2200 brcms_b_write_shm(wlc_hw
, M_ANTSEL_CLKDIV
,
2201 ANTSEL_CLKDIV_4MHZ
);
2205 * gpio 9 controls the PA. ucode is responsible
2206 * for wiggling out and oe
2208 if (wlc_hw
->boardflags
& BFL_PACTRL
)
2209 gm
|= gc
|= BOARD_GPIO_PACTRL
;
2211 /* apply to gpiocontrol register */
2212 bcma_chipco_gpio_control(&wlc_hw
->d11core
->bus
->drv_cc
, gm
, gc
);
2215 static void brcms_ucode_write(struct brcms_hardware
*wlc_hw
,
2216 const __le32 ucode
[], const size_t nbytes
)
2218 struct bcma_device
*core
= wlc_hw
->d11core
;
2222 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
2224 count
= (nbytes
/ sizeof(u32
));
2226 bcma_write32(core
, D11REGOFFS(objaddr
),
2227 OBJADDR_AUTO_INC
| OBJADDR_UCM_SEL
);
2228 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2229 for (i
= 0; i
< count
; i
++)
2230 bcma_write32(core
, D11REGOFFS(objdata
), le32_to_cpu(ucode
[i
]));
2234 static void brcms_ucode_download(struct brcms_hardware
*wlc_hw
)
2236 struct brcms_c_info
*wlc
;
2237 struct brcms_ucode
*ucode
= &wlc_hw
->wlc
->wl
->ucode
;
2241 if (wlc_hw
->ucode_loaded
)
2244 if (D11REV_IS(wlc_hw
->corerev
, 23)) {
2245 if (BRCMS_ISNPHY(wlc_hw
->band
)) {
2246 brcms_ucode_write(wlc_hw
, ucode
->bcm43xx_16_mimo
,
2247 ucode
->bcm43xx_16_mimosz
);
2248 wlc_hw
->ucode_loaded
= true;
2250 wiphy_err(wlc
->wiphy
, "%s: wl%d: unsupported phy in "
2252 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
2253 } else if (D11REV_IS(wlc_hw
->corerev
, 24)) {
2254 if (BRCMS_ISLCNPHY(wlc_hw
->band
)) {
2255 brcms_ucode_write(wlc_hw
, ucode
->bcm43xx_24_lcn
,
2256 ucode
->bcm43xx_24_lcnsz
);
2257 wlc_hw
->ucode_loaded
= true;
2259 wiphy_err(wlc
->wiphy
, "%s: wl%d: unsupported phy in "
2261 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
2266 void brcms_b_txant_set(struct brcms_hardware
*wlc_hw
, u16 phytxant
)
2268 /* update sw state */
2269 wlc_hw
->bmac_phytxant
= phytxant
;
2271 /* push to ucode if up */
2274 brcms_c_ucode_txant_set(wlc_hw
);
2278 u16
brcms_b_get_txant(struct brcms_hardware
*wlc_hw
)
2280 return (u16
) wlc_hw
->wlc
->stf
->txant
;
2283 void brcms_b_antsel_type_set(struct brcms_hardware
*wlc_hw
, u8 antsel_type
)
2285 wlc_hw
->antsel_type
= antsel_type
;
2287 /* Update the antsel type for phy module to use */
2288 wlc_phy_antsel_type_set(wlc_hw
->band
->pi
, antsel_type
);
2291 static void brcms_b_fifoerrors(struct brcms_hardware
*wlc_hw
)
2295 uint intstatus
, idx
;
2296 struct bcma_device
*core
= wlc_hw
->d11core
;
2297 struct wiphy
*wiphy
= wlc_hw
->wlc
->wiphy
;
2299 unit
= wlc_hw
->unit
;
2301 for (idx
= 0; idx
< NFIFO
; idx
++) {
2302 /* read intstatus register and ignore any non-error bits */
2305 D11REGOFFS(intctrlregs
[idx
].intstatus
)) &
2310 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: intstatus%d 0x%x\n",
2311 unit
, idx
, intstatus
);
2313 if (intstatus
& I_RO
) {
2314 wiphy_err(wiphy
, "wl%d: fifo %d: receive fifo "
2315 "overflow\n", unit
, idx
);
2319 if (intstatus
& I_PC
) {
2320 wiphy_err(wiphy
, "wl%d: fifo %d: descriptor error\n",
2325 if (intstatus
& I_PD
) {
2326 wiphy_err(wiphy
, "wl%d: fifo %d: data error\n", unit
,
2331 if (intstatus
& I_DE
) {
2332 wiphy_err(wiphy
, "wl%d: fifo %d: descriptor protocol "
2333 "error\n", unit
, idx
);
2337 if (intstatus
& I_RU
)
2338 wiphy_err(wiphy
, "wl%d: fifo %d: receive descriptor "
2339 "underflow\n", idx
, unit
);
2341 if (intstatus
& I_XU
) {
2342 wiphy_err(wiphy
, "wl%d: fifo %d: transmit fifo "
2343 "underflow\n", idx
, unit
);
2348 brcms_fatal_error(wlc_hw
->wlc
->wl
); /* big hammer */
2352 D11REGOFFS(intctrlregs
[idx
].intstatus
),
2357 void brcms_c_intrson(struct brcms_c_info
*wlc
)
2359 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2360 wlc
->macintmask
= wlc
->defmacintmask
;
2361 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(macintmask
), wlc
->macintmask
);
2364 u32
brcms_c_intrsoff(struct brcms_c_info
*wlc
)
2366 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2372 macintmask
= wlc
->macintmask
; /* isr can still happen */
2374 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(macintmask
), 0);
2375 (void)bcma_read32(wlc_hw
->d11core
, D11REGOFFS(macintmask
));
2376 udelay(1); /* ensure int line is no longer driven */
2377 wlc
->macintmask
= 0;
2379 /* return previous macintmask; resolve race between us and our isr */
2380 return wlc
->macintstatus
? 0 : macintmask
;
2383 void brcms_c_intrsrestore(struct brcms_c_info
*wlc
, u32 macintmask
)
2385 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2389 wlc
->macintmask
= macintmask
;
2390 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(macintmask
), wlc
->macintmask
);
2393 /* assumes that the d11 MAC is enabled */
2394 static void brcms_b_tx_fifo_suspend(struct brcms_hardware
*wlc_hw
,
2397 u8 fifo
= 1 << tx_fifo
;
2399 /* Two clients of this code, 11h Quiet period and scanning. */
2401 /* only suspend if not already suspended */
2402 if ((wlc_hw
->suspended_fifos
& fifo
) == fifo
)
2405 /* force the core awake only if not already */
2406 if (wlc_hw
->suspended_fifos
== 0)
2407 brcms_c_ucode_wake_override_set(wlc_hw
,
2408 BRCMS_WAKE_OVERRIDE_TXFIFO
);
2410 wlc_hw
->suspended_fifos
|= fifo
;
2412 if (wlc_hw
->di
[tx_fifo
]) {
2414 * Suspending AMPDU transmissions in the middle can cause
2415 * underflow which may result in mismatch between ucode and
2416 * driver so suspend the mac before suspending the FIFO
2418 if (BRCMS_PHY_11N_CAP(wlc_hw
->band
))
2419 brcms_c_suspend_mac_and_wait(wlc_hw
->wlc
);
2421 dma_txsuspend(wlc_hw
->di
[tx_fifo
]);
2423 if (BRCMS_PHY_11N_CAP(wlc_hw
->band
))
2424 brcms_c_enable_mac(wlc_hw
->wlc
);
2428 static void brcms_b_tx_fifo_resume(struct brcms_hardware
*wlc_hw
,
2431 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2432 * but need to be done here for PIO otherwise the watchdog will catch
2433 * the inconsistency and fire
2435 /* Two clients of this code, 11h Quiet period and scanning. */
2436 if (wlc_hw
->di
[tx_fifo
])
2437 dma_txresume(wlc_hw
->di
[tx_fifo
]);
2439 /* allow core to sleep again */
2440 if (wlc_hw
->suspended_fifos
== 0)
2443 wlc_hw
->suspended_fifos
&= ~(1 << tx_fifo
);
2444 if (wlc_hw
->suspended_fifos
== 0)
2445 brcms_c_ucode_wake_override_clear(wlc_hw
,
2446 BRCMS_WAKE_OVERRIDE_TXFIFO
);
2450 /* precondition: requires the mac core to be enabled */
2451 static void brcms_b_mute(struct brcms_hardware
*wlc_hw
, bool mute_tx
)
2453 static const u8 null_ether_addr
[ETH_ALEN
] = {0, 0, 0, 0, 0, 0};
2456 /* suspend tx fifos */
2457 brcms_b_tx_fifo_suspend(wlc_hw
, TX_DATA_FIFO
);
2458 brcms_b_tx_fifo_suspend(wlc_hw
, TX_CTL_FIFO
);
2459 brcms_b_tx_fifo_suspend(wlc_hw
, TX_AC_BK_FIFO
);
2460 brcms_b_tx_fifo_suspend(wlc_hw
, TX_AC_VI_FIFO
);
2462 /* zero the address match register so we do not send ACKs */
2463 brcms_b_set_addrmatch(wlc_hw
, RCM_MAC_OFFSET
,
2466 /* resume tx fifos */
2467 brcms_b_tx_fifo_resume(wlc_hw
, TX_DATA_FIFO
);
2468 brcms_b_tx_fifo_resume(wlc_hw
, TX_CTL_FIFO
);
2469 brcms_b_tx_fifo_resume(wlc_hw
, TX_AC_BK_FIFO
);
2470 brcms_b_tx_fifo_resume(wlc_hw
, TX_AC_VI_FIFO
);
2472 /* Restore address */
2473 brcms_b_set_addrmatch(wlc_hw
, RCM_MAC_OFFSET
,
2477 wlc_phy_mute_upd(wlc_hw
->band
->pi
, mute_tx
, 0);
2480 brcms_c_ucode_mute_override_set(wlc_hw
);
2482 brcms_c_ucode_mute_override_clear(wlc_hw
);
2486 brcms_c_mute(struct brcms_c_info
*wlc
, bool mute_tx
)
2488 brcms_b_mute(wlc
->hw
, mute_tx
);
2492 * Read and clear macintmask and macintstatus and intstatus registers.
2493 * This routine should be called with interrupts off
2495 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2496 * 0 if the interrupt is not for us, or we are in some special cases;
2497 * device interrupt status bits otherwise.
2499 static inline u32
wlc_intstatus(struct brcms_c_info
*wlc
, bool in_isr
)
2501 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2502 struct bcma_device
*core
= wlc_hw
->d11core
;
2505 /* macintstatus includes a DMA interrupt summary bit */
2506 macintstatus
= bcma_read32(core
, D11REGOFFS(macintstatus
));
2508 BCMMSG(wlc
->wiphy
, "wl%d: macintstatus: 0x%x\n", wlc_hw
->unit
,
2511 /* detect cardbus removed, in power down(suspend) and in reset */
2512 if (brcms_deviceremoved(wlc
))
2515 /* brcms_deviceremoved() succeeds even when the core is still resetting,
2516 * handle that case here.
2518 if (macintstatus
== 0xffffffff)
2521 /* defer unsolicited interrupts */
2522 macintstatus
&= (in_isr
? wlc
->macintmask
: wlc
->defmacintmask
);
2525 if (macintstatus
== 0)
2528 /* interrupts are already turned off for CFE build
2529 * Caution: For CFE Turning off the interrupts again has some undesired
2532 /* turn off the interrupts */
2533 bcma_write32(core
, D11REGOFFS(macintmask
), 0);
2534 (void)bcma_read32(core
, D11REGOFFS(macintmask
));
2535 wlc
->macintmask
= 0;
2537 /* clear device interrupts */
2538 bcma_write32(core
, D11REGOFFS(macintstatus
), macintstatus
);
2540 /* MI_DMAINT is indication of non-zero intstatus */
2541 if (macintstatus
& MI_DMAINT
)
2543 * only fifo interrupt enabled is I_RI in
2544 * RX_FIFO. If MI_DMAINT is set, assume it
2545 * is set and clear the interrupt.
2547 bcma_write32(core
, D11REGOFFS(intctrlregs
[RX_FIFO
].intstatus
),
2550 return macintstatus
;
2553 /* Update wlc->macintstatus and wlc->intstatus[]. */
2554 /* Return true if they are updated successfully. false otherwise */
2555 bool brcms_c_intrsupd(struct brcms_c_info
*wlc
)
2559 /* read and clear macintstatus and intstatus registers */
2560 macintstatus
= wlc_intstatus(wlc
, false);
2562 /* device is removed */
2563 if (macintstatus
== 0xffffffff)
2566 /* update interrupt status in software */
2567 wlc
->macintstatus
|= macintstatus
;
2573 * First-level interrupt processing.
2574 * Return true if this was our interrupt, false otherwise.
2575 * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2578 bool brcms_c_isr(struct brcms_c_info
*wlc
, bool *wantdpc
)
2580 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2585 if (!wlc_hw
->up
|| !wlc
->macintmask
)
2588 /* read and clear macintstatus and intstatus registers */
2589 macintstatus
= wlc_intstatus(wlc
, true);
2591 if (macintstatus
== 0xffffffff)
2592 wiphy_err(wlc
->wiphy
, "DEVICEREMOVED detected in the ISR code"
2595 /* it is not for us */
2596 if (macintstatus
== 0)
2601 /* save interrupt status bits */
2602 wlc
->macintstatus
= macintstatus
;
2608 void brcms_c_suspend_mac_and_wait(struct brcms_c_info
*wlc
)
2610 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2611 struct bcma_device
*core
= wlc_hw
->d11core
;
2613 struct wiphy
*wiphy
= wlc
->wiphy
;
2615 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
2616 wlc_hw
->band
->bandunit
);
2619 * Track overlapping suspend requests
2621 wlc_hw
->mac_suspend_depth
++;
2622 if (wlc_hw
->mac_suspend_depth
> 1)
2625 /* force the core awake */
2626 brcms_c_ucode_wake_override_set(wlc_hw
, BRCMS_WAKE_OVERRIDE_MACSUSPEND
);
2628 mc
= bcma_read32(core
, D11REGOFFS(maccontrol
));
2630 if (mc
== 0xffffffff) {
2631 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
2633 brcms_down(wlc
->wl
);
2636 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2637 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2638 WARN_ON(!(mc
& MCTL_EN_MAC
));
2640 mi
= bcma_read32(core
, D11REGOFFS(macintstatus
));
2641 if (mi
== 0xffffffff) {
2642 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
2644 brcms_down(wlc
->wl
);
2647 WARN_ON(mi
& MI_MACSSPNDD
);
2649 brcms_b_mctrl(wlc_hw
, MCTL_EN_MAC
, 0);
2651 SPINWAIT(!(bcma_read32(core
, D11REGOFFS(macintstatus
)) & MI_MACSSPNDD
),
2652 BRCMS_MAX_MAC_SUSPEND
);
2654 if (!(bcma_read32(core
, D11REGOFFS(macintstatus
)) & MI_MACSSPNDD
)) {
2655 wiphy_err(wiphy
, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2656 " and MI_MACSSPNDD is still not on.\n",
2657 wlc_hw
->unit
, BRCMS_MAX_MAC_SUSPEND
);
2658 wiphy_err(wiphy
, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2659 "psm_brc 0x%04x\n", wlc_hw
->unit
,
2660 bcma_read32(core
, D11REGOFFS(psmdebug
)),
2661 bcma_read32(core
, D11REGOFFS(phydebug
)),
2662 bcma_read16(core
, D11REGOFFS(psm_brc
)));
2665 mc
= bcma_read32(core
, D11REGOFFS(maccontrol
));
2666 if (mc
== 0xffffffff) {
2667 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
2669 brcms_down(wlc
->wl
);
2672 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2673 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2674 WARN_ON(mc
& MCTL_EN_MAC
);
2677 void brcms_c_enable_mac(struct brcms_c_info
*wlc
)
2679 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2680 struct bcma_device
*core
= wlc_hw
->d11core
;
2683 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n", wlc_hw
->unit
,
2684 wlc
->band
->bandunit
);
2687 * Track overlapping suspend requests
2689 wlc_hw
->mac_suspend_depth
--;
2690 if (wlc_hw
->mac_suspend_depth
> 0)
2693 mc
= bcma_read32(core
, D11REGOFFS(maccontrol
));
2694 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2695 WARN_ON(mc
& MCTL_EN_MAC
);
2696 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2698 brcms_b_mctrl(wlc_hw
, MCTL_EN_MAC
, MCTL_EN_MAC
);
2699 bcma_write32(core
, D11REGOFFS(macintstatus
), MI_MACSSPNDD
);
2701 mc
= bcma_read32(core
, D11REGOFFS(maccontrol
));
2702 WARN_ON(mc
& MCTL_PSM_JMP_0
);
2703 WARN_ON(!(mc
& MCTL_EN_MAC
));
2704 WARN_ON(!(mc
& MCTL_PSM_RUN
));
2706 mi
= bcma_read32(core
, D11REGOFFS(macintstatus
));
2707 WARN_ON(mi
& MI_MACSSPNDD
);
2709 brcms_c_ucode_wake_override_clear(wlc_hw
,
2710 BRCMS_WAKE_OVERRIDE_MACSUSPEND
);
2713 void brcms_b_band_stf_ss_set(struct brcms_hardware
*wlc_hw
, u8 stf_mode
)
2715 wlc_hw
->hw_stf_ss_opmode
= stf_mode
;
2718 brcms_upd_ofdm_pctl1_table(wlc_hw
);
2721 static bool brcms_b_validate_chip_access(struct brcms_hardware
*wlc_hw
)
2723 struct bcma_device
*core
= wlc_hw
->d11core
;
2725 struct wiphy
*wiphy
= wlc_hw
->wlc
->wiphy
;
2727 BCMMSG(wiphy
, "wl%d\n", wlc_hw
->unit
);
2729 /* Validate dchip register access */
2731 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2732 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2733 w
= bcma_read32(core
, D11REGOFFS(objdata
));
2735 /* Can we write and read back a 32bit register? */
2736 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2737 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2738 bcma_write32(core
, D11REGOFFS(objdata
), (u32
) 0xaa5555aa);
2740 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2741 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2742 val
= bcma_read32(core
, D11REGOFFS(objdata
));
2743 if (val
!= (u32
) 0xaa5555aa) {
2744 wiphy_err(wiphy
, "wl%d: validate_chip_access: SHM = 0x%x, "
2745 "expected 0xaa5555aa\n", wlc_hw
->unit
, val
);
2749 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2750 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2751 bcma_write32(core
, D11REGOFFS(objdata
), (u32
) 0x55aaaa55);
2753 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2754 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2755 val
= bcma_read32(core
, D11REGOFFS(objdata
));
2756 if (val
!= (u32
) 0x55aaaa55) {
2757 wiphy_err(wiphy
, "wl%d: validate_chip_access: SHM = 0x%x, "
2758 "expected 0x55aaaa55\n", wlc_hw
->unit
, val
);
2762 bcma_write32(core
, D11REGOFFS(objaddr
), OBJADDR_SHM_SEL
| 0);
2763 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2764 bcma_write32(core
, D11REGOFFS(objdata
), w
);
2766 /* clear CFPStart */
2767 bcma_write32(core
, D11REGOFFS(tsf_cfpstart
), 0);
2769 w
= bcma_read32(core
, D11REGOFFS(maccontrol
));
2770 if ((w
!= (MCTL_IHR_EN
| MCTL_WAKE
)) &&
2771 (w
!= (MCTL_IHR_EN
| MCTL_GMODE
| MCTL_WAKE
))) {
2772 wiphy_err(wiphy
, "wl%d: validate_chip_access: maccontrol = "
2773 "0x%x, expected 0x%x or 0x%x\n", wlc_hw
->unit
, w
,
2774 (MCTL_IHR_EN
| MCTL_WAKE
),
2775 (MCTL_IHR_EN
| MCTL_GMODE
| MCTL_WAKE
));
2782 #define PHYPLL_WAIT_US 100000
2784 void brcms_b_core_phypll_ctl(struct brcms_hardware
*wlc_hw
, bool on
)
2786 struct bcma_device
*core
= wlc_hw
->d11core
;
2789 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
2794 if ((ai_get_chip_id(wlc_hw
->sih
) == BCM4313_CHIP_ID
)) {
2795 bcma_set32(core
, D11REGOFFS(clk_ctl_st
),
2797 CCS_ERSRC_REQ_D11PLL
|
2798 CCS_ERSRC_REQ_PHYPLL
);
2799 SPINWAIT((bcma_read32(core
, D11REGOFFS(clk_ctl_st
)) &
2800 CCS_ERSRC_AVAIL_HT
) != CCS_ERSRC_AVAIL_HT
,
2803 tmp
= bcma_read32(core
, D11REGOFFS(clk_ctl_st
));
2804 if ((tmp
& CCS_ERSRC_AVAIL_HT
) != CCS_ERSRC_AVAIL_HT
)
2805 wiphy_err(wlc_hw
->wlc
->wiphy
, "%s: turn on PHY"
2806 " PLL failed\n", __func__
);
2808 bcma_set32(core
, D11REGOFFS(clk_ctl_st
),
2809 tmp
| CCS_ERSRC_REQ_D11PLL
|
2810 CCS_ERSRC_REQ_PHYPLL
);
2811 SPINWAIT((bcma_read32(core
, D11REGOFFS(clk_ctl_st
)) &
2812 (CCS_ERSRC_AVAIL_D11PLL
|
2813 CCS_ERSRC_AVAIL_PHYPLL
)) !=
2814 (CCS_ERSRC_AVAIL_D11PLL
|
2815 CCS_ERSRC_AVAIL_PHYPLL
), PHYPLL_WAIT_US
);
2817 tmp
= bcma_read32(core
, D11REGOFFS(clk_ctl_st
));
2819 (CCS_ERSRC_AVAIL_D11PLL
| CCS_ERSRC_AVAIL_PHYPLL
))
2821 (CCS_ERSRC_AVAIL_D11PLL
| CCS_ERSRC_AVAIL_PHYPLL
))
2822 wiphy_err(wlc_hw
->wlc
->wiphy
, "%s: turn on "
2823 "PHY PLL failed\n", __func__
);
2827 * Since the PLL may be shared, other cores can still
2828 * be requesting it; so we'll deassert the request but
2829 * not wait for status to comply.
2831 bcma_mask32(core
, D11REGOFFS(clk_ctl_st
),
2832 ~CCS_ERSRC_REQ_PHYPLL
);
2833 (void)bcma_read32(core
, D11REGOFFS(clk_ctl_st
));
2837 static void brcms_c_coredisable(struct brcms_hardware
*wlc_hw
)
2841 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
2843 dev_gone
= brcms_deviceremoved(wlc_hw
->wlc
);
2848 if (wlc_hw
->noreset
)
2852 wlc_phy_switch_radio(wlc_hw
->band
->pi
, OFF
);
2854 /* turn off analog core */
2855 wlc_phy_anacore(wlc_hw
->band
->pi
, OFF
);
2857 /* turn off PHYPLL to save power */
2858 brcms_b_core_phypll_ctl(wlc_hw
, false);
2860 wlc_hw
->clk
= false;
2861 bcma_core_disable(wlc_hw
->d11core
, 0);
2862 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, false);
2865 static void brcms_c_flushqueues(struct brcms_c_info
*wlc
)
2867 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
2870 /* free any posted tx packets */
2871 for (i
= 0; i
< NFIFO
; i
++)
2872 if (wlc_hw
->di
[i
]) {
2873 dma_txreclaim(wlc_hw
->di
[i
], DMA_RANGE_ALL
);
2874 wlc
->core
->txpktpend
[i
] = 0;
2875 BCMMSG(wlc
->wiphy
, "pktpend fifo %d clrd\n", i
);
2878 /* free any posted rx packets */
2879 dma_rxreclaim(wlc_hw
->di
[RX_FIFO
]);
2883 brcms_b_read_objmem(struct brcms_hardware
*wlc_hw
, uint offset
, u32 sel
)
2885 struct bcma_device
*core
= wlc_hw
->d11core
;
2886 u16 objoff
= D11REGOFFS(objdata
);
2888 bcma_write32(core
, D11REGOFFS(objaddr
), sel
| (offset
>> 2));
2889 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2893 return bcma_read16(core
, objoff
);
2897 brcms_b_write_objmem(struct brcms_hardware
*wlc_hw
, uint offset
, u16 v
,
2900 struct bcma_device
*core
= wlc_hw
->d11core
;
2901 u16 objoff
= D11REGOFFS(objdata
);
2903 bcma_write32(core
, D11REGOFFS(objaddr
), sel
| (offset
>> 2));
2904 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
2908 bcma_write16(core
, objoff
, v
);
2912 * Read a single u16 from shared memory.
2913 * SHM 'offset' needs to be an even address
2915 u16
brcms_b_read_shm(struct brcms_hardware
*wlc_hw
, uint offset
)
2917 return brcms_b_read_objmem(wlc_hw
, offset
, OBJADDR_SHM_SEL
);
2921 * Write a single u16 to shared memory.
2922 * SHM 'offset' needs to be an even address
2924 void brcms_b_write_shm(struct brcms_hardware
*wlc_hw
, uint offset
, u16 v
)
2926 brcms_b_write_objmem(wlc_hw
, offset
, v
, OBJADDR_SHM_SEL
);
2930 * Copy a buffer to shared memory of specified type .
2931 * SHM 'offset' needs to be an even address and
2932 * Buffer length 'len' must be an even number of bytes
2933 * 'sel' selects the type of memory
2936 brcms_b_copyto_objmem(struct brcms_hardware
*wlc_hw
, uint offset
,
2937 const void *buf
, int len
, u32 sel
)
2940 const u8
*p
= (const u8
*)buf
;
2943 if (len
<= 0 || (offset
& 1) || (len
& 1))
2946 for (i
= 0; i
< len
; i
+= 2) {
2947 v
= p
[i
] | (p
[i
+ 1] << 8);
2948 brcms_b_write_objmem(wlc_hw
, offset
+ i
, v
, sel
);
2953 * Copy a piece of shared memory of specified type to a buffer .
2954 * SHM 'offset' needs to be an even address and
2955 * Buffer length 'len' must be an even number of bytes
2956 * 'sel' selects the type of memory
2959 brcms_b_copyfrom_objmem(struct brcms_hardware
*wlc_hw
, uint offset
, void *buf
,
2966 if (len
<= 0 || (offset
& 1) || (len
& 1))
2969 for (i
= 0; i
< len
; i
+= 2) {
2970 v
= brcms_b_read_objmem(wlc_hw
, offset
+ i
, sel
);
2972 p
[i
+ 1] = (v
>> 8) & 0xFF;
2976 /* Copy a buffer to shared memory.
2977 * SHM 'offset' needs to be an even address and
2978 * Buffer length 'len' must be an even number of bytes
2980 static void brcms_c_copyto_shm(struct brcms_c_info
*wlc
, uint offset
,
2981 const void *buf
, int len
)
2983 brcms_b_copyto_objmem(wlc
->hw
, offset
, buf
, len
, OBJADDR_SHM_SEL
);
2986 static void brcms_b_retrylimit_upd(struct brcms_hardware
*wlc_hw
,
2992 /* write retry limit to SCR, shouldn't need to suspend */
2994 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objaddr
),
2995 OBJADDR_SCR_SEL
| S_DOT11_SRC_LMT
);
2996 (void)bcma_read32(wlc_hw
->d11core
, D11REGOFFS(objaddr
));
2997 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objdata
), wlc_hw
->SRL
);
2998 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objaddr
),
2999 OBJADDR_SCR_SEL
| S_DOT11_LRC_LMT
);
3000 (void)bcma_read32(wlc_hw
->d11core
, D11REGOFFS(objaddr
));
3001 bcma_write32(wlc_hw
->d11core
, D11REGOFFS(objdata
), wlc_hw
->LRL
);
3005 static void brcms_b_pllreq(struct brcms_hardware
*wlc_hw
, bool set
, u32 req_bit
)
3008 if (mboolisset(wlc_hw
->pllreq
, req_bit
))
3011 mboolset(wlc_hw
->pllreq
, req_bit
);
3013 if (mboolisset(wlc_hw
->pllreq
, BRCMS_PLLREQ_FLIP
)) {
3015 brcms_b_xtal(wlc_hw
, ON
);
3018 if (!mboolisset(wlc_hw
->pllreq
, req_bit
))
3021 mboolclr(wlc_hw
->pllreq
, req_bit
);
3023 if (mboolisset(wlc_hw
->pllreq
, BRCMS_PLLREQ_FLIP
)) {
3025 brcms_b_xtal(wlc_hw
, OFF
);
3030 static void brcms_b_antsel_set(struct brcms_hardware
*wlc_hw
, u32 antsel_avail
)
3032 wlc_hw
->antsel_avail
= antsel_avail
;
3036 * conditions under which the PM bit should be set in outgoing frames
3037 * and STAY_AWAKE is meaningful
3039 static bool brcms_c_ps_allowed(struct brcms_c_info
*wlc
)
3041 struct brcms_bss_cfg
*cfg
= wlc
->bsscfg
;
3043 /* disallow PS when one of the following global conditions meets */
3044 if (!wlc
->pub
->associated
)
3047 /* disallow PS when one of these meets when not scanning */
3048 if (wlc
->filter_flags
& FIF_PROMISC_IN_BSS
)
3051 if (cfg
->associated
) {
3053 * disallow PS when one of the following
3054 * bsscfg specific conditions meets
3065 static void brcms_c_statsupd(struct brcms_c_info
*wlc
)
3068 struct macstat macstats
;
3075 /* if driver down, make no sense to update stats */
3080 /* save last rx fifo 0 overflow count */
3081 rxf0ovfl
= wlc
->core
->macstat_snapshot
->rxf0ovfl
;
3083 /* save last tx fifo underflow count */
3084 for (i
= 0; i
< NFIFO
; i
++)
3085 txfunfl
[i
] = wlc
->core
->macstat_snapshot
->txfunfl
[i
];
3088 /* Read mac stats from contiguous shared memory */
3089 brcms_b_copyfrom_objmem(wlc
->hw
, M_UCODE_MACSTAT
, &macstats
,
3090 sizeof(struct macstat
), OBJADDR_SHM_SEL
);
3093 /* check for rx fifo 0 overflow */
3094 delta
= (u16
) (wlc
->core
->macstat_snapshot
->rxf0ovfl
- rxf0ovfl
);
3096 wiphy_err(wlc
->wiphy
, "wl%d: %u rx fifo 0 overflows!\n",
3097 wlc
->pub
->unit
, delta
);
3099 /* check for tx fifo underflows */
3100 for (i
= 0; i
< NFIFO
; i
++) {
3102 (u16
) (wlc
->core
->macstat_snapshot
->txfunfl
[i
] -
3105 wiphy_err(wlc
->wiphy
, "wl%d: %u tx fifo %d underflows!"
3106 "\n", wlc
->pub
->unit
, delta
, i
);
3110 /* merge counters from dma module */
3111 for (i
= 0; i
< NFIFO
; i
++) {
3113 dma_counterreset(wlc
->hw
->di
[i
]);
3117 static void brcms_b_reset(struct brcms_hardware
*wlc_hw
)
3119 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
3121 /* reset the core */
3122 if (!brcms_deviceremoved(wlc_hw
->wlc
))
3123 brcms_b_corereset(wlc_hw
, BRCMS_USE_COREFLAGS
);
3125 /* purge the dma rings */
3126 brcms_c_flushqueues(wlc_hw
->wlc
);
3129 void brcms_c_reset(struct brcms_c_info
*wlc
)
3131 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
3133 /* slurp up hw mac counters before core reset */
3134 brcms_c_statsupd(wlc
);
3136 /* reset our snapshot of macstat counters */
3137 memset((char *)wlc
->core
->macstat_snapshot
, 0,
3138 sizeof(struct macstat
));
3140 brcms_b_reset(wlc
->hw
);
3143 void brcms_c_init_scb(struct scb
*scb
)
3147 memset(scb
, 0, sizeof(struct scb
));
3148 scb
->flags
= SCB_WMECAP
| SCB_HTCAP
;
3149 for (i
= 0; i
< NUMPRIO
; i
++) {
3151 scb
->seqctl
[i
] = 0xFFFF;
3154 scb
->seqctl_nonqos
= 0xFFFF;
3155 scb
->magic
= SCB_MAGIC
;
3160 * download ucode/PCM
3161 * let ucode run to suspended
3162 * download ucode inits
3163 * config other core registers
3166 static void brcms_b_coreinit(struct brcms_c_info
*wlc
)
3168 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
3169 struct bcma_device
*core
= wlc_hw
->d11core
;
3173 bool fifosz_fixup
= false;
3176 struct wiphy
*wiphy
= wlc
->wiphy
;
3177 struct brcms_ucode
*ucode
= &wlc_hw
->wlc
->wl
->ucode
;
3179 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
3182 brcms_b_mctrl(wlc_hw
, ~0, (MCTL_IHR_EN
| MCTL_PSM_JMP_0
| MCTL_WAKE
));
3184 brcms_ucode_download(wlc_hw
);
3186 * FIFOSZ fixup. driver wants to controls the fifo allocation.
3188 fifosz_fixup
= true;
3190 /* let the PSM run to the suspended state, set mode to BSS STA */
3191 bcma_write32(core
, D11REGOFFS(macintstatus
), -1);
3192 brcms_b_mctrl(wlc_hw
, ~0,
3193 (MCTL_IHR_EN
| MCTL_INFRA
| MCTL_PSM_RUN
| MCTL_WAKE
));
3195 /* wait for ucode to self-suspend after auto-init */
3196 SPINWAIT(((bcma_read32(core
, D11REGOFFS(macintstatus
)) &
3197 MI_MACSSPNDD
) == 0), 1000 * 1000);
3198 if ((bcma_read32(core
, D11REGOFFS(macintstatus
)) & MI_MACSSPNDD
) == 0)
3199 wiphy_err(wiphy
, "wl%d: wlc_coreinit: ucode did not self-"
3200 "suspend!\n", wlc_hw
->unit
);
3202 brcms_c_gpio_init(wlc
);
3204 sflags
= bcma_aread32(core
, BCMA_IOST
);
3206 if (D11REV_IS(wlc_hw
->corerev
, 23)) {
3207 if (BRCMS_ISNPHY(wlc_hw
->band
))
3208 brcms_c_write_inits(wlc_hw
, ucode
->d11n0initvals16
);
3210 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in corerev"
3211 " %d\n", __func__
, wlc_hw
->unit
,
3213 } else if (D11REV_IS(wlc_hw
->corerev
, 24)) {
3214 if (BRCMS_ISLCNPHY(wlc_hw
->band
))
3215 brcms_c_write_inits(wlc_hw
, ucode
->d11lcn0initvals24
);
3217 wiphy_err(wiphy
, "%s: wl%d: unsupported phy in corerev"
3218 " %d\n", __func__
, wlc_hw
->unit
,
3221 wiphy_err(wiphy
, "%s: wl%d: unsupported corerev %d\n",
3222 __func__
, wlc_hw
->unit
, wlc_hw
->corerev
);
3225 /* For old ucode, txfifo sizes needs to be modified(increased) */
3227 brcms_b_corerev_fifofixup(wlc_hw
);
3229 /* check txfifo allocations match between ucode and driver */
3230 buf
[TX_AC_BE_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE0
);
3231 if (buf
[TX_AC_BE_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_BE_FIFO
]) {
3235 buf
[TX_AC_VI_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE1
);
3236 if (buf
[TX_AC_VI_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_VI_FIFO
]) {
3240 buf
[TX_AC_BK_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE2
);
3241 buf
[TX_AC_VO_FIFO
] = (buf
[TX_AC_BK_FIFO
] >> 8) & 0xff;
3242 buf
[TX_AC_BK_FIFO
] &= 0xff;
3243 if (buf
[TX_AC_BK_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_BK_FIFO
]) {
3247 if (buf
[TX_AC_VO_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_AC_VO_FIFO
]) {
3251 buf
[TX_BCMC_FIFO
] = brcms_b_read_shm(wlc_hw
, M_FIFOSIZE3
);
3252 buf
[TX_ATIM_FIFO
] = (buf
[TX_BCMC_FIFO
] >> 8) & 0xff;
3253 buf
[TX_BCMC_FIFO
] &= 0xff;
3254 if (buf
[TX_BCMC_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_BCMC_FIFO
]) {
3258 if (buf
[TX_ATIM_FIFO
] != wlc_hw
->xmtfifo_sz
[TX_ATIM_FIFO
]) {
3263 wiphy_err(wiphy
, "wlc_coreinit: txfifo mismatch: ucode size %d"
3264 " driver size %d index %d\n", buf
[i
],
3265 wlc_hw
->xmtfifo_sz
[i
], i
);
3267 /* make sure we can still talk to the mac */
3268 WARN_ON(bcma_read32(core
, D11REGOFFS(maccontrol
)) == 0xffffffff);
3270 /* band-specific inits done by wlc_bsinit() */
3272 /* Set up frame burst size and antenna swap threshold init values */
3273 brcms_b_write_shm(wlc_hw
, M_MBURST_SIZE
, MAXTXFRAMEBURST
);
3274 brcms_b_write_shm(wlc_hw
, M_MAX_ANTCNT
, ANTCNT
);
3276 /* enable one rx interrupt per received frame */
3277 bcma_write32(core
, D11REGOFFS(intrcvlazy
[0]), (1 << IRL_FC_SHIFT
));
3279 /* set the station mode (BSS STA) */
3280 brcms_b_mctrl(wlc_hw
,
3281 (MCTL_INFRA
| MCTL_DISCARD_PMQ
| MCTL_AP
),
3282 (MCTL_INFRA
| MCTL_DISCARD_PMQ
));
3284 /* set up Beacon interval */
3285 bcnint_us
= 0x8000 << 10;
3286 bcma_write32(core
, D11REGOFFS(tsf_cfprep
),
3287 (bcnint_us
<< CFPREP_CBI_SHIFT
));
3288 bcma_write32(core
, D11REGOFFS(tsf_cfpstart
), bcnint_us
);
3289 bcma_write32(core
, D11REGOFFS(macintstatus
), MI_GP1
);
3291 /* write interrupt mask */
3292 bcma_write32(core
, D11REGOFFS(intctrlregs
[RX_FIFO
].intmask
),
3295 /* allow the MAC to control the PHY clock (dynamic on/off) */
3296 brcms_b_macphyclk_set(wlc_hw
, ON
);
3298 /* program dynamic clock control fast powerup delay register */
3299 wlc
->fastpwrup_dly
= ai_clkctl_fast_pwrup_delay(wlc_hw
->sih
);
3300 bcma_write16(core
, D11REGOFFS(scc_fastpwrup_dly
), wlc
->fastpwrup_dly
);
3302 /* tell the ucode the corerev */
3303 brcms_b_write_shm(wlc_hw
, M_MACHW_VER
, (u16
) wlc_hw
->corerev
);
3305 /* tell the ucode MAC capabilities */
3306 brcms_b_write_shm(wlc_hw
, M_MACHW_CAP_L
,
3307 (u16
) (wlc_hw
->machwcap
& 0xffff));
3308 brcms_b_write_shm(wlc_hw
, M_MACHW_CAP_H
,
3310 machwcap
>> 16) & 0xffff));
3312 /* write retry limits to SCR, this done after PSM init */
3313 bcma_write32(core
, D11REGOFFS(objaddr
),
3314 OBJADDR_SCR_SEL
| S_DOT11_SRC_LMT
);
3315 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
3316 bcma_write32(core
, D11REGOFFS(objdata
), wlc_hw
->SRL
);
3317 bcma_write32(core
, D11REGOFFS(objaddr
),
3318 OBJADDR_SCR_SEL
| S_DOT11_LRC_LMT
);
3319 (void)bcma_read32(core
, D11REGOFFS(objaddr
));
3320 bcma_write32(core
, D11REGOFFS(objdata
), wlc_hw
->LRL
);
3322 /* write rate fallback retry limits */
3323 brcms_b_write_shm(wlc_hw
, M_SFRMTXCNTFBRTHSD
, wlc_hw
->SFBL
);
3324 brcms_b_write_shm(wlc_hw
, M_LFRMTXCNTFBRTHSD
, wlc_hw
->LFBL
);
3326 bcma_mask16(core
, D11REGOFFS(ifs_ctl
), 0x0FFF);
3327 bcma_write16(core
, D11REGOFFS(ifs_aifsn
), EDCF_AIFSN_MIN
);
3329 /* init the tx dma engines */
3330 for (i
= 0; i
< NFIFO
; i
++) {
3332 dma_txinit(wlc_hw
->di
[i
]);
3335 /* init the rx dma engine(s) and post receive buffers */
3336 dma_rxinit(wlc_hw
->di
[RX_FIFO
]);
3337 dma_rxfill(wlc_hw
->di
[RX_FIFO
]);
3341 static brcms_b_init(struct brcms_hardware
*wlc_hw
, u16 chanspec
) {
3344 struct brcms_c_info
*wlc
= wlc_hw
->wlc
;
3346 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
3348 /* request FAST clock if not on */
3349 fastclk
= wlc_hw
->forcefastclk
;
3351 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_FAST
);
3353 /* disable interrupts */
3354 macintmask
= brcms_intrsoff(wlc
->wl
);
3356 /* set up the specified band and chanspec */
3357 brcms_c_setxband(wlc_hw
, chspec_bandunit(chanspec
));
3358 wlc_phy_chanspec_radio_set(wlc_hw
->band
->pi
, chanspec
);
3360 /* do one-time phy inits and calibration */
3361 wlc_phy_cal_init(wlc_hw
->band
->pi
);
3363 /* core-specific initialization */
3364 brcms_b_coreinit(wlc
);
3366 /* band-specific inits */
3367 brcms_b_bsinit(wlc
, chanspec
);
3369 /* restore macintmask */
3370 brcms_intrsrestore(wlc
->wl
, macintmask
);
3372 /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3373 * is suspended and brcms_c_enable_mac() will clear this override bit.
3375 mboolset(wlc_hw
->wake_override
, BRCMS_WAKE_OVERRIDE_MACSUSPEND
);
3378 * initialize mac_suspend_depth to 1 to match ucode
3379 * initial suspended state
3381 wlc_hw
->mac_suspend_depth
= 1;
3383 /* restore the clk */
3385 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_DYNAMIC
);
3388 static void brcms_c_set_phy_chanspec(struct brcms_c_info
*wlc
,
3391 /* Save our copy of the chanspec */
3392 wlc
->chanspec
= chanspec
;
3394 /* Set the chanspec and power limits for this locale */
3395 brcms_c_channel_set_chanspec(wlc
->cmi
, chanspec
, BRCMS_TXPWR_MAX
);
3397 if (wlc
->stf
->ss_algosel_auto
)
3398 brcms_c_stf_ss_algo_channel_get(wlc
, &wlc
->stf
->ss_algo_channel
,
3401 brcms_c_stf_ss_update(wlc
, wlc
->band
);
3405 brcms_default_rateset(struct brcms_c_info
*wlc
, struct brcms_c_rateset
*rs
)
3407 brcms_c_rateset_default(rs
, NULL
, wlc
->band
->phytype
,
3408 wlc
->band
->bandtype
, false, BRCMS_RATE_MASK_FULL
,
3409 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
),
3410 brcms_chspec_bw(wlc
->default_bss
->chanspec
),
3411 wlc
->stf
->txstreams
);
3414 /* derive wlc->band->basic_rate[] table from 'rateset' */
3415 static void brcms_c_rate_lookup_init(struct brcms_c_info
*wlc
,
3416 struct brcms_c_rateset
*rateset
)
3422 u8
*br
= wlc
->band
->basic_rate
;
3425 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3426 memset(br
, 0, BRCM_MAXRATE
+ 1);
3428 /* For each basic rate in the rates list, make an entry in the
3429 * best basic lookup.
3431 for (i
= 0; i
< rateset
->count
; i
++) {
3432 /* only make an entry for a basic rate */
3433 if (!(rateset
->rates
[i
] & BRCMS_RATE_FLAG
))
3436 /* mask off basic bit */
3437 rate
= (rateset
->rates
[i
] & BRCMS_RATE_MASK
);
3439 if (rate
> BRCM_MAXRATE
) {
3440 wiphy_err(wlc
->wiphy
, "brcms_c_rate_lookup_init: "
3441 "invalid rate 0x%X in rate set\n",
3449 /* The rate lookup table now has non-zero entries for each
3450 * basic rate, equal to the basic rate: br[basicN] = basicN
3452 * To look up the best basic rate corresponding to any
3453 * particular rate, code can use the basic_rate table
3456 * basic_rate = wlc->band->basic_rate[tx_rate]
3458 * Make sure there is a best basic rate entry for
3459 * every rate by walking up the table from low rates
3460 * to high, filling in holes in the lookup table
3463 for (i
= 0; i
< wlc
->band
->hw_rateset
.count
; i
++) {
3464 rate
= wlc
->band
->hw_rateset
.rates
[i
];
3466 if (br
[rate
] != 0) {
3467 /* This rate is a basic rate.
3468 * Keep track of the best basic rate so far by
3471 if (is_ofdm_rate(rate
))
3479 /* This rate is not a basic rate so figure out the
3480 * best basic rate less than this rate and fill in
3481 * the hole in the table
3484 br
[rate
] = is_ofdm_rate(rate
) ? ofdm_basic
: cck_basic
;
3489 if (is_ofdm_rate(rate
)) {
3491 * In 11g and 11a, the OFDM mandatory rates
3492 * are 6, 12, and 24 Mbps
3494 if (rate
>= BRCM_RATE_24M
)
3495 mandatory
= BRCM_RATE_24M
;
3496 else if (rate
>= BRCM_RATE_12M
)
3497 mandatory
= BRCM_RATE_12M
;
3499 mandatory
= BRCM_RATE_6M
;
3501 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3505 br
[rate
] = mandatory
;
3509 static void brcms_c_bandinit_ordered(struct brcms_c_info
*wlc
,
3512 struct brcms_c_rateset default_rateset
;
3514 uint i
, band_order
[2];
3516 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
3518 * We might have been bandlocked during down and the chip
3519 * power-cycled (hibernate). Figure out the right band to park on
3521 if (wlc
->bandlocked
|| wlc
->pub
->_nbands
== 1) {
3522 /* updated in brcms_c_bandlock() */
3523 parkband
= wlc
->band
->bandunit
;
3524 band_order
[0] = band_order
[1] = parkband
;
3526 /* park on the band of the specified chanspec */
3527 parkband
= chspec_bandunit(chanspec
);
3529 /* order so that parkband initialize last */
3530 band_order
[0] = parkband
^ 1;
3531 band_order
[1] = parkband
;
3534 /* make each band operational, software state init */
3535 for (i
= 0; i
< wlc
->pub
->_nbands
; i
++) {
3536 uint j
= band_order
[i
];
3538 wlc
->band
= wlc
->bandstate
[j
];
3540 brcms_default_rateset(wlc
, &default_rateset
);
3542 /* fill in hw_rate */
3543 brcms_c_rateset_filter(&default_rateset
, &wlc
->band
->hw_rateset
,
3544 false, BRCMS_RATES_CCK_OFDM
, BRCMS_RATE_MASK
,
3545 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
));
3547 /* init basic rate lookup */
3548 brcms_c_rate_lookup_init(wlc
, &default_rateset
);
3551 /* sync up phy/radio chanspec */
3552 brcms_c_set_phy_chanspec(wlc
, chanspec
);
3556 * Set or clear filtering related maccontrol bits based on
3557 * specified filter flags
3559 void brcms_c_mac_promisc(struct brcms_c_info
*wlc
, uint filter_flags
)
3561 u32 promisc_bits
= 0;
3563 wlc
->filter_flags
= filter_flags
;
3565 if (filter_flags
& (FIF_PROMISC_IN_BSS
| FIF_OTHER_BSS
))
3566 promisc_bits
|= MCTL_PROMISC
;
3568 if (filter_flags
& FIF_BCN_PRBRESP_PROMISC
)
3569 promisc_bits
|= MCTL_BCNS_PROMISC
;
3571 if (filter_flags
& FIF_FCSFAIL
)
3572 promisc_bits
|= MCTL_KEEPBADFCS
;
3574 if (filter_flags
& (FIF_CONTROL
| FIF_PSPOLL
))
3575 promisc_bits
|= MCTL_KEEPCONTROL
;
3577 brcms_b_mctrl(wlc
->hw
,
3578 MCTL_PROMISC
| MCTL_BCNS_PROMISC
|
3579 MCTL_KEEPCONTROL
| MCTL_KEEPBADFCS
,
3584 * ucode, hwmac update
3585 * Channel dependent updates for ucode and hw
3587 static void brcms_c_ucode_mac_upd(struct brcms_c_info
*wlc
)
3589 /* enable or disable any active IBSSs depending on whether or not
3590 * we are on the home channel
3592 if (wlc
->home_chanspec
== wlc_phy_chanspec_get(wlc
->band
->pi
)) {
3593 if (wlc
->pub
->associated
) {
3595 * BMAC_NOTE: This is something that should be fixed
3596 * in ucode inits. I think that the ucode inits set
3597 * up the bcn templates and shm values with a bogus
3598 * beacon. This should not be done in the inits. If
3599 * ucode needs to set up a beacon for testing, the
3600 * test routines should write it down, not expect the
3601 * inits to populate a bogus beacon.
3603 if (BRCMS_PHY_11N_CAP(wlc
->band
))
3604 brcms_b_write_shm(wlc
->hw
,
3605 M_BCN_TXTSF_OFFSET
, 0);
3608 /* disable an active IBSS if we are not on the home channel */
3612 static void brcms_c_write_rate_shm(struct brcms_c_info
*wlc
, u8 rate
,
3616 u8 basic_phy_rate
, basic_index
;
3617 u16 dir_table
, basic_table
;
3620 /* Shared memory address for the table we are reading */
3621 dir_table
= is_ofdm_rate(basic_rate
) ? M_RT_DIRMAP_A
: M_RT_DIRMAP_B
;
3623 /* Shared memory address for the table we are writing */
3624 basic_table
= is_ofdm_rate(rate
) ? M_RT_BBRSMAP_A
: M_RT_BBRSMAP_B
;
3627 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3628 * the index into the rate table.
3630 phy_rate
= rate_info
[rate
] & BRCMS_RATE_MASK
;
3631 basic_phy_rate
= rate_info
[basic_rate
] & BRCMS_RATE_MASK
;
3632 index
= phy_rate
& 0xf;
3633 basic_index
= basic_phy_rate
& 0xf;
3635 /* Find the SHM pointer to the ACK rate entry by looking in the
3638 basic_ptr
= brcms_b_read_shm(wlc
->hw
, (dir_table
+ basic_index
* 2));
3640 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3641 * to the correct basic rate for the given incoming rate
3643 brcms_b_write_shm(wlc
->hw
, (basic_table
+ index
* 2), basic_ptr
);
3646 static const struct brcms_c_rateset
*
3647 brcms_c_rateset_get_hwrs(struct brcms_c_info
*wlc
)
3649 const struct brcms_c_rateset
*rs_dflt
;
3651 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
3652 if (wlc
->band
->bandtype
== BRCM_BAND_5G
)
3653 rs_dflt
= &ofdm_mimo_rates
;
3655 rs_dflt
= &cck_ofdm_mimo_rates
;
3656 } else if (wlc
->band
->gmode
)
3657 rs_dflt
= &cck_ofdm_rates
;
3659 rs_dflt
= &cck_rates
;
3664 static void brcms_c_set_ratetable(struct brcms_c_info
*wlc
)
3666 const struct brcms_c_rateset
*rs_dflt
;
3667 struct brcms_c_rateset rs
;
3668 u8 rate
, basic_rate
;
3671 rs_dflt
= brcms_c_rateset_get_hwrs(wlc
);
3673 brcms_c_rateset_copy(rs_dflt
, &rs
);
3674 brcms_c_rateset_mcs_upd(&rs
, wlc
->stf
->txstreams
);
3676 /* walk the phy rate table and update SHM basic rate lookup table */
3677 for (i
= 0; i
< rs
.count
; i
++) {
3678 rate
= rs
.rates
[i
] & BRCMS_RATE_MASK
;
3680 /* for a given rate brcms_basic_rate returns the rate at
3681 * which a response ACK/CTS should be sent.
3683 basic_rate
= brcms_basic_rate(wlc
, rate
);
3684 if (basic_rate
== 0)
3685 /* This should only happen if we are using a
3686 * restricted rateset.
3688 basic_rate
= rs
.rates
[0] & BRCMS_RATE_MASK
;
3690 brcms_c_write_rate_shm(wlc
, rate
, basic_rate
);
3694 /* band-specific init */
3695 static void brcms_c_bsinit(struct brcms_c_info
*wlc
)
3697 BCMMSG(wlc
->wiphy
, "wl%d: bandunit %d\n",
3698 wlc
->pub
->unit
, wlc
->band
->bandunit
);
3700 /* write ucode ACK/CTS rate table */
3701 brcms_c_set_ratetable(wlc
);
3703 /* update some band specific mac configuration */
3704 brcms_c_ucode_mac_upd(wlc
);
3706 /* init antenna selection */
3707 brcms_c_antsel_init(wlc
->asi
);
3711 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3713 brcms_c_duty_cycle_set(struct brcms_c_info
*wlc
, int duty_cycle
, bool isOFDM
,
3716 int idle_busy_ratio_x_16
= 0;
3718 isOFDM
? M_TX_IDLE_BUSY_RATIO_X_16_OFDM
:
3719 M_TX_IDLE_BUSY_RATIO_X_16_CCK
;
3720 if (duty_cycle
> 100 || duty_cycle
< 0) {
3721 wiphy_err(wlc
->wiphy
, "wl%d: duty cycle value off limit\n",
3726 idle_busy_ratio_x_16
= (100 - duty_cycle
) * 16 / duty_cycle
;
3727 /* Only write to shared memory when wl is up */
3729 brcms_b_write_shm(wlc
->hw
, offset
, (u16
) idle_busy_ratio_x_16
);
3732 wlc
->tx_duty_cycle_ofdm
= (u16
) duty_cycle
;
3734 wlc
->tx_duty_cycle_cck
= (u16
) duty_cycle
;
3740 * Initialize the base precedence map for dequeueing
3741 * from txq based on WME settings
3743 static void brcms_c_tx_prec_map_init(struct brcms_c_info
*wlc
)
3745 wlc
->tx_prec_map
= BRCMS_PREC_BMP_ALL
;
3746 memset(wlc
->fifo2prec_map
, 0, NFIFO
* sizeof(u16
));
3748 wlc
->fifo2prec_map
[TX_AC_BK_FIFO
] = BRCMS_PREC_BMP_AC_BK
;
3749 wlc
->fifo2prec_map
[TX_AC_BE_FIFO
] = BRCMS_PREC_BMP_AC_BE
;
3750 wlc
->fifo2prec_map
[TX_AC_VI_FIFO
] = BRCMS_PREC_BMP_AC_VI
;
3751 wlc
->fifo2prec_map
[TX_AC_VO_FIFO
] = BRCMS_PREC_BMP_AC_VO
;
3755 brcms_c_txflowcontrol_signal(struct brcms_c_info
*wlc
,
3756 struct brcms_txq_info
*qi
, bool on
, int prio
)
3758 /* transmit flowcontrol is not yet implemented */
3761 static void brcms_c_txflowcontrol_reset(struct brcms_c_info
*wlc
)
3763 struct brcms_txq_info
*qi
;
3765 for (qi
= wlc
->tx_queues
; qi
!= NULL
; qi
= qi
->next
) {
3767 brcms_c_txflowcontrol_signal(wlc
, qi
, OFF
, ALLPRIO
);
3773 /* push sw hps and wake state through hardware */
3774 static void brcms_c_set_ps_ctrl(struct brcms_c_info
*wlc
)
3780 hps
= brcms_c_ps_allowed(wlc
);
3782 BCMMSG(wlc
->wiphy
, "wl%d: hps %d\n", wlc
->pub
->unit
, hps
);
3784 v1
= bcma_read32(wlc
->hw
->d11core
, D11REGOFFS(maccontrol
));
3789 brcms_b_mctrl(wlc
->hw
, MCTL_WAKE
| MCTL_HPS
, v2
);
3791 awake_before
= ((v1
& MCTL_WAKE
) || ((v1
& MCTL_HPS
) == 0));
3794 brcms_b_wait_for_wake(wlc
->hw
);
3798 * Write this BSS config's MAC address to core.
3799 * Updates RXE match engine.
3801 static int brcms_c_set_mac(struct brcms_bss_cfg
*bsscfg
)
3804 struct brcms_c_info
*wlc
= bsscfg
->wlc
;
3806 /* enter the MAC addr into the RXE match registers */
3807 brcms_c_set_addrmatch(wlc
, RCM_MAC_OFFSET
, bsscfg
->cur_etheraddr
);
3809 brcms_c_ampdu_macaddr_upd(wlc
);
3814 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3815 * Updates RXE match engine.
3817 static void brcms_c_set_bssid(struct brcms_bss_cfg
*bsscfg
)
3819 /* we need to update BSSID in RXE match registers */
3820 brcms_c_set_addrmatch(bsscfg
->wlc
, RCM_BSSID_OFFSET
, bsscfg
->BSSID
);
3823 static void brcms_b_set_shortslot(struct brcms_hardware
*wlc_hw
, bool shortslot
)
3825 wlc_hw
->shortslot
= shortslot
;
3827 if (wlc_hw
->band
->bandtype
== BRCM_BAND_2G
&& wlc_hw
->up
) {
3828 brcms_c_suspend_mac_and_wait(wlc_hw
->wlc
);
3829 brcms_b_update_slot_timing(wlc_hw
, shortslot
);
3830 brcms_c_enable_mac(wlc_hw
->wlc
);
3835 * Suspend the the MAC and update the slot timing
3836 * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3838 static void brcms_c_switch_shortslot(struct brcms_c_info
*wlc
, bool shortslot
)
3840 /* use the override if it is set */
3841 if (wlc
->shortslot_override
!= BRCMS_SHORTSLOT_AUTO
)
3842 shortslot
= (wlc
->shortslot_override
== BRCMS_SHORTSLOT_ON
);
3844 if (wlc
->shortslot
== shortslot
)
3847 wlc
->shortslot
= shortslot
;
3849 brcms_b_set_shortslot(wlc
->hw
, shortslot
);
3852 static void brcms_c_set_home_chanspec(struct brcms_c_info
*wlc
, u16 chanspec
)
3854 if (wlc
->home_chanspec
!= chanspec
) {
3855 wlc
->home_chanspec
= chanspec
;
3857 if (wlc
->bsscfg
->associated
)
3858 wlc
->bsscfg
->current_bss
->chanspec
= chanspec
;
3863 brcms_b_set_chanspec(struct brcms_hardware
*wlc_hw
, u16 chanspec
,
3864 bool mute_tx
, struct txpwr_limits
*txpwr
)
3868 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d: 0x%x\n", wlc_hw
->unit
, chanspec
);
3870 wlc_hw
->chanspec
= chanspec
;
3872 /* Switch bands if necessary */
3873 if (wlc_hw
->_nbands
> 1) {
3874 bandunit
= chspec_bandunit(chanspec
);
3875 if (wlc_hw
->band
->bandunit
!= bandunit
) {
3876 /* brcms_b_setband disables other bandunit,
3877 * use light band switch if not up yet
3880 wlc_phy_chanspec_radio_set(wlc_hw
->
3881 bandstate
[bandunit
]->
3883 brcms_b_setband(wlc_hw
, bandunit
, chanspec
);
3885 brcms_c_setxband(wlc_hw
, bandunit
);
3890 wlc_phy_initcal_enable(wlc_hw
->band
->pi
, !mute_tx
);
3894 wlc_phy_txpower_limit_set(wlc_hw
->band
->pi
, txpwr
,
3896 wlc_phy_chanspec_radio_set(wlc_hw
->band
->pi
, chanspec
);
3898 wlc_phy_chanspec_set(wlc_hw
->band
->pi
, chanspec
);
3899 wlc_phy_txpower_limit_set(wlc_hw
->band
->pi
, txpwr
, chanspec
);
3901 /* Update muting of the channel */
3902 brcms_b_mute(wlc_hw
, mute_tx
);
3906 /* switch to and initialize new band */
3907 static void brcms_c_setband(struct brcms_c_info
*wlc
,
3910 wlc
->band
= wlc
->bandstate
[bandunit
];
3915 /* wait for at least one beacon before entering sleeping state */
3916 brcms_c_set_ps_ctrl(wlc
);
3918 /* band-specific initializations */
3919 brcms_c_bsinit(wlc
);
3922 static void brcms_c_set_chanspec(struct brcms_c_info
*wlc
, u16 chanspec
)
3925 bool switchband
= false;
3926 u16 old_chanspec
= wlc
->chanspec
;
3928 if (!brcms_c_valid_chanspec_db(wlc
->cmi
, chanspec
)) {
3929 wiphy_err(wlc
->wiphy
, "wl%d: %s: Bad channel %d\n",
3930 wlc
->pub
->unit
, __func__
, CHSPEC_CHANNEL(chanspec
));
3934 /* Switch bands if necessary */
3935 if (wlc
->pub
->_nbands
> 1) {
3936 bandunit
= chspec_bandunit(chanspec
);
3937 if (wlc
->band
->bandunit
!= bandunit
|| wlc
->bandinit_pending
) {
3939 if (wlc
->bandlocked
) {
3940 wiphy_err(wlc
->wiphy
, "wl%d: %s: chspec %d "
3941 "band is locked!\n",
3942 wlc
->pub
->unit
, __func__
,
3943 CHSPEC_CHANNEL(chanspec
));
3947 * should the setband call come after the
3948 * brcms_b_chanspec() ? if the setband updates
3949 * (brcms_c_bsinit) use low level calls to inspect and
3950 * set state, the state inspected may be from the wrong
3951 * band, or the following brcms_b_set_chanspec() may
3954 brcms_c_setband(wlc
, bandunit
);
3958 /* sync up phy/radio chanspec */
3959 brcms_c_set_phy_chanspec(wlc
, chanspec
);
3961 /* init antenna selection */
3962 if (brcms_chspec_bw(old_chanspec
) != brcms_chspec_bw(chanspec
)) {
3963 brcms_c_antsel_init(wlc
->asi
);
3965 /* Fix the hardware rateset based on bw.
3966 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
3968 brcms_c_rateset_bw_mcs_filter(&wlc
->band
->hw_rateset
,
3969 wlc
->band
->mimo_cap_40
? brcms_chspec_bw(chanspec
) : 0);
3972 /* update some mac configuration since chanspec changed */
3973 brcms_c_ucode_mac_upd(wlc
);
3977 * This function changes the phytxctl for beacon based on current
3978 * beacon ratespec AND txant setting as per this table:
3979 * ratespec CCK ant = wlc->stf->txant
3982 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info
*wlc
,
3986 u16 phytxant
= wlc
->stf
->phytxant
;
3987 u16 mask
= PHY_TXC_ANT_MASK
;
3989 /* for non-siso rates or default setting, use the available chains */
3990 if (BRCMS_PHY_11N_CAP(wlc
->band
))
3991 phytxant
= brcms_c_stf_phytxchain_sel(wlc
, bcn_rspec
);
3993 phyctl
= brcms_b_read_shm(wlc
->hw
, M_BCN_PCTLWD
);
3994 phyctl
= (phyctl
& ~mask
) | phytxant
;
3995 brcms_b_write_shm(wlc
->hw
, M_BCN_PCTLWD
, phyctl
);
3999 * centralized protection config change function to simplify debugging, no
4000 * consistency checking this should be called only on changes to avoid overhead
4001 * in periodic function
4003 void brcms_c_protection_upd(struct brcms_c_info
*wlc
, uint idx
, int val
)
4005 BCMMSG(wlc
->wiphy
, "idx %d, val %d\n", idx
, val
);
4008 case BRCMS_PROT_G_SPEC
:
4009 wlc
->protection
->_g
= (bool) val
;
4011 case BRCMS_PROT_G_OVR
:
4012 wlc
->protection
->g_override
= (s8
) val
;
4014 case BRCMS_PROT_G_USER
:
4015 wlc
->protection
->gmode_user
= (u8
) val
;
4017 case BRCMS_PROT_OVERLAP
:
4018 wlc
->protection
->overlap
= (s8
) val
;
4020 case BRCMS_PROT_N_USER
:
4021 wlc
->protection
->nmode_user
= (s8
) val
;
4023 case BRCMS_PROT_N_CFG
:
4024 wlc
->protection
->n_cfg
= (s8
) val
;
4026 case BRCMS_PROT_N_CFG_OVR
:
4027 wlc
->protection
->n_cfg_override
= (s8
) val
;
4029 case BRCMS_PROT_N_NONGF
:
4030 wlc
->protection
->nongf
= (bool) val
;
4032 case BRCMS_PROT_N_NONGF_OVR
:
4033 wlc
->protection
->nongf_override
= (s8
) val
;
4035 case BRCMS_PROT_N_PAM_OVR
:
4036 wlc
->protection
->n_pam_override
= (s8
) val
;
4038 case BRCMS_PROT_N_OBSS
:
4039 wlc
->protection
->n_obss
= (bool) val
;
4048 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info
*wlc
, int val
)
4051 brcms_c_update_beacon(wlc
);
4052 brcms_c_update_probe_resp(wlc
, true);
4056 static void brcms_c_ht_update_ldpc(struct brcms_c_info
*wlc
, s8 val
)
4058 wlc
->stf
->ldpc
= val
;
4061 brcms_c_update_beacon(wlc
);
4062 brcms_c_update_probe_resp(wlc
, true);
4063 wlc_phy_ldpc_override_set(wlc
->band
->pi
, (val
? true : false));
4067 void brcms_c_wme_setparams(struct brcms_c_info
*wlc
, u16 aci
,
4068 const struct ieee80211_tx_queue_params
*params
,
4072 struct shm_acparams acp_shm
;
4075 /* Only apply params if the core is out of reset and has clocks */
4077 wiphy_err(wlc
->wiphy
, "wl%d: %s : no-clock\n", wlc
->pub
->unit
,
4082 memset((char *)&acp_shm
, 0, sizeof(struct shm_acparams
));
4083 /* fill in shm ac params struct */
4084 acp_shm
.txop
= params
->txop
;
4085 /* convert from units of 32us to us for ucode */
4086 wlc
->edcf_txop
[aci
& 0x3] = acp_shm
.txop
=
4087 EDCF_TXOP2USEC(acp_shm
.txop
);
4088 acp_shm
.aifs
= (params
->aifs
& EDCF_AIFSN_MASK
);
4090 if (aci
== IEEE80211_AC_VI
&& acp_shm
.txop
== 0
4091 && acp_shm
.aifs
< EDCF_AIFSN_MAX
)
4094 if (acp_shm
.aifs
< EDCF_AIFSN_MIN
4095 || acp_shm
.aifs
> EDCF_AIFSN_MAX
) {
4096 wiphy_err(wlc
->wiphy
, "wl%d: edcf_setparams: bad "
4097 "aifs %d\n", wlc
->pub
->unit
, acp_shm
.aifs
);
4099 acp_shm
.cwmin
= params
->cw_min
;
4100 acp_shm
.cwmax
= params
->cw_max
;
4101 acp_shm
.cwcur
= acp_shm
.cwmin
;
4103 bcma_read16(wlc
->hw
->d11core
, D11REGOFFS(tsf_random
)) &
4105 acp_shm
.reggap
= acp_shm
.bslots
+ acp_shm
.aifs
;
4106 /* Indicate the new params to the ucode */
4107 acp_shm
.status
= brcms_b_read_shm(wlc
->hw
, (M_EDCF_QINFO
+
4110 M_EDCF_STATUS_OFF
));
4111 acp_shm
.status
|= WME_STATUS_NEWAC
;
4113 /* Fill in shm acparam table */
4114 shm_entry
= (u16
*) &acp_shm
;
4115 for (i
= 0; i
< (int)sizeof(struct shm_acparams
); i
+= 2)
4116 brcms_b_write_shm(wlc
->hw
,
4118 wme_ac2fifo
[aci
] * M_EDCF_QLEN
+ i
,
4123 brcms_c_suspend_mac_and_wait(wlc
);
4124 brcms_c_enable_mac(wlc
);
4128 static void brcms_c_edcf_setparams(struct brcms_c_info
*wlc
, bool suspend
)
4132 struct ieee80211_tx_queue_params txq_pars
;
4133 static const struct edcf_acparam default_edcf_acparams
[] = {
4134 {EDCF_AC_BE_ACI_STA
, EDCF_AC_BE_ECW_STA
, EDCF_AC_BE_TXOP_STA
},
4135 {EDCF_AC_BK_ACI_STA
, EDCF_AC_BK_ECW_STA
, EDCF_AC_BK_TXOP_STA
},
4136 {EDCF_AC_VI_ACI_STA
, EDCF_AC_VI_ECW_STA
, EDCF_AC_VI_TXOP_STA
},
4137 {EDCF_AC_VO_ACI_STA
, EDCF_AC_VO_ECW_STA
, EDCF_AC_VO_TXOP_STA
}
4138 }; /* ucode needs these parameters during its initialization */
4139 const struct edcf_acparam
*edcf_acp
= &default_edcf_acparams
[0];
4141 for (i_ac
= 0; i_ac
< IEEE80211_NUM_ACS
; i_ac
++, edcf_acp
++) {
4142 /* find out which ac this set of params applies to */
4143 aci
= (edcf_acp
->ACI
& EDCF_ACI_MASK
) >> EDCF_ACI_SHIFT
;
4145 /* fill in shm ac params struct */
4146 txq_pars
.txop
= edcf_acp
->TXOP
;
4147 txq_pars
.aifs
= edcf_acp
->ACI
;
4149 /* CWmin = 2^(ECWmin) - 1 */
4150 txq_pars
.cw_min
= EDCF_ECW2CW(edcf_acp
->ECW
& EDCF_ECWMIN_MASK
);
4151 /* CWmax = 2^(ECWmax) - 1 */
4152 txq_pars
.cw_max
= EDCF_ECW2CW((edcf_acp
->ECW
& EDCF_ECWMAX_MASK
)
4153 >> EDCF_ECWMAX_SHIFT
);
4154 brcms_c_wme_setparams(wlc
, aci
, &txq_pars
, suspend
);
4158 brcms_c_suspend_mac_and_wait(wlc
);
4159 brcms_c_enable_mac(wlc
);
4163 static void brcms_c_radio_monitor_start(struct brcms_c_info
*wlc
)
4165 /* Don't start the timer if HWRADIO feature is disabled */
4166 if (wlc
->radio_monitor
)
4169 wlc
->radio_monitor
= true;
4170 brcms_b_pllreq(wlc
->hw
, true, BRCMS_PLLREQ_RADIO_MON
);
4171 brcms_add_timer(wlc
->radio_timer
, TIMER_INTERVAL_RADIOCHK
, true);
4174 static bool brcms_c_radio_monitor_stop(struct brcms_c_info
*wlc
)
4176 if (!wlc
->radio_monitor
)
4179 wlc
->radio_monitor
= false;
4180 brcms_b_pllreq(wlc
->hw
, false, BRCMS_PLLREQ_RADIO_MON
);
4181 return brcms_del_timer(wlc
->radio_timer
);
4184 /* read hwdisable state and propagate to wlc flag */
4185 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info
*wlc
)
4187 if (wlc
->pub
->hw_off
)
4190 if (brcms_b_radio_read_hwdisabled(wlc
->hw
))
4191 mboolset(wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
);
4193 mboolclr(wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
);
4196 /* update hwradio status and return it */
4197 bool brcms_c_check_radio_disabled(struct brcms_c_info
*wlc
)
4199 brcms_c_radio_hwdisable_upd(wlc
);
4201 return mboolisset(wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
) ?
4205 /* periodical query hw radio button while driver is "down" */
4206 static void brcms_c_radio_timer(void *arg
)
4208 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) arg
;
4210 if (brcms_deviceremoved(wlc
)) {
4211 wiphy_err(wlc
->wiphy
, "wl%d: %s: dead chip\n", wlc
->pub
->unit
,
4213 brcms_down(wlc
->wl
);
4217 brcms_c_radio_hwdisable_upd(wlc
);
4220 /* common low-level watchdog code */
4221 static void brcms_b_watchdog(void *arg
)
4223 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) arg
;
4224 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
4226 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
4231 /* increment second count */
4234 /* Check for FIFO error interrupts */
4235 brcms_b_fifoerrors(wlc_hw
);
4237 /* make sure RX dma has buffers */
4238 dma_rxfill(wlc
->hw
->di
[RX_FIFO
]);
4240 wlc_phy_watchdog(wlc_hw
->band
->pi
);
4243 /* common watchdog code */
4244 static void brcms_c_watchdog(void *arg
)
4246 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) arg
;
4248 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
4253 if (brcms_deviceremoved(wlc
)) {
4254 wiphy_err(wlc
->wiphy
, "wl%d: %s: dead chip\n", wlc
->pub
->unit
,
4256 brcms_down(wlc
->wl
);
4260 /* increment second count */
4263 brcms_c_radio_hwdisable_upd(wlc
);
4264 /* if radio is disable, driver may be down, quit here */
4265 if (wlc
->pub
->radio_disabled
)
4268 brcms_b_watchdog(wlc
);
4271 * occasionally sample mac stat counters to
4272 * detect 16-bit counter wrap
4274 if ((wlc
->pub
->now
% SW_TIMER_MAC_STAT_UPD
) == 0)
4275 brcms_c_statsupd(wlc
);
4277 if (BRCMS_ISNPHY(wlc
->band
) &&
4278 ((wlc
->pub
->now
- wlc
->tempsense_lasttime
) >=
4279 BRCMS_TEMPSENSE_PERIOD
)) {
4280 wlc
->tempsense_lasttime
= wlc
->pub
->now
;
4281 brcms_c_tempsense_upd(wlc
);
4285 static void brcms_c_watchdog_by_timer(void *arg
)
4287 brcms_c_watchdog(arg
);
4290 static bool brcms_c_timers_init(struct brcms_c_info
*wlc
, int unit
)
4292 wlc
->wdtimer
= brcms_init_timer(wlc
->wl
, brcms_c_watchdog_by_timer
,
4294 if (!wlc
->wdtimer
) {
4295 wiphy_err(wlc
->wiphy
, "wl%d: wl_init_timer for wdtimer "
4300 wlc
->radio_timer
= brcms_init_timer(wlc
->wl
, brcms_c_radio_timer
,
4302 if (!wlc
->radio_timer
) {
4303 wiphy_err(wlc
->wiphy
, "wl%d: wl_init_timer for radio_timer "
4315 * Initialize brcms_c_info default values ...
4316 * may get overrides later in this function
4318 static void brcms_c_info_init(struct brcms_c_info
*wlc
, int unit
)
4322 /* Save our copy of the chanspec */
4323 wlc
->chanspec
= ch20mhz_chspec(1);
4325 /* various 802.11g modes */
4326 wlc
->shortslot
= false;
4327 wlc
->shortslot_override
= BRCMS_SHORTSLOT_AUTO
;
4329 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_OVR
, BRCMS_PROTECTION_AUTO
);
4330 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_SPEC
, false);
4332 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_CFG_OVR
,
4333 BRCMS_PROTECTION_AUTO
);
4334 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_CFG
, BRCMS_N_PROTECTION_OFF
);
4335 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_NONGF_OVR
,
4336 BRCMS_PROTECTION_AUTO
);
4337 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_NONGF
, false);
4338 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_PAM_OVR
, AUTO
);
4340 brcms_c_protection_upd(wlc
, BRCMS_PROT_OVERLAP
,
4341 BRCMS_PROTECTION_CTL_OVERLAP
);
4343 /* 802.11g draft 4.0 NonERP elt advertisement */
4344 wlc
->include_legacy_erp
= true;
4346 wlc
->stf
->ant_rx_ovr
= ANT_RX_DIV_DEF
;
4347 wlc
->stf
->txant
= ANT_TX_DEF
;
4349 wlc
->prb_resp_timeout
= BRCMS_PRB_RESP_TIMEOUT
;
4351 wlc
->usr_fragthresh
= DOT11_DEFAULT_FRAG_LEN
;
4352 for (i
= 0; i
< NFIFO
; i
++)
4353 wlc
->fragthresh
[i
] = DOT11_DEFAULT_FRAG_LEN
;
4354 wlc
->RTSThresh
= DOT11_DEFAULT_RTS_LEN
;
4356 /* default rate fallback retry limits */
4357 wlc
->SFBL
= RETRY_SHORT_FB
;
4358 wlc
->LFBL
= RETRY_LONG_FB
;
4360 /* default mac retry limits */
4361 wlc
->SRL
= RETRY_SHORT_DEF
;
4362 wlc
->LRL
= RETRY_LONG_DEF
;
4364 /* WME QoS mode is Auto by default */
4365 wlc
->pub
->_ampdu
= AMPDU_AGG_HOST
;
4366 wlc
->pub
->bcmerror
= 0;
4369 static uint
brcms_c_attach_module(struct brcms_c_info
*wlc
)
4373 unit
= wlc
->pub
->unit
;
4375 wlc
->asi
= brcms_c_antsel_attach(wlc
);
4376 if (wlc
->asi
== NULL
) {
4377 wiphy_err(wlc
->wiphy
, "wl%d: attach: antsel_attach "
4383 wlc
->ampdu
= brcms_c_ampdu_attach(wlc
);
4384 if (wlc
->ampdu
== NULL
) {
4385 wiphy_err(wlc
->wiphy
, "wl%d: attach: ampdu_attach "
4391 if ((brcms_c_stf_attach(wlc
) != 0)) {
4392 wiphy_err(wlc
->wiphy
, "wl%d: attach: stf_attach "
4401 struct brcms_pub
*brcms_c_pub(struct brcms_c_info
*wlc
)
4407 * run backplane attach, init nvram
4409 * initialize software state for each core and band
4410 * put the whole chip in reset(driver down state), no clock
4412 static int brcms_b_attach(struct brcms_c_info
*wlc
, struct bcma_device
*core
,
4413 uint unit
, bool piomode
)
4415 struct brcms_hardware
*wlc_hw
;
4419 struct shared_phy_params sha_params
;
4420 struct wiphy
*wiphy
= wlc
->wiphy
;
4421 struct pci_dev
*pcidev
= core
->bus
->host_pci
;
4422 struct ssb_sprom
*sprom
= &core
->bus
->sprom
;
4424 if (core
->bus
->hosttype
== BCMA_HOSTTYPE_PCI
)
4425 BCMMSG(wlc
->wiphy
, "wl%d: vendor 0x%x device 0x%x\n", unit
,
4429 BCMMSG(wlc
->wiphy
, "wl%d: vendor 0x%x device 0x%x\n", unit
,
4430 core
->bus
->boardinfo
.vendor
,
4431 core
->bus
->boardinfo
.type
);
4437 wlc_hw
->unit
= unit
;
4438 wlc_hw
->band
= wlc_hw
->bandstate
[0];
4439 wlc_hw
->_piomode
= piomode
;
4441 /* populate struct brcms_hardware with default values */
4442 brcms_b_info_init(wlc_hw
);
4445 * Do the hardware portion of the attach. Also initialize software
4446 * state that depends on the particular hardware we are running.
4448 wlc_hw
->sih
= ai_attach(core
->bus
);
4449 if (wlc_hw
->sih
== NULL
) {
4450 wiphy_err(wiphy
, "wl%d: brcms_b_attach: si_attach failed\n",
4456 /* verify again the device is supported */
4457 if (core
->bus
->hosttype
== BCMA_HOSTTYPE_PCI
&&
4458 !brcms_c_chipmatch(pcidev
->vendor
, pcidev
->device
)) {
4459 wiphy_err(wiphy
, "wl%d: brcms_b_attach: Unsupported "
4460 "vendor/device (0x%x/0x%x)\n",
4461 unit
, pcidev
->vendor
, pcidev
->device
);
4466 if (core
->bus
->hosttype
== BCMA_HOSTTYPE_PCI
) {
4467 wlc_hw
->vendorid
= pcidev
->vendor
;
4468 wlc_hw
->deviceid
= pcidev
->device
;
4470 wlc_hw
->vendorid
= core
->bus
->boardinfo
.vendor
;
4471 wlc_hw
->deviceid
= core
->bus
->boardinfo
.type
;
4474 wlc_hw
->d11core
= core
;
4475 wlc_hw
->corerev
= core
->id
.rev
;
4477 /* validate chip, chiprev and corerev */
4478 if (!brcms_c_isgoodchip(wlc_hw
)) {
4483 /* initialize power control registers */
4484 ai_clkctl_init(wlc_hw
->sih
);
4486 /* request fastclock and force fastclock for the rest of attach
4487 * bring the d11 core out of reset.
4488 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4489 * is still false; But it will be called again inside wlc_corereset,
4490 * after d11 is out of reset.
4492 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_FAST
);
4493 brcms_b_corereset(wlc_hw
, BRCMS_USE_COREFLAGS
);
4495 if (!brcms_b_validate_chip_access(wlc_hw
)) {
4496 wiphy_err(wiphy
, "wl%d: brcms_b_attach: validate_chip_access "
4502 /* get the board rev, used just below */
4503 j
= sprom
->board_rev
;
4504 /* promote srom boardrev of 0xFF to 1 */
4505 if (j
== BOARDREV_PROMOTABLE
)
4506 j
= BOARDREV_PROMOTED
;
4507 wlc_hw
->boardrev
= (u16
) j
;
4508 if (!brcms_c_validboardtype(wlc_hw
)) {
4509 wiphy_err(wiphy
, "wl%d: brcms_b_attach: Unsupported Broadcom "
4510 "board type (0x%x)" " or revision level (0x%x)\n",
4511 unit
, ai_get_boardtype(wlc_hw
->sih
),
4516 wlc_hw
->sromrev
= sprom
->revision
;
4517 wlc_hw
->boardflags
= sprom
->boardflags_lo
+ (sprom
->boardflags_hi
<< 16);
4518 wlc_hw
->boardflags2
= sprom
->boardflags2_lo
+ (sprom
->boardflags2_hi
<< 16);
4520 if (wlc_hw
->boardflags
& BFL_NOPLLDOWN
)
4521 brcms_b_pllreq(wlc_hw
, true, BRCMS_PLLREQ_SHARED
);
4523 /* check device id(srom, nvram etc.) to set bands */
4524 if (wlc_hw
->deviceid
== BCM43224_D11N_ID
||
4525 wlc_hw
->deviceid
== BCM43224_D11N_ID_VEN1
)
4526 /* Dualband boards */
4527 wlc_hw
->_nbands
= 2;
4529 wlc_hw
->_nbands
= 1;
4531 if ((ai_get_chip_id(wlc_hw
->sih
) == BCM43225_CHIP_ID
))
4532 wlc_hw
->_nbands
= 1;
4534 /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4535 * unconditionally does the init of these values
4537 wlc
->vendorid
= wlc_hw
->vendorid
;
4538 wlc
->deviceid
= wlc_hw
->deviceid
;
4539 wlc
->pub
->sih
= wlc_hw
->sih
;
4540 wlc
->pub
->corerev
= wlc_hw
->corerev
;
4541 wlc
->pub
->sromrev
= wlc_hw
->sromrev
;
4542 wlc
->pub
->boardrev
= wlc_hw
->boardrev
;
4543 wlc
->pub
->boardflags
= wlc_hw
->boardflags
;
4544 wlc
->pub
->boardflags2
= wlc_hw
->boardflags2
;
4545 wlc
->pub
->_nbands
= wlc_hw
->_nbands
;
4547 wlc_hw
->physhim
= wlc_phy_shim_attach(wlc_hw
, wlc
->wl
, wlc
);
4549 if (wlc_hw
->physhim
== NULL
) {
4550 wiphy_err(wiphy
, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4556 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4557 sha_params
.sih
= wlc_hw
->sih
;
4558 sha_params
.physhim
= wlc_hw
->physhim
;
4559 sha_params
.unit
= unit
;
4560 sha_params
.corerev
= wlc_hw
->corerev
;
4561 sha_params
.vid
= wlc_hw
->vendorid
;
4562 sha_params
.did
= wlc_hw
->deviceid
;
4563 sha_params
.chip
= ai_get_chip_id(wlc_hw
->sih
);
4564 sha_params
.chiprev
= ai_get_chiprev(wlc_hw
->sih
);
4565 sha_params
.chippkg
= ai_get_chippkg(wlc_hw
->sih
);
4566 sha_params
.sromrev
= wlc_hw
->sromrev
;
4567 sha_params
.boardtype
= ai_get_boardtype(wlc_hw
->sih
);
4568 sha_params
.boardrev
= wlc_hw
->boardrev
;
4569 sha_params
.boardflags
= wlc_hw
->boardflags
;
4570 sha_params
.boardflags2
= wlc_hw
->boardflags2
;
4572 /* alloc and save pointer to shared phy state area */
4573 wlc_hw
->phy_sh
= wlc_phy_shared_attach(&sha_params
);
4574 if (!wlc_hw
->phy_sh
) {
4579 /* initialize software state for each core and band */
4580 for (j
= 0; j
< wlc_hw
->_nbands
; j
++) {
4582 * band0 is always 2.4Ghz
4583 * band1, if present, is 5Ghz
4586 brcms_c_setxband(wlc_hw
, j
);
4588 wlc_hw
->band
->bandunit
= j
;
4589 wlc_hw
->band
->bandtype
= j
? BRCM_BAND_5G
: BRCM_BAND_2G
;
4590 wlc
->band
->bandunit
= j
;
4591 wlc
->band
->bandtype
= j
? BRCM_BAND_5G
: BRCM_BAND_2G
;
4592 wlc
->core
->coreidx
= core
->core_index
;
4594 wlc_hw
->machwcap
= bcma_read32(core
, D11REGOFFS(machwcap
));
4595 wlc_hw
->machwcap_backup
= wlc_hw
->machwcap
;
4597 /* init tx fifo size */
4598 wlc_hw
->xmtfifo_sz
=
4599 xmtfifo_sz
[(wlc_hw
->corerev
- XMTFIFOTBL_STARTREV
)];
4601 /* Get a phy for this band */
4603 wlc_phy_attach(wlc_hw
->phy_sh
, core
,
4604 wlc_hw
->band
->bandtype
,
4606 if (wlc_hw
->band
->pi
== NULL
) {
4607 wiphy_err(wiphy
, "wl%d: brcms_b_attach: wlc_phy_"
4608 "attach failed\n", unit
);
4613 wlc_phy_machwcap_set(wlc_hw
->band
->pi
, wlc_hw
->machwcap
);
4615 wlc_phy_get_phyversion(wlc_hw
->band
->pi
, &wlc_hw
->band
->phytype
,
4616 &wlc_hw
->band
->phyrev
,
4617 &wlc_hw
->band
->radioid
,
4618 &wlc_hw
->band
->radiorev
);
4619 wlc_hw
->band
->abgphy_encore
=
4620 wlc_phy_get_encore(wlc_hw
->band
->pi
);
4621 wlc
->band
->abgphy_encore
= wlc_phy_get_encore(wlc_hw
->band
->pi
);
4622 wlc_hw
->band
->core_flags
=
4623 wlc_phy_get_coreflags(wlc_hw
->band
->pi
);
4625 /* verify good phy_type & supported phy revision */
4626 if (BRCMS_ISNPHY(wlc_hw
->band
)) {
4627 if (NCONF_HAS(wlc_hw
->band
->phyrev
))
4631 } else if (BRCMS_ISLCNPHY(wlc_hw
->band
)) {
4632 if (LCNCONF_HAS(wlc_hw
->band
->phyrev
))
4638 wiphy_err(wiphy
, "wl%d: brcms_b_attach: unsupported "
4639 "phy type/rev (%d/%d)\n", unit
,
4640 wlc_hw
->band
->phytype
, wlc_hw
->band
->phyrev
);
4647 * BMAC_NOTE: wlc->band->pi should not be set below and should
4648 * be done in the high level attach. However we can not make
4649 * that change until all low level access is changed to
4650 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4651 * keeping wlc_hw->band->pi as well for incremental update of
4652 * low level fns, and cut over low only init when all fns
4655 wlc
->band
->pi
= wlc_hw
->band
->pi
;
4656 wlc
->band
->phytype
= wlc_hw
->band
->phytype
;
4657 wlc
->band
->phyrev
= wlc_hw
->band
->phyrev
;
4658 wlc
->band
->radioid
= wlc_hw
->band
->radioid
;
4659 wlc
->band
->radiorev
= wlc_hw
->band
->radiorev
;
4661 /* default contention windows size limits */
4662 wlc_hw
->band
->CWmin
= APHY_CWMIN
;
4663 wlc_hw
->band
->CWmax
= PHY_CWMAX
;
4665 if (!brcms_b_attach_dmapio(wlc
, j
, wme
)) {
4671 /* disable core to match driver "down" state */
4672 brcms_c_coredisable(wlc_hw
);
4674 /* Match driver "down" state */
4675 ai_pci_down(wlc_hw
->sih
);
4677 /* turn off pll and xtal to match driver "down" state */
4678 brcms_b_xtal(wlc_hw
, OFF
);
4680 /* *******************************************************************
4681 * The hardware is in the DOWN state at this point. D11 core
4682 * or cores are in reset with clocks off, and the board PLLs
4683 * are off if possible.
4685 * Beyond this point, wlc->sbclk == false and chip registers
4686 * should not be touched.
4687 *********************************************************************
4690 /* init etheraddr state variables */
4691 brcms_c_get_macaddr(wlc_hw
, wlc_hw
->etheraddr
);
4693 if (is_broadcast_ether_addr(wlc_hw
->etheraddr
) ||
4694 is_zero_ether_addr(wlc_hw
->etheraddr
)) {
4695 wiphy_err(wiphy
, "wl%d: brcms_b_attach: bad macaddr\n",
4701 BCMMSG(wlc
->wiphy
, "deviceid 0x%x nbands %d board 0x%x\n",
4702 wlc_hw
->deviceid
, wlc_hw
->_nbands
, ai_get_boardtype(wlc_hw
->sih
));
4707 wiphy_err(wiphy
, "wl%d: brcms_b_attach: failed with err %d\n", unit
,
4712 static void brcms_c_attach_antgain_init(struct brcms_c_info
*wlc
)
4715 unit
= wlc
->pub
->unit
;
4717 if ((wlc
->band
->antgain
== -1) && (wlc
->pub
->sromrev
== 1)) {
4718 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4719 wlc
->band
->antgain
= 8;
4720 } else if (wlc
->band
->antgain
== -1) {
4721 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid antennas available in"
4722 " srom, using 2dB\n", unit
, __func__
);
4723 wlc
->band
->antgain
= 8;
4726 /* Older sroms specified gain in whole dbm only. In order
4727 * be able to specify qdbm granularity and remain backward
4728 * compatible the whole dbms are now encoded in only
4729 * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4730 * 6 bit signed number ranges from -32 - 31.
4734 * 0xc1 = 1.75 db (1 + 3 quarters),
4735 * 0x3f = -1 (-1 + 0 quarters),
4736 * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4737 * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4739 gain
= wlc
->band
->antgain
& 0x3f;
4740 gain
<<= 2; /* Sign extend */
4742 fract
= (wlc
->band
->antgain
& 0xc0) >> 6;
4743 wlc
->band
->antgain
= 4 * gain
+ fract
;
4747 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info
*wlc
)
4752 struct ssb_sprom
*sprom
= &wlc
->hw
->d11core
->bus
->sprom
;
4754 unit
= wlc
->pub
->unit
;
4755 bandtype
= wlc
->band
->bandtype
;
4757 /* get antennas available */
4758 if (bandtype
== BRCM_BAND_5G
)
4759 aa
= sprom
->ant_available_a
;
4761 aa
= sprom
->ant_available_bg
;
4763 if ((aa
< 1) || (aa
> 15)) {
4764 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid antennas available in"
4765 " srom (0x%x), using 3\n", unit
, __func__
, aa
);
4769 /* reset the defaults if we have a single antenna */
4771 wlc
->stf
->ant_rx_ovr
= ANT_RX_DIV_FORCE_0
;
4772 wlc
->stf
->txant
= ANT_TX_FORCE_0
;
4773 } else if (aa
== 2) {
4774 wlc
->stf
->ant_rx_ovr
= ANT_RX_DIV_FORCE_1
;
4775 wlc
->stf
->txant
= ANT_TX_FORCE_1
;
4779 /* Compute Antenna Gain */
4780 if (bandtype
== BRCM_BAND_5G
)
4781 wlc
->band
->antgain
= sprom
->antenna_gain
.a1
;
4783 wlc
->band
->antgain
= sprom
->antenna_gain
.a0
;
4785 brcms_c_attach_antgain_init(wlc
);
4790 static void brcms_c_bss_default_init(struct brcms_c_info
*wlc
)
4793 struct brcms_band
*band
;
4794 struct brcms_bss_info
*bi
= wlc
->default_bss
;
4796 /* init default and target BSS with some sane initial values */
4797 memset((char *)(bi
), 0, sizeof(struct brcms_bss_info
));
4798 bi
->beacon_period
= BEACON_INTERVAL_DEFAULT
;
4800 /* fill the default channel as the first valid channel
4801 * starting from the 2G channels
4803 chanspec
= ch20mhz_chspec(1);
4804 wlc
->home_chanspec
= bi
->chanspec
= chanspec
;
4806 /* find the band of our default channel */
4808 if (wlc
->pub
->_nbands
> 1 &&
4809 band
->bandunit
!= chspec_bandunit(chanspec
))
4810 band
= wlc
->bandstate
[OTHERBANDUNIT(wlc
)];
4812 /* init bss rates to the band specific default rate set */
4813 brcms_c_rateset_default(&bi
->rateset
, NULL
, band
->phytype
,
4814 band
->bandtype
, false, BRCMS_RATE_MASK_FULL
,
4815 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
),
4816 brcms_chspec_bw(chanspec
), wlc
->stf
->txstreams
);
4818 if (wlc
->pub
->_n_enab
& SUPPORT_11N
)
4819 bi
->flags
|= BRCMS_BSS_HT
;
4822 static struct brcms_txq_info
*brcms_c_txq_alloc(struct brcms_c_info
*wlc
)
4824 struct brcms_txq_info
*qi
, *p
;
4826 qi
= kzalloc(sizeof(struct brcms_txq_info
), GFP_ATOMIC
);
4829 * Have enough room for control packets along with HI watermark
4830 * Also, add room to txq for total psq packets if all the SCBs
4831 * leave PS mode. The watermark for flowcontrol to OS packets
4832 * will remain the same
4834 brcmu_pktq_init(&qi
->q
, BRCMS_PREC_COUNT
,
4835 2 * BRCMS_DATAHIWAT
+ PKTQ_LEN_DEFAULT
);
4837 /* add this queue to the the global list */
4840 wlc
->tx_queues
= qi
;
4842 while (p
->next
!= NULL
)
4850 static void brcms_c_txq_free(struct brcms_c_info
*wlc
,
4851 struct brcms_txq_info
*qi
)
4853 struct brcms_txq_info
*p
;
4858 /* remove the queue from the linked list */
4861 wlc
->tx_queues
= p
->next
;
4863 while (p
!= NULL
&& p
->next
!= qi
)
4866 p
->next
= p
->next
->next
;
4872 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info
*wlc
, u8 bwcap
)
4875 struct brcms_band
*band
;
4877 for (i
= 0; i
< wlc
->pub
->_nbands
; i
++) {
4878 band
= wlc
->bandstate
[i
];
4879 if (band
->bandtype
== BRCM_BAND_5G
) {
4880 if ((bwcap
== BRCMS_N_BW_40ALL
)
4881 || (bwcap
== BRCMS_N_BW_20IN2G_40IN5G
))
4882 band
->mimo_cap_40
= true;
4884 band
->mimo_cap_40
= false;
4886 if (bwcap
== BRCMS_N_BW_40ALL
)
4887 band
->mimo_cap_40
= true;
4889 band
->mimo_cap_40
= false;
4894 static void brcms_c_timers_deinit(struct brcms_c_info
*wlc
)
4896 /* free timer state */
4898 brcms_free_timer(wlc
->wdtimer
);
4899 wlc
->wdtimer
= NULL
;
4901 if (wlc
->radio_timer
) {
4902 brcms_free_timer(wlc
->radio_timer
);
4903 wlc
->radio_timer
= NULL
;
4907 static void brcms_c_detach_module(struct brcms_c_info
*wlc
)
4910 brcms_c_antsel_detach(wlc
->asi
);
4915 brcms_c_ampdu_detach(wlc
->ampdu
);
4919 brcms_c_stf_detach(wlc
);
4925 static int brcms_b_detach(struct brcms_c_info
*wlc
)
4928 struct brcms_hw_band
*band
;
4929 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
4934 brcms_b_detach_dmapio(wlc_hw
);
4936 band
= wlc_hw
->band
;
4937 for (i
= 0; i
< wlc_hw
->_nbands
; i
++) {
4939 /* Detach this band's phy */
4940 wlc_phy_detach(band
->pi
);
4943 band
= wlc_hw
->bandstate
[OTHERBANDUNIT(wlc
)];
4946 /* Free shared phy state */
4947 kfree(wlc_hw
->phy_sh
);
4949 wlc_phy_shim_detach(wlc_hw
->physhim
);
4952 ai_detach(wlc_hw
->sih
);
4961 * Return a count of the number of driver callbacks still pending.
4963 * General policy is that brcms_c_detach can only dealloc/free software states.
4964 * It can NOT touch hardware registers since the d11core may be in reset and
4965 * clock may not be available.
4966 * One exception is sb register access, which is possible if crystal is turned
4967 * on after "down" state, driver should avoid software timer with the exception
4970 uint
brcms_c_detach(struct brcms_c_info
*wlc
)
4977 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
4979 callbacks
+= brcms_b_detach(wlc
);
4981 /* delete software timers */
4982 if (!brcms_c_radio_monitor_stop(wlc
))
4985 brcms_c_channel_mgr_detach(wlc
->cmi
);
4987 brcms_c_timers_deinit(wlc
);
4989 brcms_c_detach_module(wlc
);
4992 while (wlc
->tx_queues
!= NULL
)
4993 brcms_c_txq_free(wlc
, wlc
->tx_queues
);
4995 brcms_c_detach_mfree(wlc
);
4999 /* update state that depends on the current value of "ap" */
5000 static void brcms_c_ap_upd(struct brcms_c_info
*wlc
)
5002 /* STA-BSS; short capable */
5003 wlc
->PLCPHdr_override
= BRCMS_PLCP_SHORT
;
5006 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5007 static void brcms_b_hw_up(struct brcms_hardware
*wlc_hw
)
5009 if (wlc_hw
->wlc
->pub
->hw_up
)
5012 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5015 * Enable pll and xtal, initialize the power control registers,
5016 * and force fastclock for the remainder of brcms_c_up().
5018 brcms_b_xtal(wlc_hw
, ON
);
5019 ai_clkctl_init(wlc_hw
->sih
);
5020 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_FAST
);
5023 * TODO: test suspend/resume
5025 * AI chip doesn't restore bar0win2 on
5026 * hibernation/resume, need sw fixup
5030 * Inform phy that a POR reset has occurred so
5031 * it does a complete phy init
5033 wlc_phy_por_inform(wlc_hw
->band
->pi
);
5035 wlc_hw
->ucode_loaded
= false;
5036 wlc_hw
->wlc
->pub
->hw_up
= true;
5038 if ((wlc_hw
->boardflags
& BFL_FEM
)
5039 && (ai_get_chip_id(wlc_hw
->sih
) == BCM4313_CHIP_ID
)) {
5041 (wlc_hw
->boardrev
>= 0x1250
5042 && (wlc_hw
->boardflags
& BFL_FEM_BT
)))
5043 ai_epa_4313war(wlc_hw
->sih
);
5047 static int brcms_b_up_prep(struct brcms_hardware
*wlc_hw
)
5049 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5052 * Enable pll and xtal, initialize the power control registers,
5053 * and force fastclock for the remainder of brcms_c_up().
5055 brcms_b_xtal(wlc_hw
, ON
);
5056 ai_clkctl_init(wlc_hw
->sih
);
5057 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_FAST
);
5060 * Configure pci/pcmcia here instead of in brcms_c_attach()
5061 * to allow mfg hotswap: down, hotswap (chip power cycle), up.
5063 bcma_core_pci_irq_ctl(&wlc_hw
->d11core
->bus
->drv_pci
, wlc_hw
->d11core
,
5067 * Need to read the hwradio status here to cover the case where the
5068 * system is loaded with the hw radio disabled. We do not want to
5069 * bring the driver up in this case.
5071 if (brcms_b_radio_read_hwdisabled(wlc_hw
)) {
5072 /* put SB PCI in down state again */
5073 ai_pci_down(wlc_hw
->sih
);
5074 brcms_b_xtal(wlc_hw
, OFF
);
5078 ai_pci_up(wlc_hw
->sih
);
5080 /* reset the d11 core */
5081 brcms_b_corereset(wlc_hw
, BRCMS_USE_COREFLAGS
);
5086 static int brcms_b_up_finish(struct brcms_hardware
*wlc_hw
)
5088 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5091 wlc_phy_hw_state_upd(wlc_hw
->band
->pi
, true);
5093 /* FULLY enable dynamic power control and d11 core interrupt */
5094 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_DYNAMIC
);
5095 brcms_intrson(wlc_hw
->wlc
->wl
);
5100 * Write WME tunable parameters for retransmit/max rate
5101 * from wlc struct to ucode
5103 static void brcms_c_wme_retries_write(struct brcms_c_info
*wlc
)
5107 /* Need clock to do this */
5111 for (ac
= 0; ac
< IEEE80211_NUM_ACS
; ac
++)
5112 brcms_b_write_shm(wlc
->hw
, M_AC_TXLMT_ADDR(ac
),
5113 wlc
->wme_retries
[ac
]);
5116 /* make interface operational */
5117 int brcms_c_up(struct brcms_c_info
*wlc
)
5119 struct ieee80211_channel
*ch
;
5121 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
5123 /* HW is turned off so don't try to access it */
5124 if (wlc
->pub
->hw_off
|| brcms_deviceremoved(wlc
))
5127 if (!wlc
->pub
->hw_up
) {
5128 brcms_b_hw_up(wlc
->hw
);
5129 wlc
->pub
->hw_up
= true;
5132 if ((wlc
->pub
->boardflags
& BFL_FEM
)
5133 && (ai_get_chip_id(wlc
->hw
->sih
) == BCM4313_CHIP_ID
)) {
5134 if (wlc
->pub
->boardrev
>= 0x1250
5135 && (wlc
->pub
->boardflags
& BFL_FEM_BT
))
5136 brcms_b_mhf(wlc
->hw
, MHF5
, MHF5_4313_GPIOCTRL
,
5137 MHF5_4313_GPIOCTRL
, BRCM_BAND_ALL
);
5139 brcms_b_mhf(wlc
->hw
, MHF4
, MHF4_EXTPA_ENABLE
,
5140 MHF4_EXTPA_ENABLE
, BRCM_BAND_ALL
);
5144 * Need to read the hwradio status here to cover the case where the
5145 * system is loaded with the hw radio disabled. We do not want to bring
5146 * the driver up in this case. If radio is disabled, abort up, lower
5147 * power, start radio timer and return 0(for NDIS) don't call
5148 * radio_update to avoid looping brcms_c_up.
5150 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5152 if (!wlc
->pub
->radio_disabled
) {
5153 int status
= brcms_b_up_prep(wlc
->hw
);
5154 if (status
== -ENOMEDIUM
) {
5156 (wlc
->pub
->radio_disabled
, WL_RADIO_HW_DISABLE
)) {
5157 struct brcms_bss_cfg
*bsscfg
= wlc
->bsscfg
;
5158 mboolset(wlc
->pub
->radio_disabled
,
5159 WL_RADIO_HW_DISABLE
);
5161 if (bsscfg
->enable
&& bsscfg
->BSS
)
5162 wiphy_err(wlc
->wiphy
, "wl%d: up"
5164 "bsscfg_disable()\n",
5170 if (wlc
->pub
->radio_disabled
) {
5171 brcms_c_radio_monitor_start(wlc
);
5175 /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5178 brcms_c_radio_monitor_stop(wlc
);
5180 /* Set EDCF hostflags */
5181 brcms_b_mhf(wlc
->hw
, MHF1
, MHF1_EDCF
, MHF1_EDCF
, BRCM_BAND_ALL
);
5183 brcms_init(wlc
->wl
);
5184 wlc
->pub
->up
= true;
5186 if (wlc
->bandinit_pending
) {
5187 ch
= wlc
->pub
->ieee_hw
->conf
.channel
;
5188 brcms_c_suspend_mac_and_wait(wlc
);
5189 brcms_c_set_chanspec(wlc
, ch20mhz_chspec(ch
->hw_value
));
5190 wlc
->bandinit_pending
= false;
5191 brcms_c_enable_mac(wlc
);
5194 brcms_b_up_finish(wlc
->hw
);
5196 /* Program the TX wme params with the current settings */
5197 brcms_c_wme_retries_write(wlc
);
5199 /* start one second watchdog timer */
5200 brcms_add_timer(wlc
->wdtimer
, TIMER_INTERVAL_WATCHDOG
, true);
5201 wlc
->WDarmed
= true;
5203 /* ensure antenna config is up to date */
5204 brcms_c_stf_phy_txant_upd(wlc
);
5205 /* ensure LDPC config is in sync */
5206 brcms_c_ht_update_ldpc(wlc
, wlc
->stf
->ldpc
);
5211 static uint
brcms_c_down_del_timer(struct brcms_c_info
*wlc
)
5218 static int brcms_b_bmac_down_prep(struct brcms_hardware
*wlc_hw
)
5223 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5228 dev_gone
= brcms_deviceremoved(wlc_hw
->wlc
);
5230 /* disable interrupts */
5232 wlc_hw
->wlc
->macintmask
= 0;
5234 /* now disable interrupts */
5235 brcms_intrsoff(wlc_hw
->wlc
->wl
);
5237 /* ensure we're running on the pll clock again */
5238 brcms_b_clkctl_clk(wlc_hw
, BCMA_CLKMODE_FAST
);
5240 /* down phy at the last of this stage */
5241 callbacks
+= wlc_phy_down(wlc_hw
->band
->pi
);
5246 static int brcms_b_down_finish(struct brcms_hardware
*wlc_hw
)
5251 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
5257 wlc_phy_hw_state_upd(wlc_hw
->band
->pi
, false);
5259 dev_gone
= brcms_deviceremoved(wlc_hw
->wlc
);
5262 wlc_hw
->sbclk
= false;
5263 wlc_hw
->clk
= false;
5264 wlc_phy_hw_clk_state_upd(wlc_hw
->band
->pi
, false);
5266 /* reclaim any posted packets */
5267 brcms_c_flushqueues(wlc_hw
->wlc
);
5270 /* Reset and disable the core */
5271 if (bcma_core_is_enabled(wlc_hw
->d11core
)) {
5272 if (bcma_read32(wlc_hw
->d11core
,
5273 D11REGOFFS(maccontrol
)) & MCTL_EN_MAC
)
5274 brcms_c_suspend_mac_and_wait(wlc_hw
->wlc
);
5275 callbacks
+= brcms_reset(wlc_hw
->wlc
->wl
);
5276 brcms_c_coredisable(wlc_hw
);
5279 /* turn off primary xtal and pll */
5280 if (!wlc_hw
->noreset
) {
5281 ai_pci_down(wlc_hw
->sih
);
5282 brcms_b_xtal(wlc_hw
, OFF
);
5290 * Mark the interface nonoperational, stop the software mechanisms,
5291 * disable the hardware, free any transient buffer state.
5292 * Return a count of the number of driver callbacks still pending.
5294 uint
brcms_c_down(struct brcms_c_info
*wlc
)
5299 bool dev_gone
= false;
5300 struct brcms_txq_info
*qi
;
5302 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
5304 /* check if we are already in the going down path */
5305 if (wlc
->going_down
) {
5306 wiphy_err(wlc
->wiphy
, "wl%d: %s: Driver going down so return"
5307 "\n", wlc
->pub
->unit
, __func__
);
5313 wlc
->going_down
= true;
5315 callbacks
+= brcms_b_bmac_down_prep(wlc
->hw
);
5317 dev_gone
= brcms_deviceremoved(wlc
);
5319 /* Call any registered down handlers */
5320 for (i
= 0; i
< BRCMS_MAXMODULES
; i
++) {
5321 if (wlc
->modulecb
[i
].down_fn
)
5323 wlc
->modulecb
[i
].down_fn(wlc
->modulecb
[i
].hdl
);
5326 /* cancel the watchdog timer */
5328 if (!brcms_del_timer(wlc
->wdtimer
))
5330 wlc
->WDarmed
= false;
5332 /* cancel all other timers */
5333 callbacks
+= brcms_c_down_del_timer(wlc
);
5335 wlc
->pub
->up
= false;
5337 wlc_phy_mute_upd(wlc
->band
->pi
, false, PHY_MUTE_ALL
);
5339 /* clear txq flow control */
5340 brcms_c_txflowcontrol_reset(wlc
);
5342 /* flush tx queues */
5343 for (qi
= wlc
->tx_queues
; qi
!= NULL
; qi
= qi
->next
)
5344 brcmu_pktq_flush(&qi
->q
, true, NULL
, NULL
);
5346 callbacks
+= brcms_b_down_finish(wlc
->hw
);
5348 /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5351 wlc
->going_down
= false;
5355 /* Set the current gmode configuration */
5356 int brcms_c_set_gmode(struct brcms_c_info
*wlc
, u8 gmode
, bool config
)
5360 struct brcms_c_rateset rs
;
5361 /* Default to 54g Auto */
5362 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5363 s8 shortslot
= BRCMS_SHORTSLOT_AUTO
;
5364 bool shortslot_restrict
= false; /* Restrict association to stations
5365 * that support shortslot
5367 bool ofdm_basic
= false; /* Make 6, 12, and 24 basic rates */
5368 /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5369 int preamble
= BRCMS_PLCP_LONG
;
5370 bool preamble_restrict
= false; /* Restrict association to stations
5371 * that support short preambles
5373 struct brcms_band
*band
;
5375 /* if N-support is enabled, allow Gmode set as long as requested
5376 * Gmode is not GMODE_LEGACY_B
5378 if ((wlc
->pub
->_n_enab
& SUPPORT_11N
) && gmode
== GMODE_LEGACY_B
)
5381 /* verify that we are dealing with 2G band and grab the band pointer */
5382 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
5384 else if ((wlc
->pub
->_nbands
> 1) &&
5385 (wlc
->bandstate
[OTHERBANDUNIT(wlc
)]->bandtype
== BRCM_BAND_2G
))
5386 band
= wlc
->bandstate
[OTHERBANDUNIT(wlc
)];
5390 /* update configuration value */
5392 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_USER
, gmode
);
5394 /* Clear rateset override */
5395 memset(&rs
, 0, sizeof(struct brcms_c_rateset
));
5398 case GMODE_LEGACY_B
:
5399 shortslot
= BRCMS_SHORTSLOT_OFF
;
5400 brcms_c_rateset_copy(&gphy_legacy_rates
, &rs
);
5408 /* Accept defaults */
5413 preamble
= BRCMS_PLCP_SHORT
;
5414 preamble_restrict
= true;
5417 case GMODE_PERFORMANCE
:
5418 shortslot
= BRCMS_SHORTSLOT_ON
;
5419 shortslot_restrict
= true;
5421 preamble
= BRCMS_PLCP_SHORT
;
5422 preamble_restrict
= true;
5427 wiphy_err(wlc
->wiphy
, "wl%d: %s: invalid gmode %d\n",
5428 wlc
->pub
->unit
, __func__
, gmode
);
5432 band
->gmode
= gmode
;
5434 wlc
->shortslot_override
= shortslot
;
5436 /* Use the default 11g rateset */
5438 brcms_c_rateset_copy(&cck_ofdm_rates
, &rs
);
5441 for (i
= 0; i
< rs
.count
; i
++) {
5442 if (rs
.rates
[i
] == BRCM_RATE_6M
5443 || rs
.rates
[i
] == BRCM_RATE_12M
5444 || rs
.rates
[i
] == BRCM_RATE_24M
)
5445 rs
.rates
[i
] |= BRCMS_RATE_FLAG
;
5449 /* Set default bss rateset */
5450 wlc
->default_bss
->rateset
.count
= rs
.count
;
5451 memcpy(wlc
->default_bss
->rateset
.rates
, rs
.rates
,
5452 sizeof(wlc
->default_bss
->rateset
.rates
));
5457 int brcms_c_set_nmode(struct brcms_c_info
*wlc
)
5462 if (wlc
->stf
->txstreams
== WL_11N_3x3
)
5467 /* force GMODE_AUTO if NMODE is ON */
5468 brcms_c_set_gmode(wlc
, GMODE_AUTO
, true);
5469 if (nmode
== WL_11N_3x3
)
5470 wlc
->pub
->_n_enab
= SUPPORT_HT
;
5472 wlc
->pub
->_n_enab
= SUPPORT_11N
;
5473 wlc
->default_bss
->flags
|= BRCMS_BSS_HT
;
5474 /* add the mcs rates to the default and hw ratesets */
5475 brcms_c_rateset_mcs_build(&wlc
->default_bss
->rateset
,
5476 wlc
->stf
->txstreams
);
5477 for (i
= 0; i
< wlc
->pub
->_nbands
; i
++)
5478 memcpy(wlc
->bandstate
[i
]->hw_rateset
.mcs
,
5479 wlc
->default_bss
->rateset
.mcs
, MCSSET_LEN
);
5485 brcms_c_set_internal_rateset(struct brcms_c_info
*wlc
,
5486 struct brcms_c_rateset
*rs_arg
)
5488 struct brcms_c_rateset rs
, new;
5491 memcpy(&rs
, rs_arg
, sizeof(struct brcms_c_rateset
));
5493 /* check for bad count value */
5494 if ((rs
.count
== 0) || (rs
.count
> BRCMS_NUMRATES
))
5497 /* try the current band */
5498 bandunit
= wlc
->band
->bandunit
;
5499 memcpy(&new, &rs
, sizeof(struct brcms_c_rateset
));
5500 if (brcms_c_rate_hwrs_filter_sort_validate
5501 (&new, &wlc
->bandstate
[bandunit
]->hw_rateset
, true,
5502 wlc
->stf
->txstreams
))
5505 /* try the other band */
5506 if (brcms_is_mband_unlocked(wlc
)) {
5507 bandunit
= OTHERBANDUNIT(wlc
);
5508 memcpy(&new, &rs
, sizeof(struct brcms_c_rateset
));
5509 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5511 bandstate
[bandunit
]->
5513 wlc
->stf
->txstreams
))
5520 /* apply new rateset */
5521 memcpy(&wlc
->default_bss
->rateset
, &new,
5522 sizeof(struct brcms_c_rateset
));
5523 memcpy(&wlc
->bandstate
[bandunit
]->defrateset
, &new,
5524 sizeof(struct brcms_c_rateset
));
5528 static void brcms_c_ofdm_rateset_war(struct brcms_c_info
*wlc
)
5533 if (wlc
->bsscfg
->associated
)
5534 r
= wlc
->bsscfg
->current_bss
->rateset
.rates
[0];
5536 r
= wlc
->default_bss
->rateset
.rates
[0];
5538 wlc_phy_ofdm_rateset_war(wlc
->band
->pi
, war
);
5541 int brcms_c_set_channel(struct brcms_c_info
*wlc
, u16 channel
)
5543 u16 chspec
= ch20mhz_chspec(channel
);
5545 if (channel
< 0 || channel
> MAXCHANNEL
)
5548 if (!brcms_c_valid_chanspec_db(wlc
->cmi
, chspec
))
5552 if (!wlc
->pub
->up
&& brcms_is_mband_unlocked(wlc
)) {
5553 if (wlc
->band
->bandunit
!= chspec_bandunit(chspec
))
5554 wlc
->bandinit_pending
= true;
5556 wlc
->bandinit_pending
= false;
5559 wlc
->default_bss
->chanspec
= chspec
;
5560 /* brcms_c_BSSinit() will sanitize the rateset before
5562 if (wlc
->pub
->up
&& (wlc_phy_chanspec_get(wlc
->band
->pi
) != chspec
)) {
5563 brcms_c_set_home_chanspec(wlc
, chspec
);
5564 brcms_c_suspend_mac_and_wait(wlc
);
5565 brcms_c_set_chanspec(wlc
, chspec
);
5566 brcms_c_enable_mac(wlc
);
5571 int brcms_c_set_rate_limit(struct brcms_c_info
*wlc
, u16 srl
, u16 lrl
)
5575 if (srl
< 1 || srl
> RETRY_SHORT_MAX
||
5576 lrl
< 1 || lrl
> RETRY_SHORT_MAX
)
5582 brcms_b_retrylimit_upd(wlc
->hw
, wlc
->SRL
, wlc
->LRL
);
5584 for (ac
= 0; ac
< IEEE80211_NUM_ACS
; ac
++) {
5585 wlc
->wme_retries
[ac
] = SFIELD(wlc
->wme_retries
[ac
],
5586 EDCF_SHORT
, wlc
->SRL
);
5587 wlc
->wme_retries
[ac
] = SFIELD(wlc
->wme_retries
[ac
],
5588 EDCF_LONG
, wlc
->LRL
);
5590 brcms_c_wme_retries_write(wlc
);
5595 void brcms_c_get_current_rateset(struct brcms_c_info
*wlc
,
5596 struct brcm_rateset
*currs
)
5598 struct brcms_c_rateset
*rs
;
5600 if (wlc
->pub
->associated
)
5601 rs
= &wlc
->bsscfg
->current_bss
->rateset
;
5603 rs
= &wlc
->default_bss
->rateset
;
5605 /* Copy only legacy rateset section */
5606 currs
->count
= rs
->count
;
5607 memcpy(&currs
->rates
, &rs
->rates
, rs
->count
);
5610 int brcms_c_set_rateset(struct brcms_c_info
*wlc
, struct brcm_rateset
*rs
)
5612 struct brcms_c_rateset internal_rs
;
5615 if (rs
->count
> BRCMS_NUMRATES
)
5618 memset(&internal_rs
, 0, sizeof(struct brcms_c_rateset
));
5620 /* Copy only legacy rateset section */
5621 internal_rs
.count
= rs
->count
;
5622 memcpy(&internal_rs
.rates
, &rs
->rates
, internal_rs
.count
);
5624 /* merge rateset coming in with the current mcsset */
5625 if (wlc
->pub
->_n_enab
& SUPPORT_11N
) {
5626 struct brcms_bss_info
*mcsset_bss
;
5627 if (wlc
->bsscfg
->associated
)
5628 mcsset_bss
= wlc
->bsscfg
->current_bss
;
5630 mcsset_bss
= wlc
->default_bss
;
5631 memcpy(internal_rs
.mcs
, &mcsset_bss
->rateset
.mcs
[0],
5635 bcmerror
= brcms_c_set_internal_rateset(wlc
, &internal_rs
);
5637 brcms_c_ofdm_rateset_war(wlc
);
5642 int brcms_c_set_beacon_period(struct brcms_c_info
*wlc
, u16 period
)
5644 if (period
< DOT11_MIN_BEACON_PERIOD
||
5645 period
> DOT11_MAX_BEACON_PERIOD
)
5648 wlc
->default_bss
->beacon_period
= period
;
5652 u16
brcms_c_get_phy_type(struct brcms_c_info
*wlc
, int phyidx
)
5654 return wlc
->band
->phytype
;
5657 void brcms_c_set_shortslot_override(struct brcms_c_info
*wlc
, s8 sslot_override
)
5659 wlc
->shortslot_override
= sslot_override
;
5662 * shortslot is an 11g feature, so no more work if we are
5663 * currently on the 5G band
5665 if (wlc
->band
->bandtype
== BRCM_BAND_5G
)
5668 if (wlc
->pub
->up
&& wlc
->pub
->associated
) {
5669 /* let watchdog or beacon processing update shortslot */
5670 } else if (wlc
->pub
->up
) {
5671 /* unassociated shortslot is off */
5672 brcms_c_switch_shortslot(wlc
, false);
5674 /* driver is down, so just update the brcms_c_info
5676 if (wlc
->shortslot_override
== BRCMS_SHORTSLOT_AUTO
)
5677 wlc
->shortslot
= false;
5680 (wlc
->shortslot_override
==
5681 BRCMS_SHORTSLOT_ON
);
5686 * register watchdog and down handlers.
5688 int brcms_c_module_register(struct brcms_pub
*pub
,
5689 const char *name
, struct brcms_info
*hdl
,
5690 int (*d_fn
)(void *handle
))
5692 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) pub
->wlc
;
5695 /* find an empty entry and just add, no duplication check! */
5696 for (i
= 0; i
< BRCMS_MAXMODULES
; i
++) {
5697 if (wlc
->modulecb
[i
].name
[0] == '\0') {
5698 strncpy(wlc
->modulecb
[i
].name
, name
,
5699 sizeof(wlc
->modulecb
[i
].name
) - 1);
5700 wlc
->modulecb
[i
].hdl
= hdl
;
5701 wlc
->modulecb
[i
].down_fn
= d_fn
;
5709 /* unregister module callbacks */
5710 int brcms_c_module_unregister(struct brcms_pub
*pub
, const char *name
,
5711 struct brcms_info
*hdl
)
5713 struct brcms_c_info
*wlc
= (struct brcms_c_info
*) pub
->wlc
;
5719 for (i
= 0; i
< BRCMS_MAXMODULES
; i
++) {
5720 if (!strcmp(wlc
->modulecb
[i
].name
, name
) &&
5721 (wlc
->modulecb
[i
].hdl
== hdl
)) {
5722 memset(&wlc
->modulecb
[i
], 0, sizeof(struct modulecb
));
5727 /* table not found! */
5731 void brcms_c_print_txstatus(struct tx_status
*txs
)
5733 pr_debug("\ntxpkt (MPDU) Complete\n");
5735 pr_debug("FrameID: %04x TxStatus: %04x\n", txs
->frameid
, txs
->status
);
5737 pr_debug("[15:12] %d frame attempts\n",
5738 (txs
->status
& TX_STATUS_FRM_RTX_MASK
) >>
5739 TX_STATUS_FRM_RTX_SHIFT
);
5740 pr_debug(" [11:8] %d rts attempts\n",
5741 (txs
->status
& TX_STATUS_RTS_RTX_MASK
) >>
5742 TX_STATUS_RTS_RTX_SHIFT
);
5743 pr_debug(" [7] %d PM mode indicated\n",
5744 txs
->status
& TX_STATUS_PMINDCTD
? 1 : 0);
5745 pr_debug(" [6] %d intermediate status\n",
5746 txs
->status
& TX_STATUS_INTERMEDIATE
? 1 : 0);
5747 pr_debug(" [5] %d AMPDU\n",
5748 txs
->status
& TX_STATUS_AMPDU
? 1 : 0);
5749 pr_debug(" [4:2] %d Frame Suppressed Reason (%s)\n",
5750 (txs
->status
& TX_STATUS_SUPR_MASK
) >> TX_STATUS_SUPR_SHIFT
,
5755 "Previous frag failure",
5759 } [(txs
->status
& TX_STATUS_SUPR_MASK
) >>
5760 TX_STATUS_SUPR_SHIFT
]);
5761 pr_debug(" [1] %d acked\n",
5762 txs
->status
& TX_STATUS_ACK_RCV
? 1 : 0);
5764 pr_debug("LastTxTime: %04x Seq: %04x PHYTxStatus: %04x RxAckRSSI: %04x RxAckSQ: %04x\n",
5765 txs
->lasttxtime
, txs
->sequence
, txs
->phyerr
,
5766 (txs
->ackphyrxsh
& PRXS1_JSSI_MASK
) >> PRXS1_JSSI_SHIFT
,
5767 (txs
->ackphyrxsh
& PRXS1_SQ_MASK
) >> PRXS1_SQ_SHIFT
);
5770 bool brcms_c_chipmatch(u16 vendor
, u16 device
)
5772 if (vendor
!= PCI_VENDOR_ID_BROADCOM
) {
5773 pr_err("unknown vendor id %04x\n", vendor
);
5777 if (device
== BCM43224_D11N_ID_VEN1
)
5779 if ((device
== BCM43224_D11N_ID
) || (device
== BCM43225_D11N2G_ID
))
5781 if (device
== BCM4313_D11N2G_ID
)
5783 if ((device
== BCM43236_D11N_ID
) || (device
== BCM43236_D11N2G_ID
))
5786 pr_err("unknown device id %04x\n", device
);
5791 void brcms_c_print_txdesc(struct d11txh
*txh
)
5793 u16 mtcl
= le16_to_cpu(txh
->MacTxControlLow
);
5794 u16 mtch
= le16_to_cpu(txh
->MacTxControlHigh
);
5795 u16 mfc
= le16_to_cpu(txh
->MacFrameControl
);
5796 u16 tfest
= le16_to_cpu(txh
->TxFesTimeNormal
);
5797 u16 ptcw
= le16_to_cpu(txh
->PhyTxControlWord
);
5798 u16 ptcw_1
= le16_to_cpu(txh
->PhyTxControlWord_1
);
5799 u16 ptcw_1_Fbr
= le16_to_cpu(txh
->PhyTxControlWord_1_Fbr
);
5800 u16 ptcw_1_Rts
= le16_to_cpu(txh
->PhyTxControlWord_1_Rts
);
5801 u16 ptcw_1_FbrRts
= le16_to_cpu(txh
->PhyTxControlWord_1_FbrRts
);
5802 u16 mainrates
= le16_to_cpu(txh
->MainRates
);
5803 u16 xtraft
= le16_to_cpu(txh
->XtraFrameTypes
);
5805 u8
*ra
= txh
->TxFrameRA
;
5806 u16 tfestfb
= le16_to_cpu(txh
->TxFesTimeFallback
);
5807 u8
*rtspfb
= txh
->RTSPLCPFallback
;
5808 u16 rtsdfb
= le16_to_cpu(txh
->RTSDurFallback
);
5809 u8
*fragpfb
= txh
->FragPLCPFallback
;
5810 u16 fragdfb
= le16_to_cpu(txh
->FragDurFallback
);
5811 u16 mmodelen
= le16_to_cpu(txh
->MModeLen
);
5812 u16 mmodefbrlen
= le16_to_cpu(txh
->MModeFbrLen
);
5813 u16 tfid
= le16_to_cpu(txh
->TxFrameID
);
5814 u16 txs
= le16_to_cpu(txh
->TxStatus
);
5815 u16 mnmpdu
= le16_to_cpu(txh
->MaxNMpdus
);
5816 u16 mabyte
= le16_to_cpu(txh
->MaxABytes_MRT
);
5817 u16 mabyte_f
= le16_to_cpu(txh
->MaxABytes_FBR
);
5818 u16 mmbyte
= le16_to_cpu(txh
->MinMBytes
);
5820 u8
*rtsph
= txh
->RTSPhyHeader
;
5821 struct ieee80211_rts rts
= txh
->rts_frame
;
5823 /* add plcp header along with txh descriptor */
5824 brcmu_dbg_hex_dump(txh
, sizeof(struct d11txh
) + 48,
5825 "Raw TxDesc + plcp header:\n");
5827 pr_debug("TxCtlLow: %04x ", mtcl
);
5828 pr_debug("TxCtlHigh: %04x ", mtch
);
5829 pr_debug("FC: %04x ", mfc
);
5830 pr_debug("FES Time: %04x\n", tfest
);
5831 pr_debug("PhyCtl: %04x%s ", ptcw
,
5832 (ptcw
& PHY_TXC_SHORT_HDR
) ? " short" : "");
5833 pr_debug("PhyCtl_1: %04x ", ptcw_1
);
5834 pr_debug("PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr
);
5835 pr_debug("PhyCtl_1_Rts: %04x ", ptcw_1_Rts
);
5836 pr_debug("PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts
);
5837 pr_debug("MainRates: %04x ", mainrates
);
5838 pr_debug("XtraFrameTypes: %04x ", xtraft
);
5841 print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET
, iv
, sizeof(txh
->IV
));
5842 print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET
,
5843 ra
, sizeof(txh
->TxFrameRA
));
5845 pr_debug("Fb FES Time: %04x ", tfestfb
);
5846 print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET
,
5847 rtspfb
, sizeof(txh
->RTSPLCPFallback
));
5848 pr_debug("RTS DUR: %04x ", rtsdfb
);
5849 print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET
,
5850 fragpfb
, sizeof(txh
->FragPLCPFallback
));
5851 pr_debug("DUR: %04x", fragdfb
);
5854 pr_debug("MModeLen: %04x ", mmodelen
);
5855 pr_debug("MModeFbrLen: %04x\n", mmodefbrlen
);
5857 pr_debug("FrameID: %04x\n", tfid
);
5858 pr_debug("TxStatus: %04x\n", txs
);
5860 pr_debug("MaxNumMpdu: %04x\n", mnmpdu
);
5861 pr_debug("MaxAggbyte: %04x\n", mabyte
);
5862 pr_debug("MaxAggbyte_fb: %04x\n", mabyte_f
);
5863 pr_debug("MinByte: %04x\n", mmbyte
);
5865 print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET
,
5866 rtsph
, sizeof(txh
->RTSPhyHeader
));
5867 print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET
,
5868 (u8
*)&rts
, sizeof(txh
->rts_frame
));
5871 #endif /* defined(DEBUG) */
5875 brcms_c_format_flags(const struct brcms_c_bit_desc
*bd
, u32 flags
, char *buf
,
5881 int slen
= 0, nlen
= 0;
5885 if (len
< 2 || !buf
)
5890 for (i
= 0; flags
!= 0; i
++) {
5893 if (bit
== 0 && flags
!= 0) {
5894 /* print any unnamed bits */
5895 snprintf(hexstr
, 16, "0x%X", flags
);
5897 flags
= 0; /* exit loop */
5898 } else if ((flags
& bit
) == 0)
5901 nlen
= strlen(name
);
5903 /* count btwn flag space */
5906 /* need NULL char as well */
5909 /* copy NULL char but don't count it */
5910 strncpy(p
, name
, nlen
+ 1);
5912 /* copy btwn flag space and NULL char */
5914 p
+= snprintf(p
, 2, " ");
5918 /* indicate the str was too short */
5921 p
-= 2 - len
; /* overwrite last char */
5922 p
+= snprintf(p
, 2, ">");
5925 return (int)(p
- buf
);
5927 #endif /* defined(DEBUG) */
5930 void brcms_c_print_rxh(struct d11rxhdr
*rxh
)
5932 u16 len
= rxh
->RxFrameSize
;
5933 u16 phystatus_0
= rxh
->PhyRxStatus_0
;
5934 u16 phystatus_1
= rxh
->PhyRxStatus_1
;
5935 u16 phystatus_2
= rxh
->PhyRxStatus_2
;
5936 u16 phystatus_3
= rxh
->PhyRxStatus_3
;
5937 u16 macstatus1
= rxh
->RxStatus1
;
5938 u16 macstatus2
= rxh
->RxStatus2
;
5941 static const struct brcms_c_bit_desc macstat_flags
[] = {
5942 {RXS_FCSERR
, "FCSErr"},
5943 {RXS_RESPFRAMETX
, "Reply"},
5944 {RXS_PBPRES
, "PADDING"},
5945 {RXS_DECATMPT
, "DeCr"},
5946 {RXS_DECERR
, "DeCrErr"},
5947 {RXS_BCNSENT
, "Bcn"},
5951 brcmu_dbg_hex_dump(rxh
, sizeof(struct d11rxhdr
), "Raw RxDesc:\n");
5953 brcms_c_format_flags(macstat_flags
, macstatus1
, flagstr
, 64);
5955 snprintf(lenbuf
, sizeof(lenbuf
), "0x%x", len
);
5957 pr_debug("RxFrameSize: %6s (%d)%s\n", lenbuf
, len
,
5958 (rxh
->PhyRxStatus_0
& PRXS0_SHORTH
) ? " short preamble" : "");
5959 pr_debug("RxPHYStatus: %04x %04x %04x %04x\n",
5960 phystatus_0
, phystatus_1
, phystatus_2
, phystatus_3
);
5961 pr_debug("RxMACStatus: %x %s\n", macstatus1
, flagstr
);
5962 pr_debug("RXMACaggtype: %x\n",
5963 (macstatus2
& RXS_AGGTYPE_MASK
));
5964 pr_debug("RxTSFTime: %04x\n", rxh
->RxTSFTime
);
5966 #endif /* defined(DEBUG) */
5968 u16
brcms_b_rate_shm_offset(struct brcms_hardware
*wlc_hw
, u8 rate
)
5973 /* get the phy specific rate encoding for the PLCP SIGNAL field */
5974 if (is_ofdm_rate(rate
))
5975 table_ptr
= M_RT_DIRMAP_A
;
5977 table_ptr
= M_RT_DIRMAP_B
;
5979 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
5980 * the index into the rate table.
5982 phy_rate
= rate_info
[rate
] & BRCMS_RATE_MASK
;
5983 index
= phy_rate
& 0xf;
5985 /* Find the SHM pointer to the rate table entry by looking in the
5988 return 2 * brcms_b_read_shm(wlc_hw
, table_ptr
+ (index
* 2));
5992 brcms_c_prec_enq_head(struct brcms_c_info
*wlc
, struct pktq
*q
,
5993 struct sk_buff
*pkt
, int prec
, bool head
)
5996 int eprec
= -1; /* precedence to evict from */
5998 /* Determine precedence from which to evict packet, if any */
5999 if (pktq_pfull(q
, prec
))
6001 else if (pktq_full(q
)) {
6002 p
= brcmu_pktq_peek_tail(q
, &eprec
);
6004 wiphy_err(wlc
->wiphy
, "%s: Failing: eprec %d > prec %d"
6005 "\n", __func__
, eprec
, prec
);
6010 /* Evict if needed */
6012 bool discard_oldest
;
6014 discard_oldest
= ac_bitmap_tst(0, eprec
);
6016 /* Refuse newer packet unless configured to discard oldest */
6017 if (eprec
== prec
&& !discard_oldest
) {
6018 wiphy_err(wlc
->wiphy
, "%s: No where to go, prec == %d"
6019 "\n", __func__
, prec
);
6023 /* Evict packet according to discard policy */
6024 p
= discard_oldest
? brcmu_pktq_pdeq(q
, eprec
) :
6025 brcmu_pktq_pdeq_tail(q
, eprec
);
6026 brcmu_pkt_buf_free_skb(p
);
6031 p
= brcmu_pktq_penq_head(q
, prec
, pkt
);
6033 p
= brcmu_pktq_penq(q
, prec
, pkt
);
6039 * Attempts to queue a packet onto a multiple-precedence queue,
6040 * if necessary evicting a lower precedence packet from the queue.
6042 * 'prec' is the precedence number that has already been mapped
6043 * from the packet priority.
6045 * Returns true if packet consumed (queued), false if not.
6047 static bool brcms_c_prec_enq(struct brcms_c_info
*wlc
, struct pktq
*q
,
6048 struct sk_buff
*pkt
, int prec
)
6050 return brcms_c_prec_enq_head(wlc
, q
, pkt
, prec
, false);
6053 void brcms_c_txq_enq(struct brcms_c_info
*wlc
, struct scb
*scb
,
6054 struct sk_buff
*sdu
, uint prec
)
6056 struct brcms_txq_info
*qi
= wlc
->pkt_queue
; /* Check me */
6057 struct pktq
*q
= &qi
->q
;
6060 prio
= sdu
->priority
;
6062 if (!brcms_c_prec_enq(wlc
, q
, sdu
, prec
)) {
6064 * we might hit this condtion in case
6065 * packet flooding from mac80211 stack
6067 brcmu_pkt_buf_free_skb(sdu
);
6072 * bcmc_fid_generate:
6073 * Generate frame ID for a BCMC packet. The frag field is not used
6074 * for MC frames so is used as part of the sequence number.
6077 bcmc_fid_generate(struct brcms_c_info
*wlc
, struct brcms_bss_cfg
*bsscfg
,
6082 frameid
= le16_to_cpu(txh
->TxFrameID
) & ~(TXFID_SEQ_MASK
|
6086 mc_fid_counter
++) << TXFID_SEQ_SHIFT
) & TXFID_SEQ_MASK
) |
6093 brcms_c_calc_ack_time(struct brcms_c_info
*wlc
, u32 rspec
,
6098 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, preamble_type %d\n",
6099 wlc
->pub
->unit
, rspec
, preamble_type
);
6101 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6102 * is less than or equal to the rate of the immediately previous
6105 rspec
= brcms_basic_rate(wlc
, rspec
);
6106 /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6108 brcms_c_calc_frame_time(wlc
, rspec
, preamble_type
,
6109 (DOT11_ACK_LEN
+ FCS_LEN
));
6114 brcms_c_calc_cts_time(struct brcms_c_info
*wlc
, u32 rspec
,
6117 BCMMSG(wlc
->wiphy
, "wl%d: ratespec 0x%x, preamble_type %d\n",
6118 wlc
->pub
->unit
, rspec
, preamble_type
);
6119 return brcms_c_calc_ack_time(wlc
, rspec
, preamble_type
);
6123 brcms_c_calc_ba_time(struct brcms_c_info
*wlc
, u32 rspec
,
6126 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, "
6127 "preamble_type %d\n", wlc
->pub
->unit
, rspec
, preamble_type
);
6129 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6130 * is less than or equal to the rate of the immediately previous
6133 rspec
= brcms_basic_rate(wlc
, rspec
);
6134 /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6135 return brcms_c_calc_frame_time(wlc
, rspec
, preamble_type
,
6136 (DOT11_BA_LEN
+ DOT11_BA_BITMAP_LEN
+
6140 /* brcms_c_compute_frame_dur()
6142 * Calculate the 802.11 MAC header DUR field for MPDU
6143 * DUR for a single frame = 1 SIFS + 1 ACK
6144 * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6146 * rate MPDU rate in unit of 500kbps
6147 * next_frag_len next MPDU length in bytes
6148 * preamble_type use short/GF or long/MM PLCP header
6151 brcms_c_compute_frame_dur(struct brcms_c_info
*wlc
, u32 rate
,
6152 u8 preamble_type
, uint next_frag_len
)
6156 sifs
= get_sifs(wlc
->band
);
6159 dur
+= (u16
) brcms_c_calc_ack_time(wlc
, rate
, preamble_type
);
6161 if (next_frag_len
) {
6162 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6164 /* add another SIFS and the frag time */
6167 (u16
) brcms_c_calc_frame_time(wlc
, rate
, preamble_type
,
6173 /* The opposite of brcms_c_calc_frame_time */
6175 brcms_c_calc_frame_len(struct brcms_c_info
*wlc
, u32 ratespec
,
6176 u8 preamble_type
, uint dur
)
6178 uint nsyms
, mac_len
, Ndps
, kNdps
;
6179 uint rate
= rspec2rate(ratespec
);
6181 BCMMSG(wlc
->wiphy
, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6182 wlc
->pub
->unit
, ratespec
, preamble_type
, dur
);
6184 if (is_mcs_rate(ratespec
)) {
6185 uint mcs
= ratespec
& RSPEC_RATE_MASK
;
6186 int tot_streams
= mcs_2_txstreams(mcs
) + rspec_stc(ratespec
);
6187 dur
-= PREN_PREAMBLE
+ (tot_streams
* PREN_PREAMBLE_EXT
);
6188 /* payload calculation matches that of regular ofdm */
6189 if (wlc
->band
->bandtype
== BRCM_BAND_2G
)
6190 dur
-= DOT11_OFDM_SIGNAL_EXTENSION
;
6191 /* kNdbps = kbps * 4 */
6192 kNdps
= mcs_2_rate(mcs
, rspec_is40mhz(ratespec
),
6193 rspec_issgi(ratespec
)) * 4;
6194 nsyms
= dur
/ APHY_SYMBOL_TIME
;
6197 ((APHY_SERVICE_NBITS
+ APHY_TAIL_NBITS
) * 1000)) / 8000;
6198 } else if (is_ofdm_rate(ratespec
)) {
6199 dur
-= APHY_PREAMBLE_TIME
;
6200 dur
-= APHY_SIGNAL_TIME
;
6201 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6203 nsyms
= dur
/ APHY_SYMBOL_TIME
;
6206 (APHY_SERVICE_NBITS
+ APHY_TAIL_NBITS
)) / 8;
6208 if (preamble_type
& BRCMS_SHORT_PREAMBLE
)
6209 dur
-= BPHY_PLCP_SHORT_TIME
;
6211 dur
-= BPHY_PLCP_TIME
;
6212 mac_len
= dur
* rate
;
6213 /* divide out factor of 2 in rate (1/2 mbps) */
6214 mac_len
= mac_len
/ 8 / 2;
6220 * Return true if the specified rate is supported by the specified band.
6221 * BRCM_BAND_AUTO indicates the current band.
6223 static bool brcms_c_valid_rate(struct brcms_c_info
*wlc
, u32 rspec
, int band
,
6226 struct brcms_c_rateset
*hw_rateset
;
6229 if ((band
== BRCM_BAND_AUTO
) || (band
== wlc
->band
->bandtype
))
6230 hw_rateset
= &wlc
->band
->hw_rateset
;
6231 else if (wlc
->pub
->_nbands
> 1)
6232 hw_rateset
= &wlc
->bandstate
[OTHERBANDUNIT(wlc
)]->hw_rateset
;
6234 /* other band specified and we are a single band device */
6237 /* check if this is a mimo rate */
6238 if (is_mcs_rate(rspec
)) {
6239 if ((rspec
& RSPEC_RATE_MASK
) >= MCS_TABLE_SIZE
)
6242 return isset(hw_rateset
->mcs
, (rspec
& RSPEC_RATE_MASK
));
6245 for (i
= 0; i
< hw_rateset
->count
; i
++)
6246 if (hw_rateset
->rates
[i
] == rspec2rate(rspec
))
6250 wiphy_err(wlc
->wiphy
, "wl%d: valid_rate: rate spec 0x%x "
6251 "not in hw_rateset\n", wlc
->pub
->unit
, rspec
);
6257 mac80211_wlc_set_nrate(struct brcms_c_info
*wlc
, struct brcms_band
*cur_band
,
6260 u8 stf
= (int_val
& NRATE_STF_MASK
) >> NRATE_STF_SHIFT
;
6261 u8 rate
= int_val
& NRATE_RATE_MASK
;
6263 bool ismcs
= ((int_val
& NRATE_MCS_INUSE
) == NRATE_MCS_INUSE
);
6264 bool issgi
= ((int_val
& NRATE_SGI_MASK
) >> NRATE_SGI_SHIFT
);
6265 bool override_mcs_only
= ((int_val
& NRATE_OVERRIDE_MCS_ONLY
)
6266 == NRATE_OVERRIDE_MCS_ONLY
);
6272 /* validate the combination of rate/mcs/stf is allowed */
6273 if ((wlc
->pub
->_n_enab
& SUPPORT_11N
) && ismcs
) {
6274 /* mcs only allowed when nmode */
6275 if (stf
> PHY_TXC1_MODE_SDM
) {
6276 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid stf\n",
6277 wlc
->pub
->unit
, __func__
);
6282 /* mcs 32 is a special case, DUP mode 40 only */
6284 if (!CHSPEC_IS40(wlc
->home_chanspec
) ||
6285 ((stf
!= PHY_TXC1_MODE_SISO
)
6286 && (stf
!= PHY_TXC1_MODE_CDD
))) {
6287 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid mcs "
6288 "32\n", wlc
->pub
->unit
, __func__
);
6292 /* mcs > 7 must use stf SDM */
6293 } else if (rate
> HIGHEST_SINGLE_STREAM_MCS
) {
6294 /* mcs > 7 must use stf SDM */
6295 if (stf
!= PHY_TXC1_MODE_SDM
) {
6296 BCMMSG(wlc
->wiphy
, "wl%d: enabling "
6297 "SDM mode for mcs %d\n",
6298 wlc
->pub
->unit
, rate
);
6299 stf
= PHY_TXC1_MODE_SDM
;
6303 * MCS 0-7 may use SISO, CDD, and for
6306 if ((stf
> PHY_TXC1_MODE_STBC
) ||
6307 (!BRCMS_STBC_CAP_PHY(wlc
)
6308 && (stf
== PHY_TXC1_MODE_STBC
))) {
6309 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid STBC"
6310 "\n", wlc
->pub
->unit
, __func__
);
6315 } else if (is_ofdm_rate(rate
)) {
6316 if ((stf
!= PHY_TXC1_MODE_CDD
) && (stf
!= PHY_TXC1_MODE_SISO
)) {
6317 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid OFDM\n",
6318 wlc
->pub
->unit
, __func__
);
6322 } else if (is_cck_rate(rate
)) {
6323 if ((cur_band
->bandtype
!= BRCM_BAND_2G
)
6324 || (stf
!= PHY_TXC1_MODE_SISO
)) {
6325 wiphy_err(wlc
->wiphy
, "wl%d: %s: Invalid CCK\n",
6326 wlc
->pub
->unit
, __func__
);
6331 wiphy_err(wlc
->wiphy
, "wl%d: %s: Unknown rate type\n",
6332 wlc
->pub
->unit
, __func__
);
6336 /* make sure multiple antennae are available for non-siso rates */
6337 if ((stf
!= PHY_TXC1_MODE_SISO
) && (wlc
->stf
->txstreams
== 1)) {
6338 wiphy_err(wlc
->wiphy
, "wl%d: %s: SISO antenna but !SISO "
6339 "request\n", wlc
->pub
->unit
, __func__
);
6346 rspec
|= RSPEC_MIMORATE
;
6347 /* For STBC populate the STC field of the ratespec */
6348 if (stf
== PHY_TXC1_MODE_STBC
) {
6350 stc
= 1; /* Nss for single stream is always 1 */
6351 rspec
|= (stc
<< RSPEC_STC_SHIFT
);
6355 rspec
|= (stf
<< RSPEC_STF_SHIFT
);
6357 if (override_mcs_only
)
6358 rspec
|= RSPEC_OVERRIDE_MCS_ONLY
;
6361 rspec
|= RSPEC_SHORT_GI
;
6364 && !brcms_c_valid_rate(wlc
, rspec
, cur_band
->bandtype
, true))
6373 * Compute PLCP, but only requires actual rate and length of pkt.
6374 * Rate is given in the driver standard multiple of 500 kbps.
6375 * le is set for 11 Mbps rate if necessary.
6376 * Broken out for PRQ.
6379 static void brcms_c_cck_plcp_set(struct brcms_c_info
*wlc
, int rate_500
,
6380 uint length
, u8
*plcp
)
6393 usec
= (length
<< 4) / 11;
6394 if ((length
<< 4) - (usec
* 11) > 0)
6398 usec
= (length
<< 3) / 11;
6399 if ((length
<< 3) - (usec
* 11) > 0) {
6401 if ((usec
* 11) - (length
<< 3) >= 8)
6402 le
= D11B_PLCP_SIGNAL_LE
;
6407 wiphy_err(wlc
->wiphy
,
6408 "brcms_c_cck_plcp_set: unsupported rate %d\n",
6410 rate_500
= BRCM_RATE_1M
;
6414 /* PLCP signal byte */
6415 plcp
[0] = rate_500
* 5; /* r (500kbps) * 5 == r (100kbps) */
6416 /* PLCP service byte */
6417 plcp
[1] = (u8
) (le
| D11B_PLCP_SIGNAL_LOCKED
);
6418 /* PLCP length u16, little endian */
6419 plcp
[2] = usec
& 0xff;
6420 plcp
[3] = (usec
>> 8) & 0xff;
6426 /* Rate: 802.11 rate code, length: PSDU length in octets */
6427 static void brcms_c_compute_mimo_plcp(u32 rspec
, uint length
, u8
*plcp
)
6429 u8 mcs
= (u8
) (rspec
& RSPEC_RATE_MASK
);
6431 if (rspec_is40mhz(rspec
) || (mcs
== 32))
6432 plcp
[0] |= MIMO_PLCP_40MHZ
;
6433 BRCMS_SET_MIMO_PLCP_LEN(plcp
, length
);
6434 plcp
[3] = rspec_mimoplcp3(rspec
); /* rspec already holds this byte */
6435 plcp
[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6436 plcp
[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6440 /* Rate: 802.11 rate code, length: PSDU length in octets */
6442 brcms_c_compute_ofdm_plcp(u32 rspec
, u32 length
, u8
*plcp
)
6446 int rate
= rspec2rate(rspec
);
6449 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6452 rate_signal
= rate_info
[rate
] & BRCMS_RATE_MASK
;
6453 memset(plcp
, 0, D11_PHY_HDR_LEN
);
6454 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr
*) plcp
, rate_signal
);
6456 tmp
= (length
& 0xfff) << 5;
6457 plcp
[2] |= (tmp
>> 16) & 0xff;
6458 plcp
[1] |= (tmp
>> 8) & 0xff;
6459 plcp
[0] |= tmp
& 0xff;
6462 /* Rate: 802.11 rate code, length: PSDU length in octets */
6463 static void brcms_c_compute_cck_plcp(struct brcms_c_info
*wlc
, u32 rspec
,
6464 uint length
, u8
*plcp
)
6466 int rate
= rspec2rate(rspec
);
6468 brcms_c_cck_plcp_set(wlc
, rate
, length
, plcp
);
6472 brcms_c_compute_plcp(struct brcms_c_info
*wlc
, u32 rspec
,
6473 uint length
, u8
*plcp
)
6475 if (is_mcs_rate(rspec
))
6476 brcms_c_compute_mimo_plcp(rspec
, length
, plcp
);
6477 else if (is_ofdm_rate(rspec
))
6478 brcms_c_compute_ofdm_plcp(rspec
, length
, plcp
);
6480 brcms_c_compute_cck_plcp(wlc
, rspec
, length
, plcp
);
6483 /* brcms_c_compute_rtscts_dur()
6485 * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6486 * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6487 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
6489 * cts cts-to-self or rts/cts
6490 * rts_rate rts or cts rate in unit of 500kbps
6491 * rate next MPDU rate in unit of 500kbps
6492 * frame_len next MPDU frame length in bytes
6495 brcms_c_compute_rtscts_dur(struct brcms_c_info
*wlc
, bool cts_only
,
6497 u32 frame_rate
, u8 rts_preamble_type
,
6498 u8 frame_preamble_type
, uint frame_len
, bool ba
)
6502 sifs
= get_sifs(wlc
->band
);
6508 (u16
) brcms_c_calc_cts_time(wlc
, rts_rate
,
6516 (u16
) brcms_c_calc_frame_time(wlc
, frame_rate
, frame_preamble_type
,
6520 (u16
) brcms_c_calc_ba_time(wlc
, frame_rate
,
6521 BRCMS_SHORT_PREAMBLE
);
6524 (u16
) brcms_c_calc_ack_time(wlc
, frame_rate
,
6525 frame_preamble_type
);
6529 static u16
brcms_c_phytxctl1_calc(struct brcms_c_info
*wlc
, u32 rspec
)
6534 if (BRCMS_ISLCNPHY(wlc
->band
)) {
6535 bw
= PHY_TXC1_BW_20MHZ
;
6537 bw
= rspec_get_bw(rspec
);
6538 /* 10Mhz is not supported yet */
6539 if (bw
< PHY_TXC1_BW_20MHZ
) {
6540 wiphy_err(wlc
->wiphy
, "phytxctl1_calc: bw %d is "
6541 "not supported yet, set to 20L\n", bw
);
6542 bw
= PHY_TXC1_BW_20MHZ
;
6546 if (is_mcs_rate(rspec
)) {
6547 uint mcs
= rspec
& RSPEC_RATE_MASK
;
6549 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6550 phyctl1
= rspec_phytxbyte2(rspec
);
6551 /* set the upper byte of phyctl1 */
6552 phyctl1
|= (mcs_table
[mcs
].tx_phy_ctl3
<< 8);
6553 } else if (is_cck_rate(rspec
) && !BRCMS_ISLCNPHY(wlc
->band
)
6554 && !BRCMS_ISSSLPNPHY(wlc
->band
)) {
6556 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6557 * Data Rate. Eventually MIMOPHY would also be converted to
6560 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6561 phyctl1
= (bw
| (rspec_stf(rspec
) << PHY_TXC1_MODE_SHIFT
));
6562 } else { /* legacy OFDM/CCK */
6564 /* get the phyctl byte from rate phycfg table */
6565 phycfg
= brcms_c_rate_legacy_phyctl(rspec2rate(rspec
));
6567 wiphy_err(wlc
->wiphy
, "phytxctl1_calc: wrong "
6568 "legacy OFDM/CCK rate\n");
6571 /* set the upper byte of phyctl1 */
6573 (bw
| (phycfg
<< 8) |
6574 (rspec_stf(rspec
) << PHY_TXC1_MODE_SHIFT
));
6580 * Add struct d11txh, struct cck_phy_hdr.
6582 * 'p' data must start with 802.11 MAC header
6583 * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6585 * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6589 brcms_c_d11hdrs_mac80211(struct brcms_c_info
*wlc
, struct ieee80211_hw
*hw
,
6590 struct sk_buff
*p
, struct scb
*scb
, uint frag
,
6591 uint nfrags
, uint queue
, uint next_frag_len
)
6593 struct ieee80211_hdr
*h
;
6595 u8
*plcp
, plcp_fallback
[D11_PHY_HDR_LEN
];
6596 int len
, phylen
, rts_phylen
;
6597 u16 mch
, phyctl
, xfts
, mainrates
;
6598 u16 seq
= 0, mcl
= 0, status
= 0, frameid
= 0;
6599 u32 rspec
[2] = { BRCM_RATE_1M
, BRCM_RATE_1M
};
6600 u32 rts_rspec
[2] = { BRCM_RATE_1M
, BRCM_RATE_1M
};
6601 bool use_rts
= false;
6602 bool use_cts
= false;
6603 bool use_rifs
= false;
6604 bool short_preamble
[2] = { false, false };
6605 u8 preamble_type
[2] = { BRCMS_LONG_PREAMBLE
, BRCMS_LONG_PREAMBLE
};
6606 u8 rts_preamble_type
[2] = { BRCMS_LONG_PREAMBLE
, BRCMS_LONG_PREAMBLE
};
6607 u8
*rts_plcp
, rts_plcp_fallback
[D11_PHY_HDR_LEN
];
6608 struct ieee80211_rts
*rts
= NULL
;
6611 bool hwtkmic
= false;
6612 u16 mimo_ctlchbw
= PHY_TXC1_BW_20MHZ
;
6613 #define ANTCFG_NONE 0xFF
6614 u8 antcfg
= ANTCFG_NONE
;
6615 u8 fbantcfg
= ANTCFG_NONE
;
6616 uint phyctl1_stf
= 0;
6618 struct ieee80211_tx_rate
*txrate
[2];
6620 struct ieee80211_tx_info
*tx_info
;
6623 u8 mimo_preamble_type
;
6625 /* locate 802.11 MAC header */
6626 h
= (struct ieee80211_hdr
*)(p
->data
);
6627 qos
= ieee80211_is_data_qos(h
->frame_control
);
6629 /* compute length of frame in bytes for use in PLCP computations */
6631 phylen
= len
+ FCS_LEN
;
6634 tx_info
= IEEE80211_SKB_CB(p
);
6637 plcp
= skb_push(p
, D11_PHY_HDR_LEN
);
6639 /* add Broadcom tx descriptor header */
6640 txh
= (struct d11txh
*) skb_push(p
, D11_TXH_LEN
);
6641 memset(txh
, 0, D11_TXH_LEN
);
6644 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
6645 /* non-AP STA should never use BCMC queue */
6646 if (queue
== TX_BCMC_FIFO
) {
6647 wiphy_err(wlc
->wiphy
, "wl%d: %s: ASSERT queue == "
6648 "TX_BCMC!\n", wlc
->pub
->unit
, __func__
);
6649 frameid
= bcmc_fid_generate(wlc
, NULL
, txh
);
6651 /* Increment the counter for first fragment */
6652 if (tx_info
->flags
& IEEE80211_TX_CTL_FIRST_FRAGMENT
)
6653 scb
->seqnum
[p
->priority
]++;
6655 /* extract fragment number from frame first */
6656 seq
= le16_to_cpu(h
->seq_ctrl
) & FRAGNUM_MASK
;
6657 seq
|= (scb
->seqnum
[p
->priority
] << SEQNUM_SHIFT
);
6658 h
->seq_ctrl
= cpu_to_le16(seq
);
6660 frameid
= ((seq
<< TXFID_SEQ_SHIFT
) & TXFID_SEQ_MASK
) |
6661 (queue
& TXFID_QUEUE_MASK
);
6664 frameid
|= queue
& TXFID_QUEUE_MASK
;
6666 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6667 if (ieee80211_is_beacon(h
->frame_control
))
6668 mcl
|= TXC_IGNOREPMQ
;
6670 txrate
[0] = tx_info
->control
.rates
;
6671 txrate
[1] = txrate
[0] + 1;
6674 * if rate control algorithm didn't give us a fallback
6675 * rate, use the primary rate
6677 if (txrate
[1]->idx
< 0)
6678 txrate
[1] = txrate
[0];
6680 for (k
= 0; k
< hw
->max_rates
; k
++) {
6681 is_mcs
= txrate
[k
]->flags
& IEEE80211_TX_RC_MCS
? true : false;
6683 if ((txrate
[k
]->idx
>= 0)
6684 && (txrate
[k
]->idx
<
6685 hw
->wiphy
->bands
[tx_info
->band
]->n_bitrates
)) {
6687 hw
->wiphy
->bands
[tx_info
->band
]->
6688 bitrates
[txrate
[k
]->idx
].hw_value
;
6691 flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
?
6694 rspec
[k
] = BRCM_RATE_1M
;
6697 rspec
[k
] = mac80211_wlc_set_nrate(wlc
, wlc
->band
,
6698 NRATE_MCS_INUSE
| txrate
[k
]->idx
);
6702 * Currently only support same setting for primay and
6703 * fallback rates. Unify flags for each rate into a
6704 * single value for the frame
6708 flags
& IEEE80211_TX_RC_USE_RTS_CTS
? true : false;
6711 flags
& IEEE80211_TX_RC_USE_CTS_PROTECT
? true : false;
6716 * determine and validate primary rate
6717 * and fallback rates
6719 if (!rspec_active(rspec
[k
])) {
6720 rspec
[k
] = BRCM_RATE_1M
;
6722 if (!is_multicast_ether_addr(h
->addr1
)) {
6723 /* set tx antenna config */
6724 brcms_c_antsel_antcfg_get(wlc
->asi
, false,
6725 false, 0, 0, &antcfg
, &fbantcfg
);
6730 phyctl1_stf
= wlc
->stf
->ss_opmode
;
6732 if (wlc
->pub
->_n_enab
& SUPPORT_11N
) {
6733 for (k
= 0; k
< hw
->max_rates
; k
++) {
6735 * apply siso/cdd to single stream mcs's or ofdm
6736 * if rspec is auto selected
6738 if (((is_mcs_rate(rspec
[k
]) &&
6739 is_single_stream(rspec
[k
] & RSPEC_RATE_MASK
)) ||
6740 is_ofdm_rate(rspec
[k
]))
6741 && ((rspec
[k
] & RSPEC_OVERRIDE_MCS_ONLY
)
6742 || !(rspec
[k
] & RSPEC_OVERRIDE
))) {
6743 rspec
[k
] &= ~(RSPEC_STF_MASK
| RSPEC_STC_MASK
);
6745 /* For SISO MCS use STBC if possible */
6746 if (is_mcs_rate(rspec
[k
])
6747 && BRCMS_STF_SS_STBC_TX(wlc
, scb
)) {
6750 /* Nss for single stream is always 1 */
6752 rspec
[k
] |= (PHY_TXC1_MODE_STBC
<<
6754 (stc
<< RSPEC_STC_SHIFT
);
6757 (phyctl1_stf
<< RSPEC_STF_SHIFT
);
6761 * Is the phy configured to use 40MHZ frames? If
6762 * so then pick the desired txbw
6764 if (brcms_chspec_bw(wlc
->chanspec
) == BRCMS_40_MHZ
) {
6765 /* default txbw is 20in40 SB */
6766 mimo_ctlchbw
= mimo_txbw
=
6767 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6769 ? PHY_TXC1_BW_20MHZ_UP
: PHY_TXC1_BW_20MHZ
;
6771 if (is_mcs_rate(rspec
[k
])) {
6772 /* mcs 32 must be 40b/w DUP */
6773 if ((rspec
[k
] & RSPEC_RATE_MASK
)
6776 PHY_TXC1_BW_40MHZ_DUP
;
6778 } else if (wlc
->mimo_40txbw
!= AUTO
)
6779 mimo_txbw
= wlc
->mimo_40txbw
;
6780 /* else check if dst is using 40 Mhz */
6781 else if (scb
->flags
& SCB_IS40
)
6782 mimo_txbw
= PHY_TXC1_BW_40MHZ
;
6783 } else if (is_ofdm_rate(rspec
[k
])) {
6784 if (wlc
->ofdm_40txbw
!= AUTO
)
6785 mimo_txbw
= wlc
->ofdm_40txbw
;
6786 } else if (wlc
->cck_40txbw
!= AUTO
) {
6787 mimo_txbw
= wlc
->cck_40txbw
;
6791 * mcs32 is 40 b/w only.
6792 * This is possible for probe packets on
6795 if ((rspec
[k
] & RSPEC_RATE_MASK
) == 32)
6797 rspec
[k
] = RSPEC_MIMORATE
;
6799 mimo_txbw
= PHY_TXC1_BW_20MHZ
;
6802 /* Set channel width */
6803 rspec
[k
] &= ~RSPEC_BW_MASK
;
6804 if ((k
== 0) || ((k
> 0) && is_mcs_rate(rspec
[k
])))
6805 rspec
[k
] |= (mimo_txbw
<< RSPEC_BW_SHIFT
);
6807 rspec
[k
] |= (mimo_ctlchbw
<< RSPEC_BW_SHIFT
);
6809 /* Disable short GI, not supported yet */
6810 rspec
[k
] &= ~RSPEC_SHORT_GI
;
6812 mimo_preamble_type
= BRCMS_MM_PREAMBLE
;
6813 if (txrate
[k
]->flags
& IEEE80211_TX_RC_GREEN_FIELD
)
6814 mimo_preamble_type
= BRCMS_GF_PREAMBLE
;
6816 if ((txrate
[k
]->flags
& IEEE80211_TX_RC_MCS
)
6817 && (!is_mcs_rate(rspec
[k
]))) {
6818 wiphy_err(wlc
->wiphy
, "wl%d: %s: IEEE80211_TX_"
6819 "RC_MCS != is_mcs_rate(rspec)\n",
6820 wlc
->pub
->unit
, __func__
);
6823 if (is_mcs_rate(rspec
[k
])) {
6824 preamble_type
[k
] = mimo_preamble_type
;
6827 * if SGI is selected, then forced mm
6830 if ((rspec
[k
] & RSPEC_SHORT_GI
)
6831 && is_single_stream(rspec
[k
] &
6833 preamble_type
[k
] = BRCMS_MM_PREAMBLE
;
6836 /* should be better conditionalized */
6837 if (!is_mcs_rate(rspec
[0])
6838 && (tx_info
->control
.rates
[0].
6839 flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
))
6840 preamble_type
[k
] = BRCMS_SHORT_PREAMBLE
;
6843 for (k
= 0; k
< hw
->max_rates
; k
++) {
6844 /* Set ctrlchbw as 20Mhz */
6845 rspec
[k
] &= ~RSPEC_BW_MASK
;
6846 rspec
[k
] |= (PHY_TXC1_BW_20MHZ
<< RSPEC_BW_SHIFT
);
6848 /* for nphy, stf of ofdm frames must follow policies */
6849 if (BRCMS_ISNPHY(wlc
->band
) && is_ofdm_rate(rspec
[k
])) {
6850 rspec
[k
] &= ~RSPEC_STF_MASK
;
6851 rspec
[k
] |= phyctl1_stf
<< RSPEC_STF_SHIFT
;
6856 /* Reset these for use with AMPDU's */
6857 txrate
[0]->count
= 0;
6858 txrate
[1]->count
= 0;
6860 /* (2) PROTECTION, may change rspec */
6861 if ((ieee80211_is_data(h
->frame_control
) ||
6862 ieee80211_is_mgmt(h
->frame_control
)) &&
6863 (phylen
> wlc
->RTSThresh
) && !is_multicast_ether_addr(h
->addr1
))
6866 /* (3) PLCP: determine PLCP header and MAC duration,
6867 * fill struct d11txh */
6868 brcms_c_compute_plcp(wlc
, rspec
[0], phylen
, plcp
);
6869 brcms_c_compute_plcp(wlc
, rspec
[1], phylen
, plcp_fallback
);
6870 memcpy(&txh
->FragPLCPFallback
,
6871 plcp_fallback
, sizeof(txh
->FragPLCPFallback
));
6873 /* Length field now put in CCK FBR CRC field */
6874 if (is_cck_rate(rspec
[1])) {
6875 txh
->FragPLCPFallback
[4] = phylen
& 0xff;
6876 txh
->FragPLCPFallback
[5] = (phylen
& 0xff00) >> 8;
6879 /* MIMO-RATE: need validation ?? */
6880 mainrates
= is_ofdm_rate(rspec
[0]) ?
6881 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr
*) plcp
) :
6884 /* DUR field for main rate */
6885 if (!ieee80211_is_pspoll(h
->frame_control
) &&
6886 !is_multicast_ether_addr(h
->addr1
) && !use_rifs
) {
6888 brcms_c_compute_frame_dur(wlc
, rspec
[0], preamble_type
[0],
6890 h
->duration_id
= cpu_to_le16(durid
);
6891 } else if (use_rifs
) {
6892 /* NAV protect to end of next max packet size */
6894 (u16
) brcms_c_calc_frame_time(wlc
, rspec
[0],
6896 DOT11_MAX_FRAG_LEN
);
6897 durid
+= RIFS_11N_TIME
;
6898 h
->duration_id
= cpu_to_le16(durid
);
6901 /* DUR field for fallback rate */
6902 if (ieee80211_is_pspoll(h
->frame_control
))
6903 txh
->FragDurFallback
= h
->duration_id
;
6904 else if (is_multicast_ether_addr(h
->addr1
) || use_rifs
)
6905 txh
->FragDurFallback
= 0;
6907 durid
= brcms_c_compute_frame_dur(wlc
, rspec
[1],
6908 preamble_type
[1], next_frag_len
);
6909 txh
->FragDurFallback
= cpu_to_le16(durid
);
6912 /* (4) MAC-HDR: MacTxControlLow */
6914 mcl
|= TXC_STARTMSDU
;
6916 if (!is_multicast_ether_addr(h
->addr1
))
6917 mcl
|= TXC_IMMEDACK
;
6919 if (wlc
->band
->bandtype
== BRCM_BAND_5G
)
6920 mcl
|= TXC_FREQBAND_5G
;
6922 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc
->band
->pi
)))
6925 /* set AMIC bit if using hardware TKIP MIC */
6929 txh
->MacTxControlLow
= cpu_to_le16(mcl
);
6931 /* MacTxControlHigh */
6934 /* Set fallback rate preamble type */
6935 if ((preamble_type
[1] == BRCMS_SHORT_PREAMBLE
) ||
6936 (preamble_type
[1] == BRCMS_GF_PREAMBLE
)) {
6937 if (rspec2rate(rspec
[1]) != BRCM_RATE_1M
)
6938 mch
|= TXC_PREAMBLE_DATA_FB_SHORT
;
6941 /* MacFrameControl */
6942 memcpy(&txh
->MacFrameControl
, &h
->frame_control
, sizeof(u16
));
6943 txh
->TxFesTimeNormal
= cpu_to_le16(0);
6945 txh
->TxFesTimeFallback
= cpu_to_le16(0);
6948 memcpy(&txh
->TxFrameRA
, &h
->addr1
, ETH_ALEN
);
6951 txh
->TxFrameID
= cpu_to_le16(frameid
);
6954 * TxStatus, Note the case of recreating the first frag of a suppressed
6955 * frame then we may need to reset the retry cnt's via the status reg
6957 txh
->TxStatus
= cpu_to_le16(status
);
6960 * extra fields for ucode AMPDU aggregation, the new fields are added to
6961 * the END of previous structure so that it's compatible in driver.
6963 txh
->MaxNMpdus
= cpu_to_le16(0);
6964 txh
->MaxABytes_MRT
= cpu_to_le16(0);
6965 txh
->MaxABytes_FBR
= cpu_to_le16(0);
6966 txh
->MinMBytes
= cpu_to_le16(0);
6968 /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
6969 * furnish struct d11txh */
6970 /* RTS PLCP header and RTS frame */
6971 if (use_rts
|| use_cts
) {
6972 if (use_rts
&& use_cts
)
6975 for (k
= 0; k
< 2; k
++) {
6976 rts_rspec
[k
] = brcms_c_rspec_to_rts_rspec(wlc
, rspec
[k
],
6981 if (!is_ofdm_rate(rts_rspec
[0]) &&
6982 !((rspec2rate(rts_rspec
[0]) == BRCM_RATE_1M
) ||
6983 (wlc
->PLCPHdr_override
== BRCMS_PLCP_LONG
))) {
6984 rts_preamble_type
[0] = BRCMS_SHORT_PREAMBLE
;
6985 mch
|= TXC_PREAMBLE_RTS_MAIN_SHORT
;
6988 if (!is_ofdm_rate(rts_rspec
[1]) &&
6989 !((rspec2rate(rts_rspec
[1]) == BRCM_RATE_1M
) ||
6990 (wlc
->PLCPHdr_override
== BRCMS_PLCP_LONG
))) {
6991 rts_preamble_type
[1] = BRCMS_SHORT_PREAMBLE
;
6992 mch
|= TXC_PREAMBLE_RTS_FB_SHORT
;
6995 /* RTS/CTS additions to MacTxControlLow */
6997 txh
->MacTxControlLow
|= cpu_to_le16(TXC_SENDCTS
);
6999 txh
->MacTxControlLow
|= cpu_to_le16(TXC_SENDRTS
);
7000 txh
->MacTxControlLow
|= cpu_to_le16(TXC_LONGFRAME
);
7003 /* RTS PLCP header */
7004 rts_plcp
= txh
->RTSPhyHeader
;
7006 rts_phylen
= DOT11_CTS_LEN
+ FCS_LEN
;
7008 rts_phylen
= DOT11_RTS_LEN
+ FCS_LEN
;
7010 brcms_c_compute_plcp(wlc
, rts_rspec
[0], rts_phylen
, rts_plcp
);
7012 /* fallback rate version of RTS PLCP header */
7013 brcms_c_compute_plcp(wlc
, rts_rspec
[1], rts_phylen
,
7015 memcpy(&txh
->RTSPLCPFallback
, rts_plcp_fallback
,
7016 sizeof(txh
->RTSPLCPFallback
));
7018 /* RTS frame fields... */
7019 rts
= (struct ieee80211_rts
*)&txh
->rts_frame
;
7021 durid
= brcms_c_compute_rtscts_dur(wlc
, use_cts
, rts_rspec
[0],
7022 rspec
[0], rts_preamble_type
[0],
7023 preamble_type
[0], phylen
, false);
7024 rts
->duration
= cpu_to_le16(durid
);
7025 /* fallback rate version of RTS DUR field */
7026 durid
= brcms_c_compute_rtscts_dur(wlc
, use_cts
,
7027 rts_rspec
[1], rspec
[1],
7028 rts_preamble_type
[1],
7029 preamble_type
[1], phylen
, false);
7030 txh
->RTSDurFallback
= cpu_to_le16(durid
);
7033 rts
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_CTL
|
7034 IEEE80211_STYPE_CTS
);
7036 memcpy(&rts
->ra
, &h
->addr2
, ETH_ALEN
);
7038 rts
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_CTL
|
7039 IEEE80211_STYPE_RTS
);
7041 memcpy(&rts
->ra
, &h
->addr1
, 2 * ETH_ALEN
);
7045 * low 8 bits: main frag rate/mcs,
7046 * high 8 bits: rts/cts rate/mcs
7048 mainrates
|= (is_ofdm_rate(rts_rspec
[0]) ?
7050 (struct ofdm_phy_hdr
*) rts_plcp
) :
7053 memset((char *)txh
->RTSPhyHeader
, 0, D11_PHY_HDR_LEN
);
7054 memset((char *)&txh
->rts_frame
, 0,
7055 sizeof(struct ieee80211_rts
));
7056 memset((char *)txh
->RTSPLCPFallback
, 0,
7057 sizeof(txh
->RTSPLCPFallback
));
7058 txh
->RTSDurFallback
= 0;
7061 #ifdef SUPPORT_40MHZ
7062 /* add null delimiter count */
7063 if ((tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) && is_mcs_rate(rspec
))
7064 txh
->RTSPLCPFallback
[AMPDU_FBR_NULL_DELIM
] =
7065 brcm_c_ampdu_null_delim_cnt(wlc
->ampdu
, scb
, rspec
, phylen
);
7070 * Now that RTS/RTS FB preamble types are updated, write
7073 txh
->MacTxControlHigh
= cpu_to_le16(mch
);
7076 * MainRates (both the rts and frag plcp rates have
7077 * been calculated now)
7079 txh
->MainRates
= cpu_to_le16(mainrates
);
7081 /* XtraFrameTypes */
7082 xfts
= frametype(rspec
[1], wlc
->mimoft
);
7083 xfts
|= (frametype(rts_rspec
[0], wlc
->mimoft
) << XFTS_RTS_FT_SHIFT
);
7084 xfts
|= (frametype(rts_rspec
[1], wlc
->mimoft
) << XFTS_FBRRTS_FT_SHIFT
);
7085 xfts
|= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc
->band
->pi
)) <<
7087 txh
->XtraFrameTypes
= cpu_to_le16(xfts
);
7089 /* PhyTxControlWord */
7090 phyctl
= frametype(rspec
[0], wlc
->mimoft
);
7091 if ((preamble_type
[0] == BRCMS_SHORT_PREAMBLE
) ||
7092 (preamble_type
[0] == BRCMS_GF_PREAMBLE
)) {
7093 if (rspec2rate(rspec
[0]) != BRCM_RATE_1M
)
7094 phyctl
|= PHY_TXC_SHORT_HDR
;
7097 /* phytxant is properly bit shifted */
7098 phyctl
|= brcms_c_stf_d11hdrs_phyctl_txant(wlc
, rspec
[0]);
7099 txh
->PhyTxControlWord
= cpu_to_le16(phyctl
);
7101 /* PhyTxControlWord_1 */
7102 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
7105 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rspec
[0]);
7106 txh
->PhyTxControlWord_1
= cpu_to_le16(phyctl1
);
7107 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rspec
[1]);
7108 txh
->PhyTxControlWord_1_Fbr
= cpu_to_le16(phyctl1
);
7110 if (use_rts
|| use_cts
) {
7111 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rts_rspec
[0]);
7112 txh
->PhyTxControlWord_1_Rts
= cpu_to_le16(phyctl1
);
7113 phyctl1
= brcms_c_phytxctl1_calc(wlc
, rts_rspec
[1]);
7114 txh
->PhyTxControlWord_1_FbrRts
= cpu_to_le16(phyctl1
);
7118 * For mcs frames, if mixedmode(overloaded with long preamble)
7119 * is going to be set, fill in non-zero MModeLen and/or
7120 * MModeFbrLen it will be unnecessary if they are separated
7122 if (is_mcs_rate(rspec
[0]) &&
7123 (preamble_type
[0] == BRCMS_MM_PREAMBLE
)) {
7125 brcms_c_calc_lsig_len(wlc
, rspec
[0], phylen
);
7126 txh
->MModeLen
= cpu_to_le16(mmodelen
);
7129 if (is_mcs_rate(rspec
[1]) &&
7130 (preamble_type
[1] == BRCMS_MM_PREAMBLE
)) {
7132 brcms_c_calc_lsig_len(wlc
, rspec
[1], phylen
);
7133 txh
->MModeFbrLen
= cpu_to_le16(mmodefbrlen
);
7137 ac
= skb_get_queue_mapping(p
);
7138 if ((scb
->flags
& SCB_WMECAP
) && qos
&& wlc
->edcf_txop
[ac
]) {
7139 uint frag_dur
, dur
, dur_fallback
;
7141 /* WME: Update TXOP threshold */
7142 if (!(tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) && frag
== 0) {
7144 brcms_c_calc_frame_time(wlc
, rspec
[0],
7145 preamble_type
[0], phylen
);
7148 /* 1 RTS or CTS-to-self frame */
7150 brcms_c_calc_cts_time(wlc
, rts_rspec
[0],
7151 rts_preamble_type
[0]);
7153 brcms_c_calc_cts_time(wlc
, rts_rspec
[1],
7154 rts_preamble_type
[1]);
7155 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7156 dur
+= le16_to_cpu(rts
->duration
);
7158 le16_to_cpu(txh
->RTSDurFallback
);
7159 } else if (use_rifs
) {
7163 /* frame + SIFS + ACK */
7166 brcms_c_compute_frame_dur(wlc
, rspec
[0],
7167 preamble_type
[0], 0);
7170 brcms_c_calc_frame_time(wlc
, rspec
[1],
7174 brcms_c_compute_frame_dur(wlc
, rspec
[1],
7175 preamble_type
[1], 0);
7177 /* NEED to set TxFesTimeNormal (hard) */
7178 txh
->TxFesTimeNormal
= cpu_to_le16((u16
) dur
);
7180 * NEED to set fallback rate version of
7181 * TxFesTimeNormal (hard)
7183 txh
->TxFesTimeFallback
=
7184 cpu_to_le16((u16
) dur_fallback
);
7187 * update txop byte threshold (txop minus intraframe
7190 if (wlc
->edcf_txop
[ac
] >= (dur
- frag_dur
)) {
7194 brcms_c_calc_frame_len(wlc
,
7195 rspec
[0], preamble_type
[0],
7196 (wlc
->edcf_txop
[ac
] -
7198 /* range bound the fragthreshold */
7199 if (newfragthresh
< DOT11_MIN_FRAG_LEN
)
7202 else if (newfragthresh
>
7203 wlc
->usr_fragthresh
)
7205 wlc
->usr_fragthresh
;
7206 /* update the fragthresh and do txc update */
7207 if (wlc
->fragthresh
[queue
] !=
7208 (u16
) newfragthresh
)
7209 wlc
->fragthresh
[queue
] =
7210 (u16
) newfragthresh
;
7212 wiphy_err(wlc
->wiphy
, "wl%d: %s txop invalid "
7214 wlc
->pub
->unit
, fifo_names
[queue
],
7215 rspec2rate(rspec
[0]));
7218 if (dur
> wlc
->edcf_txop
[ac
])
7219 wiphy_err(wlc
->wiphy
, "wl%d: %s: %s txop "
7220 "exceeded phylen %d/%d dur %d/%d\n",
7221 wlc
->pub
->unit
, __func__
,
7223 phylen
, wlc
->fragthresh
[queue
],
7224 dur
, wlc
->edcf_txop
[ac
]);
7231 void brcms_c_sendpkt_mac80211(struct brcms_c_info
*wlc
, struct sk_buff
*sdu
,
7232 struct ieee80211_hw
*hw
)
7236 struct scb
*scb
= &wlc
->pri_scb
;
7237 struct ieee80211_hdr
*d11_header
= (struct ieee80211_hdr
*)(sdu
->data
);
7240 * 802.11 standard requires management traffic
7241 * to go at highest priority
7243 prio
= ieee80211_is_data(d11_header
->frame_control
) ? sdu
->priority
:
7245 fifo
= prio2fifo
[prio
];
7246 if (brcms_c_d11hdrs_mac80211(wlc
, hw
, sdu
, scb
, 0, 1, fifo
, 0))
7248 brcms_c_txq_enq(wlc
, scb
, sdu
, BRCMS_PRIO_TO_PREC(prio
));
7249 brcms_c_send_q(wlc
);
7252 void brcms_c_send_q(struct brcms_c_info
*wlc
)
7254 struct sk_buff
*pkt
[DOT11_MAXNUMFRAGS
];
7257 int err
= 0, i
, count
;
7259 struct brcms_txq_info
*qi
= wlc
->pkt_queue
;
7260 struct pktq
*q
= &qi
->q
;
7261 struct ieee80211_tx_info
*tx_info
;
7263 prec_map
= wlc
->tx_prec_map
;
7265 /* Send all the enq'd pkts that we can.
7266 * Dequeue packets with precedence with empty HW fifo only
7268 while (prec_map
&& (pkt
[0] = brcmu_pktq_mdeq(q
, prec_map
, &prec
))) {
7269 tx_info
= IEEE80211_SKB_CB(pkt
[0]);
7270 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) {
7271 err
= brcms_c_sendampdu(wlc
->ampdu
, qi
, pkt
, prec
);
7274 err
= brcms_c_prep_pdu(wlc
, pkt
[0], &fifo
);
7276 for (i
= 0; i
< count
; i
++)
7277 brcms_c_txfifo(wlc
, fifo
, pkt
[i
], true,
7282 if (err
== -EBUSY
) {
7283 brcmu_pktq_penq_head(q
, prec
, pkt
[0]);
7285 * If send failed due to any other reason than a
7286 * change in HW FIFO condition, quit. Otherwise,
7287 * read the new prec_map!
7289 if (prec_map
== wlc
->tx_prec_map
)
7291 prec_map
= wlc
->tx_prec_map
;
7297 brcms_c_txfifo(struct brcms_c_info
*wlc
, uint fifo
, struct sk_buff
*p
,
7298 bool commit
, s8 txpktpend
)
7300 u16 frameid
= INVALIDFID
;
7303 txh
= (struct d11txh
*) (p
->data
);
7305 /* When a BC/MC frame is being committed to the BCMC fifo
7306 * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7308 if (fifo
== TX_BCMC_FIFO
)
7309 frameid
= le16_to_cpu(txh
->TxFrameID
);
7312 * Bump up pending count for if not using rpc. If rpc is
7313 * used, this will be handled in brcms_b_txfifo()
7316 wlc
->core
->txpktpend
[fifo
] += txpktpend
;
7317 BCMMSG(wlc
->wiphy
, "pktpend inc %d to %d\n",
7318 txpktpend
, wlc
->core
->txpktpend
[fifo
]);
7321 /* Commit BCMC sequence number in the SHM frame ID location */
7322 if (frameid
!= INVALIDFID
) {
7324 * To inform the ucode of the last mcast frame posted
7325 * so that it can clear moredata bit
7327 brcms_b_write_shm(wlc
->hw
, M_BCMC_FID
, frameid
);
7330 if (dma_txfast(wlc
->hw
->di
[fifo
], p
, commit
) < 0)
7331 wiphy_err(wlc
->wiphy
, "txfifo: fatal, toss frames !!!\n");
7335 brcms_c_rspec_to_rts_rspec(struct brcms_c_info
*wlc
, u32 rspec
,
7336 bool use_rspec
, u16 mimo_ctlchbw
)
7341 /* use frame rate as rts rate */
7343 else if (wlc
->band
->gmode
&& wlc
->protection
->_g
&& !is_cck_rate(rspec
))
7344 /* Use 11Mbps as the g protection RTS target rate and fallback.
7345 * Use the brcms_basic_rate() lookup to find the best basic rate
7346 * under the target in case 11 Mbps is not Basic.
7347 * 6 and 9 Mbps are not usually selected by rate selection, but
7348 * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7351 rts_rspec
= brcms_basic_rate(wlc
, BRCM_RATE_11M
);
7353 /* calculate RTS rate and fallback rate based on the frame rate
7354 * RTS must be sent at a basic rate since it is a
7355 * control frame, sec 9.6 of 802.11 spec
7357 rts_rspec
= brcms_basic_rate(wlc
, rspec
);
7359 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
7360 /* set rts txbw to correct side band */
7361 rts_rspec
&= ~RSPEC_BW_MASK
;
7364 * if rspec/rspec_fallback is 40MHz, then send RTS on both
7365 * 20MHz channel (DUP), otherwise send RTS on control channel
7367 if (rspec_is40mhz(rspec
) && !is_cck_rate(rts_rspec
))
7368 rts_rspec
|= (PHY_TXC1_BW_40MHZ_DUP
<< RSPEC_BW_SHIFT
);
7370 rts_rspec
|= (mimo_ctlchbw
<< RSPEC_BW_SHIFT
);
7372 /* pick siso/cdd as default for ofdm */
7373 if (is_ofdm_rate(rts_rspec
)) {
7374 rts_rspec
&= ~RSPEC_STF_MASK
;
7375 rts_rspec
|= (wlc
->stf
->ss_opmode
<< RSPEC_STF_SHIFT
);
7382 brcms_c_txfifo_complete(struct brcms_c_info
*wlc
, uint fifo
, s8 txpktpend
)
7384 wlc
->core
->txpktpend
[fifo
] -= txpktpend
;
7385 BCMMSG(wlc
->wiphy
, "pktpend dec %d to %d\n", txpktpend
,
7386 wlc
->core
->txpktpend
[fifo
]);
7388 /* There is more room; mark precedences related to this FIFO sendable */
7389 wlc
->tx_prec_map
|= wlc
->fifo2prec_map
[fifo
];
7391 /* figure out which bsscfg is being worked on... */
7394 /* Update beacon listen interval in shared memory */
7395 static void brcms_c_bcn_li_upd(struct brcms_c_info
*wlc
)
7397 /* wake up every DTIM is the default */
7398 if (wlc
->bcn_li_dtim
== 1)
7399 brcms_b_write_shm(wlc
->hw
, M_BCN_LI
, 0);
7401 brcms_b_write_shm(wlc
->hw
, M_BCN_LI
,
7402 (wlc
->bcn_li_dtim
<< 8) | wlc
->bcn_li_bcn
);
7406 brcms_b_read_tsf(struct brcms_hardware
*wlc_hw
, u32
*tsf_l_ptr
,
7409 struct bcma_device
*core
= wlc_hw
->d11core
;
7411 /* read the tsf timer low, then high to get an atomic read */
7412 *tsf_l_ptr
= bcma_read32(core
, D11REGOFFS(tsf_timerlow
));
7413 *tsf_h_ptr
= bcma_read32(core
, D11REGOFFS(tsf_timerhigh
));
7417 * recover 64bit TSF value from the 16bit TSF value in the rx header
7418 * given the assumption that the TSF passed in header is within 65ms
7419 * of the current tsf.
7422 * 3.......6.......8.......0.......2.......4.......6.......8......0
7423 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7425 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7426 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7427 * receive call sequence after rx interrupt. Only the higher 16 bits
7428 * are used. Finally, the tsf_h is read from the tsf register.
7430 static u64
brcms_c_recover_tsf64(struct brcms_c_info
*wlc
,
7431 struct d11rxhdr
*rxh
)
7434 u16 rx_tsf_0_15
, rx_tsf_16_31
;
7436 brcms_b_read_tsf(wlc
->hw
, &tsf_l
, &tsf_h
);
7438 rx_tsf_16_31
= (u16
)(tsf_l
>> 16);
7439 rx_tsf_0_15
= rxh
->RxTSFTime
;
7442 * a greater tsf time indicates the low 16 bits of
7443 * tsf_l wrapped, so decrement the high 16 bits.
7445 if ((u16
)tsf_l
< rx_tsf_0_15
) {
7447 if (rx_tsf_16_31
== 0xffff)
7451 return ((u64
)tsf_h
<< 32) | (((u32
)rx_tsf_16_31
<< 16) + rx_tsf_0_15
);
7455 prep_mac80211_status(struct brcms_c_info
*wlc
, struct d11rxhdr
*rxh
,
7457 struct ieee80211_rx_status
*rx_status
)
7462 unsigned char *plcp
;
7464 /* fill in TSF and flag its presence */
7465 rx_status
->mactime
= brcms_c_recover_tsf64(wlc
, rxh
);
7466 rx_status
->flag
|= RX_FLAG_MACTIME_MPDU
;
7468 channel
= BRCMS_CHAN_CHANNEL(rxh
->RxChan
);
7471 rx_status
->band
= IEEE80211_BAND_5GHZ
;
7472 rx_status
->freq
= ieee80211_ofdm_chan_to_freq(
7473 WF_CHAN_FACTOR_5_G
/2, channel
);
7476 rx_status
->band
= IEEE80211_BAND_2GHZ
;
7477 rx_status
->freq
= ieee80211_dsss_chan_to_freq(channel
);
7480 rx_status
->signal
= wlc_phy_rssi_compute(wlc
->hw
->band
->pi
, rxh
);
7484 rx_status
->antenna
=
7485 (rxh
->PhyRxStatus_0
& PRXS0_RXANT_UPSUBBAND
) ? 1 : 0;
7489 rspec
= brcms_c_compute_rspec(rxh
, plcp
);
7490 if (is_mcs_rate(rspec
)) {
7491 rx_status
->rate_idx
= rspec
& RSPEC_RATE_MASK
;
7492 rx_status
->flag
|= RX_FLAG_HT
;
7493 if (rspec_is40mhz(rspec
))
7494 rx_status
->flag
|= RX_FLAG_40MHZ
;
7496 switch (rspec2rate(rspec
)) {
7498 rx_status
->rate_idx
= 0;
7501 rx_status
->rate_idx
= 1;
7504 rx_status
->rate_idx
= 2;
7507 rx_status
->rate_idx
= 3;
7510 rx_status
->rate_idx
= 4;
7513 rx_status
->rate_idx
= 5;
7516 rx_status
->rate_idx
= 6;
7519 rx_status
->rate_idx
= 7;
7522 rx_status
->rate_idx
= 8;
7525 rx_status
->rate_idx
= 9;
7528 rx_status
->rate_idx
= 10;
7531 rx_status
->rate_idx
= 11;
7534 wiphy_err(wlc
->wiphy
, "%s: Unknown rate\n", __func__
);
7538 * For 5GHz, we should decrease the index as it is
7539 * a subset of the 2.4G rates. See bitrates field
7540 * of brcms_band_5GHz_nphy (in mac80211_if.c).
7542 if (rx_status
->band
== IEEE80211_BAND_5GHZ
)
7543 rx_status
->rate_idx
-= BRCMS_LEGACY_5G_RATE_OFFSET
;
7545 /* Determine short preamble and rate_idx */
7547 if (is_cck_rate(rspec
)) {
7548 if (rxh
->PhyRxStatus_0
& PRXS0_SHORTH
)
7549 rx_status
->flag
|= RX_FLAG_SHORTPRE
;
7550 } else if (is_ofdm_rate(rspec
)) {
7551 rx_status
->flag
|= RX_FLAG_SHORTPRE
;
7553 wiphy_err(wlc
->wiphy
, "%s: Unknown modulation\n",
7558 if (plcp3_issgi(plcp
[3]))
7559 rx_status
->flag
|= RX_FLAG_SHORT_GI
;
7561 if (rxh
->RxStatus1
& RXS_DECERR
) {
7562 rx_status
->flag
|= RX_FLAG_FAILED_PLCP_CRC
;
7563 wiphy_err(wlc
->wiphy
, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
7566 if (rxh
->RxStatus1
& RXS_FCSERR
) {
7567 rx_status
->flag
|= RX_FLAG_FAILED_FCS_CRC
;
7568 wiphy_err(wlc
->wiphy
, "%s: RX_FLAG_FAILED_FCS_CRC\n",
7574 brcms_c_recvctl(struct brcms_c_info
*wlc
, struct d11rxhdr
*rxh
,
7578 struct ieee80211_rx_status rx_status
;
7579 struct ieee80211_hdr
*hdr
;
7581 memset(&rx_status
, 0, sizeof(rx_status
));
7582 prep_mac80211_status(wlc
, rxh
, p
, &rx_status
);
7584 /* mac header+body length, exclude CRC and plcp header */
7585 len_mpdu
= p
->len
- D11_PHY_HDR_LEN
- FCS_LEN
;
7586 skb_pull(p
, D11_PHY_HDR_LEN
);
7587 __skb_trim(p
, len_mpdu
);
7589 /* unmute transmit */
7590 if (wlc
->hw
->suspended_fifos
) {
7591 hdr
= (struct ieee80211_hdr
*)p
->data
;
7592 if (ieee80211_is_beacon(hdr
->frame_control
))
7593 brcms_b_mute(wlc
->hw
, false);
7596 memcpy(IEEE80211_SKB_RXCB(p
), &rx_status
, sizeof(rx_status
));
7597 ieee80211_rx_irqsafe(wlc
->pub
->ieee_hw
, p
);
7600 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7601 * number of bytes goes in the length field
7603 * Formula given by HT PHY Spec v 1.13
7604 * len = 3(nsyms + nstream + 3) - 3
7607 brcms_c_calc_lsig_len(struct brcms_c_info
*wlc
, u32 ratespec
,
7610 uint nsyms
, len
= 0, kNdps
;
7612 BCMMSG(wlc
->wiphy
, "wl%d: rate %d, len%d\n",
7613 wlc
->pub
->unit
, rspec2rate(ratespec
), mac_len
);
7615 if (is_mcs_rate(ratespec
)) {
7616 uint mcs
= ratespec
& RSPEC_RATE_MASK
;
7617 int tot_streams
= (mcs_2_txstreams(mcs
) + 1) +
7618 rspec_stc(ratespec
);
7621 * the payload duration calculation matches that
7624 /* 1000Ndbps = kbps * 4 */
7625 kNdps
= mcs_2_rate(mcs
, rspec_is40mhz(ratespec
),
7626 rspec_issgi(ratespec
)) * 4;
7628 if (rspec_stc(ratespec
) == 0)
7630 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
7631 APHY_TAIL_NBITS
) * 1000, kNdps
);
7633 /* STBC needs to have even number of symbols */
7636 CEIL((APHY_SERVICE_NBITS
+ 8 * mac_len
+
7637 APHY_TAIL_NBITS
) * 1000, 2 * kNdps
);
7639 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7640 nsyms
+= (tot_streams
+ 3);
7642 * 3 bytes/symbol @ legacy 6Mbps rate
7643 * (-3) excluding service bits and tail bits
7645 len
= (3 * nsyms
) - 3;
7652 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info
*wlc
, uint frame_len
)
7654 const struct brcms_c_rateset
*rs_dflt
;
7655 struct brcms_c_rateset rs
;
7658 u8 plcp
[D11_PHY_HDR_LEN
];
7662 sifs
= get_sifs(wlc
->band
);
7664 rs_dflt
= brcms_c_rateset_get_hwrs(wlc
);
7666 brcms_c_rateset_copy(rs_dflt
, &rs
);
7667 brcms_c_rateset_mcs_upd(&rs
, wlc
->stf
->txstreams
);
7670 * walk the phy rate table and update MAC core SHM
7671 * basic rate table entries
7673 for (i
= 0; i
< rs
.count
; i
++) {
7674 rate
= rs
.rates
[i
] & BRCMS_RATE_MASK
;
7676 entry_ptr
= brcms_b_rate_shm_offset(wlc
->hw
, rate
);
7678 /* Calculate the Probe Response PLCP for the given rate */
7679 brcms_c_compute_plcp(wlc
, rate
, frame_len
, plcp
);
7682 * Calculate the duration of the Probe Response
7683 * frame plus SIFS for the MAC
7685 dur
= (u16
) brcms_c_calc_frame_time(wlc
, rate
,
7686 BRCMS_LONG_PREAMBLE
, frame_len
);
7689 /* Update the SHM Rate Table entry Probe Response values */
7690 brcms_b_write_shm(wlc
->hw
, entry_ptr
+ M_RT_PRS_PLCP_POS
,
7691 (u16
) (plcp
[0] + (plcp
[1] << 8)));
7692 brcms_b_write_shm(wlc
->hw
, entry_ptr
+ M_RT_PRS_PLCP_POS
+ 2,
7693 (u16
) (plcp
[2] + (plcp
[3] << 8)));
7694 brcms_b_write_shm(wlc
->hw
, entry_ptr
+ M_RT_PRS_DUR_POS
, dur
);
7698 /* Max buffering needed for beacon template/prb resp template is 142 bytes.
7700 * PLCP header is 6 bytes.
7701 * 802.11 A3 header is 24 bytes.
7702 * Max beacon frame body template length is 112 bytes.
7703 * Max probe resp frame body template length is 110 bytes.
7705 * *len on input contains the max length of the packet available.
7707 * The *len value is set to the number of bytes in buf used, and starts
7708 * with the PLCP and included up to, but not including, the 4 byte FCS.
7711 brcms_c_bcn_prb_template(struct brcms_c_info
*wlc
, u16 type
,
7713 struct brcms_bss_cfg
*cfg
, u16
*buf
, int *len
)
7715 static const u8 ether_bcast
[ETH_ALEN
] = {255, 255, 255, 255, 255, 255};
7716 struct cck_phy_hdr
*plcp
;
7717 struct ieee80211_mgmt
*h
;
7718 int hdr_len
, body_len
;
7720 hdr_len
= D11_PHY_HDR_LEN
+ DOT11_MAC_HDR_LEN
;
7722 /* calc buffer size provided for frame body */
7723 body_len
= *len
- hdr_len
;
7724 /* return actual size */
7725 *len
= hdr_len
+ body_len
;
7727 /* format PHY and MAC headers */
7728 memset((char *)buf
, 0, hdr_len
);
7730 plcp
= (struct cck_phy_hdr
*) buf
;
7733 * PLCP for Probe Response frames are filled in from
7736 if (type
== IEEE80211_STYPE_BEACON
)
7738 brcms_c_compute_plcp(wlc
, bcn_rspec
,
7739 (DOT11_MAC_HDR_LEN
+ body_len
+ FCS_LEN
),
7742 /* "Regular" and 16 MBSS but not for 4 MBSS */
7743 /* Update the phytxctl for the beacon based on the rspec */
7744 brcms_c_beacon_phytxctl_txant_upd(wlc
, bcn_rspec
);
7746 h
= (struct ieee80211_mgmt
*)&plcp
[1];
7748 /* fill in 802.11 header */
7749 h
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_MGMT
| type
);
7751 /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
7752 /* A1 filled in by MAC for prb resp, broadcast for bcn */
7753 if (type
== IEEE80211_STYPE_BEACON
)
7754 memcpy(&h
->da
, ðer_bcast
, ETH_ALEN
);
7755 memcpy(&h
->sa
, &cfg
->cur_etheraddr
, ETH_ALEN
);
7756 memcpy(&h
->bssid
, &cfg
->BSSID
, ETH_ALEN
);
7758 /* SEQ filled in by MAC */
7761 int brcms_c_get_header_len(void)
7767 * Update all beacons for the system.
7769 void brcms_c_update_beacon(struct brcms_c_info
*wlc
)
7771 struct brcms_bss_cfg
*bsscfg
= wlc
->bsscfg
;
7773 if (bsscfg
->up
&& !bsscfg
->BSS
)
7774 /* Clear the soft intmask */
7775 wlc
->defmacintmask
&= ~MI_BCNTPL
;
7778 /* Write ssid into shared memory */
7780 brcms_c_shm_ssid_upd(struct brcms_c_info
*wlc
, struct brcms_bss_cfg
*cfg
)
7782 u8
*ssidptr
= cfg
->SSID
;
7784 u8 ssidbuf
[IEEE80211_MAX_SSID_LEN
];
7786 /* padding the ssid with zero and copy it into shm */
7787 memset(ssidbuf
, 0, IEEE80211_MAX_SSID_LEN
);
7788 memcpy(ssidbuf
, ssidptr
, cfg
->SSID_len
);
7790 brcms_c_copyto_shm(wlc
, base
, ssidbuf
, IEEE80211_MAX_SSID_LEN
);
7791 brcms_b_write_shm(wlc
->hw
, M_SSIDLEN
, (u16
) cfg
->SSID_len
);
7795 brcms_c_bss_update_probe_resp(struct brcms_c_info
*wlc
,
7796 struct brcms_bss_cfg
*cfg
,
7799 u16 prb_resp
[BCN_TMPL_LEN
/ 2];
7800 int len
= BCN_TMPL_LEN
;
7803 * write the probe response to hardware, or save in
7804 * the config structure
7807 /* create the probe response template */
7808 brcms_c_bcn_prb_template(wlc
, IEEE80211_STYPE_PROBE_RESP
, 0,
7809 cfg
, prb_resp
, &len
);
7812 brcms_c_suspend_mac_and_wait(wlc
);
7814 /* write the probe response into the template region */
7815 brcms_b_write_template_ram(wlc
->hw
, T_PRS_TPL_BASE
,
7816 (len
+ 3) & ~3, prb_resp
);
7818 /* write the length of the probe response frame (+PLCP/-FCS) */
7819 brcms_b_write_shm(wlc
->hw
, M_PRB_RESP_FRM_LEN
, (u16
) len
);
7821 /* write the SSID and SSID length */
7822 brcms_c_shm_ssid_upd(wlc
, cfg
);
7825 * Write PLCP headers and durations for probe response frames
7826 * at all rates. Use the actual frame length covered by the
7827 * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
7828 * by subtracting the PLCP len and adding the FCS.
7830 len
+= (-D11_PHY_HDR_LEN
+ FCS_LEN
);
7831 brcms_c_mod_prb_rsp_rate_table(wlc
, (u16
) len
);
7834 brcms_c_enable_mac(wlc
);
7837 void brcms_c_update_probe_resp(struct brcms_c_info
*wlc
, bool suspend
)
7839 struct brcms_bss_cfg
*bsscfg
= wlc
->bsscfg
;
7841 /* update AP or IBSS probe responses */
7842 if (bsscfg
->up
&& !bsscfg
->BSS
)
7843 brcms_c_bss_update_probe_resp(wlc
, bsscfg
, suspend
);
7846 /* prepares pdu for transmission. returns BCM error codes */
7847 int brcms_c_prep_pdu(struct brcms_c_info
*wlc
, struct sk_buff
*pdu
, uint
*fifop
)
7851 struct ieee80211_hdr
*h
;
7854 txh
= (struct d11txh
*) (pdu
->data
);
7855 h
= (struct ieee80211_hdr
*)((u8
*) (txh
+ 1) + D11_PHY_HDR_LEN
);
7857 /* get the pkt queue info. This was put at brcms_c_sendctl or
7858 * brcms_c_send for PDU */
7859 fifo
= le16_to_cpu(txh
->TxFrameID
) & TXFID_QUEUE_MASK
;
7865 /* return if insufficient dma resources */
7866 if (*wlc
->core
->txavail
[fifo
] < MAX_DMA_SEGS
) {
7867 /* Mark precedences related to this FIFO, unsendable */
7868 /* A fifo is full. Clear precedences related to that FIFO */
7869 wlc
->tx_prec_map
&= ~(wlc
->fifo2prec_map
[fifo
]);
7875 int brcms_b_xmtfifo_sz_get(struct brcms_hardware
*wlc_hw
, uint fifo
,
7881 *blocks
= wlc_hw
->xmtfifo_sz
[fifo
];
7887 brcms_c_set_addrmatch(struct brcms_c_info
*wlc
, int match_reg_offset
,
7890 brcms_b_set_addrmatch(wlc
->hw
, match_reg_offset
, addr
);
7891 if (match_reg_offset
== RCM_BSSID_OFFSET
)
7892 memcpy(wlc
->bsscfg
->BSSID
, addr
, ETH_ALEN
);
7896 * Flag 'scan in progress' to withhold dynamic phy calibration
7898 void brcms_c_scan_start(struct brcms_c_info
*wlc
)
7900 wlc_phy_hold_upd(wlc
->band
->pi
, PHY_HOLD_FOR_SCAN
, true);
7903 void brcms_c_scan_stop(struct brcms_c_info
*wlc
)
7905 wlc_phy_hold_upd(wlc
->band
->pi
, PHY_HOLD_FOR_SCAN
, false);
7908 void brcms_c_associate_upd(struct brcms_c_info
*wlc
, bool state
)
7910 wlc
->pub
->associated
= state
;
7911 wlc
->bsscfg
->associated
= state
;
7915 * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
7916 * AMPDU traffic, packets pending in hardware have to be invalidated so that
7917 * when later on hardware releases them, they can be handled appropriately.
7919 void brcms_c_inval_dma_pkts(struct brcms_hardware
*hw
,
7920 struct ieee80211_sta
*sta
,
7921 void (*dma_callback_fn
))
7923 struct dma_pub
*dmah
;
7925 for (i
= 0; i
< NFIFO
; i
++) {
7928 dma_walk_packets(dmah
, dma_callback_fn
, sta
);
7932 int brcms_c_get_curband(struct brcms_c_info
*wlc
)
7934 return wlc
->band
->bandunit
;
7937 void brcms_c_wait_for_tx_completion(struct brcms_c_info
*wlc
, bool drop
)
7941 /* flush packet queue when requested */
7943 brcmu_pktq_flush(&wlc
->pkt_queue
->q
, false, NULL
, NULL
);
7945 /* wait for queue and DMA fifos to run dry */
7946 while (!pktq_empty(&wlc
->pkt_queue
->q
) || brcms_txpktpendtot(wlc
) > 0) {
7947 brcms_msleep(wlc
->wl
, 1);
7953 WARN_ON_ONCE(timeout
== 0);
7956 void brcms_c_set_beacon_listen_interval(struct brcms_c_info
*wlc
, u8 interval
)
7958 wlc
->bcn_li_bcn
= interval
;
7960 brcms_c_bcn_li_upd(wlc
);
7963 int brcms_c_set_tx_power(struct brcms_c_info
*wlc
, int txpwr
)
7967 /* Remove override bit and clip to max qdbm value */
7968 qdbm
= min_t(uint
, txpwr
* BRCMS_TXPWR_DB_FACTOR
, 0xff);
7969 return wlc_phy_txpower_set(wlc
->band
->pi
, qdbm
, false);
7972 int brcms_c_get_tx_power(struct brcms_c_info
*wlc
)
7977 wlc_phy_txpower_get(wlc
->band
->pi
, &qdbm
, &override
);
7979 /* Return qdbm units */
7980 return (int)(qdbm
/ BRCMS_TXPWR_DB_FACTOR
);
7983 /* Process received frames */
7985 * Return true if more frames need to be processed. false otherwise.
7986 * Param 'bound' indicates max. # frames to process before break out.
7988 static void brcms_c_recv(struct brcms_c_info
*wlc
, struct sk_buff
*p
)
7990 struct d11rxhdr
*rxh
;
7991 struct ieee80211_hdr
*h
;
7995 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
7997 /* frame starts with rxhdr */
7998 rxh
= (struct d11rxhdr
*) (p
->data
);
8000 /* strip off rxhdr */
8001 skb_pull(p
, BRCMS_HWRXOFF
);
8003 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8004 if (rxh
->RxStatus1
& RXS_PBPRES
) {
8006 wiphy_err(wlc
->wiphy
, "wl%d: recv: rcvd runt of "
8007 "len %d\n", wlc
->pub
->unit
, p
->len
);
8013 h
= (struct ieee80211_hdr
*)(p
->data
+ D11_PHY_HDR_LEN
);
8016 if (rxh
->RxStatus1
& RXS_FCSERR
) {
8017 if (!(wlc
->filter_flags
& FIF_FCSFAIL
))
8021 /* check received pkt has at least frame control field */
8022 if (len
< D11_PHY_HDR_LEN
+ sizeof(h
->frame_control
))
8025 /* not supporting A-MSDU */
8026 is_amsdu
= rxh
->RxStatus2
& RXS_AMSDU_MASK
;
8030 brcms_c_recvctl(wlc
, rxh
, p
);
8034 brcmu_pkt_buf_free_skb(p
);
8037 /* Process received frames */
8039 * Return true if more frames need to be processed. false otherwise.
8040 * Param 'bound' indicates max. # frames to process before break out.
8043 brcms_b_recv(struct brcms_hardware
*wlc_hw
, uint fifo
, bool bound
)
8046 struct sk_buff
*next
= NULL
;
8047 struct sk_buff_head recv_frames
;
8050 uint bound_limit
= bound
? RXBND
: -1;
8052 BCMMSG(wlc_hw
->wlc
->wiphy
, "wl%d\n", wlc_hw
->unit
);
8053 skb_queue_head_init(&recv_frames
);
8055 /* gather received frames */
8056 while (dma_rx(wlc_hw
->di
[fifo
], &recv_frames
)) {
8058 /* !give others some time to run! */
8059 if (++n
>= bound_limit
)
8063 /* post more rbufs */
8064 dma_rxfill(wlc_hw
->di
[fifo
]);
8066 /* process each frame */
8067 skb_queue_walk_safe(&recv_frames
, p
, next
) {
8068 struct d11rxhdr_le
*rxh_le
;
8069 struct d11rxhdr
*rxh
;
8071 skb_unlink(p
, &recv_frames
);
8072 rxh_le
= (struct d11rxhdr_le
*)p
->data
;
8073 rxh
= (struct d11rxhdr
*)p
->data
;
8075 /* fixup rx header endianness */
8076 rxh
->RxFrameSize
= le16_to_cpu(rxh_le
->RxFrameSize
);
8077 rxh
->PhyRxStatus_0
= le16_to_cpu(rxh_le
->PhyRxStatus_0
);
8078 rxh
->PhyRxStatus_1
= le16_to_cpu(rxh_le
->PhyRxStatus_1
);
8079 rxh
->PhyRxStatus_2
= le16_to_cpu(rxh_le
->PhyRxStatus_2
);
8080 rxh
->PhyRxStatus_3
= le16_to_cpu(rxh_le
->PhyRxStatus_3
);
8081 rxh
->PhyRxStatus_4
= le16_to_cpu(rxh_le
->PhyRxStatus_4
);
8082 rxh
->PhyRxStatus_5
= le16_to_cpu(rxh_le
->PhyRxStatus_5
);
8083 rxh
->RxStatus1
= le16_to_cpu(rxh_le
->RxStatus1
);
8084 rxh
->RxStatus2
= le16_to_cpu(rxh_le
->RxStatus2
);
8085 rxh
->RxTSFTime
= le16_to_cpu(rxh_le
->RxTSFTime
);
8086 rxh
->RxChan
= le16_to_cpu(rxh_le
->RxChan
);
8088 brcms_c_recv(wlc_hw
->wlc
, p
);
8091 return n
>= bound_limit
;
8094 /* second-level interrupt processing
8095 * Return true if another dpc needs to be re-scheduled. false otherwise.
8096 * Param 'bounded' indicates if applicable loops should be bounded.
8098 bool brcms_c_dpc(struct brcms_c_info
*wlc
, bool bounded
)
8101 struct brcms_hardware
*wlc_hw
= wlc
->hw
;
8102 struct bcma_device
*core
= wlc_hw
->d11core
;
8103 struct wiphy
*wiphy
= wlc
->wiphy
;
8105 if (brcms_deviceremoved(wlc
)) {
8106 wiphy_err(wiphy
, "wl%d: %s: dead chip\n", wlc_hw
->unit
,
8108 brcms_down(wlc
->wl
);
8112 /* grab and clear the saved software intstatus bits */
8113 macintstatus
= wlc
->macintstatus
;
8114 wlc
->macintstatus
= 0;
8116 BCMMSG(wlc
->wiphy
, "wl%d: macintstatus 0x%x\n",
8117 wlc_hw
->unit
, macintstatus
);
8119 WARN_ON(macintstatus
& MI_PRQ
); /* PRQ Interrupt in non-MBSS */
8122 if (macintstatus
& MI_TFS
) {
8124 if (brcms_b_txstatus(wlc
->hw
, bounded
, &fatal
))
8125 wlc
->macintstatus
|= MI_TFS
;
8127 wiphy_err(wiphy
, "MI_TFS: fatal\n");
8132 if (macintstatus
& (MI_TBTT
| MI_DTIM_TBTT
))
8135 /* ATIM window end */
8136 if (macintstatus
& MI_ATIMWINEND
) {
8137 BCMMSG(wlc
->wiphy
, "end of ATIM window\n");
8138 bcma_set32(core
, D11REGOFFS(maccommand
), wlc
->qvalid
);
8143 * received data or control frame, MI_DMAINT is
8144 * indication of RX_FIFO interrupt
8146 if (macintstatus
& MI_DMAINT
)
8147 if (brcms_b_recv(wlc_hw
, RX_FIFO
, bounded
))
8148 wlc
->macintstatus
|= MI_DMAINT
;
8150 /* noise sample collected */
8151 if (macintstatus
& MI_BG_NOISE
)
8152 wlc_phy_noise_sample_intr(wlc_hw
->band
->pi
);
8154 if (macintstatus
& MI_GP0
) {
8155 wiphy_err(wiphy
, "wl%d: PSM microcode watchdog fired at %d "
8156 "(seconds). Resetting.\n", wlc_hw
->unit
, wlc_hw
->now
);
8158 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8159 __func__
, ai_get_chip_id(wlc_hw
->sih
),
8160 ai_get_chiprev(wlc_hw
->sih
));
8161 brcms_fatal_error(wlc_hw
->wlc
->wl
);
8164 /* gptimer timeout */
8165 if (macintstatus
& MI_TO
)
8166 bcma_write32(core
, D11REGOFFS(gptimer
), 0);
8168 if (macintstatus
& MI_RFDISABLE
) {
8169 BCMMSG(wlc
->wiphy
, "wl%d: BMAC Detected a change on the"
8170 " RF Disable Input\n", wlc_hw
->unit
);
8171 brcms_rfkill_set_hw_state(wlc
->wl
);
8174 /* send any enq'd tx packets. Just makes sure to jump start tx */
8175 if (!pktq_empty(&wlc
->pkt_queue
->q
))
8176 brcms_c_send_q(wlc
);
8178 /* it isn't done and needs to be resched if macintstatus is non-zero */
8179 return wlc
->macintstatus
!= 0;
8182 brcms_fatal_error(wlc_hw
->wlc
->wl
);
8183 return wlc
->macintstatus
!= 0;
8186 void brcms_c_init(struct brcms_c_info
*wlc
, bool mute_tx
)
8188 struct bcma_device
*core
= wlc
->hw
->d11core
;
8189 struct ieee80211_channel
*ch
= wlc
->pub
->ieee_hw
->conf
.channel
;
8192 BCMMSG(wlc
->wiphy
, "wl%d\n", wlc
->pub
->unit
);
8194 chanspec
= ch20mhz_chspec(ch
->hw_value
);
8196 brcms_b_init(wlc
->hw
, chanspec
);
8198 /* update beacon listen interval */
8199 brcms_c_bcn_li_upd(wlc
);
8201 /* write ethernet address to core */
8202 brcms_c_set_mac(wlc
->bsscfg
);
8203 brcms_c_set_bssid(wlc
->bsscfg
);
8205 /* Update tsf_cfprep if associated and up */
8206 if (wlc
->pub
->associated
&& wlc
->bsscfg
->up
) {
8209 /* get beacon period and convert to uS */
8210 bi
= wlc
->bsscfg
->current_bss
->beacon_period
<< 10;
8212 * update since init path would reset
8215 bcma_write32(core
, D11REGOFFS(tsf_cfprep
),
8216 bi
<< CFPREP_CBI_SHIFT
);
8218 /* Update maccontrol PM related bits */
8219 brcms_c_set_ps_ctrl(wlc
);
8222 brcms_c_bandinit_ordered(wlc
, chanspec
);
8224 /* init probe response timeout */
8225 brcms_b_write_shm(wlc
->hw
, M_PRS_MAXTIME
, wlc
->prb_resp_timeout
);
8227 /* init max burst txop (framebursting) */
8228 brcms_b_write_shm(wlc
->hw
, M_MBURST_TXOP
,
8230 _rifs
? (EDCF_AC_VO_TXOP_AP
<< 5) : MAXFRAMEBURST_TXOP
));
8232 /* initialize maximum allowed duty cycle */
8233 brcms_c_duty_cycle_set(wlc
, wlc
->tx_duty_cycle_ofdm
, true, true);
8234 brcms_c_duty_cycle_set(wlc
, wlc
->tx_duty_cycle_cck
, false, true);
8237 * Update some shared memory locations related to
8238 * max AMPDU size allowed to received
8240 brcms_c_ampdu_shm_upd(wlc
->ampdu
);
8242 /* band-specific inits */
8243 brcms_c_bsinit(wlc
);
8245 /* Enable EDCF mode (while the MAC is suspended) */
8246 bcma_set16(core
, D11REGOFFS(ifs_ctl
), IFS_USEEDCF
);
8247 brcms_c_edcf_setparams(wlc
, false);
8249 /* Init precedence maps for empty FIFOs */
8250 brcms_c_tx_prec_map_init(wlc
);
8252 /* read the ucode version if we have not yet done so */
8253 if (wlc
->ucode_rev
== 0) {
8255 brcms_b_read_shm(wlc
->hw
, M_BOM_REV_MAJOR
) << NBITS(u16
);
8256 wlc
->ucode_rev
|= brcms_b_read_shm(wlc
->hw
, M_BOM_REV_MINOR
);
8259 /* ..now really unleash hell (allow the MAC out of suspend) */
8260 brcms_c_enable_mac(wlc
);
8262 /* suspend the tx fifos and mute the phy for preism cac time */
8264 brcms_b_mute(wlc
->hw
, true);
8266 /* clear tx flow control */
8267 brcms_c_txflowcontrol_reset(wlc
);
8269 /* enable the RF Disable Delay timer */
8270 bcma_write32(core
, D11REGOFFS(rfdisabledly
), RFDISABLE_DEFAULT
);
8273 * Initialize WME parameters; if they haven't been set by some other
8274 * mechanism (IOVar, etc) then read them from the hardware.
8276 if (GFIELD(wlc
->wme_retries
[0], EDCF_SHORT
) == 0) {
8277 /* Uninitialized; read from HW */
8280 for (ac
= 0; ac
< IEEE80211_NUM_ACS
; ac
++)
8281 wlc
->wme_retries
[ac
] =
8282 brcms_b_read_shm(wlc
->hw
, M_AC_TXLMT_ADDR(ac
));
8287 * The common driver entry routine. Error codes should be unique
8289 struct brcms_c_info
*
8290 brcms_c_attach(struct brcms_info
*wl
, struct bcma_device
*core
, uint unit
,
8291 bool piomode
, uint
*perr
)
8293 struct brcms_c_info
*wlc
;
8296 struct brcms_pub
*pub
;
8298 /* allocate struct brcms_c_info state and its substructures */
8299 wlc
= (struct brcms_c_info
*) brcms_c_attach_malloc(unit
, &err
, 0);
8302 wlc
->wiphy
= wl
->wiphy
;
8309 wlc
->band
= wlc
->bandstate
[0];
8310 wlc
->core
= wlc
->corestate
;
8313 pub
->_piomode
= piomode
;
8314 wlc
->bandinit_pending
= false;
8316 /* populate struct brcms_c_info with default values */
8317 brcms_c_info_init(wlc
, unit
);
8319 /* update sta/ap related parameters */
8320 brcms_c_ap_upd(wlc
);
8323 * low level attach steps(all hw accesses go
8324 * inside, no more in rest of the attach)
8326 err
= brcms_b_attach(wlc
, core
, unit
, piomode
);
8330 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_PAM_OVR
, OFF
);
8332 pub
->phy_11ncapable
= BRCMS_PHY_11N_CAP(wlc
->band
);
8334 /* disable allowed duty cycle */
8335 wlc
->tx_duty_cycle_ofdm
= 0;
8336 wlc
->tx_duty_cycle_cck
= 0;
8338 brcms_c_stf_phy_chain_calc(wlc
);
8340 /* txchain 1: txant 0, txchain 2: txant 1 */
8341 if (BRCMS_ISNPHY(wlc
->band
) && (wlc
->stf
->txstreams
== 1))
8342 wlc
->stf
->txant
= wlc
->stf
->hw_txchain
- 1;
8344 /* push to BMAC driver */
8345 wlc_phy_stf_chain_init(wlc
->band
->pi
, wlc
->stf
->hw_txchain
,
8346 wlc
->stf
->hw_rxchain
);
8348 /* pull up some info resulting from the low attach */
8349 for (i
= 0; i
< NFIFO
; i
++)
8350 wlc
->core
->txavail
[i
] = wlc
->hw
->txavail
[i
];
8352 memcpy(&wlc
->perm_etheraddr
, &wlc
->hw
->etheraddr
, ETH_ALEN
);
8353 memcpy(&pub
->cur_etheraddr
, &wlc
->hw
->etheraddr
, ETH_ALEN
);
8355 for (j
= 0; j
< wlc
->pub
->_nbands
; j
++) {
8356 wlc
->band
= wlc
->bandstate
[j
];
8358 if (!brcms_c_attach_stf_ant_init(wlc
)) {
8363 /* default contention windows size limits */
8364 wlc
->band
->CWmin
= APHY_CWMIN
;
8365 wlc
->band
->CWmax
= PHY_CWMAX
;
8367 /* init gmode value */
8368 if (wlc
->band
->bandtype
== BRCM_BAND_2G
) {
8369 wlc
->band
->gmode
= GMODE_AUTO
;
8370 brcms_c_protection_upd(wlc
, BRCMS_PROT_G_USER
,
8374 /* init _n_enab supported mode */
8375 if (BRCMS_PHY_11N_CAP(wlc
->band
)) {
8376 pub
->_n_enab
= SUPPORT_11N
;
8377 brcms_c_protection_upd(wlc
, BRCMS_PROT_N_USER
,
8379 SUPPORT_11N
) ? WL_11N_2x2
:
8383 /* init per-band default rateset, depend on band->gmode */
8384 brcms_default_rateset(wlc
, &wlc
->band
->defrateset
);
8386 /* fill in hw_rateset */
8387 brcms_c_rateset_filter(&wlc
->band
->defrateset
,
8388 &wlc
->band
->hw_rateset
, false,
8389 BRCMS_RATES_CCK_OFDM
, BRCMS_RATE_MASK
,
8390 (bool) (wlc
->pub
->_n_enab
& SUPPORT_11N
));
8394 * update antenna config due to
8395 * wlc->stf->txant/txchain/ant_rx_ovr change
8397 brcms_c_stf_phy_txant_upd(wlc
);
8399 /* attach each modules */
8400 err
= brcms_c_attach_module(wlc
);
8404 if (!brcms_c_timers_init(wlc
, unit
)) {
8405 wiphy_err(wl
->wiphy
, "wl%d: %s: init_timer failed\n", unit
,
8411 /* depend on rateset, gmode */
8412 wlc
->cmi
= brcms_c_channel_mgr_attach(wlc
);
8414 wiphy_err(wl
->wiphy
, "wl%d: %s: channel_mgr_attach failed"
8415 "\n", unit
, __func__
);
8420 /* init default when all parameters are ready, i.e. ->rateset */
8421 brcms_c_bss_default_init(wlc
);
8424 * Complete the wlc default state initializations..
8427 /* allocate our initial queue */
8428 wlc
->pkt_queue
= brcms_c_txq_alloc(wlc
);
8429 if (wlc
->pkt_queue
== NULL
) {
8430 wiphy_err(wl
->wiphy
, "wl%d: %s: failed to malloc tx queue\n",
8436 wlc
->bsscfg
->wlc
= wlc
;
8438 wlc
->mimoft
= FT_HT
;
8439 wlc
->mimo_40txbw
= AUTO
;
8440 wlc
->ofdm_40txbw
= AUTO
;
8441 wlc
->cck_40txbw
= AUTO
;
8442 brcms_c_update_mimo_band_bwcap(wlc
, BRCMS_N_BW_20IN2G_40IN5G
);
8444 /* Set default values of SGI */
8445 if (BRCMS_SGI_CAP_PHY(wlc
)) {
8446 brcms_c_ht_update_sgi_rx(wlc
, (BRCMS_N_SGI_20
|
8448 } else if (BRCMS_ISSSLPNPHY(wlc
->band
)) {
8449 brcms_c_ht_update_sgi_rx(wlc
, (BRCMS_N_SGI_20
|
8452 brcms_c_ht_update_sgi_rx(wlc
, 0);
8455 brcms_b_antsel_set(wlc
->hw
, wlc
->asi
->antsel_avail
);
8463 wiphy_err(wl
->wiphy
, "wl%d: %s: failed with err %d\n",
8464 unit
, __func__
, err
);
8466 brcms_c_detach(wlc
);