1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2015 Intel Deutschland GmbH
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program;
24 * The full GNU General Public License is included in this distribution
25 * in the file called COPYING.
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
34 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
35 * Copyright(c) 2015 Intel Deutschland GmbH
36 * All rights reserved.
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 *****************************************************************************/
65 #include <linux/devcoredump.h>
73 static ssize_t
iwl_mvm_read_coredump(char *buffer
, loff_t offset
, size_t count
,
74 const void *data
, size_t datalen
)
76 const struct iwl_mvm_dump_ptrs
*dump_ptrs
= data
;
78 ssize_t bytes_read_trans
;
80 if (offset
< dump_ptrs
->op_mode_len
) {
81 bytes_read
= min_t(ssize_t
, count
,
82 dump_ptrs
->op_mode_len
- offset
);
83 memcpy(buffer
, (u8
*)dump_ptrs
->op_mode_ptr
+ offset
,
94 if (!dump_ptrs
->trans_ptr
)
97 offset
-= dump_ptrs
->op_mode_len
;
98 bytes_read_trans
= min_t(ssize_t
, count
,
99 dump_ptrs
->trans_ptr
->len
- offset
);
100 memcpy(buffer
+ bytes_read
,
101 (u8
*)dump_ptrs
->trans_ptr
->data
+ offset
,
104 return bytes_read
+ bytes_read_trans
;
107 static void iwl_mvm_free_coredump(const void *data
)
109 const struct iwl_mvm_dump_ptrs
*fw_error_dump
= data
;
111 vfree(fw_error_dump
->op_mode_ptr
);
112 vfree(fw_error_dump
->trans_ptr
);
113 kfree(fw_error_dump
);
116 static void iwl_mvm_dump_fifos(struct iwl_mvm
*mvm
,
117 struct iwl_fw_error_dump_data
**dump_data
)
119 struct iwl_fw_error_dump_fifo
*fifo_hdr
;
125 if (!iwl_trans_grab_nic_access(mvm
->trans
, false, &flags
))
128 /* Pull RXF data from all RXFs */
129 for (i
= 0; i
< ARRAY_SIZE(mvm
->shared_mem_cfg
.rxfifo_size
); i
++) {
131 * Keep aside the additional offset that might be needed for
134 u32 offset_diff
= RXF_DIFF_FROM_PREV
* i
;
136 fifo_hdr
= (void *)(*dump_data
)->data
;
137 fifo_data
= (void *)fifo_hdr
->data
;
138 fifo_len
= mvm
->shared_mem_cfg
.rxfifo_size
[i
];
140 /* No need to try to read the data if the length is 0 */
144 /* Add a TLV for the RXF */
145 (*dump_data
)->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_RXF
);
146 (*dump_data
)->len
= cpu_to_le32(fifo_len
+ sizeof(*fifo_hdr
));
148 fifo_hdr
->fifo_num
= cpu_to_le32(i
);
149 fifo_hdr
->available_bytes
=
150 cpu_to_le32(iwl_trans_read_prph(mvm
->trans
,
154 cpu_to_le32(iwl_trans_read_prph(mvm
->trans
,
158 cpu_to_le32(iwl_trans_read_prph(mvm
->trans
,
161 fifo_hdr
->fence_ptr
=
162 cpu_to_le32(iwl_trans_read_prph(mvm
->trans
,
165 fifo_hdr
->fence_mode
=
166 cpu_to_le32(iwl_trans_read_prph(mvm
->trans
,
171 iwl_trans_write_prph(mvm
->trans
,
172 RXF_SET_FENCE_MODE
+ offset_diff
, 0x1);
173 /* Set fence pointer to the same place like WR pointer */
174 iwl_trans_write_prph(mvm
->trans
,
175 RXF_LD_WR2FENCE
+ offset_diff
, 0x1);
176 /* Set fence offset */
177 iwl_trans_write_prph(mvm
->trans
,
178 RXF_LD_FENCE_OFFSET_ADDR
+ offset_diff
,
182 fifo_len
/= sizeof(u32
); /* Size in DWORDS */
183 for (j
= 0; j
< fifo_len
; j
++)
184 fifo_data
[j
] = iwl_trans_read_prph(mvm
->trans
,
185 RXF_FIFO_RD_FENCE_INC
+
187 *dump_data
= iwl_fw_error_next_data(*dump_data
);
190 /* Pull TXF data from all TXFs */
191 for (i
= 0; i
< ARRAY_SIZE(mvm
->shared_mem_cfg
.txfifo_size
); i
++) {
192 /* Mark the number of TXF we're pulling now */
193 iwl_trans_write_prph(mvm
->trans
, TXF_LARC_NUM
, i
);
195 fifo_hdr
= (void *)(*dump_data
)->data
;
196 fifo_data
= (void *)fifo_hdr
->data
;
197 fifo_len
= mvm
->shared_mem_cfg
.txfifo_size
[i
];
199 /* No need to try to read the data if the length is 0 */
203 /* Add a TLV for the FIFO */
204 (*dump_data
)->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_TXF
);
205 (*dump_data
)->len
= cpu_to_le32(fifo_len
+ sizeof(*fifo_hdr
));
207 fifo_hdr
->fifo_num
= cpu_to_le32(i
);
208 fifo_hdr
->available_bytes
=
209 cpu_to_le32(iwl_trans_read_prph(mvm
->trans
,
212 cpu_to_le32(iwl_trans_read_prph(mvm
->trans
,
215 cpu_to_le32(iwl_trans_read_prph(mvm
->trans
,
217 fifo_hdr
->fence_ptr
=
218 cpu_to_le32(iwl_trans_read_prph(mvm
->trans
,
220 fifo_hdr
->fence_mode
=
221 cpu_to_le32(iwl_trans_read_prph(mvm
->trans
,
224 /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
225 iwl_trans_write_prph(mvm
->trans
, TXF_READ_MODIFY_ADDR
,
228 /* Dummy-read to advance the read pointer to the head */
229 iwl_trans_read_prph(mvm
->trans
, TXF_READ_MODIFY_DATA
);
232 fifo_len
/= sizeof(u32
); /* Size in DWORDS */
233 for (j
= 0; j
< fifo_len
; j
++)
234 fifo_data
[j
] = iwl_trans_read_prph(mvm
->trans
,
235 TXF_READ_MODIFY_DATA
);
236 *dump_data
= iwl_fw_error_next_data(*dump_data
);
239 iwl_trans_release_nic_access(mvm
->trans
, &flags
);
242 void iwl_mvm_free_fw_dump_desc(struct iwl_mvm
*mvm
)
244 if (mvm
->fw_dump_desc
== &iwl_mvm_dump_desc_assert
||
248 kfree(mvm
->fw_dump_desc
);
249 mvm
->fw_dump_desc
= NULL
;
252 #define IWL8260_ICCM_OFFSET 0x44000 /* Only for B-step */
253 #define IWL8260_ICCM_LEN 0xC000 /* Only for B-step */
255 static const struct {
257 } iwl_prph_dump_addr
[] = {
258 { .start
= 0x00a00000, .end
= 0x00a00000 },
259 { .start
= 0x00a0000c, .end
= 0x00a00024 },
260 { .start
= 0x00a0002c, .end
= 0x00a0003c },
261 { .start
= 0x00a00410, .end
= 0x00a00418 },
262 { .start
= 0x00a00420, .end
= 0x00a00420 },
263 { .start
= 0x00a00428, .end
= 0x00a00428 },
264 { .start
= 0x00a00430, .end
= 0x00a0043c },
265 { .start
= 0x00a00444, .end
= 0x00a00444 },
266 { .start
= 0x00a004c0, .end
= 0x00a004cc },
267 { .start
= 0x00a004d8, .end
= 0x00a004d8 },
268 { .start
= 0x00a004e0, .end
= 0x00a004f0 },
269 { .start
= 0x00a00840, .end
= 0x00a00840 },
270 { .start
= 0x00a00850, .end
= 0x00a00858 },
271 { .start
= 0x00a01004, .end
= 0x00a01008 },
272 { .start
= 0x00a01010, .end
= 0x00a01010 },
273 { .start
= 0x00a01018, .end
= 0x00a01018 },
274 { .start
= 0x00a01024, .end
= 0x00a01024 },
275 { .start
= 0x00a0102c, .end
= 0x00a01034 },
276 { .start
= 0x00a0103c, .end
= 0x00a01040 },
277 { .start
= 0x00a01048, .end
= 0x00a01094 },
278 { .start
= 0x00a01c00, .end
= 0x00a01c20 },
279 { .start
= 0x00a01c58, .end
= 0x00a01c58 },
280 { .start
= 0x00a01c7c, .end
= 0x00a01c7c },
281 { .start
= 0x00a01c28, .end
= 0x00a01c54 },
282 { .start
= 0x00a01c5c, .end
= 0x00a01c5c },
283 { .start
= 0x00a01c60, .end
= 0x00a01cdc },
284 { .start
= 0x00a01ce0, .end
= 0x00a01d0c },
285 { .start
= 0x00a01d18, .end
= 0x00a01d20 },
286 { .start
= 0x00a01d2c, .end
= 0x00a01d30 },
287 { .start
= 0x00a01d40, .end
= 0x00a01d5c },
288 { .start
= 0x00a01d80, .end
= 0x00a01d80 },
289 { .start
= 0x00a01d98, .end
= 0x00a01d9c },
290 { .start
= 0x00a01da8, .end
= 0x00a01da8 },
291 { .start
= 0x00a01db8, .end
= 0x00a01df4 },
292 { .start
= 0x00a01dc0, .end
= 0x00a01dfc },
293 { .start
= 0x00a01e00, .end
= 0x00a01e2c },
294 { .start
= 0x00a01e40, .end
= 0x00a01e60 },
295 { .start
= 0x00a01e68, .end
= 0x00a01e6c },
296 { .start
= 0x00a01e74, .end
= 0x00a01e74 },
297 { .start
= 0x00a01e84, .end
= 0x00a01e90 },
298 { .start
= 0x00a01e9c, .end
= 0x00a01ec4 },
299 { .start
= 0x00a01ed0, .end
= 0x00a01ee0 },
300 { .start
= 0x00a01f00, .end
= 0x00a01f1c },
301 { .start
= 0x00a01f44, .end
= 0x00a01ffc },
302 { .start
= 0x00a02000, .end
= 0x00a02048 },
303 { .start
= 0x00a02068, .end
= 0x00a020f0 },
304 { .start
= 0x00a02100, .end
= 0x00a02118 },
305 { .start
= 0x00a02140, .end
= 0x00a0214c },
306 { .start
= 0x00a02168, .end
= 0x00a0218c },
307 { .start
= 0x00a021c0, .end
= 0x00a021c0 },
308 { .start
= 0x00a02400, .end
= 0x00a02410 },
309 { .start
= 0x00a02418, .end
= 0x00a02420 },
310 { .start
= 0x00a02428, .end
= 0x00a0242c },
311 { .start
= 0x00a02434, .end
= 0x00a02434 },
312 { .start
= 0x00a02440, .end
= 0x00a02460 },
313 { .start
= 0x00a02468, .end
= 0x00a024b0 },
314 { .start
= 0x00a024c8, .end
= 0x00a024cc },
315 { .start
= 0x00a02500, .end
= 0x00a02504 },
316 { .start
= 0x00a0250c, .end
= 0x00a02510 },
317 { .start
= 0x00a02540, .end
= 0x00a02554 },
318 { .start
= 0x00a02580, .end
= 0x00a025f4 },
319 { .start
= 0x00a02600, .end
= 0x00a0260c },
320 { .start
= 0x00a02648, .end
= 0x00a02650 },
321 { .start
= 0x00a02680, .end
= 0x00a02680 },
322 { .start
= 0x00a026c0, .end
= 0x00a026d0 },
323 { .start
= 0x00a02700, .end
= 0x00a0270c },
324 { .start
= 0x00a02804, .end
= 0x00a02804 },
325 { .start
= 0x00a02818, .end
= 0x00a0281c },
326 { .start
= 0x00a02c00, .end
= 0x00a02db4 },
327 { .start
= 0x00a02df4, .end
= 0x00a02fb0 },
328 { .start
= 0x00a03000, .end
= 0x00a03014 },
329 { .start
= 0x00a0301c, .end
= 0x00a0302c },
330 { .start
= 0x00a03034, .end
= 0x00a03038 },
331 { .start
= 0x00a03040, .end
= 0x00a03048 },
332 { .start
= 0x00a03060, .end
= 0x00a03068 },
333 { .start
= 0x00a03070, .end
= 0x00a03074 },
334 { .start
= 0x00a0307c, .end
= 0x00a0307c },
335 { .start
= 0x00a03080, .end
= 0x00a03084 },
336 { .start
= 0x00a0308c, .end
= 0x00a03090 },
337 { .start
= 0x00a03098, .end
= 0x00a03098 },
338 { .start
= 0x00a030a0, .end
= 0x00a030a0 },
339 { .start
= 0x00a030a8, .end
= 0x00a030b4 },
340 { .start
= 0x00a030bc, .end
= 0x00a030bc },
341 { .start
= 0x00a030c0, .end
= 0x00a0312c },
342 { .start
= 0x00a03c00, .end
= 0x00a03c5c },
343 { .start
= 0x00a04400, .end
= 0x00a04454 },
344 { .start
= 0x00a04460, .end
= 0x00a04474 },
345 { .start
= 0x00a044c0, .end
= 0x00a044ec },
346 { .start
= 0x00a04500, .end
= 0x00a04504 },
347 { .start
= 0x00a04510, .end
= 0x00a04538 },
348 { .start
= 0x00a04540, .end
= 0x00a04548 },
349 { .start
= 0x00a04560, .end
= 0x00a0457c },
350 { .start
= 0x00a04590, .end
= 0x00a04598 },
351 { .start
= 0x00a045c0, .end
= 0x00a045f4 },
354 static u32
iwl_dump_prph(struct iwl_trans
*trans
,
355 struct iwl_fw_error_dump_data
**data
)
357 struct iwl_fw_error_dump_prph
*prph
;
361 if (!iwl_trans_grab_nic_access(trans
, false, &flags
))
364 for (i
= 0; i
< ARRAY_SIZE(iwl_prph_dump_addr
); i
++) {
365 /* The range includes both boundaries */
366 int num_bytes_in_chunk
= iwl_prph_dump_addr
[i
].end
-
367 iwl_prph_dump_addr
[i
].start
+ 4;
371 prph_len
+= sizeof(**data
) + sizeof(*prph
) + num_bytes_in_chunk
;
373 (*data
)->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_PRPH
);
374 (*data
)->len
= cpu_to_le32(sizeof(*prph
) +
376 prph
= (void *)(*data
)->data
;
377 prph
->prph_start
= cpu_to_le32(iwl_prph_dump_addr
[i
].start
);
378 val
= (void *)prph
->data
;
380 for (reg
= iwl_prph_dump_addr
[i
].start
;
381 reg
<= iwl_prph_dump_addr
[i
].end
;
383 *val
++ = cpu_to_le32(iwl_read_prph_no_grab(trans
,
386 *data
= iwl_fw_error_next_data(*data
);
389 iwl_trans_release_nic_access(trans
, &flags
);
394 void iwl_mvm_fw_error_dump(struct iwl_mvm
*mvm
)
396 struct iwl_fw_error_dump_file
*dump_file
;
397 struct iwl_fw_error_dump_data
*dump_data
;
398 struct iwl_fw_error_dump_info
*dump_info
;
399 struct iwl_fw_error_dump_mem
*dump_mem
;
400 struct iwl_fw_error_dump_trigger_desc
*dump_trig
;
401 struct iwl_mvm_dump_ptrs
*fw_error_dump
;
402 u32 sram_len
, sram_ofs
;
403 u32 file_len
, fifo_data_len
= 0;
404 u32 smem_len
= mvm
->cfg
->smem_len
;
405 u32 sram2_len
= mvm
->cfg
->dccm2_len
;
406 bool monitor_dump_only
= false;
409 lockdep_assert_held(&mvm
->mutex
);
411 /* there's no point in fw dump if the bus is dead */
412 if (test_bit(STATUS_TRANS_DEAD
, &mvm
->trans
->status
)) {
413 IWL_ERR(mvm
, "Skip fw error dump since bus is dead\n");
417 if (mvm
->fw_dump_trig
&&
418 mvm
->fw_dump_trig
->mode
& IWL_FW_DBG_TRIGGER_MONITOR_ONLY
)
419 monitor_dump_only
= true;
421 fw_error_dump
= kzalloc(sizeof(*fw_error_dump
), GFP_KERNEL
);
425 /* SRAM - include stack CCM if driver knows the values for it */
426 if (!mvm
->cfg
->dccm_offset
|| !mvm
->cfg
->dccm_len
) {
427 const struct fw_img
*img
;
429 img
= &mvm
->fw
->img
[mvm
->cur_ucode
];
430 sram_ofs
= img
->sec
[IWL_UCODE_SECTION_DATA
].offset
;
431 sram_len
= img
->sec
[IWL_UCODE_SECTION_DATA
].len
;
433 sram_ofs
= mvm
->cfg
->dccm_offset
;
434 sram_len
= mvm
->cfg
->dccm_len
;
437 /* reading RXF/TXF sizes */
438 if (test_bit(STATUS_FW_ERROR
, &mvm
->trans
->status
)) {
439 struct iwl_mvm_shared_mem_cfg
*mem_cfg
= &mvm
->shared_mem_cfg
;
444 for (i
= 0; i
< ARRAY_SIZE(mem_cfg
->rxfifo_size
); i
++) {
445 if (!mem_cfg
->rxfifo_size
[i
])
448 /* Add header info */
449 fifo_data_len
+= mem_cfg
->rxfifo_size
[i
] +
451 sizeof(struct iwl_fw_error_dump_fifo
);
454 for (i
= 0; i
< ARRAY_SIZE(mem_cfg
->txfifo_size
); i
++) {
455 if (!mem_cfg
->txfifo_size
[i
])
458 /* Add header info */
459 fifo_data_len
+= mem_cfg
->txfifo_size
[i
] +
461 sizeof(struct iwl_fw_error_dump_fifo
);
465 file_len
= sizeof(*dump_file
) +
466 sizeof(*dump_data
) * 2 +
467 sram_len
+ sizeof(*dump_mem
) +
471 /* Make room for the SMEM, if it exists */
473 file_len
+= sizeof(*dump_data
) + sizeof(*dump_mem
) + smem_len
;
475 /* Make room for the secondary SRAM, if it exists */
477 file_len
+= sizeof(*dump_data
) + sizeof(*dump_mem
) + sram2_len
;
479 /* Make room for fw's virtual image pages, if it exists */
480 if (mvm
->fw
->img
[mvm
->cur_ucode
].paging_mem_size
)
481 file_len
+= mvm
->num_of_paging_blk
*
482 (sizeof(*dump_data
) +
483 sizeof(struct iwl_fw_error_dump_paging
) +
486 /* If we only want a monitor dump, reset the file length */
487 if (monitor_dump_only
) {
488 file_len
= sizeof(*dump_file
) + sizeof(*dump_data
) +
492 /* Make room for PRPH registers */
493 for (i
= 0; i
< ARRAY_SIZE(iwl_prph_dump_addr
); i
++) {
494 /* The range includes both boundaries */
495 int num_bytes_in_chunk
= iwl_prph_dump_addr
[i
].end
-
496 iwl_prph_dump_addr
[i
].start
+ 4;
498 file_len
+= sizeof(*dump_data
) +
499 sizeof(struct iwl_fw_error_dump_prph
) +
504 * In 8000 HW family B-step include the ICCM (which resides separately)
506 if (mvm
->cfg
->device_family
== IWL_DEVICE_FAMILY_8000
&&
507 CSR_HW_REV_STEP(mvm
->trans
->hw_rev
) == SILICON_B_STEP
)
508 file_len
+= sizeof(*dump_data
) + sizeof(*dump_mem
) +
511 if (mvm
->fw_dump_desc
)
512 file_len
+= sizeof(*dump_data
) + sizeof(*dump_trig
) +
513 mvm
->fw_dump_desc
->len
;
515 dump_file
= vzalloc(file_len
);
517 kfree(fw_error_dump
);
518 iwl_mvm_free_fw_dump_desc(mvm
);
522 fw_error_dump
->op_mode_ptr
= dump_file
;
524 dump_file
->barker
= cpu_to_le32(IWL_FW_ERROR_DUMP_BARKER
);
525 dump_data
= (void *)dump_file
->data
;
527 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_DEV_FW_INFO
);
528 dump_data
->len
= cpu_to_le32(sizeof(*dump_info
));
529 dump_info
= (void *)dump_data
->data
;
530 dump_info
->device_family
=
531 mvm
->cfg
->device_family
== IWL_DEVICE_FAMILY_7000
?
532 cpu_to_le32(IWL_FW_ERROR_DUMP_FAMILY_7
) :
533 cpu_to_le32(IWL_FW_ERROR_DUMP_FAMILY_8
);
534 dump_info
->hw_step
= cpu_to_le32(CSR_HW_REV_STEP(mvm
->trans
->hw_rev
));
535 memcpy(dump_info
->fw_human_readable
, mvm
->fw
->human_readable
,
536 sizeof(dump_info
->fw_human_readable
));
537 strncpy(dump_info
->dev_human_readable
, mvm
->cfg
->name
,
538 sizeof(dump_info
->dev_human_readable
));
539 strncpy(dump_info
->bus_human_readable
, mvm
->dev
->bus
->name
,
540 sizeof(dump_info
->bus_human_readable
));
542 dump_data
= iwl_fw_error_next_data(dump_data
);
543 /* We only dump the FIFOs if the FW is in error state */
544 if (test_bit(STATUS_FW_ERROR
, &mvm
->trans
->status
))
545 iwl_mvm_dump_fifos(mvm
, &dump_data
);
547 if (mvm
->fw_dump_desc
) {
548 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_ERROR_INFO
);
549 dump_data
->len
= cpu_to_le32(sizeof(*dump_trig
) +
550 mvm
->fw_dump_desc
->len
);
551 dump_trig
= (void *)dump_data
->data
;
552 memcpy(dump_trig
, &mvm
->fw_dump_desc
->trig_desc
,
553 sizeof(*dump_trig
) + mvm
->fw_dump_desc
->len
);
555 /* now we can free this copy */
556 iwl_mvm_free_fw_dump_desc(mvm
);
557 dump_data
= iwl_fw_error_next_data(dump_data
);
560 /* In case we only want monitor dump, skip to dump trasport data */
561 if (monitor_dump_only
)
562 goto dump_trans_data
;
564 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_MEM
);
565 dump_data
->len
= cpu_to_le32(sram_len
+ sizeof(*dump_mem
));
566 dump_mem
= (void *)dump_data
->data
;
567 dump_mem
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SRAM
);
568 dump_mem
->offset
= cpu_to_le32(sram_ofs
);
569 iwl_trans_read_mem_bytes(mvm
->trans
, sram_ofs
, dump_mem
->data
,
573 dump_data
= iwl_fw_error_next_data(dump_data
);
574 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_MEM
);
575 dump_data
->len
= cpu_to_le32(smem_len
+ sizeof(*dump_mem
));
576 dump_mem
= (void *)dump_data
->data
;
577 dump_mem
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SMEM
);
578 dump_mem
->offset
= cpu_to_le32(mvm
->cfg
->smem_offset
);
579 iwl_trans_read_mem_bytes(mvm
->trans
, mvm
->cfg
->smem_offset
,
580 dump_mem
->data
, smem_len
);
584 dump_data
= iwl_fw_error_next_data(dump_data
);
585 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_MEM
);
586 dump_data
->len
= cpu_to_le32(sram2_len
+ sizeof(*dump_mem
));
587 dump_mem
= (void *)dump_data
->data
;
588 dump_mem
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SRAM
);
589 dump_mem
->offset
= cpu_to_le32(mvm
->cfg
->dccm2_offset
);
590 iwl_trans_read_mem_bytes(mvm
->trans
, mvm
->cfg
->dccm2_offset
,
591 dump_mem
->data
, sram2_len
);
594 if (mvm
->cfg
->device_family
== IWL_DEVICE_FAMILY_8000
&&
595 CSR_HW_REV_STEP(mvm
->trans
->hw_rev
) == SILICON_B_STEP
) {
596 dump_data
= iwl_fw_error_next_data(dump_data
);
597 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_MEM
);
598 dump_data
->len
= cpu_to_le32(IWL8260_ICCM_LEN
+
600 dump_mem
= (void *)dump_data
->data
;
601 dump_mem
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SRAM
);
602 dump_mem
->offset
= cpu_to_le32(IWL8260_ICCM_OFFSET
);
603 iwl_trans_read_mem_bytes(mvm
->trans
, IWL8260_ICCM_OFFSET
,
604 dump_mem
->data
, IWL8260_ICCM_LEN
);
607 /* Dump fw's virtual image */
608 if (mvm
->fw
->img
[mvm
->cur_ucode
].paging_mem_size
) {
611 for (i
= 1; i
< mvm
->num_of_paging_blk
+ 1; i
++) {
612 struct iwl_fw_error_dump_paging
*paging
;
614 mvm
->fw_paging_db
[i
].fw_paging_block
;
616 dump_data
= iwl_fw_error_next_data(dump_data
);
617 dump_data
->type
= cpu_to_le32(IWL_FW_ERROR_DUMP_PAGING
);
618 dump_data
->len
= cpu_to_le32(sizeof(*paging
) +
620 paging
= (void *)dump_data
->data
;
621 paging
->index
= cpu_to_le32(i
);
622 memcpy(paging
->data
, page_address(pages
),
627 dump_data
= iwl_fw_error_next_data(dump_data
);
628 iwl_dump_prph(mvm
->trans
, &dump_data
);
631 fw_error_dump
->trans_ptr
= iwl_trans_dump_data(mvm
->trans
,
633 fw_error_dump
->op_mode_len
= file_len
;
634 if (fw_error_dump
->trans_ptr
)
635 file_len
+= fw_error_dump
->trans_ptr
->len
;
636 dump_file
->file_len
= cpu_to_le32(file_len
);
638 dev_coredumpm(mvm
->trans
->dev
, THIS_MODULE
, fw_error_dump
, 0,
639 GFP_KERNEL
, iwl_mvm_read_coredump
, iwl_mvm_free_coredump
);
641 mvm
->fw_dump_trig
= NULL
;
642 clear_bit(IWL_MVM_STATUS_DUMPING_FW_LOG
, &mvm
->status
);
645 struct iwl_mvm_dump_desc iwl_mvm_dump_desc_assert
= {
647 .type
= cpu_to_le32(FW_DBG_TRIGGER_FW_ASSERT
),
651 int iwl_mvm_fw_dbg_collect_desc(struct iwl_mvm
*mvm
,
652 struct iwl_mvm_dump_desc
*desc
,
653 struct iwl_fw_dbg_trigger_tlv
*trigger
)
655 unsigned int delay
= 0;
658 delay
= msecs_to_jiffies(le32_to_cpu(trigger
->stop_delay
));
660 if (test_and_set_bit(IWL_MVM_STATUS_DUMPING_FW_LOG
, &mvm
->status
))
663 if (WARN_ON(mvm
->fw_dump_desc
))
664 iwl_mvm_free_fw_dump_desc(mvm
);
666 IWL_WARN(mvm
, "Collecting data: trigger %d fired.\n",
667 le32_to_cpu(desc
->trig_desc
.type
));
669 mvm
->fw_dump_desc
= desc
;
670 mvm
->fw_dump_trig
= trigger
;
672 queue_delayed_work(system_wq
, &mvm
->fw_dump_wk
, delay
);
677 int iwl_mvm_fw_dbg_collect(struct iwl_mvm
*mvm
, enum iwl_fw_dbg_trigger trig
,
678 const char *str
, size_t len
,
679 struct iwl_fw_dbg_trigger_tlv
*trigger
)
681 struct iwl_mvm_dump_desc
*desc
;
683 desc
= kzalloc(sizeof(*desc
) + len
, GFP_ATOMIC
);
688 desc
->trig_desc
.type
= cpu_to_le32(trig
);
689 memcpy(desc
->trig_desc
.data
, str
, len
);
691 return iwl_mvm_fw_dbg_collect_desc(mvm
, desc
, trigger
);
694 int iwl_mvm_fw_dbg_collect_trig(struct iwl_mvm
*mvm
,
695 struct iwl_fw_dbg_trigger_tlv
*trigger
,
696 const char *fmt
, ...)
698 u16 occurrences
= le16_to_cpu(trigger
->occurrences
);
708 buf
[sizeof(buf
) - 1] = '\0';
711 vsnprintf(buf
, sizeof(buf
), fmt
, ap
);
714 /* check for truncation */
715 if (WARN_ON_ONCE(buf
[sizeof(buf
) - 1]))
716 buf
[sizeof(buf
) - 1] = '\0';
718 len
= strlen(buf
) + 1;
721 ret
= iwl_mvm_fw_dbg_collect(mvm
, le32_to_cpu(trigger
->id
), buf
, len
,
727 trigger
->occurrences
= cpu_to_le16(occurrences
- 1);
731 static inline void iwl_mvm_restart_early_start(struct iwl_mvm
*mvm
)
733 if (mvm
->cfg
->device_family
== IWL_DEVICE_FAMILY_7000
)
734 iwl_clear_bits_prph(mvm
->trans
, MON_BUFF_SAMPLE_CTL
, 0x100);
736 iwl_write_prph(mvm
->trans
, DBGC_IN_SAMPLE
, 1);
739 int iwl_mvm_start_fw_dbg_conf(struct iwl_mvm
*mvm
, u8 conf_id
)
745 if (WARN_ONCE(conf_id
>= ARRAY_SIZE(mvm
->fw
->dbg_conf_tlv
),
746 "Invalid configuration %d\n", conf_id
))
749 /* EARLY START - firmware's configuration is hard coded */
750 if ((!mvm
->fw
->dbg_conf_tlv
[conf_id
] ||
751 !mvm
->fw
->dbg_conf_tlv
[conf_id
]->num_of_hcmds
) &&
752 conf_id
== FW_DBG_START_FROM_ALIVE
) {
753 iwl_mvm_restart_early_start(mvm
);
757 if (!mvm
->fw
->dbg_conf_tlv
[conf_id
])
760 if (mvm
->fw_dbg_conf
!= FW_DBG_INVALID
)
761 IWL_WARN(mvm
, "FW already configured (%d) - re-configuring\n",
764 /* Send all HCMDs for configuring the FW debug */
765 ptr
= (void *)&mvm
->fw
->dbg_conf_tlv
[conf_id
]->hcmd
;
766 for (i
= 0; i
< mvm
->fw
->dbg_conf_tlv
[conf_id
]->num_of_hcmds
; i
++) {
767 struct iwl_fw_dbg_conf_hcmd
*cmd
= (void *)ptr
;
769 ret
= iwl_mvm_send_cmd_pdu(mvm
, cmd
->id
, 0,
770 le16_to_cpu(cmd
->len
), cmd
->data
);
775 ptr
+= le16_to_cpu(cmd
->len
);
778 mvm
->fw_dbg_conf
= conf_id
;