1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 Intel Deutschland GmbH
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37 * All rights reserved.
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
43 * * Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * * Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
49 * * Neither the name Intel Corporation nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific prior written permission.
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
57 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
58 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
59 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65 *****************************************************************************/
66 #include <net/mac80211.h>
68 #include "iwl-trans.h"
69 #include "iwl-op-mode.h"
71 #include "iwl-debug.h"
72 #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
73 #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
75 #include "iwl-eeprom-parse.h"
79 #include "iwl-phy-db.h"
81 #define MVM_UCODE_ALIVE_TIMEOUT HZ
82 #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
84 #define UCODE_VALID_OK cpu_to_le32(0x1)
86 struct iwl_mvm_alive_data
{
91 static inline const struct fw_img
*
92 iwl_get_ucode_image(struct iwl_mvm
*mvm
, enum iwl_ucode_type ucode_type
)
94 if (ucode_type
>= IWL_UCODE_TYPE_MAX
)
97 return &mvm
->fw
->img
[ucode_type
];
100 static int iwl_send_tx_ant_cfg(struct iwl_mvm
*mvm
, u8 valid_tx_ant
)
102 struct iwl_tx_ant_cfg_cmd tx_ant_cmd
= {
103 .valid
= cpu_to_le32(valid_tx_ant
),
106 IWL_DEBUG_FW(mvm
, "select valid tx ant: %u\n", valid_tx_ant
);
107 return iwl_mvm_send_cmd_pdu(mvm
, TX_ANT_CONFIGURATION_CMD
, 0,
108 sizeof(tx_ant_cmd
), &tx_ant_cmd
);
111 static int iwl_send_rss_cfg_cmd(struct iwl_mvm
*mvm
)
114 struct iwl_rss_config_cmd cmd
= {
115 .flags
= cpu_to_le32(IWL_RSS_ENABLE
),
116 .hash_mask
= IWL_RSS_HASH_TYPE_IPV4_TCP
|
117 IWL_RSS_HASH_TYPE_IPV4_PAYLOAD
|
118 IWL_RSS_HASH_TYPE_IPV6_TCP
|
119 IWL_RSS_HASH_TYPE_IPV6_PAYLOAD
,
122 for (i
= 0; i
< ARRAY_SIZE(cmd
.indirection_table
); i
++)
123 cmd
.indirection_table
[i
] = i
% mvm
->trans
->num_rx_queues
;
124 memcpy(cmd
.secret_key
, mvm
->secret_key
, sizeof(cmd
.secret_key
));
126 return iwl_mvm_send_cmd_pdu(mvm
, RSS_CONFIG_CMD
, 0, sizeof(cmd
), &cmd
);
129 void iwl_free_fw_paging(struct iwl_mvm
*mvm
)
133 if (!mvm
->fw_paging_db
[0].fw_paging_block
)
136 for (i
= 0; i
< NUM_OF_FW_PAGING_BLOCKS
; i
++) {
137 if (!mvm
->fw_paging_db
[i
].fw_paging_block
) {
139 "Paging: block %d already freed, continue to next page\n",
145 __free_pages(mvm
->fw_paging_db
[i
].fw_paging_block
,
146 get_order(mvm
->fw_paging_db
[i
].fw_paging_size
));
148 kfree(mvm
->trans
->paging_download_buf
);
149 mvm
->trans
->paging_download_buf
= NULL
;
151 memset(mvm
->fw_paging_db
, 0, sizeof(mvm
->fw_paging_db
));
154 static int iwl_fill_paging_mem(struct iwl_mvm
*mvm
, const struct fw_img
*image
)
160 * find where is the paging image start point:
161 * if CPU2 exist and it's in paging format, then the image looks like:
162 * CPU1 sections (2 or more)
163 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2
164 * CPU2 sections (not paged)
165 * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2
166 * non paged to CPU2 paging sec
168 * CPU2 paging image (including instruction and data)
170 for (sec_idx
= 0; sec_idx
< IWL_UCODE_SECTION_MAX
; sec_idx
++) {
171 if (image
->sec
[sec_idx
].offset
== PAGING_SEPARATOR_SECTION
) {
178 * If paging is enabled there should be at least 2 more sections left
179 * (one for CSS and one for Paging data)
181 if (sec_idx
>= ARRAY_SIZE(image
->sec
) - 1) {
182 IWL_ERR(mvm
, "Paging: Missing CSS and/or paging sections\n");
183 iwl_free_fw_paging(mvm
);
187 /* copy the CSS block to the dram */
188 IWL_DEBUG_FW(mvm
, "Paging: load paging CSS to FW, sec = %d\n",
191 memcpy(page_address(mvm
->fw_paging_db
[0].fw_paging_block
),
192 image
->sec
[sec_idx
].data
,
193 mvm
->fw_paging_db
[0].fw_paging_size
);
196 "Paging: copied %d CSS bytes to first block\n",
197 mvm
->fw_paging_db
[0].fw_paging_size
);
202 * copy the paging blocks to the dram
203 * loop index start from 1 since that CSS block already copied to dram
204 * and CSS index is 0.
205 * loop stop at num_of_paging_blk since that last block is not full.
207 for (idx
= 1; idx
< mvm
->num_of_paging_blk
; idx
++) {
208 memcpy(page_address(mvm
->fw_paging_db
[idx
].fw_paging_block
),
209 image
->sec
[sec_idx
].data
+ offset
,
210 mvm
->fw_paging_db
[idx
].fw_paging_size
);
213 "Paging: copied %d paging bytes to block %d\n",
214 mvm
->fw_paging_db
[idx
].fw_paging_size
,
217 offset
+= mvm
->fw_paging_db
[idx
].fw_paging_size
;
220 /* copy the last paging block */
221 if (mvm
->num_of_pages_in_last_blk
> 0) {
222 memcpy(page_address(mvm
->fw_paging_db
[idx
].fw_paging_block
),
223 image
->sec
[sec_idx
].data
+ offset
,
224 FW_PAGING_SIZE
* mvm
->num_of_pages_in_last_blk
);
227 "Paging: copied %d pages in the last block %d\n",
228 mvm
->num_of_pages_in_last_blk
, idx
);
234 static int iwl_alloc_fw_paging_mem(struct iwl_mvm
*mvm
,
235 const struct fw_img
*image
)
240 int order
, num_of_pages
;
243 if (mvm
->fw_paging_db
[0].fw_paging_block
)
246 dma_enabled
= is_device_dma_capable(mvm
->trans
->dev
);
248 /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */
249 BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE
) != PAGING_BLOCK_SIZE
);
251 num_of_pages
= image
->paging_mem_size
/ FW_PAGING_SIZE
;
252 mvm
->num_of_paging_blk
= ((num_of_pages
- 1) /
253 NUM_OF_PAGE_PER_GROUP
) + 1;
255 mvm
->num_of_pages_in_last_blk
=
257 NUM_OF_PAGE_PER_GROUP
* (mvm
->num_of_paging_blk
- 1);
260 "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n",
261 mvm
->num_of_paging_blk
,
262 mvm
->num_of_pages_in_last_blk
);
264 /* allocate block of 4Kbytes for paging CSS */
265 order
= get_order(FW_PAGING_SIZE
);
266 block
= alloc_pages(GFP_KERNEL
, order
);
268 /* free all the previous pages since we failed */
269 iwl_free_fw_paging(mvm
);
273 mvm
->fw_paging_db
[blk_idx
].fw_paging_block
= block
;
274 mvm
->fw_paging_db
[blk_idx
].fw_paging_size
= FW_PAGING_SIZE
;
277 phys
= dma_map_page(mvm
->trans
->dev
, block
, 0,
278 PAGE_SIZE
<< order
, DMA_BIDIRECTIONAL
);
279 if (dma_mapping_error(mvm
->trans
->dev
, phys
)) {
281 * free the previous pages and the current one since
282 * we failed to map_page.
284 iwl_free_fw_paging(mvm
);
287 mvm
->fw_paging_db
[blk_idx
].fw_paging_phys
= phys
;
289 mvm
->fw_paging_db
[blk_idx
].fw_paging_phys
= PAGING_ADDR_SIG
|
290 blk_idx
<< BLOCK_2_EXP_SIZE
;
294 "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n",
298 * allocate blocks in dram.
299 * since that CSS allocated in fw_paging_db[0] loop start from index 1
301 for (blk_idx
= 1; blk_idx
< mvm
->num_of_paging_blk
+ 1; blk_idx
++) {
302 /* allocate block of PAGING_BLOCK_SIZE (32K) */
303 order
= get_order(PAGING_BLOCK_SIZE
);
304 block
= alloc_pages(GFP_KERNEL
, order
);
306 /* free all the previous pages since we failed */
307 iwl_free_fw_paging(mvm
);
311 mvm
->fw_paging_db
[blk_idx
].fw_paging_block
= block
;
312 mvm
->fw_paging_db
[blk_idx
].fw_paging_size
= PAGING_BLOCK_SIZE
;
315 phys
= dma_map_page(mvm
->trans
->dev
, block
, 0,
318 if (dma_mapping_error(mvm
->trans
->dev
, phys
)) {
320 * free the previous pages and the current one
321 * since we failed to map_page.
323 iwl_free_fw_paging(mvm
);
326 mvm
->fw_paging_db
[blk_idx
].fw_paging_phys
= phys
;
328 mvm
->fw_paging_db
[blk_idx
].fw_paging_phys
=
330 blk_idx
<< BLOCK_2_EXP_SIZE
;
334 "Paging: allocated 32K bytes (order %d) for firmware paging.\n",
341 static int iwl_save_fw_paging(struct iwl_mvm
*mvm
,
342 const struct fw_img
*fw
)
346 ret
= iwl_alloc_fw_paging_mem(mvm
, fw
);
350 return iwl_fill_paging_mem(mvm
, fw
);
353 /* send paging cmd to FW in case CPU2 has paging image */
354 static int iwl_send_paging_cmd(struct iwl_mvm
*mvm
, const struct fw_img
*fw
)
358 struct iwl_fw_paging_cmd fw_paging_cmd
= {
360 cpu_to_le32(PAGING_CMD_IS_SECURED
|
361 PAGING_CMD_IS_ENABLED
|
362 (mvm
->num_of_pages_in_last_blk
<<
363 PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS
)),
364 .block_size
= cpu_to_le32(BLOCK_2_EXP_SIZE
),
365 .block_num
= cpu_to_le32(mvm
->num_of_paging_blk
),
368 /* loop for for all paging blocks + CSS block */
369 for (blk_idx
= 0; blk_idx
< mvm
->num_of_paging_blk
+ 1; blk_idx
++) {
371 cpu_to_le32(mvm
->fw_paging_db
[blk_idx
].fw_paging_phys
>>
373 fw_paging_cmd
.device_phy_addr
[blk_idx
] = dev_phy_addr
;
376 return iwl_mvm_send_cmd_pdu(mvm
, iwl_cmd_id(FW_PAGING_BLOCK_CMD
,
377 IWL_ALWAYS_LONG_GROUP
, 0),
378 0, sizeof(fw_paging_cmd
), &fw_paging_cmd
);
382 * Send paging item cmd to FW in case CPU2 has paging image
384 static int iwl_trans_get_paging_item(struct iwl_mvm
*mvm
)
387 struct iwl_fw_get_item_cmd fw_get_item_cmd
= {
388 .item_id
= cpu_to_le32(IWL_FW_ITEM_ID_PAGING
),
391 struct iwl_fw_get_item_resp
*item_resp
;
392 struct iwl_host_cmd cmd
= {
393 .id
= iwl_cmd_id(FW_GET_ITEM_CMD
, IWL_ALWAYS_LONG_GROUP
, 0),
394 .flags
= CMD_WANT_SKB
| CMD_SEND_IN_RFKILL
,
395 .data
= { &fw_get_item_cmd
, },
398 cmd
.len
[0] = sizeof(struct iwl_fw_get_item_cmd
);
400 ret
= iwl_mvm_send_cmd(mvm
, &cmd
);
403 "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n",
408 item_resp
= (void *)((struct iwl_rx_packet
*)cmd
.resp_pkt
)->data
;
409 if (item_resp
->item_id
!= cpu_to_le32(IWL_FW_ITEM_ID_PAGING
)) {
411 "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n",
412 le32_to_cpu(item_resp
->item_id
));
417 /* Add an extra page for headers */
418 mvm
->trans
->paging_download_buf
= kzalloc(PAGING_BLOCK_SIZE
+
421 if (!mvm
->trans
->paging_download_buf
) {
425 mvm
->trans
->paging_req_addr
= le32_to_cpu(item_resp
->item_val
);
426 mvm
->trans
->paging_db
= mvm
->fw_paging_db
;
428 "Paging: got paging request address (paging_req_addr 0x%08x)\n",
429 mvm
->trans
->paging_req_addr
);
437 static bool iwl_alive_fn(struct iwl_notif_wait_data
*notif_wait
,
438 struct iwl_rx_packet
*pkt
, void *data
)
440 struct iwl_mvm
*mvm
=
441 container_of(notif_wait
, struct iwl_mvm
, notif_wait
);
442 struct iwl_mvm_alive_data
*alive_data
= data
;
443 struct mvm_alive_resp_ver1
*palive1
;
444 struct mvm_alive_resp_ver2
*palive2
;
445 struct mvm_alive_resp
*palive
;
447 if (iwl_rx_packet_payload_len(pkt
) == sizeof(*palive1
)) {
448 palive1
= (void *)pkt
->data
;
450 mvm
->support_umac_log
= false;
451 mvm
->error_event_table
=
452 le32_to_cpu(palive1
->error_event_table_ptr
);
453 mvm
->log_event_table
=
454 le32_to_cpu(palive1
->log_event_table_ptr
);
455 alive_data
->scd_base_addr
= le32_to_cpu(palive1
->scd_base_ptr
);
457 alive_data
->valid
= le16_to_cpu(palive1
->status
) ==
460 "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
461 le16_to_cpu(palive1
->status
), palive1
->ver_type
,
462 palive1
->ver_subtype
, palive1
->flags
);
463 } else if (iwl_rx_packet_payload_len(pkt
) == sizeof(*palive2
)) {
464 palive2
= (void *)pkt
->data
;
466 mvm
->error_event_table
=
467 le32_to_cpu(palive2
->error_event_table_ptr
);
468 mvm
->log_event_table
=
469 le32_to_cpu(palive2
->log_event_table_ptr
);
470 alive_data
->scd_base_addr
= le32_to_cpu(palive2
->scd_base_ptr
);
471 mvm
->umac_error_event_table
=
472 le32_to_cpu(palive2
->error_info_addr
);
473 mvm
->sf_space
.addr
= le32_to_cpu(palive2
->st_fwrd_addr
);
474 mvm
->sf_space
.size
= le32_to_cpu(palive2
->st_fwrd_size
);
476 alive_data
->valid
= le16_to_cpu(palive2
->status
) ==
478 if (mvm
->umac_error_event_table
)
479 mvm
->support_umac_log
= true;
482 "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
483 le16_to_cpu(palive2
->status
), palive2
->ver_type
,
484 palive2
->ver_subtype
, palive2
->flags
);
487 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
488 palive2
->umac_major
, palive2
->umac_minor
);
489 } else if (iwl_rx_packet_payload_len(pkt
) == sizeof(*palive
)) {
490 palive
= (void *)pkt
->data
;
492 mvm
->error_event_table
=
493 le32_to_cpu(palive
->error_event_table_ptr
);
494 mvm
->log_event_table
=
495 le32_to_cpu(palive
->log_event_table_ptr
);
496 alive_data
->scd_base_addr
= le32_to_cpu(palive
->scd_base_ptr
);
497 mvm
->umac_error_event_table
=
498 le32_to_cpu(palive
->error_info_addr
);
499 mvm
->sf_space
.addr
= le32_to_cpu(palive
->st_fwrd_addr
);
500 mvm
->sf_space
.size
= le32_to_cpu(palive
->st_fwrd_size
);
502 alive_data
->valid
= le16_to_cpu(palive
->status
) ==
504 if (mvm
->umac_error_event_table
)
505 mvm
->support_umac_log
= true;
508 "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
509 le16_to_cpu(palive
->status
), palive
->ver_type
,
510 palive
->ver_subtype
, palive
->flags
);
513 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
514 le32_to_cpu(palive
->umac_major
),
515 le32_to_cpu(palive
->umac_minor
));
521 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data
*notif_wait
,
522 struct iwl_rx_packet
*pkt
, void *data
)
524 struct iwl_phy_db
*phy_db
= data
;
526 if (pkt
->hdr
.cmd
!= CALIB_RES_NOTIF_PHY_DB
) {
527 WARN_ON(pkt
->hdr
.cmd
!= INIT_COMPLETE_NOTIF
);
531 WARN_ON(iwl_phy_db_set_section(phy_db
, pkt
, GFP_ATOMIC
));
536 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm
*mvm
,
537 enum iwl_ucode_type ucode_type
)
539 struct iwl_notification_wait alive_wait
;
540 struct iwl_mvm_alive_data alive_data
;
541 const struct fw_img
*fw
;
543 enum iwl_ucode_type old_type
= mvm
->cur_ucode
;
544 static const u16 alive_cmd
[] = { MVM_ALIVE
};
545 struct iwl_sf_region st_fwrd_space
;
547 if (ucode_type
== IWL_UCODE_REGULAR
&&
548 iwl_fw_dbg_conf_usniffer(mvm
->fw
, FW_DBG_START_FROM_ALIVE
) &&
549 !(fw_has_capa(&mvm
->fw
->ucode_capa
,
550 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED
)))
551 fw
= iwl_get_ucode_image(mvm
, IWL_UCODE_REGULAR_USNIFFER
);
553 fw
= iwl_get_ucode_image(mvm
, ucode_type
);
556 mvm
->cur_ucode
= ucode_type
;
557 mvm
->ucode_loaded
= false;
559 iwl_init_notification_wait(&mvm
->notif_wait
, &alive_wait
,
560 alive_cmd
, ARRAY_SIZE(alive_cmd
),
561 iwl_alive_fn
, &alive_data
);
563 ret
= iwl_trans_start_fw(mvm
->trans
, fw
, ucode_type
== IWL_UCODE_INIT
);
565 mvm
->cur_ucode
= old_type
;
566 iwl_remove_notification(&mvm
->notif_wait
, &alive_wait
);
571 * Some things may run in the background now, but we
572 * just wait for the ALIVE notification here.
574 ret
= iwl_wait_notification(&mvm
->notif_wait
, &alive_wait
,
575 MVM_UCODE_ALIVE_TIMEOUT
);
577 if (mvm
->trans
->cfg
->device_family
== IWL_DEVICE_FAMILY_8000
)
579 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
580 iwl_read_prph(mvm
->trans
, SB_CPU_1_STATUS
),
581 iwl_read_prph(mvm
->trans
, SB_CPU_2_STATUS
));
582 mvm
->cur_ucode
= old_type
;
586 if (!alive_data
.valid
) {
587 IWL_ERR(mvm
, "Loaded ucode is not valid!\n");
588 mvm
->cur_ucode
= old_type
;
593 * update the sdio allocation according to the pointer we get in the
594 * alive notification.
596 st_fwrd_space
.addr
= mvm
->sf_space
.addr
;
597 st_fwrd_space
.size
= mvm
->sf_space
.size
;
598 ret
= iwl_trans_update_sf(mvm
->trans
, &st_fwrd_space
);
600 IWL_ERR(mvm
, "Failed to update SF size. ret %d\n", ret
);
604 iwl_trans_fw_alive(mvm
->trans
, alive_data
.scd_base_addr
);
607 * configure and operate fw paging mechanism.
608 * driver configures the paging flow only once, CPU2 paging image
609 * included in the IWL_UCODE_INIT image.
611 if (fw
->paging_mem_size
) {
613 * When dma is not enabled, the driver needs to copy / write
614 * the downloaded / uploaded page to / from the smem.
615 * This gets the location of the place were the pages are
618 if (!is_device_dma_capable(mvm
->trans
->dev
)) {
619 ret
= iwl_trans_get_paging_item(mvm
);
621 IWL_ERR(mvm
, "failed to get FW paging item\n");
626 ret
= iwl_save_fw_paging(mvm
, fw
);
628 IWL_ERR(mvm
, "failed to save the FW paging image\n");
632 ret
= iwl_send_paging_cmd(mvm
, fw
);
634 IWL_ERR(mvm
, "failed to send the paging cmd\n");
635 iwl_free_fw_paging(mvm
);
641 * Note: all the queues are enabled as part of the interface
642 * initialization, but in firmware restart scenarios they
643 * could be stopped, so wake them up. In firmware restart,
644 * mac80211 will have the queues stopped as well until the
645 * reconfiguration completes. During normal startup, they
649 memset(&mvm
->queue_info
, 0, sizeof(mvm
->queue_info
));
650 mvm
->queue_info
[IWL_MVM_CMD_QUEUE
].hw_queue_refcount
= 1;
652 for (i
= 0; i
< IEEE80211_MAX_QUEUES
; i
++)
653 atomic_set(&mvm
->mac80211_queue_stop_count
[i
], 0);
655 mvm
->ucode_loaded
= true;
660 static int iwl_send_phy_cfg_cmd(struct iwl_mvm
*mvm
)
662 struct iwl_phy_cfg_cmd phy_cfg_cmd
;
663 enum iwl_ucode_type ucode_type
= mvm
->cur_ucode
;
666 phy_cfg_cmd
.phy_cfg
= cpu_to_le32(iwl_mvm_get_phy_config(mvm
));
667 phy_cfg_cmd
.calib_control
.event_trigger
=
668 mvm
->fw
->default_calib
[ucode_type
].event_trigger
;
669 phy_cfg_cmd
.calib_control
.flow_trigger
=
670 mvm
->fw
->default_calib
[ucode_type
].flow_trigger
;
672 IWL_DEBUG_INFO(mvm
, "Sending Phy CFG command: 0x%x\n",
673 phy_cfg_cmd
.phy_cfg
);
675 return iwl_mvm_send_cmd_pdu(mvm
, PHY_CONFIGURATION_CMD
, 0,
676 sizeof(phy_cfg_cmd
), &phy_cfg_cmd
);
679 int iwl_run_init_mvm_ucode(struct iwl_mvm
*mvm
, bool read_nvm
)
681 struct iwl_notification_wait calib_wait
;
682 static const u16 init_complete
[] = {
684 CALIB_RES_NOTIF_PHY_DB
688 lockdep_assert_held(&mvm
->mutex
);
690 if (WARN_ON_ONCE(mvm
->calibrating
))
693 iwl_init_notification_wait(&mvm
->notif_wait
,
696 ARRAY_SIZE(init_complete
),
697 iwl_wait_phy_db_entry
,
700 /* Will also start the device */
701 ret
= iwl_mvm_load_ucode_wait_alive(mvm
, IWL_UCODE_INIT
);
703 IWL_ERR(mvm
, "Failed to start INIT ucode: %d\n", ret
);
707 ret
= iwl_send_bt_init_conf(mvm
);
711 /* Read the NVM only at driver load time, no need to do this twice */
714 ret
= iwl_nvm_init(mvm
, true);
716 IWL_ERR(mvm
, "Failed to read NVM: %d\n", ret
);
721 /* In case we read the NVM from external file, load it to the NIC */
722 if (mvm
->nvm_file_name
)
723 iwl_mvm_load_nvm_to_nic(mvm
);
725 ret
= iwl_nvm_check_version(mvm
->nvm_data
, mvm
->trans
);
729 * abort after reading the nvm in case RF Kill is on, we will complete
730 * the init seq later when RF kill will switch to off
732 if (iwl_mvm_is_radio_hw_killed(mvm
)) {
733 IWL_DEBUG_RF_KILL(mvm
,
734 "jump over all phy activities due to RF kill\n");
735 iwl_remove_notification(&mvm
->notif_wait
, &calib_wait
);
740 mvm
->calibrating
= true;
742 /* Send TX valid antennas before triggering calibrations */
743 ret
= iwl_send_tx_ant_cfg(mvm
, iwl_mvm_get_valid_tx_ant(mvm
));
748 * Send phy configurations command to init uCode
749 * to start the 16.0 uCode init image internal calibrations.
751 ret
= iwl_send_phy_cfg_cmd(mvm
);
753 IWL_ERR(mvm
, "Failed to run INIT calibrations: %d\n",
759 * Some things may run in the background now, but we
760 * just wait for the calibration complete notification.
762 ret
= iwl_wait_notification(&mvm
->notif_wait
, &calib_wait
,
763 MVM_UCODE_CALIB_TIMEOUT
);
765 if (ret
&& iwl_mvm_is_radio_hw_killed(mvm
)) {
766 IWL_DEBUG_RF_KILL(mvm
, "RFKILL while calibrating.\n");
772 iwl_remove_notification(&mvm
->notif_wait
, &calib_wait
);
774 mvm
->calibrating
= false;
775 if (iwlmvm_mod_params
.init_dbg
&& !mvm
->nvm_data
) {
776 /* we want to debug INIT and we have no NVM - fake */
777 mvm
->nvm_data
= kzalloc(sizeof(struct iwl_nvm_data
) +
778 sizeof(struct ieee80211_channel
) +
779 sizeof(struct ieee80211_rate
),
783 mvm
->nvm_data
->bands
[0].channels
= mvm
->nvm_data
->channels
;
784 mvm
->nvm_data
->bands
[0].n_channels
= 1;
785 mvm
->nvm_data
->bands
[0].n_bitrates
= 1;
786 mvm
->nvm_data
->bands
[0].bitrates
=
787 (void *)mvm
->nvm_data
->channels
+ 1;
788 mvm
->nvm_data
->bands
[0].bitrates
->hw_value
= 10;
794 static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm
*mvm
)
796 struct iwl_host_cmd cmd
= {
797 .id
= SHARED_MEM_CFG
,
798 .flags
= CMD_WANT_SKB
,
802 struct iwl_rx_packet
*pkt
;
803 struct iwl_shared_mem_cfg
*mem_cfg
;
806 lockdep_assert_held(&mvm
->mutex
);
808 if (WARN_ON(iwl_mvm_send_cmd(mvm
, &cmd
)))
812 mem_cfg
= (void *)pkt
->data
;
814 mvm
->shared_mem_cfg
.shared_mem_addr
=
815 le32_to_cpu(mem_cfg
->shared_mem_addr
);
816 mvm
->shared_mem_cfg
.shared_mem_size
=
817 le32_to_cpu(mem_cfg
->shared_mem_size
);
818 mvm
->shared_mem_cfg
.sample_buff_addr
=
819 le32_to_cpu(mem_cfg
->sample_buff_addr
);
820 mvm
->shared_mem_cfg
.sample_buff_size
=
821 le32_to_cpu(mem_cfg
->sample_buff_size
);
822 mvm
->shared_mem_cfg
.txfifo_addr
= le32_to_cpu(mem_cfg
->txfifo_addr
);
823 for (i
= 0; i
< ARRAY_SIZE(mvm
->shared_mem_cfg
.txfifo_size
); i
++)
824 mvm
->shared_mem_cfg
.txfifo_size
[i
] =
825 le32_to_cpu(mem_cfg
->txfifo_size
[i
]);
826 for (i
= 0; i
< ARRAY_SIZE(mvm
->shared_mem_cfg
.rxfifo_size
); i
++)
827 mvm
->shared_mem_cfg
.rxfifo_size
[i
] =
828 le32_to_cpu(mem_cfg
->rxfifo_size
[i
]);
829 mvm
->shared_mem_cfg
.page_buff_addr
=
830 le32_to_cpu(mem_cfg
->page_buff_addr
);
831 mvm
->shared_mem_cfg
.page_buff_size
=
832 le32_to_cpu(mem_cfg
->page_buff_size
);
833 IWL_DEBUG_INFO(mvm
, "SHARED MEM CFG: got memory offsets/sizes\n");
838 static int iwl_mvm_config_ltr(struct iwl_mvm
*mvm
)
840 struct iwl_ltr_config_cmd cmd
= {
841 .flags
= cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE
),
844 if (!mvm
->trans
->ltr_enabled
)
847 return iwl_mvm_send_cmd_pdu(mvm
, LTR_CONFIG
, 0,
851 int iwl_mvm_up(struct iwl_mvm
*mvm
)
854 struct ieee80211_channel
*chan
;
855 struct cfg80211_chan_def chandef
;
857 lockdep_assert_held(&mvm
->mutex
);
859 ret
= iwl_trans_start_hw(mvm
->trans
);
864 * If we haven't completed the run of the init ucode during
865 * module loading, load init ucode now
866 * (for example, if we were in RFKILL)
868 ret
= iwl_run_init_mvm_ucode(mvm
, false);
869 if (ret
&& !iwlmvm_mod_params
.init_dbg
) {
870 IWL_ERR(mvm
, "Failed to run INIT ucode: %d\n", ret
);
871 /* this can't happen */
872 if (WARN_ON(ret
> 0))
876 if (!iwlmvm_mod_params
.init_dbg
) {
878 * Stop and start the transport without entering low power
879 * mode. This will save the state of other components on the
880 * device that are triggered by the INIT firwmare (MFUART).
882 _iwl_trans_stop_device(mvm
->trans
, false);
883 ret
= _iwl_trans_start_hw(mvm
->trans
, false);
888 if (iwlmvm_mod_params
.init_dbg
)
891 ret
= iwl_mvm_load_ucode_wait_alive(mvm
, IWL_UCODE_REGULAR
);
893 IWL_ERR(mvm
, "Failed to start RT ucode: %d\n", ret
);
897 iwl_mvm_get_shared_mem_conf(mvm
);
899 ret
= iwl_mvm_sf_update(mvm
, NULL
, false);
901 IWL_ERR(mvm
, "Failed to initialize Smart Fifo\n");
903 mvm
->fw_dbg_conf
= FW_DBG_INVALID
;
904 /* if we have a destination, assume EARLY START */
905 if (mvm
->fw
->dbg_dest_tlv
)
906 mvm
->fw_dbg_conf
= FW_DBG_START_FROM_ALIVE
;
907 iwl_mvm_start_fw_dbg_conf(mvm
, FW_DBG_START_FROM_ALIVE
);
909 ret
= iwl_send_tx_ant_cfg(mvm
, iwl_mvm_get_valid_tx_ant(mvm
));
913 ret
= iwl_send_bt_init_conf(mvm
);
917 /* Send phy db control command and then phy db calibration*/
918 ret
= iwl_send_phy_db_data(mvm
->phy_db
);
922 ret
= iwl_send_phy_cfg_cmd(mvm
);
926 /* Init RSS configuration */
927 if (iwl_mvm_has_new_rx_api(mvm
)) {
928 ret
= iwl_send_rss_cfg_cmd(mvm
);
930 IWL_ERR(mvm
, "Failed to configure RSS queues: %d\n",
936 /* init the fw <-> mac80211 STA mapping */
937 for (i
= 0; i
< IWL_MVM_STATION_COUNT
; i
++)
938 RCU_INIT_POINTER(mvm
->fw_id_to_mac_id
[i
], NULL
);
940 mvm
->tdls_cs
.peer
.sta_id
= IWL_MVM_STATION_COUNT
;
942 /* reset quota debouncing buffer - 0xff will yield invalid data */
943 memset(&mvm
->last_quota_cmd
, 0xff, sizeof(mvm
->last_quota_cmd
));
945 /* Add auxiliary station for scanning */
946 ret
= iwl_mvm_add_aux_sta(mvm
);
950 /* Add all the PHY contexts */
951 chan
= &mvm
->hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
]->channels
[0];
952 cfg80211_chandef_create(&chandef
, chan
, NL80211_CHAN_NO_HT
);
953 for (i
= 0; i
< NUM_PHY_CTX
; i
++) {
955 * The channel used here isn't relevant as it's
956 * going to be overwritten in the other flows.
957 * For now use the first channel we have.
959 ret
= iwl_mvm_phy_ctxt_add(mvm
, &mvm
->phy_ctxts
[i
],
965 #ifdef CONFIG_THERMAL
966 if (iwl_mvm_is_tt_in_fw(mvm
)) {
967 /* in order to give the responsibility of ct-kill and
968 * TX backoff to FW we need to send empty temperature reporting
969 * cmd during init time
971 iwl_mvm_send_temp_report_ths_cmd(mvm
);
973 /* Initialize tx backoffs to the minimal possible */
974 iwl_mvm_tt_tx_backoff(mvm
, 0);
977 /* TODO: read the budget from BIOS / Platform NVM */
978 if (iwl_mvm_is_ctdp_supported(mvm
) && mvm
->cooling_dev
.cur_state
> 0)
979 ret
= iwl_mvm_ctdp_command(mvm
, CTDP_CMD_OPERATION_START
,
980 mvm
->cooling_dev
.cur_state
);
982 /* Initialize tx backoffs to the minimal possible */
983 iwl_mvm_tt_tx_backoff(mvm
, 0);
986 WARN_ON(iwl_mvm_config_ltr(mvm
));
988 ret
= iwl_mvm_power_update_device(mvm
);
993 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
994 * anyway, so don't init MCC.
996 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL
, &mvm
->status
)) {
997 ret
= iwl_mvm_init_mcc(mvm
);
1002 if (fw_has_capa(&mvm
->fw
->ucode_capa
, IWL_UCODE_TLV_CAPA_UMAC_SCAN
)) {
1003 mvm
->scan_type
= IWL_SCAN_TYPE_NOT_SET
;
1004 ret
= iwl_mvm_config_scan(mvm
);
1009 if (iwl_mvm_is_csum_supported(mvm
) &&
1010 mvm
->cfg
->features
& NETIF_F_RXCSUM
)
1011 iwl_trans_write_prph(mvm
->trans
, RX_EN_CSUM
, 0x3);
1013 /* allow FW/transport low power modes if not during restart */
1014 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART
, &mvm
->status
))
1015 iwl_mvm_unref(mvm
, IWL_MVM_REF_UCODE_DOWN
);
1017 IWL_DEBUG_INFO(mvm
, "RT uCode started.\n");
1020 iwl_mvm_stop_device(mvm
);
1024 int iwl_mvm_load_d3_fw(struct iwl_mvm
*mvm
)
1028 lockdep_assert_held(&mvm
->mutex
);
1030 ret
= iwl_trans_start_hw(mvm
->trans
);
1034 ret
= iwl_mvm_load_ucode_wait_alive(mvm
, IWL_UCODE_WOWLAN
);
1036 IWL_ERR(mvm
, "Failed to start WoWLAN firmware: %d\n", ret
);
1040 ret
= iwl_send_tx_ant_cfg(mvm
, iwl_mvm_get_valid_tx_ant(mvm
));
1044 /* Send phy db control command and then phy db calibration*/
1045 ret
= iwl_send_phy_db_data(mvm
->phy_db
);
1049 ret
= iwl_send_phy_cfg_cmd(mvm
);
1053 /* init the fw <-> mac80211 STA mapping */
1054 for (i
= 0; i
< IWL_MVM_STATION_COUNT
; i
++)
1055 RCU_INIT_POINTER(mvm
->fw_id_to_mac_id
[i
], NULL
);
1057 /* Add auxiliary station for scanning */
1058 ret
= iwl_mvm_add_aux_sta(mvm
);
1064 iwl_mvm_stop_device(mvm
);
1068 void iwl_mvm_rx_card_state_notif(struct iwl_mvm
*mvm
,
1069 struct iwl_rx_cmd_buffer
*rxb
)
1071 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
1072 struct iwl_card_state_notif
*card_state_notif
= (void *)pkt
->data
;
1073 u32 flags
= le32_to_cpu(card_state_notif
->flags
);
1075 IWL_DEBUG_RF_KILL(mvm
, "Card state received: HW:%s SW:%s CT:%s\n",
1076 (flags
& HW_CARD_DISABLED
) ? "Kill" : "On",
1077 (flags
& SW_CARD_DISABLED
) ? "Kill" : "On",
1078 (flags
& CT_KILL_CARD_DISABLED
) ?
1079 "Reached" : "Not reached");
1082 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm
*mvm
,
1083 struct iwl_rx_cmd_buffer
*rxb
)
1085 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
1086 struct iwl_mfuart_load_notif
*mfuart_notif
= (void *)pkt
->data
;
1089 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1090 le32_to_cpu(mfuart_notif
->installed_ver
),
1091 le32_to_cpu(mfuart_notif
->external_ver
),
1092 le32_to_cpu(mfuart_notif
->status
),
1093 le32_to_cpu(mfuart_notif
->duration
));