1 /******************************************************************************
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <linux/firmware.h>
38 #include <net/mac80211.h>
40 #include <linux/etherdevice.h>
43 #include "iwl-helpers.h"
44 #include "iwl-3945-rs.h"
46 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
47 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
48 IWL_RATE_##r##M_IEEE, \
49 IWL_RATE_##ip##M_INDEX, \
50 IWL_RATE_##in##M_INDEX, \
51 IWL_RATE_##rp##M_INDEX, \
52 IWL_RATE_##rn##M_INDEX, \
53 IWL_RATE_##pp##M_INDEX, \
54 IWL_RATE_##np##M_INDEX, \
55 IWL_RATE_##r##M_INDEX_TABLE, \
56 IWL_RATE_##ip##M_INDEX_TABLE }
60 * rate, prev rate, next rate, prev tgg rate, next tgg rate
62 * If there isn't a valid next or previous rate then INV is used which
63 * maps to IWL_RATE_INVALID
66 const struct iwl3945_rate_info iwl3945_rates
[IWL_RATE_COUNT
] = {
67 IWL_DECLARE_RATE_INFO(1, INV
, 2, INV
, 2, INV
, 2), /* 1mbps */
68 IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
69 IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
70 IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
71 IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
72 IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
73 IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
74 IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
75 IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
76 IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
77 IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
78 IWL_DECLARE_RATE_INFO(54, 48, INV
, 48, INV
, 48, INV
),/* 54mbps */
81 /* 1 = enable the iwl3945_disable_events() function */
82 #define IWL_EVT_DISABLE (0)
83 #define IWL_EVT_DISABLE_SIZE (1532/32)
86 * iwl3945_disable_events - Disable selected events in uCode event log
88 * Disable an event by writing "1"s into "disable"
89 * bitmap in SRAM. Bit position corresponds to Event # (id/type).
90 * Default values of 0 enable uCode events to be logged.
91 * Use for only special debugging. This function is just a placeholder as-is,
92 * you'll need to provide the special bits! ...
93 * ... and set IWL_EVT_DISABLE to 1. */
94 void iwl3945_disable_events(struct iwl3945_priv
*priv
)
98 u32 base
; /* SRAM address of event log header */
99 u32 disable_ptr
; /* SRAM address of event-disable bitmap array */
100 u32 array_size
; /* # of u32 entries in array */
101 u32 evt_disable
[IWL_EVT_DISABLE_SIZE
] = {
102 0x00000000, /* 31 - 0 Event id numbers */
103 0x00000000, /* 63 - 32 */
104 0x00000000, /* 95 - 64 */
105 0x00000000, /* 127 - 96 */
106 0x00000000, /* 159 - 128 */
107 0x00000000, /* 191 - 160 */
108 0x00000000, /* 223 - 192 */
109 0x00000000, /* 255 - 224 */
110 0x00000000, /* 287 - 256 */
111 0x00000000, /* 319 - 288 */
112 0x00000000, /* 351 - 320 */
113 0x00000000, /* 383 - 352 */
114 0x00000000, /* 415 - 384 */
115 0x00000000, /* 447 - 416 */
116 0x00000000, /* 479 - 448 */
117 0x00000000, /* 511 - 480 */
118 0x00000000, /* 543 - 512 */
119 0x00000000, /* 575 - 544 */
120 0x00000000, /* 607 - 576 */
121 0x00000000, /* 639 - 608 */
122 0x00000000, /* 671 - 640 */
123 0x00000000, /* 703 - 672 */
124 0x00000000, /* 735 - 704 */
125 0x00000000, /* 767 - 736 */
126 0x00000000, /* 799 - 768 */
127 0x00000000, /* 831 - 800 */
128 0x00000000, /* 863 - 832 */
129 0x00000000, /* 895 - 864 */
130 0x00000000, /* 927 - 896 */
131 0x00000000, /* 959 - 928 */
132 0x00000000, /* 991 - 960 */
133 0x00000000, /* 1023 - 992 */
134 0x00000000, /* 1055 - 1024 */
135 0x00000000, /* 1087 - 1056 */
136 0x00000000, /* 1119 - 1088 */
137 0x00000000, /* 1151 - 1120 */
138 0x00000000, /* 1183 - 1152 */
139 0x00000000, /* 1215 - 1184 */
140 0x00000000, /* 1247 - 1216 */
141 0x00000000, /* 1279 - 1248 */
142 0x00000000, /* 1311 - 1280 */
143 0x00000000, /* 1343 - 1312 */
144 0x00000000, /* 1375 - 1344 */
145 0x00000000, /* 1407 - 1376 */
146 0x00000000, /* 1439 - 1408 */
147 0x00000000, /* 1471 - 1440 */
148 0x00000000, /* 1503 - 1472 */
151 base
= le32_to_cpu(priv
->card_alive
.log_event_table_ptr
);
152 if (!iwl3945_hw_valid_rtc_data_addr(base
)) {
153 IWL_ERROR("Invalid event log pointer 0x%08X\n", base
);
157 ret
= iwl3945_grab_nic_access(priv
);
159 IWL_WARNING("Can not read from adapter at this time.\n");
163 disable_ptr
= iwl3945_read_targ_mem(priv
, base
+ (4 * sizeof(u32
)));
164 array_size
= iwl3945_read_targ_mem(priv
, base
+ (5 * sizeof(u32
)));
165 iwl3945_release_nic_access(priv
);
167 if (IWL_EVT_DISABLE
&& (array_size
== IWL_EVT_DISABLE_SIZE
)) {
168 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
170 ret
= iwl3945_grab_nic_access(priv
);
171 for (i
= 0; i
< IWL_EVT_DISABLE_SIZE
; i
++)
172 iwl3945_write_targ_mem(priv
,
173 disable_ptr
+ (i
* sizeof(u32
)),
176 iwl3945_release_nic_access(priv
);
178 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
179 IWL_DEBUG_INFO(" by writing \"1\"s into disable bitmap\n");
180 IWL_DEBUG_INFO(" in SRAM at 0x%x, size %d u32s\n",
181 disable_ptr
, array_size
);
187 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
188 * @priv: eeprom and antenna fields are used to determine antenna flags
190 * priv->eeprom is used to determine if antenna AUX/MAIN are reversed
191 * priv->antenna specifies the antenna diversity mode:
193 * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
194 * IWL_ANTENNA_MAIN - Force MAIN antenna
195 * IWL_ANTENNA_AUX - Force AUX antenna
197 __le32
iwl3945_get_antenna_flags(const struct iwl3945_priv
*priv
)
199 switch (priv
->antenna
) {
200 case IWL_ANTENNA_DIVERSITY
:
203 case IWL_ANTENNA_MAIN
:
204 if (priv
->eeprom
.antenna_switch_type
)
205 return RXON_FLG_DIS_DIV_MSK
| RXON_FLG_ANT_B_MSK
;
206 return RXON_FLG_DIS_DIV_MSK
| RXON_FLG_ANT_A_MSK
;
208 case IWL_ANTENNA_AUX
:
209 if (priv
->eeprom
.antenna_switch_type
)
210 return RXON_FLG_DIS_DIV_MSK
| RXON_FLG_ANT_A_MSK
;
211 return RXON_FLG_DIS_DIV_MSK
| RXON_FLG_ANT_B_MSK
;
214 /* bad antenna selector value */
215 IWL_ERROR("Bad antenna selector value (0x%x)\n", priv
->antenna
);
216 return 0; /* "diversity" is default if error */
219 /*****************************************************************************
221 * Intel PRO/Wireless 3945ABG/BG Network Connection
223 * RX handler implementations
227 *****************************************************************************/
229 void iwl3945_hw_rx_statistics(struct iwl3945_priv
*priv
, struct iwl3945_rx_mem_buffer
*rxb
)
231 struct iwl3945_rx_packet
*pkt
= (void *)rxb
->skb
->data
;
232 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
233 (int)sizeof(struct iwl3945_notif_statistics
),
234 le32_to_cpu(pkt
->len
));
236 memcpy(&priv
->statistics
, pkt
->u
.raw
, sizeof(priv
->statistics
));
238 priv
->last_statistics_time
= jiffies
;
241 static void iwl3945_handle_data_packet(struct iwl3945_priv
*priv
, int is_data
,
242 struct iwl3945_rx_mem_buffer
*rxb
,
243 struct ieee80211_rx_status
*stats
,
246 struct ieee80211_hdr
*hdr
;
247 struct iwl3945_rx_packet
*pkt
= (struct iwl3945_rx_packet
*)rxb
->skb
->data
;
248 struct iwl3945_rx_frame_hdr
*rx_hdr
= IWL_RX_HDR(pkt
);
249 struct iwl3945_rx_frame_end
*rx_end
= IWL_RX_END(pkt
);
250 short len
= le16_to_cpu(rx_hdr
->len
);
252 /* We received data from the HW, so stop the watchdog */
253 if (unlikely((len
+ IWL_RX_FRAME_SIZE
) > skb_tailroom(rxb
->skb
))) {
254 IWL_DEBUG_DROP("Corruption detected!\n");
258 /* We only process data packets if the interface is open */
259 if (unlikely(!priv
->is_open
)) {
261 ("Dropping packet while interface is not open.\n");
264 if (priv
->iw_mode
== IEEE80211_IF_TYPE_MNTR
) {
265 if (iwl3945_param_hwcrypto
)
266 iwl3945_set_decrypted_flag(priv
, rxb
->skb
,
267 le32_to_cpu(rx_end
->status
),
269 iwl3945_handle_data_packet_monitor(priv
, rxb
, IWL_RX_DATA(pkt
),
270 len
, stats
, phy_flags
);
274 skb_reserve(rxb
->skb
, (void *)rx_hdr
->payload
- (void *)pkt
);
275 /* Set the size of the skb to the size of the frame */
276 skb_put(rxb
->skb
, le16_to_cpu(rx_hdr
->len
));
278 hdr
= (void *)rxb
->skb
->data
;
280 if (iwl3945_param_hwcrypto
)
281 iwl3945_set_decrypted_flag(priv
, rxb
->skb
,
282 le32_to_cpu(rx_end
->status
), stats
);
284 ieee80211_rx_irqsafe(priv
->hw
, rxb
->skb
, stats
);
288 static void iwl3945_rx_reply_rx(struct iwl3945_priv
*priv
,
289 struct iwl3945_rx_mem_buffer
*rxb
)
291 struct iwl3945_rx_packet
*pkt
= (void *)rxb
->skb
->data
;
292 struct iwl3945_rx_frame_stats
*rx_stats
= IWL_RX_STATS(pkt
);
293 struct iwl3945_rx_frame_hdr
*rx_hdr
= IWL_RX_HDR(pkt
);
294 struct iwl3945_rx_frame_end
*rx_end
= IWL_RX_END(pkt
);
295 struct ieee80211_hdr
*header
;
296 u16 phy_flags
= le16_to_cpu(rx_hdr
->phy_flags
);
297 u16 rx_stats_sig_avg
= le16_to_cpu(rx_stats
->sig_avg
);
298 u16 rx_stats_noise_diff
= le16_to_cpu(rx_stats
->noise_diff
);
299 struct ieee80211_rx_status stats
= {
300 .mactime
= le64_to_cpu(rx_end
->timestamp
),
301 .freq
= ieee80211chan2mhz(le16_to_cpu(rx_hdr
->channel
)),
302 .channel
= le16_to_cpu(rx_hdr
->channel
),
303 .phymode
= (rx_hdr
->phy_flags
& RX_RES_PHY_FLAGS_BAND_24_MSK
) ?
304 MODE_IEEE80211G
: MODE_IEEE80211A
,
306 .rate
= rx_hdr
->rate
,
312 if ((unlikely(rx_stats
->phy_count
> 20))) {
314 ("dsp size out of range [0,20]: "
315 "%d/n", rx_stats
->phy_count
);
319 if (!(rx_end
->status
& RX_RES_STATUS_NO_CRC32_ERROR
)
320 || !(rx_end
->status
& RX_RES_STATUS_NO_RXE_OVERFLOW
)) {
321 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end
->status
);
325 if (priv
->iw_mode
== IEEE80211_IF_TYPE_MNTR
) {
326 iwl3945_handle_data_packet(priv
, 1, rxb
, &stats
, phy_flags
);
330 /* Convert 3945's rssi indicator to dBm */
331 stats
.ssi
= rx_stats
->rssi
- IWL_RSSI_OFFSET
;
333 /* Set default noise value to -127 */
334 if (priv
->last_rx_noise
== 0)
335 priv
->last_rx_noise
= IWL_NOISE_MEAS_NOT_AVAILABLE
;
337 /* 3945 provides noise info for OFDM frames only.
338 * sig_avg and noise_diff are measured by the 3945's digital signal
339 * processor (DSP), and indicate linear levels of signal level and
340 * distortion/noise within the packet preamble after
341 * automatic gain control (AGC). sig_avg should stay fairly
342 * constant if the radio's AGC is working well.
343 * Since these values are linear (not dB or dBm), linear
344 * signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
345 * Convert linear SNR to dB SNR, then subtract that from rssi dBm
346 * to obtain noise level in dBm.
347 * Calculate stats.signal (quality indicator in %) based on SNR. */
348 if (rx_stats_noise_diff
) {
349 snr
= rx_stats_sig_avg
/ rx_stats_noise_diff
;
350 stats
.noise
= stats
.ssi
- iwl3945_calc_db_from_ratio(snr
);
351 stats
.signal
= iwl3945_calc_sig_qual(stats
.ssi
, stats
.noise
);
353 /* If noise info not available, calculate signal quality indicator (%)
354 * using just the dBm signal level. */
356 stats
.noise
= priv
->last_rx_noise
;
357 stats
.signal
= iwl3945_calc_sig_qual(stats
.ssi
, 0);
361 IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
362 stats
.ssi
, stats
.noise
, stats
.signal
,
363 rx_stats_sig_avg
, rx_stats_noise_diff
);
365 stats
.freq
= ieee80211chan2mhz(stats
.channel
);
367 /* can be covered by iwl3945_report_frame() in most cases */
368 /* IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
370 header
= (struct ieee80211_hdr
*)IWL_RX_DATA(pkt
);
372 network_packet
= iwl3945_is_network_packet(priv
, header
);
374 #ifdef CONFIG_IWL3945_DEBUG
375 if (iwl3945_debug_level
& IWL_DL_STATS
&& net_ratelimit())
377 ("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
378 network_packet
? '*' : ' ',
379 stats
.channel
, stats
.ssi
, stats
.ssi
,
380 stats
.ssi
, stats
.rate
);
382 if (iwl3945_debug_level
& (IWL_DL_RX
))
383 /* Set "1" to report good data frames in groups of 100 */
384 iwl3945_report_frame(priv
, pkt
, header
, 1);
387 if (network_packet
) {
388 priv
->last_beacon_time
= le32_to_cpu(rx_end
->beacon_timestamp
);
389 priv
->last_tsf
= le64_to_cpu(rx_end
->timestamp
);
390 priv
->last_rx_rssi
= stats
.ssi
;
391 priv
->last_rx_noise
= stats
.noise
;
394 switch (le16_to_cpu(header
->frame_control
) & IEEE80211_FCTL_FTYPE
) {
395 case IEEE80211_FTYPE_MGMT
:
396 switch (le16_to_cpu(header
->frame_control
) &
397 IEEE80211_FCTL_STYPE
) {
398 case IEEE80211_STYPE_PROBE_RESP
:
399 case IEEE80211_STYPE_BEACON
:{
400 /* If this is a beacon or probe response for
401 * our network then cache the beacon
403 if ((((priv
->iw_mode
== IEEE80211_IF_TYPE_STA
)
404 && !compare_ether_addr(header
->addr2
,
406 ((priv
->iw_mode
== IEEE80211_IF_TYPE_IBSS
)
407 && !compare_ether_addr(header
->addr3
,
409 struct ieee80211_mgmt
*mgmt
=
410 (struct ieee80211_mgmt
*)header
;
413 (__le32
*) & mgmt
->u
.beacon
.
415 priv
->timestamp0
= le32_to_cpu(pos
[0]);
416 priv
->timestamp1
= le32_to_cpu(pos
[1]);
417 priv
->beacon_int
= le16_to_cpu(
418 mgmt
->u
.beacon
.beacon_int
);
419 if (priv
->call_post_assoc_from_beacon
&&
421 IEEE80211_IF_TYPE_STA
))
422 queue_work(priv
->workqueue
,
423 &priv
->post_associate
.work
);
425 priv
->call_post_assoc_from_beacon
= 0;
431 case IEEE80211_STYPE_ACTION
:
432 /* TODO: Parse 802.11h frames for CSA... */
436 * TODO: There is no callback function from upper
437 * stack to inform us when associated status. this
438 * work around to sniff assoc_resp management frame
439 * and finish the association process.
441 case IEEE80211_STYPE_ASSOC_RESP
:
442 case IEEE80211_STYPE_REASSOC_RESP
:{
443 struct ieee80211_mgmt
*mgnt
=
444 (struct ieee80211_mgmt
*)header
;
445 priv
->assoc_id
= (~((1 << 15) | (1 << 14)) &
448 priv
->assoc_capability
=
449 le16_to_cpu(mgnt
->u
.assoc_resp
.capab_info
);
450 if (priv
->beacon_int
)
451 queue_work(priv
->workqueue
,
452 &priv
->post_associate
.work
);
454 priv
->call_post_assoc_from_beacon
= 1;
458 case IEEE80211_STYPE_PROBE_REQ
:{
459 DECLARE_MAC_BUF(mac1
);
460 DECLARE_MAC_BUF(mac2
);
461 DECLARE_MAC_BUF(mac3
);
462 if (priv
->iw_mode
== IEEE80211_IF_TYPE_IBSS
)
464 ("Dropping (non network): %s"
466 print_mac(mac1
, header
->addr1
),
467 print_mac(mac2
, header
->addr2
),
468 print_mac(mac3
, header
->addr3
));
473 iwl3945_handle_data_packet(priv
, 0, rxb
, &stats
, phy_flags
);
476 case IEEE80211_FTYPE_CTL
:
479 case IEEE80211_FTYPE_DATA
: {
480 DECLARE_MAC_BUF(mac1
);
481 DECLARE_MAC_BUF(mac2
);
482 DECLARE_MAC_BUF(mac3
);
484 if (unlikely(iwl3945_is_duplicate_packet(priv
, header
)))
485 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
486 print_mac(mac1
, header
->addr1
),
487 print_mac(mac2
, header
->addr2
),
488 print_mac(mac3
, header
->addr3
));
490 iwl3945_handle_data_packet(priv
, 1, rxb
, &stats
,
497 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv
*priv
, void *ptr
,
498 dma_addr_t addr
, u16 len
)
502 struct iwl3945_tfd_frame
*tfd
= (struct iwl3945_tfd_frame
*)ptr
;
504 count
= TFD_CTL_COUNT_GET(le32_to_cpu(tfd
->control_flags
));
505 pad
= TFD_CTL_PAD_GET(le32_to_cpu(tfd
->control_flags
));
507 if ((count
>= NUM_TFD_CHUNKS
) || (count
< 0)) {
508 IWL_ERROR("Error can not send more than %d chunks\n",
513 tfd
->pa
[count
].addr
= cpu_to_le32(addr
);
514 tfd
->pa
[count
].len
= cpu_to_le32(len
);
518 tfd
->control_flags
= cpu_to_le32(TFD_CTL_COUNT_SET(count
) |
519 TFD_CTL_PAD_SET(pad
));
525 * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
527 * Does NOT advance any indexes
529 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv
*priv
, struct iwl3945_tx_queue
*txq
)
531 struct iwl3945_tfd_frame
*bd_tmp
= (struct iwl3945_tfd_frame
*)&txq
->bd
[0];
532 struct iwl3945_tfd_frame
*bd
= &bd_tmp
[txq
->q
.read_ptr
];
533 struct pci_dev
*dev
= priv
->pci_dev
;
538 if (txq
->q
.id
== IWL_CMD_QUEUE_NUM
)
539 /* nothing to cleanup after for host commands */
543 counter
= TFD_CTL_COUNT_GET(le32_to_cpu(bd
->control_flags
));
544 if (counter
> NUM_TFD_CHUNKS
) {
545 IWL_ERROR("Too many chunks: %i\n", counter
);
546 /* @todo issue fatal error, it is quite serious situation */
550 /* unmap chunks if any */
552 for (i
= 1; i
< counter
; i
++) {
553 pci_unmap_single(dev
, le32_to_cpu(bd
->pa
[i
].addr
),
554 le32_to_cpu(bd
->pa
[i
].len
), PCI_DMA_TODEVICE
);
555 if (txq
->txb
[txq
->q
.read_ptr
].skb
[0]) {
556 struct sk_buff
*skb
= txq
->txb
[txq
->q
.read_ptr
].skb
[0];
557 if (txq
->txb
[txq
->q
.read_ptr
].skb
[0]) {
558 /* Can be called from interrupt context */
559 dev_kfree_skb_any(skb
);
560 txq
->txb
[txq
->q
.read_ptr
].skb
[0] = NULL
;
567 u8
iwl3945_hw_find_station(struct iwl3945_priv
*priv
, const u8
*addr
)
570 int ret
= IWL_INVALID_STATION
;
572 DECLARE_MAC_BUF(mac
);
574 spin_lock_irqsave(&priv
->sta_lock
, flags
);
575 for (i
= IWL_STA_ID
; i
< priv
->hw_setting
.max_stations
; i
++)
576 if ((priv
->stations
[i
].used
) &&
578 (priv
->stations
[i
].sta
.sta
.addr
, addr
))) {
583 IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
584 print_mac(mac
, addr
), priv
->num_stations
);
586 spin_unlock_irqrestore(&priv
->sta_lock
, flags
);
591 * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
594 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv
*priv
,
595 struct iwl3945_cmd
*cmd
,
596 struct ieee80211_tx_control
*ctrl
,
597 struct ieee80211_hdr
*hdr
, int sta_id
, int tx_id
)
600 u16 rate_index
= min(ctrl
->tx_rate
& 0xffff, IWL_RATE_COUNT
- 1);
606 u16 fc
= le16_to_cpu(hdr
->frame_control
);
608 rate
= iwl3945_rates
[rate_index
].plcp
;
609 tx_flags
= cmd
->cmd
.tx
.tx_flags
;
611 /* We need to figure out how to get the sta->supp_rates while
612 * in this running context; perhaps encoding into ctrl->tx_rate? */
613 rate_mask
= IWL_RATES_MASK
;
615 spin_lock_irqsave(&priv
->sta_lock
, flags
);
617 priv
->stations
[sta_id
].current_rate
.rate_n_flags
= rate
;
619 if ((priv
->iw_mode
== IEEE80211_IF_TYPE_IBSS
) &&
620 (sta_id
!= IWL3945_BROADCAST_ID
) &&
621 (sta_id
!= IWL_MULTICAST_ID
))
622 priv
->stations
[IWL_STA_ID
].current_rate
.rate_n_flags
= rate
;
624 spin_unlock_irqrestore(&priv
->sta_lock
, flags
);
626 if (tx_id
>= IWL_CMD_QUEUE_NUM
)
631 if (ieee80211_is_probe_response(fc
)) {
632 data_retry_limit
= 3;
633 if (data_retry_limit
< rts_retry_limit
)
634 rts_retry_limit
= data_retry_limit
;
636 data_retry_limit
= IWL_DEFAULT_TX_RETRY
;
638 if (priv
->data_retry_limit
!= -1)
639 data_retry_limit
= priv
->data_retry_limit
;
641 if ((fc
& IEEE80211_FCTL_FTYPE
) == IEEE80211_FTYPE_MGMT
) {
642 switch (fc
& IEEE80211_FCTL_STYPE
) {
643 case IEEE80211_STYPE_AUTH
:
644 case IEEE80211_STYPE_DEAUTH
:
645 case IEEE80211_STYPE_ASSOC_REQ
:
646 case IEEE80211_STYPE_REASSOC_REQ
:
647 if (tx_flags
& TX_CMD_FLG_RTS_MSK
) {
648 tx_flags
&= ~TX_CMD_FLG_RTS_MSK
;
649 tx_flags
|= TX_CMD_FLG_CTS_MSK
;
657 cmd
->cmd
.tx
.rts_retry_limit
= rts_retry_limit
;
658 cmd
->cmd
.tx
.data_retry_limit
= data_retry_limit
;
659 cmd
->cmd
.tx
.rate
= rate
;
660 cmd
->cmd
.tx
.tx_flags
= tx_flags
;
663 cmd
->cmd
.tx
.supp_rates
[0] =
664 ((rate_mask
& IWL_OFDM_RATES_MASK
) >> IWL_FIRST_OFDM_RATE
) & 0xFF;
667 cmd
->cmd
.tx
.supp_rates
[1] = (rate_mask
& 0xF);
669 IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
670 "cck/ofdm mask: 0x%x/0x%x\n", sta_id
,
671 cmd
->cmd
.tx
.rate
, le32_to_cpu(cmd
->cmd
.tx
.tx_flags
),
672 cmd
->cmd
.tx
.supp_rates
[1], cmd
->cmd
.tx
.supp_rates
[0]);
675 u8
iwl3945_sync_sta(struct iwl3945_priv
*priv
, int sta_id
, u16 tx_rate
, u8 flags
)
677 unsigned long flags_spin
;
678 struct iwl3945_station_entry
*station
;
680 if (sta_id
== IWL_INVALID_STATION
)
681 return IWL_INVALID_STATION
;
683 spin_lock_irqsave(&priv
->sta_lock
, flags_spin
);
684 station
= &priv
->stations
[sta_id
];
686 station
->sta
.sta
.modify_mask
= STA_MODIFY_TX_RATE_MSK
;
687 station
->sta
.rate_n_flags
= cpu_to_le16(tx_rate
);
688 station
->current_rate
.rate_n_flags
= tx_rate
;
689 station
->sta
.mode
= STA_CONTROL_MODIFY_MSK
;
691 spin_unlock_irqrestore(&priv
->sta_lock
, flags_spin
);
693 iwl3945_send_add_station(priv
, &station
->sta
, flags
);
694 IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
699 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv
*priv
, int pwr_max
)
704 spin_lock_irqsave(&priv
->lock
, flags
);
705 rc
= iwl3945_grab_nic_access(priv
);
707 spin_unlock_irqrestore(&priv
->lock
, flags
);
714 rc
= pci_read_config_dword(priv
->pci_dev
,
715 PCI_POWER_SOURCE
, &val
);
716 if (val
& PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT
) {
717 iwl3945_set_bits_mask_prph(priv
, APMG_PS_CTRL_REG
,
718 APMG_PS_CTRL_VAL_PWR_SRC_VAUX
,
719 ~APMG_PS_CTRL_MSK_PWR_SRC
);
720 iwl3945_release_nic_access(priv
);
722 iwl3945_poll_bit(priv
, CSR_GPIO_IN
,
723 CSR_GPIO_IN_VAL_VAUX_PWR_SRC
,
724 CSR_GPIO_IN_BIT_AUX_POWER
, 5000);
726 iwl3945_release_nic_access(priv
);
728 iwl3945_set_bits_mask_prph(priv
, APMG_PS_CTRL_REG
,
729 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN
,
730 ~APMG_PS_CTRL_MSK_PWR_SRC
);
732 iwl3945_release_nic_access(priv
);
733 iwl3945_poll_bit(priv
, CSR_GPIO_IN
, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC
,
734 CSR_GPIO_IN_BIT_AUX_POWER
, 5000); /* uS */
736 spin_unlock_irqrestore(&priv
->lock
, flags
);
741 static int iwl3945_rx_init(struct iwl3945_priv
*priv
, struct iwl3945_rx_queue
*rxq
)
746 spin_lock_irqsave(&priv
->lock
, flags
);
747 rc
= iwl3945_grab_nic_access(priv
);
749 spin_unlock_irqrestore(&priv
->lock
, flags
);
753 iwl3945_write_direct32(priv
, FH_RCSR_RBD_BASE(0), rxq
->dma_addr
);
754 iwl3945_write_direct32(priv
, FH_RCSR_RPTR_ADDR(0),
755 priv
->hw_setting
.shared_phys
+
756 offsetof(struct iwl3945_shared
, rx_read_ptr
[0]));
757 iwl3945_write_direct32(priv
, FH_RCSR_WPTR(0), 0);
758 iwl3945_write_direct32(priv
, FH_RCSR_CONFIG(0),
759 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE
|
760 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE
|
761 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN
|
762 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128
|
763 (RX_QUEUE_SIZE_LOG
<< ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE
) |
764 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST
|
765 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH
) |
766 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH
);
768 /* fake read to flush all prev I/O */
769 iwl3945_read_direct32(priv
, FH_RSSR_CTRL
);
771 iwl3945_release_nic_access(priv
);
772 spin_unlock_irqrestore(&priv
->lock
, flags
);
777 static int iwl3945_tx_reset(struct iwl3945_priv
*priv
)
782 spin_lock_irqsave(&priv
->lock
, flags
);
783 rc
= iwl3945_grab_nic_access(priv
);
785 spin_unlock_irqrestore(&priv
->lock
, flags
);
790 iwl3945_write_prph(priv
, ALM_SCD_MODE_REG
, 0x2);
793 iwl3945_write_prph(priv
, ALM_SCD_ARASTAT_REG
, 0x01);
795 /* all 6 fifo are active */
796 iwl3945_write_prph(priv
, ALM_SCD_TXFACT_REG
, 0x3f);
798 iwl3945_write_prph(priv
, ALM_SCD_SBYP_MODE_1_REG
, 0x010000);
799 iwl3945_write_prph(priv
, ALM_SCD_SBYP_MODE_2_REG
, 0x030002);
800 iwl3945_write_prph(priv
, ALM_SCD_TXF4MF_REG
, 0x000004);
801 iwl3945_write_prph(priv
, ALM_SCD_TXF5MF_REG
, 0x000005);
803 iwl3945_write_direct32(priv
, FH_TSSR_CBB_BASE
,
804 priv
->hw_setting
.shared_phys
);
806 iwl3945_write_direct32(priv
, FH_TSSR_MSG_CONFIG
,
807 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON
|
808 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON
|
809 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B
|
810 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON
|
811 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON
|
812 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH
|
813 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH
);
815 iwl3945_release_nic_access(priv
);
816 spin_unlock_irqrestore(&priv
->lock
, flags
);
822 * iwl3945_txq_ctx_reset - Reset TX queue context
824 * Destroys all DMA structures and initialize them again
826 static int iwl3945_txq_ctx_reset(struct iwl3945_priv
*priv
)
829 int txq_id
, slots_num
;
831 iwl3945_hw_txq_ctx_free(priv
);
834 rc
= iwl3945_tx_reset(priv
);
839 for (txq_id
= 0; txq_id
< TFD_QUEUE_MAX
; txq_id
++) {
840 slots_num
= (txq_id
== IWL_CMD_QUEUE_NUM
) ?
841 TFD_CMD_SLOTS
: TFD_TX_CMD_SLOTS
;
842 rc
= iwl3945_tx_queue_init(priv
, &priv
->txq
[txq_id
], slots_num
,
845 IWL_ERROR("Tx %d queue init failed\n", txq_id
);
853 iwl3945_hw_txq_ctx_free(priv
);
857 int iwl3945_hw_nic_init(struct iwl3945_priv
*priv
)
862 struct iwl3945_rx_queue
*rxq
= &priv
->rxq
;
864 iwl3945_power_init_handle(priv
);
866 spin_lock_irqsave(&priv
->lock
, flags
);
867 iwl3945_set_bit(priv
, CSR_ANA_PLL_CFG
, (1 << 24));
868 iwl3945_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
869 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX
);
871 iwl3945_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
872 rc
= iwl3945_poll_bit(priv
, CSR_GP_CNTRL
,
873 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
,
874 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25000);
876 spin_unlock_irqrestore(&priv
->lock
, flags
);
877 IWL_DEBUG_INFO("Failed to init the card\n");
881 rc
= iwl3945_grab_nic_access(priv
);
883 spin_unlock_irqrestore(&priv
->lock
, flags
);
886 iwl3945_write_prph(priv
, APMG_CLK_EN_REG
,
887 APMG_CLK_VAL_DMA_CLK_RQT
|
888 APMG_CLK_VAL_BSM_CLK_RQT
);
890 iwl3945_set_bits_prph(priv
, APMG_PCIDEV_STT_REG
,
891 APMG_PCIDEV_STT_VAL_L1_ACT_DIS
);
892 iwl3945_release_nic_access(priv
);
893 spin_unlock_irqrestore(&priv
->lock
, flags
);
895 /* Determine HW type */
896 rc
= pci_read_config_byte(priv
->pci_dev
, PCI_REVISION_ID
, &rev_id
);
899 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id
);
901 iwl3945_nic_set_pwr_src(priv
, 1);
902 spin_lock_irqsave(&priv
->lock
, flags
);
904 if (rev_id
& PCI_CFG_REV_ID_BIT_RTP
)
905 IWL_DEBUG_INFO("RTP type \n");
906 else if (rev_id
& PCI_CFG_REV_ID_BIT_BASIC_SKU
) {
907 IWL_DEBUG_INFO("ALM-MB type\n");
908 iwl3945_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
909 CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB
);
911 IWL_DEBUG_INFO("ALM-MM type\n");
912 iwl3945_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
913 CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM
);
916 spin_unlock_irqrestore(&priv
->lock
, flags
);
918 /* Initialize the EEPROM */
919 rc
= iwl3945_eeprom_init(priv
);
923 spin_lock_irqsave(&priv
->lock
, flags
);
924 if (EEPROM_SKU_CAP_OP_MODE_MRC
== priv
->eeprom
.sku_cap
) {
925 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
926 iwl3945_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
927 CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC
);
929 IWL_DEBUG_INFO("SKU OP mode is basic\n");
931 if ((priv
->eeprom
.board_revision
& 0xF0) == 0xD0) {
932 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
933 priv
->eeprom
.board_revision
);
934 iwl3945_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
935 CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
);
937 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
938 priv
->eeprom
.board_revision
);
939 iwl3945_clear_bit(priv
, CSR_HW_IF_CONFIG_REG
,
940 CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE
);
943 if (priv
->eeprom
.almgor_m_version
<= 1) {
944 iwl3945_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
945 CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A
);
946 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
947 priv
->eeprom
.almgor_m_version
);
949 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
950 priv
->eeprom
.almgor_m_version
);
951 iwl3945_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
952 CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B
);
954 spin_unlock_irqrestore(&priv
->lock
, flags
);
956 if (priv
->eeprom
.sku_cap
& EEPROM_SKU_CAP_SW_RF_KILL_ENABLE
)
957 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
959 if (priv
->eeprom
.sku_cap
& EEPROM_SKU_CAP_HW_RF_KILL_ENABLE
)
960 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
962 /* Allocate the RX queue, or reset if it is already allocated */
964 rc
= iwl3945_rx_queue_alloc(priv
);
966 IWL_ERROR("Unable to initialize Rx queue\n");
970 iwl3945_rx_queue_reset(priv
, rxq
);
972 iwl3945_rx_replenish(priv
);
974 iwl3945_rx_init(priv
, rxq
);
976 spin_lock_irqsave(&priv
->lock
, flags
);
978 /* Look at using this instead:
979 rxq->need_update = 1;
980 iwl3945_rx_queue_update_write_ptr(priv, rxq);
983 rc
= iwl3945_grab_nic_access(priv
);
985 spin_unlock_irqrestore(&priv
->lock
, flags
);
988 iwl3945_write_direct32(priv
, FH_RCSR_WPTR(0), rxq
->write
& ~7);
989 iwl3945_release_nic_access(priv
);
991 spin_unlock_irqrestore(&priv
->lock
, flags
);
993 rc
= iwl3945_txq_ctx_reset(priv
);
997 set_bit(STATUS_INIT
, &priv
->status
);
1003 * iwl3945_hw_txq_ctx_free - Free TXQ Context
1005 * Destroy all TX DMA queues and structures
1007 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv
*priv
)
1012 for (txq_id
= 0; txq_id
< TFD_QUEUE_MAX
; txq_id
++)
1013 iwl3945_tx_queue_free(priv
, &priv
->txq
[txq_id
]);
1016 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv
*priv
)
1019 unsigned long flags
;
1021 spin_lock_irqsave(&priv
->lock
, flags
);
1022 if (iwl3945_grab_nic_access(priv
)) {
1023 spin_unlock_irqrestore(&priv
->lock
, flags
);
1024 iwl3945_hw_txq_ctx_free(priv
);
1029 iwl3945_write_prph(priv
, ALM_SCD_MODE_REG
, 0);
1031 /* reset TFD queues */
1032 for (queue
= TFD_QUEUE_MIN
; queue
< TFD_QUEUE_MAX
; queue
++) {
1033 iwl3945_write_direct32(priv
, FH_TCSR_CONFIG(queue
), 0x0);
1034 iwl3945_poll_direct_bit(priv
, FH_TSSR_TX_STATUS
,
1035 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue
),
1039 iwl3945_release_nic_access(priv
);
1040 spin_unlock_irqrestore(&priv
->lock
, flags
);
1042 iwl3945_hw_txq_ctx_free(priv
);
1045 int iwl3945_hw_nic_stop_master(struct iwl3945_priv
*priv
)
1049 unsigned long flags
;
1051 spin_lock_irqsave(&priv
->lock
, flags
);
1053 /* set stop master bit */
1054 iwl3945_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_STOP_MASTER
);
1056 reg_val
= iwl3945_read32(priv
, CSR_GP_CNTRL
);
1058 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE
==
1059 (reg_val
& CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE
))
1060 IWL_DEBUG_INFO("Card in power save, master is already "
1063 rc
= iwl3945_poll_bit(priv
, CSR_RESET
,
1064 CSR_RESET_REG_FLAG_MASTER_DISABLED
,
1065 CSR_RESET_REG_FLAG_MASTER_DISABLED
, 100);
1067 spin_unlock_irqrestore(&priv
->lock
, flags
);
1072 spin_unlock_irqrestore(&priv
->lock
, flags
);
1073 IWL_DEBUG_INFO("stop master\n");
1078 int iwl3945_hw_nic_reset(struct iwl3945_priv
*priv
)
1081 unsigned long flags
;
1083 iwl3945_hw_nic_stop_master(priv
);
1085 spin_lock_irqsave(&priv
->lock
, flags
);
1087 iwl3945_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_SW_RESET
);
1089 rc
= iwl3945_poll_bit(priv
, CSR_GP_CNTRL
,
1090 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
,
1091 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25000);
1093 rc
= iwl3945_grab_nic_access(priv
);
1095 iwl3945_write_prph(priv
, APMG_CLK_CTRL_REG
,
1096 APMG_CLK_VAL_BSM_CLK_RQT
);
1100 iwl3945_set_bit(priv
, CSR_GP_CNTRL
,
1101 CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
1103 iwl3945_write_prph(priv
, APMG_RTC_INT_MSK_REG
, 0x0);
1104 iwl3945_write_prph(priv
, APMG_RTC_INT_STT_REG
,
1108 iwl3945_write_prph(priv
, APMG_CLK_EN_REG
,
1109 APMG_CLK_VAL_DMA_CLK_RQT
|
1110 APMG_CLK_VAL_BSM_CLK_RQT
);
1113 iwl3945_set_bits_prph(priv
, APMG_PS_CTRL_REG
,
1114 APMG_PS_CTRL_VAL_RESET_REQ
);
1116 iwl3945_clear_bits_prph(priv
, APMG_PS_CTRL_REG
,
1117 APMG_PS_CTRL_VAL_RESET_REQ
);
1118 iwl3945_release_nic_access(priv
);
1121 /* Clear the 'host command active' bit... */
1122 clear_bit(STATUS_HCMD_ACTIVE
, &priv
->status
);
1124 wake_up_interruptible(&priv
->wait_command_queue
);
1125 spin_unlock_irqrestore(&priv
->lock
, flags
);
1131 * iwl3945_hw_reg_adjust_power_by_temp
1132 * return index delta into power gain settings table
1134 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading
, int old_reading
)
1136 return (new_reading
- old_reading
) * (-11) / 100;
1140 * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1142 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature
)
1144 return (((temperature
< -260) || (temperature
> 25)) ? 1 : 0);
1147 int iwl3945_hw_get_temperature(struct iwl3945_priv
*priv
)
1149 return iwl3945_read32(priv
, CSR_UCODE_DRV_GP2
);
1153 * iwl3945_hw_reg_txpower_get_temperature
1154 * get the current temperature by reading from NIC
1156 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv
*priv
)
1160 temperature
= iwl3945_hw_get_temperature(priv
);
1162 /* driver's okay range is -260 to +25.
1163 * human readable okay range is 0 to +285 */
1164 IWL_DEBUG_INFO("Temperature: %d\n", temperature
+ IWL_TEMP_CONVERT
);
1166 /* handle insane temp reading */
1167 if (iwl3945_hw_reg_temp_out_of_range(temperature
)) {
1168 IWL_ERROR("Error bad temperature value %d\n", temperature
);
1170 /* if really really hot(?),
1171 * substitute the 3rd band/group's temp measured at factory */
1172 if (priv
->last_temperature
> 100)
1173 temperature
= priv
->eeprom
.groups
[2].temperature
;
1174 else /* else use most recent "sane" value from driver */
1175 temperature
= priv
->last_temperature
;
1178 return temperature
; /* raw, not "human readable" */
1181 /* Adjust Txpower only if temperature variance is greater than threshold.
1183 * Both are lower than older versions' 9 degrees */
1184 #define IWL_TEMPERATURE_LIMIT_TIMER 6
1187 * is_temp_calib_needed - determines if new calibration is needed
1189 * records new temperature in tx_mgr->temperature.
1190 * replaces tx_mgr->last_temperature *only* if calib needed
1191 * (assumes caller will actually do the calibration!). */
1192 static int is_temp_calib_needed(struct iwl3945_priv
*priv
)
1196 priv
->temperature
= iwl3945_hw_reg_txpower_get_temperature(priv
);
1197 temp_diff
= priv
->temperature
- priv
->last_temperature
;
1199 /* get absolute value */
1200 if (temp_diff
< 0) {
1201 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff
);
1202 temp_diff
= -temp_diff
;
1203 } else if (temp_diff
== 0)
1204 IWL_DEBUG_POWER("Same temp,\n");
1206 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff
);
1208 /* if we don't need calibration, *don't* update last_temperature */
1209 if (temp_diff
< IWL_TEMPERATURE_LIMIT_TIMER
) {
1210 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1214 IWL_DEBUG_POWER("Timed thermal calib needed\n");
1216 /* assume that caller will actually do calib ...
1217 * update the "last temperature" value */
1218 priv
->last_temperature
= priv
->temperature
;
1222 #define IWL_MAX_GAIN_ENTRIES 78
1223 #define IWL_CCK_FROM_OFDM_POWER_DIFF -5
1224 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1226 /* radio and DSP power table, each step is 1/2 dB.
1227 * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1228 static struct iwl3945_tx_power power_gain_table
[2][IWL_MAX_GAIN_ENTRIES
] = {
1230 {251, 127}, /* 2.4 GHz, highest power */
1307 {3, 95} }, /* 2.4 GHz, lowest power */
1309 {251, 127}, /* 5.x GHz, highest power */
1386 {3, 120} } /* 5.x GHz, lowest power */
1389 static inline u8
iwl3945_hw_reg_fix_power_index(int index
)
1393 if (index
>= IWL_MAX_GAIN_ENTRIES
)
1394 return IWL_MAX_GAIN_ENTRIES
- 1;
1398 /* Kick off thermal recalibration check every 60 seconds */
1399 #define REG_RECALIB_PERIOD (60)
1402 * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1404 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1405 * or 6 Mbit (OFDM) rates.
1407 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv
*priv
, u32 scan_tbl_index
,
1408 s32 rate_index
, const s8
*clip_pwrs
,
1409 struct iwl3945_channel_info
*ch_info
,
1412 struct iwl3945_scan_power_info
*scan_power_info
;
1416 scan_power_info
= &ch_info
->scan_pwr_info
[scan_tbl_index
];
1418 /* use this channel group's 6Mbit clipping/saturation pwr,
1419 * but cap at regulatory scan power restriction (set during init
1420 * based on eeprom channel data) for this channel. */
1421 power
= min(ch_info
->scan_power
, clip_pwrs
[IWL_RATE_6M_INDEX_TABLE
]);
1423 /* further limit to user's max power preference.
1424 * FIXME: Other spectrum management power limitations do not
1425 * seem to apply?? */
1426 power
= min(power
, priv
->user_txpower_limit
);
1427 scan_power_info
->requested_power
= power
;
1429 /* find difference between new scan *power* and current "normal"
1430 * Tx *power* for 6Mb. Use this difference (x2) to adjust the
1431 * current "normal" temperature-compensated Tx power *index* for
1432 * this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1434 power_index
= ch_info
->power_info
[rate_index
].power_table_index
1435 - (power
- ch_info
->power_info
1436 [IWL_RATE_6M_INDEX_TABLE
].requested_power
) * 2;
1438 /* store reference index that we use when adjusting *all* scan
1439 * powers. So we can accommodate user (all channel) or spectrum
1440 * management (single channel) power changes "between" temperature
1441 * feedback compensation procedures.
1442 * don't force fit this reference index into gain table; it may be a
1443 * negative number. This will help avoid errors when we're at
1444 * the lower bounds (highest gains, for warmest temperatures)
1447 /* don't exceed table bounds for "real" setting */
1448 power_index
= iwl3945_hw_reg_fix_power_index(power_index
);
1450 scan_power_info
->power_table_index
= power_index
;
1451 scan_power_info
->tpc
.tx_gain
=
1452 power_gain_table
[band_index
][power_index
].tx_gain
;
1453 scan_power_info
->tpc
.dsp_atten
=
1454 power_gain_table
[band_index
][power_index
].dsp_atten
;
1458 * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1460 * Configures power settings for all rates for the current channel,
1461 * using values from channel info struct, and send to NIC
1463 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv
*priv
)
1466 const struct iwl3945_channel_info
*ch_info
= NULL
;
1467 struct iwl3945_txpowertable_cmd txpower
= {
1468 .channel
= priv
->active_rxon
.channel
,
1471 txpower
.band
= (priv
->phymode
== MODE_IEEE80211A
) ? 0 : 1;
1472 ch_info
= iwl3945_get_channel_info(priv
,
1474 le16_to_cpu(priv
->active_rxon
.channel
));
1477 ("Failed to get channel info for channel %d [%d]\n",
1478 le16_to_cpu(priv
->active_rxon
.channel
), priv
->phymode
);
1482 if (!is_channel_valid(ch_info
)) {
1483 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1484 "non-Tx channel.\n");
1488 /* fill cmd with power settings for all rates for current channel */
1489 /* Fill OFDM rate */
1490 for (rate_idx
= IWL_FIRST_OFDM_RATE
, i
= 0;
1491 rate_idx
<= IWL_LAST_OFDM_RATE
; rate_idx
++, i
++) {
1493 txpower
.power
[i
].tpc
= ch_info
->power_info
[i
].tpc
;
1494 txpower
.power
[i
].rate
= iwl3945_rates
[rate_idx
].plcp
;
1496 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1497 le16_to_cpu(txpower
.channel
),
1499 txpower
.power
[i
].tpc
.tx_gain
,
1500 txpower
.power
[i
].tpc
.dsp_atten
,
1501 txpower
.power
[i
].rate
);
1503 /* Fill CCK rates */
1504 for (rate_idx
= IWL_FIRST_CCK_RATE
;
1505 rate_idx
<= IWL_LAST_CCK_RATE
; rate_idx
++, i
++) {
1506 txpower
.power
[i
].tpc
= ch_info
->power_info
[i
].tpc
;
1507 txpower
.power
[i
].rate
= iwl3945_rates
[rate_idx
].plcp
;
1509 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1510 le16_to_cpu(txpower
.channel
),
1512 txpower
.power
[i
].tpc
.tx_gain
,
1513 txpower
.power
[i
].tpc
.dsp_atten
,
1514 txpower
.power
[i
].rate
);
1517 return iwl3945_send_cmd_pdu(priv
, REPLY_TX_PWR_TABLE_CMD
,
1518 sizeof(struct iwl3945_txpowertable_cmd
), &txpower
);
1523 * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1524 * @ch_info: Channel to update. Uses power_info.requested_power.
1526 * Replace requested_power and base_power_index ch_info fields for
1529 * Called if user or spectrum management changes power preferences.
1530 * Takes into account h/w and modulation limitations (clip power).
1532 * This does *not* send anything to NIC, just sets up ch_info for one channel.
1534 * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1535 * properly fill out the scan powers, and actual h/w gain settings,
1536 * and send changes to NIC
1538 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv
*priv
,
1539 struct iwl3945_channel_info
*ch_info
)
1541 struct iwl3945_channel_power_info
*power_info
;
1542 int power_changed
= 0;
1544 const s8
*clip_pwrs
;
1547 /* Get this chnlgrp's rate-to-max/clip-powers table */
1548 clip_pwrs
= priv
->clip_groups
[ch_info
->group_index
].clip_powers
;
1550 /* Get this channel's rate-to-current-power settings table */
1551 power_info
= ch_info
->power_info
;
1553 /* update OFDM Txpower settings */
1554 for (i
= IWL_RATE_6M_INDEX_TABLE
; i
<= IWL_RATE_54M_INDEX_TABLE
;
1555 i
++, ++power_info
) {
1558 /* limit new power to be no more than h/w capability */
1559 power
= min(ch_info
->curr_txpow
, clip_pwrs
[i
]);
1560 if (power
== power_info
->requested_power
)
1563 /* find difference between old and new requested powers,
1564 * update base (non-temp-compensated) power index */
1565 delta_idx
= (power
- power_info
->requested_power
) * 2;
1566 power_info
->base_power_index
-= delta_idx
;
1568 /* save new requested power value */
1569 power_info
->requested_power
= power
;
1574 /* update CCK Txpower settings, based on OFDM 12M setting ...
1575 * ... all CCK power settings for a given channel are the *same*. */
1576 if (power_changed
) {
1578 ch_info
->power_info
[IWL_RATE_12M_INDEX_TABLE
].
1579 requested_power
+ IWL_CCK_FROM_OFDM_POWER_DIFF
;
1581 /* do all CCK rates' iwl3945_channel_power_info structures */
1582 for (i
= IWL_RATE_1M_INDEX_TABLE
; i
<= IWL_RATE_11M_INDEX_TABLE
; i
++) {
1583 power_info
->requested_power
= power
;
1584 power_info
->base_power_index
=
1585 ch_info
->power_info
[IWL_RATE_12M_INDEX_TABLE
].
1586 base_power_index
+ IWL_CCK_FROM_OFDM_INDEX_DIFF
;
1595 * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1597 * NOTE: Returned power limit may be less (but not more) than requested,
1598 * based strictly on regulatory (eeprom and spectrum mgt) limitations
1599 * (no consideration for h/w clipping limitations).
1601 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info
*ch_info
)
1606 /* if we're using TGd limits, use lower of TGd or EEPROM */
1607 if (ch_info
->tgd_data
.max_power
!= 0)
1608 max_power
= min(ch_info
->tgd_data
.max_power
,
1609 ch_info
->eeprom
.max_power_avg
);
1611 /* else just use EEPROM limits */
1614 max_power
= ch_info
->eeprom
.max_power_avg
;
1616 return min(max_power
, ch_info
->max_power_avg
);
1620 * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1622 * Compensate txpower settings of *all* channels for temperature.
1623 * This only accounts for the difference between current temperature
1624 * and the factory calibration temperatures, and bases the new settings
1625 * on the channel's base_power_index.
1627 * If RxOn is "associated", this sends the new Txpower to NIC!
1629 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv
*priv
)
1631 struct iwl3945_channel_info
*ch_info
= NULL
;
1633 const s8
*clip_pwrs
; /* array of h/w max power levels for each rate */
1639 int temperature
= priv
->temperature
;
1641 /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1642 for (i
= 0; i
< priv
->channel_count
; i
++) {
1643 ch_info
= &priv
->channel_info
[i
];
1644 a_band
= is_channel_a_band(ch_info
);
1646 /* Get this chnlgrp's factory calibration temperature */
1647 ref_temp
= (s16
)priv
->eeprom
.groups
[ch_info
->group_index
].
1650 /* get power index adjustment based on curr and factory
1652 delta_index
= iwl3945_hw_reg_adjust_power_by_temp(temperature
,
1655 /* set tx power value for all rates, OFDM and CCK */
1656 for (rate_index
= 0; rate_index
< IWL_RATE_COUNT
;
1659 ch_info
->power_info
[rate_index
].base_power_index
;
1661 /* temperature compensate */
1662 power_idx
+= delta_index
;
1664 /* stay within table range */
1665 power_idx
= iwl3945_hw_reg_fix_power_index(power_idx
);
1666 ch_info
->power_info
[rate_index
].
1667 power_table_index
= (u8
) power_idx
;
1668 ch_info
->power_info
[rate_index
].tpc
=
1669 power_gain_table
[a_band
][power_idx
];
1672 /* Get this chnlgrp's rate-to-max/clip-powers table */
1673 clip_pwrs
= priv
->clip_groups
[ch_info
->group_index
].clip_powers
;
1675 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1676 for (scan_tbl_index
= 0;
1677 scan_tbl_index
< IWL_NUM_SCAN_RATES
; scan_tbl_index
++) {
1678 s32 actual_index
= (scan_tbl_index
== 0) ?
1679 IWL_RATE_1M_INDEX_TABLE
: IWL_RATE_6M_INDEX_TABLE
;
1680 iwl3945_hw_reg_set_scan_power(priv
, scan_tbl_index
,
1681 actual_index
, clip_pwrs
,
1686 /* send Txpower command for current channel to ucode */
1687 return iwl3945_hw_reg_send_txpower(priv
);
1690 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv
*priv
, s8 power
)
1692 struct iwl3945_channel_info
*ch_info
;
1697 if (priv
->user_txpower_limit
== power
) {
1698 IWL_DEBUG_POWER("Requested Tx power same as current "
1699 "limit: %ddBm.\n", power
);
1703 IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power
);
1704 priv
->user_txpower_limit
= power
;
1706 /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1708 for (i
= 0; i
< priv
->channel_count
; i
++) {
1709 ch_info
= &priv
->channel_info
[i
];
1710 a_band
= is_channel_a_band(ch_info
);
1712 /* find minimum power of all user and regulatory constraints
1713 * (does not consider h/w clipping limitations) */
1714 max_power
= iwl3945_hw_reg_get_ch_txpower_limit(ch_info
);
1715 max_power
= min(power
, max_power
);
1716 if (max_power
!= ch_info
->curr_txpow
) {
1717 ch_info
->curr_txpow
= max_power
;
1719 /* this considers the h/w clipping limitations */
1720 iwl3945_hw_reg_set_new_power(priv
, ch_info
);
1724 /* update txpower settings for all channels,
1725 * send to NIC if associated. */
1726 is_temp_calib_needed(priv
);
1727 iwl3945_hw_reg_comp_txpower_temp(priv
);
1732 /* will add 3945 channel switch cmd handling later */
1733 int iwl3945_hw_channel_switch(struct iwl3945_priv
*priv
, u16 channel
)
1739 * iwl3945_reg_txpower_periodic - called when time to check our temperature.
1741 * -- reset periodic timer
1742 * -- see if temp has changed enough to warrant re-calibration ... if so:
1743 * -- correct coeffs for temp (can reset temp timer)
1744 * -- save this temp as "last",
1745 * -- send new set of gain settings to NIC
1746 * NOTE: This should continue working, even when we're not associated,
1747 * so we can keep our internal table of scan powers current. */
1748 void iwl3945_reg_txpower_periodic(struct iwl3945_priv
*priv
)
1750 /* This will kick in the "brute force"
1751 * iwl3945_hw_reg_comp_txpower_temp() below */
1752 if (!is_temp_calib_needed(priv
))
1755 /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1756 * This is based *only* on current temperature,
1757 * ignoring any previous power measurements */
1758 iwl3945_hw_reg_comp_txpower_temp(priv
);
1761 queue_delayed_work(priv
->workqueue
,
1762 &priv
->thermal_periodic
, REG_RECALIB_PERIOD
* HZ
);
1765 static void iwl3945_bg_reg_txpower_periodic(struct work_struct
*work
)
1767 struct iwl3945_priv
*priv
= container_of(work
, struct iwl3945_priv
,
1768 thermal_periodic
.work
);
1770 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
1773 mutex_lock(&priv
->mutex
);
1774 iwl3945_reg_txpower_periodic(priv
);
1775 mutex_unlock(&priv
->mutex
);
1779 * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1782 * This function is used when initializing channel-info structs.
1784 * NOTE: These channel groups do *NOT* match the bands above!
1785 * These channel groups are based on factory-tested channels;
1786 * on A-band, EEPROM's "group frequency" entries represent the top
1787 * channel in each group 1-4. Group 5 All B/G channels are in group 0.
1789 static u16
iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv
*priv
,
1790 const struct iwl3945_channel_info
*ch_info
)
1792 struct iwl3945_eeprom_txpower_group
*ch_grp
= &priv
->eeprom
.groups
[0];
1794 u16 group_index
= 0; /* based on factory calib frequencies */
1797 /* Find the group index for the channel ... don't use index 1(?) */
1798 if (is_channel_a_band(ch_info
)) {
1799 for (group
= 1; group
< 5; group
++) {
1800 grp_channel
= ch_grp
[group
].group_channel
;
1801 if (ch_info
->channel
<= grp_channel
) {
1802 group_index
= group
;
1806 /* group 4 has a few channels *above* its factory cal freq */
1810 group_index
= 0; /* 2.4 GHz, group 0 */
1812 IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info
->channel
,
1818 * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
1820 * Interpolate to get nominal (i.e. at factory calibration temperature) index
1821 * into radio/DSP gain settings table for requested power.
1823 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv
*priv
,
1825 s32 setting_index
, s32
*new_index
)
1827 const struct iwl3945_eeprom_txpower_group
*chnl_grp
= NULL
;
1829 s32 power
= 2 * requested_power
;
1831 const struct iwl3945_eeprom_txpower_sample
*samples
;
1836 chnl_grp
= &priv
->eeprom
.groups
[setting_index
];
1837 samples
= chnl_grp
->samples
;
1838 for (i
= 0; i
< 5; i
++) {
1839 if (power
== samples
[i
].power
) {
1840 *new_index
= samples
[i
].gain_index
;
1845 if (power
> samples
[1].power
) {
1848 } else if (power
> samples
[2].power
) {
1851 } else if (power
> samples
[3].power
) {
1859 denominator
= (s32
) samples
[index1
].power
- (s32
) samples
[index0
].power
;
1860 if (denominator
== 0)
1862 gains0
= (s32
) samples
[index0
].gain_index
* (1 << 19);
1863 gains1
= (s32
) samples
[index1
].gain_index
* (1 << 19);
1864 res
= gains0
+ (gains1
- gains0
) *
1865 ((s32
) power
- (s32
) samples
[index0
].power
) / denominator
+
1867 *new_index
= res
>> 19;
1871 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv
*priv
)
1875 const struct iwl3945_eeprom_txpower_group
*group
;
1877 IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
1879 for (i
= 0; i
< IWL_NUM_TX_CALIB_GROUPS
; i
++) {
1880 s8
*clip_pwrs
; /* table of power levels for each rate */
1881 s8 satur_pwr
; /* saturation power for each chnl group */
1882 group
= &priv
->eeprom
.groups
[i
];
1884 /* sanity check on factory saturation power value */
1885 if (group
->saturation_power
< 40) {
1886 IWL_WARNING("Error: saturation power is %d, "
1887 "less than minimum expected 40\n",
1888 group
->saturation_power
);
1893 * Derive requested power levels for each rate, based on
1894 * hardware capabilities (saturation power for band).
1895 * Basic value is 3dB down from saturation, with further
1896 * power reductions for highest 3 data rates. These
1897 * backoffs provide headroom for high rate modulation
1898 * power peaks, without too much distortion (clipping).
1900 /* we'll fill in this array with h/w max power levels */
1901 clip_pwrs
= (s8
*) priv
->clip_groups
[i
].clip_powers
;
1903 /* divide factory saturation power by 2 to find -3dB level */
1904 satur_pwr
= (s8
) (group
->saturation_power
>> 1);
1906 /* fill in channel group's nominal powers for each rate */
1907 for (rate_index
= 0;
1908 rate_index
< IWL_RATE_COUNT
; rate_index
++, clip_pwrs
++) {
1909 switch (rate_index
) {
1910 case IWL_RATE_36M_INDEX_TABLE
:
1911 if (i
== 0) /* B/G */
1912 *clip_pwrs
= satur_pwr
;
1914 *clip_pwrs
= satur_pwr
- 5;
1916 case IWL_RATE_48M_INDEX_TABLE
:
1918 *clip_pwrs
= satur_pwr
- 7;
1920 *clip_pwrs
= satur_pwr
- 10;
1922 case IWL_RATE_54M_INDEX_TABLE
:
1924 *clip_pwrs
= satur_pwr
- 9;
1926 *clip_pwrs
= satur_pwr
- 12;
1929 *clip_pwrs
= satur_pwr
;
1937 * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
1939 * Second pass (during init) to set up priv->channel_info
1941 * Set up Tx-power settings in our channel info database for each VALID
1942 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
1943 * and current temperature.
1945 * Since this is based on current temperature (at init time), these values may
1946 * not be valid for very long, but it gives us a starting/default point,
1947 * and allows us to active (i.e. using Tx) scan.
1949 * This does *not* write values to NIC, just sets up our internal table.
1951 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv
*priv
)
1953 struct iwl3945_channel_info
*ch_info
= NULL
;
1954 struct iwl3945_channel_power_info
*pwr_info
;
1958 const s8
*clip_pwrs
; /* array of power levels for each rate */
1961 u8 pwr_index
, base_pwr_index
, a_band
;
1965 /* save temperature reference,
1966 * so we can determine next time to calibrate */
1967 temperature
= iwl3945_hw_reg_txpower_get_temperature(priv
);
1968 priv
->last_temperature
= temperature
;
1970 iwl3945_hw_reg_init_channel_groups(priv
);
1972 /* initialize Tx power info for each and every channel, 2.4 and 5.x */
1973 for (i
= 0, ch_info
= priv
->channel_info
; i
< priv
->channel_count
;
1975 a_band
= is_channel_a_band(ch_info
);
1976 if (!is_channel_valid(ch_info
))
1979 /* find this channel's channel group (*not* "band") index */
1980 ch_info
->group_index
=
1981 iwl3945_hw_reg_get_ch_grp_index(priv
, ch_info
);
1983 /* Get this chnlgrp's rate->max/clip-powers table */
1984 clip_pwrs
= priv
->clip_groups
[ch_info
->group_index
].clip_powers
;
1986 /* calculate power index *adjustment* value according to
1987 * diff between current temperature and factory temperature */
1988 delta_index
= iwl3945_hw_reg_adjust_power_by_temp(temperature
,
1989 priv
->eeprom
.groups
[ch_info
->group_index
].
1992 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
1993 ch_info
->channel
, delta_index
, temperature
+
1996 /* set tx power value for all OFDM rates */
1997 for (rate_index
= 0; rate_index
< IWL_OFDM_RATES
;
2002 /* use channel group's clip-power table,
2003 * but don't exceed channel's max power */
2004 s8 pwr
= min(ch_info
->max_power_avg
,
2005 clip_pwrs
[rate_index
]);
2007 pwr_info
= &ch_info
->power_info
[rate_index
];
2009 /* get base (i.e. at factory-measured temperature)
2010 * power table index for this rate's power */
2011 rc
= iwl3945_hw_reg_get_matched_power_index(priv
, pwr
,
2012 ch_info
->group_index
,
2015 IWL_ERROR("Invalid power index\n");
2018 pwr_info
->base_power_index
= (u8
) power_idx
;
2020 /* temperature compensate */
2021 power_idx
+= delta_index
;
2023 /* stay within range of gain table */
2024 power_idx
= iwl3945_hw_reg_fix_power_index(power_idx
);
2026 /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2027 pwr_info
->requested_power
= pwr
;
2028 pwr_info
->power_table_index
= (u8
) power_idx
;
2029 pwr_info
->tpc
.tx_gain
=
2030 power_gain_table
[a_band
][power_idx
].tx_gain
;
2031 pwr_info
->tpc
.dsp_atten
=
2032 power_gain_table
[a_band
][power_idx
].dsp_atten
;
2035 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2036 pwr_info
= &ch_info
->power_info
[IWL_RATE_12M_INDEX_TABLE
];
2037 power
= pwr_info
->requested_power
+
2038 IWL_CCK_FROM_OFDM_POWER_DIFF
;
2039 pwr_index
= pwr_info
->power_table_index
+
2040 IWL_CCK_FROM_OFDM_INDEX_DIFF
;
2041 base_pwr_index
= pwr_info
->base_power_index
+
2042 IWL_CCK_FROM_OFDM_INDEX_DIFF
;
2044 /* stay within table range */
2045 pwr_index
= iwl3945_hw_reg_fix_power_index(pwr_index
);
2046 gain
= power_gain_table
[a_band
][pwr_index
].tx_gain
;
2047 dsp_atten
= power_gain_table
[a_band
][pwr_index
].dsp_atten
;
2049 /* fill each CCK rate's iwl3945_channel_power_info structure
2050 * NOTE: All CCK-rate Txpwrs are the same for a given chnl!
2051 * NOTE: CCK rates start at end of OFDM rates! */
2052 for (rate_index
= 0;
2053 rate_index
< IWL_CCK_RATES
; rate_index
++) {
2054 pwr_info
= &ch_info
->power_info
[rate_index
+IWL_OFDM_RATES
];
2055 pwr_info
->requested_power
= power
;
2056 pwr_info
->power_table_index
= pwr_index
;
2057 pwr_info
->base_power_index
= base_pwr_index
;
2058 pwr_info
->tpc
.tx_gain
= gain
;
2059 pwr_info
->tpc
.dsp_atten
= dsp_atten
;
2062 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2063 for (scan_tbl_index
= 0;
2064 scan_tbl_index
< IWL_NUM_SCAN_RATES
; scan_tbl_index
++) {
2065 s32 actual_index
= (scan_tbl_index
== 0) ?
2066 IWL_RATE_1M_INDEX_TABLE
: IWL_RATE_6M_INDEX_TABLE
;
2067 iwl3945_hw_reg_set_scan_power(priv
, scan_tbl_index
,
2068 actual_index
, clip_pwrs
, ch_info
, a_band
);
2075 int iwl3945_hw_rxq_stop(struct iwl3945_priv
*priv
)
2078 unsigned long flags
;
2080 spin_lock_irqsave(&priv
->lock
, flags
);
2081 rc
= iwl3945_grab_nic_access(priv
);
2083 spin_unlock_irqrestore(&priv
->lock
, flags
);
2087 iwl3945_write_direct32(priv
, FH_RCSR_CONFIG(0), 0);
2088 rc
= iwl3945_poll_direct_bit(priv
, FH_RSSR_STATUS
, (1 << 24), 1000);
2090 IWL_ERROR("Can't stop Rx DMA.\n");
2092 iwl3945_release_nic_access(priv
);
2093 spin_unlock_irqrestore(&priv
->lock
, flags
);
2098 int iwl3945_hw_tx_queue_init(struct iwl3945_priv
*priv
, struct iwl3945_tx_queue
*txq
)
2101 unsigned long flags
;
2102 int txq_id
= txq
->q
.id
;
2104 struct iwl3945_shared
*shared_data
= priv
->hw_setting
.shared_virt
;
2106 shared_data
->tx_base_ptr
[txq_id
] = cpu_to_le32((u32
)txq
->q
.dma_addr
);
2108 spin_lock_irqsave(&priv
->lock
, flags
);
2109 rc
= iwl3945_grab_nic_access(priv
);
2111 spin_unlock_irqrestore(&priv
->lock
, flags
);
2114 iwl3945_write_direct32(priv
, FH_CBCC_CTRL(txq_id
), 0);
2115 iwl3945_write_direct32(priv
, FH_CBCC_BASE(txq_id
), 0);
2117 iwl3945_write_direct32(priv
, FH_TCSR_CONFIG(txq_id
),
2118 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT
|
2119 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF
|
2120 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD
|
2121 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL
|
2122 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE
);
2123 iwl3945_release_nic_access(priv
);
2125 /* fake read to flush all prev. writes */
2126 iwl3945_read32(priv
, FH_TSSR_CBB_BASE
);
2127 spin_unlock_irqrestore(&priv
->lock
, flags
);
2132 int iwl3945_hw_get_rx_read(struct iwl3945_priv
*priv
)
2134 struct iwl3945_shared
*shared_data
= priv
->hw_setting
.shared_virt
;
2136 return le32_to_cpu(shared_data
->rx_read_ptr
[0]);
2140 * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2142 int iwl3945_init_hw_rate_table(struct iwl3945_priv
*priv
)
2144 int rc
, i
, index
, prev_index
;
2145 struct iwl3945_rate_scaling_cmd rate_cmd
= {
2146 .reserved
= {0, 0, 0},
2148 struct iwl3945_rate_scaling_info
*table
= rate_cmd
.table
;
2150 for (i
= 0; i
< ARRAY_SIZE(iwl3945_rates
); i
++) {
2151 index
= iwl3945_rates
[i
].table_rs_index
;
2153 table
[index
].rate_n_flags
=
2154 iwl3945_hw_set_rate_n_flags(iwl3945_rates
[i
].plcp
, 0);
2155 table
[index
].try_cnt
= priv
->retry_rate
;
2156 prev_index
= iwl3945_get_prev_ieee_rate(i
);
2157 table
[index
].next_rate_index
= iwl3945_rates
[prev_index
].table_rs_index
;
2160 switch (priv
->phymode
) {
2161 case MODE_IEEE80211A
:
2162 IWL_DEBUG_RATE("Select A mode rate scale\n");
2163 /* If one of the following CCK rates is used,
2164 * have it fall back to the 6M OFDM rate */
2165 for (i
= IWL_RATE_1M_INDEX_TABLE
; i
<= IWL_RATE_11M_INDEX_TABLE
; i
++)
2166 table
[i
].next_rate_index
= iwl3945_rates
[IWL_FIRST_OFDM_RATE
].table_rs_index
;
2168 /* Don't fall back to CCK rates */
2169 table
[IWL_RATE_12M_INDEX_TABLE
].next_rate_index
= IWL_RATE_9M_INDEX_TABLE
;
2171 /* Don't drop out of OFDM rates */
2172 table
[IWL_RATE_6M_INDEX_TABLE
].next_rate_index
=
2173 iwl3945_rates
[IWL_FIRST_OFDM_RATE
].table_rs_index
;
2176 case MODE_IEEE80211B
:
2177 IWL_DEBUG_RATE("Select B mode rate scale\n");
2178 /* If an OFDM rate is used, have it fall back to the
2180 for (i
= IWL_RATE_6M_INDEX_TABLE
; i
<= IWL_RATE_54M_INDEX_TABLE
; i
++)
2181 table
[i
].next_rate_index
= iwl3945_rates
[IWL_FIRST_CCK_RATE
].table_rs_index
;
2183 /* CCK shouldn't fall back to OFDM... */
2184 table
[IWL_RATE_11M_INDEX_TABLE
].next_rate_index
= IWL_RATE_5M_INDEX_TABLE
;
2188 IWL_DEBUG_RATE("Select G mode rate scale\n");
2192 /* Update the rate scaling for control frame Tx */
2193 rate_cmd
.table_id
= 0;
2194 rc
= iwl3945_send_cmd_pdu(priv
, REPLY_RATE_SCALE
, sizeof(rate_cmd
),
2199 /* Update the rate scaling for data frame Tx */
2200 rate_cmd
.table_id
= 1;
2201 return iwl3945_send_cmd_pdu(priv
, REPLY_RATE_SCALE
, sizeof(rate_cmd
),
2205 int iwl3945_hw_set_hw_setting(struct iwl3945_priv
*priv
)
2207 memset((void *)&priv
->hw_setting
, 0,
2208 sizeof(struct iwl3945_driver_hw_info
));
2210 priv
->hw_setting
.shared_virt
=
2211 pci_alloc_consistent(priv
->pci_dev
,
2212 sizeof(struct iwl3945_shared
),
2213 &priv
->hw_setting
.shared_phys
);
2215 if (!priv
->hw_setting
.shared_virt
) {
2216 IWL_ERROR("failed to allocate pci memory\n");
2217 mutex_unlock(&priv
->mutex
);
2221 priv
->hw_setting
.ac_queue_count
= AC_NUM
;
2222 priv
->hw_setting
.rx_buffer_size
= IWL_RX_BUF_SIZE
;
2223 priv
->hw_setting
.tx_cmd_len
= sizeof(struct iwl3945_tx_cmd
);
2224 priv
->hw_setting
.max_rxq_size
= RX_QUEUE_SIZE
;
2225 priv
->hw_setting
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
2226 priv
->hw_setting
.max_stations
= IWL3945_STATION_COUNT
;
2227 priv
->hw_setting
.bcast_sta_id
= IWL3945_BROADCAST_ID
;
2231 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv
*priv
,
2232 struct iwl3945_frame
*frame
, u8 rate
)
2234 struct iwl3945_tx_beacon_cmd
*tx_beacon_cmd
;
2235 unsigned int frame_size
;
2237 tx_beacon_cmd
= (struct iwl3945_tx_beacon_cmd
*)&frame
->u
;
2238 memset(tx_beacon_cmd
, 0, sizeof(*tx_beacon_cmd
));
2240 tx_beacon_cmd
->tx
.sta_id
= IWL3945_BROADCAST_ID
;
2241 tx_beacon_cmd
->tx
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
2243 frame_size
= iwl3945_fill_beacon_frame(priv
,
2244 tx_beacon_cmd
->frame
,
2245 iwl3945_broadcast_addr
,
2246 sizeof(frame
->u
) - sizeof(*tx_beacon_cmd
));
2248 BUG_ON(frame_size
> MAX_MPDU_SIZE
);
2249 tx_beacon_cmd
->tx
.len
= cpu_to_le16((u16
)frame_size
);
2251 tx_beacon_cmd
->tx
.rate
= rate
;
2252 tx_beacon_cmd
->tx
.tx_flags
= (TX_CMD_FLG_SEQ_CTL_MSK
|
2253 TX_CMD_FLG_TSF_MSK
);
2255 /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2256 tx_beacon_cmd
->tx
.supp_rates
[0] =
2257 (IWL_OFDM_BASIC_RATES_MASK
>> IWL_FIRST_OFDM_RATE
) & 0xFF;
2259 tx_beacon_cmd
->tx
.supp_rates
[1] =
2260 (IWL_CCK_BASIC_RATES_MASK
& 0xF);
2262 return (sizeof(struct iwl3945_tx_beacon_cmd
) + frame_size
);
2265 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv
*priv
)
2267 priv
->rx_handlers
[REPLY_3945_RX
] = iwl3945_rx_reply_rx
;
2270 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv
*priv
)
2272 INIT_DELAYED_WORK(&priv
->thermal_periodic
,
2273 iwl3945_bg_reg_txpower_periodic
);
2276 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv
*priv
)
2278 cancel_delayed_work(&priv
->thermal_periodic
);
2281 struct pci_device_id iwl3945_hw_card_ids
[] = {
2282 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, 0x4222)},
2283 {PCI_DEVICE(PCI_VENDOR_ID_INTEL
, 0x4227)},
2287 inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv
*priv
)
2289 _iwl3945_clear_bit(priv
, CSR_EEPROM_GP
, CSR_EEPROM_GP_IF_OWNER_MSK
);
2293 MODULE_DEVICE_TABLE(pci
, iwl3945_hw_card_ids
);