projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
iwlwifi: activate status ready timeout only for run time ucode
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40
41 #include "iwl-eeprom.h"
42 #include "iwl-dev.h"
43 #include "iwl-core.h"
44 #include "iwl-io.h"
45 #include "iwl-helpers.h"
46 #include "iwl-calib.h"
47
48 /* module parameters */
49 static struct iwl_mod_params iwl4965_mod_params = {
50 .num_of_queues = IWL49_NUM_QUEUES,
51 .enable_qos = 1,
52 .amsdu_size_8K = 1,
53 .restart_fw = 1,
54 /* the rest are 0 by default */
55 };
56
57 #ifdef CONFIG_IWL4965_HT
58
59 static const u16 default_tid_to_tx_fifo[] = {
60 IWL_TX_FIFO_AC1,
61 IWL_TX_FIFO_AC0,
62 IWL_TX_FIFO_AC0,
63 IWL_TX_FIFO_AC1,
64 IWL_TX_FIFO_AC2,
65 IWL_TX_FIFO_AC2,
66 IWL_TX_FIFO_AC3,
67 IWL_TX_FIFO_AC3,
68 IWL_TX_FIFO_NONE,
69 IWL_TX_FIFO_NONE,
70 IWL_TX_FIFO_NONE,
71 IWL_TX_FIFO_NONE,
72 IWL_TX_FIFO_NONE,
73 IWL_TX_FIFO_NONE,
74 IWL_TX_FIFO_NONE,
75 IWL_TX_FIFO_NONE,
76 IWL_TX_FIFO_AC3
77 };
78
79 #endif /*CONFIG_IWL4965_HT */
80
81 /* check contents of special bootstrap uCode SRAM */
82 static int iwl4965_verify_bsm(struct iwl_priv *priv)
83 {
84 __le32 *image = priv->ucode_boot.v_addr;
85 u32 len = priv->ucode_boot.len;
86 u32 reg;
87 u32 val;
88
89 IWL_DEBUG_INFO("Begin verify bsm\n");
90
91 /* verify BSM SRAM contents */
92 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
93 for (reg = BSM_SRAM_LOWER_BOUND;
94 reg < BSM_SRAM_LOWER_BOUND + len;
95 reg += sizeof(u32), image++) {
96 val = iwl_read_prph(priv, reg);
97 if (val != le32_to_cpu(*image)) {
98 IWL_ERROR("BSM uCode verification failed at "
99 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
100 BSM_SRAM_LOWER_BOUND,
101 reg - BSM_SRAM_LOWER_BOUND, len,
102 val, le32_to_cpu(*image));
103 return -EIO;
104 }
105 }
106
107 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
108
109 return 0;
110 }
111
112 /**
113 * iwl4965_load_bsm - Load bootstrap instructions
114 *
115 * BSM operation:
116 *
117 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
118 * in special SRAM that does not power down during RFKILL. When powering back
119 * up after power-saving sleeps (or during initial uCode load), the BSM loads
120 * the bootstrap program into the on-board processor, and starts it.
121 *
122 * The bootstrap program loads (via DMA) instructions and data for a new
123 * program from host DRAM locations indicated by the host driver in the
124 * BSM_DRAM_* registers. Once the new program is loaded, it starts
125 * automatically.
126 *
127 * When initializing the NIC, the host driver points the BSM to the
128 * "initialize" uCode image. This uCode sets up some internal data, then
129 * notifies host via "initialize alive" that it is complete.
130 *
131 * The host then replaces the BSM_DRAM_* pointer values to point to the
132 * normal runtime uCode instructions and a backup uCode data cache buffer
133 * (filled initially with starting data values for the on-board processor),
134 * then triggers the "initialize" uCode to load and launch the runtime uCode,
135 * which begins normal operation.
136 *
137 * When doing a power-save shutdown, runtime uCode saves data SRAM into
138 * the backup data cache in DRAM before SRAM is powered down.
139 *
140 * When powering back up, the BSM loads the bootstrap program. This reloads
141 * the runtime uCode instructions and the backup data cache into SRAM,
142 * and re-launches the runtime uCode from where it left off.
143 */
144 static int iwl4965_load_bsm(struct iwl_priv *priv)
145 {
146 __le32 *image = priv->ucode_boot.v_addr;
147 u32 len = priv->ucode_boot.len;
148 dma_addr_t pinst;
149 dma_addr_t pdata;
150 u32 inst_len;
151 u32 data_len;
152 int i;
153 u32 done;
154 u32 reg_offset;
155 int ret;
156
157 IWL_DEBUG_INFO("Begin load bsm\n");
158
159 priv->ucode_type = UCODE_RT;
160
161 /* make sure bootstrap program is no larger than BSM's SRAM size */
162 if (len > IWL_MAX_BSM_SIZE)
163 return -EINVAL;
164
165 /* Tell bootstrap uCode where to find the "Initialize" uCode
166 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
167 * NOTE: iwl_init_alive_start() will replace these values,
168 * after the "initialize" uCode has run, to point to
169 * runtime/protocol instructions and backup data cache.
170 */
171 pinst = priv->ucode_init.p_addr >> 4;
172 pdata = priv->ucode_init_data.p_addr >> 4;
173 inst_len = priv->ucode_init.len;
174 data_len = priv->ucode_init_data.len;
175
176 ret = iwl_grab_nic_access(priv);
177 if (ret)
178 return ret;
179
180 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
181 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
182 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
183 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
184
185 /* Fill BSM memory with bootstrap instructions */
186 for (reg_offset = BSM_SRAM_LOWER_BOUND;
187 reg_offset < BSM_SRAM_LOWER_BOUND + len;
188 reg_offset += sizeof(u32), image++)
189 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
190
191 ret = iwl4965_verify_bsm(priv);
192 if (ret) {
193 iwl_release_nic_access(priv);
194 return ret;
195 }
196
197 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
198 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
199 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
200 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
201
202 /* Load bootstrap code into instruction SRAM now,
203 * to prepare to load "initialize" uCode */
204 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
205
206 /* Wait for load of bootstrap uCode to finish */
207 for (i = 0; i < 100; i++) {
208 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
209 if (!(done & BSM_WR_CTRL_REG_BIT_START))
210 break;
211 udelay(10);
212 }
213 if (i < 100)
214 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
215 else {
216 IWL_ERROR("BSM write did not complete!\n");
217 return -EIO;
218 }
219
220 /* Enable future boot loads whenever power management unit triggers it
221 * (e.g. when powering back up after power-save shutdown) */
222 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
223
224 iwl_release_nic_access(priv);
225
226 return 0;
227 }
228
229 /**
230 * iwl4965_set_ucode_ptrs - Set uCode address location
231 *
232 * Tell initialization uCode where to find runtime uCode.
233 *
234 * BSM registers initially contain pointers to initialization uCode.
235 * We need to replace them to load runtime uCode inst and data,
236 * and to save runtime data when powering down.
237 */
238 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
239 {
240 dma_addr_t pinst;
241 dma_addr_t pdata;
242 unsigned long flags;
243 int ret = 0;
244
245 /* bits 35:4 for 4965 */
246 pinst = priv->ucode_code.p_addr >> 4;
247 pdata = priv->ucode_data_backup.p_addr >> 4;
248
249 spin_lock_irqsave(&priv->lock, flags);
250 ret = iwl_grab_nic_access(priv);
251 if (ret) {
252 spin_unlock_irqrestore(&priv->lock, flags);
253 return ret;
254 }
255
256 /* Tell bootstrap uCode where to find image to load */
257 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
258 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
259 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
260 priv->ucode_data.len);
261
262 /* Inst bytecount must be last to set up, bit 31 signals uCode
263 * that all new ptr/size info is in place */
264 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
265 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
266 iwl_release_nic_access(priv);
267
268 spin_unlock_irqrestore(&priv->lock, flags);
269
270 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
271
272 return ret;
273 }
274
275 /**
276 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
277 *
278 * Called after REPLY_ALIVE notification received from "initialize" uCode.
279 *
280 * The 4965 "initialize" ALIVE reply contains calibration data for:
281 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
282 * (3945 does not contain this data).
283 *
284 * Tell "initialize" uCode to go ahead and load the runtime uCode.
285 */
286 static void iwl4965_init_alive_start(struct iwl_priv *priv)
287 {
288 /* Check alive response for "valid" sign from uCode */
289 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
290 /* We had an error bringing up the hardware, so take it
291 * all the way back down so we can try again */
292 IWL_DEBUG_INFO("Initialize Alive failed.\n");
293 goto restart;
294 }
295
296 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
297 * This is a paranoid check, because we would not have gotten the
298 * "initialize" alive if code weren't properly loaded. */
299 if (iwl_verify_ucode(priv)) {
300 /* Runtime instruction load was bad;
301 * take it all the way back down so we can try again */
302 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
303 goto restart;
304 }
305
306 /* Calculate temperature */
307 priv->temperature = iwl4965_get_temperature(priv);
308
309 /* Send pointers to protocol/runtime uCode image ... init code will
310 * load and launch runtime uCode, which will send us another "Alive"
311 * notification. */
312 IWL_DEBUG_INFO("Initialization Alive received.\n");
313 if (iwl4965_set_ucode_ptrs(priv)) {
314 /* Runtime instruction load won't happen;
315 * take it all the way back down so we can try again */
316 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
317 goto restart;
318 }
319 return;
320
321 restart:
322 queue_work(priv->workqueue, &priv->restart);
323 }
324
325 static int is_fat_channel(__le32 rxon_flags)
326 {
327 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
328 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
329 }
330
331 int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
332 {
333 int idx = 0;
334
335 /* 4965 HT rate format */
336 if (rate_n_flags & RATE_MCS_HT_MSK) {
337 idx = (rate_n_flags & 0xff);
338
339 if (idx >= IWL_RATE_MIMO2_6M_PLCP)
340 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
341
342 idx += IWL_FIRST_OFDM_RATE;
343 /* skip 9M not supported in ht*/
344 if (idx >= IWL_RATE_9M_INDEX)
345 idx += 1;
346 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
347 return idx;
348
349 /* 4965 legacy rate format, search for match in table */
350 } else {
351 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
352 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
353 return idx;
354 }
355
356 return -1;
357 }
358
359 /**
360 * translate ucode response to mac80211 tx status control values
361 */
362 void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
363 struct ieee80211_tx_info *control)
364 {
365 int rate_index;
366
367 control->antenna_sel_tx =
368 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
369 if (rate_n_flags & RATE_MCS_HT_MSK)
370 control->flags |= IEEE80211_TX_CTL_OFDM_HT;
371 if (rate_n_flags & RATE_MCS_GF_MSK)
372 control->flags |= IEEE80211_TX_CTL_GREEN_FIELD;
373 if (rate_n_flags & RATE_MCS_FAT_MSK)
374 control->flags |= IEEE80211_TX_CTL_40_MHZ_WIDTH;
375 if (rate_n_flags & RATE_MCS_DUP_MSK)
376 control->flags |= IEEE80211_TX_CTL_DUP_DATA;
377 if (rate_n_flags & RATE_MCS_SGI_MSK)
378 control->flags |= IEEE80211_TX_CTL_SHORT_GI;
379 rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
380 if (control->band == IEEE80211_BAND_5GHZ)
381 rate_index -= IWL_FIRST_OFDM_RATE;
382 control->tx_rate_idx = rate_index;
383 }
384
385 /*
386 * EEPROM handlers
387 */
388
389 static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
390 {
391 u16 eeprom_ver;
392 u16 calib_ver;
393
394 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
395
396 calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
397
398 if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
399 calib_ver < EEPROM_4965_TX_POWER_VERSION)
400 goto err;
401
402 return 0;
403 err:
404 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
405 eeprom_ver, EEPROM_4965_EEPROM_VERSION,
406 calib_ver, EEPROM_4965_TX_POWER_VERSION);
407 return -EINVAL;
408
409 }
410 int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
411 {
412 int ret;
413 unsigned long flags;
414
415 spin_lock_irqsave(&priv->lock, flags);
416 ret = iwl_grab_nic_access(priv);
417 if (ret) {
418 spin_unlock_irqrestore(&priv->lock, flags);
419 return ret;
420 }
421
422 if (src == IWL_PWR_SRC_VAUX) {
423 u32 val;
424 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
425 &val);
426
427 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
428 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
429 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
430 ~APMG_PS_CTRL_MSK_PWR_SRC);
431 }
432 } else {
433 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
434 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
435 ~APMG_PS_CTRL_MSK_PWR_SRC);
436 }
437
438 iwl_release_nic_access(priv);
439 spin_unlock_irqrestore(&priv->lock, flags);
440
441 return ret;
442 }
443
444 /*
445 * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
446 * must be called under priv->lock and mac access
447 */
448 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
449 {
450 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
451 }
452
453 static int iwl4965_apm_init(struct iwl_priv *priv)
454 {
455 int ret = 0;
456
457 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
458 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
459
460 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
461 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
462 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
463
464 /* set "initialization complete" bit to move adapter
465 * D0U* --> D0A* state */
466 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
467
468 /* wait for clock stabilization */
469 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
470 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
471 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
472 if (ret < 0) {
473 IWL_DEBUG_INFO("Failed to init the card\n");
474 goto out;
475 }
476
477 ret = iwl_grab_nic_access(priv);
478 if (ret)
479 goto out;
480
481 /* enable DMA */
482 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
483 APMG_CLK_VAL_BSM_CLK_RQT);
484
485 udelay(20);
486
487 /* disable L1-Active */
488 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
489 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
490
491 iwl_release_nic_access(priv);
492 out:
493 return ret;
494 }
495
496
497 static void iwl4965_nic_config(struct iwl_priv *priv)
498 {
499 unsigned long flags;
500 u32 val;
501 u16 radio_cfg;
502 u8 val_link;
503
504 spin_lock_irqsave(&priv->lock, flags);
505
506 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
507 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
508 /* Enable No Snoop field */
509 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
510 val & ~(1 << 11));
511 }
512
513 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
514
515 /* L1 is enabled by BIOS */
516 if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
517 /* diable L0S disabled L1A enabled */
518 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
519 else
520 /* L0S enabled L1A disabled */
521 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
522
523 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
524
525 /* write radio config values to register */
526 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
527 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
528 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
529 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
530 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
531
532 /* set CSR_HW_CONFIG_REG for uCode use */
533 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
534 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
535 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
536
537 priv->calib_info = (struct iwl_eeprom_calib_info *)
538 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
539
540 spin_unlock_irqrestore(&priv->lock, flags);
541 }
542
543 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
544 {
545 int ret = 0;
546 unsigned long flags;
547
548 spin_lock_irqsave(&priv->lock, flags);
549
550 /* set stop master bit */
551 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
552
553 ret = iwl_poll_bit(priv, CSR_RESET,
554 CSR_RESET_REG_FLAG_MASTER_DISABLED,
555 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
556 if (ret < 0)
557 goto out;
558
559 out:
560 spin_unlock_irqrestore(&priv->lock, flags);
561 IWL_DEBUG_INFO("stop master\n");
562
563 return ret;
564 }
565
566 static void iwl4965_apm_stop(struct iwl_priv *priv)
567 {
568 unsigned long flags;
569
570 iwl4965_apm_stop_master(priv);
571
572 spin_lock_irqsave(&priv->lock, flags);
573
574 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
575
576 udelay(10);
577
578 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
579 spin_unlock_irqrestore(&priv->lock, flags);
580 }
581
582 static int iwl4965_apm_reset(struct iwl_priv *priv)
583 {
584 int ret = 0;
585 unsigned long flags;
586
587 iwl4965_apm_stop_master(priv);
588
589 spin_lock_irqsave(&priv->lock, flags);
590
591 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
592
593 udelay(10);
594
595 /* FIXME: put here L1A -L0S w/a */
596
597 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
598
599 ret = iwl_poll_bit(priv, CSR_RESET,
600 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
601 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
602
603 if (ret)
604 goto out;
605
606 udelay(10);
607
608 ret = iwl_grab_nic_access(priv);
609 if (ret)
610 goto out;
611 /* Enable DMA and BSM Clock */
612 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
613 APMG_CLK_VAL_BSM_CLK_RQT);
614
615 udelay(10);
616
617 /* disable L1A */
618 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
619 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
620
621 iwl_release_nic_access(priv);
622
623 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
624 wake_up_interruptible(&priv->wait_command_queue);
625
626 out:
627 spin_unlock_irqrestore(&priv->lock, flags);
628
629 return ret;
630 }
631
632 #define REG_RECALIB_PERIOD (60)
633
634 /**
635 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
636 *
637 * This callback is provided in order to send a statistics request.
638 *
639 * This timer function is continually reset to execute within
640 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
641 * was received. We need to ensure we receive the statistics in order
642 * to update the temperature used for calibrating the TXPOWER.
643 */
644 static void iwl4965_bg_statistics_periodic(unsigned long data)
645 {
646 struct iwl_priv *priv = (struct iwl_priv *)data;
647
648 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
649 return;
650
651 iwl_send_statistics_request(priv, CMD_ASYNC);
652 }
653
654 void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
655 {
656 struct iwl4965_ct_kill_config cmd;
657 unsigned long flags;
658 int ret = 0;
659
660 spin_lock_irqsave(&priv->lock, flags);
661 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
662 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
663 spin_unlock_irqrestore(&priv->lock, flags);
664
665 cmd.critical_temperature_R =
666 cpu_to_le32(priv->hw_params.ct_kill_threshold);
667
668 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
669 sizeof(cmd), &cmd);
670 if (ret)
671 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
672 else
673 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
674 "critical temperature is %d\n",
675 cmd.critical_temperature_R);
676 }
677
678 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
679
680 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
681 * Called after every association, but this runs only once!
682 * ... once chain noise is calibrated the first time, it's good forever. */
683 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
684 {
685 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
686
687 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
688 struct iwl4965_calibration_cmd cmd;
689
690 memset(&cmd, 0, sizeof(cmd));
691 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
692 cmd.diff_gain_a = 0;
693 cmd.diff_gain_b = 0;
694 cmd.diff_gain_c = 0;
695 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
696 sizeof(cmd), &cmd))
697 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
698 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
699 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
700 }
701 }
702
703 static void iwl4965_gain_computation(struct iwl_priv *priv,
704 u32 *average_noise,
705 u16 min_average_noise_antenna_i,
706 u32 min_average_noise)
707 {
708 int i, ret;
709 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
710
711 data->delta_gain_code[min_average_noise_antenna_i] = 0;
712
713 for (i = 0; i < NUM_RX_CHAINS; i++) {
714 s32 delta_g = 0;
715
716 if (!(data->disconn_array[i]) &&
717 (data->delta_gain_code[i] ==
718 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
719 delta_g = average_noise[i] - min_average_noise;
720 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
721 data->delta_gain_code[i] =
722 min(data->delta_gain_code[i],
723 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
724
725 data->delta_gain_code[i] =
726 (data->delta_gain_code[i] | (1 << 2));
727 } else {
728 data->delta_gain_code[i] = 0;
729 }
730 }
731 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
732 data->delta_gain_code[0],
733 data->delta_gain_code[1],
734 data->delta_gain_code[2]);
735
736 /* Differential gain gets sent to uCode only once */
737 if (!data->radio_write) {
738 struct iwl4965_calibration_cmd cmd;
739 data->radio_write = 1;
740
741 memset(&cmd, 0, sizeof(cmd));
742 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
743 cmd.diff_gain_a = data->delta_gain_code[0];
744 cmd.diff_gain_b = data->delta_gain_code[1];
745 cmd.diff_gain_c = data->delta_gain_code[2];
746 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
747 sizeof(cmd), &cmd);
748 if (ret)
749 IWL_DEBUG_CALIB("fail sending cmd "
750 "REPLY_PHY_CALIBRATION_CMD \n");
751
752 /* TODO we might want recalculate
753 * rx_chain in rxon cmd */
754
755 /* Mark so we run this algo only once! */
756 data->state = IWL_CHAIN_NOISE_CALIBRATED;
757 }
758 data->chain_noise_a = 0;
759 data->chain_noise_b = 0;
760 data->chain_noise_c = 0;
761 data->chain_signal_a = 0;
762 data->chain_signal_b = 0;
763 data->chain_signal_c = 0;
764 data->beacon_count = 0;
765 }
766
767 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
768 {
769 struct iwl_priv *priv = container_of(work, struct iwl_priv,
770 sensitivity_work);
771
772 mutex_lock(&priv->mutex);
773
774 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
775 test_bit(STATUS_SCANNING, &priv->status)) {
776 mutex_unlock(&priv->mutex);
777 return;
778 }
779
780 if (priv->start_calib) {
781 iwl_chain_noise_calibration(priv, &priv->statistics);
782
783 iwl_sensitivity_calibration(priv, &priv->statistics);
784 }
785
786 mutex_unlock(&priv->mutex);
787 return;
788 }
789 #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
790
791 static void iwl4965_bg_txpower_work(struct work_struct *work)
792 {
793 struct iwl_priv *priv = container_of(work, struct iwl_priv,
794 txpower_work);
795
796 /* If a scan happened to start before we got here
797 * then just return; the statistics notification will
798 * kick off another scheduled work to compensate for
799 * any temperature delta we missed here. */
800 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
801 test_bit(STATUS_SCANNING, &priv->status))
802 return;
803
804 mutex_lock(&priv->mutex);
805
806 /* Regardless of if we are assocaited, we must reconfigure the
807 * TX power since frames can be sent on non-radar channels while
808 * not associated */
809 iwl4965_hw_reg_send_txpower(priv);
810
811 /* Update last_temperature to keep is_calib_needed from running
812 * when it isn't needed... */
813 priv->last_temperature = priv->temperature;
814
815 mutex_unlock(&priv->mutex);
816 }
817
818 /*
819 * Acquire priv->lock before calling this function !
820 */
821 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
822 {
823 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
824 (index & 0xff) | (txq_id << 8));
825 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
826 }
827
828 /**
829 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
830 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
831 * @scd_retry: (1) Indicates queue will be used in aggregation mode
832 *
833 * NOTE: Acquire priv->lock before calling this function !
834 */
835 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
836 struct iwl_tx_queue *txq,
837 int tx_fifo_id, int scd_retry)
838 {
839 int txq_id = txq->q.id;
840
841 /* Find out whether to activate Tx queue */
842 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
843
844 /* Set up and activate */
845 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
846 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
847 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
848 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
849 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
850 IWL49_SCD_QUEUE_STTS_REG_MSK);
851
852 txq->sched_retry = scd_retry;
853
854 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
855 active ? "Activate" : "Deactivate",
856 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
857 }
858
859 static const u16 default_queue_to_tx_fifo[] = {
860 IWL_TX_FIFO_AC3,
861 IWL_TX_FIFO_AC2,
862 IWL_TX_FIFO_AC1,
863 IWL_TX_FIFO_AC0,
864 IWL49_CMD_FIFO_NUM,
865 IWL_TX_FIFO_HCCA_1,
866 IWL_TX_FIFO_HCCA_2
867 };
868
869 int iwl4965_alive_notify(struct iwl_priv *priv)
870 {
871 u32 a;
872 int i = 0;
873 unsigned long flags;
874 int ret;
875
876 spin_lock_irqsave(&priv->lock, flags);
877
878 ret = iwl_grab_nic_access(priv);
879 if (ret) {
880 spin_unlock_irqrestore(&priv->lock, flags);
881 return ret;
882 }
883
884 /* Clear 4965's internal Tx Scheduler data base */
885 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
886 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
887 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
888 iwl_write_targ_mem(priv, a, 0);
889 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
890 iwl_write_targ_mem(priv, a, 0);
891 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
892 iwl_write_targ_mem(priv, a, 0);
893
894 /* Tel 4965 where to find Tx byte count tables */
895 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
896 (priv->shared_phys +
897 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
898
899 /* Disable chain mode for all queues */
900 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
901
902 /* Initialize each Tx queue (including the command queue) */
903 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
904
905 /* TFD circular buffer read/write indexes */
906 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
907 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
908
909 /* Max Tx Window size for Scheduler-ACK mode */
910 iwl_write_targ_mem(priv, priv->scd_base_addr +
911 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
912 (SCD_WIN_SIZE <<
913 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
914 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
915
916 /* Frame limit */
917 iwl_write_targ_mem(priv, priv->scd_base_addr +
918 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
919 sizeof(u32),
920 (SCD_FRAME_LIMIT <<
921 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
922 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
923
924 }
925 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
926 (1 << priv->hw_params.max_txq_num) - 1);
927
928 /* Activate all Tx DMA/FIFO channels */
929 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
930
931 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
932
933 /* Map each Tx/cmd queue to its corresponding fifo */
934 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
935 int ac = default_queue_to_tx_fifo[i];
936 iwl_txq_ctx_activate(priv, i);
937 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
938 }
939
940 iwl_release_nic_access(priv);
941 spin_unlock_irqrestore(&priv->lock, flags);
942
943 return ret;
944 }
945
946 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
947 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
948 .min_nrg_cck = 97,
949 .max_nrg_cck = 0,
950
951 .auto_corr_min_ofdm = 85,
952 .auto_corr_min_ofdm_mrc = 170,
953 .auto_corr_min_ofdm_x1 = 105,
954 .auto_corr_min_ofdm_mrc_x1 = 220,
955
956 .auto_corr_max_ofdm = 120,
957 .auto_corr_max_ofdm_mrc = 210,
958 .auto_corr_max_ofdm_x1 = 140,
959 .auto_corr_max_ofdm_mrc_x1 = 270,
960
961 .auto_corr_min_cck = 125,
962 .auto_corr_max_cck = 200,
963 .auto_corr_min_cck_mrc = 200,
964 .auto_corr_max_cck_mrc = 400,
965
966 .nrg_th_cck = 100,
967 .nrg_th_ofdm = 100,
968 };
969 #endif
970
971 /**
972 * iwl4965_hw_set_hw_params
973 *
974 * Called when initializing driver
975 */
976 int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
977 {
978
979 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
980 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
981 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
982 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
983 return -EINVAL;
984 }
985
986 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
987 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
988 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
989 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
990 if (priv->cfg->mod_params->amsdu_size_8K)
991 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
992 else
993 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
994 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
995 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
996 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
997
998 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
999 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
1000 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
1001 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
1002
1003 priv->hw_params.tx_chains_num = 2;
1004 priv->hw_params.rx_chains_num = 2;
1005 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
1006 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
1007 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
1008
1009 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1010 priv->hw_params.sens = &iwl4965_sensitivity;
1011 #endif
1012
1013 return 0;
1014 }
1015
1016 /* set card power command */
1017 static int iwl4965_set_power(struct iwl_priv *priv,
1018 void *cmd)
1019 {
1020 int ret = 0;
1021
1022 ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
1023 sizeof(struct iwl4965_powertable_cmd),
1024 cmd, NULL);
1025 return ret;
1026 }
1027 int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1028 {
1029 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1030 return -EINVAL;
1031 }
1032
1033 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1034 {
1035 s32 sign = 1;
1036
1037 if (num < 0) {
1038 sign = -sign;
1039 num = -num;
1040 }
1041 if (denom < 0) {
1042 sign = -sign;
1043 denom = -denom;
1044 }
1045 *res = 1;
1046 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1047
1048 return 1;
1049 }
1050
1051 /**
1052 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1053 *
1054 * Determines power supply voltage compensation for txpower calculations.
1055 * Returns number of 1/2-dB steps to subtract from gain table index,
1056 * to compensate for difference between power supply voltage during
1057 * factory measurements, vs. current power supply voltage.
1058 *
1059 * Voltage indication is higher for lower voltage.
1060 * Lower voltage requires more gain (lower gain table index).
1061 */
1062 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1063 s32 current_voltage)
1064 {
1065 s32 comp = 0;
1066
1067 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1068 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1069 return 0;
1070
1071 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1072 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1073
1074 if (current_voltage > eeprom_voltage)
1075 comp *= 2;
1076 if ((comp < -2) || (comp > 2))
1077 comp = 0;
1078
1079 return comp;
1080 }
1081
1082 static const struct iwl_channel_info *
1083 iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
1084 enum ieee80211_band band, u16 channel)
1085 {
1086 const struct iwl_channel_info *ch_info;
1087
1088 ch_info = iwl_get_channel_info(priv, band, channel);
1089
1090 if (!is_channel_valid(ch_info))
1091 return NULL;
1092
1093 return ch_info;
1094 }
1095
1096 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1097 {
1098 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1099 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1100 return CALIB_CH_GROUP_5;
1101
1102 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1103 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1104 return CALIB_CH_GROUP_1;
1105
1106 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1107 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1108 return CALIB_CH_GROUP_2;
1109
1110 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1111 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1112 return CALIB_CH_GROUP_3;
1113
1114 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1115 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1116 return CALIB_CH_GROUP_4;
1117
1118 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1119 return -1;
1120 }
1121
1122 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
1123 {
1124 s32 b = -1;
1125
1126 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
1127 if (priv->calib_info->band_info[b].ch_from == 0)
1128 continue;
1129
1130 if ((channel >= priv->calib_info->band_info[b].ch_from)
1131 && (channel <= priv->calib_info->band_info[b].ch_to))
1132 break;
1133 }
1134
1135 return b;
1136 }
1137
1138 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1139 {
1140 s32 val;
1141
1142 if (x2 == x1)
1143 return y1;
1144 else {
1145 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1146 return val + y2;
1147 }
1148 }
1149
1150 /**
1151 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
1152 *
1153 * Interpolates factory measurements from the two sample channels within a
1154 * sub-band, to apply to channel of interest. Interpolation is proportional to
1155 * differences in channel frequencies, which is proportional to differences
1156 * in channel number.
1157 */
1158 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
1159 struct iwl_eeprom_calib_ch_info *chan_info)
1160 {
1161 s32 s = -1;
1162 u32 c;
1163 u32 m;
1164 const struct iwl_eeprom_calib_measure *m1;
1165 const struct iwl_eeprom_calib_measure *m2;
1166 struct iwl_eeprom_calib_measure *omeas;
1167 u32 ch_i1;
1168 u32 ch_i2;
1169
1170 s = iwl4965_get_sub_band(priv, channel);
1171 if (s >= EEPROM_TX_POWER_BANDS) {
1172 IWL_ERROR("Tx Power can not find channel %d ", channel);
1173 return -1;
1174 }
1175
1176 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1177 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
1178 chan_info->ch_num = (u8) channel;
1179
1180 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1181 channel, s, ch_i1, ch_i2);
1182
1183 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1184 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1185 m1 = &(priv->calib_info->band_info[s].ch1.
1186 measurements[c][m]);
1187 m2 = &(priv->calib_info->band_info[s].ch2.
1188 measurements[c][m]);
1189 omeas = &(chan_info->measurements[c][m]);
1190
1191 omeas->actual_pow =
1192 (u8) iwl4965_interpolate_value(channel, ch_i1,
1193 m1->actual_pow,
1194 ch_i2,
1195 m2->actual_pow);
1196 omeas->gain_idx =
1197 (u8) iwl4965_interpolate_value(channel, ch_i1,
1198 m1->gain_idx, ch_i2,
1199 m2->gain_idx);
1200 omeas->temperature =
1201 (u8) iwl4965_interpolate_value(channel, ch_i1,
1202 m1->temperature,
1203 ch_i2,
1204 m2->temperature);
1205 omeas->pa_det =
1206 (s8) iwl4965_interpolate_value(channel, ch_i1,
1207 m1->pa_det, ch_i2,
1208 m2->pa_det);
1209
1210 IWL_DEBUG_TXPOWER
1211 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1212 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1213 IWL_DEBUG_TXPOWER
1214 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1215 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1216 IWL_DEBUG_TXPOWER
1217 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1218 m1->pa_det, m2->pa_det, omeas->pa_det);
1219 IWL_DEBUG_TXPOWER
1220 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1221 m1->temperature, m2->temperature,
1222 omeas->temperature);
1223 }
1224 }
1225
1226 return 0;
1227 }
1228
1229 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1230 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1231 static s32 back_off_table[] = {
1232 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1233 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1234 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1235 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1236 10 /* CCK */
1237 };
1238
1239 /* Thermal compensation values for txpower for various frequency ranges ...
1240 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1241 static struct iwl4965_txpower_comp_entry {
1242 s32 degrees_per_05db_a;
1243 s32 degrees_per_05db_a_denom;
1244 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1245 {9, 2}, /* group 0 5.2, ch 34-43 */
1246 {4, 1}, /* group 1 5.2, ch 44-70 */
1247 {4, 1}, /* group 2 5.2, ch 71-124 */
1248 {4, 1}, /* group 3 5.2, ch 125-200 */
1249 {3, 1} /* group 4 2.4, ch all */
1250 };
1251
1252 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1253 {
1254 if (!band) {
1255 if ((rate_power_index & 7) <= 4)
1256 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1257 }
1258 return MIN_TX_GAIN_INDEX;
1259 }
1260
1261 struct gain_entry {
1262 u8 dsp;
1263 u8 radio;
1264 };
1265
1266 static const struct gain_entry gain_table[2][108] = {
1267 /* 5.2GHz power gain index table */
1268 {
1269 {123, 0x3F}, /* highest txpower */
1270 {117, 0x3F},
1271 {110, 0x3F},
1272 {104, 0x3F},
1273 {98, 0x3F},
1274 {110, 0x3E},
1275 {104, 0x3E},
1276 {98, 0x3E},
1277 {110, 0x3D},
1278 {104, 0x3D},
1279 {98, 0x3D},
1280 {110, 0x3C},
1281 {104, 0x3C},
1282 {98, 0x3C},
1283 {110, 0x3B},
1284 {104, 0x3B},
1285 {98, 0x3B},
1286 {110, 0x3A},
1287 {104, 0x3A},
1288 {98, 0x3A},
1289 {110, 0x39},
1290 {104, 0x39},
1291 {98, 0x39},
1292 {110, 0x38},
1293 {104, 0x38},
1294 {98, 0x38},
1295 {110, 0x37},
1296 {104, 0x37},
1297 {98, 0x37},
1298 {110, 0x36},
1299 {104, 0x36},
1300 {98, 0x36},
1301 {110, 0x35},
1302 {104, 0x35},
1303 {98, 0x35},
1304 {110, 0x34},
1305 {104, 0x34},
1306 {98, 0x34},
1307 {110, 0x33},
1308 {104, 0x33},
1309 {98, 0x33},
1310 {110, 0x32},
1311 {104, 0x32},
1312 {98, 0x32},
1313 {110, 0x31},
1314 {104, 0x31},
1315 {98, 0x31},
1316 {110, 0x30},
1317 {104, 0x30},
1318 {98, 0x30},
1319 {110, 0x25},
1320 {104, 0x25},
1321 {98, 0x25},
1322 {110, 0x24},
1323 {104, 0x24},
1324 {98, 0x24},
1325 {110, 0x23},
1326 {104, 0x23},
1327 {98, 0x23},
1328 {110, 0x22},
1329 {104, 0x18},
1330 {98, 0x18},
1331 {110, 0x17},
1332 {104, 0x17},
1333 {98, 0x17},
1334 {110, 0x16},
1335 {104, 0x16},
1336 {98, 0x16},
1337 {110, 0x15},
1338 {104, 0x15},
1339 {98, 0x15},
1340 {110, 0x14},
1341 {104, 0x14},
1342 {98, 0x14},
1343 {110, 0x13},
1344 {104, 0x13},
1345 {98, 0x13},
1346 {110, 0x12},
1347 {104, 0x08},
1348 {98, 0x08},
1349 {110, 0x07},
1350 {104, 0x07},
1351 {98, 0x07},
1352 {110, 0x06},
1353 {104, 0x06},
1354 {98, 0x06},
1355 {110, 0x05},
1356 {104, 0x05},
1357 {98, 0x05},
1358 {110, 0x04},
1359 {104, 0x04},
1360 {98, 0x04},
1361 {110, 0x03},
1362 {104, 0x03},
1363 {98, 0x03},
1364 {110, 0x02},
1365 {104, 0x02},
1366 {98, 0x02},
1367 {110, 0x01},
1368 {104, 0x01},
1369 {98, 0x01},
1370 {110, 0x00},
1371 {104, 0x00},
1372 {98, 0x00},
1373 {93, 0x00},
1374 {88, 0x00},
1375 {83, 0x00},
1376 {78, 0x00},
1377 },
1378 /* 2.4GHz power gain index table */
1379 {
1380 {110, 0x3f}, /* highest txpower */
1381 {104, 0x3f},
1382 {98, 0x3f},
1383 {110, 0x3e},
1384 {104, 0x3e},
1385 {98, 0x3e},
1386 {110, 0x3d},
1387 {104, 0x3d},
1388 {98, 0x3d},
1389 {110, 0x3c},
1390 {104, 0x3c},
1391 {98, 0x3c},
1392 {110, 0x3b},
1393 {104, 0x3b},
1394 {98, 0x3b},
1395 {110, 0x3a},
1396 {104, 0x3a},
1397 {98, 0x3a},
1398 {110, 0x39},
1399 {104, 0x39},
1400 {98, 0x39},
1401 {110, 0x38},
1402 {104, 0x38},
1403 {98, 0x38},
1404 {110, 0x37},
1405 {104, 0x37},
1406 {98, 0x37},
1407 {110, 0x36},
1408 {104, 0x36},
1409 {98, 0x36},
1410 {110, 0x35},
1411 {104, 0x35},
1412 {98, 0x35},
1413 {110, 0x34},
1414 {104, 0x34},
1415 {98, 0x34},
1416 {110, 0x33},
1417 {104, 0x33},
1418 {98, 0x33},
1419 {110, 0x32},
1420 {104, 0x32},
1421 {98, 0x32},
1422 {110, 0x31},
1423 {104, 0x31},
1424 {98, 0x31},
1425 {110, 0x30},
1426 {104, 0x30},
1427 {98, 0x30},
1428 {110, 0x6},
1429 {104, 0x6},
1430 {98, 0x6},
1431 {110, 0x5},
1432 {104, 0x5},
1433 {98, 0x5},
1434 {110, 0x4},
1435 {104, 0x4},
1436 {98, 0x4},
1437 {110, 0x3},
1438 {104, 0x3},
1439 {98, 0x3},
1440 {110, 0x2},
1441 {104, 0x2},
1442 {98, 0x2},
1443 {110, 0x1},
1444 {104, 0x1},
1445 {98, 0x1},
1446 {110, 0x0},
1447 {104, 0x0},
1448 {98, 0x0},
1449 {97, 0},
1450 {96, 0},
1451 {95, 0},
1452 {94, 0},
1453 {93, 0},
1454 {92, 0},
1455 {91, 0},
1456 {90, 0},
1457 {89, 0},
1458 {88, 0},
1459 {87, 0},
1460 {86, 0},
1461 {85, 0},
1462 {84, 0},
1463 {83, 0},
1464 {82, 0},
1465 {81, 0},
1466 {80, 0},
1467 {79, 0},
1468 {78, 0},
1469 {77, 0},
1470 {76, 0},
1471 {75, 0},
1472 {74, 0},
1473 {73, 0},
1474 {72, 0},
1475 {71, 0},
1476 {70, 0},
1477 {69, 0},
1478 {68, 0},
1479 {67, 0},
1480 {66, 0},
1481 {65, 0},
1482 {64, 0},
1483 {63, 0},
1484 {62, 0},
1485 {61, 0},
1486 {60, 0},
1487 {59, 0},
1488 }
1489 };
1490
1491 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1492 u8 is_fat, u8 ctrl_chan_high,
1493 struct iwl4965_tx_power_db *tx_power_tbl)
1494 {
1495 u8 saturation_power;
1496 s32 target_power;
1497 s32 user_target_power;
1498 s32 power_limit;
1499 s32 current_temp;
1500 s32 reg_limit;
1501 s32 current_regulatory;
1502 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1503 int i;
1504 int c;
1505 const struct iwl_channel_info *ch_info = NULL;
1506 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1507 const struct iwl_eeprom_calib_measure *measurement;
1508 s16 voltage;
1509 s32 init_voltage;
1510 s32 voltage_compensation;
1511 s32 degrees_per_05db_num;
1512 s32 degrees_per_05db_denom;
1513 s32 factory_temp;
1514 s32 temperature_comp[2];
1515 s32 factory_gain_index[2];
1516 s32 factory_actual_pwr[2];
1517 s32 power_index;
1518
1519 /* Sanity check requested level (dBm) */
1520 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
1521 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
1522 priv->user_txpower_limit);
1523 return -EINVAL;
1524 }
1525 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
1526 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
1527 priv->user_txpower_limit);
1528 return -EINVAL;
1529 }
1530
1531 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1532 * are used for indexing into txpower table) */
1533 user_target_power = 2 * priv->user_txpower_limit;
1534
1535 /* Get current (RXON) channel, band, width */
1536 ch_info =
1537 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
1538
1539 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1540 is_fat);
1541
1542 if (!ch_info)
1543 return -EINVAL;
1544
1545 /* get txatten group, used to select 1) thermal txpower adjustment
1546 * and 2) mimo txpower balance between Tx chains. */
1547 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1548 if (txatten_grp < 0)
1549 return -EINVAL;
1550
1551 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1552 channel, txatten_grp);
1553
1554 if (is_fat) {
1555 if (ctrl_chan_high)
1556 channel -= 2;
1557 else
1558 channel += 2;
1559 }
1560
1561 /* hardware txpower limits ...
1562 * saturation (clipping distortion) txpowers are in half-dBm */
1563 if (band)
1564 saturation_power = priv->calib_info->saturation_power24;
1565 else
1566 saturation_power = priv->calib_info->saturation_power52;
1567
1568 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1569 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1570 if (band)
1571 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1572 else
1573 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1574 }
1575
1576 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1577 * max_power_avg values are in dBm, convert * 2 */
1578 if (is_fat)
1579 reg_limit = ch_info->fat_max_power_avg * 2;
1580 else
1581 reg_limit = ch_info->max_power_avg * 2;
1582
1583 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1584 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1585 if (band)
1586 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1587 else
1588 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1589 }
1590
1591 /* Interpolate txpower calibration values for this channel,
1592 * based on factory calibration tests on spaced channels. */
1593 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1594
1595 /* calculate tx gain adjustment based on power supply voltage */
1596 voltage = priv->calib_info->voltage;
1597 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1598 voltage_compensation =
1599 iwl4965_get_voltage_compensation(voltage, init_voltage);
1600
1601 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1602 init_voltage,
1603 voltage, voltage_compensation);
1604
1605 /* get current temperature (Celsius) */
1606 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1607 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1608 current_temp = KELVIN_TO_CELSIUS(current_temp);
1609
1610 /* select thermal txpower adjustment params, based on channel group
1611 * (same frequency group used for mimo txatten adjustment) */
1612 degrees_per_05db_num =
1613 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1614 degrees_per_05db_denom =
1615 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1616
1617 /* get per-chain txpower values from factory measurements */
1618 for (c = 0; c < 2; c++) {
1619 measurement = &ch_eeprom_info.measurements[c][1];
1620
1621 /* txgain adjustment (in half-dB steps) based on difference
1622 * between factory and current temperature */
1623 factory_temp = measurement->temperature;
1624 iwl4965_math_div_round((current_temp - factory_temp) *
1625 degrees_per_05db_denom,
1626 degrees_per_05db_num,
1627 &temperature_comp[c]);
1628
1629 factory_gain_index[c] = measurement->gain_idx;
1630 factory_actual_pwr[c] = measurement->actual_pow;
1631
1632 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1633 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1634 "curr tmp %d, comp %d steps\n",
1635 factory_temp, current_temp,
1636 temperature_comp[c]);
1637
1638 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1639 factory_gain_index[c],
1640 factory_actual_pwr[c]);
1641 }
1642
1643 /* for each of 33 bit-rates (including 1 for CCK) */
1644 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1645 u8 is_mimo_rate;
1646 union iwl4965_tx_power_dual_stream tx_power;
1647
1648 /* for mimo, reduce each chain's txpower by half
1649 * (3dB, 6 steps), so total output power is regulatory
1650 * compliant. */
1651 if (i & 0x8) {
1652 current_regulatory = reg_limit -
1653 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1654 is_mimo_rate = 1;
1655 } else {
1656 current_regulatory = reg_limit;
1657 is_mimo_rate = 0;
1658 }
1659
1660 /* find txpower limit, either hardware or regulatory */
1661 power_limit = saturation_power - back_off_table[i];
1662 if (power_limit > current_regulatory)
1663 power_limit = current_regulatory;
1664
1665 /* reduce user's txpower request if necessary
1666 * for this rate on this channel */
1667 target_power = user_target_power;
1668 if (target_power > power_limit)
1669 target_power = power_limit;
1670
1671 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1672 i, saturation_power - back_off_table[i],
1673 current_regulatory, user_target_power,
1674 target_power);
1675
1676 /* for each of 2 Tx chains (radio transmitters) */
1677 for (c = 0; c < 2; c++) {
1678 s32 atten_value;
1679
1680 if (is_mimo_rate)
1681 atten_value =
1682 (s32)le32_to_cpu(priv->card_alive_init.
1683 tx_atten[txatten_grp][c]);
1684 else
1685 atten_value = 0;
1686
1687 /* calculate index; higher index means lower txpower */
1688 power_index = (u8) (factory_gain_index[c] -
1689 (target_power -
1690 factory_actual_pwr[c]) -
1691 temperature_comp[c] -
1692 voltage_compensation +
1693 atten_value);
1694
1695 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1696 power_index); */
1697
1698 if (power_index < get_min_power_index(i, band))
1699 power_index = get_min_power_index(i, band);
1700
1701 /* adjust 5 GHz index to support negative indexes */
1702 if (!band)
1703 power_index += 9;
1704
1705 /* CCK, rate 32, reduce txpower for CCK */
1706 if (i == POWER_TABLE_CCK_ENTRY)
1707 power_index +=
1708 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1709
1710 /* stay within the table! */
1711 if (power_index > 107) {
1712 IWL_WARNING("txpower index %d > 107\n",
1713 power_index);
1714 power_index = 107;
1715 }
1716 if (power_index < 0) {
1717 IWL_WARNING("txpower index %d < 0\n",
1718 power_index);
1719 power_index = 0;
1720 }
1721
1722 /* fill txpower command for this rate/chain */
1723 tx_power.s.radio_tx_gain[c] =
1724 gain_table[band][power_index].radio;
1725 tx_power.s.dsp_predis_atten[c] =
1726 gain_table[band][power_index].dsp;
1727
1728 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1729 "gain 0x%02x dsp %d\n",
1730 c, atten_value, power_index,
1731 tx_power.s.radio_tx_gain[c],
1732 tx_power.s.dsp_predis_atten[c]);
1733 }/* for each chain */
1734
1735 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1736
1737 }/* for each rate */
1738
1739 return 0;
1740 }
1741
1742 /**
1743 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
1744 *
1745 * Uses the active RXON for channel, band, and characteristics (fat, high)
1746 * The power limit is taken from priv->user_txpower_limit.
1747 */
1748 int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
1749 {
1750 struct iwl4965_txpowertable_cmd cmd = { 0 };
1751 int ret;
1752 u8 band = 0;
1753 u8 is_fat = 0;
1754 u8 ctrl_chan_high = 0;
1755
1756 if (test_bit(STATUS_SCANNING, &priv->status)) {
1757 /* If this gets hit a lot, switch it to a BUG() and catch
1758 * the stack trace to find out who is calling this during
1759 * a scan. */
1760 IWL_WARNING("TX Power requested while scanning!\n");
1761 return -EAGAIN;
1762 }
1763
1764 band = priv->band == IEEE80211_BAND_2GHZ;
1765
1766 is_fat = is_fat_channel(priv->active_rxon.flags);
1767
1768 if (is_fat &&
1769 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1770 ctrl_chan_high = 1;
1771
1772 cmd.band = band;
1773 cmd.channel = priv->active_rxon.channel;
1774
1775 ret = iwl4965_fill_txpower_tbl(priv, band,
1776 le16_to_cpu(priv->active_rxon.channel),
1777 is_fat, ctrl_chan_high, &cmd.tx_power);
1778 if (ret)
1779 goto out;
1780
1781 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1782
1783 out:
1784 return ret;
1785 }
1786
1787 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1788 {
1789 int ret = 0;
1790 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1791 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1792 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1793
1794 if ((rxon1->flags == rxon2->flags) &&
1795 (rxon1->filter_flags == rxon2->filter_flags) &&
1796 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1797 (rxon1->ofdm_ht_single_stream_basic_rates ==
1798 rxon2->ofdm_ht_single_stream_basic_rates) &&
1799 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1800 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1801 (rxon1->rx_chain == rxon2->rx_chain) &&
1802 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1803 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1804 return 0;
1805 }
1806
1807 rxon_assoc.flags = priv->staging_rxon.flags;
1808 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1809 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1810 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1811 rxon_assoc.reserved = 0;
1812 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1813 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1814 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1815 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1816 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1817
1818 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1819 sizeof(rxon_assoc), &rxon_assoc, NULL);
1820 if (ret)
1821 return ret;
1822
1823 return ret;
1824 }
1825
1826
1827 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1828 {
1829 int rc;
1830 u8 band = 0;
1831 u8 is_fat = 0;
1832 u8 ctrl_chan_high = 0;
1833 struct iwl4965_channel_switch_cmd cmd = { 0 };
1834 const struct iwl_channel_info *ch_info;
1835
1836 band = priv->band == IEEE80211_BAND_2GHZ;
1837
1838 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1839
1840 is_fat = is_fat_channel(priv->staging_rxon.flags);
1841
1842 if (is_fat &&
1843 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1844 ctrl_chan_high = 1;
1845
1846 cmd.band = band;
1847 cmd.expect_beacon = 0;
1848 cmd.channel = cpu_to_le16(channel);
1849 cmd.rxon_flags = priv->active_rxon.flags;
1850 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1851 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1852 if (ch_info)
1853 cmd.expect_beacon = is_channel_radar(ch_info);
1854 else
1855 cmd.expect_beacon = 1;
1856
1857 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1858 ctrl_chan_high, &cmd.tx_power);
1859 if (rc) {
1860 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1861 return rc;
1862 }
1863
1864 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1865 return rc;
1866 }
1867
1868 static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
1869 {
1870 struct iwl4965_shared *s = priv->shared_virt;
1871 return le32_to_cpu(s->rb_closed) & 0xFFF;
1872 }
1873
1874 int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1875 {
1876 return priv->temperature;
1877 }
1878
1879 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
1880 struct iwl_frame *frame, u8 rate)
1881 {
1882 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
1883 unsigned int frame_size;
1884
1885 tx_beacon_cmd = &frame->u.beacon;
1886 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1887
1888 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
1889 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1890
1891 frame_size = iwl4965_fill_beacon_frame(priv,
1892 tx_beacon_cmd->frame,
1893 iwl_bcast_addr,
1894 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1895
1896 BUG_ON(frame_size > MAX_MPDU_SIZE);
1897 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1898
1899 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1900 tx_beacon_cmd->tx.rate_n_flags =
1901 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
1902 else
1903 tx_beacon_cmd->tx.rate_n_flags =
1904 iwl4965_hw_set_rate_n_flags(rate, 0);
1905
1906 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1907 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1908 return (sizeof(*tx_beacon_cmd) + frame_size);
1909 }
1910
1911 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1912 {
1913 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1914 sizeof(struct iwl4965_shared),
1915 &priv->shared_phys);
1916 if (!priv->shared_virt)
1917 return -ENOMEM;
1918
1919 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1920
1921 priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1922
1923 return 0;
1924 }
1925
1926 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1927 {
1928 if (priv->shared_virt)
1929 pci_free_consistent(priv->pci_dev,
1930 sizeof(struct iwl4965_shared),
1931 priv->shared_virt,
1932 priv->shared_phys);
1933 }
1934
1935 /**
1936 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1937 */
1938 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1939 struct iwl_tx_queue *txq,
1940 u16 byte_cnt)
1941 {
1942 int len;
1943 int txq_id = txq->q.id;
1944 struct iwl4965_shared *shared_data = priv->shared_virt;
1945
1946 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1947
1948 /* Set up byte count within first 256 entries */
1949 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1950 tfd_offset[txq->q.write_ptr], byte_cnt, len);
1951
1952 /* If within first 64 entries, duplicate at end */
1953 if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
1954 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1955 tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
1956 byte_cnt, len);
1957 }
1958
1959 /**
1960 * sign_extend - Sign extend a value using specified bit as sign-bit
1961 *
1962 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1963 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1964 *
1965 * @param oper value to sign extend
1966 * @param index 0 based bit index (0<=index<32) to sign bit
1967 */
1968 static s32 sign_extend(u32 oper, int index)
1969 {
1970 u8 shift = 31 - index;
1971
1972 return (s32)(oper << shift) >> shift;
1973 }
1974
1975 /**
1976 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
1977 * @statistics: Provides the temperature reading from the uCode
1978 *
1979 * A return of <0 indicates bogus data in the statistics
1980 */
1981 int iwl4965_get_temperature(const struct iwl_priv *priv)
1982 {
1983 s32 temperature;
1984 s32 vt;
1985 s32 R1, R2, R3;
1986 u32 R4;
1987
1988 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1989 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1990 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1991 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1992 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1993 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1994 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1995 } else {
1996 IWL_DEBUG_TEMP("Running temperature calibration\n");
1997 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1998 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1999 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
2000 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
2001 }
2002
2003 /*
2004 * Temperature is only 23 bits, so sign extend out to 32.
2005 *
2006 * NOTE If we haven't received a statistics notification yet
2007 * with an updated temperature, use R4 provided to us in the
2008 * "initialize" ALIVE response.
2009 */
2010 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
2011 vt = sign_extend(R4, 23);
2012 else
2013 vt = sign_extend(
2014 le32_to_cpu(priv->statistics.general.temperature), 23);
2015
2016 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
2017 R1, R2, R3, vt);
2018
2019 if (R3 == R1) {
2020 IWL_ERROR("Calibration conflict R1 == R3\n");
2021 return -1;
2022 }
2023
2024 /* Calculate temperature in degrees Kelvin, adjust by 97%.
2025 * Add offset to center the adjustment around 0 degrees Centigrade. */
2026 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
2027 temperature /= (R3 - R1);
2028 temperature = (temperature * 97) / 100 +
2029 TEMPERATURE_CALIB_KELVIN_OFFSET;
2030
2031 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
2032 KELVIN_TO_CELSIUS(temperature));
2033
2034 return temperature;
2035 }
2036
2037 /* Adjust Txpower only if temperature variance is greater than threshold. */
2038 #define IWL_TEMPERATURE_THRESHOLD 3
2039
2040 /**
2041 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
2042 *
2043 * If the temperature changed has changed sufficiently, then a recalibration
2044 * is needed.
2045 *
2046 * Assumes caller will replace priv->last_temperature once calibration
2047 * executed.
2048 */
2049 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
2050 {
2051 int temp_diff;
2052
2053 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
2054 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
2055 return 0;
2056 }
2057
2058 temp_diff = priv->temperature - priv->last_temperature;
2059
2060 /* get absolute value */
2061 if (temp_diff < 0) {
2062 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
2063 temp_diff = -temp_diff;
2064 } else if (temp_diff == 0)
2065 IWL_DEBUG_POWER("Same temp, \n");
2066 else
2067 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
2068
2069 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
2070 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
2071 return 0;
2072 }
2073
2074 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
2075
2076 return 1;
2077 }
2078
2079 /* Calculate noise level, based on measurements during network silence just
2080 * before arriving beacon. This measurement can be done only if we know
2081 * exactly when to expect beacons, therefore only when we're associated. */
2082 static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
2083 {
2084 struct statistics_rx_non_phy *rx_info
2085 = &(priv->statistics.rx.general);
2086 int num_active_rx = 0;
2087 int total_silence = 0;
2088 int bcn_silence_a =
2089 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
2090 int bcn_silence_b =
2091 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
2092 int bcn_silence_c =
2093 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
2094
2095 if (bcn_silence_a) {
2096 total_silence += bcn_silence_a;
2097 num_active_rx++;
2098 }
2099 if (bcn_silence_b) {
2100 total_silence += bcn_silence_b;
2101 num_active_rx++;
2102 }
2103 if (bcn_silence_c) {
2104 total_silence += bcn_silence_c;
2105 num_active_rx++;
2106 }
2107
2108 /* Average among active antennas */
2109 if (num_active_rx)
2110 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
2111 else
2112 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2113
2114 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
2115 bcn_silence_a, bcn_silence_b, bcn_silence_c,
2116 priv->last_rx_noise);
2117 }
2118
2119 void iwl4965_hw_rx_statistics(struct iwl_priv *priv,
2120 struct iwl_rx_mem_buffer *rxb)
2121 {
2122 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2123 int change;
2124 s32 temp;
2125
2126 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
2127 (int)sizeof(priv->statistics), pkt->len);
2128
2129 change = ((priv->statistics.general.temperature !=
2130 pkt->u.stats.general.temperature) ||
2131 ((priv->statistics.flag &
2132 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
2133 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
2134
2135 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
2136
2137 set_bit(STATUS_STATISTICS, &priv->status);
2138
2139 /* Reschedule the statistics timer to occur in
2140 * REG_RECALIB_PERIOD seconds to ensure we get a
2141 * thermal update even if the uCode doesn't give
2142 * us one */
2143 mod_timer(&priv->statistics_periodic, jiffies +
2144 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
2145
2146 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2147 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
2148 iwl4965_rx_calc_noise(priv);
2149 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
2150 queue_work(priv->workqueue, &priv->sensitivity_work);
2151 #endif
2152 }
2153
2154 iwl_leds_background(priv);
2155
2156 /* If the hardware hasn't reported a change in
2157 * temperature then don't bother computing a
2158 * calibrated temperature value */
2159 if (!change)
2160 return;
2161
2162 temp = iwl4965_get_temperature(priv);
2163 if (temp < 0)
2164 return;
2165
2166 if (priv->temperature != temp) {
2167 if (priv->temperature)
2168 IWL_DEBUG_TEMP("Temperature changed "
2169 "from %dC to %dC\n",
2170 KELVIN_TO_CELSIUS(priv->temperature),
2171 KELVIN_TO_CELSIUS(temp));
2172 else
2173 IWL_DEBUG_TEMP("Temperature "
2174 "initialized to %dC\n",
2175 KELVIN_TO_CELSIUS(temp));
2176 }
2177
2178 priv->temperature = temp;
2179 set_bit(STATUS_TEMPERATURE, &priv->status);
2180
2181 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2182 iwl4965_is_temp_calib_needed(priv))
2183 queue_work(priv->workqueue, &priv->txpower_work);
2184 }
2185
2186 static void iwl4965_add_radiotap(struct iwl_priv *priv,
2187 struct sk_buff *skb,
2188 struct iwl4965_rx_phy_res *rx_start,
2189 struct ieee80211_rx_status *stats,
2190 u32 ampdu_status)
2191 {
2192 s8 signal = stats->signal;
2193 s8 noise = 0;
2194 int rate = stats->rate_idx;
2195 u64 tsf = stats->mactime;
2196 __le16 antenna;
2197 __le16 phy_flags_hw = rx_start->phy_flags;
2198 struct iwl4965_rt_rx_hdr {
2199 struct ieee80211_radiotap_header rt_hdr;
2200 __le64 rt_tsf; /* TSF */
2201 u8 rt_flags; /* radiotap packet flags */
2202 u8 rt_rate; /* rate in 500kb/s */
2203 __le16 rt_channelMHz; /* channel in MHz */
2204 __le16 rt_chbitmask; /* channel bitfield */
2205 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
2206 s8 rt_dbmnoise;
2207 u8 rt_antenna; /* antenna number */
2208 } __attribute__ ((packed)) *iwl4965_rt;
2209
2210 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
2211 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
2212 if (net_ratelimit())
2213 printk(KERN_ERR "not enough headroom [%d] for "
2214 "radiotap head [%zd]\n",
2215 skb_headroom(skb), sizeof(*iwl4965_rt));
2216 return;
2217 }
2218
2219 /* put radiotap header in front of 802.11 header and data */
2220 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
2221
2222 /* initialise radiotap header */
2223 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
2224 iwl4965_rt->rt_hdr.it_pad = 0;
2225
2226 /* total header + data */
2227 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
2228 &iwl4965_rt->rt_hdr.it_len);
2229
2230 /* Indicate all the fields we add to the radiotap header */
2231 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
2232 (1 << IEEE80211_RADIOTAP_FLAGS) |
2233 (1 << IEEE80211_RADIOTAP_RATE) |
2234 (1 << IEEE80211_RADIOTAP_CHANNEL) |
2235 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
2236 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
2237 (1 << IEEE80211_RADIOTAP_ANTENNA)),
2238 &iwl4965_rt->rt_hdr.it_present);
2239
2240 /* Zero the flags, we'll add to them as we go */
2241 iwl4965_rt->rt_flags = 0;
2242
2243 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
2244
2245 iwl4965_rt->rt_dbmsignal = signal;
2246 iwl4965_rt->rt_dbmnoise = noise;
2247
2248 /* Convert the channel frequency and set the flags */
2249 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
2250 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
2251 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2252 IEEE80211_CHAN_5GHZ),
2253 &iwl4965_rt->rt_chbitmask);
2254 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2255 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2256 IEEE80211_CHAN_2GHZ),
2257 &iwl4965_rt->rt_chbitmask);
2258 else /* 802.11g */
2259 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2260 IEEE80211_CHAN_2GHZ),
2261 &iwl4965_rt->rt_chbitmask);
2262
2263 if (rate == -1)
2264 iwl4965_rt->rt_rate = 0;
2265 else
2266 iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
2267
2268 /*
2269 * "antenna number"
2270 *
2271 * It seems that the antenna field in the phy flags value
2272 * is actually a bitfield. This is undefined by radiotap,
2273 * it wants an actual antenna number but I always get "7"
2274 * for most legacy frames I receive indicating that the
2275 * same frame was received on all three RX chains.
2276 *
2277 * I think this field should be removed in favour of a
2278 * new 802.11n radiotap field "RX chains" that is defined
2279 * as a bitmask.
2280 */
2281 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2282 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
2283
2284 /* set the preamble flag if appropriate */
2285 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2286 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2287
2288 stats->flag |= RX_FLAG_RADIOTAP;
2289 }
2290
2291 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2292 {
2293 /* 0 - mgmt, 1 - cnt, 2 - data */
2294 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2295 priv->rx_stats[idx].cnt++;
2296 priv->rx_stats[idx].bytes += len;
2297 }
2298
2299 /*
2300 * returns non-zero if packet should be dropped
2301 */
2302 static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2303 struct ieee80211_hdr *hdr,
2304 u32 decrypt_res,
2305 struct ieee80211_rx_status *stats)
2306 {
2307 u16 fc = le16_to_cpu(hdr->frame_control);
2308
2309 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2310 return 0;
2311
2312 if (!(fc & IEEE80211_FCTL_PROTECTED))
2313 return 0;
2314
2315 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2316 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2317 case RX_RES_STATUS_SEC_TYPE_TKIP:
2318 /* The uCode has got a bad phase 1 Key, pushes the packet.
2319 * Decryption will be done in SW. */
2320 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2321 RX_RES_STATUS_BAD_KEY_TTAK)
2322 break;
2323
2324 case RX_RES_STATUS_SEC_TYPE_WEP:
2325 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2326 RX_RES_STATUS_BAD_ICV_MIC) {
2327 /* bad ICV, the packet is destroyed since the
2328 * decryption is inplace, drop it */
2329 IWL_DEBUG_RX("Packet destroyed\n");
2330 return -1;
2331 }
2332 case RX_RES_STATUS_SEC_TYPE_CCMP:
2333 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2334 RX_RES_STATUS_DECRYPT_OK) {
2335 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2336 stats->flag |= RX_FLAG_DECRYPTED;
2337 }
2338 break;
2339
2340 default:
2341 break;
2342 }
2343 return 0;
2344 }
2345
2346 static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
2347 {
2348 u32 decrypt_out = 0;
2349
2350 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2351 RX_RES_STATUS_STATION_FOUND)
2352 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2353 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2354
2355 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2356
2357 /* packet was not encrypted */
2358 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2359 RX_RES_STATUS_SEC_TYPE_NONE)
2360 return decrypt_out;
2361
2362 /* packet was encrypted with unknown alg */
2363 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2364 RX_RES_STATUS_SEC_TYPE_ERR)
2365 return decrypt_out;
2366
2367 /* decryption was not done in HW */
2368 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2369 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2370 return decrypt_out;
2371
2372 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2373
2374 case RX_RES_STATUS_SEC_TYPE_CCMP:
2375 /* alg is CCM: check MIC only */
2376 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2377 /* Bad MIC */
2378 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2379 else
2380 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2381
2382 break;
2383
2384 case RX_RES_STATUS_SEC_TYPE_TKIP:
2385 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2386 /* Bad TTAK */
2387 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2388 break;
2389 }
2390 /* fall through if TTAK OK */
2391 default:
2392 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2393 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2394 else
2395 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2396 break;
2397 };
2398
2399 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
2400 decrypt_in, decrypt_out);
2401
2402 return decrypt_out;
2403 }
2404
2405 static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
2406 int include_phy,
2407 struct iwl_rx_mem_buffer *rxb,
2408 struct ieee80211_rx_status *stats)
2409 {
2410 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2411 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2412 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2413 struct ieee80211_hdr *hdr;
2414 u16 len;
2415 __le32 *rx_end;
2416 unsigned int skblen;
2417 u32 ampdu_status;
2418 u32 ampdu_status_legacy;
2419
2420 if (!include_phy && priv->last_phy_res[0])
2421 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2422
2423 if (!rx_start) {
2424 IWL_ERROR("MPDU frame without a PHY data\n");
2425 return;
2426 }
2427 if (include_phy) {
2428 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
2429 rx_start->cfg_phy_cnt);
2430
2431 len = le16_to_cpu(rx_start->byte_count);
2432
2433 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
2434 sizeof(struct iwl4965_rx_phy_res) +
2435 rx_start->cfg_phy_cnt + len);
2436
2437 } else {
2438 struct iwl4965_rx_mpdu_res_start *amsdu =
2439 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2440
2441 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
2442 sizeof(struct iwl4965_rx_mpdu_res_start));
2443 len = le16_to_cpu(amsdu->byte_count);
2444 rx_start->byte_count = amsdu->byte_count;
2445 rx_end = (__le32 *) (((u8 *) hdr) + len);
2446 }
2447 /* In monitor mode allow 802.11 ACk frames (10 bytes) */
2448 if (len > priv->hw_params.max_pkt_size ||
2449 len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
2450 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
2451 return;
2452 }
2453
2454 ampdu_status = le32_to_cpu(*rx_end);
2455 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
2456
2457 if (!include_phy) {
2458 /* New status scheme, need to translate */
2459 ampdu_status_legacy = ampdu_status;
2460 ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
2461 }
2462
2463 /* start from MAC */
2464 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
2465 skb_put(rxb->skb, len); /* end where data ends */
2466
2467 /* We only process data packets if the interface is open */
2468 if (unlikely(!priv->is_open)) {
2469 IWL_DEBUG_DROP_LIMIT
2470 ("Dropping packet while interface is not open.\n");
2471 return;
2472 }
2473
2474 stats->flag = 0;
2475 hdr = (struct ieee80211_hdr *)rxb->skb->data;
2476
2477 /* in case of HW accelerated crypto and bad decryption, drop */
2478 if (!priv->hw_params.sw_crypto &&
2479 iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
2480 return;
2481
2482 if (priv->add_radiotap)
2483 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
2484
2485 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
2486 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
2487 priv->alloc_rxb_skb--;
2488 rxb->skb = NULL;
2489 }
2490
2491 /* Calc max signal level (dBm) among 3 possible receivers */
2492 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2493 struct iwl4965_rx_phy_res *rx_resp)
2494 {
2495 /* data from PHY/DSP regarding signal strength, etc.,
2496 * contents are always there, not configurable by host. */
2497 struct iwl4965_rx_non_cfg_phy *ncphy =
2498 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
2499 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
2500 >> IWL_AGC_DB_POS;
2501
2502 u32 valid_antennae =
2503 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
2504 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
2505 u8 max_rssi = 0;
2506 u32 i;
2507
2508 /* Find max rssi among 3 possible receivers.
2509 * These values are measured by the digital signal processor (DSP).
2510 * They should stay fairly constant even as the signal strength varies,
2511 * if the radio's automatic gain control (AGC) is working right.
2512 * AGC value (see below) will provide the "interesting" info. */
2513 for (i = 0; i < 3; i++)
2514 if (valid_antennae & (1 << i))
2515 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2516
2517 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2518 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2519 max_rssi, agc);
2520
2521 /* dBm = max_rssi dB - agc dB - constant.
2522 * Higher AGC (higher radio gain) means lower signal. */
2523 return (max_rssi - agc - IWL_RSSI_OFFSET);
2524 }
2525
2526 static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
2527 {
2528 unsigned long flags;
2529
2530 spin_lock_irqsave(&priv->sta_lock, flags);
2531 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
2532 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
2533 priv->stations[sta_id].sta.sta.modify_mask = 0;
2534 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2535 spin_unlock_irqrestore(&priv->sta_lock, flags);
2536
2537 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
2538 }
2539
2540 static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
2541 {
2542 /* FIXME: need locking over ps_status ??? */
2543 u8 sta_id = iwl_find_station(priv, addr);
2544
2545 if (sta_id != IWL_INVALID_STATION) {
2546 u8 sta_awake = priv->stations[sta_id].
2547 ps_status == STA_PS_STATUS_WAKE;
2548
2549 if (sta_awake && ps_bit)
2550 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
2551 else if (!sta_awake && !ps_bit) {
2552 iwl4965_sta_modify_ps_wake(priv, sta_id);
2553 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
2554 }
2555 }
2556 }
2557 #ifdef CONFIG_IWLWIFI_DEBUG
2558
2559 /**
2560 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
2561 *
2562 * You may hack this function to show different aspects of received frames,
2563 * including selective frame dumps.
2564 * group100 parameter selects whether to show 1 out of 100 good frames.
2565 *
2566 * TODO: This was originally written for 3945, need to audit for
2567 * proper operation with 4965.
2568 */
2569 static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2570 struct iwl_rx_packet *pkt,
2571 struct ieee80211_hdr *header, int group100)
2572 {
2573 u32 to_us;
2574 u32 print_summary = 0;
2575 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
2576 u32 hundred = 0;
2577 u32 dataframe = 0;
2578 u16 fc;
2579 u16 seq_ctl;
2580 u16 channel;
2581 u16 phy_flags;
2582 int rate_sym;
2583 u16 length;
2584 u16 status;
2585 u16 bcn_tmr;
2586 u32 tsf_low;
2587 u64 tsf;
2588 u8 rssi;
2589 u8 agc;
2590 u16 sig_avg;
2591 u16 noise_diff;
2592 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
2593 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
2594 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
2595 u8 *data = IWL_RX_DATA(pkt);
2596
2597 if (likely(!(priv->debug_level & IWL_DL_RX)))
2598 return;
2599
2600 /* MAC header */
2601 fc = le16_to_cpu(header->frame_control);
2602 seq_ctl = le16_to_cpu(header->seq_ctrl);
2603
2604 /* metadata */
2605 channel = le16_to_cpu(rx_hdr->channel);
2606 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
2607 rate_sym = rx_hdr->rate;
2608 length = le16_to_cpu(rx_hdr->len);
2609
2610 /* end-of-frame status and timestamp */
2611 status = le32_to_cpu(rx_end->status);
2612 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
2613 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
2614 tsf = le64_to_cpu(rx_end->timestamp);
2615
2616 /* signal statistics */
2617 rssi = rx_stats->rssi;
2618 agc = rx_stats->agc;
2619 sig_avg = le16_to_cpu(rx_stats->sig_avg);
2620 noise_diff = le16_to_cpu(rx_stats->noise_diff);
2621
2622 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
2623
2624 /* if data frame is to us and all is good,
2625 * (optionally) print summary for only 1 out of every 100 */
2626 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
2627 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
2628 dataframe = 1;
2629 if (!group100)
2630 print_summary = 1; /* print each frame */
2631 else if (priv->framecnt_to_us < 100) {
2632 priv->framecnt_to_us++;
2633 print_summary = 0;
2634 } else {
2635 priv->framecnt_to_us = 0;
2636 print_summary = 1;
2637 hundred = 1;
2638 }
2639 } else {
2640 /* print summary for all other frames */
2641 print_summary = 1;
2642 }
2643
2644 if (print_summary) {
2645 char *title;
2646 int rate_idx;
2647 u32 bitrate;
2648
2649 if (hundred)
2650 title = "100Frames";
2651 else if (fc & IEEE80211_FCTL_RETRY)
2652 title = "Retry";
2653 else if (ieee80211_is_assoc_response(fc))
2654 title = "AscRsp";
2655 else if (ieee80211_is_reassoc_response(fc))
2656 title = "RasRsp";
2657 else if (ieee80211_is_probe_response(fc)) {
2658 title = "PrbRsp";
2659 print_dump = 1; /* dump frame contents */
2660 } else if (ieee80211_is_beacon(fc)) {
2661 title = "Beacon";
2662 print_dump = 1; /* dump frame contents */
2663 } else if (ieee80211_is_atim(fc))
2664 title = "ATIM";
2665 else if (ieee80211_is_auth(fc))
2666 title = "Auth";
2667 else if (ieee80211_is_deauth(fc))
2668 title = "DeAuth";
2669 else if (ieee80211_is_disassoc(fc))
2670 title = "DisAssoc";
2671 else
2672 title = "Frame";
2673
2674 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
2675 if (unlikely(rate_idx == -1))
2676 bitrate = 0;
2677 else
2678 bitrate = iwl_rates[rate_idx].ieee / 2;
2679
2680 /* print frame summary.
2681 * MAC addresses show just the last byte (for brevity),
2682 * but you can hack it to show more, if you'd like to. */
2683 if (dataframe)
2684 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
2685 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
2686 title, fc, header->addr1[5],
2687 length, rssi, channel, bitrate);
2688 else {
2689 /* src/dst addresses assume managed mode */
2690 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
2691 "src=0x%02x, rssi=%u, tim=%lu usec, "
2692 "phy=0x%02x, chnl=%d\n",
2693 title, fc, header->addr1[5],
2694 header->addr3[5], rssi,
2695 tsf_low - priv->scan_start_tsf,
2696 phy_flags, channel);
2697 }
2698 }
2699 if (print_dump)
2700 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
2701 }
2702 #else
2703 static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2704 struct iwl_rx_packet *pkt,
2705 struct ieee80211_hdr *header,
2706 int group100)
2707 {
2708 }
2709 #endif
2710
2711
2712
2713 /* Called for REPLY_RX (legacy ABG frames), or
2714 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
2715 static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
2716 struct iwl_rx_mem_buffer *rxb)
2717 {
2718 struct ieee80211_hdr *header;
2719 struct ieee80211_rx_status rx_status;
2720 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2721 /* Use phy data (Rx signal strength, etc.) contained within
2722 * this rx packet for legacy frames,
2723 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
2724 int include_phy = (pkt->hdr.cmd == REPLY_RX);
2725 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2726 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
2727 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2728 __le32 *rx_end;
2729 unsigned int len = 0;
2730 u16 fc;
2731 u8 network_packet;
2732
2733 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
2734 rx_status.freq =
2735 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
2736 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
2737 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
2738 rx_status.rate_idx =
2739 iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
2740 if (rx_status.band == IEEE80211_BAND_5GHZ)
2741 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
2742
2743 rx_status.antenna = 0;
2744 rx_status.flag = 0;
2745
2746 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
2747 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
2748 rx_start->cfg_phy_cnt);
2749 return;
2750 }
2751
2752 if (!include_phy) {
2753 if (priv->last_phy_res[0])
2754 rx_start = (struct iwl4965_rx_phy_res *)
2755 &priv->last_phy_res[1];
2756 else
2757 rx_start = NULL;
2758 }
2759
2760 if (!rx_start) {
2761 IWL_ERROR("MPDU frame without a PHY data\n");
2762 return;
2763 }
2764
2765 if (include_phy) {
2766 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
2767 + rx_start->cfg_phy_cnt);
2768
2769 len = le16_to_cpu(rx_start->byte_count);
2770 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
2771 sizeof(struct iwl4965_rx_phy_res) + len);
2772 } else {
2773 struct iwl4965_rx_mpdu_res_start *amsdu =
2774 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2775
2776 header = (void *)(pkt->u.raw +
2777 sizeof(struct iwl4965_rx_mpdu_res_start));
2778 len = le16_to_cpu(amsdu->byte_count);
2779 rx_end = (__le32 *) (pkt->u.raw +
2780 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
2781 }
2782
2783 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
2784 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
2785 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
2786 le32_to_cpu(*rx_end));
2787 return;
2788 }
2789
2790 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
2791
2792 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
2793 rx_status.signal = iwl4965_calc_rssi(priv, rx_start);
2794
2795 /* Meaningful noise values are available only from beacon statistics,
2796 * which are gathered only when associated, and indicate noise
2797 * only for the associated network channel ...
2798 * Ignore these noise values while scanning (other channels) */
2799 if (iwl_is_associated(priv) &&
2800 !test_bit(STATUS_SCANNING, &priv->status)) {
2801 rx_status.noise = priv->last_rx_noise;
2802 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal,
2803 rx_status.noise);
2804 } else {
2805 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2806 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal, 0);
2807 }
2808
2809 /* Reset beacon noise level if not associated. */
2810 if (!iwl_is_associated(priv))
2811 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2812
2813 /* Set "1" to report good data frames in groups of 100 */
2814 /* FIXME: need to optimze the call: */
2815 iwl4965_dbg_report_frame(priv, pkt, header, 1);
2816
2817 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
2818 rx_status.signal, rx_status.noise, rx_status.signal,
2819 (unsigned long long)rx_status.mactime);
2820
2821
2822 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2823 iwl4965_handle_data_packet(priv, 1, include_phy,
2824 rxb, &rx_status);
2825 return;
2826 }
2827
2828 network_packet = iwl4965_is_network_packet(priv, header);
2829 if (network_packet) {
2830 priv->last_rx_rssi = rx_status.signal;
2831 priv->last_beacon_time = priv->ucode_beacon_time;
2832 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
2833 }
2834
2835 fc = le16_to_cpu(header->frame_control);
2836 switch (fc & IEEE80211_FCTL_FTYPE) {
2837 case IEEE80211_FTYPE_MGMT:
2838 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2839 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2840 header->addr2);
2841 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
2842 break;
2843
2844 case IEEE80211_FTYPE_CTL:
2845 #ifdef CONFIG_IWL4965_HT
2846 switch (fc & IEEE80211_FCTL_STYPE) {
2847 case IEEE80211_STYPE_BACK_REQ:
2848 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
2849 iwl4965_handle_data_packet(priv, 0, include_phy,
2850 rxb, &rx_status);
2851 break;
2852 default:
2853 break;
2854 }
2855 #endif
2856 break;
2857
2858 case IEEE80211_FTYPE_DATA: {
2859 DECLARE_MAC_BUF(mac1);
2860 DECLARE_MAC_BUF(mac2);
2861 DECLARE_MAC_BUF(mac3);
2862
2863 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2864 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2865 header->addr2);
2866
2867 if (unlikely(!network_packet))
2868 IWL_DEBUG_DROP("Dropping (non network): "
2869 "%s, %s, %s\n",
2870 print_mac(mac1, header->addr1),
2871 print_mac(mac2, header->addr2),
2872 print_mac(mac3, header->addr3));
2873 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
2874 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
2875 print_mac(mac1, header->addr1),
2876 print_mac(mac2, header->addr2),
2877 print_mac(mac3, header->addr3));
2878 else
2879 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
2880 &rx_status);
2881 break;
2882 }
2883 default:
2884 break;
2885
2886 }
2887 }
2888
2889 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
2890 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
2891 static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
2892 struct iwl_rx_mem_buffer *rxb)
2893 {
2894 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2895 priv->last_phy_res[0] = 1;
2896 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
2897 sizeof(struct iwl4965_rx_phy_res));
2898 }
2899
2900 #ifdef CONFIG_IWL4965_HT
2901
2902 /**
2903 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
2904 */
2905 static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv,
2906 int sta_id, int tid)
2907 {
2908 unsigned long flags;
2909
2910 /* Remove "disable" flag, to enable Tx for this TID */
2911 spin_lock_irqsave(&priv->sta_lock, flags);
2912 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
2913 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
2914 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2915 spin_unlock_irqrestore(&priv->sta_lock, flags);
2916
2917 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
2918 }
2919
2920 /**
2921 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2922 *
2923 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2924 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
2925 */
2926 static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
2927 struct iwl_ht_agg *agg,
2928 struct iwl4965_compressed_ba_resp*
2929 ba_resp)
2930
2931 {
2932 int i, sh, ack;
2933 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
2934 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2935 u64 bitmap;
2936 int successes = 0;
2937 struct ieee80211_tx_info *info;
2938
2939 if (unlikely(!agg->wait_for_ba)) {
2940 IWL_ERROR("Received BA when not expected\n");
2941 return -EINVAL;
2942 }
2943
2944 /* Mark that the expected block-ack response arrived */
2945 agg->wait_for_ba = 0;
2946 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
2947
2948 /* Calculate shift to align block-ack bits with our Tx window bits */
2949 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
2950 if (sh < 0) /* tbw something is wrong with indices */
2951 sh += 0x100;
2952
2953 /* don't use 64-bit values for now */
2954 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
2955
2956 if (agg->frame_count > (64 - sh)) {
2957 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
2958 return -1;
2959 }
2960
2961 /* check for success or failure according to the
2962 * transmitted bitmap and block-ack bitmap */
2963 bitmap &= agg->bitmap;
2964
2965 /* For each frame attempted in aggregation,
2966 * update driver's record of tx frame's status. */
2967 for (i = 0; i < agg->frame_count ; i++) {
2968 ack = bitmap & (1 << i);
2969 successes += !!ack;
2970 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
2971 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
2972 agg->start_idx + i);
2973 }
2974
2975 info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
2976 memset(&info->status, 0, sizeof(info->status));
2977 info->flags = IEEE80211_TX_STAT_ACK;
2978 info->flags |= IEEE80211_TX_STAT_AMPDU;
2979 info->status.ampdu_ack_map = successes;
2980 info->status.ampdu_ack_len = agg->frame_count;
2981 iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
2982
2983 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
2984
2985 return 0;
2986 }
2987
2988 /**
2989 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2990 */
2991 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
2992 u16 txq_id)
2993 {
2994 /* Simply stop the queue, but don't change any configuration;
2995 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
2996 iwl_write_prph(priv,
2997 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
2998 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
2999 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
3000 }
3001
3002 /**
3003 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
3004 * priv->lock must be held by the caller
3005 */
3006 static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
3007 u16 ssn_idx, u8 tx_fifo)
3008 {
3009 int ret = 0;
3010
3011 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
3012 IWL_WARNING("queue number too small: %d, must be > %d\n",
3013 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3014 return -EINVAL;
3015 }
3016
3017 ret = iwl_grab_nic_access(priv);
3018 if (ret)
3019 return ret;
3020
3021 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3022
3023 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3024
3025 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3026 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3027 /* supposes that ssn_idx is valid (!= 0xFFF) */
3028 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3029
3030 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3031 iwl_txq_ctx_deactivate(priv, txq_id);
3032 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
3033
3034 iwl_release_nic_access(priv);
3035
3036 return 0;
3037 }
3038
3039 int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
3040 u8 tid, int txq_id)
3041 {
3042 struct iwl_queue *q = &priv->txq[txq_id].q;
3043 u8 *addr = priv->stations[sta_id].sta.sta.addr;
3044 struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
3045
3046 switch (priv->stations[sta_id].tid[tid].agg.state) {
3047 case IWL_EMPTYING_HW_QUEUE_DELBA:
3048 /* We are reclaiming the last packet of the */
3049 /* aggregated HW queue */
3050 if (txq_id == tid_data->agg.txq_id &&
3051 q->read_ptr == q->write_ptr) {
3052 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
3053 int tx_fifo = default_tid_to_tx_fifo[tid];
3054 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
3055 iwl4965_tx_queue_agg_disable(priv, txq_id,
3056 ssn, tx_fifo);
3057 tid_data->agg.state = IWL_AGG_OFF;
3058 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3059 }
3060 break;
3061 case IWL_EMPTYING_HW_QUEUE_ADDBA:
3062 /* We are reclaiming the last packet of the queue */
3063 if (tid_data->tfds_in_queue == 0) {
3064 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
3065 tid_data->agg.state = IWL_AGG_ON;
3066 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3067 }
3068 break;
3069 }
3070 return 0;
3071 }
3072
3073 /**
3074 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
3075 *
3076 * Handles block-acknowledge notification from device, which reports success
3077 * of frames sent via aggregation.
3078 */
3079 static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
3080 struct iwl_rx_mem_buffer *rxb)
3081 {
3082 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3083 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
3084 int index;
3085 struct iwl_tx_queue *txq = NULL;
3086 struct iwl_ht_agg *agg;
3087 DECLARE_MAC_BUF(mac);
3088
3089 /* "flow" corresponds to Tx queue */
3090 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3091
3092 /* "ssn" is start of block-ack Tx window, corresponds to index
3093 * (in Tx queue's circular buffer) of first TFD/frame in window */
3094 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
3095
3096 if (scd_flow >= priv->hw_params.max_txq_num) {
3097 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
3098 return;
3099 }
3100
3101 txq = &priv->txq[scd_flow];
3102 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
3103
3104 /* Find index just before block-ack window */
3105 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
3106
3107 /* TODO: Need to get this copy more safely - now good for debug */
3108
3109 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
3110 "sta_id = %d\n",
3111 agg->wait_for_ba,
3112 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
3113 ba_resp->sta_id);
3114 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
3115 "%d, scd_ssn = %d\n",
3116 ba_resp->tid,
3117 ba_resp->seq_ctl,
3118 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
3119 ba_resp->scd_flow,
3120 ba_resp->scd_ssn);
3121 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
3122 agg->start_idx,
3123 (unsigned long long)agg->bitmap);
3124
3125 /* Update driver's record of ACK vs. not for each frame in window */
3126 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
3127
3128 /* Release all TFDs before the SSN, i.e. all TFDs in front of
3129 * block-ack window (we assume that they've been successfully
3130 * transmitted ... if not, it's too late anyway). */
3131 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
3132 /* calculate mac80211 ampdu sw queue to wake */
3133 int ampdu_q =
3134 scd_flow - IWL_BACK_QUEUE_FIRST_ID + priv->hw->queues;
3135 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
3136 priv->stations[ba_resp->sta_id].
3137 tid[ba_resp->tid].tfds_in_queue -= freed;
3138 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
3139 priv->mac80211_registered &&
3140 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3141 ieee80211_wake_queue(priv->hw, ampdu_q);
3142 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
3143 ba_resp->tid, scd_flow);
3144 }
3145 }
3146
3147 /**
3148 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
3149 */
3150 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
3151 u16 txq_id)
3152 {
3153 u32 tbl_dw_addr;
3154 u32 tbl_dw;
3155 u16 scd_q2ratid;
3156
3157 scd_q2ratid = ra_tid & IWL49_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
3158
3159 tbl_dw_addr = priv->scd_base_addr +
3160 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
3161
3162 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
3163
3164 if (txq_id & 0x1)
3165 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
3166 else
3167 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
3168
3169 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
3170
3171 return 0;
3172 }
3173
3174
3175 /**
3176 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
3177 *
3178 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
3179 * i.e. it must be one of the higher queues used for aggregation
3180 */
3181 static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
3182 int tx_fifo, int sta_id, int tid,
3183 u16 ssn_idx)
3184 {
3185 unsigned long flags;
3186 int rc;
3187 u16 ra_tid;
3188
3189 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
3190 IWL_WARNING("queue number too small: %d, must be > %d\n",
3191 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3192
3193 ra_tid = BUILD_RAxTID(sta_id, tid);
3194
3195 /* Modify device's station table to Tx this TID */
3196 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
3197
3198 spin_lock_irqsave(&priv->lock, flags);
3199 rc = iwl_grab_nic_access(priv);
3200 if (rc) {
3201 spin_unlock_irqrestore(&priv->lock, flags);
3202 return rc;
3203 }
3204
3205 /* Stop this Tx queue before configuring it */
3206 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3207
3208 /* Map receiver-address / traffic-ID to this queue */
3209 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
3210
3211 /* Set this queue as a chain-building queue */
3212 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3213
3214 /* Place first TFD at index corresponding to start sequence number.
3215 * Assumes that ssn_idx is valid (!= 0xFFF) */
3216 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3217 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3218 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3219
3220 /* Set up Tx window size and frame limit for this queue */
3221 iwl_write_targ_mem(priv,
3222 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
3223 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
3224 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
3225
3226 iwl_write_targ_mem(priv, priv->scd_base_addr +
3227 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
3228 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
3229 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
3230
3231 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3232
3233 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
3234 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
3235
3236 iwl_release_nic_access(priv);
3237 spin_unlock_irqrestore(&priv->lock, flags);
3238
3239 return 0;
3240 }
3241
3242 #endif /* CONFIG_IWL4965_HT */
3243
3244
3245 #ifdef CONFIG_IWL4965_HT
3246 static int iwl4965_rx_agg_start(struct iwl_priv *priv,
3247 const u8 *addr, int tid, u16 ssn)
3248 {
3249 unsigned long flags;
3250 int sta_id;
3251
3252 sta_id = iwl_find_station(priv, addr);
3253 if (sta_id == IWL_INVALID_STATION)
3254 return -ENXIO;
3255
3256 spin_lock_irqsave(&priv->sta_lock, flags);
3257 priv->stations[sta_id].sta.station_flags_msk = 0;
3258 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3259 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
3260 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3261 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3262 spin_unlock_irqrestore(&priv->sta_lock, flags);
3263
3264 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3265 CMD_ASYNC);
3266 }
3267
3268 static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
3269 const u8 *addr, int tid)
3270 {
3271 unsigned long flags;
3272 int sta_id;
3273
3274 sta_id = iwl_find_station(priv, addr);
3275 if (sta_id == IWL_INVALID_STATION)
3276 return -ENXIO;
3277
3278 spin_lock_irqsave(&priv->sta_lock, flags);
3279 priv->stations[sta_id].sta.station_flags_msk = 0;
3280 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3281 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
3282 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3283 spin_unlock_irqrestore(&priv->sta_lock, flags);
3284
3285 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3286 CMD_ASYNC);
3287 }
3288
3289 /*
3290 * Find first available (lowest unused) Tx Queue, mark it "active".
3291 * Called only when finding queue for aggregation.
3292 * Should never return anything < 7, because they should already
3293 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
3294 */
3295 static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv)
3296 {
3297 int txq_id;
3298
3299 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
3300 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
3301 return txq_id;
3302 return -1;
3303 }
3304
3305 static int iwl4965_tx_agg_start(struct ieee80211_hw *hw, const u8 *ra,
3306 u16 tid, u16 *start_seq_num)
3307 {
3308 struct iwl_priv *priv = hw->priv;
3309 int sta_id;
3310 int tx_fifo;
3311 int txq_id;
3312 int ssn = -1;
3313 int ret = 0;
3314 unsigned long flags;
3315 struct iwl_tid_data *tid_data;
3316 DECLARE_MAC_BUF(mac);
3317
3318 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3319 tx_fifo = default_tid_to_tx_fifo[tid];
3320 else
3321 return -EINVAL;
3322
3323 IWL_WARNING("%s on ra = %s tid = %d\n",
3324 __func__, print_mac(mac, ra), tid);
3325
3326 sta_id = iwl_find_station(priv, ra);
3327 if (sta_id == IWL_INVALID_STATION)
3328 return -ENXIO;
3329
3330 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
3331 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
3332 return -ENXIO;
3333 }
3334
3335 txq_id = iwl4965_txq_ctx_activate_free(priv);
3336 if (txq_id == -1)
3337 return -ENXIO;
3338
3339 spin_lock_irqsave(&priv->sta_lock, flags);
3340 tid_data = &priv->stations[sta_id].tid[tid];
3341 ssn = SEQ_TO_SN(tid_data->seq_number);
3342 tid_data->agg.txq_id = txq_id;
3343 spin_unlock_irqrestore(&priv->sta_lock, flags);
3344
3345 *start_seq_num = ssn;
3346 ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
3347 sta_id, tid, ssn);
3348 if (ret)
3349 return ret;
3350
3351 ret = 0;
3352 if (tid_data->tfds_in_queue == 0) {
3353 printk(KERN_ERR "HW queue is empty\n");
3354 tid_data->agg.state = IWL_AGG_ON;
3355 ieee80211_start_tx_ba_cb_irqsafe(hw, ra, tid);
3356 } else {
3357 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
3358 tid_data->tfds_in_queue);
3359 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
3360 }
3361 return ret;
3362 }
3363
3364 static int iwl4965_tx_agg_stop(struct ieee80211_hw *hw, const u8 *ra, u16 tid)
3365 {
3366 struct iwl_priv *priv = hw->priv;
3367 int tx_fifo_id, txq_id, sta_id, ssn = -1;
3368 struct iwl_tid_data *tid_data;
3369 int ret, write_ptr, read_ptr;
3370 unsigned long flags;
3371 DECLARE_MAC_BUF(mac);
3372
3373 if (!ra) {
3374 IWL_ERROR("ra = NULL\n");
3375 return -EINVAL;
3376 }
3377
3378 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3379 tx_fifo_id = default_tid_to_tx_fifo[tid];
3380 else
3381 return -EINVAL;
3382
3383 sta_id = iwl_find_station(priv, ra);
3384
3385 if (sta_id == IWL_INVALID_STATION)
3386 return -ENXIO;
3387
3388 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
3389 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
3390
3391 tid_data = &priv->stations[sta_id].tid[tid];
3392 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
3393 txq_id = tid_data->agg.txq_id;
3394 write_ptr = priv->txq[txq_id].q.write_ptr;
3395 read_ptr = priv->txq[txq_id].q.read_ptr;
3396
3397 /* The queue is not empty */
3398 if (write_ptr != read_ptr) {
3399 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
3400 priv->stations[sta_id].tid[tid].agg.state =
3401 IWL_EMPTYING_HW_QUEUE_DELBA;
3402 return 0;
3403 }
3404
3405 IWL_DEBUG_HT("HW queue is empty\n");
3406 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
3407
3408 spin_lock_irqsave(&priv->lock, flags);
3409 ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
3410 spin_unlock_irqrestore(&priv->lock, flags);
3411
3412 if (ret)
3413 return ret;
3414
3415 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid);
3416
3417 return 0;
3418 }
3419
3420 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3421 enum ieee80211_ampdu_mlme_action action,
3422 const u8 *addr, u16 tid, u16 *ssn)
3423 {
3424 struct iwl_priv *priv = hw->priv;
3425 DECLARE_MAC_BUF(mac);
3426
3427 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3428 print_mac(mac, addr), tid);
3429
3430 switch (action) {
3431 case IEEE80211_AMPDU_RX_START:
3432 IWL_DEBUG_HT("start Rx\n");
3433 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
3434 case IEEE80211_AMPDU_RX_STOP:
3435 IWL_DEBUG_HT("stop Rx\n");
3436 return iwl4965_rx_agg_stop(priv, addr, tid);
3437 case IEEE80211_AMPDU_TX_START:
3438 IWL_DEBUG_HT("start Tx\n");
3439 return iwl4965_tx_agg_start(hw, addr, tid, ssn);
3440 case IEEE80211_AMPDU_TX_STOP:
3441 IWL_DEBUG_HT("stop Tx\n");
3442 return iwl4965_tx_agg_stop(hw, addr, tid);
3443 default:
3444 IWL_DEBUG_HT("unknown\n");
3445 return -EINVAL;
3446 break;
3447 }
3448 return 0;
3449 }
3450 #endif /* CONFIG_IWL4965_HT */
3451
3452
3453 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
3454 {
3455 switch (cmd_id) {
3456 case REPLY_RXON:
3457 return (u16) sizeof(struct iwl4965_rxon_cmd);
3458 default:
3459 return len;
3460 }
3461 }
3462
3463 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
3464 {
3465 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
3466 addsta->mode = cmd->mode;
3467 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
3468 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
3469 addsta->station_flags = cmd->station_flags;
3470 addsta->station_flags_msk = cmd->station_flags_msk;
3471 addsta->tid_disable_tx = cmd->tid_disable_tx;
3472 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
3473 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
3474 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
3475 addsta->reserved1 = __constant_cpu_to_le16(0);
3476 addsta->reserved2 = __constant_cpu_to_le32(0);
3477
3478 return (u16)sizeof(struct iwl4965_addsta_cmd);
3479 }
3480 /* Set up 4965-specific Rx frame reply handlers */
3481 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
3482 {
3483 /* Legacy Rx frames */
3484 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
3485
3486 /* High-throughput (HT) Rx frames */
3487 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
3488 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
3489
3490 #ifdef CONFIG_IWL4965_HT
3491 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
3492 #endif /* CONFIG_IWL4965_HT */
3493 }
3494
3495 void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
3496 {
3497 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
3498 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3499 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
3500 #endif
3501 init_timer(&priv->statistics_periodic);
3502 priv->statistics_periodic.data = (unsigned long)priv;
3503 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
3504 }
3505
3506 void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
3507 {
3508 del_timer_sync(&priv->statistics_periodic);
3509
3510 cancel_delayed_work(&priv->init_alive_start);
3511 }
3512
3513
3514 static struct iwl_hcmd_ops iwl4965_hcmd = {
3515 .rxon_assoc = iwl4965_send_rxon_assoc,
3516 };
3517
3518 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
3519 .get_hcmd_size = iwl4965_get_hcmd_size,
3520 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
3521 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3522 .chain_noise_reset = iwl4965_chain_noise_reset,
3523 .gain_computation = iwl4965_gain_computation,
3524 #endif
3525 };
3526
3527 static struct iwl_lib_ops iwl4965_lib = {
3528 .set_hw_params = iwl4965_hw_set_hw_params,
3529 .alloc_shared_mem = iwl4965_alloc_shared_mem,
3530 .free_shared_mem = iwl4965_free_shared_mem,
3531 .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
3532 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
3533 .txq_set_sched = iwl4965_txq_set_sched,
3534 .rx_handler_setup = iwl4965_rx_handler_setup,
3535 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
3536 .alive_notify = iwl4965_alive_notify,
3537 .init_alive_start = iwl4965_init_alive_start,
3538 .load_ucode = iwl4965_load_bsm,
3539 .apm_ops = {
3540 .init = iwl4965_apm_init,
3541 .reset = iwl4965_apm_reset,
3542 .stop = iwl4965_apm_stop,
3543 .config = iwl4965_nic_config,
3544 .set_pwr_src = iwl4965_set_pwr_src,
3545 },
3546 .eeprom_ops = {
3547 .regulatory_bands = {
3548 EEPROM_REGULATORY_BAND_1_CHANNELS,
3549 EEPROM_REGULATORY_BAND_2_CHANNELS,
3550 EEPROM_REGULATORY_BAND_3_CHANNELS,
3551 EEPROM_REGULATORY_BAND_4_CHANNELS,
3552 EEPROM_REGULATORY_BAND_5_CHANNELS,
3553 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
3554 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
3555 },
3556 .verify_signature = iwlcore_eeprom_verify_signature,
3557 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
3558 .release_semaphore = iwlcore_eeprom_release_semaphore,
3559 .check_version = iwl4965_eeprom_check_version,
3560 .query_addr = iwlcore_eeprom_query_addr,
3561 },
3562 .radio_kill_sw = iwl4965_radio_kill_sw,
3563 .set_power = iwl4965_set_power,
3564 .update_chain_flags = iwl4965_update_chain_flags,
3565 };
3566
3567 static struct iwl_ops iwl4965_ops = {
3568 .lib = &iwl4965_lib,
3569 .hcmd = &iwl4965_hcmd,
3570 .utils = &iwl4965_hcmd_utils,
3571 };
3572
3573 struct iwl_cfg iwl4965_agn_cfg = {
3574 .name = "4965AGN",
3575 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
3576 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
3577 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
3578 .ops = &iwl4965_ops,
3579 .mod_params = &iwl4965_mod_params,
3580 };
3581
3582 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
3583 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3584 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
3585 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
3586 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
3587 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
3588 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
3589 MODULE_PARM_DESC(debug, "debug output mask");
3590 module_param_named(
3591 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
3592 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
3593
3594 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
3595 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3596
3597 /* QoS */
3598 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
3599 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
3600 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
3601 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3602 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
3603 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");
Linux kernel - Deliverables
This page took 0.190416 seconds and 5 git commands to generate.