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iwlwifi : Set monitor mode for 4965
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40
41 #include "iwl-eeprom.h"
42 #include "iwl-dev.h"
43 #include "iwl-core.h"
44 #include "iwl-io.h"
45 #include "iwl-helpers.h"
46 #include "iwl-calib.h"
47
48 /* module parameters */
49 static struct iwl_mod_params iwl4965_mod_params = {
50 .num_of_queues = IWL49_NUM_QUEUES,
51 .enable_qos = 1,
52 .amsdu_size_8K = 1,
53 /* the rest are 0 by default */
54 };
55
56 #ifdef CONFIG_IWL4965_HT
57
58 static const u16 default_tid_to_tx_fifo[] = {
59 IWL_TX_FIFO_AC1,
60 IWL_TX_FIFO_AC0,
61 IWL_TX_FIFO_AC0,
62 IWL_TX_FIFO_AC1,
63 IWL_TX_FIFO_AC2,
64 IWL_TX_FIFO_AC2,
65 IWL_TX_FIFO_AC3,
66 IWL_TX_FIFO_AC3,
67 IWL_TX_FIFO_NONE,
68 IWL_TX_FIFO_NONE,
69 IWL_TX_FIFO_NONE,
70 IWL_TX_FIFO_NONE,
71 IWL_TX_FIFO_NONE,
72 IWL_TX_FIFO_NONE,
73 IWL_TX_FIFO_NONE,
74 IWL_TX_FIFO_NONE,
75 IWL_TX_FIFO_AC3
76 };
77
78 #endif /*CONFIG_IWL4965_HT */
79
80 /* check contents of special bootstrap uCode SRAM */
81 static int iwl4965_verify_bsm(struct iwl_priv *priv)
82 {
83 __le32 *image = priv->ucode_boot.v_addr;
84 u32 len = priv->ucode_boot.len;
85 u32 reg;
86 u32 val;
87
88 IWL_DEBUG_INFO("Begin verify bsm\n");
89
90 /* verify BSM SRAM contents */
91 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
92 for (reg = BSM_SRAM_LOWER_BOUND;
93 reg < BSM_SRAM_LOWER_BOUND + len;
94 reg += sizeof(u32), image++) {
95 val = iwl_read_prph(priv, reg);
96 if (val != le32_to_cpu(*image)) {
97 IWL_ERROR("BSM uCode verification failed at "
98 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
99 BSM_SRAM_LOWER_BOUND,
100 reg - BSM_SRAM_LOWER_BOUND, len,
101 val, le32_to_cpu(*image));
102 return -EIO;
103 }
104 }
105
106 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
107
108 return 0;
109 }
110
111 /**
112 * iwl4965_load_bsm - Load bootstrap instructions
113 *
114 * BSM operation:
115 *
116 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
117 * in special SRAM that does not power down during RFKILL. When powering back
118 * up after power-saving sleeps (or during initial uCode load), the BSM loads
119 * the bootstrap program into the on-board processor, and starts it.
120 *
121 * The bootstrap program loads (via DMA) instructions and data for a new
122 * program from host DRAM locations indicated by the host driver in the
123 * BSM_DRAM_* registers. Once the new program is loaded, it starts
124 * automatically.
125 *
126 * When initializing the NIC, the host driver points the BSM to the
127 * "initialize" uCode image. This uCode sets up some internal data, then
128 * notifies host via "initialize alive" that it is complete.
129 *
130 * The host then replaces the BSM_DRAM_* pointer values to point to the
131 * normal runtime uCode instructions and a backup uCode data cache buffer
132 * (filled initially with starting data values for the on-board processor),
133 * then triggers the "initialize" uCode to load and launch the runtime uCode,
134 * which begins normal operation.
135 *
136 * When doing a power-save shutdown, runtime uCode saves data SRAM into
137 * the backup data cache in DRAM before SRAM is powered down.
138 *
139 * When powering back up, the BSM loads the bootstrap program. This reloads
140 * the runtime uCode instructions and the backup data cache into SRAM,
141 * and re-launches the runtime uCode from where it left off.
142 */
143 static int iwl4965_load_bsm(struct iwl_priv *priv)
144 {
145 __le32 *image = priv->ucode_boot.v_addr;
146 u32 len = priv->ucode_boot.len;
147 dma_addr_t pinst;
148 dma_addr_t pdata;
149 u32 inst_len;
150 u32 data_len;
151 int i;
152 u32 done;
153 u32 reg_offset;
154 int ret;
155
156 IWL_DEBUG_INFO("Begin load bsm\n");
157
158 /* make sure bootstrap program is no larger than BSM's SRAM size */
159 if (len > IWL_MAX_BSM_SIZE)
160 return -EINVAL;
161
162 /* Tell bootstrap uCode where to find the "Initialize" uCode
163 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
164 * NOTE: iwl4965_initialize_alive_start() will replace these values,
165 * after the "initialize" uCode has run, to point to
166 * runtime/protocol instructions and backup data cache. */
167 pinst = priv->ucode_init.p_addr >> 4;
168 pdata = priv->ucode_init_data.p_addr >> 4;
169 inst_len = priv->ucode_init.len;
170 data_len = priv->ucode_init_data.len;
171
172 ret = iwl_grab_nic_access(priv);
173 if (ret)
174 return ret;
175
176 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
177 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
178 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
179 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
180
181 /* Fill BSM memory with bootstrap instructions */
182 for (reg_offset = BSM_SRAM_LOWER_BOUND;
183 reg_offset < BSM_SRAM_LOWER_BOUND + len;
184 reg_offset += sizeof(u32), image++)
185 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
186
187 ret = iwl4965_verify_bsm(priv);
188 if (ret) {
189 iwl_release_nic_access(priv);
190 return ret;
191 }
192
193 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
194 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
195 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
196 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
197
198 /* Load bootstrap code into instruction SRAM now,
199 * to prepare to load "initialize" uCode */
200 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
201
202 /* Wait for load of bootstrap uCode to finish */
203 for (i = 0; i < 100; i++) {
204 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
205 if (!(done & BSM_WR_CTRL_REG_BIT_START))
206 break;
207 udelay(10);
208 }
209 if (i < 100)
210 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
211 else {
212 IWL_ERROR("BSM write did not complete!\n");
213 return -EIO;
214 }
215
216 /* Enable future boot loads whenever power management unit triggers it
217 * (e.g. when powering back up after power-save shutdown) */
218 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
219
220 iwl_release_nic_access(priv);
221
222 return 0;
223 }
224
225 /**
226 * iwl4965_set_ucode_ptrs - Set uCode address location
227 *
228 * Tell initialization uCode where to find runtime uCode.
229 *
230 * BSM registers initially contain pointers to initialization uCode.
231 * We need to replace them to load runtime uCode inst and data,
232 * and to save runtime data when powering down.
233 */
234 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
235 {
236 dma_addr_t pinst;
237 dma_addr_t pdata;
238 unsigned long flags;
239 int ret = 0;
240
241 /* bits 35:4 for 4965 */
242 pinst = priv->ucode_code.p_addr >> 4;
243 pdata = priv->ucode_data_backup.p_addr >> 4;
244
245 spin_lock_irqsave(&priv->lock, flags);
246 ret = iwl_grab_nic_access(priv);
247 if (ret) {
248 spin_unlock_irqrestore(&priv->lock, flags);
249 return ret;
250 }
251
252 /* Tell bootstrap uCode where to find image to load */
253 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
254 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
255 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
256 priv->ucode_data.len);
257
258 /* Inst bytecount must be last to set up, bit 31 signals uCode
259 * that all new ptr/size info is in place */
260 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
261 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
262 iwl_release_nic_access(priv);
263
264 spin_unlock_irqrestore(&priv->lock, flags);
265
266 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
267
268 return ret;
269 }
270
271 /**
272 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
273 *
274 * Called after REPLY_ALIVE notification received from "initialize" uCode.
275 *
276 * The 4965 "initialize" ALIVE reply contains calibration data for:
277 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
278 * (3945 does not contain this data).
279 *
280 * Tell "initialize" uCode to go ahead and load the runtime uCode.
281 */
282 static void iwl4965_init_alive_start(struct iwl_priv *priv)
283 {
284 /* Check alive response for "valid" sign from uCode */
285 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
286 /* We had an error bringing up the hardware, so take it
287 * all the way back down so we can try again */
288 IWL_DEBUG_INFO("Initialize Alive failed.\n");
289 goto restart;
290 }
291
292 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
293 * This is a paranoid check, because we would not have gotten the
294 * "initialize" alive if code weren't properly loaded. */
295 if (iwl_verify_ucode(priv)) {
296 /* Runtime instruction load was bad;
297 * take it all the way back down so we can try again */
298 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
299 goto restart;
300 }
301
302 /* Calculate temperature */
303 priv->temperature = iwl4965_get_temperature(priv);
304
305 /* Send pointers to protocol/runtime uCode image ... init code will
306 * load and launch runtime uCode, which will send us another "Alive"
307 * notification. */
308 IWL_DEBUG_INFO("Initialization Alive received.\n");
309 if (iwl4965_set_ucode_ptrs(priv)) {
310 /* Runtime instruction load won't happen;
311 * take it all the way back down so we can try again */
312 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
313 goto restart;
314 }
315 return;
316
317 restart:
318 queue_work(priv->workqueue, &priv->restart);
319 }
320
321 static int is_fat_channel(__le32 rxon_flags)
322 {
323 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
324 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
325 }
326
327 int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
328 {
329 int idx = 0;
330
331 /* 4965 HT rate format */
332 if (rate_n_flags & RATE_MCS_HT_MSK) {
333 idx = (rate_n_flags & 0xff);
334
335 if (idx >= IWL_RATE_MIMO2_6M_PLCP)
336 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
337
338 idx += IWL_FIRST_OFDM_RATE;
339 /* skip 9M not supported in ht*/
340 if (idx >= IWL_RATE_9M_INDEX)
341 idx += 1;
342 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
343 return idx;
344
345 /* 4965 legacy rate format, search for match in table */
346 } else {
347 for (idx = 0; idx < ARRAY_SIZE(iwl4965_rates); idx++)
348 if (iwl4965_rates[idx].plcp == (rate_n_flags & 0xFF))
349 return idx;
350 }
351
352 return -1;
353 }
354
355 /**
356 * translate ucode response to mac80211 tx status control values
357 */
358 void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
359 struct ieee80211_tx_control *control)
360 {
361 int rate_index;
362
363 control->antenna_sel_tx =
364 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
365 if (rate_n_flags & RATE_MCS_HT_MSK)
366 control->flags |= IEEE80211_TXCTL_OFDM_HT;
367 if (rate_n_flags & RATE_MCS_GF_MSK)
368 control->flags |= IEEE80211_TXCTL_GREEN_FIELD;
369 if (rate_n_flags & RATE_MCS_FAT_MSK)
370 control->flags |= IEEE80211_TXCTL_40_MHZ_WIDTH;
371 if (rate_n_flags & RATE_MCS_DUP_MSK)
372 control->flags |= IEEE80211_TXCTL_DUP_DATA;
373 if (rate_n_flags & RATE_MCS_SGI_MSK)
374 control->flags |= IEEE80211_TXCTL_SHORT_GI;
375 /* since iwl4965_hwrate_to_plcp_idx is band indifferent, we always use
376 * IEEE80211_BAND_2GHZ band as it contains all the rates */
377 rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
378 if (rate_index == -1)
379 control->tx_rate = NULL;
380 else
381 control->tx_rate =
382 &priv->bands[IEEE80211_BAND_2GHZ].bitrates[rate_index];
383 }
384
385 int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
386 {
387 int rc;
388 unsigned long flags;
389
390 spin_lock_irqsave(&priv->lock, flags);
391 rc = iwl_grab_nic_access(priv);
392 if (rc) {
393 spin_unlock_irqrestore(&priv->lock, flags);
394 return rc;
395 }
396
397 /* stop Rx DMA */
398 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
399 rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
400 (1 << 24), 1000);
401 if (rc < 0)
402 IWL_ERROR("Can't stop Rx DMA.\n");
403
404 iwl_release_nic_access(priv);
405 spin_unlock_irqrestore(&priv->lock, flags);
406
407 return 0;
408 }
409
410 /*
411 * EEPROM handlers
412 */
413
414 static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
415 {
416 u16 eeprom_ver;
417 u16 calib_ver;
418
419 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
420
421 calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
422
423 if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
424 calib_ver < EEPROM_4965_TX_POWER_VERSION)
425 goto err;
426
427 return 0;
428 err:
429 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
430 eeprom_ver, EEPROM_4965_EEPROM_VERSION,
431 calib_ver, EEPROM_4965_TX_POWER_VERSION);
432 return -EINVAL;
433
434 }
435 int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
436 {
437 int ret;
438 unsigned long flags;
439
440 spin_lock_irqsave(&priv->lock, flags);
441 ret = iwl_grab_nic_access(priv);
442 if (ret) {
443 spin_unlock_irqrestore(&priv->lock, flags);
444 return ret;
445 }
446
447 if (src == IWL_PWR_SRC_VAUX) {
448 u32 val;
449 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
450 &val);
451
452 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
453 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
454 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
455 ~APMG_PS_CTRL_MSK_PWR_SRC);
456 }
457 } else {
458 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
459 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
460 ~APMG_PS_CTRL_MSK_PWR_SRC);
461 }
462
463 iwl_release_nic_access(priv);
464 spin_unlock_irqrestore(&priv->lock, flags);
465
466 return ret;
467 }
468
469 static int iwl4965_disable_tx_fifo(struct iwl_priv *priv)
470 {
471 unsigned long flags;
472 int ret;
473
474 spin_lock_irqsave(&priv->lock, flags);
475
476 ret = iwl_grab_nic_access(priv);
477 if (unlikely(ret)) {
478 IWL_ERROR("Tx fifo reset failed");
479 spin_unlock_irqrestore(&priv->lock, flags);
480 return ret;
481 }
482
483 iwl_write_prph(priv, IWL49_SCD_TXFACT, 0);
484 iwl_release_nic_access(priv);
485 spin_unlock_irqrestore(&priv->lock, flags);
486
487 return 0;
488 }
489
490 static int iwl4965_apm_init(struct iwl_priv *priv)
491 {
492 unsigned long flags;
493 int ret = 0;
494
495 spin_lock_irqsave(&priv->lock, flags);
496 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
497 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
498
499 /* set "initialization complete" bit to move adapter
500 * D0U* --> D0A* state */
501 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
502
503 /* wait for clock stabilization */
504 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
505 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
506 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
507 if (ret < 0) {
508 IWL_DEBUG_INFO("Failed to init the card\n");
509 goto out;
510 }
511
512 ret = iwl_grab_nic_access(priv);
513 if (ret)
514 goto out;
515
516 /* enable DMA */
517 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
518 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
519
520 udelay(20);
521
522 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
523 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
524
525 iwl_release_nic_access(priv);
526 out:
527 spin_unlock_irqrestore(&priv->lock, flags);
528 return ret;
529 }
530
531
532 static void iwl4965_nic_config(struct iwl_priv *priv)
533 {
534 unsigned long flags;
535 u32 val;
536 u16 radio_cfg;
537 u8 val_link;
538
539 spin_lock_irqsave(&priv->lock, flags);
540
541 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
542 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
543 /* Enable No Snoop field */
544 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
545 val & ~(1 << 11));
546 }
547
548 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
549
550 /* disable L1 entry -- workaround for pre-B1 */
551 pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
552
553 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
554
555 /* write radio config values to register */
556 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
557 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
558 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
559 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
560 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
561
562 /* set CSR_HW_CONFIG_REG for uCode use */
563 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
564 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
565 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
566
567 priv->calib_info = (struct iwl_eeprom_calib_info *)
568 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
569
570 spin_unlock_irqrestore(&priv->lock, flags);
571 }
572
573 int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
574 {
575 int rc = 0;
576 u32 reg_val;
577 unsigned long flags;
578
579 spin_lock_irqsave(&priv->lock, flags);
580
581 /* set stop master bit */
582 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
583
584 reg_val = iwl_read32(priv, CSR_GP_CNTRL);
585
586 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
587 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
588 IWL_DEBUG_INFO("Card in power save, master is already "
589 "stopped\n");
590 else {
591 rc = iwl_poll_bit(priv, CSR_RESET,
592 CSR_RESET_REG_FLAG_MASTER_DISABLED,
593 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
594 if (rc < 0) {
595 spin_unlock_irqrestore(&priv->lock, flags);
596 return rc;
597 }
598 }
599
600 spin_unlock_irqrestore(&priv->lock, flags);
601 IWL_DEBUG_INFO("stop master\n");
602
603 return rc;
604 }
605
606 /**
607 * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
608 */
609 void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
610 {
611
612 int txq_id;
613 unsigned long flags;
614
615 /* Stop each Tx DMA channel, and wait for it to be idle */
616 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
617 spin_lock_irqsave(&priv->lock, flags);
618 if (iwl_grab_nic_access(priv)) {
619 spin_unlock_irqrestore(&priv->lock, flags);
620 continue;
621 }
622
623 iwl_write_direct32(priv,
624 FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
625 iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
626 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
627 (txq_id), 200);
628 iwl_release_nic_access(priv);
629 spin_unlock_irqrestore(&priv->lock, flags);
630 }
631
632 /* Deallocate memory for all Tx queues */
633 iwl_hw_txq_ctx_free(priv);
634 }
635
636 int iwl4965_hw_nic_reset(struct iwl_priv *priv)
637 {
638 int rc = 0;
639 unsigned long flags;
640
641 iwl4965_hw_nic_stop_master(priv);
642
643 spin_lock_irqsave(&priv->lock, flags);
644
645 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
646
647 udelay(10);
648
649 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
650 rc = iwl_poll_bit(priv, CSR_RESET,
651 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
652 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
653
654 udelay(10);
655
656 rc = iwl_grab_nic_access(priv);
657 if (!rc) {
658 iwl_write_prph(priv, APMG_CLK_EN_REG,
659 APMG_CLK_VAL_DMA_CLK_RQT |
660 APMG_CLK_VAL_BSM_CLK_RQT);
661
662 udelay(10);
663
664 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
665 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
666
667 iwl_release_nic_access(priv);
668 }
669
670 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
671 wake_up_interruptible(&priv->wait_command_queue);
672
673 spin_unlock_irqrestore(&priv->lock, flags);
674
675 return rc;
676
677 }
678
679 #define REG_RECALIB_PERIOD (60)
680
681 /**
682 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
683 *
684 * This callback is provided in order to send a statistics request.
685 *
686 * This timer function is continually reset to execute within
687 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
688 * was received. We need to ensure we receive the statistics in order
689 * to update the temperature used for calibrating the TXPOWER.
690 */
691 static void iwl4965_bg_statistics_periodic(unsigned long data)
692 {
693 struct iwl_priv *priv = (struct iwl_priv *)data;
694
695 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
696 return;
697
698 iwl_send_statistics_request(priv, CMD_ASYNC);
699 }
700
701 void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
702 {
703 struct iwl4965_ct_kill_config cmd;
704 unsigned long flags;
705 int ret = 0;
706
707 spin_lock_irqsave(&priv->lock, flags);
708 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
709 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
710 spin_unlock_irqrestore(&priv->lock, flags);
711
712 cmd.critical_temperature_R =
713 cpu_to_le32(priv->hw_params.ct_kill_threshold);
714
715 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
716 sizeof(cmd), &cmd);
717 if (ret)
718 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
719 else
720 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
721 "critical temperature is %d\n",
722 cmd.critical_temperature_R);
723 }
724
725 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
726
727 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
728 * Called after every association, but this runs only once!
729 * ... once chain noise is calibrated the first time, it's good forever. */
730 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
731 {
732 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
733
734 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
735 struct iwl4965_calibration_cmd cmd;
736
737 memset(&cmd, 0, sizeof(cmd));
738 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
739 cmd.diff_gain_a = 0;
740 cmd.diff_gain_b = 0;
741 cmd.diff_gain_c = 0;
742 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
743 sizeof(cmd), &cmd))
744 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
745 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
746 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
747 }
748 }
749
750 static void iwl4965_gain_computation(struct iwl_priv *priv,
751 u32 *average_noise,
752 u16 min_average_noise_antenna_i,
753 u32 min_average_noise)
754 {
755 int i, ret;
756 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
757
758 data->delta_gain_code[min_average_noise_antenna_i] = 0;
759
760 for (i = 0; i < NUM_RX_CHAINS; i++) {
761 s32 delta_g = 0;
762
763 if (!(data->disconn_array[i]) &&
764 (data->delta_gain_code[i] ==
765 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
766 delta_g = average_noise[i] - min_average_noise;
767 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
768 data->delta_gain_code[i] =
769 min(data->delta_gain_code[i],
770 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
771
772 data->delta_gain_code[i] =
773 (data->delta_gain_code[i] | (1 << 2));
774 } else {
775 data->delta_gain_code[i] = 0;
776 }
777 }
778 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
779 data->delta_gain_code[0],
780 data->delta_gain_code[1],
781 data->delta_gain_code[2]);
782
783 /* Differential gain gets sent to uCode only once */
784 if (!data->radio_write) {
785 struct iwl4965_calibration_cmd cmd;
786 data->radio_write = 1;
787
788 memset(&cmd, 0, sizeof(cmd));
789 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
790 cmd.diff_gain_a = data->delta_gain_code[0];
791 cmd.diff_gain_b = data->delta_gain_code[1];
792 cmd.diff_gain_c = data->delta_gain_code[2];
793 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
794 sizeof(cmd), &cmd);
795 if (ret)
796 IWL_DEBUG_CALIB("fail sending cmd "
797 "REPLY_PHY_CALIBRATION_CMD \n");
798
799 /* TODO we might want recalculate
800 * rx_chain in rxon cmd */
801
802 /* Mark so we run this algo only once! */
803 data->state = IWL_CHAIN_NOISE_CALIBRATED;
804 }
805 data->chain_noise_a = 0;
806 data->chain_noise_b = 0;
807 data->chain_noise_c = 0;
808 data->chain_signal_a = 0;
809 data->chain_signal_b = 0;
810 data->chain_signal_c = 0;
811 data->beacon_count = 0;
812 }
813
814 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
815 {
816 struct iwl_priv *priv = container_of(work, struct iwl_priv,
817 sensitivity_work);
818
819 mutex_lock(&priv->mutex);
820
821 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
822 test_bit(STATUS_SCANNING, &priv->status)) {
823 mutex_unlock(&priv->mutex);
824 return;
825 }
826
827 if (priv->start_calib) {
828 iwl_chain_noise_calibration(priv, &priv->statistics);
829
830 iwl_sensitivity_calibration(priv, &priv->statistics);
831 }
832
833 mutex_unlock(&priv->mutex);
834 return;
835 }
836 #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
837
838 static void iwl4965_bg_txpower_work(struct work_struct *work)
839 {
840 struct iwl_priv *priv = container_of(work, struct iwl_priv,
841 txpower_work);
842
843 /* If a scan happened to start before we got here
844 * then just return; the statistics notification will
845 * kick off another scheduled work to compensate for
846 * any temperature delta we missed here. */
847 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
848 test_bit(STATUS_SCANNING, &priv->status))
849 return;
850
851 mutex_lock(&priv->mutex);
852
853 /* Regardless of if we are assocaited, we must reconfigure the
854 * TX power since frames can be sent on non-radar channels while
855 * not associated */
856 iwl4965_hw_reg_send_txpower(priv);
857
858 /* Update last_temperature to keep is_calib_needed from running
859 * when it isn't needed... */
860 priv->last_temperature = priv->temperature;
861
862 mutex_unlock(&priv->mutex);
863 }
864
865 /*
866 * Acquire priv->lock before calling this function !
867 */
868 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
869 {
870 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
871 (index & 0xff) | (txq_id << 8));
872 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
873 }
874
875 /**
876 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
877 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
878 * @scd_retry: (1) Indicates queue will be used in aggregation mode
879 *
880 * NOTE: Acquire priv->lock before calling this function !
881 */
882 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
883 struct iwl4965_tx_queue *txq,
884 int tx_fifo_id, int scd_retry)
885 {
886 int txq_id = txq->q.id;
887
888 /* Find out whether to activate Tx queue */
889 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
890
891 /* Set up and activate */
892 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
893 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
894 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
895 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
896 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
897 IWL49_SCD_QUEUE_STTS_REG_MSK);
898
899 txq->sched_retry = scd_retry;
900
901 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
902 active ? "Activate" : "Deactivate",
903 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
904 }
905
906 static const u16 default_queue_to_tx_fifo[] = {
907 IWL_TX_FIFO_AC3,
908 IWL_TX_FIFO_AC2,
909 IWL_TX_FIFO_AC1,
910 IWL_TX_FIFO_AC0,
911 IWL49_CMD_FIFO_NUM,
912 IWL_TX_FIFO_HCCA_1,
913 IWL_TX_FIFO_HCCA_2
914 };
915
916 static inline void iwl4965_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
917 {
918 set_bit(txq_id, &priv->txq_ctx_active_msk);
919 }
920
921 static inline void iwl4965_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
922 {
923 clear_bit(txq_id, &priv->txq_ctx_active_msk);
924 }
925
926 int iwl4965_alive_notify(struct iwl_priv *priv)
927 {
928 u32 a;
929 int i = 0;
930 unsigned long flags;
931 int ret;
932
933 spin_lock_irqsave(&priv->lock, flags);
934
935 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
936 memset(&(priv->sensitivity_data), 0,
937 sizeof(struct iwl_sensitivity_data));
938 memset(&(priv->chain_noise_data), 0,
939 sizeof(struct iwl_chain_noise_data));
940 for (i = 0; i < NUM_RX_CHAINS; i++)
941 priv->chain_noise_data.delta_gain_code[i] =
942 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
943 #endif /* CONFIG_IWL4965_RUN_TIME_CALIB*/
944 ret = iwl_grab_nic_access(priv);
945 if (ret) {
946 spin_unlock_irqrestore(&priv->lock, flags);
947 return ret;
948 }
949
950 /* Clear 4965's internal Tx Scheduler data base */
951 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
952 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
953 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
954 iwl_write_targ_mem(priv, a, 0);
955 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
956 iwl_write_targ_mem(priv, a, 0);
957 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
958 iwl_write_targ_mem(priv, a, 0);
959
960 /* Tel 4965 where to find Tx byte count tables */
961 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
962 (priv->shared_phys +
963 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
964
965 /* Disable chain mode for all queues */
966 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
967
968 /* Initialize each Tx queue (including the command queue) */
969 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
970
971 /* TFD circular buffer read/write indexes */
972 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
973 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
974
975 /* Max Tx Window size for Scheduler-ACK mode */
976 iwl_write_targ_mem(priv, priv->scd_base_addr +
977 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
978 (SCD_WIN_SIZE <<
979 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
980 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
981
982 /* Frame limit */
983 iwl_write_targ_mem(priv, priv->scd_base_addr +
984 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
985 sizeof(u32),
986 (SCD_FRAME_LIMIT <<
987 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
988 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
989
990 }
991 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
992 (1 << priv->hw_params.max_txq_num) - 1);
993
994 /* Activate all Tx DMA/FIFO channels */
995 iwl_write_prph(priv, IWL49_SCD_TXFACT,
996 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
997
998 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
999
1000 /* Map each Tx/cmd queue to its corresponding fifo */
1001 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1002 int ac = default_queue_to_tx_fifo[i];
1003 iwl4965_txq_ctx_activate(priv, i);
1004 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1005 }
1006
1007 iwl_release_nic_access(priv);
1008 spin_unlock_irqrestore(&priv->lock, flags);
1009
1010 /* Ask for statistics now, the uCode will send statistics notification
1011 * periodically after association */
1012 iwl_send_statistics_request(priv, CMD_ASYNC);
1013 return ret;
1014 }
1015
1016 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1017 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
1018 .min_nrg_cck = 97,
1019 .max_nrg_cck = 0,
1020
1021 .auto_corr_min_ofdm = 85,
1022 .auto_corr_min_ofdm_mrc = 170,
1023 .auto_corr_min_ofdm_x1 = 105,
1024 .auto_corr_min_ofdm_mrc_x1 = 220,
1025
1026 .auto_corr_max_ofdm = 120,
1027 .auto_corr_max_ofdm_mrc = 210,
1028 .auto_corr_max_ofdm_x1 = 140,
1029 .auto_corr_max_ofdm_mrc_x1 = 270,
1030
1031 .auto_corr_min_cck = 125,
1032 .auto_corr_max_cck = 200,
1033 .auto_corr_min_cck_mrc = 200,
1034 .auto_corr_max_cck_mrc = 400,
1035
1036 .nrg_th_cck = 100,
1037 .nrg_th_ofdm = 100,
1038 };
1039 #endif
1040
1041 /**
1042 * iwl4965_hw_set_hw_params
1043 *
1044 * Called when initializing driver
1045 */
1046 int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
1047 {
1048
1049 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
1050 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
1051 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
1052 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
1053 return -EINVAL;
1054 }
1055
1056 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
1057 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
1058 priv->hw_params.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
1059 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1060 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1061 if (priv->cfg->mod_params->amsdu_size_8K)
1062 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1063 else
1064 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1065 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1066 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
1067 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
1068
1069 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
1070 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
1071 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
1072 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
1073
1074 priv->hw_params.tx_chains_num = 2;
1075 priv->hw_params.rx_chains_num = 2;
1076 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
1077 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
1078 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
1079
1080 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1081 priv->hw_params.sens = &iwl4965_sensitivity;
1082 #endif
1083
1084 return 0;
1085 }
1086
1087 /* set card power command */
1088 static int iwl4965_set_power(struct iwl_priv *priv,
1089 void *cmd)
1090 {
1091 int ret = 0;
1092
1093 ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
1094 sizeof(struct iwl4965_powertable_cmd),
1095 cmd, NULL);
1096 return ret;
1097 }
1098 int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1099 {
1100 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1101 return -EINVAL;
1102 }
1103
1104 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1105 {
1106 s32 sign = 1;
1107
1108 if (num < 0) {
1109 sign = -sign;
1110 num = -num;
1111 }
1112 if (denom < 0) {
1113 sign = -sign;
1114 denom = -denom;
1115 }
1116 *res = 1;
1117 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1118
1119 return 1;
1120 }
1121
1122 /**
1123 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1124 *
1125 * Determines power supply voltage compensation for txpower calculations.
1126 * Returns number of 1/2-dB steps to subtract from gain table index,
1127 * to compensate for difference between power supply voltage during
1128 * factory measurements, vs. current power supply voltage.
1129 *
1130 * Voltage indication is higher for lower voltage.
1131 * Lower voltage requires more gain (lower gain table index).
1132 */
1133 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1134 s32 current_voltage)
1135 {
1136 s32 comp = 0;
1137
1138 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1139 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1140 return 0;
1141
1142 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1143 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1144
1145 if (current_voltage > eeprom_voltage)
1146 comp *= 2;
1147 if ((comp < -2) || (comp > 2))
1148 comp = 0;
1149
1150 return comp;
1151 }
1152
1153 static const struct iwl_channel_info *
1154 iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
1155 enum ieee80211_band band, u16 channel)
1156 {
1157 const struct iwl_channel_info *ch_info;
1158
1159 ch_info = iwl_get_channel_info(priv, band, channel);
1160
1161 if (!is_channel_valid(ch_info))
1162 return NULL;
1163
1164 return ch_info;
1165 }
1166
1167 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1168 {
1169 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1170 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1171 return CALIB_CH_GROUP_5;
1172
1173 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1174 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1175 return CALIB_CH_GROUP_1;
1176
1177 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1178 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1179 return CALIB_CH_GROUP_2;
1180
1181 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1182 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1183 return CALIB_CH_GROUP_3;
1184
1185 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1186 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1187 return CALIB_CH_GROUP_4;
1188
1189 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1190 return -1;
1191 }
1192
1193 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
1194 {
1195 s32 b = -1;
1196
1197 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
1198 if (priv->calib_info->band_info[b].ch_from == 0)
1199 continue;
1200
1201 if ((channel >= priv->calib_info->band_info[b].ch_from)
1202 && (channel <= priv->calib_info->band_info[b].ch_to))
1203 break;
1204 }
1205
1206 return b;
1207 }
1208
1209 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1210 {
1211 s32 val;
1212
1213 if (x2 == x1)
1214 return y1;
1215 else {
1216 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1217 return val + y2;
1218 }
1219 }
1220
1221 /**
1222 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
1223 *
1224 * Interpolates factory measurements from the two sample channels within a
1225 * sub-band, to apply to channel of interest. Interpolation is proportional to
1226 * differences in channel frequencies, which is proportional to differences
1227 * in channel number.
1228 */
1229 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
1230 struct iwl_eeprom_calib_ch_info *chan_info)
1231 {
1232 s32 s = -1;
1233 u32 c;
1234 u32 m;
1235 const struct iwl_eeprom_calib_measure *m1;
1236 const struct iwl_eeprom_calib_measure *m2;
1237 struct iwl_eeprom_calib_measure *omeas;
1238 u32 ch_i1;
1239 u32 ch_i2;
1240
1241 s = iwl4965_get_sub_band(priv, channel);
1242 if (s >= EEPROM_TX_POWER_BANDS) {
1243 IWL_ERROR("Tx Power can not find channel %d ", channel);
1244 return -1;
1245 }
1246
1247 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1248 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
1249 chan_info->ch_num = (u8) channel;
1250
1251 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1252 channel, s, ch_i1, ch_i2);
1253
1254 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1255 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1256 m1 = &(priv->calib_info->band_info[s].ch1.
1257 measurements[c][m]);
1258 m2 = &(priv->calib_info->band_info[s].ch2.
1259 measurements[c][m]);
1260 omeas = &(chan_info->measurements[c][m]);
1261
1262 omeas->actual_pow =
1263 (u8) iwl4965_interpolate_value(channel, ch_i1,
1264 m1->actual_pow,
1265 ch_i2,
1266 m2->actual_pow);
1267 omeas->gain_idx =
1268 (u8) iwl4965_interpolate_value(channel, ch_i1,
1269 m1->gain_idx, ch_i2,
1270 m2->gain_idx);
1271 omeas->temperature =
1272 (u8) iwl4965_interpolate_value(channel, ch_i1,
1273 m1->temperature,
1274 ch_i2,
1275 m2->temperature);
1276 omeas->pa_det =
1277 (s8) iwl4965_interpolate_value(channel, ch_i1,
1278 m1->pa_det, ch_i2,
1279 m2->pa_det);
1280
1281 IWL_DEBUG_TXPOWER
1282 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1283 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1284 IWL_DEBUG_TXPOWER
1285 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1286 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1287 IWL_DEBUG_TXPOWER
1288 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1289 m1->pa_det, m2->pa_det, omeas->pa_det);
1290 IWL_DEBUG_TXPOWER
1291 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1292 m1->temperature, m2->temperature,
1293 omeas->temperature);
1294 }
1295 }
1296
1297 return 0;
1298 }
1299
1300 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1301 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1302 static s32 back_off_table[] = {
1303 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1304 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1305 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1306 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1307 10 /* CCK */
1308 };
1309
1310 /* Thermal compensation values for txpower for various frequency ranges ...
1311 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1312 static struct iwl4965_txpower_comp_entry {
1313 s32 degrees_per_05db_a;
1314 s32 degrees_per_05db_a_denom;
1315 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1316 {9, 2}, /* group 0 5.2, ch 34-43 */
1317 {4, 1}, /* group 1 5.2, ch 44-70 */
1318 {4, 1}, /* group 2 5.2, ch 71-124 */
1319 {4, 1}, /* group 3 5.2, ch 125-200 */
1320 {3, 1} /* group 4 2.4, ch all */
1321 };
1322
1323 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1324 {
1325 if (!band) {
1326 if ((rate_power_index & 7) <= 4)
1327 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1328 }
1329 return MIN_TX_GAIN_INDEX;
1330 }
1331
1332 struct gain_entry {
1333 u8 dsp;
1334 u8 radio;
1335 };
1336
1337 static const struct gain_entry gain_table[2][108] = {
1338 /* 5.2GHz power gain index table */
1339 {
1340 {123, 0x3F}, /* highest txpower */
1341 {117, 0x3F},
1342 {110, 0x3F},
1343 {104, 0x3F},
1344 {98, 0x3F},
1345 {110, 0x3E},
1346 {104, 0x3E},
1347 {98, 0x3E},
1348 {110, 0x3D},
1349 {104, 0x3D},
1350 {98, 0x3D},
1351 {110, 0x3C},
1352 {104, 0x3C},
1353 {98, 0x3C},
1354 {110, 0x3B},
1355 {104, 0x3B},
1356 {98, 0x3B},
1357 {110, 0x3A},
1358 {104, 0x3A},
1359 {98, 0x3A},
1360 {110, 0x39},
1361 {104, 0x39},
1362 {98, 0x39},
1363 {110, 0x38},
1364 {104, 0x38},
1365 {98, 0x38},
1366 {110, 0x37},
1367 {104, 0x37},
1368 {98, 0x37},
1369 {110, 0x36},
1370 {104, 0x36},
1371 {98, 0x36},
1372 {110, 0x35},
1373 {104, 0x35},
1374 {98, 0x35},
1375 {110, 0x34},
1376 {104, 0x34},
1377 {98, 0x34},
1378 {110, 0x33},
1379 {104, 0x33},
1380 {98, 0x33},
1381 {110, 0x32},
1382 {104, 0x32},
1383 {98, 0x32},
1384 {110, 0x31},
1385 {104, 0x31},
1386 {98, 0x31},
1387 {110, 0x30},
1388 {104, 0x30},
1389 {98, 0x30},
1390 {110, 0x25},
1391 {104, 0x25},
1392 {98, 0x25},
1393 {110, 0x24},
1394 {104, 0x24},
1395 {98, 0x24},
1396 {110, 0x23},
1397 {104, 0x23},
1398 {98, 0x23},
1399 {110, 0x22},
1400 {104, 0x18},
1401 {98, 0x18},
1402 {110, 0x17},
1403 {104, 0x17},
1404 {98, 0x17},
1405 {110, 0x16},
1406 {104, 0x16},
1407 {98, 0x16},
1408 {110, 0x15},
1409 {104, 0x15},
1410 {98, 0x15},
1411 {110, 0x14},
1412 {104, 0x14},
1413 {98, 0x14},
1414 {110, 0x13},
1415 {104, 0x13},
1416 {98, 0x13},
1417 {110, 0x12},
1418 {104, 0x08},
1419 {98, 0x08},
1420 {110, 0x07},
1421 {104, 0x07},
1422 {98, 0x07},
1423 {110, 0x06},
1424 {104, 0x06},
1425 {98, 0x06},
1426 {110, 0x05},
1427 {104, 0x05},
1428 {98, 0x05},
1429 {110, 0x04},
1430 {104, 0x04},
1431 {98, 0x04},
1432 {110, 0x03},
1433 {104, 0x03},
1434 {98, 0x03},
1435 {110, 0x02},
1436 {104, 0x02},
1437 {98, 0x02},
1438 {110, 0x01},
1439 {104, 0x01},
1440 {98, 0x01},
1441 {110, 0x00},
1442 {104, 0x00},
1443 {98, 0x00},
1444 {93, 0x00},
1445 {88, 0x00},
1446 {83, 0x00},
1447 {78, 0x00},
1448 },
1449 /* 2.4GHz power gain index table */
1450 {
1451 {110, 0x3f}, /* highest txpower */
1452 {104, 0x3f},
1453 {98, 0x3f},
1454 {110, 0x3e},
1455 {104, 0x3e},
1456 {98, 0x3e},
1457 {110, 0x3d},
1458 {104, 0x3d},
1459 {98, 0x3d},
1460 {110, 0x3c},
1461 {104, 0x3c},
1462 {98, 0x3c},
1463 {110, 0x3b},
1464 {104, 0x3b},
1465 {98, 0x3b},
1466 {110, 0x3a},
1467 {104, 0x3a},
1468 {98, 0x3a},
1469 {110, 0x39},
1470 {104, 0x39},
1471 {98, 0x39},
1472 {110, 0x38},
1473 {104, 0x38},
1474 {98, 0x38},
1475 {110, 0x37},
1476 {104, 0x37},
1477 {98, 0x37},
1478 {110, 0x36},
1479 {104, 0x36},
1480 {98, 0x36},
1481 {110, 0x35},
1482 {104, 0x35},
1483 {98, 0x35},
1484 {110, 0x34},
1485 {104, 0x34},
1486 {98, 0x34},
1487 {110, 0x33},
1488 {104, 0x33},
1489 {98, 0x33},
1490 {110, 0x32},
1491 {104, 0x32},
1492 {98, 0x32},
1493 {110, 0x31},
1494 {104, 0x31},
1495 {98, 0x31},
1496 {110, 0x30},
1497 {104, 0x30},
1498 {98, 0x30},
1499 {110, 0x6},
1500 {104, 0x6},
1501 {98, 0x6},
1502 {110, 0x5},
1503 {104, 0x5},
1504 {98, 0x5},
1505 {110, 0x4},
1506 {104, 0x4},
1507 {98, 0x4},
1508 {110, 0x3},
1509 {104, 0x3},
1510 {98, 0x3},
1511 {110, 0x2},
1512 {104, 0x2},
1513 {98, 0x2},
1514 {110, 0x1},
1515 {104, 0x1},
1516 {98, 0x1},
1517 {110, 0x0},
1518 {104, 0x0},
1519 {98, 0x0},
1520 {97, 0},
1521 {96, 0},
1522 {95, 0},
1523 {94, 0},
1524 {93, 0},
1525 {92, 0},
1526 {91, 0},
1527 {90, 0},
1528 {89, 0},
1529 {88, 0},
1530 {87, 0},
1531 {86, 0},
1532 {85, 0},
1533 {84, 0},
1534 {83, 0},
1535 {82, 0},
1536 {81, 0},
1537 {80, 0},
1538 {79, 0},
1539 {78, 0},
1540 {77, 0},
1541 {76, 0},
1542 {75, 0},
1543 {74, 0},
1544 {73, 0},
1545 {72, 0},
1546 {71, 0},
1547 {70, 0},
1548 {69, 0},
1549 {68, 0},
1550 {67, 0},
1551 {66, 0},
1552 {65, 0},
1553 {64, 0},
1554 {63, 0},
1555 {62, 0},
1556 {61, 0},
1557 {60, 0},
1558 {59, 0},
1559 }
1560 };
1561
1562 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1563 u8 is_fat, u8 ctrl_chan_high,
1564 struct iwl4965_tx_power_db *tx_power_tbl)
1565 {
1566 u8 saturation_power;
1567 s32 target_power;
1568 s32 user_target_power;
1569 s32 power_limit;
1570 s32 current_temp;
1571 s32 reg_limit;
1572 s32 current_regulatory;
1573 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1574 int i;
1575 int c;
1576 const struct iwl_channel_info *ch_info = NULL;
1577 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1578 const struct iwl_eeprom_calib_measure *measurement;
1579 s16 voltage;
1580 s32 init_voltage;
1581 s32 voltage_compensation;
1582 s32 degrees_per_05db_num;
1583 s32 degrees_per_05db_denom;
1584 s32 factory_temp;
1585 s32 temperature_comp[2];
1586 s32 factory_gain_index[2];
1587 s32 factory_actual_pwr[2];
1588 s32 power_index;
1589
1590 /* Sanity check requested level (dBm) */
1591 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
1592 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
1593 priv->user_txpower_limit);
1594 return -EINVAL;
1595 }
1596 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
1597 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
1598 priv->user_txpower_limit);
1599 return -EINVAL;
1600 }
1601
1602 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1603 * are used for indexing into txpower table) */
1604 user_target_power = 2 * priv->user_txpower_limit;
1605
1606 /* Get current (RXON) channel, band, width */
1607 ch_info =
1608 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
1609
1610 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1611 is_fat);
1612
1613 if (!ch_info)
1614 return -EINVAL;
1615
1616 /* get txatten group, used to select 1) thermal txpower adjustment
1617 * and 2) mimo txpower balance between Tx chains. */
1618 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1619 if (txatten_grp < 0)
1620 return -EINVAL;
1621
1622 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1623 channel, txatten_grp);
1624
1625 if (is_fat) {
1626 if (ctrl_chan_high)
1627 channel -= 2;
1628 else
1629 channel += 2;
1630 }
1631
1632 /* hardware txpower limits ...
1633 * saturation (clipping distortion) txpowers are in half-dBm */
1634 if (band)
1635 saturation_power = priv->calib_info->saturation_power24;
1636 else
1637 saturation_power = priv->calib_info->saturation_power52;
1638
1639 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1640 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1641 if (band)
1642 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1643 else
1644 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1645 }
1646
1647 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1648 * max_power_avg values are in dBm, convert * 2 */
1649 if (is_fat)
1650 reg_limit = ch_info->fat_max_power_avg * 2;
1651 else
1652 reg_limit = ch_info->max_power_avg * 2;
1653
1654 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1655 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1656 if (band)
1657 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1658 else
1659 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1660 }
1661
1662 /* Interpolate txpower calibration values for this channel,
1663 * based on factory calibration tests on spaced channels. */
1664 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1665
1666 /* calculate tx gain adjustment based on power supply voltage */
1667 voltage = priv->calib_info->voltage;
1668 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1669 voltage_compensation =
1670 iwl4965_get_voltage_compensation(voltage, init_voltage);
1671
1672 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1673 init_voltage,
1674 voltage, voltage_compensation);
1675
1676 /* get current temperature (Celsius) */
1677 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1678 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1679 current_temp = KELVIN_TO_CELSIUS(current_temp);
1680
1681 /* select thermal txpower adjustment params, based on channel group
1682 * (same frequency group used for mimo txatten adjustment) */
1683 degrees_per_05db_num =
1684 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1685 degrees_per_05db_denom =
1686 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1687
1688 /* get per-chain txpower values from factory measurements */
1689 for (c = 0; c < 2; c++) {
1690 measurement = &ch_eeprom_info.measurements[c][1];
1691
1692 /* txgain adjustment (in half-dB steps) based on difference
1693 * between factory and current temperature */
1694 factory_temp = measurement->temperature;
1695 iwl4965_math_div_round((current_temp - factory_temp) *
1696 degrees_per_05db_denom,
1697 degrees_per_05db_num,
1698 &temperature_comp[c]);
1699
1700 factory_gain_index[c] = measurement->gain_idx;
1701 factory_actual_pwr[c] = measurement->actual_pow;
1702
1703 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1704 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1705 "curr tmp %d, comp %d steps\n",
1706 factory_temp, current_temp,
1707 temperature_comp[c]);
1708
1709 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1710 factory_gain_index[c],
1711 factory_actual_pwr[c]);
1712 }
1713
1714 /* for each of 33 bit-rates (including 1 for CCK) */
1715 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1716 u8 is_mimo_rate;
1717 union iwl4965_tx_power_dual_stream tx_power;
1718
1719 /* for mimo, reduce each chain's txpower by half
1720 * (3dB, 6 steps), so total output power is regulatory
1721 * compliant. */
1722 if (i & 0x8) {
1723 current_regulatory = reg_limit -
1724 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1725 is_mimo_rate = 1;
1726 } else {
1727 current_regulatory = reg_limit;
1728 is_mimo_rate = 0;
1729 }
1730
1731 /* find txpower limit, either hardware or regulatory */
1732 power_limit = saturation_power - back_off_table[i];
1733 if (power_limit > current_regulatory)
1734 power_limit = current_regulatory;
1735
1736 /* reduce user's txpower request if necessary
1737 * for this rate on this channel */
1738 target_power = user_target_power;
1739 if (target_power > power_limit)
1740 target_power = power_limit;
1741
1742 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1743 i, saturation_power - back_off_table[i],
1744 current_regulatory, user_target_power,
1745 target_power);
1746
1747 /* for each of 2 Tx chains (radio transmitters) */
1748 for (c = 0; c < 2; c++) {
1749 s32 atten_value;
1750
1751 if (is_mimo_rate)
1752 atten_value =
1753 (s32)le32_to_cpu(priv->card_alive_init.
1754 tx_atten[txatten_grp][c]);
1755 else
1756 atten_value = 0;
1757
1758 /* calculate index; higher index means lower txpower */
1759 power_index = (u8) (factory_gain_index[c] -
1760 (target_power -
1761 factory_actual_pwr[c]) -
1762 temperature_comp[c] -
1763 voltage_compensation +
1764 atten_value);
1765
1766 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1767 power_index); */
1768
1769 if (power_index < get_min_power_index(i, band))
1770 power_index = get_min_power_index(i, band);
1771
1772 /* adjust 5 GHz index to support negative indexes */
1773 if (!band)
1774 power_index += 9;
1775
1776 /* CCK, rate 32, reduce txpower for CCK */
1777 if (i == POWER_TABLE_CCK_ENTRY)
1778 power_index +=
1779 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1780
1781 /* stay within the table! */
1782 if (power_index > 107) {
1783 IWL_WARNING("txpower index %d > 107\n",
1784 power_index);
1785 power_index = 107;
1786 }
1787 if (power_index < 0) {
1788 IWL_WARNING("txpower index %d < 0\n",
1789 power_index);
1790 power_index = 0;
1791 }
1792
1793 /* fill txpower command for this rate/chain */
1794 tx_power.s.radio_tx_gain[c] =
1795 gain_table[band][power_index].radio;
1796 tx_power.s.dsp_predis_atten[c] =
1797 gain_table[band][power_index].dsp;
1798
1799 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1800 "gain 0x%02x dsp %d\n",
1801 c, atten_value, power_index,
1802 tx_power.s.radio_tx_gain[c],
1803 tx_power.s.dsp_predis_atten[c]);
1804 }/* for each chain */
1805
1806 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1807
1808 }/* for each rate */
1809
1810 return 0;
1811 }
1812
1813 /**
1814 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
1815 *
1816 * Uses the active RXON for channel, band, and characteristics (fat, high)
1817 * The power limit is taken from priv->user_txpower_limit.
1818 */
1819 int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
1820 {
1821 struct iwl4965_txpowertable_cmd cmd = { 0 };
1822 int ret;
1823 u8 band = 0;
1824 u8 is_fat = 0;
1825 u8 ctrl_chan_high = 0;
1826
1827 if (test_bit(STATUS_SCANNING, &priv->status)) {
1828 /* If this gets hit a lot, switch it to a BUG() and catch
1829 * the stack trace to find out who is calling this during
1830 * a scan. */
1831 IWL_WARNING("TX Power requested while scanning!\n");
1832 return -EAGAIN;
1833 }
1834
1835 band = priv->band == IEEE80211_BAND_2GHZ;
1836
1837 is_fat = is_fat_channel(priv->active_rxon.flags);
1838
1839 if (is_fat &&
1840 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1841 ctrl_chan_high = 1;
1842
1843 cmd.band = band;
1844 cmd.channel = priv->active_rxon.channel;
1845
1846 ret = iwl4965_fill_txpower_tbl(priv, band,
1847 le16_to_cpu(priv->active_rxon.channel),
1848 is_fat, ctrl_chan_high, &cmd.tx_power);
1849 if (ret)
1850 goto out;
1851
1852 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1853
1854 out:
1855 return ret;
1856 }
1857
1858 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1859 {
1860 int ret = 0;
1861 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1862 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1863 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
1864
1865 if ((rxon1->flags == rxon2->flags) &&
1866 (rxon1->filter_flags == rxon2->filter_flags) &&
1867 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1868 (rxon1->ofdm_ht_single_stream_basic_rates ==
1869 rxon2->ofdm_ht_single_stream_basic_rates) &&
1870 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1871 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1872 (rxon1->rx_chain == rxon2->rx_chain) &&
1873 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1874 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1875 return 0;
1876 }
1877
1878 rxon_assoc.flags = priv->staging_rxon.flags;
1879 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1880 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1881 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1882 rxon_assoc.reserved = 0;
1883 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1884 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1885 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1886 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1887 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1888
1889 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1890 sizeof(rxon_assoc), &rxon_assoc, NULL);
1891 if (ret)
1892 return ret;
1893
1894 return ret;
1895 }
1896
1897
1898 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1899 {
1900 int rc;
1901 u8 band = 0;
1902 u8 is_fat = 0;
1903 u8 ctrl_chan_high = 0;
1904 struct iwl4965_channel_switch_cmd cmd = { 0 };
1905 const struct iwl_channel_info *ch_info;
1906
1907 band = priv->band == IEEE80211_BAND_2GHZ;
1908
1909 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1910
1911 is_fat = is_fat_channel(priv->staging_rxon.flags);
1912
1913 if (is_fat &&
1914 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1915 ctrl_chan_high = 1;
1916
1917 cmd.band = band;
1918 cmd.expect_beacon = 0;
1919 cmd.channel = cpu_to_le16(channel);
1920 cmd.rxon_flags = priv->active_rxon.flags;
1921 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1922 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1923 if (ch_info)
1924 cmd.expect_beacon = is_channel_radar(ch_info);
1925 else
1926 cmd.expect_beacon = 1;
1927
1928 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1929 ctrl_chan_high, &cmd.tx_power);
1930 if (rc) {
1931 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1932 return rc;
1933 }
1934
1935 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1936 return rc;
1937 }
1938
1939 #define RTS_HCCA_RETRY_LIMIT 3
1940 #define RTS_DFAULT_RETRY_LIMIT 60
1941
1942 void iwl4965_hw_build_tx_cmd_rate(struct iwl_priv *priv,
1943 struct iwl_cmd *cmd,
1944 struct ieee80211_tx_control *ctrl,
1945 struct ieee80211_hdr *hdr, int sta_id,
1946 int is_hcca)
1947 {
1948 struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
1949 u8 rts_retry_limit = 0;
1950 u8 data_retry_limit = 0;
1951 u16 fc = le16_to_cpu(hdr->frame_control);
1952 u8 rate_plcp;
1953 u16 rate_flags = 0;
1954 int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
1955
1956 rate_plcp = iwl4965_rates[rate_idx].plcp;
1957
1958 rts_retry_limit = (is_hcca) ?
1959 RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
1960
1961 if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
1962 rate_flags |= RATE_MCS_CCK_MSK;
1963
1964
1965 if (ieee80211_is_probe_response(fc)) {
1966 data_retry_limit = 3;
1967 if (data_retry_limit < rts_retry_limit)
1968 rts_retry_limit = data_retry_limit;
1969 } else
1970 data_retry_limit = IWL_DEFAULT_TX_RETRY;
1971
1972 if (priv->data_retry_limit != -1)
1973 data_retry_limit = priv->data_retry_limit;
1974
1975
1976 if (ieee80211_is_data(fc)) {
1977 tx->initial_rate_index = 0;
1978 tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
1979 } else {
1980 switch (fc & IEEE80211_FCTL_STYPE) {
1981 case IEEE80211_STYPE_AUTH:
1982 case IEEE80211_STYPE_DEAUTH:
1983 case IEEE80211_STYPE_ASSOC_REQ:
1984 case IEEE80211_STYPE_REASSOC_REQ:
1985 if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
1986 tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1987 tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
1988 }
1989 break;
1990 default:
1991 break;
1992 }
1993
1994 /* Alternate between antenna A and B for successive frames */
1995 if (priv->use_ant_b_for_management_frame) {
1996 priv->use_ant_b_for_management_frame = 0;
1997 rate_flags |= RATE_MCS_ANT_B_MSK;
1998 } else {
1999 priv->use_ant_b_for_management_frame = 1;
2000 rate_flags |= RATE_MCS_ANT_A_MSK;
2001 }
2002 }
2003
2004 tx->rts_retry_limit = rts_retry_limit;
2005 tx->data_retry_limit = data_retry_limit;
2006 tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
2007 }
2008
2009 int iwl4965_hw_get_rx_read(struct iwl_priv *priv)
2010 {
2011 struct iwl4965_shared *s = priv->shared_virt;
2012 return le32_to_cpu(s->rb_closed) & 0xFFF;
2013 }
2014
2015 int iwl4965_hw_get_temperature(struct iwl_priv *priv)
2016 {
2017 return priv->temperature;
2018 }
2019
2020 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
2021 struct iwl4965_frame *frame, u8 rate)
2022 {
2023 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
2024 unsigned int frame_size;
2025
2026 tx_beacon_cmd = &frame->u.beacon;
2027 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2028
2029 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
2030 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2031
2032 frame_size = iwl4965_fill_beacon_frame(priv,
2033 tx_beacon_cmd->frame,
2034 iwl4965_broadcast_addr,
2035 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2036
2037 BUG_ON(frame_size > MAX_MPDU_SIZE);
2038 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2039
2040 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
2041 tx_beacon_cmd->tx.rate_n_flags =
2042 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
2043 else
2044 tx_beacon_cmd->tx.rate_n_flags =
2045 iwl4965_hw_set_rate_n_flags(rate, 0);
2046
2047 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2048 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
2049 return (sizeof(*tx_beacon_cmd) + frame_size);
2050 }
2051
2052 int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
2053 dma_addr_t addr, u16 len)
2054 {
2055 int index, is_odd;
2056 struct iwl_tfd_frame *tfd = ptr;
2057 u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
2058
2059 /* Each TFD can point to a maximum 20 Tx buffers */
2060 if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
2061 IWL_ERROR("Error can not send more than %d chunks\n",
2062 MAX_NUM_OF_TBS);
2063 return -EINVAL;
2064 }
2065
2066 index = num_tbs / 2;
2067 is_odd = num_tbs & 0x1;
2068
2069 if (!is_odd) {
2070 tfd->pa[index].tb1_addr = cpu_to_le32(addr);
2071 IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
2072 iwl_get_dma_hi_address(addr));
2073 IWL_SET_BITS(tfd->pa[index], tb1_len, len);
2074 } else {
2075 IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
2076 (u32) (addr & 0xffff));
2077 IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
2078 IWL_SET_BITS(tfd->pa[index], tb2_len, len);
2079 }
2080
2081 IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
2082
2083 return 0;
2084 }
2085
2086 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
2087 {
2088 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
2089 sizeof(struct iwl4965_shared),
2090 &priv->shared_phys);
2091 if (!priv->shared_virt)
2092 return -ENOMEM;
2093
2094 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
2095
2096 return 0;
2097 }
2098
2099 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
2100 {
2101 if (priv->shared_virt)
2102 pci_free_consistent(priv->pci_dev,
2103 sizeof(struct iwl4965_shared),
2104 priv->shared_virt,
2105 priv->shared_phys);
2106 }
2107
2108 /**
2109 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
2110 */
2111 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
2112 struct iwl4965_tx_queue *txq,
2113 u16 byte_cnt)
2114 {
2115 int len;
2116 int txq_id = txq->q.id;
2117 struct iwl4965_shared *shared_data = priv->shared_virt;
2118
2119 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2120
2121 /* Set up byte count within first 256 entries */
2122 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2123 tfd_offset[txq->q.write_ptr], byte_cnt, len);
2124
2125 /* If within first 64 entries, duplicate at end */
2126 if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
2127 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2128 tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
2129 byte_cnt, len);
2130 }
2131
2132 /**
2133 * sign_extend - Sign extend a value using specified bit as sign-bit
2134 *
2135 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
2136 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
2137 *
2138 * @param oper value to sign extend
2139 * @param index 0 based bit index (0<=index<32) to sign bit
2140 */
2141 static s32 sign_extend(u32 oper, int index)
2142 {
2143 u8 shift = 31 - index;
2144
2145 return (s32)(oper << shift) >> shift;
2146 }
2147
2148 /**
2149 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
2150 * @statistics: Provides the temperature reading from the uCode
2151 *
2152 * A return of <0 indicates bogus data in the statistics
2153 */
2154 int iwl4965_get_temperature(const struct iwl_priv *priv)
2155 {
2156 s32 temperature;
2157 s32 vt;
2158 s32 R1, R2, R3;
2159 u32 R4;
2160
2161 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
2162 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
2163 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
2164 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
2165 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
2166 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
2167 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
2168 } else {
2169 IWL_DEBUG_TEMP("Running temperature calibration\n");
2170 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
2171 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
2172 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
2173 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
2174 }
2175
2176 /*
2177 * Temperature is only 23 bits, so sign extend out to 32.
2178 *
2179 * NOTE If we haven't received a statistics notification yet
2180 * with an updated temperature, use R4 provided to us in the
2181 * "initialize" ALIVE response.
2182 */
2183 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
2184 vt = sign_extend(R4, 23);
2185 else
2186 vt = sign_extend(
2187 le32_to_cpu(priv->statistics.general.temperature), 23);
2188
2189 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
2190 R1, R2, R3, vt);
2191
2192 if (R3 == R1) {
2193 IWL_ERROR("Calibration conflict R1 == R3\n");
2194 return -1;
2195 }
2196
2197 /* Calculate temperature in degrees Kelvin, adjust by 97%.
2198 * Add offset to center the adjustment around 0 degrees Centigrade. */
2199 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
2200 temperature /= (R3 - R1);
2201 temperature = (temperature * 97) / 100 +
2202 TEMPERATURE_CALIB_KELVIN_OFFSET;
2203
2204 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
2205 KELVIN_TO_CELSIUS(temperature));
2206
2207 return temperature;
2208 }
2209
2210 /* Adjust Txpower only if temperature variance is greater than threshold. */
2211 #define IWL_TEMPERATURE_THRESHOLD 3
2212
2213 /**
2214 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
2215 *
2216 * If the temperature changed has changed sufficiently, then a recalibration
2217 * is needed.
2218 *
2219 * Assumes caller will replace priv->last_temperature once calibration
2220 * executed.
2221 */
2222 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
2223 {
2224 int temp_diff;
2225
2226 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
2227 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
2228 return 0;
2229 }
2230
2231 temp_diff = priv->temperature - priv->last_temperature;
2232
2233 /* get absolute value */
2234 if (temp_diff < 0) {
2235 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
2236 temp_diff = -temp_diff;
2237 } else if (temp_diff == 0)
2238 IWL_DEBUG_POWER("Same temp, \n");
2239 else
2240 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
2241
2242 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
2243 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
2244 return 0;
2245 }
2246
2247 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
2248
2249 return 1;
2250 }
2251
2252 /* Calculate noise level, based on measurements during network silence just
2253 * before arriving beacon. This measurement can be done only if we know
2254 * exactly when to expect beacons, therefore only when we're associated. */
2255 static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
2256 {
2257 struct statistics_rx_non_phy *rx_info
2258 = &(priv->statistics.rx.general);
2259 int num_active_rx = 0;
2260 int total_silence = 0;
2261 int bcn_silence_a =
2262 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
2263 int bcn_silence_b =
2264 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
2265 int bcn_silence_c =
2266 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
2267
2268 if (bcn_silence_a) {
2269 total_silence += bcn_silence_a;
2270 num_active_rx++;
2271 }
2272 if (bcn_silence_b) {
2273 total_silence += bcn_silence_b;
2274 num_active_rx++;
2275 }
2276 if (bcn_silence_c) {
2277 total_silence += bcn_silence_c;
2278 num_active_rx++;
2279 }
2280
2281 /* Average among active antennas */
2282 if (num_active_rx)
2283 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
2284 else
2285 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2286
2287 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
2288 bcn_silence_a, bcn_silence_b, bcn_silence_c,
2289 priv->last_rx_noise);
2290 }
2291
2292 void iwl4965_hw_rx_statistics(struct iwl_priv *priv,
2293 struct iwl_rx_mem_buffer *rxb)
2294 {
2295 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2296 int change;
2297 s32 temp;
2298
2299 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
2300 (int)sizeof(priv->statistics), pkt->len);
2301
2302 change = ((priv->statistics.general.temperature !=
2303 pkt->u.stats.general.temperature) ||
2304 ((priv->statistics.flag &
2305 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
2306 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
2307
2308 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
2309
2310 set_bit(STATUS_STATISTICS, &priv->status);
2311
2312 /* Reschedule the statistics timer to occur in
2313 * REG_RECALIB_PERIOD seconds to ensure we get a
2314 * thermal update even if the uCode doesn't give
2315 * us one */
2316 mod_timer(&priv->statistics_periodic, jiffies +
2317 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
2318
2319 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2320 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
2321 iwl4965_rx_calc_noise(priv);
2322 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
2323 queue_work(priv->workqueue, &priv->sensitivity_work);
2324 #endif
2325 }
2326
2327 iwl_leds_background(priv);
2328
2329 /* If the hardware hasn't reported a change in
2330 * temperature then don't bother computing a
2331 * calibrated temperature value */
2332 if (!change)
2333 return;
2334
2335 temp = iwl4965_get_temperature(priv);
2336 if (temp < 0)
2337 return;
2338
2339 if (priv->temperature != temp) {
2340 if (priv->temperature)
2341 IWL_DEBUG_TEMP("Temperature changed "
2342 "from %dC to %dC\n",
2343 KELVIN_TO_CELSIUS(priv->temperature),
2344 KELVIN_TO_CELSIUS(temp));
2345 else
2346 IWL_DEBUG_TEMP("Temperature "
2347 "initialized to %dC\n",
2348 KELVIN_TO_CELSIUS(temp));
2349 }
2350
2351 priv->temperature = temp;
2352 set_bit(STATUS_TEMPERATURE, &priv->status);
2353
2354 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2355 iwl4965_is_temp_calib_needed(priv))
2356 queue_work(priv->workqueue, &priv->txpower_work);
2357 }
2358
2359 static void iwl4965_add_radiotap(struct iwl_priv *priv,
2360 struct sk_buff *skb,
2361 struct iwl4965_rx_phy_res *rx_start,
2362 struct ieee80211_rx_status *stats,
2363 u32 ampdu_status)
2364 {
2365 s8 signal = stats->ssi;
2366 s8 noise = 0;
2367 int rate = stats->rate_idx;
2368 u64 tsf = stats->mactime;
2369 __le16 antenna;
2370 __le16 phy_flags_hw = rx_start->phy_flags;
2371 struct iwl4965_rt_rx_hdr {
2372 struct ieee80211_radiotap_header rt_hdr;
2373 __le64 rt_tsf; /* TSF */
2374 u8 rt_flags; /* radiotap packet flags */
2375 u8 rt_rate; /* rate in 500kb/s */
2376 __le16 rt_channelMHz; /* channel in MHz */
2377 __le16 rt_chbitmask; /* channel bitfield */
2378 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
2379 s8 rt_dbmnoise;
2380 u8 rt_antenna; /* antenna number */
2381 } __attribute__ ((packed)) *iwl4965_rt;
2382
2383 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
2384 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
2385 if (net_ratelimit())
2386 printk(KERN_ERR "not enough headroom [%d] for "
2387 "radiotap head [%zd]\n",
2388 skb_headroom(skb), sizeof(*iwl4965_rt));
2389 return;
2390 }
2391
2392 /* put radiotap header in front of 802.11 header and data */
2393 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
2394
2395 /* initialise radiotap header */
2396 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
2397 iwl4965_rt->rt_hdr.it_pad = 0;
2398
2399 /* total header + data */
2400 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
2401 &iwl4965_rt->rt_hdr.it_len);
2402
2403 /* Indicate all the fields we add to the radiotap header */
2404 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
2405 (1 << IEEE80211_RADIOTAP_FLAGS) |
2406 (1 << IEEE80211_RADIOTAP_RATE) |
2407 (1 << IEEE80211_RADIOTAP_CHANNEL) |
2408 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
2409 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
2410 (1 << IEEE80211_RADIOTAP_ANTENNA)),
2411 &iwl4965_rt->rt_hdr.it_present);
2412
2413 /* Zero the flags, we'll add to them as we go */
2414 iwl4965_rt->rt_flags = 0;
2415
2416 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
2417
2418 iwl4965_rt->rt_dbmsignal = signal;
2419 iwl4965_rt->rt_dbmnoise = noise;
2420
2421 /* Convert the channel frequency and set the flags */
2422 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
2423 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
2424 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2425 IEEE80211_CHAN_5GHZ),
2426 &iwl4965_rt->rt_chbitmask);
2427 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2428 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2429 IEEE80211_CHAN_2GHZ),
2430 &iwl4965_rt->rt_chbitmask);
2431 else /* 802.11g */
2432 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2433 IEEE80211_CHAN_2GHZ),
2434 &iwl4965_rt->rt_chbitmask);
2435
2436 if (rate == -1)
2437 iwl4965_rt->rt_rate = 0;
2438 else
2439 iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
2440
2441 /*
2442 * "antenna number"
2443 *
2444 * It seems that the antenna field in the phy flags value
2445 * is actually a bitfield. This is undefined by radiotap,
2446 * it wants an actual antenna number but I always get "7"
2447 * for most legacy frames I receive indicating that the
2448 * same frame was received on all three RX chains.
2449 *
2450 * I think this field should be removed in favour of a
2451 * new 802.11n radiotap field "RX chains" that is defined
2452 * as a bitmask.
2453 */
2454 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2455 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
2456
2457 /* set the preamble flag if appropriate */
2458 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2459 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2460
2461 stats->flag |= RX_FLAG_RADIOTAP;
2462 }
2463
2464 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2465 {
2466 /* 0 - mgmt, 1 - cnt, 2 - data */
2467 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2468 priv->rx_stats[idx].cnt++;
2469 priv->rx_stats[idx].bytes += len;
2470 }
2471
2472 /*
2473 * returns non-zero if packet should be dropped
2474 */
2475 static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2476 struct ieee80211_hdr *hdr,
2477 u32 decrypt_res,
2478 struct ieee80211_rx_status *stats)
2479 {
2480 u16 fc = le16_to_cpu(hdr->frame_control);
2481
2482 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2483 return 0;
2484
2485 if (!(fc & IEEE80211_FCTL_PROTECTED))
2486 return 0;
2487
2488 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2489 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2490 case RX_RES_STATUS_SEC_TYPE_TKIP:
2491 /* The uCode has got a bad phase 1 Key, pushes the packet.
2492 * Decryption will be done in SW. */
2493 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2494 RX_RES_STATUS_BAD_KEY_TTAK)
2495 break;
2496
2497 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2498 RX_RES_STATUS_BAD_ICV_MIC) {
2499 /* bad ICV, the packet is destroyed since the
2500 * decryption is inplace, drop it */
2501 IWL_DEBUG_RX("Packet destroyed\n");
2502 return -1;
2503 }
2504 case RX_RES_STATUS_SEC_TYPE_WEP:
2505 case RX_RES_STATUS_SEC_TYPE_CCMP:
2506 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2507 RX_RES_STATUS_DECRYPT_OK) {
2508 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2509 stats->flag |= RX_FLAG_DECRYPTED;
2510 }
2511 break;
2512
2513 default:
2514 break;
2515 }
2516 return 0;
2517 }
2518
2519 static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
2520 {
2521 u32 decrypt_out = 0;
2522
2523 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2524 RX_RES_STATUS_STATION_FOUND)
2525 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2526 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2527
2528 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2529
2530 /* packet was not encrypted */
2531 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2532 RX_RES_STATUS_SEC_TYPE_NONE)
2533 return decrypt_out;
2534
2535 /* packet was encrypted with unknown alg */
2536 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2537 RX_RES_STATUS_SEC_TYPE_ERR)
2538 return decrypt_out;
2539
2540 /* decryption was not done in HW */
2541 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2542 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2543 return decrypt_out;
2544
2545 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2546
2547 case RX_RES_STATUS_SEC_TYPE_CCMP:
2548 /* alg is CCM: check MIC only */
2549 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2550 /* Bad MIC */
2551 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2552 else
2553 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2554
2555 break;
2556
2557 case RX_RES_STATUS_SEC_TYPE_TKIP:
2558 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2559 /* Bad TTAK */
2560 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2561 break;
2562 }
2563 /* fall through if TTAK OK */
2564 default:
2565 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2566 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2567 else
2568 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2569 break;
2570 };
2571
2572 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
2573 decrypt_in, decrypt_out);
2574
2575 return decrypt_out;
2576 }
2577
2578 static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
2579 int include_phy,
2580 struct iwl_rx_mem_buffer *rxb,
2581 struct ieee80211_rx_status *stats)
2582 {
2583 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2584 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2585 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2586 struct ieee80211_hdr *hdr;
2587 u16 len;
2588 __le32 *rx_end;
2589 unsigned int skblen;
2590 u32 ampdu_status;
2591 u32 ampdu_status_legacy;
2592
2593 if (!include_phy && priv->last_phy_res[0])
2594 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2595
2596 if (!rx_start) {
2597 IWL_ERROR("MPDU frame without a PHY data\n");
2598 return;
2599 }
2600 if (include_phy) {
2601 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
2602 rx_start->cfg_phy_cnt);
2603
2604 len = le16_to_cpu(rx_start->byte_count);
2605
2606 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
2607 sizeof(struct iwl4965_rx_phy_res) +
2608 rx_start->cfg_phy_cnt + len);
2609
2610 } else {
2611 struct iwl4965_rx_mpdu_res_start *amsdu =
2612 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2613
2614 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
2615 sizeof(struct iwl4965_rx_mpdu_res_start));
2616 len = le16_to_cpu(amsdu->byte_count);
2617 rx_start->byte_count = amsdu->byte_count;
2618 rx_end = (__le32 *) (((u8 *) hdr) + len);
2619 }
2620 /* In monitor mode allow 802.11 ACk frames (10 bytes) */
2621 if (len > priv->hw_params.max_pkt_size ||
2622 len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
2623 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
2624 return;
2625 }
2626
2627 ampdu_status = le32_to_cpu(*rx_end);
2628 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
2629
2630 if (!include_phy) {
2631 /* New status scheme, need to translate */
2632 ampdu_status_legacy = ampdu_status;
2633 ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
2634 }
2635
2636 /* start from MAC */
2637 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
2638 skb_put(rxb->skb, len); /* end where data ends */
2639
2640 /* We only process data packets if the interface is open */
2641 if (unlikely(!priv->is_open)) {
2642 IWL_DEBUG_DROP_LIMIT
2643 ("Dropping packet while interface is not open.\n");
2644 return;
2645 }
2646
2647 stats->flag = 0;
2648 hdr = (struct ieee80211_hdr *)rxb->skb->data;
2649
2650 /* in case of HW accelerated crypto and bad decryption, drop */
2651 if (!priv->hw_params.sw_crypto &&
2652 iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
2653 return;
2654
2655 if (priv->add_radiotap)
2656 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
2657
2658 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
2659 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
2660 priv->alloc_rxb_skb--;
2661 rxb->skb = NULL;
2662 }
2663
2664 /* Calc max signal level (dBm) among 3 possible receivers */
2665 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2666 struct iwl4965_rx_phy_res *rx_resp)
2667 {
2668 /* data from PHY/DSP regarding signal strength, etc.,
2669 * contents are always there, not configurable by host. */
2670 struct iwl4965_rx_non_cfg_phy *ncphy =
2671 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
2672 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
2673 >> IWL_AGC_DB_POS;
2674
2675 u32 valid_antennae =
2676 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
2677 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
2678 u8 max_rssi = 0;
2679 u32 i;
2680
2681 /* Find max rssi among 3 possible receivers.
2682 * These values are measured by the digital signal processor (DSP).
2683 * They should stay fairly constant even as the signal strength varies,
2684 * if the radio's automatic gain control (AGC) is working right.
2685 * AGC value (see below) will provide the "interesting" info. */
2686 for (i = 0; i < 3; i++)
2687 if (valid_antennae & (1 << i))
2688 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2689
2690 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2691 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2692 max_rssi, agc);
2693
2694 /* dBm = max_rssi dB - agc dB - constant.
2695 * Higher AGC (higher radio gain) means lower signal. */
2696 return (max_rssi - agc - IWL_RSSI_OFFSET);
2697 }
2698
2699 static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
2700 {
2701 unsigned long flags;
2702
2703 spin_lock_irqsave(&priv->sta_lock, flags);
2704 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
2705 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
2706 priv->stations[sta_id].sta.sta.modify_mask = 0;
2707 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2708 spin_unlock_irqrestore(&priv->sta_lock, flags);
2709
2710 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
2711 }
2712
2713 static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
2714 {
2715 /* FIXME: need locking over ps_status ??? */
2716 u8 sta_id = iwl_find_station(priv, addr);
2717
2718 if (sta_id != IWL_INVALID_STATION) {
2719 u8 sta_awake = priv->stations[sta_id].
2720 ps_status == STA_PS_STATUS_WAKE;
2721
2722 if (sta_awake && ps_bit)
2723 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
2724 else if (!sta_awake && !ps_bit) {
2725 iwl4965_sta_modify_ps_wake(priv, sta_id);
2726 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
2727 }
2728 }
2729 }
2730 #ifdef CONFIG_IWLWIFI_DEBUG
2731
2732 /**
2733 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
2734 *
2735 * You may hack this function to show different aspects of received frames,
2736 * including selective frame dumps.
2737 * group100 parameter selects whether to show 1 out of 100 good frames.
2738 *
2739 * TODO: This was originally written for 3945, need to audit for
2740 * proper operation with 4965.
2741 */
2742 static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2743 struct iwl_rx_packet *pkt,
2744 struct ieee80211_hdr *header, int group100)
2745 {
2746 u32 to_us;
2747 u32 print_summary = 0;
2748 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
2749 u32 hundred = 0;
2750 u32 dataframe = 0;
2751 u16 fc;
2752 u16 seq_ctl;
2753 u16 channel;
2754 u16 phy_flags;
2755 int rate_sym;
2756 u16 length;
2757 u16 status;
2758 u16 bcn_tmr;
2759 u32 tsf_low;
2760 u64 tsf;
2761 u8 rssi;
2762 u8 agc;
2763 u16 sig_avg;
2764 u16 noise_diff;
2765 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
2766 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
2767 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
2768 u8 *data = IWL_RX_DATA(pkt);
2769
2770 if (likely(!(priv->debug_level & IWL_DL_RX)))
2771 return;
2772
2773 /* MAC header */
2774 fc = le16_to_cpu(header->frame_control);
2775 seq_ctl = le16_to_cpu(header->seq_ctrl);
2776
2777 /* metadata */
2778 channel = le16_to_cpu(rx_hdr->channel);
2779 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
2780 rate_sym = rx_hdr->rate;
2781 length = le16_to_cpu(rx_hdr->len);
2782
2783 /* end-of-frame status and timestamp */
2784 status = le32_to_cpu(rx_end->status);
2785 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
2786 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
2787 tsf = le64_to_cpu(rx_end->timestamp);
2788
2789 /* signal statistics */
2790 rssi = rx_stats->rssi;
2791 agc = rx_stats->agc;
2792 sig_avg = le16_to_cpu(rx_stats->sig_avg);
2793 noise_diff = le16_to_cpu(rx_stats->noise_diff);
2794
2795 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
2796
2797 /* if data frame is to us and all is good,
2798 * (optionally) print summary for only 1 out of every 100 */
2799 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
2800 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
2801 dataframe = 1;
2802 if (!group100)
2803 print_summary = 1; /* print each frame */
2804 else if (priv->framecnt_to_us < 100) {
2805 priv->framecnt_to_us++;
2806 print_summary = 0;
2807 } else {
2808 priv->framecnt_to_us = 0;
2809 print_summary = 1;
2810 hundred = 1;
2811 }
2812 } else {
2813 /* print summary for all other frames */
2814 print_summary = 1;
2815 }
2816
2817 if (print_summary) {
2818 char *title;
2819 int rate_idx;
2820 u32 bitrate;
2821
2822 if (hundred)
2823 title = "100Frames";
2824 else if (fc & IEEE80211_FCTL_RETRY)
2825 title = "Retry";
2826 else if (ieee80211_is_assoc_response(fc))
2827 title = "AscRsp";
2828 else if (ieee80211_is_reassoc_response(fc))
2829 title = "RasRsp";
2830 else if (ieee80211_is_probe_response(fc)) {
2831 title = "PrbRsp";
2832 print_dump = 1; /* dump frame contents */
2833 } else if (ieee80211_is_beacon(fc)) {
2834 title = "Beacon";
2835 print_dump = 1; /* dump frame contents */
2836 } else if (ieee80211_is_atim(fc))
2837 title = "ATIM";
2838 else if (ieee80211_is_auth(fc))
2839 title = "Auth";
2840 else if (ieee80211_is_deauth(fc))
2841 title = "DeAuth";
2842 else if (ieee80211_is_disassoc(fc))
2843 title = "DisAssoc";
2844 else
2845 title = "Frame";
2846
2847 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
2848 if (unlikely(rate_idx == -1))
2849 bitrate = 0;
2850 else
2851 bitrate = iwl4965_rates[rate_idx].ieee / 2;
2852
2853 /* print frame summary.
2854 * MAC addresses show just the last byte (for brevity),
2855 * but you can hack it to show more, if you'd like to. */
2856 if (dataframe)
2857 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
2858 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
2859 title, fc, header->addr1[5],
2860 length, rssi, channel, bitrate);
2861 else {
2862 /* src/dst addresses assume managed mode */
2863 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
2864 "src=0x%02x, rssi=%u, tim=%lu usec, "
2865 "phy=0x%02x, chnl=%d\n",
2866 title, fc, header->addr1[5],
2867 header->addr3[5], rssi,
2868 tsf_low - priv->scan_start_tsf,
2869 phy_flags, channel);
2870 }
2871 }
2872 if (print_dump)
2873 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
2874 }
2875 #else
2876 static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2877 struct iwl_rx_packet *pkt,
2878 struct ieee80211_hdr *header,
2879 int group100)
2880 {
2881 }
2882 #endif
2883
2884
2885
2886 /* Called for REPLY_RX (legacy ABG frames), or
2887 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
2888 static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
2889 struct iwl_rx_mem_buffer *rxb)
2890 {
2891 struct ieee80211_hdr *header;
2892 struct ieee80211_rx_status rx_status;
2893 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2894 /* Use phy data (Rx signal strength, etc.) contained within
2895 * this rx packet for legacy frames,
2896 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
2897 int include_phy = (pkt->hdr.cmd == REPLY_RX);
2898 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2899 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
2900 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2901 __le32 *rx_end;
2902 unsigned int len = 0;
2903 u16 fc;
2904 u8 network_packet;
2905
2906 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
2907 rx_status.freq =
2908 ieee80211_frequency_to_channel(le16_to_cpu(rx_start->channel));
2909 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
2910 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
2911 rx_status.rate_idx =
2912 iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
2913 if (rx_status.band == IEEE80211_BAND_5GHZ)
2914 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
2915
2916 rx_status.antenna = 0;
2917 rx_status.flag = 0;
2918
2919 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
2920 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
2921 rx_start->cfg_phy_cnt);
2922 return;
2923 }
2924
2925 if (!include_phy) {
2926 if (priv->last_phy_res[0])
2927 rx_start = (struct iwl4965_rx_phy_res *)
2928 &priv->last_phy_res[1];
2929 else
2930 rx_start = NULL;
2931 }
2932
2933 if (!rx_start) {
2934 IWL_ERROR("MPDU frame without a PHY data\n");
2935 return;
2936 }
2937
2938 if (include_phy) {
2939 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
2940 + rx_start->cfg_phy_cnt);
2941
2942 len = le16_to_cpu(rx_start->byte_count);
2943 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
2944 sizeof(struct iwl4965_rx_phy_res) + len);
2945 } else {
2946 struct iwl4965_rx_mpdu_res_start *amsdu =
2947 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2948
2949 header = (void *)(pkt->u.raw +
2950 sizeof(struct iwl4965_rx_mpdu_res_start));
2951 len = le16_to_cpu(amsdu->byte_count);
2952 rx_end = (__le32 *) (pkt->u.raw +
2953 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
2954 }
2955
2956 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
2957 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
2958 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
2959 le32_to_cpu(*rx_end));
2960 return;
2961 }
2962
2963 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
2964
2965 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
2966 rx_status.ssi = iwl4965_calc_rssi(priv, rx_start);
2967
2968 /* Meaningful noise values are available only from beacon statistics,
2969 * which are gathered only when associated, and indicate noise
2970 * only for the associated network channel ...
2971 * Ignore these noise values while scanning (other channels) */
2972 if (iwl_is_associated(priv) &&
2973 !test_bit(STATUS_SCANNING, &priv->status)) {
2974 rx_status.noise = priv->last_rx_noise;
2975 rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi,
2976 rx_status.noise);
2977 } else {
2978 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2979 rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi, 0);
2980 }
2981
2982 /* Reset beacon noise level if not associated. */
2983 if (!iwl_is_associated(priv))
2984 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2985
2986 /* Set "1" to report good data frames in groups of 100 */
2987 /* FIXME: need to optimze the call: */
2988 iwl4965_dbg_report_frame(priv, pkt, header, 1);
2989
2990 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
2991 rx_status.ssi, rx_status.noise, rx_status.signal,
2992 (unsigned long long)rx_status.mactime);
2993
2994
2995 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2996 iwl4965_handle_data_packet(priv, 1, include_phy,
2997 rxb, &rx_status);
2998 return;
2999 }
3000
3001 network_packet = iwl4965_is_network_packet(priv, header);
3002 if (network_packet) {
3003 priv->last_rx_rssi = rx_status.ssi;
3004 priv->last_beacon_time = priv->ucode_beacon_time;
3005 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
3006 }
3007
3008 fc = le16_to_cpu(header->frame_control);
3009 switch (fc & IEEE80211_FCTL_FTYPE) {
3010 case IEEE80211_FTYPE_MGMT:
3011 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3012 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3013 header->addr2);
3014 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
3015 break;
3016
3017 case IEEE80211_FTYPE_CTL:
3018 #ifdef CONFIG_IWL4965_HT
3019 switch (fc & IEEE80211_FCTL_STYPE) {
3020 case IEEE80211_STYPE_BACK_REQ:
3021 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
3022 iwl4965_handle_data_packet(priv, 0, include_phy,
3023 rxb, &rx_status);
3024 break;
3025 default:
3026 break;
3027 }
3028 #endif
3029 break;
3030
3031 case IEEE80211_FTYPE_DATA: {
3032 DECLARE_MAC_BUF(mac1);
3033 DECLARE_MAC_BUF(mac2);
3034 DECLARE_MAC_BUF(mac3);
3035
3036 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3037 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3038 header->addr2);
3039
3040 if (unlikely(!network_packet))
3041 IWL_DEBUG_DROP("Dropping (non network): "
3042 "%s, %s, %s\n",
3043 print_mac(mac1, header->addr1),
3044 print_mac(mac2, header->addr2),
3045 print_mac(mac3, header->addr3));
3046 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
3047 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
3048 print_mac(mac1, header->addr1),
3049 print_mac(mac2, header->addr2),
3050 print_mac(mac3, header->addr3));
3051 else
3052 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
3053 &rx_status);
3054 break;
3055 }
3056 default:
3057 break;
3058
3059 }
3060 }
3061
3062 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
3063 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
3064 static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
3065 struct iwl_rx_mem_buffer *rxb)
3066 {
3067 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3068 priv->last_phy_res[0] = 1;
3069 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
3070 sizeof(struct iwl4965_rx_phy_res));
3071 }
3072 static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
3073 struct iwl_rx_mem_buffer *rxb)
3074
3075 {
3076 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3077 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3078 struct iwl4965_missed_beacon_notif *missed_beacon;
3079
3080 missed_beacon = &pkt->u.missed_beacon;
3081 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
3082 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
3083 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
3084 le32_to_cpu(missed_beacon->total_missed_becons),
3085 le32_to_cpu(missed_beacon->num_recvd_beacons),
3086 le32_to_cpu(missed_beacon->num_expected_beacons));
3087 if (!test_bit(STATUS_SCANNING, &priv->status))
3088 iwl_init_sensitivity(priv);
3089 }
3090 #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
3091 }
3092 #ifdef CONFIG_IWL4965_HT
3093
3094 /**
3095 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
3096 */
3097 static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv,
3098 int sta_id, int tid)
3099 {
3100 unsigned long flags;
3101
3102 /* Remove "disable" flag, to enable Tx for this TID */
3103 spin_lock_irqsave(&priv->sta_lock, flags);
3104 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
3105 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
3106 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3107 spin_unlock_irqrestore(&priv->sta_lock, flags);
3108
3109 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3110 }
3111
3112 /**
3113 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
3114 *
3115 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
3116 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
3117 */
3118 static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
3119 struct iwl_ht_agg *agg,
3120 struct iwl4965_compressed_ba_resp*
3121 ba_resp)
3122
3123 {
3124 int i, sh, ack;
3125 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
3126 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3127 u64 bitmap;
3128 int successes = 0;
3129 struct ieee80211_tx_status *tx_status;
3130
3131 if (unlikely(!agg->wait_for_ba)) {
3132 IWL_ERROR("Received BA when not expected\n");
3133 return -EINVAL;
3134 }
3135
3136 /* Mark that the expected block-ack response arrived */
3137 agg->wait_for_ba = 0;
3138 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
3139
3140 /* Calculate shift to align block-ack bits with our Tx window bits */
3141 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
3142 if (sh < 0) /* tbw something is wrong with indices */
3143 sh += 0x100;
3144
3145 /* don't use 64-bit values for now */
3146 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
3147
3148 if (agg->frame_count > (64 - sh)) {
3149 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
3150 return -1;
3151 }
3152
3153 /* check for success or failure according to the
3154 * transmitted bitmap and block-ack bitmap */
3155 bitmap &= agg->bitmap;
3156
3157 /* For each frame attempted in aggregation,
3158 * update driver's record of tx frame's status. */
3159 for (i = 0; i < agg->frame_count ; i++) {
3160 ack = bitmap & (1 << i);
3161 successes += !!ack;
3162 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
3163 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
3164 agg->start_idx + i);
3165 }
3166
3167 tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
3168 tx_status->flags = IEEE80211_TX_STATUS_ACK;
3169 tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
3170 tx_status->ampdu_ack_map = successes;
3171 tx_status->ampdu_ack_len = agg->frame_count;
3172 iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags,
3173 &tx_status->control);
3174
3175 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
3176
3177 return 0;
3178 }
3179
3180 /**
3181 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
3182 */
3183 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
3184 u16 txq_id)
3185 {
3186 /* Simply stop the queue, but don't change any configuration;
3187 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
3188 iwl_write_prph(priv,
3189 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
3190 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
3191 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
3192 }
3193
3194 /**
3195 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
3196 * priv->lock must be held by the caller
3197 */
3198 static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
3199 u16 ssn_idx, u8 tx_fifo)
3200 {
3201 int ret = 0;
3202
3203 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
3204 IWL_WARNING("queue number too small: %d, must be > %d\n",
3205 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3206 return -EINVAL;
3207 }
3208
3209 ret = iwl_grab_nic_access(priv);
3210 if (ret)
3211 return ret;
3212
3213 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3214
3215 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3216
3217 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3218 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3219 /* supposes that ssn_idx is valid (!= 0xFFF) */
3220 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3221
3222 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3223 iwl4965_txq_ctx_deactivate(priv, txq_id);
3224 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
3225
3226 iwl_release_nic_access(priv);
3227
3228 return 0;
3229 }
3230
3231 int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
3232 u8 tid, int txq_id)
3233 {
3234 struct iwl4965_queue *q = &priv->txq[txq_id].q;
3235 u8 *addr = priv->stations[sta_id].sta.sta.addr;
3236 struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
3237
3238 switch (priv->stations[sta_id].tid[tid].agg.state) {
3239 case IWL_EMPTYING_HW_QUEUE_DELBA:
3240 /* We are reclaiming the last packet of the */
3241 /* aggregated HW queue */
3242 if (txq_id == tid_data->agg.txq_id &&
3243 q->read_ptr == q->write_ptr) {
3244 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
3245 int tx_fifo = default_tid_to_tx_fifo[tid];
3246 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
3247 iwl4965_tx_queue_agg_disable(priv, txq_id,
3248 ssn, tx_fifo);
3249 tid_data->agg.state = IWL_AGG_OFF;
3250 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3251 }
3252 break;
3253 case IWL_EMPTYING_HW_QUEUE_ADDBA:
3254 /* We are reclaiming the last packet of the queue */
3255 if (tid_data->tfds_in_queue == 0) {
3256 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
3257 tid_data->agg.state = IWL_AGG_ON;
3258 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3259 }
3260 break;
3261 }
3262 return 0;
3263 }
3264
3265 /**
3266 * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
3267 * @index -- current index
3268 * @n_bd -- total number of entries in queue (s/b power of 2)
3269 */
3270 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
3271 {
3272 return (index == 0) ? n_bd - 1 : index - 1;
3273 }
3274
3275 /**
3276 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
3277 *
3278 * Handles block-acknowledge notification from device, which reports success
3279 * of frames sent via aggregation.
3280 */
3281 static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
3282 struct iwl_rx_mem_buffer *rxb)
3283 {
3284 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3285 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
3286 int index;
3287 struct iwl4965_tx_queue *txq = NULL;
3288 struct iwl_ht_agg *agg;
3289 DECLARE_MAC_BUF(mac);
3290
3291 /* "flow" corresponds to Tx queue */
3292 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3293
3294 /* "ssn" is start of block-ack Tx window, corresponds to index
3295 * (in Tx queue's circular buffer) of first TFD/frame in window */
3296 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
3297
3298 if (scd_flow >= priv->hw_params.max_txq_num) {
3299 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
3300 return;
3301 }
3302
3303 txq = &priv->txq[scd_flow];
3304 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
3305
3306 /* Find index just before block-ack window */
3307 index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
3308
3309 /* TODO: Need to get this copy more safely - now good for debug */
3310
3311 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
3312 "sta_id = %d\n",
3313 agg->wait_for_ba,
3314 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
3315 ba_resp->sta_id);
3316 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
3317 "%d, scd_ssn = %d\n",
3318 ba_resp->tid,
3319 ba_resp->seq_ctl,
3320 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
3321 ba_resp->scd_flow,
3322 ba_resp->scd_ssn);
3323 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
3324 agg->start_idx,
3325 (unsigned long long)agg->bitmap);
3326
3327 /* Update driver's record of ACK vs. not for each frame in window */
3328 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
3329
3330 /* Release all TFDs before the SSN, i.e. all TFDs in front of
3331 * block-ack window (we assume that they've been successfully
3332 * transmitted ... if not, it's too late anyway). */
3333 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
3334 /* calculate mac80211 ampdu sw queue to wake */
3335 int ampdu_q =
3336 scd_flow - IWL_BACK_QUEUE_FIRST_ID + priv->hw->queues;
3337 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
3338 priv->stations[ba_resp->sta_id].
3339 tid[ba_resp->tid].tfds_in_queue -= freed;
3340 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3341 priv->mac80211_registered &&
3342 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3343 ieee80211_wake_queue(priv->hw, ampdu_q);
3344 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
3345 ba_resp->tid, scd_flow);
3346 }
3347 }
3348
3349 /**
3350 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
3351 */
3352 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
3353 u16 txq_id)
3354 {
3355 u32 tbl_dw_addr;
3356 u32 tbl_dw;
3357 u16 scd_q2ratid;
3358
3359 scd_q2ratid = ra_tid & IWL49_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
3360
3361 tbl_dw_addr = priv->scd_base_addr +
3362 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
3363
3364 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
3365
3366 if (txq_id & 0x1)
3367 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
3368 else
3369 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
3370
3371 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
3372
3373 return 0;
3374 }
3375
3376
3377 /**
3378 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
3379 *
3380 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
3381 * i.e. it must be one of the higher queues used for aggregation
3382 */
3383 static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
3384 int tx_fifo, int sta_id, int tid,
3385 u16 ssn_idx)
3386 {
3387 unsigned long flags;
3388 int rc;
3389 u16 ra_tid;
3390
3391 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
3392 IWL_WARNING("queue number too small: %d, must be > %d\n",
3393 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3394
3395 ra_tid = BUILD_RAxTID(sta_id, tid);
3396
3397 /* Modify device's station table to Tx this TID */
3398 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
3399
3400 spin_lock_irqsave(&priv->lock, flags);
3401 rc = iwl_grab_nic_access(priv);
3402 if (rc) {
3403 spin_unlock_irqrestore(&priv->lock, flags);
3404 return rc;
3405 }
3406
3407 /* Stop this Tx queue before configuring it */
3408 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3409
3410 /* Map receiver-address / traffic-ID to this queue */
3411 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
3412
3413 /* Set this queue as a chain-building queue */
3414 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3415
3416 /* Place first TFD at index corresponding to start sequence number.
3417 * Assumes that ssn_idx is valid (!= 0xFFF) */
3418 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3419 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3420 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3421
3422 /* Set up Tx window size and frame limit for this queue */
3423 iwl_write_targ_mem(priv,
3424 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
3425 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
3426 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
3427
3428 iwl_write_targ_mem(priv, priv->scd_base_addr +
3429 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
3430 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
3431 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
3432
3433 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3434
3435 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
3436 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
3437
3438 iwl_release_nic_access(priv);
3439 spin_unlock_irqrestore(&priv->lock, flags);
3440
3441 return 0;
3442 }
3443
3444 #endif /* CONFIG_IWL4965_HT */
3445
3446 /**
3447 * iwl4965_add_station - Initialize a station's hardware rate table
3448 *
3449 * The uCode's station table contains a table of fallback rates
3450 * for automatic fallback during transmission.
3451 *
3452 * NOTE: This sets up a default set of values. These will be replaced later
3453 * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
3454 * rc80211_simple.
3455 *
3456 * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
3457 * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
3458 * which requires station table entry to exist).
3459 */
3460 void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
3461 {
3462 int i, r;
3463 struct iwl_link_quality_cmd link_cmd = {
3464 .reserved1 = 0,
3465 };
3466 u16 rate_flags;
3467
3468 /* Set up the rate scaling to start at selected rate, fall back
3469 * all the way down to 1M in IEEE order, and then spin on 1M */
3470 if (is_ap)
3471 r = IWL_RATE_54M_INDEX;
3472 else if (priv->band == IEEE80211_BAND_5GHZ)
3473 r = IWL_RATE_6M_INDEX;
3474 else
3475 r = IWL_RATE_1M_INDEX;
3476
3477 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
3478 rate_flags = 0;
3479 if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
3480 rate_flags |= RATE_MCS_CCK_MSK;
3481
3482 /* Use Tx antenna B only */
3483 rate_flags |= RATE_MCS_ANT_B_MSK; /*FIXME:RS*/
3484
3485 link_cmd.rs_table[i].rate_n_flags =
3486 iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
3487 r = iwl4965_get_prev_ieee_rate(r);
3488 }
3489
3490 link_cmd.general_params.single_stream_ant_msk = 2;
3491 link_cmd.general_params.dual_stream_ant_msk = 3;
3492 link_cmd.agg_params.agg_dis_start_th = 3;
3493 link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
3494
3495 /* Update the rate scaling for control frame Tx to AP */
3496 link_cmd.sta_id = is_ap ? IWL_AP_ID : priv->hw_params.bcast_sta_id;
3497
3498 iwl_send_cmd_pdu_async(priv, REPLY_TX_LINK_QUALITY_CMD,
3499 sizeof(link_cmd), &link_cmd, NULL);
3500 }
3501
3502 #ifdef CONFIG_IWL4965_HT
3503
3504 void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index,
3505 struct ieee80211_ht_info *sta_ht_inf)
3506 {
3507 __le32 sta_flags;
3508 u8 mimo_ps_mode;
3509
3510 if (!sta_ht_inf || !sta_ht_inf->ht_supported)
3511 goto done;
3512
3513 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
3514
3515 sta_flags = priv->stations[index].sta.station_flags;
3516
3517 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
3518
3519 switch (mimo_ps_mode) {
3520 case WLAN_HT_CAP_MIMO_PS_STATIC:
3521 sta_flags |= STA_FLG_MIMO_DIS_MSK;
3522 break;
3523 case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
3524 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
3525 break;
3526 case WLAN_HT_CAP_MIMO_PS_DISABLED:
3527 break;
3528 default:
3529 IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
3530 break;
3531 }
3532
3533 sta_flags |= cpu_to_le32(
3534 (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
3535
3536 sta_flags |= cpu_to_le32(
3537 (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
3538
3539 if (iwl_is_fat_tx_allowed(priv, sta_ht_inf))
3540 sta_flags |= STA_FLG_FAT_EN_MSK;
3541 else
3542 sta_flags &= ~STA_FLG_FAT_EN_MSK;
3543
3544 priv->stations[index].sta.station_flags = sta_flags;
3545 done:
3546 return;
3547 }
3548
3549 static int iwl4965_rx_agg_start(struct iwl_priv *priv,
3550 const u8 *addr, int tid, u16 ssn)
3551 {
3552 unsigned long flags;
3553 int sta_id;
3554
3555 sta_id = iwl_find_station(priv, addr);
3556 if (sta_id == IWL_INVALID_STATION)
3557 return -ENXIO;
3558
3559 spin_lock_irqsave(&priv->sta_lock, flags);
3560 priv->stations[sta_id].sta.station_flags_msk = 0;
3561 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3562 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
3563 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3564 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3565 spin_unlock_irqrestore(&priv->sta_lock, flags);
3566
3567 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3568 CMD_ASYNC);
3569 }
3570
3571 static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
3572 const u8 *addr, int tid)
3573 {
3574 unsigned long flags;
3575 int sta_id;
3576
3577 sta_id = iwl_find_station(priv, addr);
3578 if (sta_id == IWL_INVALID_STATION)
3579 return -ENXIO;
3580
3581 spin_lock_irqsave(&priv->sta_lock, flags);
3582 priv->stations[sta_id].sta.station_flags_msk = 0;
3583 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3584 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
3585 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3586 spin_unlock_irqrestore(&priv->sta_lock, flags);
3587
3588 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3589 CMD_ASYNC);
3590 }
3591
3592 /*
3593 * Find first available (lowest unused) Tx Queue, mark it "active".
3594 * Called only when finding queue for aggregation.
3595 * Should never return anything < 7, because they should already
3596 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
3597 */
3598 static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv)
3599 {
3600 int txq_id;
3601
3602 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
3603 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
3604 return txq_id;
3605 return -1;
3606 }
3607
3608 static int iwl4965_tx_agg_start(struct ieee80211_hw *hw, const u8 *ra,
3609 u16 tid, u16 *start_seq_num)
3610 {
3611 struct iwl_priv *priv = hw->priv;
3612 int sta_id;
3613 int tx_fifo;
3614 int txq_id;
3615 int ssn = -1;
3616 int ret = 0;
3617 unsigned long flags;
3618 struct iwl_tid_data *tid_data;
3619 DECLARE_MAC_BUF(mac);
3620
3621 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3622 tx_fifo = default_tid_to_tx_fifo[tid];
3623 else
3624 return -EINVAL;
3625
3626 IWL_WARNING("%s on ra = %s tid = %d\n",
3627 __func__, print_mac(mac, ra), tid);
3628
3629 sta_id = iwl_find_station(priv, ra);
3630 if (sta_id == IWL_INVALID_STATION)
3631 return -ENXIO;
3632
3633 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
3634 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
3635 return -ENXIO;
3636 }
3637
3638 txq_id = iwl4965_txq_ctx_activate_free(priv);
3639 if (txq_id == -1)
3640 return -ENXIO;
3641
3642 spin_lock_irqsave(&priv->sta_lock, flags);
3643 tid_data = &priv->stations[sta_id].tid[tid];
3644 ssn = SEQ_TO_SN(tid_data->seq_number);
3645 tid_data->agg.txq_id = txq_id;
3646 spin_unlock_irqrestore(&priv->sta_lock, flags);
3647
3648 *start_seq_num = ssn;
3649 ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
3650 sta_id, tid, ssn);
3651 if (ret)
3652 return ret;
3653
3654 ret = 0;
3655 if (tid_data->tfds_in_queue == 0) {
3656 printk(KERN_ERR "HW queue is empty\n");
3657 tid_data->agg.state = IWL_AGG_ON;
3658 ieee80211_start_tx_ba_cb_irqsafe(hw, ra, tid);
3659 } else {
3660 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
3661 tid_data->tfds_in_queue);
3662 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
3663 }
3664 return ret;
3665 }
3666
3667 static int iwl4965_tx_agg_stop(struct ieee80211_hw *hw, const u8 *ra, u16 tid)
3668 {
3669 struct iwl_priv *priv = hw->priv;
3670 int tx_fifo_id, txq_id, sta_id, ssn = -1;
3671 struct iwl_tid_data *tid_data;
3672 int ret, write_ptr, read_ptr;
3673 unsigned long flags;
3674 DECLARE_MAC_BUF(mac);
3675
3676 if (!ra) {
3677 IWL_ERROR("ra = NULL\n");
3678 return -EINVAL;
3679 }
3680
3681 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3682 tx_fifo_id = default_tid_to_tx_fifo[tid];
3683 else
3684 return -EINVAL;
3685
3686 sta_id = iwl_find_station(priv, ra);
3687
3688 if (sta_id == IWL_INVALID_STATION)
3689 return -ENXIO;
3690
3691 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
3692 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
3693
3694 tid_data = &priv->stations[sta_id].tid[tid];
3695 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
3696 txq_id = tid_data->agg.txq_id;
3697 write_ptr = priv->txq[txq_id].q.write_ptr;
3698 read_ptr = priv->txq[txq_id].q.read_ptr;
3699
3700 /* The queue is not empty */
3701 if (write_ptr != read_ptr) {
3702 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
3703 priv->stations[sta_id].tid[tid].agg.state =
3704 IWL_EMPTYING_HW_QUEUE_DELBA;
3705 return 0;
3706 }
3707
3708 IWL_DEBUG_HT("HW queue is empty\n");
3709 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
3710
3711 spin_lock_irqsave(&priv->lock, flags);
3712 ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
3713 spin_unlock_irqrestore(&priv->lock, flags);
3714
3715 if (ret)
3716 return ret;
3717
3718 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid);
3719
3720 return 0;
3721 }
3722
3723 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3724 enum ieee80211_ampdu_mlme_action action,
3725 const u8 *addr, u16 tid, u16 *ssn)
3726 {
3727 struct iwl_priv *priv = hw->priv;
3728 DECLARE_MAC_BUF(mac);
3729
3730 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3731 print_mac(mac, addr), tid);
3732
3733 switch (action) {
3734 case IEEE80211_AMPDU_RX_START:
3735 IWL_DEBUG_HT("start Rx\n");
3736 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
3737 case IEEE80211_AMPDU_RX_STOP:
3738 IWL_DEBUG_HT("stop Rx\n");
3739 return iwl4965_rx_agg_stop(priv, addr, tid);
3740 case IEEE80211_AMPDU_TX_START:
3741 IWL_DEBUG_HT("start Tx\n");
3742 return iwl4965_tx_agg_start(hw, addr, tid, ssn);
3743 case IEEE80211_AMPDU_TX_STOP:
3744 IWL_DEBUG_HT("stop Tx\n");
3745 return iwl4965_tx_agg_stop(hw, addr, tid);
3746 default:
3747 IWL_DEBUG_HT("unknown\n");
3748 return -EINVAL;
3749 break;
3750 }
3751 return 0;
3752 }
3753 #endif /* CONFIG_IWL4965_HT */
3754
3755
3756 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
3757 {
3758 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
3759 addsta->mode = cmd->mode;
3760 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
3761 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
3762 addsta->station_flags = cmd->station_flags;
3763 addsta->station_flags_msk = cmd->station_flags_msk;
3764 addsta->tid_disable_tx = cmd->tid_disable_tx;
3765 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
3766 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
3767 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
3768 addsta->reserved1 = __constant_cpu_to_le16(0);
3769 addsta->reserved2 = __constant_cpu_to_le32(0);
3770
3771 return (u16)sizeof(struct iwl4965_addsta_cmd);
3772 }
3773 /* Set up 4965-specific Rx frame reply handlers */
3774 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
3775 {
3776 /* Legacy Rx frames */
3777 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
3778
3779 /* High-throughput (HT) Rx frames */
3780 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
3781 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
3782
3783 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
3784 iwl4965_rx_missed_beacon_notif;
3785
3786 #ifdef CONFIG_IWL4965_HT
3787 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
3788 #endif /* CONFIG_IWL4965_HT */
3789 }
3790
3791 void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
3792 {
3793 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
3794 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3795 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
3796 #endif
3797 init_timer(&priv->statistics_periodic);
3798 priv->statistics_periodic.data = (unsigned long)priv;
3799 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
3800 }
3801
3802 void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
3803 {
3804 del_timer_sync(&priv->statistics_periodic);
3805
3806 cancel_delayed_work(&priv->init_alive_start);
3807 }
3808
3809
3810 static struct iwl_hcmd_ops iwl4965_hcmd = {
3811 .rxon_assoc = iwl4965_send_rxon_assoc,
3812 };
3813
3814 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
3815 .enqueue_hcmd = iwl4965_enqueue_hcmd,
3816 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
3817 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3818 .chain_noise_reset = iwl4965_chain_noise_reset,
3819 .gain_computation = iwl4965_gain_computation,
3820 #endif
3821 };
3822
3823 static struct iwl_lib_ops iwl4965_lib = {
3824 .set_hw_params = iwl4965_hw_set_hw_params,
3825 .alloc_shared_mem = iwl4965_alloc_shared_mem,
3826 .free_shared_mem = iwl4965_free_shared_mem,
3827 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
3828 .disable_tx_fifo = iwl4965_disable_tx_fifo,
3829 .rx_handler_setup = iwl4965_rx_handler_setup,
3830 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
3831 .alive_notify = iwl4965_alive_notify,
3832 .init_alive_start = iwl4965_init_alive_start,
3833 .load_ucode = iwl4965_load_bsm,
3834 .apm_ops = {
3835 .init = iwl4965_apm_init,
3836 .config = iwl4965_nic_config,
3837 .set_pwr_src = iwl4965_set_pwr_src,
3838 },
3839 .eeprom_ops = {
3840 .regulatory_bands = {
3841 EEPROM_REGULATORY_BAND_1_CHANNELS,
3842 EEPROM_REGULATORY_BAND_2_CHANNELS,
3843 EEPROM_REGULATORY_BAND_3_CHANNELS,
3844 EEPROM_REGULATORY_BAND_4_CHANNELS,
3845 EEPROM_REGULATORY_BAND_5_CHANNELS,
3846 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
3847 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
3848 },
3849 .verify_signature = iwlcore_eeprom_verify_signature,
3850 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
3851 .release_semaphore = iwlcore_eeprom_release_semaphore,
3852 .check_version = iwl4965_eeprom_check_version,
3853 .query_addr = iwlcore_eeprom_query_addr,
3854 },
3855 .radio_kill_sw = iwl4965_radio_kill_sw,
3856 .set_power = iwl4965_set_power,
3857 .update_chain_flags = iwl4965_update_chain_flags,
3858 };
3859
3860 static struct iwl_ops iwl4965_ops = {
3861 .lib = &iwl4965_lib,
3862 .hcmd = &iwl4965_hcmd,
3863 .utils = &iwl4965_hcmd_utils,
3864 };
3865
3866 struct iwl_cfg iwl4965_agn_cfg = {
3867 .name = "4965AGN",
3868 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
3869 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
3870 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
3871 .ops = &iwl4965_ops,
3872 .mod_params = &iwl4965_mod_params,
3873 };
3874
3875 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
3876 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3877 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
3878 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
3879 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
3880 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
3881 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
3882 MODULE_PARM_DESC(debug, "debug output mask");
3883 module_param_named(
3884 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
3885 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
3886
3887 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
3888 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3889
3890 /* QoS */
3891 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
3892 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
3893 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
3894 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3895
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