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iwlwifi: remove radio disable parameter.
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
39
40 #include "iwl-eeprom.h"
41 #include "iwl-dev.h"
42 #include "iwl-core.h"
43 #include "iwl-io.h"
44 #include "iwl-helpers.h"
45 #include "iwl-calib.h"
46 #include "iwl-sta.h"
47
48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
50
51 /* Highest firmware API version supported */
52 #define IWL4965_UCODE_API_MAX 2
53
54 /* Lowest firmware API version supported */
55 #define IWL4965_UCODE_API_MIN 2
56
57 #define IWL4965_FW_PRE "iwlwifi-4965-"
58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
60
61
62 /* module parameters */
63 static struct iwl_mod_params iwl4965_mod_params = {
64 .num_of_queues = IWL49_NUM_QUEUES,
65 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
66 .amsdu_size_8K = 1,
67 .restart_fw = 1,
68 /* the rest are 0 by default */
69 };
70
71 /* check contents of special bootstrap uCode SRAM */
72 static int iwl4965_verify_bsm(struct iwl_priv *priv)
73 {
74 __le32 *image = priv->ucode_boot.v_addr;
75 u32 len = priv->ucode_boot.len;
76 u32 reg;
77 u32 val;
78
79 IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
80
81 /* verify BSM SRAM contents */
82 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
83 for (reg = BSM_SRAM_LOWER_BOUND;
84 reg < BSM_SRAM_LOWER_BOUND + len;
85 reg += sizeof(u32), image++) {
86 val = iwl_read_prph(priv, reg);
87 if (val != le32_to_cpu(*image)) {
88 IWL_ERR(priv, "BSM uCode verification failed at "
89 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
90 BSM_SRAM_LOWER_BOUND,
91 reg - BSM_SRAM_LOWER_BOUND, len,
92 val, le32_to_cpu(*image));
93 return -EIO;
94 }
95 }
96
97 IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
98
99 return 0;
100 }
101
102 /**
103 * iwl4965_load_bsm - Load bootstrap instructions
104 *
105 * BSM operation:
106 *
107 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
108 * in special SRAM that does not power down during RFKILL. When powering back
109 * up after power-saving sleeps (or during initial uCode load), the BSM loads
110 * the bootstrap program into the on-board processor, and starts it.
111 *
112 * The bootstrap program loads (via DMA) instructions and data for a new
113 * program from host DRAM locations indicated by the host driver in the
114 * BSM_DRAM_* registers. Once the new program is loaded, it starts
115 * automatically.
116 *
117 * When initializing the NIC, the host driver points the BSM to the
118 * "initialize" uCode image. This uCode sets up some internal data, then
119 * notifies host via "initialize alive" that it is complete.
120 *
121 * The host then replaces the BSM_DRAM_* pointer values to point to the
122 * normal runtime uCode instructions and a backup uCode data cache buffer
123 * (filled initially with starting data values for the on-board processor),
124 * then triggers the "initialize" uCode to load and launch the runtime uCode,
125 * which begins normal operation.
126 *
127 * When doing a power-save shutdown, runtime uCode saves data SRAM into
128 * the backup data cache in DRAM before SRAM is powered down.
129 *
130 * When powering back up, the BSM loads the bootstrap program. This reloads
131 * the runtime uCode instructions and the backup data cache into SRAM,
132 * and re-launches the runtime uCode from where it left off.
133 */
134 static int iwl4965_load_bsm(struct iwl_priv *priv)
135 {
136 __le32 *image = priv->ucode_boot.v_addr;
137 u32 len = priv->ucode_boot.len;
138 dma_addr_t pinst;
139 dma_addr_t pdata;
140 u32 inst_len;
141 u32 data_len;
142 int i;
143 u32 done;
144 u32 reg_offset;
145 int ret;
146
147 IWL_DEBUG_INFO(priv, "Begin load bsm\n");
148
149 priv->ucode_type = UCODE_RT;
150
151 /* make sure bootstrap program is no larger than BSM's SRAM size */
152 if (len > IWL49_MAX_BSM_SIZE)
153 return -EINVAL;
154
155 /* Tell bootstrap uCode where to find the "Initialize" uCode
156 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
157 * NOTE: iwl_init_alive_start() will replace these values,
158 * after the "initialize" uCode has run, to point to
159 * runtime/protocol instructions and backup data cache.
160 */
161 pinst = priv->ucode_init.p_addr >> 4;
162 pdata = priv->ucode_init_data.p_addr >> 4;
163 inst_len = priv->ucode_init.len;
164 data_len = priv->ucode_init_data.len;
165
166 ret = iwl_grab_nic_access(priv);
167 if (ret)
168 return ret;
169
170 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
171 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
172 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
173 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
174
175 /* Fill BSM memory with bootstrap instructions */
176 for (reg_offset = BSM_SRAM_LOWER_BOUND;
177 reg_offset < BSM_SRAM_LOWER_BOUND + len;
178 reg_offset += sizeof(u32), image++)
179 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
180
181 ret = iwl4965_verify_bsm(priv);
182 if (ret) {
183 iwl_release_nic_access(priv);
184 return ret;
185 }
186
187 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
188 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
189 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
190 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
191
192 /* Load bootstrap code into instruction SRAM now,
193 * to prepare to load "initialize" uCode */
194 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
195
196 /* Wait for load of bootstrap uCode to finish */
197 for (i = 0; i < 100; i++) {
198 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
199 if (!(done & BSM_WR_CTRL_REG_BIT_START))
200 break;
201 udelay(10);
202 }
203 if (i < 100)
204 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
205 else {
206 IWL_ERR(priv, "BSM write did not complete!\n");
207 return -EIO;
208 }
209
210 /* Enable future boot loads whenever power management unit triggers it
211 * (e.g. when powering back up after power-save shutdown) */
212 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
213
214 iwl_release_nic_access(priv);
215
216 return 0;
217 }
218
219 /**
220 * iwl4965_set_ucode_ptrs - Set uCode address location
221 *
222 * Tell initialization uCode where to find runtime uCode.
223 *
224 * BSM registers initially contain pointers to initialization uCode.
225 * We need to replace them to load runtime uCode inst and data,
226 * and to save runtime data when powering down.
227 */
228 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
229 {
230 dma_addr_t pinst;
231 dma_addr_t pdata;
232 unsigned long flags;
233 int ret = 0;
234
235 /* bits 35:4 for 4965 */
236 pinst = priv->ucode_code.p_addr >> 4;
237 pdata = priv->ucode_data_backup.p_addr >> 4;
238
239 spin_lock_irqsave(&priv->lock, flags);
240 ret = iwl_grab_nic_access(priv);
241 if (ret) {
242 spin_unlock_irqrestore(&priv->lock, flags);
243 return ret;
244 }
245
246 /* Tell bootstrap uCode where to find image to load */
247 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
248 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
249 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
250 priv->ucode_data.len);
251
252 /* Inst byte count must be last to set up, bit 31 signals uCode
253 * that all new ptr/size info is in place */
254 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
255 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
256 iwl_release_nic_access(priv);
257
258 spin_unlock_irqrestore(&priv->lock, flags);
259
260 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
261
262 return ret;
263 }
264
265 /**
266 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
267 *
268 * Called after REPLY_ALIVE notification received from "initialize" uCode.
269 *
270 * The 4965 "initialize" ALIVE reply contains calibration data for:
271 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
272 * (3945 does not contain this data).
273 *
274 * Tell "initialize" uCode to go ahead and load the runtime uCode.
275 */
276 static void iwl4965_init_alive_start(struct iwl_priv *priv)
277 {
278 /* Check alive response for "valid" sign from uCode */
279 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
280 /* We had an error bringing up the hardware, so take it
281 * all the way back down so we can try again */
282 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
283 goto restart;
284 }
285
286 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
287 * This is a paranoid check, because we would not have gotten the
288 * "initialize" alive if code weren't properly loaded. */
289 if (iwl_verify_ucode(priv)) {
290 /* Runtime instruction load was bad;
291 * take it all the way back down so we can try again */
292 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
293 goto restart;
294 }
295
296 /* Calculate temperature */
297 priv->temperature = iwl4965_hw_get_temperature(priv);
298
299 /* Send pointers to protocol/runtime uCode image ... init code will
300 * load and launch runtime uCode, which will send us another "Alive"
301 * notification. */
302 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
303 if (iwl4965_set_ucode_ptrs(priv)) {
304 /* Runtime instruction load won't happen;
305 * take it all the way back down so we can try again */
306 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
307 goto restart;
308 }
309 return;
310
311 restart:
312 queue_work(priv->workqueue, &priv->restart);
313 }
314
315 static int is_fat_channel(__le32 rxon_flags)
316 {
317 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
318 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
319 }
320
321 /*
322 * EEPROM handlers
323 */
324 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
325 {
326 return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
327 }
328
329 /*
330 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
331 * must be called under priv->lock and mac access
332 */
333 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
334 {
335 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
336 }
337
338 static int iwl4965_apm_init(struct iwl_priv *priv)
339 {
340 int ret = 0;
341
342 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
343 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
344
345 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
346 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
347 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
348
349 /* set "initialization complete" bit to move adapter
350 * D0U* --> D0A* state */
351 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
352
353 /* wait for clock stabilization */
354 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
355 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
356 if (ret < 0) {
357 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
358 goto out;
359 }
360
361 ret = iwl_grab_nic_access(priv);
362 if (ret)
363 goto out;
364
365 /* enable DMA */
366 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
367 APMG_CLK_VAL_BSM_CLK_RQT);
368
369 udelay(20);
370
371 /* disable L1-Active */
372 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
373 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
374
375 iwl_release_nic_access(priv);
376 out:
377 return ret;
378 }
379
380
381 static void iwl4965_nic_config(struct iwl_priv *priv)
382 {
383 unsigned long flags;
384 u16 radio_cfg;
385 u16 lctl;
386
387 spin_lock_irqsave(&priv->lock, flags);
388
389 lctl = iwl_pcie_link_ctl(priv);
390
391 /* HW bug W/A - negligible power consumption */
392 /* L1-ASPM is enabled by BIOS */
393 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
394 /* L1-ASPM enabled: disable L0S */
395 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
396 else
397 /* L1-ASPM disabled: enable L0S */
398 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
399
400 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
401
402 /* write radio config values to register */
403 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
404 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
405 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
406 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
407 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
408
409 /* set CSR_HW_CONFIG_REG for uCode use */
410 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
411 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
412 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
413
414 priv->calib_info = (struct iwl_eeprom_calib_info *)
415 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
416
417 spin_unlock_irqrestore(&priv->lock, flags);
418 }
419
420 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
421 {
422 unsigned long flags;
423
424 spin_lock_irqsave(&priv->lock, flags);
425
426 /* set stop master bit */
427 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
428
429 iwl_poll_direct_bit(priv, CSR_RESET,
430 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
431
432 spin_unlock_irqrestore(&priv->lock, flags);
433 IWL_DEBUG_INFO(priv, "stop master\n");
434
435 return 0;
436 }
437
438 static void iwl4965_apm_stop(struct iwl_priv *priv)
439 {
440 unsigned long flags;
441
442 iwl4965_apm_stop_master(priv);
443
444 spin_lock_irqsave(&priv->lock, flags);
445
446 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
447
448 udelay(10);
449 /* clear "init complete" move adapter D0A* --> D0U state */
450 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
451 spin_unlock_irqrestore(&priv->lock, flags);
452 }
453
454 static int iwl4965_apm_reset(struct iwl_priv *priv)
455 {
456 int ret = 0;
457 unsigned long flags;
458
459 iwl4965_apm_stop_master(priv);
460
461 spin_lock_irqsave(&priv->lock, flags);
462
463 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
464
465 udelay(10);
466
467 /* FIXME: put here L1A -L0S w/a */
468
469 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
470
471 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
472 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
473 if (ret < 0)
474 goto out;
475
476 udelay(10);
477
478 ret = iwl_grab_nic_access(priv);
479 if (ret)
480 goto out;
481 /* Enable DMA and BSM Clock */
482 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
483 APMG_CLK_VAL_BSM_CLK_RQT);
484
485 udelay(10);
486
487 /* disable L1A */
488 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
489 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
490
491 iwl_release_nic_access(priv);
492
493 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
494 wake_up_interruptible(&priv->wait_command_queue);
495
496 out:
497 spin_unlock_irqrestore(&priv->lock, flags);
498
499 return ret;
500 }
501
502 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
503 * Called after every association, but this runs only once!
504 * ... once chain noise is calibrated the first time, it's good forever. */
505 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
506 {
507 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
508
509 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
510 struct iwl_calib_diff_gain_cmd cmd;
511
512 memset(&cmd, 0, sizeof(cmd));
513 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
514 cmd.diff_gain_a = 0;
515 cmd.diff_gain_b = 0;
516 cmd.diff_gain_c = 0;
517 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
518 sizeof(cmd), &cmd))
519 IWL_ERR(priv,
520 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
521 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
522 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
523 }
524 }
525
526 static void iwl4965_gain_computation(struct iwl_priv *priv,
527 u32 *average_noise,
528 u16 min_average_noise_antenna_i,
529 u32 min_average_noise)
530 {
531 int i, ret;
532 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
533
534 data->delta_gain_code[min_average_noise_antenna_i] = 0;
535
536 for (i = 0; i < NUM_RX_CHAINS; i++) {
537 s32 delta_g = 0;
538
539 if (!(data->disconn_array[i]) &&
540 (data->delta_gain_code[i] ==
541 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
542 delta_g = average_noise[i] - min_average_noise;
543 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
544 data->delta_gain_code[i] =
545 min(data->delta_gain_code[i],
546 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
547
548 data->delta_gain_code[i] =
549 (data->delta_gain_code[i] | (1 << 2));
550 } else {
551 data->delta_gain_code[i] = 0;
552 }
553 }
554 IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
555 data->delta_gain_code[0],
556 data->delta_gain_code[1],
557 data->delta_gain_code[2]);
558
559 /* Differential gain gets sent to uCode only once */
560 if (!data->radio_write) {
561 struct iwl_calib_diff_gain_cmd cmd;
562 data->radio_write = 1;
563
564 memset(&cmd, 0, sizeof(cmd));
565 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
566 cmd.diff_gain_a = data->delta_gain_code[0];
567 cmd.diff_gain_b = data->delta_gain_code[1];
568 cmd.diff_gain_c = data->delta_gain_code[2];
569 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
570 sizeof(cmd), &cmd);
571 if (ret)
572 IWL_DEBUG_CALIB(priv, "fail sending cmd "
573 "REPLY_PHY_CALIBRATION_CMD \n");
574
575 /* TODO we might want recalculate
576 * rx_chain in rxon cmd */
577
578 /* Mark so we run this algo only once! */
579 data->state = IWL_CHAIN_NOISE_CALIBRATED;
580 }
581 data->chain_noise_a = 0;
582 data->chain_noise_b = 0;
583 data->chain_noise_c = 0;
584 data->chain_signal_a = 0;
585 data->chain_signal_b = 0;
586 data->chain_signal_c = 0;
587 data->beacon_count = 0;
588 }
589
590 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
591 __le32 *tx_flags)
592 {
593 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
594 *tx_flags |= TX_CMD_FLG_RTS_MSK;
595 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
596 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
597 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
598 *tx_flags |= TX_CMD_FLG_CTS_MSK;
599 }
600 }
601
602 static void iwl4965_bg_txpower_work(struct work_struct *work)
603 {
604 struct iwl_priv *priv = container_of(work, struct iwl_priv,
605 txpower_work);
606
607 /* If a scan happened to start before we got here
608 * then just return; the statistics notification will
609 * kick off another scheduled work to compensate for
610 * any temperature delta we missed here. */
611 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
612 test_bit(STATUS_SCANNING, &priv->status))
613 return;
614
615 mutex_lock(&priv->mutex);
616
617 /* Regardless of if we are associated, we must reconfigure the
618 * TX power since frames can be sent on non-radar channels while
619 * not associated */
620 iwl4965_send_tx_power(priv);
621
622 /* Update last_temperature to keep is_calib_needed from running
623 * when it isn't needed... */
624 priv->last_temperature = priv->temperature;
625
626 mutex_unlock(&priv->mutex);
627 }
628
629 /*
630 * Acquire priv->lock before calling this function !
631 */
632 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
633 {
634 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
635 (index & 0xff) | (txq_id << 8));
636 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
637 }
638
639 /**
640 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
641 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
642 * @scd_retry: (1) Indicates queue will be used in aggregation mode
643 *
644 * NOTE: Acquire priv->lock before calling this function !
645 */
646 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
647 struct iwl_tx_queue *txq,
648 int tx_fifo_id, int scd_retry)
649 {
650 int txq_id = txq->q.id;
651
652 /* Find out whether to activate Tx queue */
653 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
654
655 /* Set up and activate */
656 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
657 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
658 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
659 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
660 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
661 IWL49_SCD_QUEUE_STTS_REG_MSK);
662
663 txq->sched_retry = scd_retry;
664
665 IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
666 active ? "Activate" : "Deactivate",
667 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
668 }
669
670 static const u16 default_queue_to_tx_fifo[] = {
671 IWL_TX_FIFO_AC3,
672 IWL_TX_FIFO_AC2,
673 IWL_TX_FIFO_AC1,
674 IWL_TX_FIFO_AC0,
675 IWL49_CMD_FIFO_NUM,
676 IWL_TX_FIFO_HCCA_1,
677 IWL_TX_FIFO_HCCA_2
678 };
679
680 static int iwl4965_alive_notify(struct iwl_priv *priv)
681 {
682 u32 a;
683 unsigned long flags;
684 int ret;
685 int i, chan;
686 u32 reg_val;
687
688 spin_lock_irqsave(&priv->lock, flags);
689
690 ret = iwl_grab_nic_access(priv);
691 if (ret) {
692 spin_unlock_irqrestore(&priv->lock, flags);
693 return ret;
694 }
695
696 /* Clear 4965's internal Tx Scheduler data base */
697 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
698 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
699 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
700 iwl_write_targ_mem(priv, a, 0);
701 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
702 iwl_write_targ_mem(priv, a, 0);
703 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
704 iwl_write_targ_mem(priv, a, 0);
705
706 /* Tel 4965 where to find Tx byte count tables */
707 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
708 priv->scd_bc_tbls.dma >> 10);
709
710 /* Enable DMA channel */
711 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
712 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
713 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
714 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
715
716 /* Update FH chicken bits */
717 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
718 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
719 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
720
721 /* Disable chain mode for all queues */
722 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
723
724 /* Initialize each Tx queue (including the command queue) */
725 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
726
727 /* TFD circular buffer read/write indexes */
728 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
729 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
730
731 /* Max Tx Window size for Scheduler-ACK mode */
732 iwl_write_targ_mem(priv, priv->scd_base_addr +
733 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
734 (SCD_WIN_SIZE <<
735 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
736 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
737
738 /* Frame limit */
739 iwl_write_targ_mem(priv, priv->scd_base_addr +
740 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
741 sizeof(u32),
742 (SCD_FRAME_LIMIT <<
743 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
744 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
745
746 }
747 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
748 (1 << priv->hw_params.max_txq_num) - 1);
749
750 /* Activate all Tx DMA/FIFO channels */
751 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
752
753 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
754
755 /* Map each Tx/cmd queue to its corresponding fifo */
756 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
757 int ac = default_queue_to_tx_fifo[i];
758 iwl_txq_ctx_activate(priv, i);
759 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
760 }
761
762 iwl_release_nic_access(priv);
763 spin_unlock_irqrestore(&priv->lock, flags);
764
765 return ret;
766 }
767
768 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
769 .min_nrg_cck = 97,
770 .max_nrg_cck = 0,
771
772 .auto_corr_min_ofdm = 85,
773 .auto_corr_min_ofdm_mrc = 170,
774 .auto_corr_min_ofdm_x1 = 105,
775 .auto_corr_min_ofdm_mrc_x1 = 220,
776
777 .auto_corr_max_ofdm = 120,
778 .auto_corr_max_ofdm_mrc = 210,
779 .auto_corr_max_ofdm_x1 = 140,
780 .auto_corr_max_ofdm_mrc_x1 = 270,
781
782 .auto_corr_min_cck = 125,
783 .auto_corr_max_cck = 200,
784 .auto_corr_min_cck_mrc = 200,
785 .auto_corr_max_cck_mrc = 400,
786
787 .nrg_th_cck = 100,
788 .nrg_th_ofdm = 100,
789 };
790
791 /**
792 * iwl4965_hw_set_hw_params
793 *
794 * Called when initializing driver
795 */
796 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
797 {
798
799 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
800 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
801 IWL_ERR(priv,
802 "invalid queues_num, should be between %d and %d\n",
803 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
804 return -EINVAL;
805 }
806
807 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
808 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
809 priv->hw_params.scd_bc_tbls_size =
810 IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
811 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
812 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
813 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
814 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
815 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
816 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
817 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
818
819 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
820
821 priv->hw_params.tx_chains_num = 2;
822 priv->hw_params.rx_chains_num = 2;
823 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
824 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
825 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
826
827 priv->hw_params.sens = &iwl4965_sensitivity;
828
829 return 0;
830 }
831
832 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
833 {
834 s32 sign = 1;
835
836 if (num < 0) {
837 sign = -sign;
838 num = -num;
839 }
840 if (denom < 0) {
841 sign = -sign;
842 denom = -denom;
843 }
844 *res = 1;
845 *res = ((num * 2 + denom) / (denom * 2)) * sign;
846
847 return 1;
848 }
849
850 /**
851 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
852 *
853 * Determines power supply voltage compensation for txpower calculations.
854 * Returns number of 1/2-dB steps to subtract from gain table index,
855 * to compensate for difference between power supply voltage during
856 * factory measurements, vs. current power supply voltage.
857 *
858 * Voltage indication is higher for lower voltage.
859 * Lower voltage requires more gain (lower gain table index).
860 */
861 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
862 s32 current_voltage)
863 {
864 s32 comp = 0;
865
866 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
867 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
868 return 0;
869
870 iwl4965_math_div_round(current_voltage - eeprom_voltage,
871 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
872
873 if (current_voltage > eeprom_voltage)
874 comp *= 2;
875 if ((comp < -2) || (comp > 2))
876 comp = 0;
877
878 return comp;
879 }
880
881 static s32 iwl4965_get_tx_atten_grp(u16 channel)
882 {
883 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
884 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
885 return CALIB_CH_GROUP_5;
886
887 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
888 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
889 return CALIB_CH_GROUP_1;
890
891 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
892 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
893 return CALIB_CH_GROUP_2;
894
895 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
896 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
897 return CALIB_CH_GROUP_3;
898
899 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
900 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
901 return CALIB_CH_GROUP_4;
902
903 return -1;
904 }
905
906 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
907 {
908 s32 b = -1;
909
910 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
911 if (priv->calib_info->band_info[b].ch_from == 0)
912 continue;
913
914 if ((channel >= priv->calib_info->band_info[b].ch_from)
915 && (channel <= priv->calib_info->band_info[b].ch_to))
916 break;
917 }
918
919 return b;
920 }
921
922 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
923 {
924 s32 val;
925
926 if (x2 == x1)
927 return y1;
928 else {
929 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
930 return val + y2;
931 }
932 }
933
934 /**
935 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
936 *
937 * Interpolates factory measurements from the two sample channels within a
938 * sub-band, to apply to channel of interest. Interpolation is proportional to
939 * differences in channel frequencies, which is proportional to differences
940 * in channel number.
941 */
942 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
943 struct iwl_eeprom_calib_ch_info *chan_info)
944 {
945 s32 s = -1;
946 u32 c;
947 u32 m;
948 const struct iwl_eeprom_calib_measure *m1;
949 const struct iwl_eeprom_calib_measure *m2;
950 struct iwl_eeprom_calib_measure *omeas;
951 u32 ch_i1;
952 u32 ch_i2;
953
954 s = iwl4965_get_sub_band(priv, channel);
955 if (s >= EEPROM_TX_POWER_BANDS) {
956 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
957 return -1;
958 }
959
960 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
961 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
962 chan_info->ch_num = (u8) channel;
963
964 IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
965 channel, s, ch_i1, ch_i2);
966
967 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
968 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
969 m1 = &(priv->calib_info->band_info[s].ch1.
970 measurements[c][m]);
971 m2 = &(priv->calib_info->band_info[s].ch2.
972 measurements[c][m]);
973 omeas = &(chan_info->measurements[c][m]);
974
975 omeas->actual_pow =
976 (u8) iwl4965_interpolate_value(channel, ch_i1,
977 m1->actual_pow,
978 ch_i2,
979 m2->actual_pow);
980 omeas->gain_idx =
981 (u8) iwl4965_interpolate_value(channel, ch_i1,
982 m1->gain_idx, ch_i2,
983 m2->gain_idx);
984 omeas->temperature =
985 (u8) iwl4965_interpolate_value(channel, ch_i1,
986 m1->temperature,
987 ch_i2,
988 m2->temperature);
989 omeas->pa_det =
990 (s8) iwl4965_interpolate_value(channel, ch_i1,
991 m1->pa_det, ch_i2,
992 m2->pa_det);
993
994 IWL_DEBUG_TXPOWER(priv,
995 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
996 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
997 IWL_DEBUG_TXPOWER(priv,
998 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
999 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1000 IWL_DEBUG_TXPOWER(priv,
1001 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1002 m1->pa_det, m2->pa_det, omeas->pa_det);
1003 IWL_DEBUG_TXPOWER(priv,
1004 "chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1005 m1->temperature, m2->temperature,
1006 omeas->temperature);
1007 }
1008 }
1009
1010 return 0;
1011 }
1012
1013 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1014 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1015 static s32 back_off_table[] = {
1016 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1017 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1018 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1019 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1020 10 /* CCK */
1021 };
1022
1023 /* Thermal compensation values for txpower for various frequency ranges ...
1024 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1025 static struct iwl4965_txpower_comp_entry {
1026 s32 degrees_per_05db_a;
1027 s32 degrees_per_05db_a_denom;
1028 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1029 {9, 2}, /* group 0 5.2, ch 34-43 */
1030 {4, 1}, /* group 1 5.2, ch 44-70 */
1031 {4, 1}, /* group 2 5.2, ch 71-124 */
1032 {4, 1}, /* group 3 5.2, ch 125-200 */
1033 {3, 1} /* group 4 2.4, ch all */
1034 };
1035
1036 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1037 {
1038 if (!band) {
1039 if ((rate_power_index & 7) <= 4)
1040 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1041 }
1042 return MIN_TX_GAIN_INDEX;
1043 }
1044
1045 struct gain_entry {
1046 u8 dsp;
1047 u8 radio;
1048 };
1049
1050 static const struct gain_entry gain_table[2][108] = {
1051 /* 5.2GHz power gain index table */
1052 {
1053 {123, 0x3F}, /* highest txpower */
1054 {117, 0x3F},
1055 {110, 0x3F},
1056 {104, 0x3F},
1057 {98, 0x3F},
1058 {110, 0x3E},
1059 {104, 0x3E},
1060 {98, 0x3E},
1061 {110, 0x3D},
1062 {104, 0x3D},
1063 {98, 0x3D},
1064 {110, 0x3C},
1065 {104, 0x3C},
1066 {98, 0x3C},
1067 {110, 0x3B},
1068 {104, 0x3B},
1069 {98, 0x3B},
1070 {110, 0x3A},
1071 {104, 0x3A},
1072 {98, 0x3A},
1073 {110, 0x39},
1074 {104, 0x39},
1075 {98, 0x39},
1076 {110, 0x38},
1077 {104, 0x38},
1078 {98, 0x38},
1079 {110, 0x37},
1080 {104, 0x37},
1081 {98, 0x37},
1082 {110, 0x36},
1083 {104, 0x36},
1084 {98, 0x36},
1085 {110, 0x35},
1086 {104, 0x35},
1087 {98, 0x35},
1088 {110, 0x34},
1089 {104, 0x34},
1090 {98, 0x34},
1091 {110, 0x33},
1092 {104, 0x33},
1093 {98, 0x33},
1094 {110, 0x32},
1095 {104, 0x32},
1096 {98, 0x32},
1097 {110, 0x31},
1098 {104, 0x31},
1099 {98, 0x31},
1100 {110, 0x30},
1101 {104, 0x30},
1102 {98, 0x30},
1103 {110, 0x25},
1104 {104, 0x25},
1105 {98, 0x25},
1106 {110, 0x24},
1107 {104, 0x24},
1108 {98, 0x24},
1109 {110, 0x23},
1110 {104, 0x23},
1111 {98, 0x23},
1112 {110, 0x22},
1113 {104, 0x18},
1114 {98, 0x18},
1115 {110, 0x17},
1116 {104, 0x17},
1117 {98, 0x17},
1118 {110, 0x16},
1119 {104, 0x16},
1120 {98, 0x16},
1121 {110, 0x15},
1122 {104, 0x15},
1123 {98, 0x15},
1124 {110, 0x14},
1125 {104, 0x14},
1126 {98, 0x14},
1127 {110, 0x13},
1128 {104, 0x13},
1129 {98, 0x13},
1130 {110, 0x12},
1131 {104, 0x08},
1132 {98, 0x08},
1133 {110, 0x07},
1134 {104, 0x07},
1135 {98, 0x07},
1136 {110, 0x06},
1137 {104, 0x06},
1138 {98, 0x06},
1139 {110, 0x05},
1140 {104, 0x05},
1141 {98, 0x05},
1142 {110, 0x04},
1143 {104, 0x04},
1144 {98, 0x04},
1145 {110, 0x03},
1146 {104, 0x03},
1147 {98, 0x03},
1148 {110, 0x02},
1149 {104, 0x02},
1150 {98, 0x02},
1151 {110, 0x01},
1152 {104, 0x01},
1153 {98, 0x01},
1154 {110, 0x00},
1155 {104, 0x00},
1156 {98, 0x00},
1157 {93, 0x00},
1158 {88, 0x00},
1159 {83, 0x00},
1160 {78, 0x00},
1161 },
1162 /* 2.4GHz power gain index table */
1163 {
1164 {110, 0x3f}, /* highest txpower */
1165 {104, 0x3f},
1166 {98, 0x3f},
1167 {110, 0x3e},
1168 {104, 0x3e},
1169 {98, 0x3e},
1170 {110, 0x3d},
1171 {104, 0x3d},
1172 {98, 0x3d},
1173 {110, 0x3c},
1174 {104, 0x3c},
1175 {98, 0x3c},
1176 {110, 0x3b},
1177 {104, 0x3b},
1178 {98, 0x3b},
1179 {110, 0x3a},
1180 {104, 0x3a},
1181 {98, 0x3a},
1182 {110, 0x39},
1183 {104, 0x39},
1184 {98, 0x39},
1185 {110, 0x38},
1186 {104, 0x38},
1187 {98, 0x38},
1188 {110, 0x37},
1189 {104, 0x37},
1190 {98, 0x37},
1191 {110, 0x36},
1192 {104, 0x36},
1193 {98, 0x36},
1194 {110, 0x35},
1195 {104, 0x35},
1196 {98, 0x35},
1197 {110, 0x34},
1198 {104, 0x34},
1199 {98, 0x34},
1200 {110, 0x33},
1201 {104, 0x33},
1202 {98, 0x33},
1203 {110, 0x32},
1204 {104, 0x32},
1205 {98, 0x32},
1206 {110, 0x31},
1207 {104, 0x31},
1208 {98, 0x31},
1209 {110, 0x30},
1210 {104, 0x30},
1211 {98, 0x30},
1212 {110, 0x6},
1213 {104, 0x6},
1214 {98, 0x6},
1215 {110, 0x5},
1216 {104, 0x5},
1217 {98, 0x5},
1218 {110, 0x4},
1219 {104, 0x4},
1220 {98, 0x4},
1221 {110, 0x3},
1222 {104, 0x3},
1223 {98, 0x3},
1224 {110, 0x2},
1225 {104, 0x2},
1226 {98, 0x2},
1227 {110, 0x1},
1228 {104, 0x1},
1229 {98, 0x1},
1230 {110, 0x0},
1231 {104, 0x0},
1232 {98, 0x0},
1233 {97, 0},
1234 {96, 0},
1235 {95, 0},
1236 {94, 0},
1237 {93, 0},
1238 {92, 0},
1239 {91, 0},
1240 {90, 0},
1241 {89, 0},
1242 {88, 0},
1243 {87, 0},
1244 {86, 0},
1245 {85, 0},
1246 {84, 0},
1247 {83, 0},
1248 {82, 0},
1249 {81, 0},
1250 {80, 0},
1251 {79, 0},
1252 {78, 0},
1253 {77, 0},
1254 {76, 0},
1255 {75, 0},
1256 {74, 0},
1257 {73, 0},
1258 {72, 0},
1259 {71, 0},
1260 {70, 0},
1261 {69, 0},
1262 {68, 0},
1263 {67, 0},
1264 {66, 0},
1265 {65, 0},
1266 {64, 0},
1267 {63, 0},
1268 {62, 0},
1269 {61, 0},
1270 {60, 0},
1271 {59, 0},
1272 }
1273 };
1274
1275 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1276 u8 is_fat, u8 ctrl_chan_high,
1277 struct iwl4965_tx_power_db *tx_power_tbl)
1278 {
1279 u8 saturation_power;
1280 s32 target_power;
1281 s32 user_target_power;
1282 s32 power_limit;
1283 s32 current_temp;
1284 s32 reg_limit;
1285 s32 current_regulatory;
1286 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1287 int i;
1288 int c;
1289 const struct iwl_channel_info *ch_info = NULL;
1290 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1291 const struct iwl_eeprom_calib_measure *measurement;
1292 s16 voltage;
1293 s32 init_voltage;
1294 s32 voltage_compensation;
1295 s32 degrees_per_05db_num;
1296 s32 degrees_per_05db_denom;
1297 s32 factory_temp;
1298 s32 temperature_comp[2];
1299 s32 factory_gain_index[2];
1300 s32 factory_actual_pwr[2];
1301 s32 power_index;
1302
1303 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1304 * are used for indexing into txpower table) */
1305 user_target_power = 2 * priv->tx_power_user_lmt;
1306
1307 /* Get current (RXON) channel, band, width */
1308 IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_fat %d\n", channel, band,
1309 is_fat);
1310
1311 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1312
1313 if (!is_channel_valid(ch_info))
1314 return -EINVAL;
1315
1316 /* get txatten group, used to select 1) thermal txpower adjustment
1317 * and 2) mimo txpower balance between Tx chains. */
1318 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1319 if (txatten_grp < 0) {
1320 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1321 channel);
1322 return -EINVAL;
1323 }
1324
1325 IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1326 channel, txatten_grp);
1327
1328 if (is_fat) {
1329 if (ctrl_chan_high)
1330 channel -= 2;
1331 else
1332 channel += 2;
1333 }
1334
1335 /* hardware txpower limits ...
1336 * saturation (clipping distortion) txpowers are in half-dBm */
1337 if (band)
1338 saturation_power = priv->calib_info->saturation_power24;
1339 else
1340 saturation_power = priv->calib_info->saturation_power52;
1341
1342 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1343 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1344 if (band)
1345 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1346 else
1347 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1348 }
1349
1350 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1351 * max_power_avg values are in dBm, convert * 2 */
1352 if (is_fat)
1353 reg_limit = ch_info->fat_max_power_avg * 2;
1354 else
1355 reg_limit = ch_info->max_power_avg * 2;
1356
1357 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1358 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1359 if (band)
1360 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1361 else
1362 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1363 }
1364
1365 /* Interpolate txpower calibration values for this channel,
1366 * based on factory calibration tests on spaced channels. */
1367 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1368
1369 /* calculate tx gain adjustment based on power supply voltage */
1370 voltage = priv->calib_info->voltage;
1371 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1372 voltage_compensation =
1373 iwl4965_get_voltage_compensation(voltage, init_voltage);
1374
1375 IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1376 init_voltage,
1377 voltage, voltage_compensation);
1378
1379 /* get current temperature (Celsius) */
1380 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1381 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1382 current_temp = KELVIN_TO_CELSIUS(current_temp);
1383
1384 /* select thermal txpower adjustment params, based on channel group
1385 * (same frequency group used for mimo txatten adjustment) */
1386 degrees_per_05db_num =
1387 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1388 degrees_per_05db_denom =
1389 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1390
1391 /* get per-chain txpower values from factory measurements */
1392 for (c = 0; c < 2; c++) {
1393 measurement = &ch_eeprom_info.measurements[c][1];
1394
1395 /* txgain adjustment (in half-dB steps) based on difference
1396 * between factory and current temperature */
1397 factory_temp = measurement->temperature;
1398 iwl4965_math_div_round((current_temp - factory_temp) *
1399 degrees_per_05db_denom,
1400 degrees_per_05db_num,
1401 &temperature_comp[c]);
1402
1403 factory_gain_index[c] = measurement->gain_idx;
1404 factory_actual_pwr[c] = measurement->actual_pow;
1405
1406 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1407 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1408 "curr tmp %d, comp %d steps\n",
1409 factory_temp, current_temp,
1410 temperature_comp[c]);
1411
1412 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1413 factory_gain_index[c],
1414 factory_actual_pwr[c]);
1415 }
1416
1417 /* for each of 33 bit-rates (including 1 for CCK) */
1418 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1419 u8 is_mimo_rate;
1420 union iwl4965_tx_power_dual_stream tx_power;
1421
1422 /* for mimo, reduce each chain's txpower by half
1423 * (3dB, 6 steps), so total output power is regulatory
1424 * compliant. */
1425 if (i & 0x8) {
1426 current_regulatory = reg_limit -
1427 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1428 is_mimo_rate = 1;
1429 } else {
1430 current_regulatory = reg_limit;
1431 is_mimo_rate = 0;
1432 }
1433
1434 /* find txpower limit, either hardware or regulatory */
1435 power_limit = saturation_power - back_off_table[i];
1436 if (power_limit > current_regulatory)
1437 power_limit = current_regulatory;
1438
1439 /* reduce user's txpower request if necessary
1440 * for this rate on this channel */
1441 target_power = user_target_power;
1442 if (target_power > power_limit)
1443 target_power = power_limit;
1444
1445 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1446 i, saturation_power - back_off_table[i],
1447 current_regulatory, user_target_power,
1448 target_power);
1449
1450 /* for each of 2 Tx chains (radio transmitters) */
1451 for (c = 0; c < 2; c++) {
1452 s32 atten_value;
1453
1454 if (is_mimo_rate)
1455 atten_value =
1456 (s32)le32_to_cpu(priv->card_alive_init.
1457 tx_atten[txatten_grp][c]);
1458 else
1459 atten_value = 0;
1460
1461 /* calculate index; higher index means lower txpower */
1462 power_index = (u8) (factory_gain_index[c] -
1463 (target_power -
1464 factory_actual_pwr[c]) -
1465 temperature_comp[c] -
1466 voltage_compensation +
1467 atten_value);
1468
1469 /* IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1470 power_index); */
1471
1472 if (power_index < get_min_power_index(i, band))
1473 power_index = get_min_power_index(i, band);
1474
1475 /* adjust 5 GHz index to support negative indexes */
1476 if (!band)
1477 power_index += 9;
1478
1479 /* CCK, rate 32, reduce txpower for CCK */
1480 if (i == POWER_TABLE_CCK_ENTRY)
1481 power_index +=
1482 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1483
1484 /* stay within the table! */
1485 if (power_index > 107) {
1486 IWL_WARN(priv, "txpower index %d > 107\n",
1487 power_index);
1488 power_index = 107;
1489 }
1490 if (power_index < 0) {
1491 IWL_WARN(priv, "txpower index %d < 0\n",
1492 power_index);
1493 power_index = 0;
1494 }
1495
1496 /* fill txpower command for this rate/chain */
1497 tx_power.s.radio_tx_gain[c] =
1498 gain_table[band][power_index].radio;
1499 tx_power.s.dsp_predis_atten[c] =
1500 gain_table[band][power_index].dsp;
1501
1502 IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1503 "gain 0x%02x dsp %d\n",
1504 c, atten_value, power_index,
1505 tx_power.s.radio_tx_gain[c],
1506 tx_power.s.dsp_predis_atten[c]);
1507 } /* for each chain */
1508
1509 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1510
1511 } /* for each rate */
1512
1513 return 0;
1514 }
1515
1516 /**
1517 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1518 *
1519 * Uses the active RXON for channel, band, and characteristics (fat, high)
1520 * The power limit is taken from priv->tx_power_user_lmt.
1521 */
1522 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1523 {
1524 struct iwl4965_txpowertable_cmd cmd = { 0 };
1525 int ret;
1526 u8 band = 0;
1527 u8 is_fat = 0;
1528 u8 ctrl_chan_high = 0;
1529
1530 if (test_bit(STATUS_SCANNING, &priv->status)) {
1531 /* If this gets hit a lot, switch it to a BUG() and catch
1532 * the stack trace to find out who is calling this during
1533 * a scan. */
1534 IWL_WARN(priv, "TX Power requested while scanning!\n");
1535 return -EAGAIN;
1536 }
1537
1538 band = priv->band == IEEE80211_BAND_2GHZ;
1539
1540 is_fat = is_fat_channel(priv->active_rxon.flags);
1541
1542 if (is_fat &&
1543 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1544 ctrl_chan_high = 1;
1545
1546 cmd.band = band;
1547 cmd.channel = priv->active_rxon.channel;
1548
1549 ret = iwl4965_fill_txpower_tbl(priv, band,
1550 le16_to_cpu(priv->active_rxon.channel),
1551 is_fat, ctrl_chan_high, &cmd.tx_power);
1552 if (ret)
1553 goto out;
1554
1555 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1556
1557 out:
1558 return ret;
1559 }
1560
1561 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1562 {
1563 int ret = 0;
1564 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1565 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1566 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1567
1568 if ((rxon1->flags == rxon2->flags) &&
1569 (rxon1->filter_flags == rxon2->filter_flags) &&
1570 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1571 (rxon1->ofdm_ht_single_stream_basic_rates ==
1572 rxon2->ofdm_ht_single_stream_basic_rates) &&
1573 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1574 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1575 (rxon1->rx_chain == rxon2->rx_chain) &&
1576 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1577 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
1578 return 0;
1579 }
1580
1581 rxon_assoc.flags = priv->staging_rxon.flags;
1582 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1583 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1584 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1585 rxon_assoc.reserved = 0;
1586 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1587 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1588 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1589 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1590 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1591
1592 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1593 sizeof(rxon_assoc), &rxon_assoc, NULL);
1594 if (ret)
1595 return ret;
1596
1597 return ret;
1598 }
1599
1600 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1601 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1602 {
1603 int rc;
1604 u8 band = 0;
1605 u8 is_fat = 0;
1606 u8 ctrl_chan_high = 0;
1607 struct iwl4965_channel_switch_cmd cmd = { 0 };
1608 const struct iwl_channel_info *ch_info;
1609
1610 band = priv->band == IEEE80211_BAND_2GHZ;
1611
1612 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1613
1614 is_fat = is_fat_channel(priv->staging_rxon.flags);
1615
1616 if (is_fat &&
1617 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1618 ctrl_chan_high = 1;
1619
1620 cmd.band = band;
1621 cmd.expect_beacon = 0;
1622 cmd.channel = cpu_to_le16(channel);
1623 cmd.rxon_flags = priv->active_rxon.flags;
1624 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1625 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1626 if (ch_info)
1627 cmd.expect_beacon = is_channel_radar(ch_info);
1628 else
1629 cmd.expect_beacon = 1;
1630
1631 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1632 ctrl_chan_high, &cmd.tx_power);
1633 if (rc) {
1634 IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc);
1635 return rc;
1636 }
1637
1638 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1639 return rc;
1640 }
1641 #endif
1642
1643 /**
1644 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1645 */
1646 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1647 struct iwl_tx_queue *txq,
1648 u16 byte_cnt)
1649 {
1650 struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1651 int txq_id = txq->q.id;
1652 int write_ptr = txq->q.write_ptr;
1653 int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1654 __le16 bc_ent;
1655
1656 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1657
1658 bc_ent = cpu_to_le16(len & 0xFFF);
1659 /* Set up byte count within first 256 entries */
1660 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1661
1662 /* If within first 64 entries, duplicate at end */
1663 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1664 scd_bc_tbl[txq_id].
1665 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1666 }
1667
1668 /**
1669 * sign_extend - Sign extend a value using specified bit as sign-bit
1670 *
1671 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1672 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1673 *
1674 * @param oper value to sign extend
1675 * @param index 0 based bit index (0<=index<32) to sign bit
1676 */
1677 static s32 sign_extend(u32 oper, int index)
1678 {
1679 u8 shift = 31 - index;
1680
1681 return (s32)(oper << shift) >> shift;
1682 }
1683
1684 /**
1685 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1686 * @statistics: Provides the temperature reading from the uCode
1687 *
1688 * A return of <0 indicates bogus data in the statistics
1689 */
1690 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1691 {
1692 s32 temperature;
1693 s32 vt;
1694 s32 R1, R2, R3;
1695 u32 R4;
1696
1697 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1698 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1699 IWL_DEBUG_TEMP(priv, "Running FAT temperature calibration\n");
1700 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1701 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1702 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1703 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1704 } else {
1705 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1706 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1707 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1708 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1709 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1710 }
1711
1712 /*
1713 * Temperature is only 23 bits, so sign extend out to 32.
1714 *
1715 * NOTE If we haven't received a statistics notification yet
1716 * with an updated temperature, use R4 provided to us in the
1717 * "initialize" ALIVE response.
1718 */
1719 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1720 vt = sign_extend(R4, 23);
1721 else
1722 vt = sign_extend(
1723 le32_to_cpu(priv->statistics.general.temperature), 23);
1724
1725 IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1726
1727 if (R3 == R1) {
1728 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1729 return -1;
1730 }
1731
1732 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1733 * Add offset to center the adjustment around 0 degrees Centigrade. */
1734 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1735 temperature /= (R3 - R1);
1736 temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1737
1738 IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1739 temperature, KELVIN_TO_CELSIUS(temperature));
1740
1741 return temperature;
1742 }
1743
1744 /* Adjust Txpower only if temperature variance is greater than threshold. */
1745 #define IWL_TEMPERATURE_THRESHOLD 3
1746
1747 /**
1748 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1749 *
1750 * If the temperature changed has changed sufficiently, then a recalibration
1751 * is needed.
1752 *
1753 * Assumes caller will replace priv->last_temperature once calibration
1754 * executed.
1755 */
1756 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1757 {
1758 int temp_diff;
1759
1760 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1761 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1762 return 0;
1763 }
1764
1765 temp_diff = priv->temperature - priv->last_temperature;
1766
1767 /* get absolute value */
1768 if (temp_diff < 0) {
1769 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1770 temp_diff = -temp_diff;
1771 } else if (temp_diff == 0)
1772 IWL_DEBUG_POWER(priv, "Same temp, \n");
1773 else
1774 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1775
1776 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1777 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1778 return 0;
1779 }
1780
1781 IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1782
1783 return 1;
1784 }
1785
1786 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1787 {
1788 s32 temp;
1789
1790 temp = iwl4965_hw_get_temperature(priv);
1791 if (temp < 0)
1792 return;
1793
1794 if (priv->temperature != temp) {
1795 if (priv->temperature)
1796 IWL_DEBUG_TEMP(priv, "Temperature changed "
1797 "from %dC to %dC\n",
1798 KELVIN_TO_CELSIUS(priv->temperature),
1799 KELVIN_TO_CELSIUS(temp));
1800 else
1801 IWL_DEBUG_TEMP(priv, "Temperature "
1802 "initialized to %dC\n",
1803 KELVIN_TO_CELSIUS(temp));
1804 }
1805
1806 priv->temperature = temp;
1807 set_bit(STATUS_TEMPERATURE, &priv->status);
1808
1809 if (!priv->disable_tx_power_cal &&
1810 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1811 iwl4965_is_temp_calib_needed(priv))
1812 queue_work(priv->workqueue, &priv->txpower_work);
1813 }
1814
1815 /**
1816 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1817 */
1818 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1819 u16 txq_id)
1820 {
1821 /* Simply stop the queue, but don't change any configuration;
1822 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1823 iwl_write_prph(priv,
1824 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1825 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1826 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1827 }
1828
1829 /**
1830 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1831 * priv->lock must be held by the caller
1832 */
1833 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1834 u16 ssn_idx, u8 tx_fifo)
1835 {
1836 int ret = 0;
1837
1838 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1839 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1840 IWL_WARN(priv,
1841 "queue number out of range: %d, must be %d to %d\n",
1842 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1843 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1844 return -EINVAL;
1845 }
1846
1847 ret = iwl_grab_nic_access(priv);
1848 if (ret)
1849 return ret;
1850
1851 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1852
1853 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1854
1855 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1856 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1857 /* supposes that ssn_idx is valid (!= 0xFFF) */
1858 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1859
1860 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1861 iwl_txq_ctx_deactivate(priv, txq_id);
1862 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1863
1864 iwl_release_nic_access(priv);
1865
1866 return 0;
1867 }
1868
1869 /**
1870 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1871 */
1872 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1873 u16 txq_id)
1874 {
1875 u32 tbl_dw_addr;
1876 u32 tbl_dw;
1877 u16 scd_q2ratid;
1878
1879 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1880
1881 tbl_dw_addr = priv->scd_base_addr +
1882 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1883
1884 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1885
1886 if (txq_id & 0x1)
1887 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1888 else
1889 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1890
1891 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1892
1893 return 0;
1894 }
1895
1896
1897 /**
1898 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1899 *
1900 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1901 * i.e. it must be one of the higher queues used for aggregation
1902 */
1903 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1904 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1905 {
1906 unsigned long flags;
1907 int ret;
1908 u16 ra_tid;
1909
1910 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1911 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1912 IWL_WARN(priv,
1913 "queue number out of range: %d, must be %d to %d\n",
1914 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1915 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1916 return -EINVAL;
1917 }
1918
1919 ra_tid = BUILD_RAxTID(sta_id, tid);
1920
1921 /* Modify device's station table to Tx this TID */
1922 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1923
1924 spin_lock_irqsave(&priv->lock, flags);
1925 ret = iwl_grab_nic_access(priv);
1926 if (ret) {
1927 spin_unlock_irqrestore(&priv->lock, flags);
1928 return ret;
1929 }
1930
1931 /* Stop this Tx queue before configuring it */
1932 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1933
1934 /* Map receiver-address / traffic-ID to this queue */
1935 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1936
1937 /* Set this queue as a chain-building queue */
1938 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1939
1940 /* Place first TFD at index corresponding to start sequence number.
1941 * Assumes that ssn_idx is valid (!= 0xFFF) */
1942 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1943 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1944 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1945
1946 /* Set up Tx window size and frame limit for this queue */
1947 iwl_write_targ_mem(priv,
1948 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1949 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1950 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1951
1952 iwl_write_targ_mem(priv, priv->scd_base_addr +
1953 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1954 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1955 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1956
1957 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1958
1959 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1960 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1961
1962 iwl_release_nic_access(priv);
1963 spin_unlock_irqrestore(&priv->lock, flags);
1964
1965 return 0;
1966 }
1967
1968
1969 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1970 {
1971 switch (cmd_id) {
1972 case REPLY_RXON:
1973 return (u16) sizeof(struct iwl4965_rxon_cmd);
1974 default:
1975 return len;
1976 }
1977 }
1978
1979 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1980 {
1981 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1982 addsta->mode = cmd->mode;
1983 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1984 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1985 addsta->station_flags = cmd->station_flags;
1986 addsta->station_flags_msk = cmd->station_flags_msk;
1987 addsta->tid_disable_tx = cmd->tid_disable_tx;
1988 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1989 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1990 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1991 addsta->reserved1 = cpu_to_le16(0);
1992 addsta->reserved2 = cpu_to_le32(0);
1993
1994 return (u16)sizeof(struct iwl4965_addsta_cmd);
1995 }
1996
1997 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1998 {
1999 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2000 }
2001
2002 /**
2003 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2004 */
2005 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2006 struct iwl_ht_agg *agg,
2007 struct iwl4965_tx_resp *tx_resp,
2008 int txq_id, u16 start_idx)
2009 {
2010 u16 status;
2011 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2012 struct ieee80211_tx_info *info = NULL;
2013 struct ieee80211_hdr *hdr = NULL;
2014 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2015 int i, sh, idx;
2016 u16 seq;
2017 if (agg->wait_for_ba)
2018 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
2019
2020 agg->frame_count = tx_resp->frame_count;
2021 agg->start_idx = start_idx;
2022 agg->rate_n_flags = rate_n_flags;
2023 agg->bitmap = 0;
2024
2025 /* num frames attempted by Tx command */
2026 if (agg->frame_count == 1) {
2027 /* Only one frame was attempted; no block-ack will arrive */
2028 status = le16_to_cpu(frame_status[0].status);
2029 idx = start_idx;
2030
2031 /* FIXME: code repetition */
2032 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
2033 agg->frame_count, agg->start_idx, idx);
2034
2035 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2036 info->status.rates[0].count = tx_resp->failure_frame + 1;
2037 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2038 info->flags |= iwl_is_tx_success(status) ?
2039 IEEE80211_TX_STAT_ACK : 0;
2040 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2041 /* FIXME: code repetition end */
2042
2043 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
2044 status & 0xff, tx_resp->failure_frame);
2045 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
2046
2047 agg->wait_for_ba = 0;
2048 } else {
2049 /* Two or more frames were attempted; expect block-ack */
2050 u64 bitmap = 0;
2051 int start = agg->start_idx;
2052
2053 /* Construct bit-map of pending frames within Tx window */
2054 for (i = 0; i < agg->frame_count; i++) {
2055 u16 sc;
2056 status = le16_to_cpu(frame_status[i].status);
2057 seq = le16_to_cpu(frame_status[i].sequence);
2058 idx = SEQ_TO_INDEX(seq);
2059 txq_id = SEQ_TO_QUEUE(seq);
2060
2061 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2062 AGG_TX_STATE_ABORT_MSK))
2063 continue;
2064
2065 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
2066 agg->frame_count, txq_id, idx);
2067
2068 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2069
2070 sc = le16_to_cpu(hdr->seq_ctrl);
2071 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2072 IWL_ERR(priv,
2073 "BUG_ON idx doesn't match seq control"
2074 " idx=%d, seq_idx=%d, seq=%d\n",
2075 idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
2076 return -1;
2077 }
2078
2079 IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
2080 i, idx, SEQ_TO_SN(sc));
2081
2082 sh = idx - start;
2083 if (sh > 64) {
2084 sh = (start - idx) + 0xff;
2085 bitmap = bitmap << sh;
2086 sh = 0;
2087 start = idx;
2088 } else if (sh < -64)
2089 sh = 0xff - (start - idx);
2090 else if (sh < 0) {
2091 sh = start - idx;
2092 start = idx;
2093 bitmap = bitmap << sh;
2094 sh = 0;
2095 }
2096 bitmap |= 1ULL << sh;
2097 IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
2098 start, (unsigned long long)bitmap);
2099 }
2100
2101 agg->bitmap = bitmap;
2102 agg->start_idx = start;
2103 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
2104 agg->frame_count, agg->start_idx,
2105 (unsigned long long)agg->bitmap);
2106
2107 if (bitmap)
2108 agg->wait_for_ba = 1;
2109 }
2110 return 0;
2111 }
2112
2113 /**
2114 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2115 */
2116 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2117 struct iwl_rx_mem_buffer *rxb)
2118 {
2119 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2120 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2121 int txq_id = SEQ_TO_QUEUE(sequence);
2122 int index = SEQ_TO_INDEX(sequence);
2123 struct iwl_tx_queue *txq = &priv->txq[txq_id];
2124 struct ieee80211_hdr *hdr;
2125 struct ieee80211_tx_info *info;
2126 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2127 u32 status = le32_to_cpu(tx_resp->u.status);
2128 int tid = MAX_TID_COUNT;
2129 int sta_id;
2130 int freed;
2131 u8 *qc = NULL;
2132
2133 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2134 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2135 "is out of range [0-%d] %d %d\n", txq_id,
2136 index, txq->q.n_bd, txq->q.write_ptr,
2137 txq->q.read_ptr);
2138 return;
2139 }
2140
2141 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2142 memset(&info->status, 0, sizeof(info->status));
2143
2144 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2145 if (ieee80211_is_data_qos(hdr->frame_control)) {
2146 qc = ieee80211_get_qos_ctl(hdr);
2147 tid = qc[0] & 0xf;
2148 }
2149
2150 sta_id = iwl_get_ra_sta_id(priv, hdr);
2151 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2152 IWL_ERR(priv, "Station not known\n");
2153 return;
2154 }
2155
2156 if (txq->sched_retry) {
2157 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2158 struct iwl_ht_agg *agg = NULL;
2159
2160 WARN_ON(!qc);
2161
2162 agg = &priv->stations[sta_id].tid[tid].agg;
2163
2164 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2165
2166 /* check if BAR is needed */
2167 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2168 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2169
2170 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2171 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2172 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2173 "%d index %d\n", scd_ssn , index);
2174 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2175 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2176
2177 if (priv->mac80211_registered &&
2178 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2179 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2180 if (agg->state == IWL_AGG_OFF)
2181 iwl_wake_queue(priv, txq_id);
2182 else
2183 iwl_wake_queue(priv, txq->swq_id);
2184 }
2185 }
2186 } else {
2187 info->status.rates[0].count = tx_resp->failure_frame + 1;
2188 info->flags |= iwl_is_tx_success(status) ?
2189 IEEE80211_TX_STAT_ACK : 0;
2190 iwl_hwrate_to_tx_control(priv,
2191 le32_to_cpu(tx_resp->rate_n_flags),
2192 info);
2193
2194 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2195 "rate_n_flags 0x%x retries %d\n",
2196 txq_id,
2197 iwl_get_tx_fail_reason(status), status,
2198 le32_to_cpu(tx_resp->rate_n_flags),
2199 tx_resp->failure_frame);
2200
2201 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2202 if (qc && likely(sta_id != IWL_INVALID_STATION))
2203 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2204
2205 if (priv->mac80211_registered &&
2206 (iwl_queue_space(&txq->q) > txq->q.low_mark))
2207 iwl_wake_queue(priv, txq_id);
2208 }
2209
2210 if (qc && likely(sta_id != IWL_INVALID_STATION))
2211 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2212
2213 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2214 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
2215 }
2216
2217 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2218 struct iwl_rx_phy_res *rx_resp)
2219 {
2220 /* data from PHY/DSP regarding signal strength, etc.,
2221 * contents are always there, not configurable by host. */
2222 struct iwl4965_rx_non_cfg_phy *ncphy =
2223 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2224 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2225 >> IWL49_AGC_DB_POS;
2226
2227 u32 valid_antennae =
2228 (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2229 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2230 u8 max_rssi = 0;
2231 u32 i;
2232
2233 /* Find max rssi among 3 possible receivers.
2234 * These values are measured by the digital signal processor (DSP).
2235 * They should stay fairly constant even as the signal strength varies,
2236 * if the radio's automatic gain control (AGC) is working right.
2237 * AGC value (see below) will provide the "interesting" info. */
2238 for (i = 0; i < 3; i++)
2239 if (valid_antennae & (1 << i))
2240 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2241
2242 IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2243 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2244 max_rssi, agc);
2245
2246 /* dBm = max_rssi dB - agc dB - constant.
2247 * Higher AGC (higher radio gain) means lower signal. */
2248 return max_rssi - agc - IWL49_RSSI_OFFSET;
2249 }
2250
2251
2252 /* Set up 4965-specific Rx frame reply handlers */
2253 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2254 {
2255 /* Legacy Rx frames */
2256 priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2257 /* Tx response */
2258 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2259 }
2260
2261 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2262 {
2263 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2264 }
2265
2266 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2267 {
2268 cancel_work_sync(&priv->txpower_work);
2269 }
2270
2271 static struct iwl_station_mgmt_ops iwl4965_station_mgmt = {
2272 .add_station = iwl_add_station_flags,
2273 .remove_station = iwl_remove_station,
2274 .find_station = iwl_find_station,
2275 .clear_station_table = iwl_clear_stations_table,
2276 };
2277
2278 static struct iwl_hcmd_ops iwl4965_hcmd = {
2279 .rxon_assoc = iwl4965_send_rxon_assoc,
2280 .commit_rxon = iwl_commit_rxon,
2281 .set_rxon_chain = iwl_set_rxon_chain,
2282 };
2283
2284 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2285 .get_hcmd_size = iwl4965_get_hcmd_size,
2286 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2287 .chain_noise_reset = iwl4965_chain_noise_reset,
2288 .gain_computation = iwl4965_gain_computation,
2289 .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2290 .calc_rssi = iwl4965_calc_rssi,
2291 };
2292
2293 static struct iwl_lib_ops iwl4965_lib = {
2294 .set_hw_params = iwl4965_hw_set_hw_params,
2295 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2296 .txq_set_sched = iwl4965_txq_set_sched,
2297 .txq_agg_enable = iwl4965_txq_agg_enable,
2298 .txq_agg_disable = iwl4965_txq_agg_disable,
2299 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2300 .txq_free_tfd = iwl_hw_txq_free_tfd,
2301 .txq_init = iwl_hw_tx_queue_init,
2302 .rx_handler_setup = iwl4965_rx_handler_setup,
2303 .setup_deferred_work = iwl4965_setup_deferred_work,
2304 .cancel_deferred_work = iwl4965_cancel_deferred_work,
2305 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2306 .alive_notify = iwl4965_alive_notify,
2307 .init_alive_start = iwl4965_init_alive_start,
2308 .load_ucode = iwl4965_load_bsm,
2309 .apm_ops = {
2310 .init = iwl4965_apm_init,
2311 .reset = iwl4965_apm_reset,
2312 .stop = iwl4965_apm_stop,
2313 .config = iwl4965_nic_config,
2314 .set_pwr_src = iwl_set_pwr_src,
2315 },
2316 .eeprom_ops = {
2317 .regulatory_bands = {
2318 EEPROM_REGULATORY_BAND_1_CHANNELS,
2319 EEPROM_REGULATORY_BAND_2_CHANNELS,
2320 EEPROM_REGULATORY_BAND_3_CHANNELS,
2321 EEPROM_REGULATORY_BAND_4_CHANNELS,
2322 EEPROM_REGULATORY_BAND_5_CHANNELS,
2323 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2324 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2325 },
2326 .verify_signature = iwlcore_eeprom_verify_signature,
2327 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2328 .release_semaphore = iwlcore_eeprom_release_semaphore,
2329 .calib_version = iwl4965_eeprom_calib_version,
2330 .query_addr = iwlcore_eeprom_query_addr,
2331 },
2332 .send_tx_power = iwl4965_send_tx_power,
2333 .update_chain_flags = iwl_update_chain_flags,
2334 .temperature = iwl4965_temperature_calib,
2335 .post_associate = iwl_post_associate,
2336 .config_ap = iwl_config_ap,
2337 };
2338
2339 static struct iwl_ops iwl4965_ops = {
2340 .lib = &iwl4965_lib,
2341 .hcmd = &iwl4965_hcmd,
2342 .utils = &iwl4965_hcmd_utils,
2343 .smgmt = &iwl4965_station_mgmt,
2344 };
2345
2346 struct iwl_cfg iwl4965_agn_cfg = {
2347 .name = "4965AGN",
2348 .fw_name_pre = IWL4965_FW_PRE,
2349 .ucode_api_max = IWL4965_UCODE_API_MAX,
2350 .ucode_api_min = IWL4965_UCODE_API_MIN,
2351 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2352 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2353 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2354 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2355 .ops = &iwl4965_ops,
2356 .mod_params = &iwl4965_mod_params,
2357 };
2358
2359 /* Module firmware */
2360 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2361
2362 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2363 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2364 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2365 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2366 module_param_named(debug, iwl4965_mod_params.debug, uint, 0444);
2367 MODULE_PARM_DESC(debug, "debug output mask");
2368 module_param_named(
2369 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2370 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2371
2372 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2373 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2374 /* 11n */
2375 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2376 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2377 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2378 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2379
2380 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2381 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");
Linux kernel - Deliverables
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