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iwlwifi: A-MPDU Tx activation by load measures
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40
41 #include "iwl-4965.h"
42 #include "iwl-helpers.h"
43
44 static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv);
45
46 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
47 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
48 IWL_RATE_SISO_##s##M_PLCP, \
49 IWL_RATE_MIMO_##s##M_PLCP, \
50 IWL_RATE_##r##M_IEEE, \
51 IWL_RATE_##ip##M_INDEX, \
52 IWL_RATE_##in##M_INDEX, \
53 IWL_RATE_##rp##M_INDEX, \
54 IWL_RATE_##rn##M_INDEX, \
55 IWL_RATE_##pp##M_INDEX, \
56 IWL_RATE_##np##M_INDEX }
57
58 /*
59 * Parameter order:
60 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
61 *
62 * If there isn't a valid next or previous rate then INV is used which
63 * maps to IWL_RATE_INVALID
64 *
65 */
66 const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
67 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
68 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
69 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
70 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
71 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
72 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
73 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
74 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
75 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
76 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
77 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
78 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
79 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
80 };
81
82 #ifdef CONFIG_IWL4965_HT
83
84 static const u16 default_tid_to_tx_fifo[] = {
85 IWL_TX_FIFO_AC1,
86 IWL_TX_FIFO_AC0,
87 IWL_TX_FIFO_AC0,
88 IWL_TX_FIFO_AC1,
89 IWL_TX_FIFO_AC2,
90 IWL_TX_FIFO_AC2,
91 IWL_TX_FIFO_AC3,
92 IWL_TX_FIFO_AC3,
93 IWL_TX_FIFO_NONE,
94 IWL_TX_FIFO_NONE,
95 IWL_TX_FIFO_NONE,
96 IWL_TX_FIFO_NONE,
97 IWL_TX_FIFO_NONE,
98 IWL_TX_FIFO_NONE,
99 IWL_TX_FIFO_NONE,
100 IWL_TX_FIFO_NONE,
101 IWL_TX_FIFO_AC3
102 };
103
104 #endif /*CONFIG_IWL4965_HT */
105
106 static int is_fat_channel(__le32 rxon_flags)
107 {
108 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
109 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
110 }
111
112 static u8 is_single_stream(struct iwl4965_priv *priv)
113 {
114 #ifdef CONFIG_IWL4965_HT
115 if (!priv->current_ht_config.is_ht ||
116 (priv->current_ht_config.supp_mcs_set[1] == 0) ||
117 (priv->ps_mode == IWL_MIMO_PS_STATIC))
118 return 1;
119 #else
120 return 1;
121 #endif /*CONFIG_IWL4965_HT */
122 return 0;
123 }
124
125 /*
126 * Determine how many receiver/antenna chains to use.
127 * More provides better reception via diversity. Fewer saves power.
128 * MIMO (dual stream) requires at least 2, but works better with 3.
129 * This does not determine *which* chains to use, just how many.
130 */
131 static int iwl4965_get_rx_chain_counter(struct iwl4965_priv *priv,
132 u8 *idle_state, u8 *rx_state)
133 {
134 u8 is_single = is_single_stream(priv);
135 u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
136
137 /* # of Rx chains to use when expecting MIMO. */
138 if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
139 *rx_state = 2;
140 else
141 *rx_state = 3;
142
143 /* # Rx chains when idling and maybe trying to save power */
144 switch (priv->ps_mode) {
145 case IWL_MIMO_PS_STATIC:
146 case IWL_MIMO_PS_DYNAMIC:
147 *idle_state = (is_cam) ? 2 : 1;
148 break;
149 case IWL_MIMO_PS_NONE:
150 *idle_state = (is_cam) ? *rx_state : 1;
151 break;
152 default:
153 *idle_state = 1;
154 break;
155 }
156
157 return 0;
158 }
159
160 int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv)
161 {
162 int rc;
163 unsigned long flags;
164
165 spin_lock_irqsave(&priv->lock, flags);
166 rc = iwl4965_grab_nic_access(priv);
167 if (rc) {
168 spin_unlock_irqrestore(&priv->lock, flags);
169 return rc;
170 }
171
172 /* stop Rx DMA */
173 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
174 rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
175 (1 << 24), 1000);
176 if (rc < 0)
177 IWL_ERROR("Can't stop Rx DMA.\n");
178
179 iwl4965_release_nic_access(priv);
180 spin_unlock_irqrestore(&priv->lock, flags);
181
182 return 0;
183 }
184
185 u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *addr)
186 {
187 int i;
188 int start = 0;
189 int ret = IWL_INVALID_STATION;
190 unsigned long flags;
191 DECLARE_MAC_BUF(mac);
192
193 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) ||
194 (priv->iw_mode == IEEE80211_IF_TYPE_AP))
195 start = IWL_STA_ID;
196
197 if (is_broadcast_ether_addr(addr))
198 return IWL4965_BROADCAST_ID;
199
200 spin_lock_irqsave(&priv->sta_lock, flags);
201 for (i = start; i < priv->hw_setting.max_stations; i++)
202 if ((priv->stations[i].used) &&
203 (!compare_ether_addr
204 (priv->stations[i].sta.sta.addr, addr))) {
205 ret = i;
206 goto out;
207 }
208
209 IWL_DEBUG_ASSOC_LIMIT("can not find STA %s total %d\n",
210 print_mac(mac, addr), priv->num_stations);
211
212 out:
213 spin_unlock_irqrestore(&priv->sta_lock, flags);
214 return ret;
215 }
216
217 static int iwl4965_nic_set_pwr_src(struct iwl4965_priv *priv, int pwr_max)
218 {
219 int ret;
220 unsigned long flags;
221
222 spin_lock_irqsave(&priv->lock, flags);
223 ret = iwl4965_grab_nic_access(priv);
224 if (ret) {
225 spin_unlock_irqrestore(&priv->lock, flags);
226 return ret;
227 }
228
229 if (!pwr_max) {
230 u32 val;
231
232 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
233 &val);
234
235 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
236 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
237 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
238 ~APMG_PS_CTRL_MSK_PWR_SRC);
239 } else
240 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
241 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
242 ~APMG_PS_CTRL_MSK_PWR_SRC);
243
244 iwl4965_release_nic_access(priv);
245 spin_unlock_irqrestore(&priv->lock, flags);
246
247 return ret;
248 }
249
250 static int iwl4965_rx_init(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
251 {
252 int rc;
253 unsigned long flags;
254 unsigned int rb_size;
255
256 spin_lock_irqsave(&priv->lock, flags);
257 rc = iwl4965_grab_nic_access(priv);
258 if (rc) {
259 spin_unlock_irqrestore(&priv->lock, flags);
260 return rc;
261 }
262
263 if (iwl4965_param_amsdu_size_8K)
264 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
265 else
266 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
267
268 /* Stop Rx DMA */
269 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
270
271 /* Reset driver's Rx queue write index */
272 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
273
274 /* Tell device where to find RBD circular buffer in DRAM */
275 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
276 rxq->dma_addr >> 8);
277
278 /* Tell device where in DRAM to update its Rx status */
279 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
280 (priv->hw_setting.shared_phys +
281 offsetof(struct iwl4965_shared, val0)) >> 4);
282
283 /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
284 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
285 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
286 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
287 rb_size |
288 /*0x10 << 4 | */
289 (RX_QUEUE_SIZE_LOG <<
290 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
291
292 /*
293 * iwl4965_write32(priv,CSR_INT_COAL_REG,0);
294 */
295
296 iwl4965_release_nic_access(priv);
297 spin_unlock_irqrestore(&priv->lock, flags);
298
299 return 0;
300 }
301
302 /* Tell 4965 where to find the "keep warm" buffer */
303 static int iwl4965_kw_init(struct iwl4965_priv *priv)
304 {
305 unsigned long flags;
306 int rc;
307
308 spin_lock_irqsave(&priv->lock, flags);
309 rc = iwl4965_grab_nic_access(priv);
310 if (rc)
311 goto out;
312
313 iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
314 priv->kw.dma_addr >> 4);
315 iwl4965_release_nic_access(priv);
316 out:
317 spin_unlock_irqrestore(&priv->lock, flags);
318 return rc;
319 }
320
321 static int iwl4965_kw_alloc(struct iwl4965_priv *priv)
322 {
323 struct pci_dev *dev = priv->pci_dev;
324 struct iwl4965_kw *kw = &priv->kw;
325
326 kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
327 kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
328 if (!kw->v_addr)
329 return -ENOMEM;
330
331 return 0;
332 }
333
334 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
335 ? # x " " : "")
336
337 /**
338 * iwl4965_set_fat_chan_info - Copy fat channel info into driver's priv.
339 *
340 * Does not set up a command, or touch hardware.
341 */
342 int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv, int phymode, u16 channel,
343 const struct iwl4965_eeprom_channel *eeprom_ch,
344 u8 fat_extension_channel)
345 {
346 struct iwl4965_channel_info *ch_info;
347
348 ch_info = (struct iwl4965_channel_info *)
349 iwl4965_get_channel_info(priv, phymode, channel);
350
351 if (!is_channel_valid(ch_info))
352 return -1;
353
354 IWL_DEBUG_INFO("FAT Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
355 " %ddBm): Ad-Hoc %ssupported\n",
356 ch_info->channel,
357 is_channel_a_band(ch_info) ?
358 "5.2" : "2.4",
359 CHECK_AND_PRINT(IBSS),
360 CHECK_AND_PRINT(ACTIVE),
361 CHECK_AND_PRINT(RADAR),
362 CHECK_AND_PRINT(WIDE),
363 CHECK_AND_PRINT(NARROW),
364 CHECK_AND_PRINT(DFS),
365 eeprom_ch->flags,
366 eeprom_ch->max_power_avg,
367 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
368 && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
369 "" : "not ");
370
371 ch_info->fat_eeprom = *eeprom_ch;
372 ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
373 ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
374 ch_info->fat_min_power = 0;
375 ch_info->fat_scan_power = eeprom_ch->max_power_avg;
376 ch_info->fat_flags = eeprom_ch->flags;
377 ch_info->fat_extension_channel = fat_extension_channel;
378
379 return 0;
380 }
381
382 /**
383 * iwl4965_kw_free - Free the "keep warm" buffer
384 */
385 static void iwl4965_kw_free(struct iwl4965_priv *priv)
386 {
387 struct pci_dev *dev = priv->pci_dev;
388 struct iwl4965_kw *kw = &priv->kw;
389
390 if (kw->v_addr) {
391 pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
392 memset(kw, 0, sizeof(*kw));
393 }
394 }
395
396 /**
397 * iwl4965_txq_ctx_reset - Reset TX queue context
398 * Destroys all DMA structures and initialise them again
399 *
400 * @param priv
401 * @return error code
402 */
403 static int iwl4965_txq_ctx_reset(struct iwl4965_priv *priv)
404 {
405 int rc = 0;
406 int txq_id, slots_num;
407 unsigned long flags;
408
409 iwl4965_kw_free(priv);
410
411 /* Free all tx/cmd queues and keep-warm buffer */
412 iwl4965_hw_txq_ctx_free(priv);
413
414 /* Alloc keep-warm buffer */
415 rc = iwl4965_kw_alloc(priv);
416 if (rc) {
417 IWL_ERROR("Keep Warm allocation failed");
418 goto error_kw;
419 }
420
421 spin_lock_irqsave(&priv->lock, flags);
422
423 rc = iwl4965_grab_nic_access(priv);
424 if (unlikely(rc)) {
425 IWL_ERROR("TX reset failed");
426 spin_unlock_irqrestore(&priv->lock, flags);
427 goto error_reset;
428 }
429
430 /* Turn off all Tx DMA channels */
431 iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0);
432 iwl4965_release_nic_access(priv);
433 spin_unlock_irqrestore(&priv->lock, flags);
434
435 /* Tell 4965 where to find the keep-warm buffer */
436 rc = iwl4965_kw_init(priv);
437 if (rc) {
438 IWL_ERROR("kw_init failed\n");
439 goto error_reset;
440 }
441
442 /* Alloc and init all (default 16) Tx queues,
443 * including the command queue (#4) */
444 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
445 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
446 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
447 rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
448 txq_id);
449 if (rc) {
450 IWL_ERROR("Tx %d queue init failed\n", txq_id);
451 goto error;
452 }
453 }
454
455 return rc;
456
457 error:
458 iwl4965_hw_txq_ctx_free(priv);
459 error_reset:
460 iwl4965_kw_free(priv);
461 error_kw:
462 return rc;
463 }
464
465 int iwl4965_hw_nic_init(struct iwl4965_priv *priv)
466 {
467 int rc;
468 unsigned long flags;
469 struct iwl4965_rx_queue *rxq = &priv->rxq;
470 u8 rev_id;
471 u32 val;
472 u8 val_link;
473
474 iwl4965_power_init_handle(priv);
475
476 /* nic_init */
477 spin_lock_irqsave(&priv->lock, flags);
478
479 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
480 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
481
482 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
483 rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
484 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
485 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
486 if (rc < 0) {
487 spin_unlock_irqrestore(&priv->lock, flags);
488 IWL_DEBUG_INFO("Failed to init the card\n");
489 return rc;
490 }
491
492 rc = iwl4965_grab_nic_access(priv);
493 if (rc) {
494 spin_unlock_irqrestore(&priv->lock, flags);
495 return rc;
496 }
497
498 iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
499
500 iwl4965_write_prph(priv, APMG_CLK_CTRL_REG,
501 APMG_CLK_VAL_DMA_CLK_RQT |
502 APMG_CLK_VAL_BSM_CLK_RQT);
503 iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
504
505 udelay(20);
506
507 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
508 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
509
510 iwl4965_release_nic_access(priv);
511 iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32);
512 spin_unlock_irqrestore(&priv->lock, flags);
513
514 /* Determine HW type */
515 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
516 if (rc)
517 return rc;
518
519 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
520
521 iwl4965_nic_set_pwr_src(priv, 1);
522 spin_lock_irqsave(&priv->lock, flags);
523
524 if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
525 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
526 /* Enable No Snoop field */
527 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
528 val & ~(1 << 11));
529 }
530
531 spin_unlock_irqrestore(&priv->lock, flags);
532
533 if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
534 IWL_ERROR("Older EEPROM detected! Aborting.\n");
535 return -EINVAL;
536 }
537
538 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
539
540 /* disable L1 entry -- workaround for pre-B1 */
541 pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
542
543 spin_lock_irqsave(&priv->lock, flags);
544
545 /* set CSR_HW_CONFIG_REG for uCode use */
546
547 iwl4965_set_bit(priv, CSR_SW_VER, CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R |
548 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
549 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
550
551 rc = iwl4965_grab_nic_access(priv);
552 if (rc < 0) {
553 spin_unlock_irqrestore(&priv->lock, flags);
554 IWL_DEBUG_INFO("Failed to init the card\n");
555 return rc;
556 }
557
558 iwl4965_read_prph(priv, APMG_PS_CTRL_REG);
559 iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG,
560 APMG_PS_CTRL_VAL_RESET_REQ);
561 udelay(5);
562 iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG,
563 APMG_PS_CTRL_VAL_RESET_REQ);
564
565 iwl4965_release_nic_access(priv);
566 spin_unlock_irqrestore(&priv->lock, flags);
567
568 iwl4965_hw_card_show_info(priv);
569
570 /* end nic_init */
571
572 /* Allocate the RX queue, or reset if it is already allocated */
573 if (!rxq->bd) {
574 rc = iwl4965_rx_queue_alloc(priv);
575 if (rc) {
576 IWL_ERROR("Unable to initialize Rx queue\n");
577 return -ENOMEM;
578 }
579 } else
580 iwl4965_rx_queue_reset(priv, rxq);
581
582 iwl4965_rx_replenish(priv);
583
584 iwl4965_rx_init(priv, rxq);
585
586 spin_lock_irqsave(&priv->lock, flags);
587
588 rxq->need_update = 1;
589 iwl4965_rx_queue_update_write_ptr(priv, rxq);
590
591 spin_unlock_irqrestore(&priv->lock, flags);
592
593 /* Allocate and init all Tx and Command queues */
594 rc = iwl4965_txq_ctx_reset(priv);
595 if (rc)
596 return rc;
597
598 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
599 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
600
601 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
602 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
603
604 set_bit(STATUS_INIT, &priv->status);
605
606 return 0;
607 }
608
609 int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv)
610 {
611 int rc = 0;
612 u32 reg_val;
613 unsigned long flags;
614
615 spin_lock_irqsave(&priv->lock, flags);
616
617 /* set stop master bit */
618 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
619
620 reg_val = iwl4965_read32(priv, CSR_GP_CNTRL);
621
622 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
623 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
624 IWL_DEBUG_INFO("Card in power save, master is already "
625 "stopped\n");
626 else {
627 rc = iwl4965_poll_bit(priv, CSR_RESET,
628 CSR_RESET_REG_FLAG_MASTER_DISABLED,
629 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
630 if (rc < 0) {
631 spin_unlock_irqrestore(&priv->lock, flags);
632 return rc;
633 }
634 }
635
636 spin_unlock_irqrestore(&priv->lock, flags);
637 IWL_DEBUG_INFO("stop master\n");
638
639 return rc;
640 }
641
642 /**
643 * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
644 */
645 void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv)
646 {
647
648 int txq_id;
649 unsigned long flags;
650
651 /* Stop each Tx DMA channel, and wait for it to be idle */
652 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
653 spin_lock_irqsave(&priv->lock, flags);
654 if (iwl4965_grab_nic_access(priv)) {
655 spin_unlock_irqrestore(&priv->lock, flags);
656 continue;
657 }
658
659 iwl4965_write_direct32(priv,
660 IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
661 0x0);
662 iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
663 IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
664 (txq_id), 200);
665 iwl4965_release_nic_access(priv);
666 spin_unlock_irqrestore(&priv->lock, flags);
667 }
668
669 /* Deallocate memory for all Tx queues */
670 iwl4965_hw_txq_ctx_free(priv);
671 }
672
673 int iwl4965_hw_nic_reset(struct iwl4965_priv *priv)
674 {
675 int rc = 0;
676 unsigned long flags;
677
678 iwl4965_hw_nic_stop_master(priv);
679
680 spin_lock_irqsave(&priv->lock, flags);
681
682 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
683
684 udelay(10);
685
686 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
687 rc = iwl4965_poll_bit(priv, CSR_RESET,
688 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
689 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
690
691 udelay(10);
692
693 rc = iwl4965_grab_nic_access(priv);
694 if (!rc) {
695 iwl4965_write_prph(priv, APMG_CLK_EN_REG,
696 APMG_CLK_VAL_DMA_CLK_RQT |
697 APMG_CLK_VAL_BSM_CLK_RQT);
698
699 udelay(10);
700
701 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
702 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
703
704 iwl4965_release_nic_access(priv);
705 }
706
707 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
708 wake_up_interruptible(&priv->wait_command_queue);
709
710 spin_unlock_irqrestore(&priv->lock, flags);
711
712 return rc;
713
714 }
715
716 #define REG_RECALIB_PERIOD (60)
717
718 /**
719 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
720 *
721 * This callback is provided in order to queue the statistics_work
722 * in work_queue context (v. softirq)
723 *
724 * This timer function is continually reset to execute within
725 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
726 * was received. We need to ensure we receive the statistics in order
727 * to update the temperature used for calibrating the TXPOWER. However,
728 * we can't send the statistics command from softirq context (which
729 * is the context which timers run at) so we have to queue off the
730 * statistics_work to actually send the command to the hardware.
731 */
732 static void iwl4965_bg_statistics_periodic(unsigned long data)
733 {
734 struct iwl4965_priv *priv = (struct iwl4965_priv *)data;
735
736 queue_work(priv->workqueue, &priv->statistics_work);
737 }
738
739 /**
740 * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
741 *
742 * This is queued by iwl4965_bg_statistics_periodic.
743 */
744 static void iwl4965_bg_statistics_work(struct work_struct *work)
745 {
746 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
747 statistics_work);
748
749 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
750 return;
751
752 mutex_lock(&priv->mutex);
753 iwl4965_send_statistics_request(priv);
754 mutex_unlock(&priv->mutex);
755 }
756
757 #define CT_LIMIT_CONST 259
758 #define TM_CT_KILL_THRESHOLD 110
759
760 void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv)
761 {
762 struct iwl4965_ct_kill_config cmd;
763 u32 R1, R2, R3;
764 u32 temp_th;
765 u32 crit_temperature;
766 unsigned long flags;
767 int rc = 0;
768
769 spin_lock_irqsave(&priv->lock, flags);
770 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
771 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
772 spin_unlock_irqrestore(&priv->lock, flags);
773
774 if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
775 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
776 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
777 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
778 } else {
779 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
780 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
781 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
782 }
783
784 temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
785
786 crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
787 cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
788 rc = iwl4965_send_cmd_pdu(priv,
789 REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd);
790 if (rc)
791 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
792 else
793 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
794 }
795
796 #ifdef CONFIG_IWL4965_SENSITIVITY
797
798 /* "false alarms" are signals that our DSP tries to lock onto,
799 * but then determines that they are either noise, or transmissions
800 * from a distant wireless network (also "noise", really) that get
801 * "stepped on" by stronger transmissions within our own network.
802 * This algorithm attempts to set a sensitivity level that is high
803 * enough to receive all of our own network traffic, but not so
804 * high that our DSP gets too busy trying to lock onto non-network
805 * activity/noise. */
806 static int iwl4965_sens_energy_cck(struct iwl4965_priv *priv,
807 u32 norm_fa,
808 u32 rx_enable_time,
809 struct statistics_general_data *rx_info)
810 {
811 u32 max_nrg_cck = 0;
812 int i = 0;
813 u8 max_silence_rssi = 0;
814 u32 silence_ref = 0;
815 u8 silence_rssi_a = 0;
816 u8 silence_rssi_b = 0;
817 u8 silence_rssi_c = 0;
818 u32 val;
819
820 /* "false_alarms" values below are cross-multiplications to assess the
821 * numbers of false alarms within the measured period of actual Rx
822 * (Rx is off when we're txing), vs the min/max expected false alarms
823 * (some should be expected if rx is sensitive enough) in a
824 * hypothetical listening period of 200 time units (TU), 204.8 msec:
825 *
826 * MIN_FA/fixed-time < false_alarms/actual-rx-time < MAX_FA/beacon-time
827 *
828 * */
829 u32 false_alarms = norm_fa * 200 * 1024;
830 u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
831 u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
832 struct iwl4965_sensitivity_data *data = NULL;
833
834 data = &(priv->sensitivity_data);
835
836 data->nrg_auto_corr_silence_diff = 0;
837
838 /* Find max silence rssi among all 3 receivers.
839 * This is background noise, which may include transmissions from other
840 * networks, measured during silence before our network's beacon */
841 silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a &
842 ALL_BAND_FILTER) >> 8);
843 silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b &
844 ALL_BAND_FILTER) >> 8);
845 silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c &
846 ALL_BAND_FILTER) >> 8);
847
848 val = max(silence_rssi_b, silence_rssi_c);
849 max_silence_rssi = max(silence_rssi_a, (u8) val);
850
851 /* Store silence rssi in 20-beacon history table */
852 data->nrg_silence_rssi[data->nrg_silence_idx] = max_silence_rssi;
853 data->nrg_silence_idx++;
854 if (data->nrg_silence_idx >= NRG_NUM_PREV_STAT_L)
855 data->nrg_silence_idx = 0;
856
857 /* Find max silence rssi across 20 beacon history */
858 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) {
859 val = data->nrg_silence_rssi[i];
860 silence_ref = max(silence_ref, val);
861 }
862 IWL_DEBUG_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n",
863 silence_rssi_a, silence_rssi_b, silence_rssi_c,
864 silence_ref);
865
866 /* Find max rx energy (min value!) among all 3 receivers,
867 * measured during beacon frame.
868 * Save it in 10-beacon history table. */
869 i = data->nrg_energy_idx;
870 val = min(rx_info->beacon_energy_b, rx_info->beacon_energy_c);
871 data->nrg_value[i] = min(rx_info->beacon_energy_a, val);
872
873 data->nrg_energy_idx++;
874 if (data->nrg_energy_idx >= 10)
875 data->nrg_energy_idx = 0;
876
877 /* Find min rx energy (max value) across 10 beacon history.
878 * This is the minimum signal level that we want to receive well.
879 * Add backoff (margin so we don't miss slightly lower energy frames).
880 * This establishes an upper bound (min value) for energy threshold. */
881 max_nrg_cck = data->nrg_value[0];
882 for (i = 1; i < 10; i++)
883 max_nrg_cck = (u32) max(max_nrg_cck, (data->nrg_value[i]));
884 max_nrg_cck += 6;
885
886 IWL_DEBUG_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n",
887 rx_info->beacon_energy_a, rx_info->beacon_energy_b,
888 rx_info->beacon_energy_c, max_nrg_cck - 6);
889
890 /* Count number of consecutive beacons with fewer-than-desired
891 * false alarms. */
892 if (false_alarms < min_false_alarms)
893 data->num_in_cck_no_fa++;
894 else
895 data->num_in_cck_no_fa = 0;
896 IWL_DEBUG_CALIB("consecutive bcns with few false alarms = %u\n",
897 data->num_in_cck_no_fa);
898
899 /* If we got too many false alarms this time, reduce sensitivity */
900 if (false_alarms > max_false_alarms) {
901 IWL_DEBUG_CALIB("norm FA %u > max FA %u\n",
902 false_alarms, max_false_alarms);
903 IWL_DEBUG_CALIB("... reducing sensitivity\n");
904 data->nrg_curr_state = IWL_FA_TOO_MANY;
905
906 if (data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) {
907 /* Store for "fewer than desired" on later beacon */
908 data->nrg_silence_ref = silence_ref;
909
910 /* increase energy threshold (reduce nrg value)
911 * to decrease sensitivity */
912 if (data->nrg_th_cck > (NRG_MAX_CCK + NRG_STEP_CCK))
913 data->nrg_th_cck = data->nrg_th_cck
914 - NRG_STEP_CCK;
915 }
916
917 /* increase auto_corr values to decrease sensitivity */
918 if (data->auto_corr_cck < AUTO_CORR_MAX_TH_CCK)
919 data->auto_corr_cck = AUTO_CORR_MAX_TH_CCK + 1;
920 else {
921 val = data->auto_corr_cck + AUTO_CORR_STEP_CCK;
922 data->auto_corr_cck = min((u32)AUTO_CORR_MAX_CCK, val);
923 }
924 val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK;
925 data->auto_corr_cck_mrc = min((u32)AUTO_CORR_MAX_CCK_MRC, val);
926
927 /* Else if we got fewer than desired, increase sensitivity */
928 } else if (false_alarms < min_false_alarms) {
929 data->nrg_curr_state = IWL_FA_TOO_FEW;
930
931 /* Compare silence level with silence level for most recent
932 * healthy number or too many false alarms */
933 data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref -
934 (s32)silence_ref;
935
936 IWL_DEBUG_CALIB("norm FA %u < min FA %u, silence diff %d\n",
937 false_alarms, min_false_alarms,
938 data->nrg_auto_corr_silence_diff);
939
940 /* Increase value to increase sensitivity, but only if:
941 * 1a) previous beacon did *not* have *too many* false alarms
942 * 1b) AND there's a significant difference in Rx levels
943 * from a previous beacon with too many, or healthy # FAs
944 * OR 2) We've seen a lot of beacons (100) with too few
945 * false alarms */
946 if ((data->nrg_prev_state != IWL_FA_TOO_MANY) &&
947 ((data->nrg_auto_corr_silence_diff > NRG_DIFF) ||
948 (data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA))) {
949
950 IWL_DEBUG_CALIB("... increasing sensitivity\n");
951 /* Increase nrg value to increase sensitivity */
952 val = data->nrg_th_cck + NRG_STEP_CCK;
953 data->nrg_th_cck = min((u32)NRG_MIN_CCK, val);
954
955 /* Decrease auto_corr values to increase sensitivity */
956 val = data->auto_corr_cck - AUTO_CORR_STEP_CCK;
957 data->auto_corr_cck = max((u32)AUTO_CORR_MIN_CCK, val);
958
959 val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK;
960 data->auto_corr_cck_mrc =
961 max((u32)AUTO_CORR_MIN_CCK_MRC, val);
962
963 } else
964 IWL_DEBUG_CALIB("... but not changing sensitivity\n");
965
966 /* Else we got a healthy number of false alarms, keep status quo */
967 } else {
968 IWL_DEBUG_CALIB(" FA in safe zone\n");
969 data->nrg_curr_state = IWL_FA_GOOD_RANGE;
970
971 /* Store for use in "fewer than desired" with later beacon */
972 data->nrg_silence_ref = silence_ref;
973
974 /* If previous beacon had too many false alarms,
975 * give it some extra margin by reducing sensitivity again
976 * (but don't go below measured energy of desired Rx) */
977 if (IWL_FA_TOO_MANY == data->nrg_prev_state) {
978 IWL_DEBUG_CALIB("... increasing margin\n");
979 data->nrg_th_cck -= NRG_MARGIN;
980 }
981 }
982
983 /* Make sure the energy threshold does not go above the measured
984 * energy of the desired Rx signals (reduced by backoff margin),
985 * or else we might start missing Rx frames.
986 * Lower value is higher energy, so we use max()!
987 */
988 data->nrg_th_cck = max(max_nrg_cck, data->nrg_th_cck);
989 IWL_DEBUG_CALIB("new nrg_th_cck %u\n", data->nrg_th_cck);
990
991 data->nrg_prev_state = data->nrg_curr_state;
992
993 return 0;
994 }
995
996
997 static int iwl4965_sens_auto_corr_ofdm(struct iwl4965_priv *priv,
998 u32 norm_fa,
999 u32 rx_enable_time)
1000 {
1001 u32 val;
1002 u32 false_alarms = norm_fa * 200 * 1024;
1003 u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
1004 u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
1005 struct iwl4965_sensitivity_data *data = NULL;
1006
1007 data = &(priv->sensitivity_data);
1008
1009 /* If we got too many false alarms this time, reduce sensitivity */
1010 if (false_alarms > max_false_alarms) {
1011
1012 IWL_DEBUG_CALIB("norm FA %u > max FA %u)\n",
1013 false_alarms, max_false_alarms);
1014
1015 val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM;
1016 data->auto_corr_ofdm =
1017 min((u32)AUTO_CORR_MAX_OFDM, val);
1018
1019 val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM;
1020 data->auto_corr_ofdm_mrc =
1021 min((u32)AUTO_CORR_MAX_OFDM_MRC, val);
1022
1023 val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM;
1024 data->auto_corr_ofdm_x1 =
1025 min((u32)AUTO_CORR_MAX_OFDM_X1, val);
1026
1027 val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM;
1028 data->auto_corr_ofdm_mrc_x1 =
1029 min((u32)AUTO_CORR_MAX_OFDM_MRC_X1, val);
1030 }
1031
1032 /* Else if we got fewer than desired, increase sensitivity */
1033 else if (false_alarms < min_false_alarms) {
1034
1035 IWL_DEBUG_CALIB("norm FA %u < min FA %u\n",
1036 false_alarms, min_false_alarms);
1037
1038 val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM;
1039 data->auto_corr_ofdm =
1040 max((u32)AUTO_CORR_MIN_OFDM, val);
1041
1042 val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM;
1043 data->auto_corr_ofdm_mrc =
1044 max((u32)AUTO_CORR_MIN_OFDM_MRC, val);
1045
1046 val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM;
1047 data->auto_corr_ofdm_x1 =
1048 max((u32)AUTO_CORR_MIN_OFDM_X1, val);
1049
1050 val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM;
1051 data->auto_corr_ofdm_mrc_x1 =
1052 max((u32)AUTO_CORR_MIN_OFDM_MRC_X1, val);
1053 }
1054
1055 else
1056 IWL_DEBUG_CALIB("min FA %u < norm FA %u < max FA %u OK\n",
1057 min_false_alarms, false_alarms, max_false_alarms);
1058
1059 return 0;
1060 }
1061
1062 static int iwl4965_sensitivity_callback(struct iwl4965_priv *priv,
1063 struct iwl4965_cmd *cmd, struct sk_buff *skb)
1064 {
1065 /* We didn't cache the SKB; let the caller free it */
1066 return 1;
1067 }
1068
1069 /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
1070 static int iwl4965_sensitivity_write(struct iwl4965_priv *priv, u8 flags)
1071 {
1072 int rc = 0;
1073 struct iwl4965_sensitivity_cmd cmd ;
1074 struct iwl4965_sensitivity_data *data = NULL;
1075 struct iwl4965_host_cmd cmd_out = {
1076 .id = SENSITIVITY_CMD,
1077 .len = sizeof(struct iwl4965_sensitivity_cmd),
1078 .meta.flags = flags,
1079 .data = &cmd,
1080 };
1081
1082 data = &(priv->sensitivity_data);
1083
1084 memset(&cmd, 0, sizeof(cmd));
1085
1086 cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX] =
1087 cpu_to_le16((u16)data->auto_corr_ofdm);
1088 cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX] =
1089 cpu_to_le16((u16)data->auto_corr_ofdm_mrc);
1090 cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX] =
1091 cpu_to_le16((u16)data->auto_corr_ofdm_x1);
1092 cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX] =
1093 cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1);
1094
1095 cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX] =
1096 cpu_to_le16((u16)data->auto_corr_cck);
1097 cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX] =
1098 cpu_to_le16((u16)data->auto_corr_cck_mrc);
1099
1100 cmd.table[HD_MIN_ENERGY_CCK_DET_INDEX] =
1101 cpu_to_le16((u16)data->nrg_th_cck);
1102 cmd.table[HD_MIN_ENERGY_OFDM_DET_INDEX] =
1103 cpu_to_le16((u16)data->nrg_th_ofdm);
1104
1105 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
1106 __constant_cpu_to_le16(190);
1107 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
1108 __constant_cpu_to_le16(390);
1109 cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
1110 __constant_cpu_to_le16(62);
1111
1112 IWL_DEBUG_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
1113 data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
1114 data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1,
1115 data->nrg_th_ofdm);
1116
1117 IWL_DEBUG_CALIB("cck: ac %u mrc %u thresh %u\n",
1118 data->auto_corr_cck, data->auto_corr_cck_mrc,
1119 data->nrg_th_cck);
1120
1121 /* Update uCode's "work" table, and copy it to DSP */
1122 cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
1123
1124 if (flags & CMD_ASYNC)
1125 cmd_out.meta.u.callback = iwl4965_sensitivity_callback;
1126
1127 /* Don't send command to uCode if nothing has changed */
1128 if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
1129 sizeof(u16)*HD_TABLE_SIZE)) {
1130 IWL_DEBUG_CALIB("No change in SENSITIVITY_CMD\n");
1131 return 0;
1132 }
1133
1134 /* Copy table for comparison next time */
1135 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
1136 sizeof(u16)*HD_TABLE_SIZE);
1137
1138 rc = iwl4965_send_cmd(priv, &cmd_out);
1139 if (!rc) {
1140 IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n");
1141 return rc;
1142 }
1143
1144 return 0;
1145 }
1146
1147 void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags, u8 force)
1148 {
1149 int rc = 0;
1150 int i;
1151 struct iwl4965_sensitivity_data *data = NULL;
1152
1153 IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
1154
1155 if (force)
1156 memset(&(priv->sensitivity_tbl[0]), 0,
1157 sizeof(u16)*HD_TABLE_SIZE);
1158
1159 /* Clear driver's sensitivity algo data */
1160 data = &(priv->sensitivity_data);
1161 memset(data, 0, sizeof(struct iwl4965_sensitivity_data));
1162
1163 data->num_in_cck_no_fa = 0;
1164 data->nrg_curr_state = IWL_FA_TOO_MANY;
1165 data->nrg_prev_state = IWL_FA_TOO_MANY;
1166 data->nrg_silence_ref = 0;
1167 data->nrg_silence_idx = 0;
1168 data->nrg_energy_idx = 0;
1169
1170 for (i = 0; i < 10; i++)
1171 data->nrg_value[i] = 0;
1172
1173 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
1174 data->nrg_silence_rssi[i] = 0;
1175
1176 data->auto_corr_ofdm = 90;
1177 data->auto_corr_ofdm_mrc = 170;
1178 data->auto_corr_ofdm_x1 = 105;
1179 data->auto_corr_ofdm_mrc_x1 = 220;
1180 data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF;
1181 data->auto_corr_cck_mrc = 200;
1182 data->nrg_th_cck = 100;
1183 data->nrg_th_ofdm = 100;
1184
1185 data->last_bad_plcp_cnt_ofdm = 0;
1186 data->last_fa_cnt_ofdm = 0;
1187 data->last_bad_plcp_cnt_cck = 0;
1188 data->last_fa_cnt_cck = 0;
1189
1190 /* Clear prior Sensitivity command data to force send to uCode */
1191 if (force)
1192 memset(&(priv->sensitivity_tbl[0]), 0,
1193 sizeof(u16)*HD_TABLE_SIZE);
1194
1195 rc |= iwl4965_sensitivity_write(priv, flags);
1196 IWL_DEBUG_CALIB("<<return 0x%X\n", rc);
1197
1198 return;
1199 }
1200
1201
1202 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
1203 * Called after every association, but this runs only once!
1204 * ... once chain noise is calibrated the first time, it's good forever. */
1205 void iwl4965_chain_noise_reset(struct iwl4965_priv *priv)
1206 {
1207 struct iwl4965_chain_noise_data *data = NULL;
1208 int rc = 0;
1209
1210 data = &(priv->chain_noise_data);
1211 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) {
1212 struct iwl4965_calibration_cmd cmd;
1213
1214 memset(&cmd, 0, sizeof(cmd));
1215 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1216 cmd.diff_gain_a = 0;
1217 cmd.diff_gain_b = 0;
1218 cmd.diff_gain_c = 0;
1219 rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1220 sizeof(cmd), &cmd);
1221 msleep(4);
1222 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
1223 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
1224 }
1225 return;
1226 }
1227
1228 /*
1229 * Accumulate 20 beacons of signal and noise statistics for each of
1230 * 3 receivers/antennas/rx-chains, then figure out:
1231 * 1) Which antennas are connected.
1232 * 2) Differential rx gain settings to balance the 3 receivers.
1233 */
1234 static void iwl4965_noise_calibration(struct iwl4965_priv *priv,
1235 struct iwl4965_notif_statistics *stat_resp)
1236 {
1237 struct iwl4965_chain_noise_data *data = NULL;
1238 int rc = 0;
1239
1240 u32 chain_noise_a;
1241 u32 chain_noise_b;
1242 u32 chain_noise_c;
1243 u32 chain_sig_a;
1244 u32 chain_sig_b;
1245 u32 chain_sig_c;
1246 u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1247 u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1248 u32 max_average_sig;
1249 u16 max_average_sig_antenna_i;
1250 u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE;
1251 u16 min_average_noise_antenna_i = INITIALIZATION_VALUE;
1252 u16 i = 0;
1253 u16 chan_num = INITIALIZATION_VALUE;
1254 u32 band = INITIALIZATION_VALUE;
1255 u32 active_chains = 0;
1256 unsigned long flags;
1257 struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
1258
1259 data = &(priv->chain_noise_data);
1260
1261 /* Accumulate just the first 20 beacons after the first association,
1262 * then we're done forever. */
1263 if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
1264 if (data->state == IWL_CHAIN_NOISE_ALIVE)
1265 IWL_DEBUG_CALIB("Wait for noise calib reset\n");
1266 return;
1267 }
1268
1269 spin_lock_irqsave(&priv->lock, flags);
1270 if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1271 IWL_DEBUG_CALIB(" << Interference data unavailable\n");
1272 spin_unlock_irqrestore(&priv->lock, flags);
1273 return;
1274 }
1275
1276 band = (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) ? 0 : 1;
1277 chan_num = le16_to_cpu(priv->staging_rxon.channel);
1278
1279 /* Make sure we accumulate data for just the associated channel
1280 * (even if scanning). */
1281 if ((chan_num != (le32_to_cpu(stat_resp->flag) >> 16)) ||
1282 ((STATISTICS_REPLY_FLG_BAND_24G_MSK ==
1283 (stat_resp->flag & STATISTICS_REPLY_FLG_BAND_24G_MSK)) && band)) {
1284 IWL_DEBUG_CALIB("Stats not from chan=%d, band=%d\n",
1285 chan_num, band);
1286 spin_unlock_irqrestore(&priv->lock, flags);
1287 return;
1288 }
1289
1290 /* Accumulate beacon statistics values across 20 beacons */
1291 chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
1292 IN_BAND_FILTER;
1293 chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
1294 IN_BAND_FILTER;
1295 chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) &
1296 IN_BAND_FILTER;
1297
1298 chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER;
1299 chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER;
1300 chain_sig_c = le32_to_cpu(rx_info->beacon_rssi_c) & IN_BAND_FILTER;
1301
1302 spin_unlock_irqrestore(&priv->lock, flags);
1303
1304 data->beacon_count++;
1305
1306 data->chain_noise_a = (chain_noise_a + data->chain_noise_a);
1307 data->chain_noise_b = (chain_noise_b + data->chain_noise_b);
1308 data->chain_noise_c = (chain_noise_c + data->chain_noise_c);
1309
1310 data->chain_signal_a = (chain_sig_a + data->chain_signal_a);
1311 data->chain_signal_b = (chain_sig_b + data->chain_signal_b);
1312 data->chain_signal_c = (chain_sig_c + data->chain_signal_c);
1313
1314 IWL_DEBUG_CALIB("chan=%d, band=%d, beacon=%d\n", chan_num, band,
1315 data->beacon_count);
1316 IWL_DEBUG_CALIB("chain_sig: a %d b %d c %d\n",
1317 chain_sig_a, chain_sig_b, chain_sig_c);
1318 IWL_DEBUG_CALIB("chain_noise: a %d b %d c %d\n",
1319 chain_noise_a, chain_noise_b, chain_noise_c);
1320
1321 /* If this is the 20th beacon, determine:
1322 * 1) Disconnected antennas (using signal strengths)
1323 * 2) Differential gain (using silence noise) to balance receivers */
1324 if (data->beacon_count == CAL_NUM_OF_BEACONS) {
1325
1326 /* Analyze signal for disconnected antenna */
1327 average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS;
1328 average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS;
1329 average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS;
1330
1331 if (average_sig[0] >= average_sig[1]) {
1332 max_average_sig = average_sig[0];
1333 max_average_sig_antenna_i = 0;
1334 active_chains = (1 << max_average_sig_antenna_i);
1335 } else {
1336 max_average_sig = average_sig[1];
1337 max_average_sig_antenna_i = 1;
1338 active_chains = (1 << max_average_sig_antenna_i);
1339 }
1340
1341 if (average_sig[2] >= max_average_sig) {
1342 max_average_sig = average_sig[2];
1343 max_average_sig_antenna_i = 2;
1344 active_chains = (1 << max_average_sig_antenna_i);
1345 }
1346
1347 IWL_DEBUG_CALIB("average_sig: a %d b %d c %d\n",
1348 average_sig[0], average_sig[1], average_sig[2]);
1349 IWL_DEBUG_CALIB("max_average_sig = %d, antenna %d\n",
1350 max_average_sig, max_average_sig_antenna_i);
1351
1352 /* Compare signal strengths for all 3 receivers. */
1353 for (i = 0; i < NUM_RX_CHAINS; i++) {
1354 if (i != max_average_sig_antenna_i) {
1355 s32 rssi_delta = (max_average_sig -
1356 average_sig[i]);
1357
1358 /* If signal is very weak, compared with
1359 * strongest, mark it as disconnected. */
1360 if (rssi_delta > MAXIMUM_ALLOWED_PATHLOSS)
1361 data->disconn_array[i] = 1;
1362 else
1363 active_chains |= (1 << i);
1364 IWL_DEBUG_CALIB("i = %d rssiDelta = %d "
1365 "disconn_array[i] = %d\n",
1366 i, rssi_delta, data->disconn_array[i]);
1367 }
1368 }
1369
1370 /*If both chains A & B are disconnected -
1371 * connect B and leave A as is */
1372 if (data->disconn_array[CHAIN_A] &&
1373 data->disconn_array[CHAIN_B]) {
1374 data->disconn_array[CHAIN_B] = 0;
1375 active_chains |= (1 << CHAIN_B);
1376 IWL_DEBUG_CALIB("both A & B chains are disconnected! "
1377 "W/A - declare B as connected\n");
1378 }
1379
1380 IWL_DEBUG_CALIB("active_chains (bitwise) = 0x%x\n",
1381 active_chains);
1382
1383 /* Save for use within RXON, TX, SCAN commands, etc. */
1384 priv->valid_antenna = active_chains;
1385
1386 /* Analyze noise for rx balance */
1387 average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS);
1388 average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS);
1389 average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS);
1390
1391 for (i = 0; i < NUM_RX_CHAINS; i++) {
1392 if (!(data->disconn_array[i]) &&
1393 (average_noise[i] <= min_average_noise)) {
1394 /* This means that chain i is active and has
1395 * lower noise values so far: */
1396 min_average_noise = average_noise[i];
1397 min_average_noise_antenna_i = i;
1398 }
1399 }
1400
1401 data->delta_gain_code[min_average_noise_antenna_i] = 0;
1402
1403 IWL_DEBUG_CALIB("average_noise: a %d b %d c %d\n",
1404 average_noise[0], average_noise[1],
1405 average_noise[2]);
1406
1407 IWL_DEBUG_CALIB("min_average_noise = %d, antenna %d\n",
1408 min_average_noise, min_average_noise_antenna_i);
1409
1410 for (i = 0; i < NUM_RX_CHAINS; i++) {
1411 s32 delta_g = 0;
1412
1413 if (!(data->disconn_array[i]) &&
1414 (data->delta_gain_code[i] ==
1415 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
1416 delta_g = average_noise[i] - min_average_noise;
1417 data->delta_gain_code[i] = (u8)((delta_g *
1418 10) / 15);
1419 if (CHAIN_NOISE_MAX_DELTA_GAIN_CODE <
1420 data->delta_gain_code[i])
1421 data->delta_gain_code[i] =
1422 CHAIN_NOISE_MAX_DELTA_GAIN_CODE;
1423
1424 data->delta_gain_code[i] =
1425 (data->delta_gain_code[i] | (1 << 2));
1426 } else
1427 data->delta_gain_code[i] = 0;
1428 }
1429 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
1430 data->delta_gain_code[0],
1431 data->delta_gain_code[1],
1432 data->delta_gain_code[2]);
1433
1434 /* Differential gain gets sent to uCode only once */
1435 if (!data->radio_write) {
1436 struct iwl4965_calibration_cmd cmd;
1437 data->radio_write = 1;
1438
1439 memset(&cmd, 0, sizeof(cmd));
1440 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1441 cmd.diff_gain_a = data->delta_gain_code[0];
1442 cmd.diff_gain_b = data->delta_gain_code[1];
1443 cmd.diff_gain_c = data->delta_gain_code[2];
1444 rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1445 sizeof(cmd), &cmd);
1446 if (rc)
1447 IWL_DEBUG_CALIB("fail sending cmd "
1448 "REPLY_PHY_CALIBRATION_CMD \n");
1449
1450 /* TODO we might want recalculate
1451 * rx_chain in rxon cmd */
1452
1453 /* Mark so we run this algo only once! */
1454 data->state = IWL_CHAIN_NOISE_CALIBRATED;
1455 }
1456 data->chain_noise_a = 0;
1457 data->chain_noise_b = 0;
1458 data->chain_noise_c = 0;
1459 data->chain_signal_a = 0;
1460 data->chain_signal_b = 0;
1461 data->chain_signal_c = 0;
1462 data->beacon_count = 0;
1463 }
1464 return;
1465 }
1466
1467 static void iwl4965_sensitivity_calibration(struct iwl4965_priv *priv,
1468 struct iwl4965_notif_statistics *resp)
1469 {
1470 int rc = 0;
1471 u32 rx_enable_time;
1472 u32 fa_cck;
1473 u32 fa_ofdm;
1474 u32 bad_plcp_cck;
1475 u32 bad_plcp_ofdm;
1476 u32 norm_fa_ofdm;
1477 u32 norm_fa_cck;
1478 struct iwl4965_sensitivity_data *data = NULL;
1479 struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
1480 struct statistics_rx *statistics = &(resp->rx);
1481 unsigned long flags;
1482 struct statistics_general_data statis;
1483
1484 data = &(priv->sensitivity_data);
1485
1486 if (!iwl4965_is_associated(priv)) {
1487 IWL_DEBUG_CALIB("<< - not associated\n");
1488 return;
1489 }
1490
1491 spin_lock_irqsave(&priv->lock, flags);
1492 if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1493 IWL_DEBUG_CALIB("<< invalid data.\n");
1494 spin_unlock_irqrestore(&priv->lock, flags);
1495 return;
1496 }
1497
1498 /* Extract Statistics: */
1499 rx_enable_time = le32_to_cpu(rx_info->channel_load);
1500 fa_cck = le32_to_cpu(statistics->cck.false_alarm_cnt);
1501 fa_ofdm = le32_to_cpu(statistics->ofdm.false_alarm_cnt);
1502 bad_plcp_cck = le32_to_cpu(statistics->cck.plcp_err);
1503 bad_plcp_ofdm = le32_to_cpu(statistics->ofdm.plcp_err);
1504
1505 statis.beacon_silence_rssi_a =
1506 le32_to_cpu(statistics->general.beacon_silence_rssi_a);
1507 statis.beacon_silence_rssi_b =
1508 le32_to_cpu(statistics->general.beacon_silence_rssi_b);
1509 statis.beacon_silence_rssi_c =
1510 le32_to_cpu(statistics->general.beacon_silence_rssi_c);
1511 statis.beacon_energy_a =
1512 le32_to_cpu(statistics->general.beacon_energy_a);
1513 statis.beacon_energy_b =
1514 le32_to_cpu(statistics->general.beacon_energy_b);
1515 statis.beacon_energy_c =
1516 le32_to_cpu(statistics->general.beacon_energy_c);
1517
1518 spin_unlock_irqrestore(&priv->lock, flags);
1519
1520 IWL_DEBUG_CALIB("rx_enable_time = %u usecs\n", rx_enable_time);
1521
1522 if (!rx_enable_time) {
1523 IWL_DEBUG_CALIB("<< RX Enable Time == 0! \n");
1524 return;
1525 }
1526
1527 /* These statistics increase monotonically, and do not reset
1528 * at each beacon. Calculate difference from last value, or just
1529 * use the new statistics value if it has reset or wrapped around. */
1530 if (data->last_bad_plcp_cnt_cck > bad_plcp_cck)
1531 data->last_bad_plcp_cnt_cck = bad_plcp_cck;
1532 else {
1533 bad_plcp_cck -= data->last_bad_plcp_cnt_cck;
1534 data->last_bad_plcp_cnt_cck += bad_plcp_cck;
1535 }
1536
1537 if (data->last_bad_plcp_cnt_ofdm > bad_plcp_ofdm)
1538 data->last_bad_plcp_cnt_ofdm = bad_plcp_ofdm;
1539 else {
1540 bad_plcp_ofdm -= data->last_bad_plcp_cnt_ofdm;
1541 data->last_bad_plcp_cnt_ofdm += bad_plcp_ofdm;
1542 }
1543
1544 if (data->last_fa_cnt_ofdm > fa_ofdm)
1545 data->last_fa_cnt_ofdm = fa_ofdm;
1546 else {
1547 fa_ofdm -= data->last_fa_cnt_ofdm;
1548 data->last_fa_cnt_ofdm += fa_ofdm;
1549 }
1550
1551 if (data->last_fa_cnt_cck > fa_cck)
1552 data->last_fa_cnt_cck = fa_cck;
1553 else {
1554 fa_cck -= data->last_fa_cnt_cck;
1555 data->last_fa_cnt_cck += fa_cck;
1556 }
1557
1558 /* Total aborted signal locks */
1559 norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm;
1560 norm_fa_cck = fa_cck + bad_plcp_cck;
1561
1562 IWL_DEBUG_CALIB("cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck,
1563 bad_plcp_cck, fa_ofdm, bad_plcp_ofdm);
1564
1565 iwl4965_sens_auto_corr_ofdm(priv, norm_fa_ofdm, rx_enable_time);
1566 iwl4965_sens_energy_cck(priv, norm_fa_cck, rx_enable_time, &statis);
1567 rc |= iwl4965_sensitivity_write(priv, CMD_ASYNC);
1568
1569 return;
1570 }
1571
1572 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
1573 {
1574 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
1575 sensitivity_work);
1576
1577 mutex_lock(&priv->mutex);
1578
1579 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1580 test_bit(STATUS_SCANNING, &priv->status)) {
1581 mutex_unlock(&priv->mutex);
1582 return;
1583 }
1584
1585 if (priv->start_calib) {
1586 iwl4965_noise_calibration(priv, &priv->statistics);
1587
1588 if (priv->sensitivity_data.state ==
1589 IWL_SENS_CALIB_NEED_REINIT) {
1590 iwl4965_init_sensitivity(priv, CMD_ASYNC, 0);
1591 priv->sensitivity_data.state = IWL_SENS_CALIB_ALLOWED;
1592 } else
1593 iwl4965_sensitivity_calibration(priv,
1594 &priv->statistics);
1595 }
1596
1597 mutex_unlock(&priv->mutex);
1598 return;
1599 }
1600 #endif /*CONFIG_IWL4965_SENSITIVITY*/
1601
1602 static void iwl4965_bg_txpower_work(struct work_struct *work)
1603 {
1604 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
1605 txpower_work);
1606
1607 /* If a scan happened to start before we got here
1608 * then just return; the statistics notification will
1609 * kick off another scheduled work to compensate for
1610 * any temperature delta we missed here. */
1611 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1612 test_bit(STATUS_SCANNING, &priv->status))
1613 return;
1614
1615 mutex_lock(&priv->mutex);
1616
1617 /* Regardless of if we are assocaited, we must reconfigure the
1618 * TX power since frames can be sent on non-radar channels while
1619 * not associated */
1620 iwl4965_hw_reg_send_txpower(priv);
1621
1622 /* Update last_temperature to keep is_calib_needed from running
1623 * when it isn't needed... */
1624 priv->last_temperature = priv->temperature;
1625
1626 mutex_unlock(&priv->mutex);
1627 }
1628
1629 /*
1630 * Acquire priv->lock before calling this function !
1631 */
1632 static void iwl4965_set_wr_ptrs(struct iwl4965_priv *priv, int txq_id, u32 index)
1633 {
1634 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
1635 (index & 0xff) | (txq_id << 8));
1636 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
1637 }
1638
1639 /**
1640 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
1641 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
1642 * @scd_retry: (1) Indicates queue will be used in aggregation mode
1643 *
1644 * NOTE: Acquire priv->lock before calling this function !
1645 */
1646 static void iwl4965_tx_queue_set_status(struct iwl4965_priv *priv,
1647 struct iwl4965_tx_queue *txq,
1648 int tx_fifo_id, int scd_retry)
1649 {
1650 int txq_id = txq->q.id;
1651
1652 /* Find out whether to activate Tx queue */
1653 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
1654
1655 /* Set up and activate */
1656 iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
1657 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
1658 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
1659 (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
1660 (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
1661 SCD_QUEUE_STTS_REG_MSK);
1662
1663 txq->sched_retry = scd_retry;
1664
1665 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
1666 active ? "Activate" : "Deactivate",
1667 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
1668 }
1669
1670 static const u16 default_queue_to_tx_fifo[] = {
1671 IWL_TX_FIFO_AC3,
1672 IWL_TX_FIFO_AC2,
1673 IWL_TX_FIFO_AC1,
1674 IWL_TX_FIFO_AC0,
1675 IWL_CMD_FIFO_NUM,
1676 IWL_TX_FIFO_HCCA_1,
1677 IWL_TX_FIFO_HCCA_2
1678 };
1679
1680 static inline void iwl4965_txq_ctx_activate(struct iwl4965_priv *priv, int txq_id)
1681 {
1682 set_bit(txq_id, &priv->txq_ctx_active_msk);
1683 }
1684
1685 static inline void iwl4965_txq_ctx_deactivate(struct iwl4965_priv *priv, int txq_id)
1686 {
1687 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1688 }
1689
1690 int iwl4965_alive_notify(struct iwl4965_priv *priv)
1691 {
1692 u32 a;
1693 int i = 0;
1694 unsigned long flags;
1695 int rc;
1696
1697 spin_lock_irqsave(&priv->lock, flags);
1698
1699 #ifdef CONFIG_IWL4965_SENSITIVITY
1700 memset(&(priv->sensitivity_data), 0,
1701 sizeof(struct iwl4965_sensitivity_data));
1702 memset(&(priv->chain_noise_data), 0,
1703 sizeof(struct iwl4965_chain_noise_data));
1704 for (i = 0; i < NUM_RX_CHAINS; i++)
1705 priv->chain_noise_data.delta_gain_code[i] =
1706 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
1707 #endif /* CONFIG_IWL4965_SENSITIVITY*/
1708 rc = iwl4965_grab_nic_access(priv);
1709 if (rc) {
1710 spin_unlock_irqrestore(&priv->lock, flags);
1711 return rc;
1712 }
1713
1714 /* Clear 4965's internal Tx Scheduler data base */
1715 priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
1716 a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
1717 for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1718 iwl4965_write_targ_mem(priv, a, 0);
1719 for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
1720 iwl4965_write_targ_mem(priv, a, 0);
1721 for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
1722 iwl4965_write_targ_mem(priv, a, 0);
1723
1724 /* Tel 4965 where to find Tx byte count tables */
1725 iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
1726 (priv->hw_setting.shared_phys +
1727 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
1728
1729 /* Disable chain mode for all queues */
1730 iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
1731
1732 /* Initialize each Tx queue (including the command queue) */
1733 for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
1734
1735 /* TFD circular buffer read/write indexes */
1736 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
1737 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1738
1739 /* Max Tx Window size for Scheduler-ACK mode */
1740 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
1741 SCD_CONTEXT_QUEUE_OFFSET(i),
1742 (SCD_WIN_SIZE <<
1743 SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1744 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1745
1746 /* Frame limit */
1747 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
1748 SCD_CONTEXT_QUEUE_OFFSET(i) +
1749 sizeof(u32),
1750 (SCD_FRAME_LIMIT <<
1751 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
1752 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1753
1754 }
1755 iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
1756 (1 << priv->hw_setting.max_txq_num) - 1);
1757
1758 /* Activate all Tx DMA/FIFO channels */
1759 iwl4965_write_prph(priv, KDR_SCD_TXFACT,
1760 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
1761
1762 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
1763
1764 /* Map each Tx/cmd queue to its corresponding fifo */
1765 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1766 int ac = default_queue_to_tx_fifo[i];
1767 iwl4965_txq_ctx_activate(priv, i);
1768 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1769 }
1770
1771 iwl4965_release_nic_access(priv);
1772 spin_unlock_irqrestore(&priv->lock, flags);
1773
1774 return 0;
1775 }
1776
1777 /**
1778 * iwl4965_hw_set_hw_setting
1779 *
1780 * Called when initializing driver
1781 */
1782 int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv)
1783 {
1784 /* Allocate area for Tx byte count tables and Rx queue status */
1785 priv->hw_setting.shared_virt =
1786 pci_alloc_consistent(priv->pci_dev,
1787 sizeof(struct iwl4965_shared),
1788 &priv->hw_setting.shared_phys);
1789
1790 if (!priv->hw_setting.shared_virt)
1791 return -1;
1792
1793 memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
1794
1795 priv->hw_setting.max_txq_num = iwl4965_param_queues_num;
1796 priv->hw_setting.ac_queue_count = AC_NUM;
1797 priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
1798 priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
1799 priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
1800 if (iwl4965_param_amsdu_size_8K)
1801 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1802 else
1803 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1804 priv->hw_setting.max_pkt_size = priv->hw_setting.rx_buf_size - 256;
1805 priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
1806 priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
1807 return 0;
1808 }
1809
1810 /**
1811 * iwl4965_hw_txq_ctx_free - Free TXQ Context
1812 *
1813 * Destroy all TX DMA queues and structures
1814 */
1815 void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv)
1816 {
1817 int txq_id;
1818
1819 /* Tx queues */
1820 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
1821 iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
1822
1823 /* Keep-warm buffer */
1824 iwl4965_kw_free(priv);
1825 }
1826
1827 /**
1828 * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
1829 *
1830 * Does NOT advance any TFD circular buffer read/write indexes
1831 * Does NOT free the TFD itself (which is within circular buffer)
1832 */
1833 int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
1834 {
1835 struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
1836 struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
1837 struct pci_dev *dev = priv->pci_dev;
1838 int i;
1839 int counter = 0;
1840 int index, is_odd;
1841
1842 /* Host command buffers stay mapped in memory, nothing to clean */
1843 if (txq->q.id == IWL_CMD_QUEUE_NUM)
1844 return 0;
1845
1846 /* Sanity check on number of chunks */
1847 counter = IWL_GET_BITS(*bd, num_tbs);
1848 if (counter > MAX_NUM_OF_TBS) {
1849 IWL_ERROR("Too many chunks: %i\n", counter);
1850 /* @todo issue fatal error, it is quite serious situation */
1851 return 0;
1852 }
1853
1854 /* Unmap chunks, if any.
1855 * TFD info for odd chunks is different format than for even chunks. */
1856 for (i = 0; i < counter; i++) {
1857 index = i / 2;
1858 is_odd = i & 0x1;
1859
1860 if (is_odd)
1861 pci_unmap_single(
1862 dev,
1863 IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
1864 (IWL_GET_BITS(bd->pa[index],
1865 tb2_addr_hi20) << 16),
1866 IWL_GET_BITS(bd->pa[index], tb2_len),
1867 PCI_DMA_TODEVICE);
1868
1869 else if (i > 0)
1870 pci_unmap_single(dev,
1871 le32_to_cpu(bd->pa[index].tb1_addr),
1872 IWL_GET_BITS(bd->pa[index], tb1_len),
1873 PCI_DMA_TODEVICE);
1874
1875 /* Free SKB, if any, for this chunk */
1876 if (txq->txb[txq->q.read_ptr].skb[i]) {
1877 struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
1878
1879 dev_kfree_skb(skb);
1880 txq->txb[txq->q.read_ptr].skb[i] = NULL;
1881 }
1882 }
1883 return 0;
1884 }
1885
1886 int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power)
1887 {
1888 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1889 return -EINVAL;
1890 }
1891
1892 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1893 {
1894 s32 sign = 1;
1895
1896 if (num < 0) {
1897 sign = -sign;
1898 num = -num;
1899 }
1900 if (denom < 0) {
1901 sign = -sign;
1902 denom = -denom;
1903 }
1904 *res = 1;
1905 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1906
1907 return 1;
1908 }
1909
1910 /**
1911 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1912 *
1913 * Determines power supply voltage compensation for txpower calculations.
1914 * Returns number of 1/2-dB steps to subtract from gain table index,
1915 * to compensate for difference between power supply voltage during
1916 * factory measurements, vs. current power supply voltage.
1917 *
1918 * Voltage indication is higher for lower voltage.
1919 * Lower voltage requires more gain (lower gain table index).
1920 */
1921 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1922 s32 current_voltage)
1923 {
1924 s32 comp = 0;
1925
1926 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1927 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1928 return 0;
1929
1930 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1931 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1932
1933 if (current_voltage > eeprom_voltage)
1934 comp *= 2;
1935 if ((comp < -2) || (comp > 2))
1936 comp = 0;
1937
1938 return comp;
1939 }
1940
1941 static const struct iwl4965_channel_info *
1942 iwl4965_get_channel_txpower_info(struct iwl4965_priv *priv, u8 phymode, u16 channel)
1943 {
1944 const struct iwl4965_channel_info *ch_info;
1945
1946 ch_info = iwl4965_get_channel_info(priv, phymode, channel);
1947
1948 if (!is_channel_valid(ch_info))
1949 return NULL;
1950
1951 return ch_info;
1952 }
1953
1954 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1955 {
1956 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1957 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1958 return CALIB_CH_GROUP_5;
1959
1960 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1961 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1962 return CALIB_CH_GROUP_1;
1963
1964 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1965 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1966 return CALIB_CH_GROUP_2;
1967
1968 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1969 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1970 return CALIB_CH_GROUP_3;
1971
1972 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1973 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1974 return CALIB_CH_GROUP_4;
1975
1976 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1977 return -1;
1978 }
1979
1980 static u32 iwl4965_get_sub_band(const struct iwl4965_priv *priv, u32 channel)
1981 {
1982 s32 b = -1;
1983
1984 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
1985 if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
1986 continue;
1987
1988 if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
1989 && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
1990 break;
1991 }
1992
1993 return b;
1994 }
1995
1996 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1997 {
1998 s32 val;
1999
2000 if (x2 == x1)
2001 return y1;
2002 else {
2003 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
2004 return val + y2;
2005 }
2006 }
2007
2008 /**
2009 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
2010 *
2011 * Interpolates factory measurements from the two sample channels within a
2012 * sub-band, to apply to channel of interest. Interpolation is proportional to
2013 * differences in channel frequencies, which is proportional to differences
2014 * in channel number.
2015 */
2016 static int iwl4965_interpolate_chan(struct iwl4965_priv *priv, u32 channel,
2017 struct iwl4965_eeprom_calib_ch_info *chan_info)
2018 {
2019 s32 s = -1;
2020 u32 c;
2021 u32 m;
2022 const struct iwl4965_eeprom_calib_measure *m1;
2023 const struct iwl4965_eeprom_calib_measure *m2;
2024 struct iwl4965_eeprom_calib_measure *omeas;
2025 u32 ch_i1;
2026 u32 ch_i2;
2027
2028 s = iwl4965_get_sub_band(priv, channel);
2029 if (s >= EEPROM_TX_POWER_BANDS) {
2030 IWL_ERROR("Tx Power can not find channel %d ", channel);
2031 return -1;
2032 }
2033
2034 ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
2035 ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
2036 chan_info->ch_num = (u8) channel;
2037
2038 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
2039 channel, s, ch_i1, ch_i2);
2040
2041 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
2042 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
2043 m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
2044 measurements[c][m]);
2045 m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
2046 measurements[c][m]);
2047 omeas = &(chan_info->measurements[c][m]);
2048
2049 omeas->actual_pow =
2050 (u8) iwl4965_interpolate_value(channel, ch_i1,
2051 m1->actual_pow,
2052 ch_i2,
2053 m2->actual_pow);
2054 omeas->gain_idx =
2055 (u8) iwl4965_interpolate_value(channel, ch_i1,
2056 m1->gain_idx, ch_i2,
2057 m2->gain_idx);
2058 omeas->temperature =
2059 (u8) iwl4965_interpolate_value(channel, ch_i1,
2060 m1->temperature,
2061 ch_i2,
2062 m2->temperature);
2063 omeas->pa_det =
2064 (s8) iwl4965_interpolate_value(channel, ch_i1,
2065 m1->pa_det, ch_i2,
2066 m2->pa_det);
2067
2068 IWL_DEBUG_TXPOWER
2069 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
2070 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
2071 IWL_DEBUG_TXPOWER
2072 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
2073 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
2074 IWL_DEBUG_TXPOWER
2075 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
2076 m1->pa_det, m2->pa_det, omeas->pa_det);
2077 IWL_DEBUG_TXPOWER
2078 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
2079 m1->temperature, m2->temperature,
2080 omeas->temperature);
2081 }
2082 }
2083
2084 return 0;
2085 }
2086
2087 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
2088 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
2089 static s32 back_off_table[] = {
2090 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
2091 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
2092 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
2093 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
2094 10 /* CCK */
2095 };
2096
2097 /* Thermal compensation values for txpower for various frequency ranges ...
2098 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
2099 static struct iwl4965_txpower_comp_entry {
2100 s32 degrees_per_05db_a;
2101 s32 degrees_per_05db_a_denom;
2102 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
2103 {9, 2}, /* group 0 5.2, ch 34-43 */
2104 {4, 1}, /* group 1 5.2, ch 44-70 */
2105 {4, 1}, /* group 2 5.2, ch 71-124 */
2106 {4, 1}, /* group 3 5.2, ch 125-200 */
2107 {3, 1} /* group 4 2.4, ch all */
2108 };
2109
2110 static s32 get_min_power_index(s32 rate_power_index, u32 band)
2111 {
2112 if (!band) {
2113 if ((rate_power_index & 7) <= 4)
2114 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
2115 }
2116 return MIN_TX_GAIN_INDEX;
2117 }
2118
2119 struct gain_entry {
2120 u8 dsp;
2121 u8 radio;
2122 };
2123
2124 static const struct gain_entry gain_table[2][108] = {
2125 /* 5.2GHz power gain index table */
2126 {
2127 {123, 0x3F}, /* highest txpower */
2128 {117, 0x3F},
2129 {110, 0x3F},
2130 {104, 0x3F},
2131 {98, 0x3F},
2132 {110, 0x3E},
2133 {104, 0x3E},
2134 {98, 0x3E},
2135 {110, 0x3D},
2136 {104, 0x3D},
2137 {98, 0x3D},
2138 {110, 0x3C},
2139 {104, 0x3C},
2140 {98, 0x3C},
2141 {110, 0x3B},
2142 {104, 0x3B},
2143 {98, 0x3B},
2144 {110, 0x3A},
2145 {104, 0x3A},
2146 {98, 0x3A},
2147 {110, 0x39},
2148 {104, 0x39},
2149 {98, 0x39},
2150 {110, 0x38},
2151 {104, 0x38},
2152 {98, 0x38},
2153 {110, 0x37},
2154 {104, 0x37},
2155 {98, 0x37},
2156 {110, 0x36},
2157 {104, 0x36},
2158 {98, 0x36},
2159 {110, 0x35},
2160 {104, 0x35},
2161 {98, 0x35},
2162 {110, 0x34},
2163 {104, 0x34},
2164 {98, 0x34},
2165 {110, 0x33},
2166 {104, 0x33},
2167 {98, 0x33},
2168 {110, 0x32},
2169 {104, 0x32},
2170 {98, 0x32},
2171 {110, 0x31},
2172 {104, 0x31},
2173 {98, 0x31},
2174 {110, 0x30},
2175 {104, 0x30},
2176 {98, 0x30},
2177 {110, 0x25},
2178 {104, 0x25},
2179 {98, 0x25},
2180 {110, 0x24},
2181 {104, 0x24},
2182 {98, 0x24},
2183 {110, 0x23},
2184 {104, 0x23},
2185 {98, 0x23},
2186 {110, 0x22},
2187 {104, 0x18},
2188 {98, 0x18},
2189 {110, 0x17},
2190 {104, 0x17},
2191 {98, 0x17},
2192 {110, 0x16},
2193 {104, 0x16},
2194 {98, 0x16},
2195 {110, 0x15},
2196 {104, 0x15},
2197 {98, 0x15},
2198 {110, 0x14},
2199 {104, 0x14},
2200 {98, 0x14},
2201 {110, 0x13},
2202 {104, 0x13},
2203 {98, 0x13},
2204 {110, 0x12},
2205 {104, 0x08},
2206 {98, 0x08},
2207 {110, 0x07},
2208 {104, 0x07},
2209 {98, 0x07},
2210 {110, 0x06},
2211 {104, 0x06},
2212 {98, 0x06},
2213 {110, 0x05},
2214 {104, 0x05},
2215 {98, 0x05},
2216 {110, 0x04},
2217 {104, 0x04},
2218 {98, 0x04},
2219 {110, 0x03},
2220 {104, 0x03},
2221 {98, 0x03},
2222 {110, 0x02},
2223 {104, 0x02},
2224 {98, 0x02},
2225 {110, 0x01},
2226 {104, 0x01},
2227 {98, 0x01},
2228 {110, 0x00},
2229 {104, 0x00},
2230 {98, 0x00},
2231 {93, 0x00},
2232 {88, 0x00},
2233 {83, 0x00},
2234 {78, 0x00},
2235 },
2236 /* 2.4GHz power gain index table */
2237 {
2238 {110, 0x3f}, /* highest txpower */
2239 {104, 0x3f},
2240 {98, 0x3f},
2241 {110, 0x3e},
2242 {104, 0x3e},
2243 {98, 0x3e},
2244 {110, 0x3d},
2245 {104, 0x3d},
2246 {98, 0x3d},
2247 {110, 0x3c},
2248 {104, 0x3c},
2249 {98, 0x3c},
2250 {110, 0x3b},
2251 {104, 0x3b},
2252 {98, 0x3b},
2253 {110, 0x3a},
2254 {104, 0x3a},
2255 {98, 0x3a},
2256 {110, 0x39},
2257 {104, 0x39},
2258 {98, 0x39},
2259 {110, 0x38},
2260 {104, 0x38},
2261 {98, 0x38},
2262 {110, 0x37},
2263 {104, 0x37},
2264 {98, 0x37},
2265 {110, 0x36},
2266 {104, 0x36},
2267 {98, 0x36},
2268 {110, 0x35},
2269 {104, 0x35},
2270 {98, 0x35},
2271 {110, 0x34},
2272 {104, 0x34},
2273 {98, 0x34},
2274 {110, 0x33},
2275 {104, 0x33},
2276 {98, 0x33},
2277 {110, 0x32},
2278 {104, 0x32},
2279 {98, 0x32},
2280 {110, 0x31},
2281 {104, 0x31},
2282 {98, 0x31},
2283 {110, 0x30},
2284 {104, 0x30},
2285 {98, 0x30},
2286 {110, 0x6},
2287 {104, 0x6},
2288 {98, 0x6},
2289 {110, 0x5},
2290 {104, 0x5},
2291 {98, 0x5},
2292 {110, 0x4},
2293 {104, 0x4},
2294 {98, 0x4},
2295 {110, 0x3},
2296 {104, 0x3},
2297 {98, 0x3},
2298 {110, 0x2},
2299 {104, 0x2},
2300 {98, 0x2},
2301 {110, 0x1},
2302 {104, 0x1},
2303 {98, 0x1},
2304 {110, 0x0},
2305 {104, 0x0},
2306 {98, 0x0},
2307 {97, 0},
2308 {96, 0},
2309 {95, 0},
2310 {94, 0},
2311 {93, 0},
2312 {92, 0},
2313 {91, 0},
2314 {90, 0},
2315 {89, 0},
2316 {88, 0},
2317 {87, 0},
2318 {86, 0},
2319 {85, 0},
2320 {84, 0},
2321 {83, 0},
2322 {82, 0},
2323 {81, 0},
2324 {80, 0},
2325 {79, 0},
2326 {78, 0},
2327 {77, 0},
2328 {76, 0},
2329 {75, 0},
2330 {74, 0},
2331 {73, 0},
2332 {72, 0},
2333 {71, 0},
2334 {70, 0},
2335 {69, 0},
2336 {68, 0},
2337 {67, 0},
2338 {66, 0},
2339 {65, 0},
2340 {64, 0},
2341 {63, 0},
2342 {62, 0},
2343 {61, 0},
2344 {60, 0},
2345 {59, 0},
2346 }
2347 };
2348
2349 static int iwl4965_fill_txpower_tbl(struct iwl4965_priv *priv, u8 band, u16 channel,
2350 u8 is_fat, u8 ctrl_chan_high,
2351 struct iwl4965_tx_power_db *tx_power_tbl)
2352 {
2353 u8 saturation_power;
2354 s32 target_power;
2355 s32 user_target_power;
2356 s32 power_limit;
2357 s32 current_temp;
2358 s32 reg_limit;
2359 s32 current_regulatory;
2360 s32 txatten_grp = CALIB_CH_GROUP_MAX;
2361 int i;
2362 int c;
2363 const struct iwl4965_channel_info *ch_info = NULL;
2364 struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
2365 const struct iwl4965_eeprom_calib_measure *measurement;
2366 s16 voltage;
2367 s32 init_voltage;
2368 s32 voltage_compensation;
2369 s32 degrees_per_05db_num;
2370 s32 degrees_per_05db_denom;
2371 s32 factory_temp;
2372 s32 temperature_comp[2];
2373 s32 factory_gain_index[2];
2374 s32 factory_actual_pwr[2];
2375 s32 power_index;
2376
2377 /* Sanity check requested level (dBm) */
2378 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
2379 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
2380 priv->user_txpower_limit);
2381 return -EINVAL;
2382 }
2383 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
2384 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
2385 priv->user_txpower_limit);
2386 return -EINVAL;
2387 }
2388
2389 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
2390 * are used for indexing into txpower table) */
2391 user_target_power = 2 * priv->user_txpower_limit;
2392
2393 /* Get current (RXON) channel, band, width */
2394 ch_info =
2395 iwl4965_get_channel_txpower_info(priv, priv->phymode, channel);
2396
2397 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
2398 is_fat);
2399
2400 if (!ch_info)
2401 return -EINVAL;
2402
2403 /* get txatten group, used to select 1) thermal txpower adjustment
2404 * and 2) mimo txpower balance between Tx chains. */
2405 txatten_grp = iwl4965_get_tx_atten_grp(channel);
2406 if (txatten_grp < 0)
2407 return -EINVAL;
2408
2409 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
2410 channel, txatten_grp);
2411
2412 if (is_fat) {
2413 if (ctrl_chan_high)
2414 channel -= 2;
2415 else
2416 channel += 2;
2417 }
2418
2419 /* hardware txpower limits ...
2420 * saturation (clipping distortion) txpowers are in half-dBm */
2421 if (band)
2422 saturation_power = priv->eeprom.calib_info.saturation_power24;
2423 else
2424 saturation_power = priv->eeprom.calib_info.saturation_power52;
2425
2426 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
2427 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
2428 if (band)
2429 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
2430 else
2431 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
2432 }
2433
2434 /* regulatory txpower limits ... reg_limit values are in half-dBm,
2435 * max_power_avg values are in dBm, convert * 2 */
2436 if (is_fat)
2437 reg_limit = ch_info->fat_max_power_avg * 2;
2438 else
2439 reg_limit = ch_info->max_power_avg * 2;
2440
2441 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
2442 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
2443 if (band)
2444 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
2445 else
2446 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
2447 }
2448
2449 /* Interpolate txpower calibration values for this channel,
2450 * based on factory calibration tests on spaced channels. */
2451 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
2452
2453 /* calculate tx gain adjustment based on power supply voltage */
2454 voltage = priv->eeprom.calib_info.voltage;
2455 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
2456 voltage_compensation =
2457 iwl4965_get_voltage_compensation(voltage, init_voltage);
2458
2459 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
2460 init_voltage,
2461 voltage, voltage_compensation);
2462
2463 /* get current temperature (Celsius) */
2464 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
2465 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
2466 current_temp = KELVIN_TO_CELSIUS(current_temp);
2467
2468 /* select thermal txpower adjustment params, based on channel group
2469 * (same frequency group used for mimo txatten adjustment) */
2470 degrees_per_05db_num =
2471 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
2472 degrees_per_05db_denom =
2473 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
2474
2475 /* get per-chain txpower values from factory measurements */
2476 for (c = 0; c < 2; c++) {
2477 measurement = &ch_eeprom_info.measurements[c][1];
2478
2479 /* txgain adjustment (in half-dB steps) based on difference
2480 * between factory and current temperature */
2481 factory_temp = measurement->temperature;
2482 iwl4965_math_div_round((current_temp - factory_temp) *
2483 degrees_per_05db_denom,
2484 degrees_per_05db_num,
2485 &temperature_comp[c]);
2486
2487 factory_gain_index[c] = measurement->gain_idx;
2488 factory_actual_pwr[c] = measurement->actual_pow;
2489
2490 IWL_DEBUG_TXPOWER("chain = %d\n", c);
2491 IWL_DEBUG_TXPOWER("fctry tmp %d, "
2492 "curr tmp %d, comp %d steps\n",
2493 factory_temp, current_temp,
2494 temperature_comp[c]);
2495
2496 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
2497 factory_gain_index[c],
2498 factory_actual_pwr[c]);
2499 }
2500
2501 /* for each of 33 bit-rates (including 1 for CCK) */
2502 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
2503 u8 is_mimo_rate;
2504 union iwl4965_tx_power_dual_stream tx_power;
2505
2506 /* for mimo, reduce each chain's txpower by half
2507 * (3dB, 6 steps), so total output power is regulatory
2508 * compliant. */
2509 if (i & 0x8) {
2510 current_regulatory = reg_limit -
2511 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
2512 is_mimo_rate = 1;
2513 } else {
2514 current_regulatory = reg_limit;
2515 is_mimo_rate = 0;
2516 }
2517
2518 /* find txpower limit, either hardware or regulatory */
2519 power_limit = saturation_power - back_off_table[i];
2520 if (power_limit > current_regulatory)
2521 power_limit = current_regulatory;
2522
2523 /* reduce user's txpower request if necessary
2524 * for this rate on this channel */
2525 target_power = user_target_power;
2526 if (target_power > power_limit)
2527 target_power = power_limit;
2528
2529 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
2530 i, saturation_power - back_off_table[i],
2531 current_regulatory, user_target_power,
2532 target_power);
2533
2534 /* for each of 2 Tx chains (radio transmitters) */
2535 for (c = 0; c < 2; c++) {
2536 s32 atten_value;
2537
2538 if (is_mimo_rate)
2539 atten_value =
2540 (s32)le32_to_cpu(priv->card_alive_init.
2541 tx_atten[txatten_grp][c]);
2542 else
2543 atten_value = 0;
2544
2545 /* calculate index; higher index means lower txpower */
2546 power_index = (u8) (factory_gain_index[c] -
2547 (target_power -
2548 factory_actual_pwr[c]) -
2549 temperature_comp[c] -
2550 voltage_compensation +
2551 atten_value);
2552
2553 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
2554 power_index); */
2555
2556 if (power_index < get_min_power_index(i, band))
2557 power_index = get_min_power_index(i, band);
2558
2559 /* adjust 5 GHz index to support negative indexes */
2560 if (!band)
2561 power_index += 9;
2562
2563 /* CCK, rate 32, reduce txpower for CCK */
2564 if (i == POWER_TABLE_CCK_ENTRY)
2565 power_index +=
2566 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
2567
2568 /* stay within the table! */
2569 if (power_index > 107) {
2570 IWL_WARNING("txpower index %d > 107\n",
2571 power_index);
2572 power_index = 107;
2573 }
2574 if (power_index < 0) {
2575 IWL_WARNING("txpower index %d < 0\n",
2576 power_index);
2577 power_index = 0;
2578 }
2579
2580 /* fill txpower command for this rate/chain */
2581 tx_power.s.radio_tx_gain[c] =
2582 gain_table[band][power_index].radio;
2583 tx_power.s.dsp_predis_atten[c] =
2584 gain_table[band][power_index].dsp;
2585
2586 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
2587 "gain 0x%02x dsp %d\n",
2588 c, atten_value, power_index,
2589 tx_power.s.radio_tx_gain[c],
2590 tx_power.s.dsp_predis_atten[c]);
2591 }/* for each chain */
2592
2593 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
2594
2595 }/* for each rate */
2596
2597 return 0;
2598 }
2599
2600 /**
2601 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
2602 *
2603 * Uses the active RXON for channel, band, and characteristics (fat, high)
2604 * The power limit is taken from priv->user_txpower_limit.
2605 */
2606 int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv)
2607 {
2608 struct iwl4965_txpowertable_cmd cmd = { 0 };
2609 int rc = 0;
2610 u8 band = 0;
2611 u8 is_fat = 0;
2612 u8 ctrl_chan_high = 0;
2613
2614 if (test_bit(STATUS_SCANNING, &priv->status)) {
2615 /* If this gets hit a lot, switch it to a BUG() and catch
2616 * the stack trace to find out who is calling this during
2617 * a scan. */
2618 IWL_WARNING("TX Power requested while scanning!\n");
2619 return -EAGAIN;
2620 }
2621
2622 band = ((priv->phymode == MODE_IEEE80211B) ||
2623 (priv->phymode == MODE_IEEE80211G));
2624
2625 is_fat = is_fat_channel(priv->active_rxon.flags);
2626
2627 if (is_fat &&
2628 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2629 ctrl_chan_high = 1;
2630
2631 cmd.band = band;
2632 cmd.channel = priv->active_rxon.channel;
2633
2634 rc = iwl4965_fill_txpower_tbl(priv, band,
2635 le16_to_cpu(priv->active_rxon.channel),
2636 is_fat, ctrl_chan_high, &cmd.tx_power);
2637 if (rc)
2638 return rc;
2639
2640 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
2641 return rc;
2642 }
2643
2644 int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel)
2645 {
2646 int rc;
2647 u8 band = 0;
2648 u8 is_fat = 0;
2649 u8 ctrl_chan_high = 0;
2650 struct iwl4965_channel_switch_cmd cmd = { 0 };
2651 const struct iwl4965_channel_info *ch_info;
2652
2653 band = ((priv->phymode == MODE_IEEE80211B) ||
2654 (priv->phymode == MODE_IEEE80211G));
2655
2656 ch_info = iwl4965_get_channel_info(priv, priv->phymode, channel);
2657
2658 is_fat = is_fat_channel(priv->staging_rxon.flags);
2659
2660 if (is_fat &&
2661 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2662 ctrl_chan_high = 1;
2663
2664 cmd.band = band;
2665 cmd.expect_beacon = 0;
2666 cmd.channel = cpu_to_le16(channel);
2667 cmd.rxon_flags = priv->active_rxon.flags;
2668 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
2669 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
2670 if (ch_info)
2671 cmd.expect_beacon = is_channel_radar(ch_info);
2672 else
2673 cmd.expect_beacon = 1;
2674
2675 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
2676 ctrl_chan_high, &cmd.tx_power);
2677 if (rc) {
2678 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
2679 return rc;
2680 }
2681
2682 rc = iwl4965_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
2683 return rc;
2684 }
2685
2686 #define RTS_HCCA_RETRY_LIMIT 3
2687 #define RTS_DFAULT_RETRY_LIMIT 60
2688
2689 void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv,
2690 struct iwl4965_cmd *cmd,
2691 struct ieee80211_tx_control *ctrl,
2692 struct ieee80211_hdr *hdr, int sta_id,
2693 int is_hcca)
2694 {
2695 struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
2696 u8 rts_retry_limit = 0;
2697 u8 data_retry_limit = 0;
2698 u16 fc = le16_to_cpu(hdr->frame_control);
2699 u8 rate_plcp;
2700 u16 rate_flags = 0;
2701 int rate_idx = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
2702
2703 rate_plcp = iwl4965_rates[rate_idx].plcp;
2704
2705 rts_retry_limit = (is_hcca) ?
2706 RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
2707
2708 if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
2709 rate_flags |= RATE_MCS_CCK_MSK;
2710
2711
2712 if (ieee80211_is_probe_response(fc)) {
2713 data_retry_limit = 3;
2714 if (data_retry_limit < rts_retry_limit)
2715 rts_retry_limit = data_retry_limit;
2716 } else
2717 data_retry_limit = IWL_DEFAULT_TX_RETRY;
2718
2719 if (priv->data_retry_limit != -1)
2720 data_retry_limit = priv->data_retry_limit;
2721
2722
2723 if (ieee80211_is_data(fc)) {
2724 tx->initial_rate_index = 0;
2725 tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
2726 } else {
2727 switch (fc & IEEE80211_FCTL_STYPE) {
2728 case IEEE80211_STYPE_AUTH:
2729 case IEEE80211_STYPE_DEAUTH:
2730 case IEEE80211_STYPE_ASSOC_REQ:
2731 case IEEE80211_STYPE_REASSOC_REQ:
2732 if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
2733 tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2734 tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
2735 }
2736 break;
2737 default:
2738 break;
2739 }
2740
2741 /* Alternate between antenna A and B for successive frames */
2742 if (priv->use_ant_b_for_management_frame) {
2743 priv->use_ant_b_for_management_frame = 0;
2744 rate_flags |= RATE_MCS_ANT_B_MSK;
2745 } else {
2746 priv->use_ant_b_for_management_frame = 1;
2747 rate_flags |= RATE_MCS_ANT_A_MSK;
2748 }
2749 }
2750
2751 tx->rts_retry_limit = rts_retry_limit;
2752 tx->data_retry_limit = data_retry_limit;
2753 tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
2754 }
2755
2756 int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv)
2757 {
2758 struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2759
2760 return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
2761 }
2762
2763 int iwl4965_hw_get_temperature(struct iwl4965_priv *priv)
2764 {
2765 return priv->temperature;
2766 }
2767
2768 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv,
2769 struct iwl4965_frame *frame, u8 rate)
2770 {
2771 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
2772 unsigned int frame_size;
2773
2774 tx_beacon_cmd = &frame->u.beacon;
2775 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2776
2777 tx_beacon_cmd->tx.sta_id = IWL4965_BROADCAST_ID;
2778 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2779
2780 frame_size = iwl4965_fill_beacon_frame(priv,
2781 tx_beacon_cmd->frame,
2782 iwl4965_broadcast_addr,
2783 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2784
2785 BUG_ON(frame_size > MAX_MPDU_SIZE);
2786 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2787
2788 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
2789 tx_beacon_cmd->tx.rate_n_flags =
2790 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
2791 else
2792 tx_beacon_cmd->tx.rate_n_flags =
2793 iwl4965_hw_set_rate_n_flags(rate, 0);
2794
2795 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2796 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
2797 return (sizeof(*tx_beacon_cmd) + frame_size);
2798 }
2799
2800 /*
2801 * Tell 4965 where to find circular buffer of Tx Frame Descriptors for
2802 * given Tx queue, and enable the DMA channel used for that queue.
2803 *
2804 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
2805 * channels supported in hardware.
2806 */
2807 int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
2808 {
2809 int rc;
2810 unsigned long flags;
2811 int txq_id = txq->q.id;
2812
2813 spin_lock_irqsave(&priv->lock, flags);
2814 rc = iwl4965_grab_nic_access(priv);
2815 if (rc) {
2816 spin_unlock_irqrestore(&priv->lock, flags);
2817 return rc;
2818 }
2819
2820 /* Circular buffer (TFD queue in DRAM) physical base address */
2821 iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
2822 txq->q.dma_addr >> 8);
2823
2824 /* Enable DMA channel, using same id as for TFD queue */
2825 iwl4965_write_direct32(
2826 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
2827 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
2828 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
2829 iwl4965_release_nic_access(priv);
2830 spin_unlock_irqrestore(&priv->lock, flags);
2831
2832 return 0;
2833 }
2834
2835 int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
2836 dma_addr_t addr, u16 len)
2837 {
2838 int index, is_odd;
2839 struct iwl4965_tfd_frame *tfd = ptr;
2840 u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
2841
2842 /* Each TFD can point to a maximum 20 Tx buffers */
2843 if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
2844 IWL_ERROR("Error can not send more than %d chunks\n",
2845 MAX_NUM_OF_TBS);
2846 return -EINVAL;
2847 }
2848
2849 index = num_tbs / 2;
2850 is_odd = num_tbs & 0x1;
2851
2852 if (!is_odd) {
2853 tfd->pa[index].tb1_addr = cpu_to_le32(addr);
2854 IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
2855 iwl_get_dma_hi_address(addr));
2856 IWL_SET_BITS(tfd->pa[index], tb1_len, len);
2857 } else {
2858 IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
2859 (u32) (addr & 0xffff));
2860 IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
2861 IWL_SET_BITS(tfd->pa[index], tb2_len, len);
2862 }
2863
2864 IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
2865
2866 return 0;
2867 }
2868
2869 static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv)
2870 {
2871 u16 hw_version = priv->eeprom.board_revision_4965;
2872
2873 IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
2874 ((hw_version >> 8) & 0x0F),
2875 ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
2876
2877 IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
2878 priv->eeprom.board_pba_number_4965);
2879 }
2880
2881 #define IWL_TX_CRC_SIZE 4
2882 #define IWL_TX_DELIMITER_SIZE 4
2883
2884 /**
2885 * iwl4965_tx_queue_update_wr_ptr - Set up entry in Tx byte-count array
2886 */
2887 int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv,
2888 struct iwl4965_tx_queue *txq, u16 byte_cnt)
2889 {
2890 int len;
2891 int txq_id = txq->q.id;
2892 struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2893
2894 if (txq->need_update == 0)
2895 return 0;
2896
2897 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2898
2899 /* Set up byte count within first 256 entries */
2900 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2901 tfd_offset[txq->q.write_ptr], byte_cnt, len);
2902
2903 /* If within first 64 entries, duplicate at end */
2904 if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
2905 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2906 tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
2907 byte_cnt, len);
2908
2909 return 0;
2910 }
2911
2912 /**
2913 * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
2914 *
2915 * Selects how many and which Rx receivers/antennas/chains to use.
2916 * This should not be used for scan command ... it puts data in wrong place.
2917 */
2918 void iwl4965_set_rxon_chain(struct iwl4965_priv *priv)
2919 {
2920 u8 is_single = is_single_stream(priv);
2921 u8 idle_state, rx_state;
2922
2923 priv->staging_rxon.rx_chain = 0;
2924 rx_state = idle_state = 3;
2925
2926 /* Tell uCode which antennas are actually connected.
2927 * Before first association, we assume all antennas are connected.
2928 * Just after first association, iwl4965_noise_calibration()
2929 * checks which antennas actually *are* connected. */
2930 priv->staging_rxon.rx_chain |=
2931 cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
2932
2933 /* How many receivers should we use? */
2934 iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
2935 priv->staging_rxon.rx_chain |=
2936 cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
2937 priv->staging_rxon.rx_chain |=
2938 cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
2939
2940 if (!is_single && (rx_state >= 2) &&
2941 !test_bit(STATUS_POWER_PMI, &priv->status))
2942 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
2943 else
2944 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
2945
2946 IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
2947 }
2948
2949 /**
2950 * sign_extend - Sign extend a value using specified bit as sign-bit
2951 *
2952 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
2953 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
2954 *
2955 * @param oper value to sign extend
2956 * @param index 0 based bit index (0<=index<32) to sign bit
2957 */
2958 static s32 sign_extend(u32 oper, int index)
2959 {
2960 u8 shift = 31 - index;
2961
2962 return (s32)(oper << shift) >> shift;
2963 }
2964
2965 /**
2966 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
2967 * @statistics: Provides the temperature reading from the uCode
2968 *
2969 * A return of <0 indicates bogus data in the statistics
2970 */
2971 int iwl4965_get_temperature(const struct iwl4965_priv *priv)
2972 {
2973 s32 temperature;
2974 s32 vt;
2975 s32 R1, R2, R3;
2976 u32 R4;
2977
2978 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
2979 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
2980 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
2981 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
2982 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
2983 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
2984 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
2985 } else {
2986 IWL_DEBUG_TEMP("Running temperature calibration\n");
2987 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
2988 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
2989 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
2990 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
2991 }
2992
2993 /*
2994 * Temperature is only 23 bits, so sign extend out to 32.
2995 *
2996 * NOTE If we haven't received a statistics notification yet
2997 * with an updated temperature, use R4 provided to us in the
2998 * "initialize" ALIVE response.
2999 */
3000 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
3001 vt = sign_extend(R4, 23);
3002 else
3003 vt = sign_extend(
3004 le32_to_cpu(priv->statistics.general.temperature), 23);
3005
3006 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
3007 R1, R2, R3, vt);
3008
3009 if (R3 == R1) {
3010 IWL_ERROR("Calibration conflict R1 == R3\n");
3011 return -1;
3012 }
3013
3014 /* Calculate temperature in degrees Kelvin, adjust by 97%.
3015 * Add offset to center the adjustment around 0 degrees Centigrade. */
3016 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
3017 temperature /= (R3 - R1);
3018 temperature = (temperature * 97) / 100 +
3019 TEMPERATURE_CALIB_KELVIN_OFFSET;
3020
3021 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
3022 KELVIN_TO_CELSIUS(temperature));
3023
3024 return temperature;
3025 }
3026
3027 /* Adjust Txpower only if temperature variance is greater than threshold. */
3028 #define IWL_TEMPERATURE_THRESHOLD 3
3029
3030 /**
3031 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
3032 *
3033 * If the temperature changed has changed sufficiently, then a recalibration
3034 * is needed.
3035 *
3036 * Assumes caller will replace priv->last_temperature once calibration
3037 * executed.
3038 */
3039 static int iwl4965_is_temp_calib_needed(struct iwl4965_priv *priv)
3040 {
3041 int temp_diff;
3042
3043 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
3044 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
3045 return 0;
3046 }
3047
3048 temp_diff = priv->temperature - priv->last_temperature;
3049
3050 /* get absolute value */
3051 if (temp_diff < 0) {
3052 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
3053 temp_diff = -temp_diff;
3054 } else if (temp_diff == 0)
3055 IWL_DEBUG_POWER("Same temp, \n");
3056 else
3057 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
3058
3059 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
3060 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
3061 return 0;
3062 }
3063
3064 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
3065
3066 return 1;
3067 }
3068
3069 /* Calculate noise level, based on measurements during network silence just
3070 * before arriving beacon. This measurement can be done only if we know
3071 * exactly when to expect beacons, therefore only when we're associated. */
3072 static void iwl4965_rx_calc_noise(struct iwl4965_priv *priv)
3073 {
3074 struct statistics_rx_non_phy *rx_info
3075 = &(priv->statistics.rx.general);
3076 int num_active_rx = 0;
3077 int total_silence = 0;
3078 int bcn_silence_a =
3079 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
3080 int bcn_silence_b =
3081 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
3082 int bcn_silence_c =
3083 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
3084
3085 if (bcn_silence_a) {
3086 total_silence += bcn_silence_a;
3087 num_active_rx++;
3088 }
3089 if (bcn_silence_b) {
3090 total_silence += bcn_silence_b;
3091 num_active_rx++;
3092 }
3093 if (bcn_silence_c) {
3094 total_silence += bcn_silence_c;
3095 num_active_rx++;
3096 }
3097
3098 /* Average among active antennas */
3099 if (num_active_rx)
3100 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
3101 else
3102 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3103
3104 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
3105 bcn_silence_a, bcn_silence_b, bcn_silence_c,
3106 priv->last_rx_noise);
3107 }
3108
3109 void iwl4965_hw_rx_statistics(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
3110 {
3111 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3112 int change;
3113 s32 temp;
3114
3115 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
3116 (int)sizeof(priv->statistics), pkt->len);
3117
3118 change = ((priv->statistics.general.temperature !=
3119 pkt->u.stats.general.temperature) ||
3120 ((priv->statistics.flag &
3121 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
3122 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
3123
3124 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
3125
3126 set_bit(STATUS_STATISTICS, &priv->status);
3127
3128 /* Reschedule the statistics timer to occur in
3129 * REG_RECALIB_PERIOD seconds to ensure we get a
3130 * thermal update even if the uCode doesn't give
3131 * us one */
3132 mod_timer(&priv->statistics_periodic, jiffies +
3133 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
3134
3135 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
3136 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
3137 iwl4965_rx_calc_noise(priv);
3138 #ifdef CONFIG_IWL4965_SENSITIVITY
3139 queue_work(priv->workqueue, &priv->sensitivity_work);
3140 #endif
3141 }
3142
3143 /* If the hardware hasn't reported a change in
3144 * temperature then don't bother computing a
3145 * calibrated temperature value */
3146 if (!change)
3147 return;
3148
3149 temp = iwl4965_get_temperature(priv);
3150 if (temp < 0)
3151 return;
3152
3153 if (priv->temperature != temp) {
3154 if (priv->temperature)
3155 IWL_DEBUG_TEMP("Temperature changed "
3156 "from %dC to %dC\n",
3157 KELVIN_TO_CELSIUS(priv->temperature),
3158 KELVIN_TO_CELSIUS(temp));
3159 else
3160 IWL_DEBUG_TEMP("Temperature "
3161 "initialized to %dC\n",
3162 KELVIN_TO_CELSIUS(temp));
3163 }
3164
3165 priv->temperature = temp;
3166 set_bit(STATUS_TEMPERATURE, &priv->status);
3167
3168 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
3169 iwl4965_is_temp_calib_needed(priv))
3170 queue_work(priv->workqueue, &priv->txpower_work);
3171 }
3172
3173 static void iwl4965_add_radiotap(struct iwl4965_priv *priv,
3174 struct sk_buff *skb,
3175 struct iwl4965_rx_phy_res *rx_start,
3176 struct ieee80211_rx_status *stats,
3177 u32 ampdu_status)
3178 {
3179 s8 signal = stats->ssi;
3180 s8 noise = 0;
3181 int rate = stats->rate;
3182 u64 tsf = stats->mactime;
3183 __le16 phy_flags_hw = rx_start->phy_flags;
3184 struct iwl4965_rt_rx_hdr {
3185 struct ieee80211_radiotap_header rt_hdr;
3186 __le64 rt_tsf; /* TSF */
3187 u8 rt_flags; /* radiotap packet flags */
3188 u8 rt_rate; /* rate in 500kb/s */
3189 __le16 rt_channelMHz; /* channel in MHz */
3190 __le16 rt_chbitmask; /* channel bitfield */
3191 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
3192 s8 rt_dbmnoise;
3193 u8 rt_antenna; /* antenna number */
3194 } __attribute__ ((packed)) *iwl4965_rt;
3195
3196 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
3197 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
3198 if (net_ratelimit())
3199 printk(KERN_ERR "not enough headroom [%d] for "
3200 "radiotap head [%zd]\n",
3201 skb_headroom(skb), sizeof(*iwl4965_rt));
3202 return;
3203 }
3204
3205 /* put radiotap header in front of 802.11 header and data */
3206 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
3207
3208 /* initialise radiotap header */
3209 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
3210 iwl4965_rt->rt_hdr.it_pad = 0;
3211
3212 /* total header + data */
3213 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
3214 &iwl4965_rt->rt_hdr.it_len);
3215
3216 /* Indicate all the fields we add to the radiotap header */
3217 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
3218 (1 << IEEE80211_RADIOTAP_FLAGS) |
3219 (1 << IEEE80211_RADIOTAP_RATE) |
3220 (1 << IEEE80211_RADIOTAP_CHANNEL) |
3221 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
3222 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
3223 (1 << IEEE80211_RADIOTAP_ANTENNA)),
3224 &iwl4965_rt->rt_hdr.it_present);
3225
3226 /* Zero the flags, we'll add to them as we go */
3227 iwl4965_rt->rt_flags = 0;
3228
3229 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
3230
3231 iwl4965_rt->rt_dbmsignal = signal;
3232 iwl4965_rt->rt_dbmnoise = noise;
3233
3234 /* Convert the channel frequency and set the flags */
3235 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
3236 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
3237 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
3238 IEEE80211_CHAN_5GHZ),
3239 &iwl4965_rt->rt_chbitmask);
3240 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
3241 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
3242 IEEE80211_CHAN_2GHZ),
3243 &iwl4965_rt->rt_chbitmask);
3244 else /* 802.11g */
3245 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
3246 IEEE80211_CHAN_2GHZ),
3247 &iwl4965_rt->rt_chbitmask);
3248
3249 rate = iwl4965_rate_index_from_plcp(rate);
3250 if (rate == -1)
3251 iwl4965_rt->rt_rate = 0;
3252 else
3253 iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
3254
3255 /*
3256 * "antenna number"
3257 *
3258 * It seems that the antenna field in the phy flags value
3259 * is actually a bitfield. This is undefined by radiotap,
3260 * it wants an actual antenna number but I always get "7"
3261 * for most legacy frames I receive indicating that the
3262 * same frame was received on all three RX chains.
3263 *
3264 * I think this field should be removed in favour of a
3265 * new 802.11n radiotap field "RX chains" that is defined
3266 * as a bitmask.
3267 */
3268 iwl4965_rt->rt_antenna =
3269 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
3270
3271 /* set the preamble flag if appropriate */
3272 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
3273 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3274
3275 stats->flag |= RX_FLAG_RADIOTAP;
3276 }
3277
3278 static void iwl4965_handle_data_packet(struct iwl4965_priv *priv, int is_data,
3279 int include_phy,
3280 struct iwl4965_rx_mem_buffer *rxb,
3281 struct ieee80211_rx_status *stats)
3282 {
3283 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
3284 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3285 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
3286 struct ieee80211_hdr *hdr;
3287 u16 len;
3288 __le32 *rx_end;
3289 unsigned int skblen;
3290 u32 ampdu_status;
3291
3292 if (!include_phy && priv->last_phy_res[0])
3293 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3294
3295 if (!rx_start) {
3296 IWL_ERROR("MPDU frame without a PHY data\n");
3297 return;
3298 }
3299 if (include_phy) {
3300 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
3301 rx_start->cfg_phy_cnt);
3302
3303 len = le16_to_cpu(rx_start->byte_count);
3304
3305 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
3306 sizeof(struct iwl4965_rx_phy_res) +
3307 rx_start->cfg_phy_cnt + len);
3308
3309 } else {
3310 struct iwl4965_rx_mpdu_res_start *amsdu =
3311 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3312
3313 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
3314 sizeof(struct iwl4965_rx_mpdu_res_start));
3315 len = le16_to_cpu(amsdu->byte_count);
3316 rx_start->byte_count = amsdu->byte_count;
3317 rx_end = (__le32 *) (((u8 *) hdr) + len);
3318 }
3319 if (len > priv->hw_setting.max_pkt_size || len < 16) {
3320 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
3321 return;
3322 }
3323
3324 ampdu_status = le32_to_cpu(*rx_end);
3325 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
3326
3327 /* start from MAC */
3328 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
3329 skb_put(rxb->skb, len); /* end where data ends */
3330
3331 /* We only process data packets if the interface is open */
3332 if (unlikely(!priv->is_open)) {
3333 IWL_DEBUG_DROP_LIMIT
3334 ("Dropping packet while interface is not open.\n");
3335 return;
3336 }
3337
3338 stats->flag = 0;
3339 hdr = (struct ieee80211_hdr *)rxb->skb->data;
3340
3341 if (iwl4965_param_hwcrypto)
3342 iwl4965_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats);
3343
3344 if (priv->add_radiotap)
3345 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
3346
3347 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3348 priv->alloc_rxb_skb--;
3349 rxb->skb = NULL;
3350 #ifdef LED
3351 priv->led_packets += len;
3352 iwl4965_setup_activity_timer(priv);
3353 #endif
3354 }
3355
3356 /* Calc max signal level (dBm) among 3 possible receivers */
3357 static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp)
3358 {
3359 /* data from PHY/DSP regarding signal strength, etc.,
3360 * contents are always there, not configurable by host. */
3361 struct iwl4965_rx_non_cfg_phy *ncphy =
3362 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
3363 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
3364 >> IWL_AGC_DB_POS;
3365
3366 u32 valid_antennae =
3367 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
3368 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
3369 u8 max_rssi = 0;
3370 u32 i;
3371
3372 /* Find max rssi among 3 possible receivers.
3373 * These values are measured by the digital signal processor (DSP).
3374 * They should stay fairly constant even as the signal strength varies,
3375 * if the radio's automatic gain control (AGC) is working right.
3376 * AGC value (see below) will provide the "interesting" info. */
3377 for (i = 0; i < 3; i++)
3378 if (valid_antennae & (1 << i))
3379 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
3380
3381 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
3382 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
3383 max_rssi, agc);
3384
3385 /* dBm = max_rssi dB - agc dB - constant.
3386 * Higher AGC (higher radio gain) means lower signal. */
3387 return (max_rssi - agc - IWL_RSSI_OFFSET);
3388 }
3389
3390 #ifdef CONFIG_IWL4965_HT
3391
3392 /* Parsed Information Elements */
3393 struct ieee802_11_elems {
3394 u8 *ds_params;
3395 u8 ds_params_len;
3396 u8 *tim;
3397 u8 tim_len;
3398 u8 *ibss_params;
3399 u8 ibss_params_len;
3400 u8 *erp_info;
3401 u8 erp_info_len;
3402 u8 *ht_cap_param;
3403 u8 ht_cap_param_len;
3404 u8 *ht_extra_param;
3405 u8 ht_extra_param_len;
3406 };
3407
3408 static int parse_elems(u8 *start, size_t len, struct ieee802_11_elems *elems)
3409 {
3410 size_t left = len;
3411 u8 *pos = start;
3412 int unknown = 0;
3413
3414 memset(elems, 0, sizeof(*elems));
3415
3416 while (left >= 2) {
3417 u8 id, elen;
3418
3419 id = *pos++;
3420 elen = *pos++;
3421 left -= 2;
3422
3423 if (elen > left)
3424 return -1;
3425
3426 switch (id) {
3427 case WLAN_EID_DS_PARAMS:
3428 elems->ds_params = pos;
3429 elems->ds_params_len = elen;
3430 break;
3431 case WLAN_EID_TIM:
3432 elems->tim = pos;
3433 elems->tim_len = elen;
3434 break;
3435 case WLAN_EID_IBSS_PARAMS:
3436 elems->ibss_params = pos;
3437 elems->ibss_params_len = elen;
3438 break;
3439 case WLAN_EID_ERP_INFO:
3440 elems->erp_info = pos;
3441 elems->erp_info_len = elen;
3442 break;
3443 case WLAN_EID_HT_CAPABILITY:
3444 elems->ht_cap_param = pos;
3445 elems->ht_cap_param_len = elen;
3446 break;
3447 case WLAN_EID_HT_EXTRA_INFO:
3448 elems->ht_extra_param = pos;
3449 elems->ht_extra_param_len = elen;
3450 break;
3451 default:
3452 unknown++;
3453 break;
3454 }
3455
3456 left -= elen;
3457 pos += elen;
3458 }
3459
3460 return 0;
3461 }
3462
3463 void iwl4965_init_ht_hw_capab(struct ieee80211_ht_info *ht_info, int mode)
3464 {
3465 ht_info->cap = 0;
3466 memset(ht_info->supp_mcs_set, 0, 16);
3467
3468 ht_info->ht_supported = 1;
3469
3470 if (mode == MODE_IEEE80211A) {
3471 ht_info->cap |= (u16)IEEE80211_HT_CAP_SUP_WIDTH;
3472 ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_40;
3473 ht_info->supp_mcs_set[4] = 0x01;
3474 }
3475 ht_info->cap |= (u16)IEEE80211_HT_CAP_GRN_FLD;
3476 ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_20;
3477 ht_info->cap |= (u16)(IEEE80211_HT_CAP_MIMO_PS &
3478 (IWL_MIMO_PS_NONE << 2));
3479 if (iwl4965_param_amsdu_size_8K) {
3480 printk(KERN_DEBUG "iwl4965 in A-MSDU 8K support mode\n");
3481 ht_info->cap |= (u16)IEEE80211_HT_CAP_MAX_AMSDU;
3482 }
3483
3484 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3485 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3486
3487 ht_info->supp_mcs_set[0] = 0xFF;
3488 ht_info->supp_mcs_set[1] = 0xFF;
3489 }
3490 #endif /* CONFIG_IWL4965_HT */
3491
3492 static void iwl4965_sta_modify_ps_wake(struct iwl4965_priv *priv, int sta_id)
3493 {
3494 unsigned long flags;
3495
3496 spin_lock_irqsave(&priv->sta_lock, flags);
3497 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
3498 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
3499 priv->stations[sta_id].sta.sta.modify_mask = 0;
3500 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3501 spin_unlock_irqrestore(&priv->sta_lock, flags);
3502
3503 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3504 }
3505
3506 static void iwl4965_update_ps_mode(struct iwl4965_priv *priv, u16 ps_bit, u8 *addr)
3507 {
3508 /* FIXME: need locking over ps_status ??? */
3509 u8 sta_id = iwl4965_hw_find_station(priv, addr);
3510
3511 if (sta_id != IWL_INVALID_STATION) {
3512 u8 sta_awake = priv->stations[sta_id].
3513 ps_status == STA_PS_STATUS_WAKE;
3514
3515 if (sta_awake && ps_bit)
3516 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
3517 else if (!sta_awake && !ps_bit) {
3518 iwl4965_sta_modify_ps_wake(priv, sta_id);
3519 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
3520 }
3521 }
3522 }
3523
3524 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
3525
3526 /* Called for REPLY_4965_RX (legacy ABG frames), or
3527 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
3528 static void iwl4965_rx_reply_rx(struct iwl4965_priv *priv,
3529 struct iwl4965_rx_mem_buffer *rxb)
3530 {
3531 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3532 /* Use phy data (Rx signal strength, etc.) contained within
3533 * this rx packet for legacy frames,
3534 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
3535 int include_phy = (pkt->hdr.cmd == REPLY_4965_RX);
3536 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3537 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
3538 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3539 __le32 *rx_end;
3540 unsigned int len = 0;
3541 struct ieee80211_hdr *header;
3542 u16 fc;
3543 struct ieee80211_rx_status stats = {
3544 .mactime = le64_to_cpu(rx_start->timestamp),
3545 .channel = le16_to_cpu(rx_start->channel),
3546 .phymode =
3547 (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
3548 MODE_IEEE80211G : MODE_IEEE80211A,
3549 .antenna = 0,
3550 .rate = iwl4965_hw_get_rate(rx_start->rate_n_flags),
3551 .flag = 0,
3552 };
3553 u8 network_packet;
3554
3555 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
3556 IWL_DEBUG_DROP
3557 ("dsp size out of range [0,20]: "
3558 "%d/n", rx_start->cfg_phy_cnt);
3559 return;
3560 }
3561 if (!include_phy) {
3562 if (priv->last_phy_res[0])
3563 rx_start = (struct iwl4965_rx_phy_res *)
3564 &priv->last_phy_res[1];
3565 else
3566 rx_start = NULL;
3567 }
3568
3569 if (!rx_start) {
3570 IWL_ERROR("MPDU frame without a PHY data\n");
3571 return;
3572 }
3573
3574 if (include_phy) {
3575 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
3576 + rx_start->cfg_phy_cnt);
3577
3578 len = le16_to_cpu(rx_start->byte_count);
3579 rx_end = (__le32 *) (pkt->u.raw + rx_start->cfg_phy_cnt +
3580 sizeof(struct iwl4965_rx_phy_res) + len);
3581 } else {
3582 struct iwl4965_rx_mpdu_res_start *amsdu =
3583 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3584
3585 header = (void *)(pkt->u.raw +
3586 sizeof(struct iwl4965_rx_mpdu_res_start));
3587 len = le16_to_cpu(amsdu->byte_count);
3588 rx_end = (__le32 *) (pkt->u.raw +
3589 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
3590 }
3591
3592 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
3593 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
3594 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
3595 le32_to_cpu(*rx_end));
3596 return;
3597 }
3598
3599 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
3600
3601 stats.freq = ieee80211chan2mhz(stats.channel);
3602
3603 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
3604 stats.ssi = iwl4965_calc_rssi(rx_start);
3605
3606 /* Meaningful noise values are available only from beacon statistics,
3607 * which are gathered only when associated, and indicate noise
3608 * only for the associated network channel ...
3609 * Ignore these noise values while scanning (other channels) */
3610 if (iwl4965_is_associated(priv) &&
3611 !test_bit(STATUS_SCANNING, &priv->status)) {
3612 stats.noise = priv->last_rx_noise;
3613 stats.signal = iwl4965_calc_sig_qual(stats.ssi, stats.noise);
3614 } else {
3615 stats.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3616 stats.signal = iwl4965_calc_sig_qual(stats.ssi, 0);
3617 }
3618
3619 /* Reset beacon noise level if not associated. */
3620 if (!iwl4965_is_associated(priv))
3621 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3622
3623 #ifdef CONFIG_IWL4965_DEBUG
3624 /* TODO: Parts of iwl4965_report_frame are broken for 4965 */
3625 if (iwl4965_debug_level & (IWL_DL_RX))
3626 /* Set "1" to report good data frames in groups of 100 */
3627 iwl4965_report_frame(priv, pkt, header, 1);
3628
3629 if (iwl4965_debug_level & (IWL_DL_RX | IWL_DL_STATS))
3630 IWL_DEBUG_RX("Rssi %d, noise %d, qual %d, TSF %lu\n",
3631 stats.ssi, stats.noise, stats.signal,
3632 (long unsigned int)le64_to_cpu(rx_start->timestamp));
3633 #endif
3634
3635 network_packet = iwl4965_is_network_packet(priv, header);
3636 if (network_packet) {
3637 priv->last_rx_rssi = stats.ssi;
3638 priv->last_beacon_time = priv->ucode_beacon_time;
3639 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
3640 }
3641
3642 fc = le16_to_cpu(header->frame_control);
3643 switch (fc & IEEE80211_FCTL_FTYPE) {
3644 case IEEE80211_FTYPE_MGMT:
3645
3646 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3647 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3648 header->addr2);
3649 switch (fc & IEEE80211_FCTL_STYPE) {
3650 case IEEE80211_STYPE_PROBE_RESP:
3651 case IEEE80211_STYPE_BEACON:
3652 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA &&
3653 !compare_ether_addr(header->addr2, priv->bssid)) ||
3654 (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
3655 !compare_ether_addr(header->addr3, priv->bssid))) {
3656 struct ieee80211_mgmt *mgmt =
3657 (struct ieee80211_mgmt *)header;
3658 u64 timestamp =
3659 le64_to_cpu(mgmt->u.beacon.timestamp);
3660
3661 priv->timestamp0 = timestamp & 0xFFFFFFFF;
3662 priv->timestamp1 =
3663 (timestamp >> 32) & 0xFFFFFFFF;
3664 priv->beacon_int = le16_to_cpu(
3665 mgmt->u.beacon.beacon_int);
3666 if (priv->call_post_assoc_from_beacon &&
3667 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
3668 priv->call_post_assoc_from_beacon = 0;
3669 queue_work(priv->workqueue,
3670 &priv->post_associate.work);
3671 }
3672 }
3673 break;
3674
3675 case IEEE80211_STYPE_ACTION:
3676 break;
3677
3678 /*
3679 * TODO: Use the new callback function from
3680 * mac80211 instead of sniffing these packets.
3681 */
3682 case IEEE80211_STYPE_ASSOC_RESP:
3683 case IEEE80211_STYPE_REASSOC_RESP:
3684 if (network_packet) {
3685 #ifdef CONFIG_IWL4965_HT
3686 u8 *pos = NULL;
3687 struct ieee802_11_elems elems;
3688 #endif /*CONFIG_IWL4965_HT */
3689 struct ieee80211_mgmt *mgnt =
3690 (struct ieee80211_mgmt *)header;
3691
3692 /* We have just associated, give some
3693 * time for the 4-way handshake if
3694 * any. Don't start scan too early. */
3695 priv->next_scan_jiffies = jiffies +
3696 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
3697
3698 priv->assoc_id = (~((1 << 15) | (1 << 14))
3699 & le16_to_cpu(mgnt->u.assoc_resp.aid));
3700 priv->assoc_capability =
3701 le16_to_cpu(
3702 mgnt->u.assoc_resp.capab_info);
3703 #ifdef CONFIG_IWL4965_HT
3704 pos = mgnt->u.assoc_resp.variable;
3705 if (!parse_elems(pos,
3706 len - (pos - (u8 *) mgnt),
3707 &elems)) {
3708 if (elems.ht_extra_param &&
3709 elems.ht_cap_param)
3710 break;
3711 }
3712 #endif /*CONFIG_IWL4965_HT */
3713 /* assoc_id is 0 no association */
3714 if (!priv->assoc_id)
3715 break;
3716 if (priv->beacon_int)
3717 queue_work(priv->workqueue,
3718 &priv->post_associate.work);
3719 else
3720 priv->call_post_assoc_from_beacon = 1;
3721 }
3722
3723 break;
3724
3725 case IEEE80211_STYPE_PROBE_REQ:
3726 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
3727 !iwl4965_is_associated(priv)) {
3728 DECLARE_MAC_BUF(mac1);
3729 DECLARE_MAC_BUF(mac2);
3730 DECLARE_MAC_BUF(mac3);
3731
3732 IWL_DEBUG_DROP("Dropping (non network): "
3733 "%s, %s, %s\n",
3734 print_mac(mac1, header->addr1),
3735 print_mac(mac2, header->addr2),
3736 print_mac(mac3, header->addr3));
3737 return;
3738 }
3739 }
3740 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &stats);
3741 break;
3742
3743 case IEEE80211_FTYPE_CTL:
3744 #ifdef CONFIG_IWL4965_HT
3745 switch (fc & IEEE80211_FCTL_STYPE) {
3746 case IEEE80211_STYPE_BACK_REQ:
3747 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
3748 iwl4965_handle_data_packet(priv, 0, include_phy,
3749 rxb, &stats);
3750 break;
3751 default:
3752 break;
3753 }
3754 #endif
3755 break;
3756
3757 case IEEE80211_FTYPE_DATA: {
3758 DECLARE_MAC_BUF(mac1);
3759 DECLARE_MAC_BUF(mac2);
3760 DECLARE_MAC_BUF(mac3);
3761
3762 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3763 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3764 header->addr2);
3765
3766 if (unlikely(!network_packet))
3767 IWL_DEBUG_DROP("Dropping (non network): "
3768 "%s, %s, %s\n",
3769 print_mac(mac1, header->addr1),
3770 print_mac(mac2, header->addr2),
3771 print_mac(mac3, header->addr3));
3772 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
3773 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
3774 print_mac(mac1, header->addr1),
3775 print_mac(mac2, header->addr2),
3776 print_mac(mac3, header->addr3));
3777 else
3778 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
3779 &stats);
3780 break;
3781 }
3782 default:
3783 break;
3784
3785 }
3786 }
3787
3788 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
3789 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
3790 static void iwl4965_rx_reply_rx_phy(struct iwl4965_priv *priv,
3791 struct iwl4965_rx_mem_buffer *rxb)
3792 {
3793 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3794 priv->last_phy_res[0] = 1;
3795 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
3796 sizeof(struct iwl4965_rx_phy_res));
3797 }
3798
3799 static void iwl4965_rx_missed_beacon_notif(struct iwl4965_priv *priv,
3800 struct iwl4965_rx_mem_buffer *rxb)
3801
3802 {
3803 #ifdef CONFIG_IWL4965_SENSITIVITY
3804 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3805 struct iwl4965_missed_beacon_notif *missed_beacon;
3806
3807 missed_beacon = &pkt->u.missed_beacon;
3808 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
3809 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
3810 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
3811 le32_to_cpu(missed_beacon->total_missed_becons),
3812 le32_to_cpu(missed_beacon->num_recvd_beacons),
3813 le32_to_cpu(missed_beacon->num_expected_beacons));
3814 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
3815 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)))
3816 queue_work(priv->workqueue, &priv->sensitivity_work);
3817 }
3818 #endif /*CONFIG_IWL4965_SENSITIVITY*/
3819 }
3820
3821 #ifdef CONFIG_IWL4965_HT
3822
3823 /**
3824 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
3825 */
3826 static void iwl4965_sta_modify_enable_tid_tx(struct iwl4965_priv *priv,
3827 int sta_id, int tid)
3828 {
3829 unsigned long flags;
3830
3831 /* Remove "disable" flag, to enable Tx for this TID */
3832 spin_lock_irqsave(&priv->sta_lock, flags);
3833 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
3834 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
3835 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3836 spin_unlock_irqrestore(&priv->sta_lock, flags);
3837
3838 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3839 }
3840
3841 /**
3842 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
3843 *
3844 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
3845 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
3846 */
3847 static int iwl4965_tx_status_reply_compressed_ba(struct iwl4965_priv *priv,
3848 struct iwl4965_ht_agg *agg,
3849 struct iwl4965_compressed_ba_resp*
3850 ba_resp)
3851
3852 {
3853 int i, sh, ack;
3854 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
3855 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3856 u64 bitmap;
3857 int successes = 0;
3858 struct ieee80211_tx_status *tx_status;
3859
3860 if (unlikely(!agg->wait_for_ba)) {
3861 IWL_ERROR("Received BA when not expected\n");
3862 return -EINVAL;
3863 }
3864
3865 /* Mark that the expected block-ack response arrived */
3866 agg->wait_for_ba = 0;
3867 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
3868
3869 /* Calculate shift to align block-ack bits with our Tx window bits */
3870 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
3871 if (sh < 0) /* tbw something is wrong with indices */
3872 sh += 0x100;
3873
3874 /* don't use 64-bit values for now */
3875 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
3876
3877 if (agg->frame_count > (64 - sh)) {
3878 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
3879 return -1;
3880 }
3881
3882 /* check for success or failure according to the
3883 * transmitted bitmap and block-ack bitmap */
3884 bitmap &= agg->bitmap;
3885
3886 /* For each frame attempted in aggregation,
3887 * update driver's record of tx frame's status. */
3888 for (i = 0; i < agg->frame_count ; i++) {
3889 ack = bitmap & (1 << i);
3890 successes += !!ack;
3891 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
3892 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
3893 agg->start_idx + i);
3894 }
3895
3896 tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
3897 tx_status->flags = IEEE80211_TX_STATUS_ACK;
3898 tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
3899 tx_status->ampdu_ack_map = successes;
3900 tx_status->ampdu_ack_len = agg->frame_count;
3901 tx_status->control.tx_rate = agg->rate_n_flags;
3902
3903 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", bitmap);
3904
3905 return 0;
3906 }
3907
3908 /**
3909 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
3910 */
3911 static void iwl4965_tx_queue_stop_scheduler(struct iwl4965_priv *priv,
3912 u16 txq_id)
3913 {
3914 /* Simply stop the queue, but don't change any configuration;
3915 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
3916 iwl4965_write_prph(priv,
3917 KDR_SCD_QUEUE_STATUS_BITS(txq_id),
3918 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
3919 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
3920 }
3921
3922 /**
3923 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
3924 */
3925 static int iwl4965_tx_queue_agg_disable(struct iwl4965_priv *priv, u16 txq_id,
3926 u16 ssn_idx, u8 tx_fifo)
3927 {
3928 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
3929 IWL_WARNING("queue number too small: %d, must be > %d\n",
3930 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3931 return -EINVAL;
3932 }
3933
3934 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3935
3936 iwl4965_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3937
3938 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3939 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3940 /* supposes that ssn_idx is valid (!= 0xFFF) */
3941 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3942
3943 iwl4965_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
3944 iwl4965_txq_ctx_deactivate(priv, txq_id);
3945 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
3946
3947 return 0;
3948 }
3949
3950 int iwl4965_check_empty_hw_queue(struct iwl4965_priv *priv, int sta_id,
3951 u8 tid, int txq_id)
3952 {
3953 struct iwl4965_queue *q = &priv->txq[txq_id].q;
3954 u8 *addr = priv->stations[sta_id].sta.sta.addr;
3955 struct iwl4965_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
3956
3957 switch (priv->stations[sta_id].tid[tid].agg.state) {
3958 case IWL_EMPTYING_HW_QUEUE_DELBA:
3959 /* We are reclaiming the last packet of the */
3960 /* aggregated HW queue */
3961 if (txq_id == tid_data->agg.txq_id &&
3962 q->read_ptr == q->write_ptr) {
3963 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
3964 int tx_fifo = default_tid_to_tx_fifo[tid];
3965 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
3966 iwl4965_tx_queue_agg_disable(priv, txq_id,
3967 ssn, tx_fifo);
3968 tid_data->agg.state = IWL_AGG_OFF;
3969 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3970 }
3971 break;
3972 case IWL_EMPTYING_HW_QUEUE_ADDBA:
3973 /* We are reclaiming the last packet of the queue */
3974 if (tid_data->tfds_in_queue == 0) {
3975 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
3976 tid_data->agg.state = IWL_AGG_ON;
3977 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3978 }
3979 break;
3980 }
3981 return 0;
3982 }
3983
3984 /**
3985 * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
3986 * @index -- current index
3987 * @n_bd -- total number of entries in queue (s/b power of 2)
3988 */
3989 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
3990 {
3991 return (index == 0) ? n_bd - 1 : index - 1;
3992 }
3993
3994 /**
3995 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
3996 *
3997 * Handles block-acknowledge notification from device, which reports success
3998 * of frames sent via aggregation.
3999 */
4000 static void iwl4965_rx_reply_compressed_ba(struct iwl4965_priv *priv,
4001 struct iwl4965_rx_mem_buffer *rxb)
4002 {
4003 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4004 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
4005 int index;
4006 struct iwl4965_tx_queue *txq = NULL;
4007 struct iwl4965_ht_agg *agg;
4008 DECLARE_MAC_BUF(mac);
4009
4010 /* "flow" corresponds to Tx queue */
4011 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
4012
4013 /* "ssn" is start of block-ack Tx window, corresponds to index
4014 * (in Tx queue's circular buffer) of first TFD/frame in window */
4015 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
4016
4017 if (scd_flow >= ARRAY_SIZE(priv->txq)) {
4018 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
4019 return;
4020 }
4021
4022 txq = &priv->txq[scd_flow];
4023 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
4024
4025 /* Find index just before block-ack window */
4026 index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
4027
4028 /* TODO: Need to get this copy more safely - now good for debug */
4029
4030 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
4031 "sta_id = %d\n",
4032 agg->wait_for_ba,
4033 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
4034 ba_resp->sta_id);
4035 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
4036 "%d, scd_ssn = %d\n",
4037 ba_resp->tid,
4038 ba_resp->seq_ctl,
4039 ba_resp->bitmap,
4040 ba_resp->scd_flow,
4041 ba_resp->scd_ssn);
4042 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
4043 agg->start_idx,
4044 agg->bitmap);
4045
4046 /* Update driver's record of ACK vs. not for each frame in window */
4047 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
4048
4049 /* Release all TFDs before the SSN, i.e. all TFDs in front of
4050 * block-ack window (we assume that they've been successfully
4051 * transmitted ... if not, it's too late anyway). */
4052 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
4053 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
4054 priv->stations[ba_resp->sta_id].
4055 tid[ba_resp->tid].tfds_in_queue -= freed;
4056 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
4057 priv->mac80211_registered &&
4058 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
4059 ieee80211_wake_queue(priv->hw, scd_flow);
4060 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
4061 ba_resp->tid, scd_flow);
4062 }
4063 }
4064
4065 /**
4066 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
4067 */
4068 static int iwl4965_tx_queue_set_q2ratid(struct iwl4965_priv *priv, u16 ra_tid,
4069 u16 txq_id)
4070 {
4071 u32 tbl_dw_addr;
4072 u32 tbl_dw;
4073 u16 scd_q2ratid;
4074
4075 scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
4076
4077 tbl_dw_addr = priv->scd_base_addr +
4078 SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
4079
4080 tbl_dw = iwl4965_read_targ_mem(priv, tbl_dw_addr);
4081
4082 if (txq_id & 0x1)
4083 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
4084 else
4085 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
4086
4087 iwl4965_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
4088
4089 return 0;
4090 }
4091
4092
4093 /**
4094 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
4095 *
4096 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
4097 * i.e. it must be one of the higher queues used for aggregation
4098 */
4099 static int iwl4965_tx_queue_agg_enable(struct iwl4965_priv *priv, int txq_id,
4100 int tx_fifo, int sta_id, int tid,
4101 u16 ssn_idx)
4102 {
4103 unsigned long flags;
4104 int rc;
4105 u16 ra_tid;
4106
4107 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
4108 IWL_WARNING("queue number too small: %d, must be > %d\n",
4109 txq_id, IWL_BACK_QUEUE_FIRST_ID);
4110
4111 ra_tid = BUILD_RAxTID(sta_id, tid);
4112
4113 /* Modify device's station table to Tx this TID */
4114 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
4115
4116 spin_lock_irqsave(&priv->lock, flags);
4117 rc = iwl4965_grab_nic_access(priv);
4118 if (rc) {
4119 spin_unlock_irqrestore(&priv->lock, flags);
4120 return rc;
4121 }
4122
4123 /* Stop this Tx queue before configuring it */
4124 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
4125
4126 /* Map receiver-address / traffic-ID to this queue */
4127 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
4128
4129 /* Set this queue as a chain-building queue */
4130 iwl4965_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
4131
4132 /* Place first TFD at index corresponding to start sequence number.
4133 * Assumes that ssn_idx is valid (!= 0xFFF) */
4134 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
4135 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
4136 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4137
4138 /* Set up Tx window size and frame limit for this queue */
4139 iwl4965_write_targ_mem(priv,
4140 priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
4141 (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
4142 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
4143
4144 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
4145 SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
4146 (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
4147 & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
4148
4149 iwl4965_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
4150
4151 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
4152 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
4153
4154 iwl4965_release_nic_access(priv);
4155 spin_unlock_irqrestore(&priv->lock, flags);
4156
4157 return 0;
4158 }
4159
4160 #endif /* CONFIG_IWL4965_HT */
4161
4162 /**
4163 * iwl4965_add_station - Initialize a station's hardware rate table
4164 *
4165 * The uCode's station table contains a table of fallback rates
4166 * for automatic fallback during transmission.
4167 *
4168 * NOTE: This sets up a default set of values. These will be replaced later
4169 * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
4170 * rc80211_simple.
4171 *
4172 * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
4173 * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
4174 * which requires station table entry to exist).
4175 */
4176 void iwl4965_add_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
4177 {
4178 int i, r;
4179 struct iwl4965_link_quality_cmd link_cmd = {
4180 .reserved1 = 0,
4181 };
4182 u16 rate_flags;
4183
4184 /* Set up the rate scaling to start at selected rate, fall back
4185 * all the way down to 1M in IEEE order, and then spin on 1M */
4186 if (is_ap)
4187 r = IWL_RATE_54M_INDEX;
4188 else if (priv->phymode == MODE_IEEE80211A)
4189 r = IWL_RATE_6M_INDEX;
4190 else
4191 r = IWL_RATE_1M_INDEX;
4192
4193 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
4194 rate_flags = 0;
4195 if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
4196 rate_flags |= RATE_MCS_CCK_MSK;
4197
4198 /* Use Tx antenna B only */
4199 rate_flags |= RATE_MCS_ANT_B_MSK;
4200 rate_flags &= ~RATE_MCS_ANT_A_MSK;
4201
4202 link_cmd.rs_table[i].rate_n_flags =
4203 iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
4204 r = iwl4965_get_prev_ieee_rate(r);
4205 }
4206
4207 link_cmd.general_params.single_stream_ant_msk = 2;
4208 link_cmd.general_params.dual_stream_ant_msk = 3;
4209 link_cmd.agg_params.agg_dis_start_th = 3;
4210 link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
4211
4212 /* Update the rate scaling for control frame Tx to AP */
4213 link_cmd.sta_id = is_ap ? IWL_AP_ID : IWL4965_BROADCAST_ID;
4214
4215 iwl4965_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd),
4216 &link_cmd);
4217 }
4218
4219 #ifdef CONFIG_IWL4965_HT
4220
4221 static u8 iwl4965_is_channel_extension(struct iwl4965_priv *priv, int phymode,
4222 u16 channel, u8 extension_chan_offset)
4223 {
4224 const struct iwl4965_channel_info *ch_info;
4225
4226 ch_info = iwl4965_get_channel_info(priv, phymode, channel);
4227 if (!is_channel_valid(ch_info))
4228 return 0;
4229
4230 if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_AUTO)
4231 return 0;
4232
4233 if ((ch_info->fat_extension_channel == extension_chan_offset) ||
4234 (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX))
4235 return 1;
4236
4237 return 0;
4238 }
4239
4240 static u8 iwl4965_is_fat_tx_allowed(struct iwl4965_priv *priv,
4241 struct ieee80211_ht_info *sta_ht_inf)
4242 {
4243 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
4244
4245 if ((!iwl_ht_conf->is_ht) ||
4246 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
4247 (iwl_ht_conf->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_AUTO))
4248 return 0;
4249
4250 if (sta_ht_inf) {
4251 if ((!sta_ht_inf->ht_supported) ||
4252 (!sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH))
4253 return 0;
4254 }
4255
4256 return (iwl4965_is_channel_extension(priv, priv->phymode,
4257 iwl_ht_conf->control_channel,
4258 iwl_ht_conf->extension_chan_offset));
4259 }
4260
4261 void iwl4965_set_rxon_ht(struct iwl4965_priv *priv, struct iwl_ht_info *ht_info)
4262 {
4263 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
4264 u32 val;
4265
4266 if (!ht_info->is_ht)
4267 return;
4268
4269 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
4270 if (iwl4965_is_fat_tx_allowed(priv, NULL))
4271 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4272 else
4273 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
4274 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
4275
4276 if (le16_to_cpu(rxon->channel) != ht_info->control_channel) {
4277 IWL_DEBUG_ASSOC("control diff than current %d %d\n",
4278 le16_to_cpu(rxon->channel),
4279 ht_info->control_channel);
4280 rxon->channel = cpu_to_le16(ht_info->control_channel);
4281 return;
4282 }
4283
4284 /* Note: control channel is opposite of extension channel */
4285 switch (ht_info->extension_chan_offset) {
4286 case IWL_EXT_CHANNEL_OFFSET_ABOVE:
4287 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
4288 break;
4289 case IWL_EXT_CHANNEL_OFFSET_BELOW:
4290 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
4291 break;
4292 case IWL_EXT_CHANNEL_OFFSET_AUTO:
4293 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4294 break;
4295 default:
4296 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4297 break;
4298 }
4299
4300 val = ht_info->ht_protection;
4301
4302 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
4303
4304 iwl4965_set_rxon_chain(priv);
4305
4306 IWL_DEBUG_ASSOC("supported HT rate 0x%X %X "
4307 "rxon flags 0x%X operation mode :0x%X "
4308 "extension channel offset 0x%x "
4309 "control chan %d\n",
4310 ht_info->supp_mcs_set[0], ht_info->supp_mcs_set[1],
4311 le32_to_cpu(rxon->flags), ht_info->ht_protection,
4312 ht_info->extension_chan_offset,
4313 ht_info->control_channel);
4314 return;
4315 }
4316
4317 void iwl4965_set_ht_add_station(struct iwl4965_priv *priv, u8 index,
4318 struct ieee80211_ht_info *sta_ht_inf)
4319 {
4320 __le32 sta_flags;
4321 u8 mimo_ps_mode;
4322
4323 if (!sta_ht_inf || !sta_ht_inf->ht_supported)
4324 goto done;
4325
4326 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
4327
4328 sta_flags = priv->stations[index].sta.station_flags;
4329
4330 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
4331
4332 switch (mimo_ps_mode) {
4333 case WLAN_HT_CAP_MIMO_PS_STATIC:
4334 sta_flags |= STA_FLG_MIMO_DIS_MSK;
4335 break;
4336 case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
4337 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
4338 break;
4339 case WLAN_HT_CAP_MIMO_PS_DISABLED:
4340 break;
4341 default:
4342 IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
4343 break;
4344 }
4345
4346 sta_flags |= cpu_to_le32(
4347 (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
4348
4349 sta_flags |= cpu_to_le32(
4350 (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
4351
4352 if (iwl4965_is_fat_tx_allowed(priv, sta_ht_inf))
4353 sta_flags |= STA_FLG_FAT_EN_MSK;
4354 else
4355 sta_flags &= ~STA_FLG_FAT_EN_MSK;
4356
4357 priv->stations[index].sta.station_flags = sta_flags;
4358 done:
4359 return;
4360 }
4361
4362 static void iwl4965_sta_modify_add_ba_tid(struct iwl4965_priv *priv,
4363 int sta_id, int tid, u16 ssn)
4364 {
4365 unsigned long flags;
4366
4367 spin_lock_irqsave(&priv->sta_lock, flags);
4368 priv->stations[sta_id].sta.station_flags_msk = 0;
4369 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
4370 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
4371 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
4372 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4373 spin_unlock_irqrestore(&priv->sta_lock, flags);
4374
4375 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4376 }
4377
4378 static void iwl4965_sta_modify_del_ba_tid(struct iwl4965_priv *priv,
4379 int sta_id, int tid)
4380 {
4381 unsigned long flags;
4382
4383 spin_lock_irqsave(&priv->sta_lock, flags);
4384 priv->stations[sta_id].sta.station_flags_msk = 0;
4385 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
4386 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
4387 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4388 spin_unlock_irqrestore(&priv->sta_lock, flags);
4389
4390 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4391 }
4392
4393 /*
4394 * Find first available (lowest unused) Tx Queue, mark it "active".
4395 * Called only when finding queue for aggregation.
4396 * Should never return anything < 7, because they should already
4397 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
4398 */
4399 static int iwl4965_txq_ctx_activate_free(struct iwl4965_priv *priv)
4400 {
4401 int txq_id;
4402
4403 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
4404 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
4405 return txq_id;
4406 return -1;
4407 }
4408
4409 static int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, const u8 *da,
4410 u16 tid, u16 *start_seq_num)
4411 {
4412 struct iwl4965_priv *priv = hw->priv;
4413 int sta_id;
4414 int tx_fifo;
4415 int txq_id;
4416 int ssn = -1;
4417 int rc = 0;
4418 unsigned long flags;
4419 struct iwl4965_tid_data *tid_data;
4420 DECLARE_MAC_BUF(mac);
4421
4422 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4423 tx_fifo = default_tid_to_tx_fifo[tid];
4424 else
4425 return -EINVAL;
4426
4427 IWL_WARNING("%s on da = %s tid = %d\n",
4428 __func__, print_mac(mac, da), tid);
4429
4430 sta_id = iwl4965_hw_find_station(priv, da);
4431 if (sta_id == IWL_INVALID_STATION)
4432 return -ENXIO;
4433
4434 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
4435 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
4436 return -ENXIO;
4437 }
4438
4439 txq_id = iwl4965_txq_ctx_activate_free(priv);
4440 if (txq_id == -1)
4441 return -ENXIO;
4442
4443 spin_lock_irqsave(&priv->sta_lock, flags);
4444 tid_data = &priv->stations[sta_id].tid[tid];
4445 ssn = SEQ_TO_SN(tid_data->seq_number);
4446 tid_data->agg.txq_id = txq_id;
4447 spin_unlock_irqrestore(&priv->sta_lock, flags);
4448
4449 *start_seq_num = ssn;
4450 rc = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
4451 sta_id, tid, ssn);
4452 if (rc)
4453 return rc;
4454
4455 rc = 0;
4456 if (tid_data->tfds_in_queue == 0) {
4457 printk(KERN_ERR "HW queue is empty\n");
4458 tid_data->agg.state = IWL_AGG_ON;
4459 ieee80211_start_tx_ba_cb_irqsafe(hw, da, tid);
4460 } else {
4461 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
4462 tid_data->tfds_in_queue);
4463 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
4464 }
4465 return rc;
4466 }
4467
4468 static int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, const u8 *da,
4469 u16 tid)
4470 {
4471
4472 struct iwl4965_priv *priv = hw->priv;
4473 int tx_fifo_id, txq_id, sta_id, ssn = -1;
4474 struct iwl4965_tid_data *tid_data;
4475 int rc, write_ptr, read_ptr;
4476 unsigned long flags;
4477 DECLARE_MAC_BUF(mac);
4478
4479 if (!da) {
4480 IWL_ERROR("da = NULL\n");
4481 return -EINVAL;
4482 }
4483
4484 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4485 tx_fifo_id = default_tid_to_tx_fifo[tid];
4486 else
4487 return -EINVAL;
4488
4489 sta_id = iwl4965_hw_find_station(priv, da);
4490
4491 if (sta_id == IWL_INVALID_STATION)
4492 return -ENXIO;
4493
4494 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
4495 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
4496
4497 tid_data = &priv->stations[sta_id].tid[tid];
4498 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
4499 txq_id = tid_data->agg.txq_id;
4500 write_ptr = priv->txq[txq_id].q.write_ptr;
4501 read_ptr = priv->txq[txq_id].q.read_ptr;
4502
4503 /* The queue is not empty */
4504 if (write_ptr != read_ptr) {
4505 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
4506 priv->stations[sta_id].tid[tid].agg.state =
4507 IWL_EMPTYING_HW_QUEUE_DELBA;
4508 return 0;
4509 }
4510
4511 IWL_DEBUG_HT("HW queue empty\n");;
4512 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
4513
4514 spin_lock_irqsave(&priv->lock, flags);
4515 rc = iwl4965_grab_nic_access(priv);
4516 if (rc) {
4517 spin_unlock_irqrestore(&priv->lock, flags);
4518 return rc;
4519 }
4520 rc = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
4521 iwl4965_release_nic_access(priv);
4522 spin_unlock_irqrestore(&priv->lock, flags);
4523
4524 if (rc)
4525 return rc;
4526
4527 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, da, tid);
4528
4529 IWL_DEBUG_INFO("iwl4965_mac_ht_tx_agg_stop on da=%s tid=%d\n",
4530 print_mac(mac, da), tid);
4531
4532 return 0;
4533 }
4534
4535 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
4536 enum ieee80211_ampdu_mlme_action action,
4537 const u8 *addr, u16 tid, u16 *ssn)
4538 {
4539 struct iwl4965_priv *priv = hw->priv;
4540 int sta_id;
4541 DECLARE_MAC_BUF(mac);
4542
4543 IWL_DEBUG_HT("A-MPDU action on da=%s tid=%d ",
4544 print_mac(mac, addr), tid);
4545 sta_id = iwl4965_hw_find_station(priv, addr);
4546 switch (action) {
4547 case IEEE80211_AMPDU_RX_START:
4548 IWL_DEBUG_HT("start Rx\n");
4549 iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, *ssn);
4550 break;
4551 case IEEE80211_AMPDU_RX_STOP:
4552 IWL_DEBUG_HT("stop Rx\n");
4553 iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
4554 break;
4555 case IEEE80211_AMPDU_TX_START:
4556 IWL_DEBUG_HT("start Tx\n");
4557 return iwl4965_mac_ht_tx_agg_start(hw, addr, tid, ssn);
4558 case IEEE80211_AMPDU_TX_STOP:
4559 IWL_DEBUG_HT("stop Tx\n");
4560 return iwl4965_mac_ht_tx_agg_stop(hw, addr, tid);
4561 default:
4562 IWL_DEBUG_HT("unknown\n");
4563 return -EINVAL;
4564 break;
4565 }
4566 return 0;
4567 }
4568
4569 #endif /* CONFIG_IWL4965_HT */
4570
4571 /* Set up 4965-specific Rx frame reply handlers */
4572 void iwl4965_hw_rx_handler_setup(struct iwl4965_priv *priv)
4573 {
4574 /* Legacy Rx frames */
4575 priv->rx_handlers[REPLY_4965_RX] = iwl4965_rx_reply_rx;
4576
4577 /* High-throughput (HT) Rx frames */
4578 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
4579 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
4580
4581 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
4582 iwl4965_rx_missed_beacon_notif;
4583
4584 #ifdef CONFIG_IWL4965_HT
4585 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
4586 #endif /* CONFIG_IWL4965_HT */
4587 }
4588
4589 void iwl4965_hw_setup_deferred_work(struct iwl4965_priv *priv)
4590 {
4591 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
4592 INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work);
4593 #ifdef CONFIG_IWL4965_SENSITIVITY
4594 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
4595 #endif
4596 init_timer(&priv->statistics_periodic);
4597 priv->statistics_periodic.data = (unsigned long)priv;
4598 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
4599 }
4600
4601 void iwl4965_hw_cancel_deferred_work(struct iwl4965_priv *priv)
4602 {
4603 del_timer_sync(&priv->statistics_periodic);
4604
4605 cancel_delayed_work(&priv->init_alive_start);
4606 }
4607
4608 struct pci_device_id iwl4965_hw_card_ids[] = {
4609 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4229)},
4610 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4230)},
4611 {0}
4612 };
4613
4614 /*
4615 * The device's EEPROM semaphore prevents conflicts between driver and uCode
4616 * when accessing the EEPROM; each access is a series of pulses to/from the
4617 * EEPROM chip, not a single event, so even reads could conflict if they
4618 * weren't arbitrated by the semaphore.
4619 */
4620 int iwl4965_eeprom_acquire_semaphore(struct iwl4965_priv *priv)
4621 {
4622 u16 count;
4623 int rc;
4624
4625 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
4626 /* Request semaphore */
4627 iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
4628 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
4629
4630 /* See if we got it */
4631 rc = iwl4965_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
4632 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
4633 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
4634 EEPROM_SEM_TIMEOUT);
4635 if (rc >= 0) {
4636 IWL_DEBUG_IO("Acquired semaphore after %d tries.\n",
4637 count+1);
4638 return rc;
4639 }
4640 }
4641
4642 return rc;
4643 }
4644
4645 MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);
Linux kernel - Deliverables
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