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iwlwifi: rename iwl-4965-io.h to iwl-io.h
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40
41 #include "iwl-eeprom.h"
42 #include "iwl-core.h"
43 #include "iwl-4965.h"
44 #include "iwl-io.h"
45 #include "iwl-helpers.h"
46
47 /* module parameters */
48 static struct iwl_mod_params iwl4965_mod_params = {
49 .num_of_queues = IWL_MAX_NUM_QUEUES,
50 .enable_qos = 1,
51 .amsdu_size_8K = 1,
52 /* the rest are 0 by default */
53 };
54
55 static void iwl4965_hw_card_show_info(struct iwl_priv *priv);
56
57 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
58 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
59 IWL_RATE_SISO_##s##M_PLCP, \
60 IWL_RATE_MIMO_##s##M_PLCP, \
61 IWL_RATE_##r##M_IEEE, \
62 IWL_RATE_##ip##M_INDEX, \
63 IWL_RATE_##in##M_INDEX, \
64 IWL_RATE_##rp##M_INDEX, \
65 IWL_RATE_##rn##M_INDEX, \
66 IWL_RATE_##pp##M_INDEX, \
67 IWL_RATE_##np##M_INDEX }
68
69 /*
70 * Parameter order:
71 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
72 *
73 * If there isn't a valid next or previous rate then INV is used which
74 * maps to IWL_RATE_INVALID
75 *
76 */
77 const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
78 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
79 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
80 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
81 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
82 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
83 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
84 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
85 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
86 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
87 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
88 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
89 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
90 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
91 };
92
93 #ifdef CONFIG_IWL4965_HT
94
95 static const u16 default_tid_to_tx_fifo[] = {
96 IWL_TX_FIFO_AC1,
97 IWL_TX_FIFO_AC0,
98 IWL_TX_FIFO_AC0,
99 IWL_TX_FIFO_AC1,
100 IWL_TX_FIFO_AC2,
101 IWL_TX_FIFO_AC2,
102 IWL_TX_FIFO_AC3,
103 IWL_TX_FIFO_AC3,
104 IWL_TX_FIFO_NONE,
105 IWL_TX_FIFO_NONE,
106 IWL_TX_FIFO_NONE,
107 IWL_TX_FIFO_NONE,
108 IWL_TX_FIFO_NONE,
109 IWL_TX_FIFO_NONE,
110 IWL_TX_FIFO_NONE,
111 IWL_TX_FIFO_NONE,
112 IWL_TX_FIFO_AC3
113 };
114
115 #endif /*CONFIG_IWL4965_HT */
116
117 static int iwl4965_init_drv(struct iwl_priv *priv)
118 {
119 int ret;
120 int i;
121
122 priv->antenna = (enum iwl4965_antenna)priv->cfg->mod_params->antenna;
123 priv->retry_rate = 1;
124 priv->ibss_beacon = NULL;
125
126 spin_lock_init(&priv->lock);
127 spin_lock_init(&priv->power_data.lock);
128 spin_lock_init(&priv->sta_lock);
129 spin_lock_init(&priv->hcmd_lock);
130 spin_lock_init(&priv->lq_mngr.lock);
131
132 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
133 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
134
135 INIT_LIST_HEAD(&priv->free_frames);
136
137 mutex_init(&priv->mutex);
138
139 /* Clear the driver's (not device's) station table */
140 iwlcore_clear_stations_table(priv);
141
142 priv->data_retry_limit = -1;
143 priv->ieee_channels = NULL;
144 priv->ieee_rates = NULL;
145 priv->band = IEEE80211_BAND_2GHZ;
146
147 priv->iw_mode = IEEE80211_IF_TYPE_STA;
148
149 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
150 priv->valid_antenna = 0x7; /* assume all 3 connected */
151 priv->ps_mode = IWL_MIMO_PS_NONE;
152
153 /* Choose which receivers/antennas to use */
154 iwl4965_set_rxon_chain(priv);
155
156 iwlcore_reset_qos(priv);
157
158 priv->qos_data.qos_active = 0;
159 priv->qos_data.qos_cap.val = 0;
160
161 iwlcore_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
162
163 priv->rates_mask = IWL_RATES_MASK;
164 /* If power management is turned on, default to AC mode */
165 priv->power_mode = IWL_POWER_AC;
166 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
167
168 ret = iwl_init_channel_map(priv);
169 if (ret) {
170 IWL_ERROR("initializing regulatory failed: %d\n", ret);
171 goto err;
172 }
173
174 ret = iwl4965_init_geos(priv);
175 if (ret) {
176 IWL_ERROR("initializing geos failed: %d\n", ret);
177 goto err_free_channel_map;
178 }
179
180 iwl4965_rate_control_register(priv->hw);
181 ret = ieee80211_register_hw(priv->hw);
182 if (ret) {
183 IWL_ERROR("Failed to register network device (error %d)\n",
184 ret);
185 goto err_free_geos;
186 }
187
188 priv->hw->conf.beacon_int = 100;
189 priv->mac80211_registered = 1;
190
191 return 0;
192
193 err_free_geos:
194 iwl4965_free_geos(priv);
195 err_free_channel_map:
196 iwl_free_channel_map(priv);
197 err:
198 return ret;
199 }
200
201 static int is_fat_channel(__le32 rxon_flags)
202 {
203 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
204 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
205 }
206
207 static u8 is_single_stream(struct iwl_priv *priv)
208 {
209 #ifdef CONFIG_IWL4965_HT
210 if (!priv->current_ht_config.is_ht ||
211 (priv->current_ht_config.supp_mcs_set[1] == 0) ||
212 (priv->ps_mode == IWL_MIMO_PS_STATIC))
213 return 1;
214 #else
215 return 1;
216 #endif /*CONFIG_IWL4965_HT */
217 return 0;
218 }
219
220 int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
221 {
222 int idx = 0;
223
224 /* 4965 HT rate format */
225 if (rate_n_flags & RATE_MCS_HT_MSK) {
226 idx = (rate_n_flags & 0xff);
227
228 if (idx >= IWL_RATE_MIMO_6M_PLCP)
229 idx = idx - IWL_RATE_MIMO_6M_PLCP;
230
231 idx += IWL_FIRST_OFDM_RATE;
232 /* skip 9M not supported in ht*/
233 if (idx >= IWL_RATE_9M_INDEX)
234 idx += 1;
235 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
236 return idx;
237
238 /* 4965 legacy rate format, search for match in table */
239 } else {
240 for (idx = 0; idx < ARRAY_SIZE(iwl4965_rates); idx++)
241 if (iwl4965_rates[idx].plcp == (rate_n_flags & 0xFF))
242 return idx;
243 }
244
245 return -1;
246 }
247
248 /**
249 * translate ucode response to mac80211 tx status control values
250 */
251 void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
252 struct ieee80211_tx_control *control)
253 {
254 int rate_index;
255
256 control->antenna_sel_tx =
257 ((rate_n_flags & RATE_MCS_ANT_AB_MSK) >> RATE_MCS_ANT_A_POS);
258 if (rate_n_flags & RATE_MCS_HT_MSK)
259 control->flags |= IEEE80211_TXCTL_OFDM_HT;
260 if (rate_n_flags & RATE_MCS_GF_MSK)
261 control->flags |= IEEE80211_TXCTL_GREEN_FIELD;
262 if (rate_n_flags & RATE_MCS_FAT_MSK)
263 control->flags |= IEEE80211_TXCTL_40_MHZ_WIDTH;
264 if (rate_n_flags & RATE_MCS_DUP_MSK)
265 control->flags |= IEEE80211_TXCTL_DUP_DATA;
266 if (rate_n_flags & RATE_MCS_SGI_MSK)
267 control->flags |= IEEE80211_TXCTL_SHORT_GI;
268 /* since iwl4965_hwrate_to_plcp_idx is band indifferent, we always use
269 * IEEE80211_BAND_2GHZ band as it contains all the rates */
270 rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
271 if (rate_index == -1)
272 control->tx_rate = NULL;
273 else
274 control->tx_rate =
275 &priv->bands[IEEE80211_BAND_2GHZ].bitrates[rate_index];
276 }
277
278 /*
279 * Determine how many receiver/antenna chains to use.
280 * More provides better reception via diversity. Fewer saves power.
281 * MIMO (dual stream) requires at least 2, but works better with 3.
282 * This does not determine *which* chains to use, just how many.
283 */
284 static int iwl4965_get_rx_chain_counter(struct iwl_priv *priv,
285 u8 *idle_state, u8 *rx_state)
286 {
287 u8 is_single = is_single_stream(priv);
288 u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
289
290 /* # of Rx chains to use when expecting MIMO. */
291 if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
292 *rx_state = 2;
293 else
294 *rx_state = 3;
295
296 /* # Rx chains when idling and maybe trying to save power */
297 switch (priv->ps_mode) {
298 case IWL_MIMO_PS_STATIC:
299 case IWL_MIMO_PS_DYNAMIC:
300 *idle_state = (is_cam) ? 2 : 1;
301 break;
302 case IWL_MIMO_PS_NONE:
303 *idle_state = (is_cam) ? *rx_state : 1;
304 break;
305 default:
306 *idle_state = 1;
307 break;
308 }
309
310 return 0;
311 }
312
313 int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
314 {
315 int rc;
316 unsigned long flags;
317
318 spin_lock_irqsave(&priv->lock, flags);
319 rc = iwl_grab_nic_access(priv);
320 if (rc) {
321 spin_unlock_irqrestore(&priv->lock, flags);
322 return rc;
323 }
324
325 /* stop Rx DMA */
326 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
327 rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
328 (1 << 24), 1000);
329 if (rc < 0)
330 IWL_ERROR("Can't stop Rx DMA.\n");
331
332 iwl_release_nic_access(priv);
333 spin_unlock_irqrestore(&priv->lock, flags);
334
335 return 0;
336 }
337
338 u8 iwl4965_hw_find_station(struct iwl_priv *priv, const u8 *addr)
339 {
340 int i;
341 int start = 0;
342 int ret = IWL_INVALID_STATION;
343 unsigned long flags;
344 DECLARE_MAC_BUF(mac);
345
346 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) ||
347 (priv->iw_mode == IEEE80211_IF_TYPE_AP))
348 start = IWL_STA_ID;
349
350 if (is_broadcast_ether_addr(addr))
351 return priv->hw_setting.bcast_sta_id;
352
353 spin_lock_irqsave(&priv->sta_lock, flags);
354 for (i = start; i < priv->hw_setting.max_stations; i++)
355 if ((priv->stations[i].used) &&
356 (!compare_ether_addr
357 (priv->stations[i].sta.sta.addr, addr))) {
358 ret = i;
359 goto out;
360 }
361
362 IWL_DEBUG_ASSOC_LIMIT("can not find STA %s total %d\n",
363 print_mac(mac, addr), priv->num_stations);
364
365 out:
366 spin_unlock_irqrestore(&priv->sta_lock, flags);
367 return ret;
368 }
369
370 static int iwl4965_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
371 {
372 int ret;
373 unsigned long flags;
374
375 spin_lock_irqsave(&priv->lock, flags);
376 ret = iwl_grab_nic_access(priv);
377 if (ret) {
378 spin_unlock_irqrestore(&priv->lock, flags);
379 return ret;
380 }
381
382 if (!pwr_max) {
383 u32 val;
384
385 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
386 &val);
387
388 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
389 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
390 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
391 ~APMG_PS_CTRL_MSK_PWR_SRC);
392 } else
393 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
394 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
395 ~APMG_PS_CTRL_MSK_PWR_SRC);
396
397 iwl_release_nic_access(priv);
398 spin_unlock_irqrestore(&priv->lock, flags);
399
400 return ret;
401 }
402
403 static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
404 {
405 int rc;
406 unsigned long flags;
407 unsigned int rb_size;
408
409 spin_lock_irqsave(&priv->lock, flags);
410 rc = iwl_grab_nic_access(priv);
411 if (rc) {
412 spin_unlock_irqrestore(&priv->lock, flags);
413 return rc;
414 }
415
416 if (priv->cfg->mod_params->amsdu_size_8K)
417 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
418 else
419 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
420
421 /* Stop Rx DMA */
422 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
423
424 /* Reset driver's Rx queue write index */
425 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
426
427 /* Tell device where to find RBD circular buffer in DRAM */
428 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
429 rxq->dma_addr >> 8);
430
431 /* Tell device where in DRAM to update its Rx status */
432 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
433 (priv->hw_setting.shared_phys +
434 offsetof(struct iwl4965_shared, val0)) >> 4);
435
436 /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
437 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
438 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
439 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
440 rb_size |
441 /*0x10 << 4 | */
442 (RX_QUEUE_SIZE_LOG <<
443 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
444
445 /*
446 * iwl_write32(priv,CSR_INT_COAL_REG,0);
447 */
448
449 iwl_release_nic_access(priv);
450 spin_unlock_irqrestore(&priv->lock, flags);
451
452 return 0;
453 }
454
455 /* Tell 4965 where to find the "keep warm" buffer */
456 static int iwl4965_kw_init(struct iwl_priv *priv)
457 {
458 unsigned long flags;
459 int rc;
460
461 spin_lock_irqsave(&priv->lock, flags);
462 rc = iwl_grab_nic_access(priv);
463 if (rc)
464 goto out;
465
466 iwl_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
467 priv->kw.dma_addr >> 4);
468 iwl_release_nic_access(priv);
469 out:
470 spin_unlock_irqrestore(&priv->lock, flags);
471 return rc;
472 }
473
474 static int iwl4965_kw_alloc(struct iwl_priv *priv)
475 {
476 struct pci_dev *dev = priv->pci_dev;
477 struct iwl4965_kw *kw = &priv->kw;
478
479 kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
480 kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
481 if (!kw->v_addr)
482 return -ENOMEM;
483
484 return 0;
485 }
486
487 /**
488 * iwl4965_kw_free - Free the "keep warm" buffer
489 */
490 static void iwl4965_kw_free(struct iwl_priv *priv)
491 {
492 struct pci_dev *dev = priv->pci_dev;
493 struct iwl4965_kw *kw = &priv->kw;
494
495 if (kw->v_addr) {
496 pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
497 memset(kw, 0, sizeof(*kw));
498 }
499 }
500
501 /**
502 * iwl4965_txq_ctx_reset - Reset TX queue context
503 * Destroys all DMA structures and initialise them again
504 *
505 * @param priv
506 * @return error code
507 */
508 static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
509 {
510 int rc = 0;
511 int txq_id, slots_num;
512 unsigned long flags;
513
514 iwl4965_kw_free(priv);
515
516 /* Free all tx/cmd queues and keep-warm buffer */
517 iwl4965_hw_txq_ctx_free(priv);
518
519 /* Alloc keep-warm buffer */
520 rc = iwl4965_kw_alloc(priv);
521 if (rc) {
522 IWL_ERROR("Keep Warm allocation failed");
523 goto error_kw;
524 }
525
526 spin_lock_irqsave(&priv->lock, flags);
527
528 rc = iwl_grab_nic_access(priv);
529 if (unlikely(rc)) {
530 IWL_ERROR("TX reset failed");
531 spin_unlock_irqrestore(&priv->lock, flags);
532 goto error_reset;
533 }
534
535 /* Turn off all Tx DMA channels */
536 iwl_write_prph(priv, KDR_SCD_TXFACT, 0);
537 iwl_release_nic_access(priv);
538 spin_unlock_irqrestore(&priv->lock, flags);
539
540 /* Tell 4965 where to find the keep-warm buffer */
541 rc = iwl4965_kw_init(priv);
542 if (rc) {
543 IWL_ERROR("kw_init failed\n");
544 goto error_reset;
545 }
546
547 /* Alloc and init all (default 16) Tx queues,
548 * including the command queue (#4) */
549 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
550 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
551 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
552 rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
553 txq_id);
554 if (rc) {
555 IWL_ERROR("Tx %d queue init failed\n", txq_id);
556 goto error;
557 }
558 }
559
560 return rc;
561
562 error:
563 iwl4965_hw_txq_ctx_free(priv);
564 error_reset:
565 iwl4965_kw_free(priv);
566 error_kw:
567 return rc;
568 }
569
570 int iwl4965_hw_nic_init(struct iwl_priv *priv)
571 {
572 int rc;
573 unsigned long flags;
574 struct iwl4965_rx_queue *rxq = &priv->rxq;
575 u8 rev_id;
576 u32 val;
577 u8 val_link;
578
579 iwl4965_power_init_handle(priv);
580
581 /* nic_init */
582 spin_lock_irqsave(&priv->lock, flags);
583
584 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
585 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
586
587 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
588 rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
589 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
590 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
591 if (rc < 0) {
592 spin_unlock_irqrestore(&priv->lock, flags);
593 IWL_DEBUG_INFO("Failed to init the card\n");
594 return rc;
595 }
596
597 rc = iwl_grab_nic_access(priv);
598 if (rc) {
599 spin_unlock_irqrestore(&priv->lock, flags);
600 return rc;
601 }
602
603 iwl_read_prph(priv, APMG_CLK_CTRL_REG);
604
605 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
606 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
607 iwl_read_prph(priv, APMG_CLK_CTRL_REG);
608
609 udelay(20);
610
611 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
612 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
613
614 iwl_release_nic_access(priv);
615 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
616 spin_unlock_irqrestore(&priv->lock, flags);
617
618 /* Determine HW type */
619 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
620 if (rc)
621 return rc;
622
623 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
624
625 iwl4965_nic_set_pwr_src(priv, 1);
626 spin_lock_irqsave(&priv->lock, flags);
627
628 if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
629 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
630 /* Enable No Snoop field */
631 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
632 val & ~(1 << 11));
633 }
634
635 spin_unlock_irqrestore(&priv->lock, flags);
636
637 if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
638 IWL_ERROR("Older EEPROM detected! Aborting.\n");
639 return -EINVAL;
640 }
641
642 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
643
644 /* disable L1 entry -- workaround for pre-B1 */
645 pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
646
647 spin_lock_irqsave(&priv->lock, flags);
648
649 /* set CSR_HW_CONFIG_REG for uCode use */
650
651 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
652 CSR49_HW_IF_CONFIG_REG_BIT_4965_R |
653 CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI |
654 CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI);
655
656 rc = iwl_grab_nic_access(priv);
657 if (rc < 0) {
658 spin_unlock_irqrestore(&priv->lock, flags);
659 IWL_DEBUG_INFO("Failed to init the card\n");
660 return rc;
661 }
662
663 iwl_read_prph(priv, APMG_PS_CTRL_REG);
664 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
665 udelay(5);
666 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
667
668 iwl_release_nic_access(priv);
669 spin_unlock_irqrestore(&priv->lock, flags);
670
671 iwl4965_hw_card_show_info(priv);
672
673 /* end nic_init */
674
675 /* Allocate the RX queue, or reset if it is already allocated */
676 if (!rxq->bd) {
677 rc = iwl4965_rx_queue_alloc(priv);
678 if (rc) {
679 IWL_ERROR("Unable to initialize Rx queue\n");
680 return -ENOMEM;
681 }
682 } else
683 iwl4965_rx_queue_reset(priv, rxq);
684
685 iwl4965_rx_replenish(priv);
686
687 iwl4965_rx_init(priv, rxq);
688
689 spin_lock_irqsave(&priv->lock, flags);
690
691 rxq->need_update = 1;
692 iwl4965_rx_queue_update_write_ptr(priv, rxq);
693
694 spin_unlock_irqrestore(&priv->lock, flags);
695
696 /* Allocate and init all Tx and Command queues */
697 rc = iwl4965_txq_ctx_reset(priv);
698 if (rc)
699 return rc;
700
701 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
702 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
703
704 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
705 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
706
707 set_bit(STATUS_INIT, &priv->status);
708
709 return 0;
710 }
711
712 int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
713 {
714 int rc = 0;
715 u32 reg_val;
716 unsigned long flags;
717
718 spin_lock_irqsave(&priv->lock, flags);
719
720 /* set stop master bit */
721 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
722
723 reg_val = iwl_read32(priv, CSR_GP_CNTRL);
724
725 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
726 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
727 IWL_DEBUG_INFO("Card in power save, master is already "
728 "stopped\n");
729 else {
730 rc = iwl_poll_bit(priv, CSR_RESET,
731 CSR_RESET_REG_FLAG_MASTER_DISABLED,
732 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
733 if (rc < 0) {
734 spin_unlock_irqrestore(&priv->lock, flags);
735 return rc;
736 }
737 }
738
739 spin_unlock_irqrestore(&priv->lock, flags);
740 IWL_DEBUG_INFO("stop master\n");
741
742 return rc;
743 }
744
745 /**
746 * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
747 */
748 void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
749 {
750
751 int txq_id;
752 unsigned long flags;
753
754 /* Stop each Tx DMA channel, and wait for it to be idle */
755 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
756 spin_lock_irqsave(&priv->lock, flags);
757 if (iwl_grab_nic_access(priv)) {
758 spin_unlock_irqrestore(&priv->lock, flags);
759 continue;
760 }
761
762 iwl_write_direct32(priv,
763 IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
764 iwl_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
765 IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
766 (txq_id), 200);
767 iwl_release_nic_access(priv);
768 spin_unlock_irqrestore(&priv->lock, flags);
769 }
770
771 /* Deallocate memory for all Tx queues */
772 iwl4965_hw_txq_ctx_free(priv);
773 }
774
775 int iwl4965_hw_nic_reset(struct iwl_priv *priv)
776 {
777 int rc = 0;
778 unsigned long flags;
779
780 iwl4965_hw_nic_stop_master(priv);
781
782 spin_lock_irqsave(&priv->lock, flags);
783
784 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
785
786 udelay(10);
787
788 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
789 rc = iwl_poll_bit(priv, CSR_RESET,
790 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
791 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
792
793 udelay(10);
794
795 rc = iwl_grab_nic_access(priv);
796 if (!rc) {
797 iwl_write_prph(priv, APMG_CLK_EN_REG,
798 APMG_CLK_VAL_DMA_CLK_RQT |
799 APMG_CLK_VAL_BSM_CLK_RQT);
800
801 udelay(10);
802
803 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
804 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
805
806 iwl_release_nic_access(priv);
807 }
808
809 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
810 wake_up_interruptible(&priv->wait_command_queue);
811
812 spin_unlock_irqrestore(&priv->lock, flags);
813
814 return rc;
815
816 }
817
818 #define REG_RECALIB_PERIOD (60)
819
820 /**
821 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
822 *
823 * This callback is provided in order to queue the statistics_work
824 * in work_queue context (v. softirq)
825 *
826 * This timer function is continually reset to execute within
827 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
828 * was received. We need to ensure we receive the statistics in order
829 * to update the temperature used for calibrating the TXPOWER. However,
830 * we can't send the statistics command from softirq context (which
831 * is the context which timers run at) so we have to queue off the
832 * statistics_work to actually send the command to the hardware.
833 */
834 static void iwl4965_bg_statistics_periodic(unsigned long data)
835 {
836 struct iwl_priv *priv = (struct iwl_priv *)data;
837
838 queue_work(priv->workqueue, &priv->statistics_work);
839 }
840
841 /**
842 * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
843 *
844 * This is queued by iwl4965_bg_statistics_periodic.
845 */
846 static void iwl4965_bg_statistics_work(struct work_struct *work)
847 {
848 struct iwl_priv *priv = container_of(work, struct iwl_priv,
849 statistics_work);
850
851 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
852 return;
853
854 mutex_lock(&priv->mutex);
855 iwl4965_send_statistics_request(priv);
856 mutex_unlock(&priv->mutex);
857 }
858
859 #define CT_LIMIT_CONST 259
860 #define TM_CT_KILL_THRESHOLD 110
861
862 void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
863 {
864 struct iwl4965_ct_kill_config cmd;
865 u32 R1, R2, R3;
866 u32 temp_th;
867 u32 crit_temperature;
868 unsigned long flags;
869 int ret = 0;
870
871 spin_lock_irqsave(&priv->lock, flags);
872 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
873 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
874 spin_unlock_irqrestore(&priv->lock, flags);
875
876 if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
877 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
878 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
879 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
880 } else {
881 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
882 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
883 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
884 }
885
886 temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
887
888 crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
889 cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
890 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
891 sizeof(cmd), &cmd);
892 if (ret)
893 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
894 else
895 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
896 }
897
898 #ifdef CONFIG_IWL4965_SENSITIVITY
899
900 /* "false alarms" are signals that our DSP tries to lock onto,
901 * but then determines that they are either noise, or transmissions
902 * from a distant wireless network (also "noise", really) that get
903 * "stepped on" by stronger transmissions within our own network.
904 * This algorithm attempts to set a sensitivity level that is high
905 * enough to receive all of our own network traffic, but not so
906 * high that our DSP gets too busy trying to lock onto non-network
907 * activity/noise. */
908 static int iwl4965_sens_energy_cck(struct iwl_priv *priv,
909 u32 norm_fa,
910 u32 rx_enable_time,
911 struct statistics_general_data *rx_info)
912 {
913 u32 max_nrg_cck = 0;
914 int i = 0;
915 u8 max_silence_rssi = 0;
916 u32 silence_ref = 0;
917 u8 silence_rssi_a = 0;
918 u8 silence_rssi_b = 0;
919 u8 silence_rssi_c = 0;
920 u32 val;
921
922 /* "false_alarms" values below are cross-multiplications to assess the
923 * numbers of false alarms within the measured period of actual Rx
924 * (Rx is off when we're txing), vs the min/max expected false alarms
925 * (some should be expected if rx is sensitive enough) in a
926 * hypothetical listening period of 200 time units (TU), 204.8 msec:
927 *
928 * MIN_FA/fixed-time < false_alarms/actual-rx-time < MAX_FA/beacon-time
929 *
930 * */
931 u32 false_alarms = norm_fa * 200 * 1024;
932 u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
933 u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
934 struct iwl4965_sensitivity_data *data = NULL;
935
936 data = &(priv->sensitivity_data);
937
938 data->nrg_auto_corr_silence_diff = 0;
939
940 /* Find max silence rssi among all 3 receivers.
941 * This is background noise, which may include transmissions from other
942 * networks, measured during silence before our network's beacon */
943 silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a &
944 ALL_BAND_FILTER) >> 8);
945 silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b &
946 ALL_BAND_FILTER) >> 8);
947 silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c &
948 ALL_BAND_FILTER) >> 8);
949
950 val = max(silence_rssi_b, silence_rssi_c);
951 max_silence_rssi = max(silence_rssi_a, (u8) val);
952
953 /* Store silence rssi in 20-beacon history table */
954 data->nrg_silence_rssi[data->nrg_silence_idx] = max_silence_rssi;
955 data->nrg_silence_idx++;
956 if (data->nrg_silence_idx >= NRG_NUM_PREV_STAT_L)
957 data->nrg_silence_idx = 0;
958
959 /* Find max silence rssi across 20 beacon history */
960 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) {
961 val = data->nrg_silence_rssi[i];
962 silence_ref = max(silence_ref, val);
963 }
964 IWL_DEBUG_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n",
965 silence_rssi_a, silence_rssi_b, silence_rssi_c,
966 silence_ref);
967
968 /* Find max rx energy (min value!) among all 3 receivers,
969 * measured during beacon frame.
970 * Save it in 10-beacon history table. */
971 i = data->nrg_energy_idx;
972 val = min(rx_info->beacon_energy_b, rx_info->beacon_energy_c);
973 data->nrg_value[i] = min(rx_info->beacon_energy_a, val);
974
975 data->nrg_energy_idx++;
976 if (data->nrg_energy_idx >= 10)
977 data->nrg_energy_idx = 0;
978
979 /* Find min rx energy (max value) across 10 beacon history.
980 * This is the minimum signal level that we want to receive well.
981 * Add backoff (margin so we don't miss slightly lower energy frames).
982 * This establishes an upper bound (min value) for energy threshold. */
983 max_nrg_cck = data->nrg_value[0];
984 for (i = 1; i < 10; i++)
985 max_nrg_cck = (u32) max(max_nrg_cck, (data->nrg_value[i]));
986 max_nrg_cck += 6;
987
988 IWL_DEBUG_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n",
989 rx_info->beacon_energy_a, rx_info->beacon_energy_b,
990 rx_info->beacon_energy_c, max_nrg_cck - 6);
991
992 /* Count number of consecutive beacons with fewer-than-desired
993 * false alarms. */
994 if (false_alarms < min_false_alarms)
995 data->num_in_cck_no_fa++;
996 else
997 data->num_in_cck_no_fa = 0;
998 IWL_DEBUG_CALIB("consecutive bcns with few false alarms = %u\n",
999 data->num_in_cck_no_fa);
1000
1001 /* If we got too many false alarms this time, reduce sensitivity */
1002 if (false_alarms > max_false_alarms) {
1003 IWL_DEBUG_CALIB("norm FA %u > max FA %u\n",
1004 false_alarms, max_false_alarms);
1005 IWL_DEBUG_CALIB("... reducing sensitivity\n");
1006 data->nrg_curr_state = IWL_FA_TOO_MANY;
1007
1008 if (data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) {
1009 /* Store for "fewer than desired" on later beacon */
1010 data->nrg_silence_ref = silence_ref;
1011
1012 /* increase energy threshold (reduce nrg value)
1013 * to decrease sensitivity */
1014 if (data->nrg_th_cck > (NRG_MAX_CCK + NRG_STEP_CCK))
1015 data->nrg_th_cck = data->nrg_th_cck
1016 - NRG_STEP_CCK;
1017 }
1018
1019 /* increase auto_corr values to decrease sensitivity */
1020 if (data->auto_corr_cck < AUTO_CORR_MAX_TH_CCK)
1021 data->auto_corr_cck = AUTO_CORR_MAX_TH_CCK + 1;
1022 else {
1023 val = data->auto_corr_cck + AUTO_CORR_STEP_CCK;
1024 data->auto_corr_cck = min((u32)AUTO_CORR_MAX_CCK, val);
1025 }
1026 val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK;
1027 data->auto_corr_cck_mrc = min((u32)AUTO_CORR_MAX_CCK_MRC, val);
1028
1029 /* Else if we got fewer than desired, increase sensitivity */
1030 } else if (false_alarms < min_false_alarms) {
1031 data->nrg_curr_state = IWL_FA_TOO_FEW;
1032
1033 /* Compare silence level with silence level for most recent
1034 * healthy number or too many false alarms */
1035 data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref -
1036 (s32)silence_ref;
1037
1038 IWL_DEBUG_CALIB("norm FA %u < min FA %u, silence diff %d\n",
1039 false_alarms, min_false_alarms,
1040 data->nrg_auto_corr_silence_diff);
1041
1042 /* Increase value to increase sensitivity, but only if:
1043 * 1a) previous beacon did *not* have *too many* false alarms
1044 * 1b) AND there's a significant difference in Rx levels
1045 * from a previous beacon with too many, or healthy # FAs
1046 * OR 2) We've seen a lot of beacons (100) with too few
1047 * false alarms */
1048 if ((data->nrg_prev_state != IWL_FA_TOO_MANY) &&
1049 ((data->nrg_auto_corr_silence_diff > NRG_DIFF) ||
1050 (data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA))) {
1051
1052 IWL_DEBUG_CALIB("... increasing sensitivity\n");
1053 /* Increase nrg value to increase sensitivity */
1054 val = data->nrg_th_cck + NRG_STEP_CCK;
1055 data->nrg_th_cck = min((u32)NRG_MIN_CCK, val);
1056
1057 /* Decrease auto_corr values to increase sensitivity */
1058 val = data->auto_corr_cck - AUTO_CORR_STEP_CCK;
1059 data->auto_corr_cck = max((u32)AUTO_CORR_MIN_CCK, val);
1060
1061 val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK;
1062 data->auto_corr_cck_mrc =
1063 max((u32)AUTO_CORR_MIN_CCK_MRC, val);
1064
1065 } else
1066 IWL_DEBUG_CALIB("... but not changing sensitivity\n");
1067
1068 /* Else we got a healthy number of false alarms, keep status quo */
1069 } else {
1070 IWL_DEBUG_CALIB(" FA in safe zone\n");
1071 data->nrg_curr_state = IWL_FA_GOOD_RANGE;
1072
1073 /* Store for use in "fewer than desired" with later beacon */
1074 data->nrg_silence_ref = silence_ref;
1075
1076 /* If previous beacon had too many false alarms,
1077 * give it some extra margin by reducing sensitivity again
1078 * (but don't go below measured energy of desired Rx) */
1079 if (IWL_FA_TOO_MANY == data->nrg_prev_state) {
1080 IWL_DEBUG_CALIB("... increasing margin\n");
1081 data->nrg_th_cck -= NRG_MARGIN;
1082 }
1083 }
1084
1085 /* Make sure the energy threshold does not go above the measured
1086 * energy of the desired Rx signals (reduced by backoff margin),
1087 * or else we might start missing Rx frames.
1088 * Lower value is higher energy, so we use max()!
1089 */
1090 data->nrg_th_cck = max(max_nrg_cck, data->nrg_th_cck);
1091 IWL_DEBUG_CALIB("new nrg_th_cck %u\n", data->nrg_th_cck);
1092
1093 data->nrg_prev_state = data->nrg_curr_state;
1094
1095 return 0;
1096 }
1097
1098
1099 static int iwl4965_sens_auto_corr_ofdm(struct iwl_priv *priv,
1100 u32 norm_fa,
1101 u32 rx_enable_time)
1102 {
1103 u32 val;
1104 u32 false_alarms = norm_fa * 200 * 1024;
1105 u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
1106 u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
1107 struct iwl4965_sensitivity_data *data = NULL;
1108
1109 data = &(priv->sensitivity_data);
1110
1111 /* If we got too many false alarms this time, reduce sensitivity */
1112 if (false_alarms > max_false_alarms) {
1113
1114 IWL_DEBUG_CALIB("norm FA %u > max FA %u)\n",
1115 false_alarms, max_false_alarms);
1116
1117 val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM;
1118 data->auto_corr_ofdm =
1119 min((u32)AUTO_CORR_MAX_OFDM, val);
1120
1121 val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM;
1122 data->auto_corr_ofdm_mrc =
1123 min((u32)AUTO_CORR_MAX_OFDM_MRC, val);
1124
1125 val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM;
1126 data->auto_corr_ofdm_x1 =
1127 min((u32)AUTO_CORR_MAX_OFDM_X1, val);
1128
1129 val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM;
1130 data->auto_corr_ofdm_mrc_x1 =
1131 min((u32)AUTO_CORR_MAX_OFDM_MRC_X1, val);
1132 }
1133
1134 /* Else if we got fewer than desired, increase sensitivity */
1135 else if (false_alarms < min_false_alarms) {
1136
1137 IWL_DEBUG_CALIB("norm FA %u < min FA %u\n",
1138 false_alarms, min_false_alarms);
1139
1140 val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM;
1141 data->auto_corr_ofdm =
1142 max((u32)AUTO_CORR_MIN_OFDM, val);
1143
1144 val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM;
1145 data->auto_corr_ofdm_mrc =
1146 max((u32)AUTO_CORR_MIN_OFDM_MRC, val);
1147
1148 val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM;
1149 data->auto_corr_ofdm_x1 =
1150 max((u32)AUTO_CORR_MIN_OFDM_X1, val);
1151
1152 val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM;
1153 data->auto_corr_ofdm_mrc_x1 =
1154 max((u32)AUTO_CORR_MIN_OFDM_MRC_X1, val);
1155 }
1156
1157 else
1158 IWL_DEBUG_CALIB("min FA %u < norm FA %u < max FA %u OK\n",
1159 min_false_alarms, false_alarms, max_false_alarms);
1160
1161 return 0;
1162 }
1163
1164 static int iwl4965_sensitivity_callback(struct iwl_priv *priv,
1165 struct iwl_cmd *cmd, struct sk_buff *skb)
1166 {
1167 /* We didn't cache the SKB; let the caller free it */
1168 return 1;
1169 }
1170
1171 /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
1172 static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags)
1173 {
1174 struct iwl4965_sensitivity_cmd cmd ;
1175 struct iwl4965_sensitivity_data *data = NULL;
1176 struct iwl_host_cmd cmd_out = {
1177 .id = SENSITIVITY_CMD,
1178 .len = sizeof(struct iwl4965_sensitivity_cmd),
1179 .meta.flags = flags,
1180 .data = &cmd,
1181 };
1182 int ret;
1183
1184 data = &(priv->sensitivity_data);
1185
1186 memset(&cmd, 0, sizeof(cmd));
1187
1188 cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX] =
1189 cpu_to_le16((u16)data->auto_corr_ofdm);
1190 cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX] =
1191 cpu_to_le16((u16)data->auto_corr_ofdm_mrc);
1192 cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX] =
1193 cpu_to_le16((u16)data->auto_corr_ofdm_x1);
1194 cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX] =
1195 cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1);
1196
1197 cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX] =
1198 cpu_to_le16((u16)data->auto_corr_cck);
1199 cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX] =
1200 cpu_to_le16((u16)data->auto_corr_cck_mrc);
1201
1202 cmd.table[HD_MIN_ENERGY_CCK_DET_INDEX] =
1203 cpu_to_le16((u16)data->nrg_th_cck);
1204 cmd.table[HD_MIN_ENERGY_OFDM_DET_INDEX] =
1205 cpu_to_le16((u16)data->nrg_th_ofdm);
1206
1207 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
1208 __constant_cpu_to_le16(190);
1209 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
1210 __constant_cpu_to_le16(390);
1211 cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
1212 __constant_cpu_to_le16(62);
1213
1214 IWL_DEBUG_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
1215 data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
1216 data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1,
1217 data->nrg_th_ofdm);
1218
1219 IWL_DEBUG_CALIB("cck: ac %u mrc %u thresh %u\n",
1220 data->auto_corr_cck, data->auto_corr_cck_mrc,
1221 data->nrg_th_cck);
1222
1223 /* Update uCode's "work" table, and copy it to DSP */
1224 cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
1225
1226 if (flags & CMD_ASYNC)
1227 cmd_out.meta.u.callback = iwl4965_sensitivity_callback;
1228
1229 /* Don't send command to uCode if nothing has changed */
1230 if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
1231 sizeof(u16)*HD_TABLE_SIZE)) {
1232 IWL_DEBUG_CALIB("No change in SENSITIVITY_CMD\n");
1233 return 0;
1234 }
1235
1236 /* Copy table for comparison next time */
1237 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
1238 sizeof(u16)*HD_TABLE_SIZE);
1239
1240 ret = iwl_send_cmd(priv, &cmd_out);
1241 if (ret)
1242 IWL_ERROR("SENSITIVITY_CMD failed\n");
1243
1244 return ret;
1245 }
1246
1247 void iwl4965_init_sensitivity(struct iwl_priv *priv, u8 flags, u8 force)
1248 {
1249 struct iwl4965_sensitivity_data *data = NULL;
1250 int i;
1251 int ret = 0;
1252
1253 IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
1254
1255 if (force)
1256 memset(&(priv->sensitivity_tbl[0]), 0,
1257 sizeof(u16)*HD_TABLE_SIZE);
1258
1259 /* Clear driver's sensitivity algo data */
1260 data = &(priv->sensitivity_data);
1261 memset(data, 0, sizeof(struct iwl4965_sensitivity_data));
1262
1263 data->num_in_cck_no_fa = 0;
1264 data->nrg_curr_state = IWL_FA_TOO_MANY;
1265 data->nrg_prev_state = IWL_FA_TOO_MANY;
1266 data->nrg_silence_ref = 0;
1267 data->nrg_silence_idx = 0;
1268 data->nrg_energy_idx = 0;
1269
1270 for (i = 0; i < 10; i++)
1271 data->nrg_value[i] = 0;
1272
1273 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
1274 data->nrg_silence_rssi[i] = 0;
1275
1276 data->auto_corr_ofdm = 90;
1277 data->auto_corr_ofdm_mrc = 170;
1278 data->auto_corr_ofdm_x1 = 105;
1279 data->auto_corr_ofdm_mrc_x1 = 220;
1280 data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF;
1281 data->auto_corr_cck_mrc = 200;
1282 data->nrg_th_cck = 100;
1283 data->nrg_th_ofdm = 100;
1284
1285 data->last_bad_plcp_cnt_ofdm = 0;
1286 data->last_fa_cnt_ofdm = 0;
1287 data->last_bad_plcp_cnt_cck = 0;
1288 data->last_fa_cnt_cck = 0;
1289
1290 /* Clear prior Sensitivity command data to force send to uCode */
1291 if (force)
1292 memset(&(priv->sensitivity_tbl[0]), 0,
1293 sizeof(u16)*HD_TABLE_SIZE);
1294
1295 ret |= iwl4965_sensitivity_write(priv, flags);
1296 IWL_DEBUG_CALIB("<<return 0x%X\n", ret);
1297
1298 return;
1299 }
1300
1301
1302 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
1303 * Called after every association, but this runs only once!
1304 * ... once chain noise is calibrated the first time, it's good forever. */
1305 void iwl4965_chain_noise_reset(struct iwl_priv *priv)
1306 {
1307 struct iwl4965_chain_noise_data *data = NULL;
1308
1309 data = &(priv->chain_noise_data);
1310 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) {
1311 struct iwl4965_calibration_cmd cmd;
1312
1313 memset(&cmd, 0, sizeof(cmd));
1314 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1315 cmd.diff_gain_a = 0;
1316 cmd.diff_gain_b = 0;
1317 cmd.diff_gain_c = 0;
1318 iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1319 sizeof(cmd), &cmd);
1320 msleep(4);
1321 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
1322 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
1323 }
1324 return;
1325 }
1326
1327 /*
1328 * Accumulate 20 beacons of signal and noise statistics for each of
1329 * 3 receivers/antennas/rx-chains, then figure out:
1330 * 1) Which antennas are connected.
1331 * 2) Differential rx gain settings to balance the 3 receivers.
1332 */
1333 static void iwl4965_noise_calibration(struct iwl_priv *priv,
1334 struct iwl4965_notif_statistics *stat_resp)
1335 {
1336 struct iwl4965_chain_noise_data *data = NULL;
1337 int ret = 0;
1338
1339 u32 chain_noise_a;
1340 u32 chain_noise_b;
1341 u32 chain_noise_c;
1342 u32 chain_sig_a;
1343 u32 chain_sig_b;
1344 u32 chain_sig_c;
1345 u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1346 u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1347 u32 max_average_sig;
1348 u16 max_average_sig_antenna_i;
1349 u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE;
1350 u16 min_average_noise_antenna_i = INITIALIZATION_VALUE;
1351 u16 i = 0;
1352 u16 chan_num = INITIALIZATION_VALUE;
1353 u32 band = INITIALIZATION_VALUE;
1354 u32 active_chains = 0;
1355 unsigned long flags;
1356 struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
1357
1358 data = &(priv->chain_noise_data);
1359
1360 /* Accumulate just the first 20 beacons after the first association,
1361 * then we're done forever. */
1362 if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
1363 if (data->state == IWL_CHAIN_NOISE_ALIVE)
1364 IWL_DEBUG_CALIB("Wait for noise calib reset\n");
1365 return;
1366 }
1367
1368 spin_lock_irqsave(&priv->lock, flags);
1369 if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1370 IWL_DEBUG_CALIB(" << Interference data unavailable\n");
1371 spin_unlock_irqrestore(&priv->lock, flags);
1372 return;
1373 }
1374
1375 band = (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) ? 0 : 1;
1376 chan_num = le16_to_cpu(priv->staging_rxon.channel);
1377
1378 /* Make sure we accumulate data for just the associated channel
1379 * (even if scanning). */
1380 if ((chan_num != (le32_to_cpu(stat_resp->flag) >> 16)) ||
1381 ((STATISTICS_REPLY_FLG_BAND_24G_MSK ==
1382 (stat_resp->flag & STATISTICS_REPLY_FLG_BAND_24G_MSK)) && band)) {
1383 IWL_DEBUG_CALIB("Stats not from chan=%d, band=%d\n",
1384 chan_num, band);
1385 spin_unlock_irqrestore(&priv->lock, flags);
1386 return;
1387 }
1388
1389 /* Accumulate beacon statistics values across 20 beacons */
1390 chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
1391 IN_BAND_FILTER;
1392 chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
1393 IN_BAND_FILTER;
1394 chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) &
1395 IN_BAND_FILTER;
1396
1397 chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER;
1398 chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER;
1399 chain_sig_c = le32_to_cpu(rx_info->beacon_rssi_c) & IN_BAND_FILTER;
1400
1401 spin_unlock_irqrestore(&priv->lock, flags);
1402
1403 data->beacon_count++;
1404
1405 data->chain_noise_a = (chain_noise_a + data->chain_noise_a);
1406 data->chain_noise_b = (chain_noise_b + data->chain_noise_b);
1407 data->chain_noise_c = (chain_noise_c + data->chain_noise_c);
1408
1409 data->chain_signal_a = (chain_sig_a + data->chain_signal_a);
1410 data->chain_signal_b = (chain_sig_b + data->chain_signal_b);
1411 data->chain_signal_c = (chain_sig_c + data->chain_signal_c);
1412
1413 IWL_DEBUG_CALIB("chan=%d, band=%d, beacon=%d\n", chan_num, band,
1414 data->beacon_count);
1415 IWL_DEBUG_CALIB("chain_sig: a %d b %d c %d\n",
1416 chain_sig_a, chain_sig_b, chain_sig_c);
1417 IWL_DEBUG_CALIB("chain_noise: a %d b %d c %d\n",
1418 chain_noise_a, chain_noise_b, chain_noise_c);
1419
1420 /* If this is the 20th beacon, determine:
1421 * 1) Disconnected antennas (using signal strengths)
1422 * 2) Differential gain (using silence noise) to balance receivers */
1423 if (data->beacon_count == CAL_NUM_OF_BEACONS) {
1424
1425 /* Analyze signal for disconnected antenna */
1426 average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS;
1427 average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS;
1428 average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS;
1429
1430 if (average_sig[0] >= average_sig[1]) {
1431 max_average_sig = average_sig[0];
1432 max_average_sig_antenna_i = 0;
1433 active_chains = (1 << max_average_sig_antenna_i);
1434 } else {
1435 max_average_sig = average_sig[1];
1436 max_average_sig_antenna_i = 1;
1437 active_chains = (1 << max_average_sig_antenna_i);
1438 }
1439
1440 if (average_sig[2] >= max_average_sig) {
1441 max_average_sig = average_sig[2];
1442 max_average_sig_antenna_i = 2;
1443 active_chains = (1 << max_average_sig_antenna_i);
1444 }
1445
1446 IWL_DEBUG_CALIB("average_sig: a %d b %d c %d\n",
1447 average_sig[0], average_sig[1], average_sig[2]);
1448 IWL_DEBUG_CALIB("max_average_sig = %d, antenna %d\n",
1449 max_average_sig, max_average_sig_antenna_i);
1450
1451 /* Compare signal strengths for all 3 receivers. */
1452 for (i = 0; i < NUM_RX_CHAINS; i++) {
1453 if (i != max_average_sig_antenna_i) {
1454 s32 rssi_delta = (max_average_sig -
1455 average_sig[i]);
1456
1457 /* If signal is very weak, compared with
1458 * strongest, mark it as disconnected. */
1459 if (rssi_delta > MAXIMUM_ALLOWED_PATHLOSS)
1460 data->disconn_array[i] = 1;
1461 else
1462 active_chains |= (1 << i);
1463 IWL_DEBUG_CALIB("i = %d rssiDelta = %d "
1464 "disconn_array[i] = %d\n",
1465 i, rssi_delta, data->disconn_array[i]);
1466 }
1467 }
1468
1469 /*If both chains A & B are disconnected -
1470 * connect B and leave A as is */
1471 if (data->disconn_array[CHAIN_A] &&
1472 data->disconn_array[CHAIN_B]) {
1473 data->disconn_array[CHAIN_B] = 0;
1474 active_chains |= (1 << CHAIN_B);
1475 IWL_DEBUG_CALIB("both A & B chains are disconnected! "
1476 "W/A - declare B as connected\n");
1477 }
1478
1479 IWL_DEBUG_CALIB("active_chains (bitwise) = 0x%x\n",
1480 active_chains);
1481
1482 /* Save for use within RXON, TX, SCAN commands, etc. */
1483 priv->valid_antenna = active_chains;
1484
1485 /* Analyze noise for rx balance */
1486 average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS);
1487 average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS);
1488 average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS);
1489
1490 for (i = 0; i < NUM_RX_CHAINS; i++) {
1491 if (!(data->disconn_array[i]) &&
1492 (average_noise[i] <= min_average_noise)) {
1493 /* This means that chain i is active and has
1494 * lower noise values so far: */
1495 min_average_noise = average_noise[i];
1496 min_average_noise_antenna_i = i;
1497 }
1498 }
1499
1500 data->delta_gain_code[min_average_noise_antenna_i] = 0;
1501
1502 IWL_DEBUG_CALIB("average_noise: a %d b %d c %d\n",
1503 average_noise[0], average_noise[1],
1504 average_noise[2]);
1505
1506 IWL_DEBUG_CALIB("min_average_noise = %d, antenna %d\n",
1507 min_average_noise, min_average_noise_antenna_i);
1508
1509 for (i = 0; i < NUM_RX_CHAINS; i++) {
1510 s32 delta_g = 0;
1511
1512 if (!(data->disconn_array[i]) &&
1513 (data->delta_gain_code[i] ==
1514 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
1515 delta_g = average_noise[i] - min_average_noise;
1516 data->delta_gain_code[i] = (u8)((delta_g *
1517 10) / 15);
1518 if (CHAIN_NOISE_MAX_DELTA_GAIN_CODE <
1519 data->delta_gain_code[i])
1520 data->delta_gain_code[i] =
1521 CHAIN_NOISE_MAX_DELTA_GAIN_CODE;
1522
1523 data->delta_gain_code[i] =
1524 (data->delta_gain_code[i] | (1 << 2));
1525 } else
1526 data->delta_gain_code[i] = 0;
1527 }
1528 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
1529 data->delta_gain_code[0],
1530 data->delta_gain_code[1],
1531 data->delta_gain_code[2]);
1532
1533 /* Differential gain gets sent to uCode only once */
1534 if (!data->radio_write) {
1535 struct iwl4965_calibration_cmd cmd;
1536 data->radio_write = 1;
1537
1538 memset(&cmd, 0, sizeof(cmd));
1539 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1540 cmd.diff_gain_a = data->delta_gain_code[0];
1541 cmd.diff_gain_b = data->delta_gain_code[1];
1542 cmd.diff_gain_c = data->delta_gain_code[2];
1543 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1544 sizeof(cmd), &cmd);
1545 if (ret)
1546 IWL_DEBUG_CALIB("fail sending cmd "
1547 "REPLY_PHY_CALIBRATION_CMD \n");
1548
1549 /* TODO we might want recalculate
1550 * rx_chain in rxon cmd */
1551
1552 /* Mark so we run this algo only once! */
1553 data->state = IWL_CHAIN_NOISE_CALIBRATED;
1554 }
1555 data->chain_noise_a = 0;
1556 data->chain_noise_b = 0;
1557 data->chain_noise_c = 0;
1558 data->chain_signal_a = 0;
1559 data->chain_signal_b = 0;
1560 data->chain_signal_c = 0;
1561 data->beacon_count = 0;
1562 }
1563 return;
1564 }
1565
1566 static void iwl4965_sensitivity_calibration(struct iwl_priv *priv,
1567 struct iwl4965_notif_statistics *resp)
1568 {
1569 u32 rx_enable_time;
1570 u32 fa_cck;
1571 u32 fa_ofdm;
1572 u32 bad_plcp_cck;
1573 u32 bad_plcp_ofdm;
1574 u32 norm_fa_ofdm;
1575 u32 norm_fa_cck;
1576 struct iwl4965_sensitivity_data *data = NULL;
1577 struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
1578 struct statistics_rx *statistics = &(resp->rx);
1579 unsigned long flags;
1580 struct statistics_general_data statis;
1581 int ret;
1582
1583 data = &(priv->sensitivity_data);
1584
1585 if (!iwl4965_is_associated(priv)) {
1586 IWL_DEBUG_CALIB("<< - not associated\n");
1587 return;
1588 }
1589
1590 spin_lock_irqsave(&priv->lock, flags);
1591 if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1592 IWL_DEBUG_CALIB("<< invalid data.\n");
1593 spin_unlock_irqrestore(&priv->lock, flags);
1594 return;
1595 }
1596
1597 /* Extract Statistics: */
1598 rx_enable_time = le32_to_cpu(rx_info->channel_load);
1599 fa_cck = le32_to_cpu(statistics->cck.false_alarm_cnt);
1600 fa_ofdm = le32_to_cpu(statistics->ofdm.false_alarm_cnt);
1601 bad_plcp_cck = le32_to_cpu(statistics->cck.plcp_err);
1602 bad_plcp_ofdm = le32_to_cpu(statistics->ofdm.plcp_err);
1603
1604 statis.beacon_silence_rssi_a =
1605 le32_to_cpu(statistics->general.beacon_silence_rssi_a);
1606 statis.beacon_silence_rssi_b =
1607 le32_to_cpu(statistics->general.beacon_silence_rssi_b);
1608 statis.beacon_silence_rssi_c =
1609 le32_to_cpu(statistics->general.beacon_silence_rssi_c);
1610 statis.beacon_energy_a =
1611 le32_to_cpu(statistics->general.beacon_energy_a);
1612 statis.beacon_energy_b =
1613 le32_to_cpu(statistics->general.beacon_energy_b);
1614 statis.beacon_energy_c =
1615 le32_to_cpu(statistics->general.beacon_energy_c);
1616
1617 spin_unlock_irqrestore(&priv->lock, flags);
1618
1619 IWL_DEBUG_CALIB("rx_enable_time = %u usecs\n", rx_enable_time);
1620
1621 if (!rx_enable_time) {
1622 IWL_DEBUG_CALIB("<< RX Enable Time == 0! \n");
1623 return;
1624 }
1625
1626 /* These statistics increase monotonically, and do not reset
1627 * at each beacon. Calculate difference from last value, or just
1628 * use the new statistics value if it has reset or wrapped around. */
1629 if (data->last_bad_plcp_cnt_cck > bad_plcp_cck)
1630 data->last_bad_plcp_cnt_cck = bad_plcp_cck;
1631 else {
1632 bad_plcp_cck -= data->last_bad_plcp_cnt_cck;
1633 data->last_bad_plcp_cnt_cck += bad_plcp_cck;
1634 }
1635
1636 if (data->last_bad_plcp_cnt_ofdm > bad_plcp_ofdm)
1637 data->last_bad_plcp_cnt_ofdm = bad_plcp_ofdm;
1638 else {
1639 bad_plcp_ofdm -= data->last_bad_plcp_cnt_ofdm;
1640 data->last_bad_plcp_cnt_ofdm += bad_plcp_ofdm;
1641 }
1642
1643 if (data->last_fa_cnt_ofdm > fa_ofdm)
1644 data->last_fa_cnt_ofdm = fa_ofdm;
1645 else {
1646 fa_ofdm -= data->last_fa_cnt_ofdm;
1647 data->last_fa_cnt_ofdm += fa_ofdm;
1648 }
1649
1650 if (data->last_fa_cnt_cck > fa_cck)
1651 data->last_fa_cnt_cck = fa_cck;
1652 else {
1653 fa_cck -= data->last_fa_cnt_cck;
1654 data->last_fa_cnt_cck += fa_cck;
1655 }
1656
1657 /* Total aborted signal locks */
1658 norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm;
1659 norm_fa_cck = fa_cck + bad_plcp_cck;
1660
1661 IWL_DEBUG_CALIB("cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck,
1662 bad_plcp_cck, fa_ofdm, bad_plcp_ofdm);
1663
1664 iwl4965_sens_auto_corr_ofdm(priv, norm_fa_ofdm, rx_enable_time);
1665 iwl4965_sens_energy_cck(priv, norm_fa_cck, rx_enable_time, &statis);
1666 ret = iwl4965_sensitivity_write(priv, CMD_ASYNC);
1667
1668 return;
1669 }
1670
1671 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
1672 {
1673 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1674 sensitivity_work);
1675
1676 mutex_lock(&priv->mutex);
1677
1678 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1679 test_bit(STATUS_SCANNING, &priv->status)) {
1680 mutex_unlock(&priv->mutex);
1681 return;
1682 }
1683
1684 if (priv->start_calib) {
1685 iwl4965_noise_calibration(priv, &priv->statistics);
1686
1687 if (priv->sensitivity_data.state ==
1688 IWL_SENS_CALIB_NEED_REINIT) {
1689 iwl4965_init_sensitivity(priv, CMD_ASYNC, 0);
1690 priv->sensitivity_data.state = IWL_SENS_CALIB_ALLOWED;
1691 } else
1692 iwl4965_sensitivity_calibration(priv,
1693 &priv->statistics);
1694 }
1695
1696 mutex_unlock(&priv->mutex);
1697 return;
1698 }
1699 #endif /*CONFIG_IWL4965_SENSITIVITY*/
1700
1701 static void iwl4965_bg_txpower_work(struct work_struct *work)
1702 {
1703 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1704 txpower_work);
1705
1706 /* If a scan happened to start before we got here
1707 * then just return; the statistics notification will
1708 * kick off another scheduled work to compensate for
1709 * any temperature delta we missed here. */
1710 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1711 test_bit(STATUS_SCANNING, &priv->status))
1712 return;
1713
1714 mutex_lock(&priv->mutex);
1715
1716 /* Regardless of if we are assocaited, we must reconfigure the
1717 * TX power since frames can be sent on non-radar channels while
1718 * not associated */
1719 iwl4965_hw_reg_send_txpower(priv);
1720
1721 /* Update last_temperature to keep is_calib_needed from running
1722 * when it isn't needed... */
1723 priv->last_temperature = priv->temperature;
1724
1725 mutex_unlock(&priv->mutex);
1726 }
1727
1728 /*
1729 * Acquire priv->lock before calling this function !
1730 */
1731 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
1732 {
1733 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
1734 (index & 0xff) | (txq_id << 8));
1735 iwl_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
1736 }
1737
1738 /**
1739 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
1740 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
1741 * @scd_retry: (1) Indicates queue will be used in aggregation mode
1742 *
1743 * NOTE: Acquire priv->lock before calling this function !
1744 */
1745 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
1746 struct iwl4965_tx_queue *txq,
1747 int tx_fifo_id, int scd_retry)
1748 {
1749 int txq_id = txq->q.id;
1750
1751 /* Find out whether to activate Tx queue */
1752 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
1753
1754 /* Set up and activate */
1755 iwl_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
1756 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
1757 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
1758 (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
1759 (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
1760 SCD_QUEUE_STTS_REG_MSK);
1761
1762 txq->sched_retry = scd_retry;
1763
1764 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
1765 active ? "Activate" : "Deactivate",
1766 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
1767 }
1768
1769 static const u16 default_queue_to_tx_fifo[] = {
1770 IWL_TX_FIFO_AC3,
1771 IWL_TX_FIFO_AC2,
1772 IWL_TX_FIFO_AC1,
1773 IWL_TX_FIFO_AC0,
1774 IWL_CMD_FIFO_NUM,
1775 IWL_TX_FIFO_HCCA_1,
1776 IWL_TX_FIFO_HCCA_2
1777 };
1778
1779 static inline void iwl4965_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1780 {
1781 set_bit(txq_id, &priv->txq_ctx_active_msk);
1782 }
1783
1784 static inline void iwl4965_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1785 {
1786 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1787 }
1788
1789 int iwl4965_alive_notify(struct iwl_priv *priv)
1790 {
1791 u32 a;
1792 int i = 0;
1793 unsigned long flags;
1794 int ret;
1795
1796 spin_lock_irqsave(&priv->lock, flags);
1797
1798 #ifdef CONFIG_IWL4965_SENSITIVITY
1799 memset(&(priv->sensitivity_data), 0,
1800 sizeof(struct iwl4965_sensitivity_data));
1801 memset(&(priv->chain_noise_data), 0,
1802 sizeof(struct iwl4965_chain_noise_data));
1803 for (i = 0; i < NUM_RX_CHAINS; i++)
1804 priv->chain_noise_data.delta_gain_code[i] =
1805 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
1806 #endif /* CONFIG_IWL4965_SENSITIVITY*/
1807 ret = iwl_grab_nic_access(priv);
1808 if (ret) {
1809 spin_unlock_irqrestore(&priv->lock, flags);
1810 return ret;
1811 }
1812
1813 /* Clear 4965's internal Tx Scheduler data base */
1814 priv->scd_base_addr = iwl_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
1815 a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
1816 for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1817 iwl_write_targ_mem(priv, a, 0);
1818 for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
1819 iwl_write_targ_mem(priv, a, 0);
1820 for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
1821 iwl_write_targ_mem(priv, a, 0);
1822
1823 /* Tel 4965 where to find Tx byte count tables */
1824 iwl_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
1825 (priv->hw_setting.shared_phys +
1826 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
1827
1828 /* Disable chain mode for all queues */
1829 iwl_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
1830
1831 /* Initialize each Tx queue (including the command queue) */
1832 for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
1833
1834 /* TFD circular buffer read/write indexes */
1835 iwl_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
1836 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1837
1838 /* Max Tx Window size for Scheduler-ACK mode */
1839 iwl_write_targ_mem(priv, priv->scd_base_addr +
1840 SCD_CONTEXT_QUEUE_OFFSET(i),
1841 (SCD_WIN_SIZE <<
1842 SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1843 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1844
1845 /* Frame limit */
1846 iwl_write_targ_mem(priv, priv->scd_base_addr +
1847 SCD_CONTEXT_QUEUE_OFFSET(i) +
1848 sizeof(u32),
1849 (SCD_FRAME_LIMIT <<
1850 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
1851 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1852
1853 }
1854 iwl_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
1855 (1 << priv->hw_setting.max_txq_num) - 1);
1856
1857 /* Activate all Tx DMA/FIFO channels */
1858 iwl_write_prph(priv, KDR_SCD_TXFACT,
1859 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
1860
1861 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
1862
1863 /* Map each Tx/cmd queue to its corresponding fifo */
1864 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1865 int ac = default_queue_to_tx_fifo[i];
1866 iwl4965_txq_ctx_activate(priv, i);
1867 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1868 }
1869
1870 iwl_release_nic_access(priv);
1871 spin_unlock_irqrestore(&priv->lock, flags);
1872
1873 return ret;
1874 }
1875
1876 /**
1877 * iwl4965_hw_set_hw_setting
1878 *
1879 * Called when initializing driver
1880 */
1881 int iwl4965_hw_set_hw_setting(struct iwl_priv *priv)
1882 {
1883 int ret = 0;
1884
1885 if ((priv->cfg->mod_params->num_of_queues > IWL_MAX_NUM_QUEUES) ||
1886 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
1887 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
1888 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
1889 ret = -EINVAL;
1890 goto out;
1891 }
1892
1893 /* Allocate area for Tx byte count tables and Rx queue status */
1894 priv->hw_setting.shared_virt =
1895 pci_alloc_consistent(priv->pci_dev,
1896 sizeof(struct iwl4965_shared),
1897 &priv->hw_setting.shared_phys);
1898
1899 if (!priv->hw_setting.shared_virt) {
1900 ret = -ENOMEM;
1901 goto out;
1902 }
1903
1904 memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
1905
1906 priv->hw_setting.max_txq_num = priv->cfg->mod_params->num_of_queues;
1907 priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
1908 priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
1909 priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
1910 if (priv->cfg->mod_params->amsdu_size_8K)
1911 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1912 else
1913 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1914 priv->hw_setting.max_pkt_size = priv->hw_setting.rx_buf_size - 256;
1915 priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
1916 priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
1917
1918 priv->hw_setting.tx_ant_num = 2;
1919
1920 out:
1921 return ret;
1922 }
1923
1924 /**
1925 * iwl4965_hw_txq_ctx_free - Free TXQ Context
1926 *
1927 * Destroy all TX DMA queues and structures
1928 */
1929 void iwl4965_hw_txq_ctx_free(struct iwl_priv *priv)
1930 {
1931 int txq_id;
1932
1933 /* Tx queues */
1934 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
1935 iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
1936
1937 /* Keep-warm buffer */
1938 iwl4965_kw_free(priv);
1939 }
1940
1941 /**
1942 * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
1943 *
1944 * Does NOT advance any TFD circular buffer read/write indexes
1945 * Does NOT free the TFD itself (which is within circular buffer)
1946 */
1947 int iwl4965_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
1948 {
1949 struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
1950 struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
1951 struct pci_dev *dev = priv->pci_dev;
1952 int i;
1953 int counter = 0;
1954 int index, is_odd;
1955
1956 /* Host command buffers stay mapped in memory, nothing to clean */
1957 if (txq->q.id == IWL_CMD_QUEUE_NUM)
1958 return 0;
1959
1960 /* Sanity check on number of chunks */
1961 counter = IWL_GET_BITS(*bd, num_tbs);
1962 if (counter > MAX_NUM_OF_TBS) {
1963 IWL_ERROR("Too many chunks: %i\n", counter);
1964 /* @todo issue fatal error, it is quite serious situation */
1965 return 0;
1966 }
1967
1968 /* Unmap chunks, if any.
1969 * TFD info for odd chunks is different format than for even chunks. */
1970 for (i = 0; i < counter; i++) {
1971 index = i / 2;
1972 is_odd = i & 0x1;
1973
1974 if (is_odd)
1975 pci_unmap_single(
1976 dev,
1977 IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
1978 (IWL_GET_BITS(bd->pa[index],
1979 tb2_addr_hi20) << 16),
1980 IWL_GET_BITS(bd->pa[index], tb2_len),
1981 PCI_DMA_TODEVICE);
1982
1983 else if (i > 0)
1984 pci_unmap_single(dev,
1985 le32_to_cpu(bd->pa[index].tb1_addr),
1986 IWL_GET_BITS(bd->pa[index], tb1_len),
1987 PCI_DMA_TODEVICE);
1988
1989 /* Free SKB, if any, for this chunk */
1990 if (txq->txb[txq->q.read_ptr].skb[i]) {
1991 struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
1992
1993 dev_kfree_skb(skb);
1994 txq->txb[txq->q.read_ptr].skb[i] = NULL;
1995 }
1996 }
1997 return 0;
1998 }
1999
2000 int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
2001 {
2002 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
2003 return -EINVAL;
2004 }
2005
2006 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
2007 {
2008 s32 sign = 1;
2009
2010 if (num < 0) {
2011 sign = -sign;
2012 num = -num;
2013 }
2014 if (denom < 0) {
2015 sign = -sign;
2016 denom = -denom;
2017 }
2018 *res = 1;
2019 *res = ((num * 2 + denom) / (denom * 2)) * sign;
2020
2021 return 1;
2022 }
2023
2024 /**
2025 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
2026 *
2027 * Determines power supply voltage compensation for txpower calculations.
2028 * Returns number of 1/2-dB steps to subtract from gain table index,
2029 * to compensate for difference between power supply voltage during
2030 * factory measurements, vs. current power supply voltage.
2031 *
2032 * Voltage indication is higher for lower voltage.
2033 * Lower voltage requires more gain (lower gain table index).
2034 */
2035 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
2036 s32 current_voltage)
2037 {
2038 s32 comp = 0;
2039
2040 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
2041 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
2042 return 0;
2043
2044 iwl4965_math_div_round(current_voltage - eeprom_voltage,
2045 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
2046
2047 if (current_voltage > eeprom_voltage)
2048 comp *= 2;
2049 if ((comp < -2) || (comp > 2))
2050 comp = 0;
2051
2052 return comp;
2053 }
2054
2055 static const struct iwl_channel_info *
2056 iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
2057 enum ieee80211_band band, u16 channel)
2058 {
2059 const struct iwl_channel_info *ch_info;
2060
2061 ch_info = iwl_get_channel_info(priv, band, channel);
2062
2063 if (!is_channel_valid(ch_info))
2064 return NULL;
2065
2066 return ch_info;
2067 }
2068
2069 static s32 iwl4965_get_tx_atten_grp(u16 channel)
2070 {
2071 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
2072 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
2073 return CALIB_CH_GROUP_5;
2074
2075 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
2076 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
2077 return CALIB_CH_GROUP_1;
2078
2079 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
2080 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
2081 return CALIB_CH_GROUP_2;
2082
2083 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
2084 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
2085 return CALIB_CH_GROUP_3;
2086
2087 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
2088 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
2089 return CALIB_CH_GROUP_4;
2090
2091 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
2092 return -1;
2093 }
2094
2095 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
2096 {
2097 s32 b = -1;
2098
2099 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
2100 if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
2101 continue;
2102
2103 if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
2104 && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
2105 break;
2106 }
2107
2108 return b;
2109 }
2110
2111 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
2112 {
2113 s32 val;
2114
2115 if (x2 == x1)
2116 return y1;
2117 else {
2118 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
2119 return val + y2;
2120 }
2121 }
2122
2123 /**
2124 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
2125 *
2126 * Interpolates factory measurements from the two sample channels within a
2127 * sub-band, to apply to channel of interest. Interpolation is proportional to
2128 * differences in channel frequencies, which is proportional to differences
2129 * in channel number.
2130 */
2131 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
2132 struct iwl4965_eeprom_calib_ch_info *chan_info)
2133 {
2134 s32 s = -1;
2135 u32 c;
2136 u32 m;
2137 const struct iwl4965_eeprom_calib_measure *m1;
2138 const struct iwl4965_eeprom_calib_measure *m2;
2139 struct iwl4965_eeprom_calib_measure *omeas;
2140 u32 ch_i1;
2141 u32 ch_i2;
2142
2143 s = iwl4965_get_sub_band(priv, channel);
2144 if (s >= EEPROM_TX_POWER_BANDS) {
2145 IWL_ERROR("Tx Power can not find channel %d ", channel);
2146 return -1;
2147 }
2148
2149 ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
2150 ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
2151 chan_info->ch_num = (u8) channel;
2152
2153 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
2154 channel, s, ch_i1, ch_i2);
2155
2156 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
2157 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
2158 m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
2159 measurements[c][m]);
2160 m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
2161 measurements[c][m]);
2162 omeas = &(chan_info->measurements[c][m]);
2163
2164 omeas->actual_pow =
2165 (u8) iwl4965_interpolate_value(channel, ch_i1,
2166 m1->actual_pow,
2167 ch_i2,
2168 m2->actual_pow);
2169 omeas->gain_idx =
2170 (u8) iwl4965_interpolate_value(channel, ch_i1,
2171 m1->gain_idx, ch_i2,
2172 m2->gain_idx);
2173 omeas->temperature =
2174 (u8) iwl4965_interpolate_value(channel, ch_i1,
2175 m1->temperature,
2176 ch_i2,
2177 m2->temperature);
2178 omeas->pa_det =
2179 (s8) iwl4965_interpolate_value(channel, ch_i1,
2180 m1->pa_det, ch_i2,
2181 m2->pa_det);
2182
2183 IWL_DEBUG_TXPOWER
2184 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
2185 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
2186 IWL_DEBUG_TXPOWER
2187 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
2188 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
2189 IWL_DEBUG_TXPOWER
2190 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
2191 m1->pa_det, m2->pa_det, omeas->pa_det);
2192 IWL_DEBUG_TXPOWER
2193 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
2194 m1->temperature, m2->temperature,
2195 omeas->temperature);
2196 }
2197 }
2198
2199 return 0;
2200 }
2201
2202 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
2203 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
2204 static s32 back_off_table[] = {
2205 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
2206 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
2207 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
2208 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
2209 10 /* CCK */
2210 };
2211
2212 /* Thermal compensation values for txpower for various frequency ranges ...
2213 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
2214 static struct iwl4965_txpower_comp_entry {
2215 s32 degrees_per_05db_a;
2216 s32 degrees_per_05db_a_denom;
2217 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
2218 {9, 2}, /* group 0 5.2, ch 34-43 */
2219 {4, 1}, /* group 1 5.2, ch 44-70 */
2220 {4, 1}, /* group 2 5.2, ch 71-124 */
2221 {4, 1}, /* group 3 5.2, ch 125-200 */
2222 {3, 1} /* group 4 2.4, ch all */
2223 };
2224
2225 static s32 get_min_power_index(s32 rate_power_index, u32 band)
2226 {
2227 if (!band) {
2228 if ((rate_power_index & 7) <= 4)
2229 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
2230 }
2231 return MIN_TX_GAIN_INDEX;
2232 }
2233
2234 struct gain_entry {
2235 u8 dsp;
2236 u8 radio;
2237 };
2238
2239 static const struct gain_entry gain_table[2][108] = {
2240 /* 5.2GHz power gain index table */
2241 {
2242 {123, 0x3F}, /* highest txpower */
2243 {117, 0x3F},
2244 {110, 0x3F},
2245 {104, 0x3F},
2246 {98, 0x3F},
2247 {110, 0x3E},
2248 {104, 0x3E},
2249 {98, 0x3E},
2250 {110, 0x3D},
2251 {104, 0x3D},
2252 {98, 0x3D},
2253 {110, 0x3C},
2254 {104, 0x3C},
2255 {98, 0x3C},
2256 {110, 0x3B},
2257 {104, 0x3B},
2258 {98, 0x3B},
2259 {110, 0x3A},
2260 {104, 0x3A},
2261 {98, 0x3A},
2262 {110, 0x39},
2263 {104, 0x39},
2264 {98, 0x39},
2265 {110, 0x38},
2266 {104, 0x38},
2267 {98, 0x38},
2268 {110, 0x37},
2269 {104, 0x37},
2270 {98, 0x37},
2271 {110, 0x36},
2272 {104, 0x36},
2273 {98, 0x36},
2274 {110, 0x35},
2275 {104, 0x35},
2276 {98, 0x35},
2277 {110, 0x34},
2278 {104, 0x34},
2279 {98, 0x34},
2280 {110, 0x33},
2281 {104, 0x33},
2282 {98, 0x33},
2283 {110, 0x32},
2284 {104, 0x32},
2285 {98, 0x32},
2286 {110, 0x31},
2287 {104, 0x31},
2288 {98, 0x31},
2289 {110, 0x30},
2290 {104, 0x30},
2291 {98, 0x30},
2292 {110, 0x25},
2293 {104, 0x25},
2294 {98, 0x25},
2295 {110, 0x24},
2296 {104, 0x24},
2297 {98, 0x24},
2298 {110, 0x23},
2299 {104, 0x23},
2300 {98, 0x23},
2301 {110, 0x22},
2302 {104, 0x18},
2303 {98, 0x18},
2304 {110, 0x17},
2305 {104, 0x17},
2306 {98, 0x17},
2307 {110, 0x16},
2308 {104, 0x16},
2309 {98, 0x16},
2310 {110, 0x15},
2311 {104, 0x15},
2312 {98, 0x15},
2313 {110, 0x14},
2314 {104, 0x14},
2315 {98, 0x14},
2316 {110, 0x13},
2317 {104, 0x13},
2318 {98, 0x13},
2319 {110, 0x12},
2320 {104, 0x08},
2321 {98, 0x08},
2322 {110, 0x07},
2323 {104, 0x07},
2324 {98, 0x07},
2325 {110, 0x06},
2326 {104, 0x06},
2327 {98, 0x06},
2328 {110, 0x05},
2329 {104, 0x05},
2330 {98, 0x05},
2331 {110, 0x04},
2332 {104, 0x04},
2333 {98, 0x04},
2334 {110, 0x03},
2335 {104, 0x03},
2336 {98, 0x03},
2337 {110, 0x02},
2338 {104, 0x02},
2339 {98, 0x02},
2340 {110, 0x01},
2341 {104, 0x01},
2342 {98, 0x01},
2343 {110, 0x00},
2344 {104, 0x00},
2345 {98, 0x00},
2346 {93, 0x00},
2347 {88, 0x00},
2348 {83, 0x00},
2349 {78, 0x00},
2350 },
2351 /* 2.4GHz power gain index table */
2352 {
2353 {110, 0x3f}, /* highest txpower */
2354 {104, 0x3f},
2355 {98, 0x3f},
2356 {110, 0x3e},
2357 {104, 0x3e},
2358 {98, 0x3e},
2359 {110, 0x3d},
2360 {104, 0x3d},
2361 {98, 0x3d},
2362 {110, 0x3c},
2363 {104, 0x3c},
2364 {98, 0x3c},
2365 {110, 0x3b},
2366 {104, 0x3b},
2367 {98, 0x3b},
2368 {110, 0x3a},
2369 {104, 0x3a},
2370 {98, 0x3a},
2371 {110, 0x39},
2372 {104, 0x39},
2373 {98, 0x39},
2374 {110, 0x38},
2375 {104, 0x38},
2376 {98, 0x38},
2377 {110, 0x37},
2378 {104, 0x37},
2379 {98, 0x37},
2380 {110, 0x36},
2381 {104, 0x36},
2382 {98, 0x36},
2383 {110, 0x35},
2384 {104, 0x35},
2385 {98, 0x35},
2386 {110, 0x34},
2387 {104, 0x34},
2388 {98, 0x34},
2389 {110, 0x33},
2390 {104, 0x33},
2391 {98, 0x33},
2392 {110, 0x32},
2393 {104, 0x32},
2394 {98, 0x32},
2395 {110, 0x31},
2396 {104, 0x31},
2397 {98, 0x31},
2398 {110, 0x30},
2399 {104, 0x30},
2400 {98, 0x30},
2401 {110, 0x6},
2402 {104, 0x6},
2403 {98, 0x6},
2404 {110, 0x5},
2405 {104, 0x5},
2406 {98, 0x5},
2407 {110, 0x4},
2408 {104, 0x4},
2409 {98, 0x4},
2410 {110, 0x3},
2411 {104, 0x3},
2412 {98, 0x3},
2413 {110, 0x2},
2414 {104, 0x2},
2415 {98, 0x2},
2416 {110, 0x1},
2417 {104, 0x1},
2418 {98, 0x1},
2419 {110, 0x0},
2420 {104, 0x0},
2421 {98, 0x0},
2422 {97, 0},
2423 {96, 0},
2424 {95, 0},
2425 {94, 0},
2426 {93, 0},
2427 {92, 0},
2428 {91, 0},
2429 {90, 0},
2430 {89, 0},
2431 {88, 0},
2432 {87, 0},
2433 {86, 0},
2434 {85, 0},
2435 {84, 0},
2436 {83, 0},
2437 {82, 0},
2438 {81, 0},
2439 {80, 0},
2440 {79, 0},
2441 {78, 0},
2442 {77, 0},
2443 {76, 0},
2444 {75, 0},
2445 {74, 0},
2446 {73, 0},
2447 {72, 0},
2448 {71, 0},
2449 {70, 0},
2450 {69, 0},
2451 {68, 0},
2452 {67, 0},
2453 {66, 0},
2454 {65, 0},
2455 {64, 0},
2456 {63, 0},
2457 {62, 0},
2458 {61, 0},
2459 {60, 0},
2460 {59, 0},
2461 }
2462 };
2463
2464 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
2465 u8 is_fat, u8 ctrl_chan_high,
2466 struct iwl4965_tx_power_db *tx_power_tbl)
2467 {
2468 u8 saturation_power;
2469 s32 target_power;
2470 s32 user_target_power;
2471 s32 power_limit;
2472 s32 current_temp;
2473 s32 reg_limit;
2474 s32 current_regulatory;
2475 s32 txatten_grp = CALIB_CH_GROUP_MAX;
2476 int i;
2477 int c;
2478 const struct iwl_channel_info *ch_info = NULL;
2479 struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
2480 const struct iwl4965_eeprom_calib_measure *measurement;
2481 s16 voltage;
2482 s32 init_voltage;
2483 s32 voltage_compensation;
2484 s32 degrees_per_05db_num;
2485 s32 degrees_per_05db_denom;
2486 s32 factory_temp;
2487 s32 temperature_comp[2];
2488 s32 factory_gain_index[2];
2489 s32 factory_actual_pwr[2];
2490 s32 power_index;
2491
2492 /* Sanity check requested level (dBm) */
2493 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
2494 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
2495 priv->user_txpower_limit);
2496 return -EINVAL;
2497 }
2498 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
2499 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
2500 priv->user_txpower_limit);
2501 return -EINVAL;
2502 }
2503
2504 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
2505 * are used for indexing into txpower table) */
2506 user_target_power = 2 * priv->user_txpower_limit;
2507
2508 /* Get current (RXON) channel, band, width */
2509 ch_info =
2510 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
2511
2512 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
2513 is_fat);
2514
2515 if (!ch_info)
2516 return -EINVAL;
2517
2518 /* get txatten group, used to select 1) thermal txpower adjustment
2519 * and 2) mimo txpower balance between Tx chains. */
2520 txatten_grp = iwl4965_get_tx_atten_grp(channel);
2521 if (txatten_grp < 0)
2522 return -EINVAL;
2523
2524 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
2525 channel, txatten_grp);
2526
2527 if (is_fat) {
2528 if (ctrl_chan_high)
2529 channel -= 2;
2530 else
2531 channel += 2;
2532 }
2533
2534 /* hardware txpower limits ...
2535 * saturation (clipping distortion) txpowers are in half-dBm */
2536 if (band)
2537 saturation_power = priv->eeprom.calib_info.saturation_power24;
2538 else
2539 saturation_power = priv->eeprom.calib_info.saturation_power52;
2540
2541 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
2542 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
2543 if (band)
2544 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
2545 else
2546 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
2547 }
2548
2549 /* regulatory txpower limits ... reg_limit values are in half-dBm,
2550 * max_power_avg values are in dBm, convert * 2 */
2551 if (is_fat)
2552 reg_limit = ch_info->fat_max_power_avg * 2;
2553 else
2554 reg_limit = ch_info->max_power_avg * 2;
2555
2556 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
2557 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
2558 if (band)
2559 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
2560 else
2561 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
2562 }
2563
2564 /* Interpolate txpower calibration values for this channel,
2565 * based on factory calibration tests on spaced channels. */
2566 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
2567
2568 /* calculate tx gain adjustment based on power supply voltage */
2569 voltage = priv->eeprom.calib_info.voltage;
2570 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
2571 voltage_compensation =
2572 iwl4965_get_voltage_compensation(voltage, init_voltage);
2573
2574 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
2575 init_voltage,
2576 voltage, voltage_compensation);
2577
2578 /* get current temperature (Celsius) */
2579 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
2580 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
2581 current_temp = KELVIN_TO_CELSIUS(current_temp);
2582
2583 /* select thermal txpower adjustment params, based on channel group
2584 * (same frequency group used for mimo txatten adjustment) */
2585 degrees_per_05db_num =
2586 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
2587 degrees_per_05db_denom =
2588 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
2589
2590 /* get per-chain txpower values from factory measurements */
2591 for (c = 0; c < 2; c++) {
2592 measurement = &ch_eeprom_info.measurements[c][1];
2593
2594 /* txgain adjustment (in half-dB steps) based on difference
2595 * between factory and current temperature */
2596 factory_temp = measurement->temperature;
2597 iwl4965_math_div_round((current_temp - factory_temp) *
2598 degrees_per_05db_denom,
2599 degrees_per_05db_num,
2600 &temperature_comp[c]);
2601
2602 factory_gain_index[c] = measurement->gain_idx;
2603 factory_actual_pwr[c] = measurement->actual_pow;
2604
2605 IWL_DEBUG_TXPOWER("chain = %d\n", c);
2606 IWL_DEBUG_TXPOWER("fctry tmp %d, "
2607 "curr tmp %d, comp %d steps\n",
2608 factory_temp, current_temp,
2609 temperature_comp[c]);
2610
2611 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
2612 factory_gain_index[c],
2613 factory_actual_pwr[c]);
2614 }
2615
2616 /* for each of 33 bit-rates (including 1 for CCK) */
2617 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
2618 u8 is_mimo_rate;
2619 union iwl4965_tx_power_dual_stream tx_power;
2620
2621 /* for mimo, reduce each chain's txpower by half
2622 * (3dB, 6 steps), so total output power is regulatory
2623 * compliant. */
2624 if (i & 0x8) {
2625 current_regulatory = reg_limit -
2626 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
2627 is_mimo_rate = 1;
2628 } else {
2629 current_regulatory = reg_limit;
2630 is_mimo_rate = 0;
2631 }
2632
2633 /* find txpower limit, either hardware or regulatory */
2634 power_limit = saturation_power - back_off_table[i];
2635 if (power_limit > current_regulatory)
2636 power_limit = current_regulatory;
2637
2638 /* reduce user's txpower request if necessary
2639 * for this rate on this channel */
2640 target_power = user_target_power;
2641 if (target_power > power_limit)
2642 target_power = power_limit;
2643
2644 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
2645 i, saturation_power - back_off_table[i],
2646 current_regulatory, user_target_power,
2647 target_power);
2648
2649 /* for each of 2 Tx chains (radio transmitters) */
2650 for (c = 0; c < 2; c++) {
2651 s32 atten_value;
2652
2653 if (is_mimo_rate)
2654 atten_value =
2655 (s32)le32_to_cpu(priv->card_alive_init.
2656 tx_atten[txatten_grp][c]);
2657 else
2658 atten_value = 0;
2659
2660 /* calculate index; higher index means lower txpower */
2661 power_index = (u8) (factory_gain_index[c] -
2662 (target_power -
2663 factory_actual_pwr[c]) -
2664 temperature_comp[c] -
2665 voltage_compensation +
2666 atten_value);
2667
2668 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
2669 power_index); */
2670
2671 if (power_index < get_min_power_index(i, band))
2672 power_index = get_min_power_index(i, band);
2673
2674 /* adjust 5 GHz index to support negative indexes */
2675 if (!band)
2676 power_index += 9;
2677
2678 /* CCK, rate 32, reduce txpower for CCK */
2679 if (i == POWER_TABLE_CCK_ENTRY)
2680 power_index +=
2681 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
2682
2683 /* stay within the table! */
2684 if (power_index > 107) {
2685 IWL_WARNING("txpower index %d > 107\n",
2686 power_index);
2687 power_index = 107;
2688 }
2689 if (power_index < 0) {
2690 IWL_WARNING("txpower index %d < 0\n",
2691 power_index);
2692 power_index = 0;
2693 }
2694
2695 /* fill txpower command for this rate/chain */
2696 tx_power.s.radio_tx_gain[c] =
2697 gain_table[band][power_index].radio;
2698 tx_power.s.dsp_predis_atten[c] =
2699 gain_table[band][power_index].dsp;
2700
2701 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
2702 "gain 0x%02x dsp %d\n",
2703 c, atten_value, power_index,
2704 tx_power.s.radio_tx_gain[c],
2705 tx_power.s.dsp_predis_atten[c]);
2706 }/* for each chain */
2707
2708 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
2709
2710 }/* for each rate */
2711
2712 return 0;
2713 }
2714
2715 /**
2716 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
2717 *
2718 * Uses the active RXON for channel, band, and characteristics (fat, high)
2719 * The power limit is taken from priv->user_txpower_limit.
2720 */
2721 int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
2722 {
2723 struct iwl4965_txpowertable_cmd cmd = { 0 };
2724 int ret;
2725 u8 band = 0;
2726 u8 is_fat = 0;
2727 u8 ctrl_chan_high = 0;
2728
2729 if (test_bit(STATUS_SCANNING, &priv->status)) {
2730 /* If this gets hit a lot, switch it to a BUG() and catch
2731 * the stack trace to find out who is calling this during
2732 * a scan. */
2733 IWL_WARNING("TX Power requested while scanning!\n");
2734 return -EAGAIN;
2735 }
2736
2737 band = priv->band == IEEE80211_BAND_2GHZ;
2738
2739 is_fat = is_fat_channel(priv->active_rxon.flags);
2740
2741 if (is_fat &&
2742 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2743 ctrl_chan_high = 1;
2744
2745 cmd.band = band;
2746 cmd.channel = priv->active_rxon.channel;
2747
2748 ret = iwl4965_fill_txpower_tbl(priv, band,
2749 le16_to_cpu(priv->active_rxon.channel),
2750 is_fat, ctrl_chan_high, &cmd.tx_power);
2751 if (ret)
2752 goto out;
2753
2754 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
2755
2756 out:
2757 return ret;
2758 }
2759
2760 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
2761 {
2762 int rc;
2763 u8 band = 0;
2764 u8 is_fat = 0;
2765 u8 ctrl_chan_high = 0;
2766 struct iwl4965_channel_switch_cmd cmd = { 0 };
2767 const struct iwl_channel_info *ch_info;
2768
2769 band = priv->band == IEEE80211_BAND_2GHZ;
2770
2771 ch_info = iwl_get_channel_info(priv, priv->band, channel);
2772
2773 is_fat = is_fat_channel(priv->staging_rxon.flags);
2774
2775 if (is_fat &&
2776 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2777 ctrl_chan_high = 1;
2778
2779 cmd.band = band;
2780 cmd.expect_beacon = 0;
2781 cmd.channel = cpu_to_le16(channel);
2782 cmd.rxon_flags = priv->active_rxon.flags;
2783 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
2784 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
2785 if (ch_info)
2786 cmd.expect_beacon = is_channel_radar(ch_info);
2787 else
2788 cmd.expect_beacon = 1;
2789
2790 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
2791 ctrl_chan_high, &cmd.tx_power);
2792 if (rc) {
2793 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
2794 return rc;
2795 }
2796
2797 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
2798 return rc;
2799 }
2800
2801 #define RTS_HCCA_RETRY_LIMIT 3
2802 #define RTS_DFAULT_RETRY_LIMIT 60
2803
2804 void iwl4965_hw_build_tx_cmd_rate(struct iwl_priv *priv,
2805 struct iwl_cmd *cmd,
2806 struct ieee80211_tx_control *ctrl,
2807 struct ieee80211_hdr *hdr, int sta_id,
2808 int is_hcca)
2809 {
2810 struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
2811 u8 rts_retry_limit = 0;
2812 u8 data_retry_limit = 0;
2813 u16 fc = le16_to_cpu(hdr->frame_control);
2814 u8 rate_plcp;
2815 u16 rate_flags = 0;
2816 int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
2817
2818 rate_plcp = iwl4965_rates[rate_idx].plcp;
2819
2820 rts_retry_limit = (is_hcca) ?
2821 RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
2822
2823 if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
2824 rate_flags |= RATE_MCS_CCK_MSK;
2825
2826
2827 if (ieee80211_is_probe_response(fc)) {
2828 data_retry_limit = 3;
2829 if (data_retry_limit < rts_retry_limit)
2830 rts_retry_limit = data_retry_limit;
2831 } else
2832 data_retry_limit = IWL_DEFAULT_TX_RETRY;
2833
2834 if (priv->data_retry_limit != -1)
2835 data_retry_limit = priv->data_retry_limit;
2836
2837
2838 if (ieee80211_is_data(fc)) {
2839 tx->initial_rate_index = 0;
2840 tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
2841 } else {
2842 switch (fc & IEEE80211_FCTL_STYPE) {
2843 case IEEE80211_STYPE_AUTH:
2844 case IEEE80211_STYPE_DEAUTH:
2845 case IEEE80211_STYPE_ASSOC_REQ:
2846 case IEEE80211_STYPE_REASSOC_REQ:
2847 if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
2848 tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2849 tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
2850 }
2851 break;
2852 default:
2853 break;
2854 }
2855
2856 /* Alternate between antenna A and B for successive frames */
2857 if (priv->use_ant_b_for_management_frame) {
2858 priv->use_ant_b_for_management_frame = 0;
2859 rate_flags |= RATE_MCS_ANT_B_MSK;
2860 } else {
2861 priv->use_ant_b_for_management_frame = 1;
2862 rate_flags |= RATE_MCS_ANT_A_MSK;
2863 }
2864 }
2865
2866 tx->rts_retry_limit = rts_retry_limit;
2867 tx->data_retry_limit = data_retry_limit;
2868 tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
2869 }
2870
2871 int iwl4965_hw_get_rx_read(struct iwl_priv *priv)
2872 {
2873 struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2874
2875 return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
2876 }
2877
2878 int iwl4965_hw_get_temperature(struct iwl_priv *priv)
2879 {
2880 return priv->temperature;
2881 }
2882
2883 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
2884 struct iwl4965_frame *frame, u8 rate)
2885 {
2886 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
2887 unsigned int frame_size;
2888
2889 tx_beacon_cmd = &frame->u.beacon;
2890 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2891
2892 tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2893 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2894
2895 frame_size = iwl4965_fill_beacon_frame(priv,
2896 tx_beacon_cmd->frame,
2897 iwl4965_broadcast_addr,
2898 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2899
2900 BUG_ON(frame_size > MAX_MPDU_SIZE);
2901 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2902
2903 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
2904 tx_beacon_cmd->tx.rate_n_flags =
2905 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
2906 else
2907 tx_beacon_cmd->tx.rate_n_flags =
2908 iwl4965_hw_set_rate_n_flags(rate, 0);
2909
2910 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2911 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
2912 return (sizeof(*tx_beacon_cmd) + frame_size);
2913 }
2914
2915 /*
2916 * Tell 4965 where to find circular buffer of Tx Frame Descriptors for
2917 * given Tx queue, and enable the DMA channel used for that queue.
2918 *
2919 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
2920 * channels supported in hardware.
2921 */
2922 int iwl4965_hw_tx_queue_init(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
2923 {
2924 int rc;
2925 unsigned long flags;
2926 int txq_id = txq->q.id;
2927
2928 spin_lock_irqsave(&priv->lock, flags);
2929 rc = iwl_grab_nic_access(priv);
2930 if (rc) {
2931 spin_unlock_irqrestore(&priv->lock, flags);
2932 return rc;
2933 }
2934
2935 /* Circular buffer (TFD queue in DRAM) physical base address */
2936 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
2937 txq->q.dma_addr >> 8);
2938
2939 /* Enable DMA channel, using same id as for TFD queue */
2940 iwl_write_direct32(
2941 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
2942 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
2943 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
2944 iwl_release_nic_access(priv);
2945 spin_unlock_irqrestore(&priv->lock, flags);
2946
2947 return 0;
2948 }
2949
2950 int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
2951 dma_addr_t addr, u16 len)
2952 {
2953 int index, is_odd;
2954 struct iwl4965_tfd_frame *tfd = ptr;
2955 u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
2956
2957 /* Each TFD can point to a maximum 20 Tx buffers */
2958 if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
2959 IWL_ERROR("Error can not send more than %d chunks\n",
2960 MAX_NUM_OF_TBS);
2961 return -EINVAL;
2962 }
2963
2964 index = num_tbs / 2;
2965 is_odd = num_tbs & 0x1;
2966
2967 if (!is_odd) {
2968 tfd->pa[index].tb1_addr = cpu_to_le32(addr);
2969 IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
2970 iwl_get_dma_hi_address(addr));
2971 IWL_SET_BITS(tfd->pa[index], tb1_len, len);
2972 } else {
2973 IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
2974 (u32) (addr & 0xffff));
2975 IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
2976 IWL_SET_BITS(tfd->pa[index], tb2_len, len);
2977 }
2978
2979 IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
2980
2981 return 0;
2982 }
2983
2984 static void iwl4965_hw_card_show_info(struct iwl_priv *priv)
2985 {
2986 u16 hw_version = priv->eeprom.board_revision_4965;
2987
2988 IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
2989 ((hw_version >> 8) & 0x0F),
2990 ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
2991
2992 IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
2993 priv->eeprom.board_pba_number_4965);
2994 }
2995
2996 #define IWL_TX_CRC_SIZE 4
2997 #define IWL_TX_DELIMITER_SIZE 4
2998
2999 /**
3000 * iwl4965_tx_queue_update_wr_ptr - Set up entry in Tx byte-count array
3001 */
3002 int iwl4965_tx_queue_update_wr_ptr(struct iwl_priv *priv,
3003 struct iwl4965_tx_queue *txq, u16 byte_cnt)
3004 {
3005 int len;
3006 int txq_id = txq->q.id;
3007 struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
3008
3009 if (txq->need_update == 0)
3010 return 0;
3011
3012 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
3013
3014 /* Set up byte count within first 256 entries */
3015 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
3016 tfd_offset[txq->q.write_ptr], byte_cnt, len);
3017
3018 /* If within first 64 entries, duplicate at end */
3019 if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
3020 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
3021 tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
3022 byte_cnt, len);
3023
3024 return 0;
3025 }
3026
3027 /**
3028 * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
3029 *
3030 * Selects how many and which Rx receivers/antennas/chains to use.
3031 * This should not be used for scan command ... it puts data in wrong place.
3032 */
3033 void iwl4965_set_rxon_chain(struct iwl_priv *priv)
3034 {
3035 u8 is_single = is_single_stream(priv);
3036 u8 idle_state, rx_state;
3037
3038 priv->staging_rxon.rx_chain = 0;
3039 rx_state = idle_state = 3;
3040
3041 /* Tell uCode which antennas are actually connected.
3042 * Before first association, we assume all antennas are connected.
3043 * Just after first association, iwl4965_noise_calibration()
3044 * checks which antennas actually *are* connected. */
3045 priv->staging_rxon.rx_chain |=
3046 cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
3047
3048 /* How many receivers should we use? */
3049 iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
3050 priv->staging_rxon.rx_chain |=
3051 cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
3052 priv->staging_rxon.rx_chain |=
3053 cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
3054
3055 if (!is_single && (rx_state >= 2) &&
3056 !test_bit(STATUS_POWER_PMI, &priv->status))
3057 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
3058 else
3059 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
3060
3061 IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
3062 }
3063
3064 /**
3065 * sign_extend - Sign extend a value using specified bit as sign-bit
3066 *
3067 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
3068 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
3069 *
3070 * @param oper value to sign extend
3071 * @param index 0 based bit index (0<=index<32) to sign bit
3072 */
3073 static s32 sign_extend(u32 oper, int index)
3074 {
3075 u8 shift = 31 - index;
3076
3077 return (s32)(oper << shift) >> shift;
3078 }
3079
3080 /**
3081 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
3082 * @statistics: Provides the temperature reading from the uCode
3083 *
3084 * A return of <0 indicates bogus data in the statistics
3085 */
3086 int iwl4965_get_temperature(const struct iwl_priv *priv)
3087 {
3088 s32 temperature;
3089 s32 vt;
3090 s32 R1, R2, R3;
3091 u32 R4;
3092
3093 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
3094 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
3095 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
3096 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
3097 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
3098 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
3099 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
3100 } else {
3101 IWL_DEBUG_TEMP("Running temperature calibration\n");
3102 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
3103 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
3104 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
3105 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
3106 }
3107
3108 /*
3109 * Temperature is only 23 bits, so sign extend out to 32.
3110 *
3111 * NOTE If we haven't received a statistics notification yet
3112 * with an updated temperature, use R4 provided to us in the
3113 * "initialize" ALIVE response.
3114 */
3115 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
3116 vt = sign_extend(R4, 23);
3117 else
3118 vt = sign_extend(
3119 le32_to_cpu(priv->statistics.general.temperature), 23);
3120
3121 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
3122 R1, R2, R3, vt);
3123
3124 if (R3 == R1) {
3125 IWL_ERROR("Calibration conflict R1 == R3\n");
3126 return -1;
3127 }
3128
3129 /* Calculate temperature in degrees Kelvin, adjust by 97%.
3130 * Add offset to center the adjustment around 0 degrees Centigrade. */
3131 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
3132 temperature /= (R3 - R1);
3133 temperature = (temperature * 97) / 100 +
3134 TEMPERATURE_CALIB_KELVIN_OFFSET;
3135
3136 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
3137 KELVIN_TO_CELSIUS(temperature));
3138
3139 return temperature;
3140 }
3141
3142 /* Adjust Txpower only if temperature variance is greater than threshold. */
3143 #define IWL_TEMPERATURE_THRESHOLD 3
3144
3145 /**
3146 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
3147 *
3148 * If the temperature changed has changed sufficiently, then a recalibration
3149 * is needed.
3150 *
3151 * Assumes caller will replace priv->last_temperature once calibration
3152 * executed.
3153 */
3154 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
3155 {
3156 int temp_diff;
3157
3158 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
3159 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
3160 return 0;
3161 }
3162
3163 temp_diff = priv->temperature - priv->last_temperature;
3164
3165 /* get absolute value */
3166 if (temp_diff < 0) {
3167 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
3168 temp_diff = -temp_diff;
3169 } else if (temp_diff == 0)
3170 IWL_DEBUG_POWER("Same temp, \n");
3171 else
3172 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
3173
3174 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
3175 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
3176 return 0;
3177 }
3178
3179 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
3180
3181 return 1;
3182 }
3183
3184 /* Calculate noise level, based on measurements during network silence just
3185 * before arriving beacon. This measurement can be done only if we know
3186 * exactly when to expect beacons, therefore only when we're associated. */
3187 static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
3188 {
3189 struct statistics_rx_non_phy *rx_info
3190 = &(priv->statistics.rx.general);
3191 int num_active_rx = 0;
3192 int total_silence = 0;
3193 int bcn_silence_a =
3194 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
3195 int bcn_silence_b =
3196 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
3197 int bcn_silence_c =
3198 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
3199
3200 if (bcn_silence_a) {
3201 total_silence += bcn_silence_a;
3202 num_active_rx++;
3203 }
3204 if (bcn_silence_b) {
3205 total_silence += bcn_silence_b;
3206 num_active_rx++;
3207 }
3208 if (bcn_silence_c) {
3209 total_silence += bcn_silence_c;
3210 num_active_rx++;
3211 }
3212
3213 /* Average among active antennas */
3214 if (num_active_rx)
3215 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
3216 else
3217 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3218
3219 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
3220 bcn_silence_a, bcn_silence_b, bcn_silence_c,
3221 priv->last_rx_noise);
3222 }
3223
3224 void iwl4965_hw_rx_statistics(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
3225 {
3226 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3227 int change;
3228 s32 temp;
3229
3230 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
3231 (int)sizeof(priv->statistics), pkt->len);
3232
3233 change = ((priv->statistics.general.temperature !=
3234 pkt->u.stats.general.temperature) ||
3235 ((priv->statistics.flag &
3236 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
3237 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
3238
3239 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
3240
3241 set_bit(STATUS_STATISTICS, &priv->status);
3242
3243 /* Reschedule the statistics timer to occur in
3244 * REG_RECALIB_PERIOD seconds to ensure we get a
3245 * thermal update even if the uCode doesn't give
3246 * us one */
3247 mod_timer(&priv->statistics_periodic, jiffies +
3248 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
3249
3250 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
3251 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
3252 iwl4965_rx_calc_noise(priv);
3253 #ifdef CONFIG_IWL4965_SENSITIVITY
3254 queue_work(priv->workqueue, &priv->sensitivity_work);
3255 #endif
3256 }
3257
3258 iwl_leds_background(priv);
3259
3260 /* If the hardware hasn't reported a change in
3261 * temperature then don't bother computing a
3262 * calibrated temperature value */
3263 if (!change)
3264 return;
3265
3266 temp = iwl4965_get_temperature(priv);
3267 if (temp < 0)
3268 return;
3269
3270 if (priv->temperature != temp) {
3271 if (priv->temperature)
3272 IWL_DEBUG_TEMP("Temperature changed "
3273 "from %dC to %dC\n",
3274 KELVIN_TO_CELSIUS(priv->temperature),
3275 KELVIN_TO_CELSIUS(temp));
3276 else
3277 IWL_DEBUG_TEMP("Temperature "
3278 "initialized to %dC\n",
3279 KELVIN_TO_CELSIUS(temp));
3280 }
3281
3282 priv->temperature = temp;
3283 set_bit(STATUS_TEMPERATURE, &priv->status);
3284
3285 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
3286 iwl4965_is_temp_calib_needed(priv))
3287 queue_work(priv->workqueue, &priv->txpower_work);
3288 }
3289
3290 static void iwl4965_add_radiotap(struct iwl_priv *priv,
3291 struct sk_buff *skb,
3292 struct iwl4965_rx_phy_res *rx_start,
3293 struct ieee80211_rx_status *stats,
3294 u32 ampdu_status)
3295 {
3296 s8 signal = stats->ssi;
3297 s8 noise = 0;
3298 int rate = stats->rate_idx;
3299 u64 tsf = stats->mactime;
3300 __le16 phy_flags_hw = rx_start->phy_flags;
3301 struct iwl4965_rt_rx_hdr {
3302 struct ieee80211_radiotap_header rt_hdr;
3303 __le64 rt_tsf; /* TSF */
3304 u8 rt_flags; /* radiotap packet flags */
3305 u8 rt_rate; /* rate in 500kb/s */
3306 __le16 rt_channelMHz; /* channel in MHz */
3307 __le16 rt_chbitmask; /* channel bitfield */
3308 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
3309 s8 rt_dbmnoise;
3310 u8 rt_antenna; /* antenna number */
3311 } __attribute__ ((packed)) *iwl4965_rt;
3312
3313 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
3314 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
3315 if (net_ratelimit())
3316 printk(KERN_ERR "not enough headroom [%d] for "
3317 "radiotap head [%zd]\n",
3318 skb_headroom(skb), sizeof(*iwl4965_rt));
3319 return;
3320 }
3321
3322 /* put radiotap header in front of 802.11 header and data */
3323 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
3324
3325 /* initialise radiotap header */
3326 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
3327 iwl4965_rt->rt_hdr.it_pad = 0;
3328
3329 /* total header + data */
3330 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
3331 &iwl4965_rt->rt_hdr.it_len);
3332
3333 /* Indicate all the fields we add to the radiotap header */
3334 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
3335 (1 << IEEE80211_RADIOTAP_FLAGS) |
3336 (1 << IEEE80211_RADIOTAP_RATE) |
3337 (1 << IEEE80211_RADIOTAP_CHANNEL) |
3338 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
3339 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
3340 (1 << IEEE80211_RADIOTAP_ANTENNA)),
3341 &iwl4965_rt->rt_hdr.it_present);
3342
3343 /* Zero the flags, we'll add to them as we go */
3344 iwl4965_rt->rt_flags = 0;
3345
3346 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
3347
3348 iwl4965_rt->rt_dbmsignal = signal;
3349 iwl4965_rt->rt_dbmnoise = noise;
3350
3351 /* Convert the channel frequency and set the flags */
3352 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
3353 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
3354 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
3355 IEEE80211_CHAN_5GHZ),
3356 &iwl4965_rt->rt_chbitmask);
3357 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
3358 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
3359 IEEE80211_CHAN_2GHZ),
3360 &iwl4965_rt->rt_chbitmask);
3361 else /* 802.11g */
3362 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
3363 IEEE80211_CHAN_2GHZ),
3364 &iwl4965_rt->rt_chbitmask);
3365
3366 if (rate == -1)
3367 iwl4965_rt->rt_rate = 0;
3368 else
3369 iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
3370
3371 /*
3372 * "antenna number"
3373 *
3374 * It seems that the antenna field in the phy flags value
3375 * is actually a bitfield. This is undefined by radiotap,
3376 * it wants an actual antenna number but I always get "7"
3377 * for most legacy frames I receive indicating that the
3378 * same frame was received on all three RX chains.
3379 *
3380 * I think this field should be removed in favour of a
3381 * new 802.11n radiotap field "RX chains" that is defined
3382 * as a bitmask.
3383 */
3384 iwl4965_rt->rt_antenna =
3385 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
3386
3387 /* set the preamble flag if appropriate */
3388 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
3389 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3390
3391 stats->flag |= RX_FLAG_RADIOTAP;
3392 }
3393
3394 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
3395 {
3396 /* 0 - mgmt, 1 - cnt, 2 - data */
3397 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
3398 priv->rx_stats[idx].cnt++;
3399 priv->rx_stats[idx].bytes += len;
3400 }
3401
3402 static u32 iwl4965_translate_rx_status(u32 decrypt_in)
3403 {
3404 u32 decrypt_out = 0;
3405
3406 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
3407 RX_RES_STATUS_STATION_FOUND)
3408 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
3409 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
3410
3411 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
3412
3413 /* packet was not encrypted */
3414 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
3415 RX_RES_STATUS_SEC_TYPE_NONE)
3416 return decrypt_out;
3417
3418 /* packet was encrypted with unknown alg */
3419 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
3420 RX_RES_STATUS_SEC_TYPE_ERR)
3421 return decrypt_out;
3422
3423 /* decryption was not done in HW */
3424 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
3425 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
3426 return decrypt_out;
3427
3428 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
3429
3430 case RX_RES_STATUS_SEC_TYPE_CCMP:
3431 /* alg is CCM: check MIC only */
3432 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
3433 /* Bad MIC */
3434 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
3435 else
3436 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
3437
3438 break;
3439
3440 case RX_RES_STATUS_SEC_TYPE_TKIP:
3441 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
3442 /* Bad TTAK */
3443 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
3444 break;
3445 }
3446 /* fall through if TTAK OK */
3447 default:
3448 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
3449 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
3450 else
3451 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
3452 break;
3453 };
3454
3455 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
3456 decrypt_in, decrypt_out);
3457
3458 return decrypt_out;
3459 }
3460
3461 static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
3462 int include_phy,
3463 struct iwl4965_rx_mem_buffer *rxb,
3464 struct ieee80211_rx_status *stats)
3465 {
3466 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
3467 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3468 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
3469 struct ieee80211_hdr *hdr;
3470 u16 len;
3471 __le32 *rx_end;
3472 unsigned int skblen;
3473 u32 ampdu_status;
3474 u32 ampdu_status_legacy;
3475
3476 if (!include_phy && priv->last_phy_res[0])
3477 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3478
3479 if (!rx_start) {
3480 IWL_ERROR("MPDU frame without a PHY data\n");
3481 return;
3482 }
3483 if (include_phy) {
3484 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
3485 rx_start->cfg_phy_cnt);
3486
3487 len = le16_to_cpu(rx_start->byte_count);
3488
3489 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
3490 sizeof(struct iwl4965_rx_phy_res) +
3491 rx_start->cfg_phy_cnt + len);
3492
3493 } else {
3494 struct iwl4965_rx_mpdu_res_start *amsdu =
3495 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3496
3497 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
3498 sizeof(struct iwl4965_rx_mpdu_res_start));
3499 len = le16_to_cpu(amsdu->byte_count);
3500 rx_start->byte_count = amsdu->byte_count;
3501 rx_end = (__le32 *) (((u8 *) hdr) + len);
3502 }
3503 if (len > priv->hw_setting.max_pkt_size || len < 16) {
3504 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
3505 return;
3506 }
3507
3508 ampdu_status = le32_to_cpu(*rx_end);
3509 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
3510
3511 if (!include_phy) {
3512 /* New status scheme, need to translate */
3513 ampdu_status_legacy = ampdu_status;
3514 ampdu_status = iwl4965_translate_rx_status(ampdu_status);
3515 }
3516
3517 /* start from MAC */
3518 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
3519 skb_put(rxb->skb, len); /* end where data ends */
3520
3521 /* We only process data packets if the interface is open */
3522 if (unlikely(!priv->is_open)) {
3523 IWL_DEBUG_DROP_LIMIT
3524 ("Dropping packet while interface is not open.\n");
3525 return;
3526 }
3527
3528 stats->flag = 0;
3529 hdr = (struct ieee80211_hdr *)rxb->skb->data;
3530
3531 if (priv->cfg->mod_params->hw_crypto)
3532 iwl4965_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats);
3533
3534 if (priv->add_radiotap)
3535 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
3536
3537 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
3538 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3539 priv->alloc_rxb_skb--;
3540 rxb->skb = NULL;
3541 }
3542
3543 /* Calc max signal level (dBm) among 3 possible receivers */
3544 static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp)
3545 {
3546 /* data from PHY/DSP regarding signal strength, etc.,
3547 * contents are always there, not configurable by host. */
3548 struct iwl4965_rx_non_cfg_phy *ncphy =
3549 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
3550 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
3551 >> IWL_AGC_DB_POS;
3552
3553 u32 valid_antennae =
3554 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
3555 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
3556 u8 max_rssi = 0;
3557 u32 i;
3558
3559 /* Find max rssi among 3 possible receivers.
3560 * These values are measured by the digital signal processor (DSP).
3561 * They should stay fairly constant even as the signal strength varies,
3562 * if the radio's automatic gain control (AGC) is working right.
3563 * AGC value (see below) will provide the "interesting" info. */
3564 for (i = 0; i < 3; i++)
3565 if (valid_antennae & (1 << i))
3566 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
3567
3568 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
3569 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
3570 max_rssi, agc);
3571
3572 /* dBm = max_rssi dB - agc dB - constant.
3573 * Higher AGC (higher radio gain) means lower signal. */
3574 return (max_rssi - agc - IWL_RSSI_OFFSET);
3575 }
3576
3577 #ifdef CONFIG_IWL4965_HT
3578
3579 /* Parsed Information Elements */
3580 struct ieee802_11_elems {
3581 u8 *ds_params;
3582 u8 ds_params_len;
3583 u8 *tim;
3584 u8 tim_len;
3585 u8 *ibss_params;
3586 u8 ibss_params_len;
3587 u8 *erp_info;
3588 u8 erp_info_len;
3589 u8 *ht_cap_param;
3590 u8 ht_cap_param_len;
3591 u8 *ht_extra_param;
3592 u8 ht_extra_param_len;
3593 };
3594
3595 static int parse_elems(u8 *start, size_t len, struct ieee802_11_elems *elems)
3596 {
3597 size_t left = len;
3598 u8 *pos = start;
3599 int unknown = 0;
3600
3601 memset(elems, 0, sizeof(*elems));
3602
3603 while (left >= 2) {
3604 u8 id, elen;
3605
3606 id = *pos++;
3607 elen = *pos++;
3608 left -= 2;
3609
3610 if (elen > left)
3611 return -1;
3612
3613 switch (id) {
3614 case WLAN_EID_DS_PARAMS:
3615 elems->ds_params = pos;
3616 elems->ds_params_len = elen;
3617 break;
3618 case WLAN_EID_TIM:
3619 elems->tim = pos;
3620 elems->tim_len = elen;
3621 break;
3622 case WLAN_EID_IBSS_PARAMS:
3623 elems->ibss_params = pos;
3624 elems->ibss_params_len = elen;
3625 break;
3626 case WLAN_EID_ERP_INFO:
3627 elems->erp_info = pos;
3628 elems->erp_info_len = elen;
3629 break;
3630 case WLAN_EID_HT_CAPABILITY:
3631 elems->ht_cap_param = pos;
3632 elems->ht_cap_param_len = elen;
3633 break;
3634 case WLAN_EID_HT_EXTRA_INFO:
3635 elems->ht_extra_param = pos;
3636 elems->ht_extra_param_len = elen;
3637 break;
3638 default:
3639 unknown++;
3640 break;
3641 }
3642
3643 left -= elen;
3644 pos += elen;
3645 }
3646
3647 return 0;
3648 }
3649
3650 void iwl4965_init_ht_hw_capab(struct iwl_priv *priv,
3651 struct ieee80211_ht_info *ht_info,
3652 enum ieee80211_band band)
3653 {
3654 ht_info->cap = 0;
3655 memset(ht_info->supp_mcs_set, 0, 16);
3656
3657 ht_info->ht_supported = 1;
3658
3659 if (band == IEEE80211_BAND_5GHZ) {
3660 ht_info->cap |= (u16)IEEE80211_HT_CAP_SUP_WIDTH;
3661 ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_40;
3662 ht_info->supp_mcs_set[4] = 0x01;
3663 }
3664 ht_info->cap |= (u16)IEEE80211_HT_CAP_GRN_FLD;
3665 ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_20;
3666 ht_info->cap |= (u16)(IEEE80211_HT_CAP_MIMO_PS &
3667 (IWL_MIMO_PS_NONE << 2));
3668
3669 if (priv->cfg->mod_params->amsdu_size_8K)
3670 ht_info->cap |= (u16)IEEE80211_HT_CAP_MAX_AMSDU;
3671
3672 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3673 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3674
3675 ht_info->supp_mcs_set[0] = 0xFF;
3676 ht_info->supp_mcs_set[1] = 0xFF;
3677 }
3678 #endif /* CONFIG_IWL4965_HT */
3679
3680 static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
3681 {
3682 unsigned long flags;
3683
3684 spin_lock_irqsave(&priv->sta_lock, flags);
3685 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
3686 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
3687 priv->stations[sta_id].sta.sta.modify_mask = 0;
3688 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3689 spin_unlock_irqrestore(&priv->sta_lock, flags);
3690
3691 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3692 }
3693
3694 static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
3695 {
3696 /* FIXME: need locking over ps_status ??? */
3697 u8 sta_id = iwl4965_hw_find_station(priv, addr);
3698
3699 if (sta_id != IWL_INVALID_STATION) {
3700 u8 sta_awake = priv->stations[sta_id].
3701 ps_status == STA_PS_STATUS_WAKE;
3702
3703 if (sta_awake && ps_bit)
3704 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
3705 else if (!sta_awake && !ps_bit) {
3706 iwl4965_sta_modify_ps_wake(priv, sta_id);
3707 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
3708 }
3709 }
3710 }
3711 #ifdef CONFIG_IWLWIFI_DEBUG
3712
3713 /**
3714 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
3715 *
3716 * You may hack this function to show different aspects of received frames,
3717 * including selective frame dumps.
3718 * group100 parameter selects whether to show 1 out of 100 good frames.
3719 *
3720 * TODO: This was originally written for 3945, need to audit for
3721 * proper operation with 4965.
3722 */
3723 static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
3724 struct iwl4965_rx_packet *pkt,
3725 struct ieee80211_hdr *header, int group100)
3726 {
3727 u32 to_us;
3728 u32 print_summary = 0;
3729 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
3730 u32 hundred = 0;
3731 u32 dataframe = 0;
3732 u16 fc;
3733 u16 seq_ctl;
3734 u16 channel;
3735 u16 phy_flags;
3736 int rate_sym;
3737 u16 length;
3738 u16 status;
3739 u16 bcn_tmr;
3740 u32 tsf_low;
3741 u64 tsf;
3742 u8 rssi;
3743 u8 agc;
3744 u16 sig_avg;
3745 u16 noise_diff;
3746 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
3747 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
3748 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
3749 u8 *data = IWL_RX_DATA(pkt);
3750
3751 if (likely(!(iwl_debug_level & IWL_DL_RX)))
3752 return;
3753
3754 /* MAC header */
3755 fc = le16_to_cpu(header->frame_control);
3756 seq_ctl = le16_to_cpu(header->seq_ctrl);
3757
3758 /* metadata */
3759 channel = le16_to_cpu(rx_hdr->channel);
3760 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
3761 rate_sym = rx_hdr->rate;
3762 length = le16_to_cpu(rx_hdr->len);
3763
3764 /* end-of-frame status and timestamp */
3765 status = le32_to_cpu(rx_end->status);
3766 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
3767 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
3768 tsf = le64_to_cpu(rx_end->timestamp);
3769
3770 /* signal statistics */
3771 rssi = rx_stats->rssi;
3772 agc = rx_stats->agc;
3773 sig_avg = le16_to_cpu(rx_stats->sig_avg);
3774 noise_diff = le16_to_cpu(rx_stats->noise_diff);
3775
3776 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
3777
3778 /* if data frame is to us and all is good,
3779 * (optionally) print summary for only 1 out of every 100 */
3780 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
3781 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
3782 dataframe = 1;
3783 if (!group100)
3784 print_summary = 1; /* print each frame */
3785 else if (priv->framecnt_to_us < 100) {
3786 priv->framecnt_to_us++;
3787 print_summary = 0;
3788 } else {
3789 priv->framecnt_to_us = 0;
3790 print_summary = 1;
3791 hundred = 1;
3792 }
3793 } else {
3794 /* print summary for all other frames */
3795 print_summary = 1;
3796 }
3797
3798 if (print_summary) {
3799 char *title;
3800 int rate_idx;
3801 u32 bitrate;
3802
3803 if (hundred)
3804 title = "100Frames";
3805 else if (fc & IEEE80211_FCTL_RETRY)
3806 title = "Retry";
3807 else if (ieee80211_is_assoc_response(fc))
3808 title = "AscRsp";
3809 else if (ieee80211_is_reassoc_response(fc))
3810 title = "RasRsp";
3811 else if (ieee80211_is_probe_response(fc)) {
3812 title = "PrbRsp";
3813 print_dump = 1; /* dump frame contents */
3814 } else if (ieee80211_is_beacon(fc)) {
3815 title = "Beacon";
3816 print_dump = 1; /* dump frame contents */
3817 } else if (ieee80211_is_atim(fc))
3818 title = "ATIM";
3819 else if (ieee80211_is_auth(fc))
3820 title = "Auth";
3821 else if (ieee80211_is_deauth(fc))
3822 title = "DeAuth";
3823 else if (ieee80211_is_disassoc(fc))
3824 title = "DisAssoc";
3825 else
3826 title = "Frame";
3827
3828 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
3829 if (unlikely(rate_idx == -1))
3830 bitrate = 0;
3831 else
3832 bitrate = iwl4965_rates[rate_idx].ieee / 2;
3833
3834 /* print frame summary.
3835 * MAC addresses show just the last byte (for brevity),
3836 * but you can hack it to show more, if you'd like to. */
3837 if (dataframe)
3838 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
3839 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
3840 title, fc, header->addr1[5],
3841 length, rssi, channel, bitrate);
3842 else {
3843 /* src/dst addresses assume managed mode */
3844 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
3845 "src=0x%02x, rssi=%u, tim=%lu usec, "
3846 "phy=0x%02x, chnl=%d\n",
3847 title, fc, header->addr1[5],
3848 header->addr3[5], rssi,
3849 tsf_low - priv->scan_start_tsf,
3850 phy_flags, channel);
3851 }
3852 }
3853 if (print_dump)
3854 iwl_print_hex_dump(IWL_DL_RX, data, length);
3855 }
3856 #else
3857 static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
3858 struct iwl4965_rx_packet *pkt,
3859 struct ieee80211_hdr *header,
3860 int group100)
3861 {
3862 }
3863 #endif
3864
3865
3866 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
3867
3868 /* Called for REPLY_RX (legacy ABG frames), or
3869 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
3870 static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
3871 struct iwl4965_rx_mem_buffer *rxb)
3872 {
3873 struct ieee80211_hdr *header;
3874 struct ieee80211_rx_status rx_status;
3875 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3876 /* Use phy data (Rx signal strength, etc.) contained within
3877 * this rx packet for legacy frames,
3878 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
3879 int include_phy = (pkt->hdr.cmd == REPLY_RX);
3880 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3881 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
3882 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3883 __le32 *rx_end;
3884 unsigned int len = 0;
3885 u16 fc;
3886 u8 network_packet;
3887
3888 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
3889 rx_status.freq = ieee80211chan2mhz(le16_to_cpu(rx_start->channel));
3890 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
3891 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
3892 rx_status.rate_idx = iwl4965_hwrate_to_plcp_idx(
3893 le32_to_cpu(rx_start->rate_n_flags));
3894
3895 if (rx_status.band == IEEE80211_BAND_5GHZ)
3896 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
3897
3898 rx_status.antenna = 0;
3899 rx_status.flag = 0;
3900
3901 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
3902 IWL_DEBUG_DROP
3903 ("dsp size out of range [0,20]: "
3904 "%d/n", rx_start->cfg_phy_cnt);
3905 return;
3906 }
3907
3908 if (!include_phy) {
3909 if (priv->last_phy_res[0])
3910 rx_start = (struct iwl4965_rx_phy_res *)
3911 &priv->last_phy_res[1];
3912 else
3913 rx_start = NULL;
3914 }
3915
3916 if (!rx_start) {
3917 IWL_ERROR("MPDU frame without a PHY data\n");
3918 return;
3919 }
3920
3921 if (include_phy) {
3922 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
3923 + rx_start->cfg_phy_cnt);
3924
3925 len = le16_to_cpu(rx_start->byte_count);
3926 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
3927 sizeof(struct iwl4965_rx_phy_res) + len);
3928 } else {
3929 struct iwl4965_rx_mpdu_res_start *amsdu =
3930 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3931
3932 header = (void *)(pkt->u.raw +
3933 sizeof(struct iwl4965_rx_mpdu_res_start));
3934 len = le16_to_cpu(amsdu->byte_count);
3935 rx_end = (__le32 *) (pkt->u.raw +
3936 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
3937 }
3938
3939 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
3940 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
3941 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
3942 le32_to_cpu(*rx_end));
3943 return;
3944 }
3945
3946 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
3947
3948 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
3949 rx_status.ssi = iwl4965_calc_rssi(rx_start);
3950
3951 /* Meaningful noise values are available only from beacon statistics,
3952 * which are gathered only when associated, and indicate noise
3953 * only for the associated network channel ...
3954 * Ignore these noise values while scanning (other channels) */
3955 if (iwl4965_is_associated(priv) &&
3956 !test_bit(STATUS_SCANNING, &priv->status)) {
3957 rx_status.noise = priv->last_rx_noise;
3958 rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi,
3959 rx_status.noise);
3960 } else {
3961 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3962 rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi, 0);
3963 }
3964
3965 /* Reset beacon noise level if not associated. */
3966 if (!iwl4965_is_associated(priv))
3967 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3968
3969 /* Set "1" to report good data frames in groups of 100 */
3970 /* FIXME: need to optimze the call: */
3971 iwl4965_dbg_report_frame(priv, pkt, header, 1);
3972
3973 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
3974 rx_status.ssi, rx_status.noise, rx_status.signal,
3975 rx_status.mactime);
3976
3977 network_packet = iwl4965_is_network_packet(priv, header);
3978 if (network_packet) {
3979 priv->last_rx_rssi = rx_status.ssi;
3980 priv->last_beacon_time = priv->ucode_beacon_time;
3981 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
3982 }
3983
3984 fc = le16_to_cpu(header->frame_control);
3985 switch (fc & IEEE80211_FCTL_FTYPE) {
3986 case IEEE80211_FTYPE_MGMT:
3987
3988 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3989 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3990 header->addr2);
3991 switch (fc & IEEE80211_FCTL_STYPE) {
3992 case IEEE80211_STYPE_PROBE_RESP:
3993 case IEEE80211_STYPE_BEACON:
3994 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA &&
3995 !compare_ether_addr(header->addr2, priv->bssid)) ||
3996 (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
3997 !compare_ether_addr(header->addr3, priv->bssid))) {
3998 struct ieee80211_mgmt *mgmt =
3999 (struct ieee80211_mgmt *)header;
4000 u64 timestamp =
4001 le64_to_cpu(mgmt->u.beacon.timestamp);
4002
4003 priv->timestamp0 = timestamp & 0xFFFFFFFF;
4004 priv->timestamp1 =
4005 (timestamp >> 32) & 0xFFFFFFFF;
4006 priv->beacon_int = le16_to_cpu(
4007 mgmt->u.beacon.beacon_int);
4008 if (priv->call_post_assoc_from_beacon &&
4009 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
4010 priv->call_post_assoc_from_beacon = 0;
4011 queue_work(priv->workqueue,
4012 &priv->post_associate.work);
4013 }
4014 }
4015 break;
4016
4017 case IEEE80211_STYPE_ACTION:
4018 break;
4019
4020 /*
4021 * TODO: Use the new callback function from
4022 * mac80211 instead of sniffing these packets.
4023 */
4024 case IEEE80211_STYPE_ASSOC_RESP:
4025 case IEEE80211_STYPE_REASSOC_RESP:
4026 if (network_packet) {
4027 #ifdef CONFIG_IWL4965_HT
4028 u8 *pos = NULL;
4029 struct ieee802_11_elems elems;
4030 #endif /*CONFIG_IWL4965_HT */
4031 struct ieee80211_mgmt *mgnt =
4032 (struct ieee80211_mgmt *)header;
4033
4034 /* We have just associated, give some
4035 * time for the 4-way handshake if
4036 * any. Don't start scan too early. */
4037 priv->next_scan_jiffies = jiffies +
4038 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
4039
4040 priv->assoc_id = (~((1 << 15) | (1 << 14))
4041 & le16_to_cpu(mgnt->u.assoc_resp.aid));
4042 priv->assoc_capability =
4043 le16_to_cpu(
4044 mgnt->u.assoc_resp.capab_info);
4045 #ifdef CONFIG_IWL4965_HT
4046 pos = mgnt->u.assoc_resp.variable;
4047 if (!parse_elems(pos,
4048 len - (pos - (u8 *) mgnt),
4049 &elems)) {
4050 if (elems.ht_extra_param &&
4051 elems.ht_cap_param)
4052 break;
4053 }
4054 #endif /*CONFIG_IWL4965_HT */
4055 /* assoc_id is 0 no association */
4056 if (!priv->assoc_id)
4057 break;
4058 if (priv->beacon_int)
4059 queue_work(priv->workqueue,
4060 &priv->post_associate.work);
4061 else
4062 priv->call_post_assoc_from_beacon = 1;
4063 }
4064
4065 break;
4066
4067 case IEEE80211_STYPE_PROBE_REQ:
4068 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
4069 !iwl4965_is_associated(priv)) {
4070 DECLARE_MAC_BUF(mac1);
4071 DECLARE_MAC_BUF(mac2);
4072 DECLARE_MAC_BUF(mac3);
4073
4074 IWL_DEBUG_DROP("Dropping (non network): "
4075 "%s, %s, %s\n",
4076 print_mac(mac1, header->addr1),
4077 print_mac(mac2, header->addr2),
4078 print_mac(mac3, header->addr3));
4079 return;
4080 }
4081 }
4082 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
4083 break;
4084
4085 case IEEE80211_FTYPE_CTL:
4086 #ifdef CONFIG_IWL4965_HT
4087 switch (fc & IEEE80211_FCTL_STYPE) {
4088 case IEEE80211_STYPE_BACK_REQ:
4089 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
4090 iwl4965_handle_data_packet(priv, 0, include_phy,
4091 rxb, &rx_status);
4092 break;
4093 default:
4094 break;
4095 }
4096 #endif
4097 break;
4098
4099 case IEEE80211_FTYPE_DATA: {
4100 DECLARE_MAC_BUF(mac1);
4101 DECLARE_MAC_BUF(mac2);
4102 DECLARE_MAC_BUF(mac3);
4103
4104 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
4105 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
4106 header->addr2);
4107
4108 if (unlikely(!network_packet))
4109 IWL_DEBUG_DROP("Dropping (non network): "
4110 "%s, %s, %s\n",
4111 print_mac(mac1, header->addr1),
4112 print_mac(mac2, header->addr2),
4113 print_mac(mac3, header->addr3));
4114 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
4115 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
4116 print_mac(mac1, header->addr1),
4117 print_mac(mac2, header->addr2),
4118 print_mac(mac3, header->addr3));
4119 else
4120 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
4121 &rx_status);
4122 break;
4123 }
4124 default:
4125 break;
4126
4127 }
4128 }
4129
4130 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
4131 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
4132 static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
4133 struct iwl4965_rx_mem_buffer *rxb)
4134 {
4135 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4136 priv->last_phy_res[0] = 1;
4137 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
4138 sizeof(struct iwl4965_rx_phy_res));
4139 }
4140
4141 static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
4142 struct iwl4965_rx_mem_buffer *rxb)
4143
4144 {
4145 #ifdef CONFIG_IWL4965_SENSITIVITY
4146 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4147 struct iwl4965_missed_beacon_notif *missed_beacon;
4148
4149 missed_beacon = &pkt->u.missed_beacon;
4150 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
4151 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
4152 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
4153 le32_to_cpu(missed_beacon->total_missed_becons),
4154 le32_to_cpu(missed_beacon->num_recvd_beacons),
4155 le32_to_cpu(missed_beacon->num_expected_beacons));
4156 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
4157 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)))
4158 queue_work(priv->workqueue, &priv->sensitivity_work);
4159 }
4160 #endif /*CONFIG_IWL4965_SENSITIVITY*/
4161 }
4162
4163 #ifdef CONFIG_IWL4965_HT
4164
4165 /**
4166 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
4167 */
4168 static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv,
4169 int sta_id, int tid)
4170 {
4171 unsigned long flags;
4172
4173 /* Remove "disable" flag, to enable Tx for this TID */
4174 spin_lock_irqsave(&priv->sta_lock, flags);
4175 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
4176 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
4177 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4178 spin_unlock_irqrestore(&priv->sta_lock, flags);
4179
4180 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4181 }
4182
4183 /**
4184 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
4185 *
4186 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
4187 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
4188 */
4189 static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
4190 struct iwl4965_ht_agg *agg,
4191 struct iwl4965_compressed_ba_resp*
4192 ba_resp)
4193
4194 {
4195 int i, sh, ack;
4196 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
4197 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
4198 u64 bitmap;
4199 int successes = 0;
4200 struct ieee80211_tx_status *tx_status;
4201
4202 if (unlikely(!agg->wait_for_ba)) {
4203 IWL_ERROR("Received BA when not expected\n");
4204 return -EINVAL;
4205 }
4206
4207 /* Mark that the expected block-ack response arrived */
4208 agg->wait_for_ba = 0;
4209 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
4210
4211 /* Calculate shift to align block-ack bits with our Tx window bits */
4212 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
4213 if (sh < 0) /* tbw something is wrong with indices */
4214 sh += 0x100;
4215
4216 /* don't use 64-bit values for now */
4217 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
4218
4219 if (agg->frame_count > (64 - sh)) {
4220 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
4221 return -1;
4222 }
4223
4224 /* check for success or failure according to the
4225 * transmitted bitmap and block-ack bitmap */
4226 bitmap &= agg->bitmap;
4227
4228 /* For each frame attempted in aggregation,
4229 * update driver's record of tx frame's status. */
4230 for (i = 0; i < agg->frame_count ; i++) {
4231 ack = bitmap & (1 << i);
4232 successes += !!ack;
4233 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
4234 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
4235 agg->start_idx + i);
4236 }
4237
4238 tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
4239 tx_status->flags = IEEE80211_TX_STATUS_ACK;
4240 tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
4241 tx_status->ampdu_ack_map = successes;
4242 tx_status->ampdu_ack_len = agg->frame_count;
4243 iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags,
4244 &tx_status->control);
4245
4246 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
4247
4248 return 0;
4249 }
4250
4251 /**
4252 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
4253 */
4254 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
4255 u16 txq_id)
4256 {
4257 /* Simply stop the queue, but don't change any configuration;
4258 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
4259 iwl_write_prph(priv,
4260 KDR_SCD_QUEUE_STATUS_BITS(txq_id),
4261 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
4262 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
4263 }
4264
4265 /**
4266 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
4267 * priv->lock must be held by the caller
4268 */
4269 static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
4270 u16 ssn_idx, u8 tx_fifo)
4271 {
4272 int ret = 0;
4273
4274 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
4275 IWL_WARNING("queue number too small: %d, must be > %d\n",
4276 txq_id, IWL_BACK_QUEUE_FIRST_ID);
4277 return -EINVAL;
4278 }
4279
4280 ret = iwl_grab_nic_access(priv);
4281 if (ret)
4282 return ret;
4283
4284 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
4285
4286 iwl_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
4287
4288 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
4289 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
4290 /* supposes that ssn_idx is valid (!= 0xFFF) */
4291 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4292
4293 iwl_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
4294 iwl4965_txq_ctx_deactivate(priv, txq_id);
4295 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
4296
4297 iwl_release_nic_access(priv);
4298
4299 return 0;
4300 }
4301
4302 int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
4303 u8 tid, int txq_id)
4304 {
4305 struct iwl4965_queue *q = &priv->txq[txq_id].q;
4306 u8 *addr = priv->stations[sta_id].sta.sta.addr;
4307 struct iwl4965_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
4308
4309 switch (priv->stations[sta_id].tid[tid].agg.state) {
4310 case IWL_EMPTYING_HW_QUEUE_DELBA:
4311 /* We are reclaiming the last packet of the */
4312 /* aggregated HW queue */
4313 if (txq_id == tid_data->agg.txq_id &&
4314 q->read_ptr == q->write_ptr) {
4315 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
4316 int tx_fifo = default_tid_to_tx_fifo[tid];
4317 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
4318 iwl4965_tx_queue_agg_disable(priv, txq_id,
4319 ssn, tx_fifo);
4320 tid_data->agg.state = IWL_AGG_OFF;
4321 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
4322 }
4323 break;
4324 case IWL_EMPTYING_HW_QUEUE_ADDBA:
4325 /* We are reclaiming the last packet of the queue */
4326 if (tid_data->tfds_in_queue == 0) {
4327 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
4328 tid_data->agg.state = IWL_AGG_ON;
4329 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
4330 }
4331 break;
4332 }
4333 return 0;
4334 }
4335
4336 /**
4337 * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
4338 * @index -- current index
4339 * @n_bd -- total number of entries in queue (s/b power of 2)
4340 */
4341 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
4342 {
4343 return (index == 0) ? n_bd - 1 : index - 1;
4344 }
4345
4346 /**
4347 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
4348 *
4349 * Handles block-acknowledge notification from device, which reports success
4350 * of frames sent via aggregation.
4351 */
4352 static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
4353 struct iwl4965_rx_mem_buffer *rxb)
4354 {
4355 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4356 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
4357 int index;
4358 struct iwl4965_tx_queue *txq = NULL;
4359 struct iwl4965_ht_agg *agg;
4360 DECLARE_MAC_BUF(mac);
4361
4362 /* "flow" corresponds to Tx queue */
4363 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
4364
4365 /* "ssn" is start of block-ack Tx window, corresponds to index
4366 * (in Tx queue's circular buffer) of first TFD/frame in window */
4367 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
4368
4369 if (scd_flow >= ARRAY_SIZE(priv->txq)) {
4370 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
4371 return;
4372 }
4373
4374 txq = &priv->txq[scd_flow];
4375 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
4376
4377 /* Find index just before block-ack window */
4378 index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
4379
4380 /* TODO: Need to get this copy more safely - now good for debug */
4381
4382 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
4383 "sta_id = %d\n",
4384 agg->wait_for_ba,
4385 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
4386 ba_resp->sta_id);
4387 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
4388 "%d, scd_ssn = %d\n",
4389 ba_resp->tid,
4390 ba_resp->seq_ctl,
4391 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
4392 ba_resp->scd_flow,
4393 ba_resp->scd_ssn);
4394 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
4395 agg->start_idx,
4396 (unsigned long long)agg->bitmap);
4397
4398 /* Update driver's record of ACK vs. not for each frame in window */
4399 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
4400
4401 /* Release all TFDs before the SSN, i.e. all TFDs in front of
4402 * block-ack window (we assume that they've been successfully
4403 * transmitted ... if not, it's too late anyway). */
4404 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
4405 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
4406 priv->stations[ba_resp->sta_id].
4407 tid[ba_resp->tid].tfds_in_queue -= freed;
4408 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
4409 priv->mac80211_registered &&
4410 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
4411 ieee80211_wake_queue(priv->hw, scd_flow);
4412 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
4413 ba_resp->tid, scd_flow);
4414 }
4415 }
4416
4417 /**
4418 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
4419 */
4420 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
4421 u16 txq_id)
4422 {
4423 u32 tbl_dw_addr;
4424 u32 tbl_dw;
4425 u16 scd_q2ratid;
4426
4427 scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
4428
4429 tbl_dw_addr = priv->scd_base_addr +
4430 SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
4431
4432 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
4433
4434 if (txq_id & 0x1)
4435 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
4436 else
4437 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
4438
4439 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
4440
4441 return 0;
4442 }
4443
4444
4445 /**
4446 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
4447 *
4448 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
4449 * i.e. it must be one of the higher queues used for aggregation
4450 */
4451 static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
4452 int tx_fifo, int sta_id, int tid,
4453 u16 ssn_idx)
4454 {
4455 unsigned long flags;
4456 int rc;
4457 u16 ra_tid;
4458
4459 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
4460 IWL_WARNING("queue number too small: %d, must be > %d\n",
4461 txq_id, IWL_BACK_QUEUE_FIRST_ID);
4462
4463 ra_tid = BUILD_RAxTID(sta_id, tid);
4464
4465 /* Modify device's station table to Tx this TID */
4466 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
4467
4468 spin_lock_irqsave(&priv->lock, flags);
4469 rc = iwl_grab_nic_access(priv);
4470 if (rc) {
4471 spin_unlock_irqrestore(&priv->lock, flags);
4472 return rc;
4473 }
4474
4475 /* Stop this Tx queue before configuring it */
4476 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
4477
4478 /* Map receiver-address / traffic-ID to this queue */
4479 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
4480
4481 /* Set this queue as a chain-building queue */
4482 iwl_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
4483
4484 /* Place first TFD at index corresponding to start sequence number.
4485 * Assumes that ssn_idx is valid (!= 0xFFF) */
4486 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
4487 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
4488 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4489
4490 /* Set up Tx window size and frame limit for this queue */
4491 iwl_write_targ_mem(priv,
4492 priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
4493 (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
4494 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
4495
4496 iwl_write_targ_mem(priv, priv->scd_base_addr +
4497 SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
4498 (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
4499 & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
4500
4501 iwl_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
4502
4503 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
4504 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
4505
4506 iwl_release_nic_access(priv);
4507 spin_unlock_irqrestore(&priv->lock, flags);
4508
4509 return 0;
4510 }
4511
4512 #endif /* CONFIG_IWL4965_HT */
4513
4514 /**
4515 * iwl4965_add_station - Initialize a station's hardware rate table
4516 *
4517 * The uCode's station table contains a table of fallback rates
4518 * for automatic fallback during transmission.
4519 *
4520 * NOTE: This sets up a default set of values. These will be replaced later
4521 * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
4522 * rc80211_simple.
4523 *
4524 * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
4525 * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
4526 * which requires station table entry to exist).
4527 */
4528 void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
4529 {
4530 int i, r;
4531 struct iwl4965_link_quality_cmd link_cmd = {
4532 .reserved1 = 0,
4533 };
4534 u16 rate_flags;
4535
4536 /* Set up the rate scaling to start at selected rate, fall back
4537 * all the way down to 1M in IEEE order, and then spin on 1M */
4538 if (is_ap)
4539 r = IWL_RATE_54M_INDEX;
4540 else if (priv->band == IEEE80211_BAND_5GHZ)
4541 r = IWL_RATE_6M_INDEX;
4542 else
4543 r = IWL_RATE_1M_INDEX;
4544
4545 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
4546 rate_flags = 0;
4547 if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
4548 rate_flags |= RATE_MCS_CCK_MSK;
4549
4550 /* Use Tx antenna B only */
4551 rate_flags |= RATE_MCS_ANT_B_MSK;
4552 rate_flags &= ~RATE_MCS_ANT_A_MSK;
4553
4554 link_cmd.rs_table[i].rate_n_flags =
4555 iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
4556 r = iwl4965_get_prev_ieee_rate(r);
4557 }
4558
4559 link_cmd.general_params.single_stream_ant_msk = 2;
4560 link_cmd.general_params.dual_stream_ant_msk = 3;
4561 link_cmd.agg_params.agg_dis_start_th = 3;
4562 link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
4563
4564 /* Update the rate scaling for control frame Tx to AP */
4565 link_cmd.sta_id = is_ap ? IWL_AP_ID : priv->hw_setting.bcast_sta_id;
4566
4567 iwl_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd),
4568 &link_cmd);
4569 }
4570
4571 #ifdef CONFIG_IWL4965_HT
4572
4573 static u8 iwl4965_is_channel_extension(struct iwl_priv *priv,
4574 enum ieee80211_band band,
4575 u16 channel, u8 extension_chan_offset)
4576 {
4577 const struct iwl_channel_info *ch_info;
4578
4579 ch_info = iwl_get_channel_info(priv, band, channel);
4580 if (!is_channel_valid(ch_info))
4581 return 0;
4582
4583 if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE)
4584 return 0;
4585
4586 if ((ch_info->fat_extension_channel == extension_chan_offset) ||
4587 (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX))
4588 return 1;
4589
4590 return 0;
4591 }
4592
4593 static u8 iwl4965_is_fat_tx_allowed(struct iwl_priv *priv,
4594 struct ieee80211_ht_info *sta_ht_inf)
4595 {
4596 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
4597
4598 if ((!iwl_ht_conf->is_ht) ||
4599 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
4600 (iwl_ht_conf->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE))
4601 return 0;
4602
4603 if (sta_ht_inf) {
4604 if ((!sta_ht_inf->ht_supported) ||
4605 (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH)))
4606 return 0;
4607 }
4608
4609 return (iwl4965_is_channel_extension(priv, priv->band,
4610 iwl_ht_conf->control_channel,
4611 iwl_ht_conf->extension_chan_offset));
4612 }
4613
4614 void iwl4965_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
4615 {
4616 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
4617 u32 val;
4618
4619 if (!ht_info->is_ht)
4620 return;
4621
4622 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
4623 if (iwl4965_is_fat_tx_allowed(priv, NULL))
4624 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4625 else
4626 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
4627 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
4628
4629 if (le16_to_cpu(rxon->channel) != ht_info->control_channel) {
4630 IWL_DEBUG_ASSOC("control diff than current %d %d\n",
4631 le16_to_cpu(rxon->channel),
4632 ht_info->control_channel);
4633 rxon->channel = cpu_to_le16(ht_info->control_channel);
4634 return;
4635 }
4636
4637 /* Note: control channel is opposite of extension channel */
4638 switch (ht_info->extension_chan_offset) {
4639 case IWL_EXT_CHANNEL_OFFSET_ABOVE:
4640 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
4641 break;
4642 case IWL_EXT_CHANNEL_OFFSET_BELOW:
4643 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
4644 break;
4645 case IWL_EXT_CHANNEL_OFFSET_NONE:
4646 default:
4647 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4648 break;
4649 }
4650
4651 val = ht_info->ht_protection;
4652
4653 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
4654
4655 iwl4965_set_rxon_chain(priv);
4656
4657 IWL_DEBUG_ASSOC("supported HT rate 0x%X %X "
4658 "rxon flags 0x%X operation mode :0x%X "
4659 "extension channel offset 0x%x "
4660 "control chan %d\n",
4661 ht_info->supp_mcs_set[0], ht_info->supp_mcs_set[1],
4662 le32_to_cpu(rxon->flags), ht_info->ht_protection,
4663 ht_info->extension_chan_offset,
4664 ht_info->control_channel);
4665 return;
4666 }
4667
4668 void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index,
4669 struct ieee80211_ht_info *sta_ht_inf)
4670 {
4671 __le32 sta_flags;
4672 u8 mimo_ps_mode;
4673
4674 if (!sta_ht_inf || !sta_ht_inf->ht_supported)
4675 goto done;
4676
4677 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
4678
4679 sta_flags = priv->stations[index].sta.station_flags;
4680
4681 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
4682
4683 switch (mimo_ps_mode) {
4684 case WLAN_HT_CAP_MIMO_PS_STATIC:
4685 sta_flags |= STA_FLG_MIMO_DIS_MSK;
4686 break;
4687 case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
4688 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
4689 break;
4690 case WLAN_HT_CAP_MIMO_PS_DISABLED:
4691 break;
4692 default:
4693 IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
4694 break;
4695 }
4696
4697 sta_flags |= cpu_to_le32(
4698 (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
4699
4700 sta_flags |= cpu_to_le32(
4701 (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
4702
4703 if (iwl4965_is_fat_tx_allowed(priv, sta_ht_inf))
4704 sta_flags |= STA_FLG_FAT_EN_MSK;
4705 else
4706 sta_flags &= ~STA_FLG_FAT_EN_MSK;
4707
4708 priv->stations[index].sta.station_flags = sta_flags;
4709 done:
4710 return;
4711 }
4712
4713 static void iwl4965_sta_modify_add_ba_tid(struct iwl_priv *priv,
4714 int sta_id, int tid, u16 ssn)
4715 {
4716 unsigned long flags;
4717
4718 spin_lock_irqsave(&priv->sta_lock, flags);
4719 priv->stations[sta_id].sta.station_flags_msk = 0;
4720 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
4721 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
4722 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
4723 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4724 spin_unlock_irqrestore(&priv->sta_lock, flags);
4725
4726 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4727 }
4728
4729 static void iwl4965_sta_modify_del_ba_tid(struct iwl_priv *priv,
4730 int sta_id, int tid)
4731 {
4732 unsigned long flags;
4733
4734 spin_lock_irqsave(&priv->sta_lock, flags);
4735 priv->stations[sta_id].sta.station_flags_msk = 0;
4736 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
4737 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
4738 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4739 spin_unlock_irqrestore(&priv->sta_lock, flags);
4740
4741 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4742 }
4743
4744 /*
4745 * Find first available (lowest unused) Tx Queue, mark it "active".
4746 * Called only when finding queue for aggregation.
4747 * Should never return anything < 7, because they should already
4748 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
4749 */
4750 static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv)
4751 {
4752 int txq_id;
4753
4754 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
4755 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
4756 return txq_id;
4757 return -1;
4758 }
4759
4760 static int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, const u8 *da,
4761 u16 tid, u16 *start_seq_num)
4762 {
4763 struct iwl_priv *priv = hw->priv;
4764 int sta_id;
4765 int tx_fifo;
4766 int txq_id;
4767 int ssn = -1;
4768 int ret = 0;
4769 unsigned long flags;
4770 struct iwl4965_tid_data *tid_data;
4771 DECLARE_MAC_BUF(mac);
4772
4773 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4774 tx_fifo = default_tid_to_tx_fifo[tid];
4775 else
4776 return -EINVAL;
4777
4778 IWL_WARNING("%s on da = %s tid = %d\n",
4779 __func__, print_mac(mac, da), tid);
4780
4781 sta_id = iwl4965_hw_find_station(priv, da);
4782 if (sta_id == IWL_INVALID_STATION)
4783 return -ENXIO;
4784
4785 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
4786 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
4787 return -ENXIO;
4788 }
4789
4790 txq_id = iwl4965_txq_ctx_activate_free(priv);
4791 if (txq_id == -1)
4792 return -ENXIO;
4793
4794 spin_lock_irqsave(&priv->sta_lock, flags);
4795 tid_data = &priv->stations[sta_id].tid[tid];
4796 ssn = SEQ_TO_SN(tid_data->seq_number);
4797 tid_data->agg.txq_id = txq_id;
4798 spin_unlock_irqrestore(&priv->sta_lock, flags);
4799
4800 *start_seq_num = ssn;
4801 ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
4802 sta_id, tid, ssn);
4803 if (ret)
4804 return ret;
4805
4806 ret = 0;
4807 if (tid_data->tfds_in_queue == 0) {
4808 printk(KERN_ERR "HW queue is empty\n");
4809 tid_data->agg.state = IWL_AGG_ON;
4810 ieee80211_start_tx_ba_cb_irqsafe(hw, da, tid);
4811 } else {
4812 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
4813 tid_data->tfds_in_queue);
4814 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
4815 }
4816 return ret;
4817 }
4818
4819 static int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, const u8 *da,
4820 u16 tid)
4821 {
4822
4823 struct iwl_priv *priv = hw->priv;
4824 int tx_fifo_id, txq_id, sta_id, ssn = -1;
4825 struct iwl4965_tid_data *tid_data;
4826 int ret, write_ptr, read_ptr;
4827 unsigned long flags;
4828 DECLARE_MAC_BUF(mac);
4829
4830 if (!da) {
4831 IWL_ERROR("da = NULL\n");
4832 return -EINVAL;
4833 }
4834
4835 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4836 tx_fifo_id = default_tid_to_tx_fifo[tid];
4837 else
4838 return -EINVAL;
4839
4840 sta_id = iwl4965_hw_find_station(priv, da);
4841
4842 if (sta_id == IWL_INVALID_STATION)
4843 return -ENXIO;
4844
4845 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
4846 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
4847
4848 tid_data = &priv->stations[sta_id].tid[tid];
4849 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
4850 txq_id = tid_data->agg.txq_id;
4851 write_ptr = priv->txq[txq_id].q.write_ptr;
4852 read_ptr = priv->txq[txq_id].q.read_ptr;
4853
4854 /* The queue is not empty */
4855 if (write_ptr != read_ptr) {
4856 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
4857 priv->stations[sta_id].tid[tid].agg.state =
4858 IWL_EMPTYING_HW_QUEUE_DELBA;
4859 return 0;
4860 }
4861
4862 IWL_DEBUG_HT("HW queue empty\n");;
4863 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
4864
4865 spin_lock_irqsave(&priv->lock, flags);
4866 ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
4867 spin_unlock_irqrestore(&priv->lock, flags);
4868
4869 if (ret)
4870 return ret;
4871
4872 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, da, tid);
4873
4874 IWL_DEBUG_INFO("iwl4965_mac_ht_tx_agg_stop on da=%s tid=%d\n",
4875 print_mac(mac, da), tid);
4876
4877 return 0;
4878 }
4879
4880 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
4881 enum ieee80211_ampdu_mlme_action action,
4882 const u8 *addr, u16 tid, u16 *ssn)
4883 {
4884 struct iwl_priv *priv = hw->priv;
4885 int sta_id;
4886 DECLARE_MAC_BUF(mac);
4887
4888 IWL_DEBUG_HT("A-MPDU action on da=%s tid=%d ",
4889 print_mac(mac, addr), tid);
4890 sta_id = iwl4965_hw_find_station(priv, addr);
4891 switch (action) {
4892 case IEEE80211_AMPDU_RX_START:
4893 IWL_DEBUG_HT("start Rx\n");
4894 iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, *ssn);
4895 break;
4896 case IEEE80211_AMPDU_RX_STOP:
4897 IWL_DEBUG_HT("stop Rx\n");
4898 iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
4899 break;
4900 case IEEE80211_AMPDU_TX_START:
4901 IWL_DEBUG_HT("start Tx\n");
4902 return iwl4965_mac_ht_tx_agg_start(hw, addr, tid, ssn);
4903 case IEEE80211_AMPDU_TX_STOP:
4904 IWL_DEBUG_HT("stop Tx\n");
4905 return iwl4965_mac_ht_tx_agg_stop(hw, addr, tid);
4906 default:
4907 IWL_DEBUG_HT("unknown\n");
4908 return -EINVAL;
4909 break;
4910 }
4911 return 0;
4912 }
4913
4914 #endif /* CONFIG_IWL4965_HT */
4915
4916 /* Set up 4965-specific Rx frame reply handlers */
4917 void iwl4965_hw_rx_handler_setup(struct iwl_priv *priv)
4918 {
4919 /* Legacy Rx frames */
4920 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
4921
4922 /* High-throughput (HT) Rx frames */
4923 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
4924 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
4925
4926 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
4927 iwl4965_rx_missed_beacon_notif;
4928
4929 #ifdef CONFIG_IWL4965_HT
4930 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
4931 #endif /* CONFIG_IWL4965_HT */
4932 }
4933
4934 void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
4935 {
4936 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
4937 INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work);
4938 #ifdef CONFIG_IWL4965_SENSITIVITY
4939 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
4940 #endif
4941 init_timer(&priv->statistics_periodic);
4942 priv->statistics_periodic.data = (unsigned long)priv;
4943 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
4944 }
4945
4946 void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
4947 {
4948 del_timer_sync(&priv->statistics_periodic);
4949
4950 cancel_delayed_work(&priv->init_alive_start);
4951 }
4952
4953 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
4954 .enqueue_hcmd = iwl4965_enqueue_hcmd,
4955 };
4956
4957 static struct iwl_lib_ops iwl4965_lib = {
4958 .init_drv = iwl4965_init_drv,
4959 .eeprom_ops = {
4960 .verify_signature = iwlcore_eeprom_verify_signature,
4961 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
4962 .release_semaphore = iwlcore_eeprom_release_semaphore,
4963 },
4964 };
4965
4966 static struct iwl_ops iwl4965_ops = {
4967 .lib = &iwl4965_lib,
4968 .utils = &iwl4965_hcmd_utils,
4969 };
4970
4971 static struct iwl_cfg iwl4965_agn_cfg = {
4972 .name = "4965AGN",
4973 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
4974 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
4975 .ops = &iwl4965_ops,
4976 .mod_params = &iwl4965_mod_params,
4977 };
4978
4979 struct pci_device_id iwl4965_hw_card_ids[] = {
4980 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4981 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4982 {0}
4983 };
4984
4985 MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);
4986
4987 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
4988 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4989 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
4990 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
4991 module_param_named(hwcrypto, iwl4965_mod_params.hw_crypto, int, 0444);
4992 MODULE_PARM_DESC(hwcrypto,
4993 "using hardware crypto engine (default 0 [software])\n");
4994 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
4995 MODULE_PARM_DESC(debug, "debug output mask");
4996 module_param_named(
4997 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
4998 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4999
5000 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
5001 MODULE_PARM_DESC(queues_num, "number of hw queues.");
5002
5003 /* QoS */
5004 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
5005 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
5006 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
5007 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
5008
Linux kernel - Deliverables
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