drivers/net/wireless/iwlwifi/iwl-5000.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  23  *
  24  *****************************************************************************/
  25
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/pci.h>
  30 #include <linux/dma-mapping.h>
  31 #include <linux/delay.h>
  32 #include <linux/sched.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-sta.h"
  45 #include "iwl-helpers.h"
  46 #include "iwl-agn.h"
  47 #include "iwl-agn-led.h"
  48 #include "iwl-agn-hw.h"
  49 #include "iwl-5000-hw.h"
  50 #include "iwl-6000-hw.h"
  51
  52 /* Highest firmware API version supported */
  53 #define IWL5000_UCODE_API_MAX 2
  54 #define IWL5150_UCODE_API_MAX 2
  55
  56 /* Lowest firmware API version supported */
  57 #define IWL5000_UCODE_API_MIN 1
  58 #define IWL5150_UCODE_API_MIN 1
  59
  60 #define IWL5000_FW_PRE "iwlwifi-5000-"
  61 #define _IWL5000_MODULE_FIRMWARE(api) IWL5000_FW_PRE #api ".ucode"
  62 #define IWL5000_MODULE_FIRMWARE(api) _IWL5000_MODULE_FIRMWARE(api)
  63
  64 #define IWL5150_FW_PRE "iwlwifi-5150-"
  65 #define _IWL5150_MODULE_FIRMWARE(api) IWL5150_FW_PRE #api ".ucode"
  66 #define IWL5150_MODULE_FIRMWARE(api) _IWL5150_MODULE_FIRMWARE(api)
  67
  68 /* NIC configuration for 5000 series */
  69 void iwl5000_nic_config(struct iwl_priv *priv)
  70 {
  71         unsigned long flags;
  72         u16 radio_cfg;
  73
  74         spin_lock_irqsave(&priv->lock, flags);
  75
  76         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
  77
  78         /* write radio config values to register */
  79         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) < EEPROM_RF_CONFIG_TYPE_MAX)
  80                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  81                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
  82                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
  83                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
  84
  85         /* set CSR_HW_CONFIG_REG for uCode use */
  86         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  87                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
  88                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
  89
  90         /* W/A : NIC is stuck in a reset state after Early PCIe power off
  91          * (PCIe power is lost before PERST# is asserted),
  92          * causing ME FW to lose ownership and not being able to obtain it back.
  93          */
  94         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  95                                 APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
  96                                 ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
  97
  98
  99         spin_unlock_irqrestore(&priv->lock, flags);
 100 }
 101
 102
 103 /*
 104  * EEPROM
 105  */
 106 static u32 eeprom_indirect_address(const struct iwl_priv *priv, u32 address)
 107 {
 108         u16 offset = 0;
 109
 110         if ((address & INDIRECT_ADDRESS) == 0)
 111                 return address;
 112
 113         switch (address & INDIRECT_TYPE_MSK) {
 114         case INDIRECT_HOST:
 115                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_HOST);
 116                 break;
 117         case INDIRECT_GENERAL:
 118                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_GENERAL);
 119                 break;
 120         case INDIRECT_REGULATORY:
 121                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_REGULATORY);
 122                 break;
 123         case INDIRECT_CALIBRATION:
 124                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_CALIBRATION);
 125                 break;
 126         case INDIRECT_PROCESS_ADJST:
 127                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_PROCESS_ADJST);
 128                 break;
 129         case INDIRECT_OTHERS:
 130                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_OTHERS);
 131                 break;
 132         default:
 133                 IWL_ERR(priv, "illegal indirect type: 0x%X\n",
 134                 address & INDIRECT_TYPE_MSK);
 135                 break;
 136         }
 137
 138         /* translate the offset from words to byte */
 139         return (address & ADDRESS_MSK) + (offset << 1);
 140 }
 141
 142 u16 iwl5000_eeprom_calib_version(struct iwl_priv *priv)
 143 {
 144         struct iwl_eeprom_calib_hdr {
 145                 u8 version;
 146                 u8 pa_type;
 147                 u16 voltage;
 148         } *hdr;
 149
 150         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
 151                                                         EEPROM_5000_CALIB_ALL);
 152         return hdr->version;
 153
 154 }
 155
 156 static struct iwl_sensitivity_ranges iwl5000_sensitivity = {
 157         .min_nrg_cck = 95,
 158         .max_nrg_cck = 0, /* not used, set to 0 */
 159         .auto_corr_min_ofdm = 90,
 160         .auto_corr_min_ofdm_mrc = 170,
 161         .auto_corr_min_ofdm_x1 = 120,
 162         .auto_corr_min_ofdm_mrc_x1 = 240,
 163
 164         .auto_corr_max_ofdm = 120,
 165         .auto_corr_max_ofdm_mrc = 210,
 166         .auto_corr_max_ofdm_x1 = 120,
 167         .auto_corr_max_ofdm_mrc_x1 = 240,
 168
 169         .auto_corr_min_cck = 125,
 170         .auto_corr_max_cck = 200,
 171         .auto_corr_min_cck_mrc = 170,
 172         .auto_corr_max_cck_mrc = 400,
 173         .nrg_th_cck = 95,
 174         .nrg_th_ofdm = 95,
 175
 176         .barker_corr_th_min = 190,
 177         .barker_corr_th_min_mrc = 390,
 178         .nrg_th_cca = 62,
 179 };
 180
 181 static struct iwl_sensitivity_ranges iwl5150_sensitivity = {
 182         .min_nrg_cck = 95,
 183         .max_nrg_cck = 0, /* not used, set to 0 */
 184         .auto_corr_min_ofdm = 90,
 185         .auto_corr_min_ofdm_mrc = 170,
 186         .auto_corr_min_ofdm_x1 = 105,
 187         .auto_corr_min_ofdm_mrc_x1 = 220,
 188
 189         .auto_corr_max_ofdm = 120,
 190         .auto_corr_max_ofdm_mrc = 210,
 191         /* max = min for performance bug in 5150 DSP */
 192         .auto_corr_max_ofdm_x1 = 105,
 193         .auto_corr_max_ofdm_mrc_x1 = 220,
 194
 195         .auto_corr_min_cck = 125,
 196         .auto_corr_max_cck = 200,
 197         .auto_corr_min_cck_mrc = 170,
 198         .auto_corr_max_cck_mrc = 400,
 199         .nrg_th_cck = 95,
 200         .nrg_th_ofdm = 95,
 201
 202         .barker_corr_th_min = 190,
 203         .barker_corr_th_min_mrc = 390,
 204         .nrg_th_cca = 62,
 205 };
 206
 207 const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
 208                                            size_t offset)
 209 {
 210         u32 address = eeprom_indirect_address(priv, offset);
 211         BUG_ON(address >= priv->cfg->eeprom_size);
 212         return &priv->eeprom[address];
 213 }
 214
 215 static void iwl5150_set_ct_threshold(struct iwl_priv *priv)
 216 {
 217         const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF;
 218         s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY) -
 219                         iwl_temp_calib_to_offset(priv);
 220
 221         priv->hw_params.ct_kill_threshold = threshold * volt2temp_coef;
 222 }
 223
 224 static void iwl5000_set_ct_threshold(struct iwl_priv *priv)
 225 {
 226         /* want Celsius */
 227         priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY;
 228 }
 229
 230 int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
 231 {
 232         if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
 233             priv->cfg->mod_params->num_of_queues <= IWLAGN_NUM_QUEUES)
 234                 priv->cfg->num_of_queues =
 235                         priv->cfg->mod_params->num_of_queues;
 236
 237         priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
 238         priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
 239         priv->hw_params.scd_bc_tbls_size =
 240                         priv->cfg->num_of_queues *
 241                         sizeof(struct iwlagn_scd_bc_tbl);
 242         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
 243         priv->hw_params.max_stations = IWL5000_STATION_COUNT;
 244         priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID;
 245
 246         priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE;
 247         priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE;
 248
 249         priv->hw_params.max_bsm_size = 0;
 250         priv->hw_params.ht40_channel =  BIT(IEEE80211_BAND_2GHZ) |
 251                                         BIT(IEEE80211_BAND_5GHZ);
 252         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 253
 254         priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
 255         priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
 256         priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
 257         priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
 258
 259         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
 260                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
 261
 262         /* Set initial sensitivity parameters */
 263         /* Set initial calibration set */
 264         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
 265         case CSR_HW_REV_TYPE_5150:
 266                 priv->hw_params.sens = &iwl5150_sensitivity;
 267                 priv->hw_params.calib_init_cfg =
 268                         BIT(IWL_CALIB_DC)               |
 269                         BIT(IWL_CALIB_LO)               |
 270                         BIT(IWL_CALIB_TX_IQ)            |
 271                         BIT(IWL_CALIB_BASE_BAND);
 272
 273                 break;
 274         default:
 275                 priv->hw_params.sens = &iwl5000_sensitivity;
 276                 priv->hw_params.calib_init_cfg =
 277                         BIT(IWL_CALIB_XTAL)             |
 278                         BIT(IWL_CALIB_LO)               |
 279                         BIT(IWL_CALIB_TX_IQ)            |
 280                         BIT(IWL_CALIB_TX_IQ_PERD)       |
 281                         BIT(IWL_CALIB_BASE_BAND);
 282                 break;
 283         }
 284
 285         return 0;
 286 }
 287
 288 static inline u32 iwl5000_get_scd_ssn(struct iwl5000_tx_resp *tx_resp)
 289 {
 290         return le32_to_cpup((__le32 *)&tx_resp->status +
 291                             tx_resp->frame_count) & MAX_SN;
 292 }
 293
 294 static int iwl5000_tx_status_reply_tx(struct iwl_priv *priv,
 295                                       struct iwl_ht_agg *agg,
 296                                       struct iwl5000_tx_resp *tx_resp,
 297                                       int txq_id, u16 start_idx)
 298 {
 299         u16 status;
 300         struct agg_tx_status *frame_status = &tx_resp->status;
 301         struct ieee80211_tx_info *info = NULL;
 302         struct ieee80211_hdr *hdr = NULL;
 303         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
 304         int i, sh, idx;
 305         u16 seq;
 306
 307         if (agg->wait_for_ba)
 308                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
 309
 310         agg->frame_count = tx_resp->frame_count;
 311         agg->start_idx = start_idx;
 312         agg->rate_n_flags = rate_n_flags;
 313         agg->bitmap = 0;
 314
 315         /* # frames attempted by Tx command */
 316         if (agg->frame_count == 1) {
 317                 /* Only one frame was attempted; no block-ack will arrive */
 318                 status = le16_to_cpu(frame_status[0].status);
 319                 idx = start_idx;
 320
 321                 /* FIXME: code repetition */
 322                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
 323                                    agg->frame_count, agg->start_idx, idx);
 324
 325                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
 326                 info->status.rates[0].count = tx_resp->failure_frame + 1;
 327                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
 328                 info->flags |= iwl_tx_status_to_mac80211(status);
 329                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
 330
 331                 /* FIXME: code repetition end */
 332
 333                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
 334                                     status & 0xff, tx_resp->failure_frame);
 335                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
 336
 337                 agg->wait_for_ba = 0;
 338         } else {
 339                 /* Two or more frames were attempted; expect block-ack */
 340                 u64 bitmap = 0;
 341                 int start = agg->start_idx;
 342
 343                 /* Construct bit-map of pending frames within Tx window */
 344                 for (i = 0; i < agg->frame_count; i++) {
 345                         u16 sc;
 346                         status = le16_to_cpu(frame_status[i].status);
 347                         seq  = le16_to_cpu(frame_status[i].sequence);
 348                         idx = SEQ_TO_INDEX(seq);
 349                         txq_id = SEQ_TO_QUEUE(seq);
 350
 351                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
 352                                       AGG_TX_STATE_ABORT_MSK))
 353                                 continue;
 354
 355                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
 356                                            agg->frame_count, txq_id, idx);
 357
 358                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
 359                         if (!hdr) {
 360                                 IWL_ERR(priv,
 361                                         "BUG_ON idx doesn't point to valid skb"
 362                                         " idx=%d, txq_id=%d\n", idx, txq_id);
 363                                 return -1;
 364                         }
 365
 366                         sc = le16_to_cpu(hdr->seq_ctrl);
 367                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
 368                                 IWL_ERR(priv,
 369                                         "BUG_ON idx doesn't match seq control"
 370                                         " idx=%d, seq_idx=%d, seq=%d\n",
 371                                           idx, SEQ_TO_SN(sc),
 372                                           hdr->seq_ctrl);
 373                                 return -1;
 374                         }
 375
 376                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
 377                                            i, idx, SEQ_TO_SN(sc));
 378
 379                         sh = idx - start;
 380                         if (sh > 64) {
 381                                 sh = (start - idx) + 0xff;
 382                                 bitmap = bitmap << sh;
 383                                 sh = 0;
 384                                 start = idx;
 385                         } else if (sh < -64)
 386                                 sh  = 0xff - (start - idx);
 387                         else if (sh < 0) {
 388                                 sh = start - idx;
 389                                 start = idx;
 390                                 bitmap = bitmap << sh;
 391                                 sh = 0;
 392                         }
 393                         bitmap |= 1ULL << sh;
 394                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
 395                                            start, (unsigned long long)bitmap);
 396                 }
 397
 398                 agg->bitmap = bitmap;
 399                 agg->start_idx = start;
 400                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
 401                                    agg->frame_count, agg->start_idx,
 402                                    (unsigned long long)agg->bitmap);
 403
 404                 if (bitmap)
 405                         agg->wait_for_ba = 1;
 406         }
 407         return 0;
 408 }
 409
 410 static void iwl5000_rx_reply_tx(struct iwl_priv *priv,
 411                                 struct iwl_rx_mem_buffer *rxb)
 412 {
 413         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 414         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 415         int txq_id = SEQ_TO_QUEUE(sequence);
 416         int index = SEQ_TO_INDEX(sequence);
 417         struct iwl_tx_queue *txq = &priv->txq[txq_id];
 418         struct ieee80211_tx_info *info;
 419         struct iwl5000_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 420         u32  status = le16_to_cpu(tx_resp->status.status);
 421         int tid;
 422         int sta_id;
 423         int freed;
 424
 425         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
 426                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
 427                           "is out of range [0-%d] %d %d\n", txq_id,
 428                           index, txq->q.n_bd, txq->q.write_ptr,
 429                           txq->q.read_ptr);
 430                 return;
 431         }
 432
 433         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
 434         memset(&info->status, 0, sizeof(info->status));
 435
 436         tid = (tx_resp->ra_tid & IWL50_TX_RES_TID_MSK) >> IWL50_TX_RES_TID_POS;
 437         sta_id = (tx_resp->ra_tid & IWL50_TX_RES_RA_MSK) >> IWL50_TX_RES_RA_POS;
 438
 439         if (txq->sched_retry) {
 440                 const u32 scd_ssn = iwl5000_get_scd_ssn(tx_resp);
 441                 struct iwl_ht_agg *agg = NULL;
 442
 443                 agg = &priv->stations[sta_id].tid[tid].agg;
 444
 445                 iwl5000_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
 446
 447                 /* check if BAR is needed */
 448                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
 449                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
 450
 451                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
 452                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
 453                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim "
 454                                         "scd_ssn=%d idx=%d txq=%d swq=%d\n",
 455                                         scd_ssn , index, txq_id, txq->swq_id);
 456
 457                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
 458                         iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
 459
 460                         if (priv->mac80211_registered &&
 461                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
 462                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
 463                                 if (agg->state == IWL_AGG_OFF)
 464                                         iwl_wake_queue(priv, txq_id);
 465                                 else
 466                                         iwl_wake_queue(priv, txq->swq_id);
 467                         }
 468                 }
 469         } else {
 470                 BUG_ON(txq_id != txq->swq_id);
 471
 472                 info->status.rates[0].count = tx_resp->failure_frame + 1;
 473                 info->flags |= iwl_tx_status_to_mac80211(status);
 474                 iwl_hwrate_to_tx_control(priv,
 475                                         le32_to_cpu(tx_resp->rate_n_flags),
 476                                         info);
 477
 478                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) rate_n_flags "
 479                                    "0x%x retries %d\n",
 480                                    txq_id,
 481                                    iwl_get_tx_fail_reason(status), status,
 482                                    le32_to_cpu(tx_resp->rate_n_flags),
 483                                    tx_resp->failure_frame);
 484
 485                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
 486                 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
 487
 488                 if (priv->mac80211_registered &&
 489                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
 490                         iwl_wake_queue(priv, txq_id);
 491         }
 492
 493         iwl_txq_check_empty(priv, sta_id, tid, txq_id);
 494
 495         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 496                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
 497 }
 498
 499 void iwl5000_setup_deferred_work(struct iwl_priv *priv)
 500 {
 501         /* in 5000 the tx power calibration is done in uCode */
 502         priv->disable_tx_power_cal = 1;
 503 }
 504
 505 void iwl5000_rx_handler_setup(struct iwl_priv *priv)
 506 {
 507         /* init calibration handlers */
 508         priv->rx_handlers[CALIBRATION_RES_NOTIFICATION] =
 509                                         iwlagn_rx_calib_result;
 510         priv->rx_handlers[CALIBRATION_COMPLETE_NOTIFICATION] =
 511                                         iwlagn_rx_calib_complete;
 512         priv->rx_handlers[REPLY_TX] = iwl5000_rx_reply_tx;
 513 }
 514
 515
 516 int iwl5000_hw_valid_rtc_data_addr(u32 addr)
 517 {
 518         return (addr >= IWLAGN_RTC_DATA_LOWER_BOUND) &&
 519                 (addr < IWLAGN_RTC_DATA_UPPER_BOUND);
 520 }
 521
 522 int  iwl5000_send_tx_power(struct iwl_priv *priv)
 523 {
 524         struct iwl5000_tx_power_dbm_cmd tx_power_cmd;
 525         u8 tx_ant_cfg_cmd;
 526
 527         /* half dBm need to multiply */
 528         tx_power_cmd.global_lmt = (s8)(2 * priv->tx_power_user_lmt);
 529
 530         if (priv->tx_power_lmt_in_half_dbm &&
 531             priv->tx_power_lmt_in_half_dbm < tx_power_cmd.global_lmt) {
 532                 /*
 533                  * For the newer devices which using enhanced/extend tx power
 534                  * table in EEPROM, the format is in half dBm. driver need to
 535                  * convert to dBm format before report to mac80211.
 536                  * By doing so, there is a possibility of 1/2 dBm resolution
 537                  * lost. driver will perform "round-up" operation before
 538                  * reporting, but it will cause 1/2 dBm tx power over the
 539                  * regulatory limit. Perform the checking here, if the
 540                  * "tx_power_user_lmt" is higher than EEPROM value (in
 541                  * half-dBm format), lower the tx power based on EEPROM
 542                  */
 543                 tx_power_cmd.global_lmt = priv->tx_power_lmt_in_half_dbm;
 544         }
 545         tx_power_cmd.flags = IWL50_TX_POWER_NO_CLOSED;
 546         tx_power_cmd.srv_chan_lmt = IWL50_TX_POWER_AUTO;
 547
 548         if (IWL_UCODE_API(priv->ucode_ver) == 1)
 549                 tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD_V1;
 550         else
 551                 tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD;
 552
 553         return  iwl_send_cmd_pdu_async(priv, tx_ant_cfg_cmd,
 554                                        sizeof(tx_power_cmd), &tx_power_cmd,
 555                                        NULL);
 556 }
 557
 558 void iwl5000_temperature(struct iwl_priv *priv)
 559 {
 560         /* store temperature from statistics (in Celsius) */
 561         priv->temperature = le32_to_cpu(priv->statistics.general.temperature);
 562         iwl_tt_handler(priv);
 563 }
 564
 565 static void iwl5150_temperature(struct iwl_priv *priv)
 566 {
 567         u32 vt = 0;
 568         s32 offset =  iwl_temp_calib_to_offset(priv);
 569
 570         vt = le32_to_cpu(priv->statistics.general.temperature);
 571         vt = vt / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF + offset;
 572         /* now vt hold the temperature in Kelvin */
 573         priv->temperature = KELVIN_TO_CELSIUS(vt);
 574         iwl_tt_handler(priv);
 575 }
 576
 577 static int iwl5000_hw_channel_switch(struct iwl_priv *priv, u16 channel)
 578 {
 579         struct iwl5000_channel_switch_cmd cmd;
 580         const struct iwl_channel_info *ch_info;
 581         struct iwl_host_cmd hcmd = {
 582                 .id = REPLY_CHANNEL_SWITCH,
 583                 .len = sizeof(cmd),
 584                 .flags = CMD_SIZE_HUGE,
 585                 .data = &cmd,
 586         };
 587
 588         IWL_DEBUG_11H(priv, "channel switch from %d to %d\n",
 589                 priv->active_rxon.channel, channel);
 590         cmd.band = priv->band == IEEE80211_BAND_2GHZ;
 591         cmd.channel = cpu_to_le16(channel);
 592         cmd.rxon_flags = priv->staging_rxon.flags;
 593         cmd.rxon_filter_flags = priv->staging_rxon.filter_flags;
 594         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
 595         ch_info = iwl_get_channel_info(priv, priv->band, channel);
 596         if (ch_info)
 597                 cmd.expect_beacon = is_channel_radar(ch_info);
 598         else {
 599                 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
 600                         priv->active_rxon.channel, channel);
 601                 return -EFAULT;
 602         }
 603         priv->switch_rxon.channel = cpu_to_le16(channel);
 604         priv->switch_rxon.switch_in_progress = true;
 605
 606         return iwl_send_cmd_sync(priv, &hcmd);
 607 }
 608
 609 struct iwl_lib_ops iwl5000_lib = {
 610         .set_hw_params = iwl5000_hw_set_hw_params,
 611         .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl,
 612         .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl,
 613         .txq_set_sched = iwlagn_txq_set_sched,
 614         .txq_agg_enable = iwlagn_txq_agg_enable,
 615         .txq_agg_disable = iwlagn_txq_agg_disable,
 616         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
 617         .txq_free_tfd = iwl_hw_txq_free_tfd,
 618         .txq_init = iwl_hw_tx_queue_init,
 619         .rx_handler_setup = iwl5000_rx_handler_setup,
 620         .setup_deferred_work = iwl5000_setup_deferred_work,
 621         .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
 622         .dump_nic_event_log = iwl_dump_nic_event_log,
 623         .dump_nic_error_log = iwl_dump_nic_error_log,
 624         .dump_csr = iwl_dump_csr,
 625         .dump_fh = iwl_dump_fh,
 626         .load_ucode = iwlagn_load_ucode,
 627         .init_alive_start = iwlagn_init_alive_start,
 628         .alive_notify = iwlagn_alive_notify,
 629         .send_tx_power = iwl5000_send_tx_power,
 630         .update_chain_flags = iwl_update_chain_flags,
 631         .set_channel_switch = iwl5000_hw_channel_switch,
 632         .apm_ops = {
 633                 .init = iwl_apm_init,
 634                 .stop = iwl_apm_stop,
 635                 .config = iwl5000_nic_config,
 636                 .set_pwr_src = iwl_set_pwr_src,
 637         },
 638         .eeprom_ops = {
 639                 .regulatory_bands = {
 640                         EEPROM_5000_REG_BAND_1_CHANNELS,
 641                         EEPROM_5000_REG_BAND_2_CHANNELS,
 642                         EEPROM_5000_REG_BAND_3_CHANNELS,
 643                         EEPROM_5000_REG_BAND_4_CHANNELS,
 644                         EEPROM_5000_REG_BAND_5_CHANNELS,
 645                         EEPROM_5000_REG_BAND_24_HT40_CHANNELS,
 646                         EEPROM_5000_REG_BAND_52_HT40_CHANNELS
 647                 },
 648                 .verify_signature  = iwlcore_eeprom_verify_signature,
 649                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
 650                 .release_semaphore = iwlcore_eeprom_release_semaphore,
 651                 .calib_version  = iwl5000_eeprom_calib_version,
 652                 .query_addr = iwl5000_eeprom_query_addr,
 653         },
 654         .post_associate = iwl_post_associate,
 655         .isr = iwl_isr_ict,
 656         .config_ap = iwl_config_ap,
 657         .temp_ops = {
 658                 .temperature = iwl5000_temperature,
 659                 .set_ct_kill = iwl5000_set_ct_threshold,
 660          },
 661         .add_bcast_station = iwl_add_bcast_station,
 662         .recover_from_tx_stall = iwl_bg_monitor_recover,
 663         .check_plcp_health = iwl_good_plcp_health,
 664         .check_ack_health = iwl_good_ack_health,
 665 };
 666
 667 static struct iwl_lib_ops iwl5150_lib = {
 668         .set_hw_params = iwl5000_hw_set_hw_params,
 669         .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl,
 670         .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl,
 671         .txq_set_sched = iwlagn_txq_set_sched,
 672         .txq_agg_enable = iwlagn_txq_agg_enable,
 673         .txq_agg_disable = iwlagn_txq_agg_disable,
 674         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
 675         .txq_free_tfd = iwl_hw_txq_free_tfd,
 676         .txq_init = iwl_hw_tx_queue_init,
 677         .rx_handler_setup = iwl5000_rx_handler_setup,
 678         .setup_deferred_work = iwl5000_setup_deferred_work,
 679         .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
 680         .dump_nic_event_log = iwl_dump_nic_event_log,
 681         .dump_nic_error_log = iwl_dump_nic_error_log,
 682         .dump_csr = iwl_dump_csr,
 683         .load_ucode = iwlagn_load_ucode,
 684         .init_alive_start = iwlagn_init_alive_start,
 685         .alive_notify = iwlagn_alive_notify,
 686         .send_tx_power = iwl5000_send_tx_power,
 687         .update_chain_flags = iwl_update_chain_flags,
 688         .set_channel_switch = iwl5000_hw_channel_switch,
 689         .apm_ops = {
 690                 .init = iwl_apm_init,
 691                 .stop = iwl_apm_stop,
 692                 .config = iwl5000_nic_config,
 693                 .set_pwr_src = iwl_set_pwr_src,
 694         },
 695         .eeprom_ops = {
 696                 .regulatory_bands = {
 697                         EEPROM_5000_REG_BAND_1_CHANNELS,
 698                         EEPROM_5000_REG_BAND_2_CHANNELS,
 699                         EEPROM_5000_REG_BAND_3_CHANNELS,
 700                         EEPROM_5000_REG_BAND_4_CHANNELS,
 701                         EEPROM_5000_REG_BAND_5_CHANNELS,
 702                         EEPROM_5000_REG_BAND_24_HT40_CHANNELS,
 703                         EEPROM_5000_REG_BAND_52_HT40_CHANNELS
 704                 },
 705                 .verify_signature  = iwlcore_eeprom_verify_signature,
 706                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
 707                 .release_semaphore = iwlcore_eeprom_release_semaphore,
 708                 .calib_version  = iwl5000_eeprom_calib_version,
 709                 .query_addr = iwl5000_eeprom_query_addr,
 710         },
 711         .post_associate = iwl_post_associate,
 712         .isr = iwl_isr_ict,
 713         .config_ap = iwl_config_ap,
 714         .temp_ops = {
 715                 .temperature = iwl5150_temperature,
 716                 .set_ct_kill = iwl5150_set_ct_threshold,
 717          },
 718         .add_bcast_station = iwl_add_bcast_station,
 719         .recover_from_tx_stall = iwl_bg_monitor_recover,
 720         .check_plcp_health = iwl_good_plcp_health,
 721         .check_ack_health = iwl_good_ack_health,
 722 };
 723
 724 static const struct iwl_ops iwl5000_ops = {
 725         .ucode = &iwlagn_ucode,
 726         .lib = &iwl5000_lib,
 727         .hcmd = &iwlagn_hcmd,
 728         .utils = &iwlagn_hcmd_utils,
 729         .led = &iwlagn_led_ops,
 730 };
 731
 732 static const struct iwl_ops iwl5150_ops = {
 733         .ucode = &iwlagn_ucode,
 734         .lib = &iwl5150_lib,
 735         .hcmd = &iwlagn_hcmd,
 736         .utils = &iwlagn_hcmd_utils,
 737         .led = &iwlagn_led_ops,
 738 };
 739
 740 struct iwl_mod_params iwl50_mod_params = {
 741         .amsdu_size_8K = 1,
 742         .restart_fw = 1,
 743         /* the rest are 0 by default */
 744 };
 745
 746
 747 struct iwl_cfg iwl5300_agn_cfg = {
 748         .name = "Intel(R) Ultimate N WiFi Link 5300 AGN",
 749         .fw_name_pre = IWL5000_FW_PRE,
 750         .ucode_api_max = IWL5000_UCODE_API_MAX,
 751         .ucode_api_min = IWL5000_UCODE_API_MIN,
 752         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
 753         .ops = &iwl5000_ops,
 754         .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
 755         .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
 756         .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
 757         .num_of_queues = IWLAGN_NUM_QUEUES,
 758         .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
 759         .mod_params = &iwl50_mod_params,
 760         .valid_tx_ant = ANT_ABC,
 761         .valid_rx_ant = ANT_ABC,
 762         .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
 763         .set_l0s = true,
 764         .use_bsm = false,
 765         .ht_greenfield_support = true,
 766         .led_compensation = 51,
 767         .use_rts_for_ht = true, /* use rts/cts protection */
 768         .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
 769         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
 770         .chain_noise_scale = 1000,
 771         .monitor_recover_period = IWL_MONITORING_PERIOD,
 772 };
 773
 774 struct iwl_cfg iwl5100_bgn_cfg = {
 775         .name = "Intel(R) WiFi Link 5100 BGN",
 776         .fw_name_pre = IWL5000_FW_PRE,
 777         .ucode_api_max = IWL5000_UCODE_API_MAX,
 778         .ucode_api_min = IWL5000_UCODE_API_MIN,
 779         .sku = IWL_SKU_G|IWL_SKU_N,
 780         .ops = &iwl5000_ops,
 781         .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
 782         .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
 783         .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
 784         .num_of_queues = IWLAGN_NUM_QUEUES,
 785         .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
 786         .mod_params = &iwl50_mod_params,
 787         .valid_tx_ant = ANT_B,
 788         .valid_rx_ant = ANT_AB,
 789         .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
 790         .set_l0s = true,
 791         .use_bsm = false,
 792         .ht_greenfield_support = true,
 793         .led_compensation = 51,
 794         .use_rts_for_ht = true, /* use rts/cts protection */
 795         .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
 796         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
 797         .chain_noise_scale = 1000,
 798         .monitor_recover_period = IWL_MONITORING_PERIOD,
 799 };
 800
 801 struct iwl_cfg iwl5100_abg_cfg = {
 802         .name = "Intel(R) WiFi Link 5100 ABG",
 803         .fw_name_pre = IWL5000_FW_PRE,
 804         .ucode_api_max = IWL5000_UCODE_API_MAX,
 805         .ucode_api_min = IWL5000_UCODE_API_MIN,
 806         .sku = IWL_SKU_A|IWL_SKU_G,
 807         .ops = &iwl5000_ops,
 808         .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
 809         .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
 810         .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
 811         .num_of_queues = IWLAGN_NUM_QUEUES,
 812         .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
 813         .mod_params = &iwl50_mod_params,
 814         .valid_tx_ant = ANT_B,
 815         .valid_rx_ant = ANT_AB,
 816         .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
 817         .set_l0s = true,
 818         .use_bsm = false,
 819         .led_compensation = 51,
 820         .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
 821         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
 822         .chain_noise_scale = 1000,
 823         .monitor_recover_period = IWL_MONITORING_PERIOD,
 824 };
 825
 826 struct iwl_cfg iwl5100_agn_cfg = {
 827         .name = "Intel(R) WiFi Link 5100 AGN",
 828         .fw_name_pre = IWL5000_FW_PRE,
 829         .ucode_api_max = IWL5000_UCODE_API_MAX,
 830         .ucode_api_min = IWL5000_UCODE_API_MIN,
 831         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
 832         .ops = &iwl5000_ops,
 833         .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
 834         .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
 835         .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
 836         .num_of_queues = IWLAGN_NUM_QUEUES,
 837         .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
 838         .mod_params = &iwl50_mod_params,
 839         .valid_tx_ant = ANT_B,
 840         .valid_rx_ant = ANT_AB,
 841         .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
 842         .set_l0s = true,
 843         .use_bsm = false,
 844         .ht_greenfield_support = true,
 845         .led_compensation = 51,
 846         .use_rts_for_ht = true, /* use rts/cts protection */
 847         .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
 848         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
 849         .chain_noise_scale = 1000,
 850         .monitor_recover_period = IWL_MONITORING_PERIOD,
 851 };
 852
 853 struct iwl_cfg iwl5350_agn_cfg = {
 854         .name = "Intel(R) WiMAX/WiFi Link 5350 AGN",
 855         .fw_name_pre = IWL5000_FW_PRE,
 856         .ucode_api_max = IWL5000_UCODE_API_MAX,
 857         .ucode_api_min = IWL5000_UCODE_API_MIN,
 858         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
 859         .ops = &iwl5000_ops,
 860         .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
 861         .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
 862         .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
 863         .num_of_queues = IWLAGN_NUM_QUEUES,
 864         .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
 865         .mod_params = &iwl50_mod_params,
 866         .valid_tx_ant = ANT_ABC,
 867         .valid_rx_ant = ANT_ABC,
 868         .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
 869         .set_l0s = true,
 870         .use_bsm = false,
 871         .ht_greenfield_support = true,
 872         .led_compensation = 51,
 873         .use_rts_for_ht = true, /* use rts/cts protection */
 874         .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
 875         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
 876         .chain_noise_scale = 1000,
 877         .monitor_recover_period = IWL_MONITORING_PERIOD,
 878 };
 879
 880 struct iwl_cfg iwl5150_agn_cfg = {
 881         .name = "Intel(R) WiMAX/WiFi Link 5150 AGN",
 882         .fw_name_pre = IWL5150_FW_PRE,
 883         .ucode_api_max = IWL5150_UCODE_API_MAX,
 884         .ucode_api_min = IWL5150_UCODE_API_MIN,
 885         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
 886         .ops = &iwl5150_ops,
 887         .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
 888         .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
 889         .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
 890         .num_of_queues = IWLAGN_NUM_QUEUES,
 891         .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
 892         .mod_params = &iwl50_mod_params,
 893         .valid_tx_ant = ANT_A,
 894         .valid_rx_ant = ANT_AB,
 895         .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
 896         .set_l0s = true,
 897         .use_bsm = false,
 898         .ht_greenfield_support = true,
 899         .led_compensation = 51,
 900         .use_rts_for_ht = true, /* use rts/cts protection */
 901         .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
 902         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
 903         .chain_noise_scale = 1000,
 904         .monitor_recover_period = IWL_MONITORING_PERIOD,
 905 };
 906
 907 struct iwl_cfg iwl5150_abg_cfg = {
 908         .name = "Intel(R) WiMAX/WiFi Link 5150 ABG",
 909         .fw_name_pre = IWL5150_FW_PRE,
 910         .ucode_api_max = IWL5150_UCODE_API_MAX,
 911         .ucode_api_min = IWL5150_UCODE_API_MIN,
 912         .sku = IWL_SKU_A|IWL_SKU_G,
 913         .ops = &iwl5150_ops,
 914         .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
 915         .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
 916         .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
 917         .num_of_queues = IWLAGN_NUM_QUEUES,
 918         .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
 919         .mod_params = &iwl50_mod_params,
 920         .valid_tx_ant = ANT_A,
 921         .valid_rx_ant = ANT_AB,
 922         .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
 923         .set_l0s = true,
 924         .use_bsm = false,
 925         .led_compensation = 51,
 926         .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
 927         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
 928         .chain_noise_scale = 1000,
 929         .monitor_recover_period = IWL_MONITORING_PERIOD,
 930 };
 931
 932 MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));
 933 MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX));
 934
 935 module_param_named(swcrypto50, iwl50_mod_params.sw_crypto, bool, S_IRUGO);
 936 MODULE_PARM_DESC(swcrypto50,
 937                   "using software crypto engine (default 0 [hardware])\n");
 938 module_param_named(queues_num50, iwl50_mod_params.num_of_queues, int, S_IRUGO);
 939 MODULE_PARM_DESC(queues_num50, "number of hw queues in 50xx series");
 940 module_param_named(11n_disable50, iwl50_mod_params.disable_11n, int, S_IRUGO);
 941 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality");
 942 module_param_named(amsdu_size_8K50, iwl50_mod_params.amsdu_size_8K,
 943                    int, S_IRUGO);
 944 MODULE_PARM_DESC(amsdu_size_8K50, "enable 8K amsdu size in 50XX series");
 945 module_param_named(fw_restart50, iwl50_mod_params.restart_fw, int, S_IRUGO);
 946 MODULE_PARM_DESC(fw_restart50, "restart firmware in case of error");