1 /******************************************************************************
3 * Copyright(c) 2007-2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *****************************************************************************/
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/version.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
40 #include "iwl-eeprom.h"
44 #include "iwl-helpers.h"
45 #include "iwl-5000-hw.h"
47 #define IWL5000_UCODE_API "-1"
49 static int iwl5000_apm_init(struct iwl_priv
*priv
)
53 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
54 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER
);
56 iwl_set_bit(priv
, CSR_ANA_PLL_CFG
, CSR50_ANA_PLL_CFG_VAL
);
58 /* set "initialization complete" bit to move adapter
59 * D0U* --> D0A* state */
60 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
62 /* wait for clock stabilization */
63 ret
= iwl_poll_bit(priv
, CSR_GP_CNTRL
,
64 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
,
65 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25000);
67 IWL_DEBUG_INFO("Failed to init the card\n");
71 ret
= iwl_grab_nic_access(priv
);
76 iwl_write_prph(priv
, APMG_CLK_EN_REG
,
77 APMG_CLK_VAL_DMA_CLK_RQT
);
81 iwl_set_bits_prph(priv
, APMG_PCIDEV_STT_REG
,
82 APMG_PCIDEV_STT_VAL_L1_ACT_DIS
);
84 iwl_release_nic_access(priv
);
92 static u32
eeprom_indirect_address(const struct iwl_priv
*priv
, u32 address
)
96 if ((address
& INDIRECT_ADDRESS
) == 0)
99 switch (address
& INDIRECT_TYPE_MSK
) {
101 offset
= iwl_eeprom_query16(priv
, EEPROM_5000_LINK_HOST
);
103 case INDIRECT_GENERAL
:
104 offset
= iwl_eeprom_query16(priv
, EEPROM_5000_LINK_GENERAL
);
106 case INDIRECT_REGULATORY
:
107 offset
= iwl_eeprom_query16(priv
, EEPROM_5000_LINK_REGULATORY
);
109 case INDIRECT_CALIBRATION
:
110 offset
= iwl_eeprom_query16(priv
, EEPROM_5000_LINK_CALIBRATION
);
112 case INDIRECT_PROCESS_ADJST
:
113 offset
= iwl_eeprom_query16(priv
, EEPROM_5000_LINK_PROCESS_ADJST
);
115 case INDIRECT_OTHERS
:
116 offset
= iwl_eeprom_query16(priv
, EEPROM_5000_LINK_OTHERS
);
119 IWL_ERROR("illegal indirect type: 0x%X\n",
120 address
& INDIRECT_TYPE_MSK
);
124 /* translate the offset from words to byte */
125 return (address
& ADDRESS_MSK
) + (offset
<< 1);
128 #ifdef CONFIG_IWL5000_RUN_TIME_CALIB
130 static void iwl5000_gain_computation(struct iwl_priv
*priv
,
131 u32 average_noise
[NUM_RX_CHAINS
],
132 u16 min_average_noise_antenna_i
,
133 u32 min_average_noise
)
137 struct iwl_chain_noise_data
*data
= &priv
->chain_noise_data
;
139 /* Find Gain Code for the antennas B and C */
140 for (i
= 1; i
< NUM_RX_CHAINS
; i
++) {
141 if ((data
->disconn_array
[i
])) {
142 data
->delta_gain_code
[i
] = 0;
145 delta_g
= (1000 * ((s32
)average_noise
[0] -
146 (s32
)average_noise
[i
])) / 1500;
147 /* bound gain by 2 bits value max, 3rd bit is sign */
148 data
->delta_gain_code
[i
] =
149 min(abs(delta_g
), CHAIN_NOISE_MAX_DELTA_GAIN_CODE
);
152 /* set negative sign */
153 data
->delta_gain_code
[i
] |= (1 << 2);
156 IWL_DEBUG_CALIB("Delta gains: ANT_B = %d ANT_C = %d\n",
157 data
->delta_gain_code
[1], data
->delta_gain_code
[2]);
159 if (!data
->radio_write
) {
160 struct iwl5000_calibration_chain_noise_gain_cmd cmd
;
161 memset(&cmd
, 0, sizeof(cmd
));
163 cmd
.op_code
= IWL5000_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD
;
164 cmd
.delta_gain_1
= data
->delta_gain_code
[1];
165 cmd
.delta_gain_2
= data
->delta_gain_code
[2];
166 iwl_send_cmd_pdu_async(priv
, REPLY_PHY_CALIBRATION_CMD
,
167 sizeof(cmd
), &cmd
, NULL
);
169 data
->radio_write
= 1;
170 data
->state
= IWL_CHAIN_NOISE_CALIBRATED
;
173 data
->chain_noise_a
= 0;
174 data
->chain_noise_b
= 0;
175 data
->chain_noise_c
= 0;
176 data
->chain_signal_a
= 0;
177 data
->chain_signal_b
= 0;
178 data
->chain_signal_c
= 0;
179 data
->beacon_count
= 0;
182 static void iwl5000_chain_noise_reset(struct iwl_priv
*priv
)
184 struct iwl_chain_noise_data
*data
= &priv
->chain_noise_data
;
186 if ((data
->state
== IWL_CHAIN_NOISE_ALIVE
) && iwl_is_associated(priv
)) {
187 struct iwl5000_calibration_chain_noise_reset_cmd cmd
;
189 memset(&cmd
, 0, sizeof(cmd
));
190 cmd
.op_code
= IWL5000_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD
;
191 if (iwl_send_cmd_pdu(priv
, REPLY_PHY_CALIBRATION_CMD
,
193 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
194 data
->state
= IWL_CHAIN_NOISE_ACCUMULATE
;
195 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
199 static struct iwl_sensitivity_ranges iwl5000_sensitivity
= {
202 .auto_corr_min_ofdm
= 90,
203 .auto_corr_min_ofdm_mrc
= 170,
204 .auto_corr_min_ofdm_x1
= 120,
205 .auto_corr_min_ofdm_mrc_x1
= 240,
207 .auto_corr_max_ofdm
= 120,
208 .auto_corr_max_ofdm_mrc
= 210,
209 .auto_corr_max_ofdm_x1
= 155,
210 .auto_corr_max_ofdm_mrc_x1
= 290,
212 .auto_corr_min_cck
= 125,
213 .auto_corr_max_cck
= 200,
214 .auto_corr_min_cck_mrc
= 170,
215 .auto_corr_max_cck_mrc
= 400,
220 #endif /* CONFIG_IWL5000_RUN_TIME_CALIB */
222 static const u8
*iwl5000_eeprom_query_addr(const struct iwl_priv
*priv
,
225 u32 address
= eeprom_indirect_address(priv
, offset
);
226 BUG_ON(address
>= priv
->cfg
->eeprom_size
);
227 return &priv
->eeprom
[address
];
230 static int iwl5000_hw_set_hw_params(struct iwl_priv
*priv
)
232 if ((priv
->cfg
->mod_params
->num_of_queues
> IWL50_NUM_QUEUES
) ||
233 (priv
->cfg
->mod_params
->num_of_queues
< IWL_MIN_NUM_QUEUES
)) {
234 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
235 IWL_MIN_NUM_QUEUES
, IWL50_NUM_QUEUES
);
239 priv
->hw_params
.max_txq_num
= priv
->cfg
->mod_params
->num_of_queues
;
240 priv
->hw_params
.sw_crypto
= priv
->cfg
->mod_params
->sw_crypto
;
241 priv
->hw_params
.tx_cmd_len
= sizeof(struct iwl4965_tx_cmd
);
242 priv
->hw_params
.max_rxq_size
= RX_QUEUE_SIZE
;
243 priv
->hw_params
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
244 if (priv
->cfg
->mod_params
->amsdu_size_8K
)
245 priv
->hw_params
.rx_buf_size
= IWL_RX_BUF_SIZE_8K
;
247 priv
->hw_params
.rx_buf_size
= IWL_RX_BUF_SIZE_4K
;
248 priv
->hw_params
.max_pkt_size
= priv
->hw_params
.rx_buf_size
- 256;
249 priv
->hw_params
.max_stations
= IWL5000_STATION_COUNT
;
250 priv
->hw_params
.bcast_sta_id
= IWL5000_BROADCAST_ID
;
251 priv
->hw_params
.max_data_size
= IWL50_RTC_DATA_SIZE
;
252 priv
->hw_params
.max_inst_size
= IWL50_RTC_INST_SIZE
;
253 priv
->hw_params
.max_bsm_size
= BSM_SRAM_SIZE
;
254 priv
->hw_params
.fat_channel
= BIT(IEEE80211_BAND_2GHZ
) |
255 BIT(IEEE80211_BAND_5GHZ
);
256 #ifdef CONFIG_IWL5000_RUN_TIME_CALIB
257 priv
->hw_params
.sens
= &iwl5000_sensitivity
;
260 switch (priv
->hw_rev
& CSR_HW_REV_TYPE_MSK
) {
261 case CSR_HW_REV_TYPE_5100
:
262 case CSR_HW_REV_TYPE_5150
:
263 priv
->hw_params
.tx_chains_num
= 1;
264 priv
->hw_params
.rx_chains_num
= 2;
265 /* FIXME: move to ANT_A, ANT_B, ANT_C enum */
266 priv
->hw_params
.valid_tx_ant
= ANT_A
;
267 priv
->hw_params
.valid_rx_ant
= ANT_AB
;
269 case CSR_HW_REV_TYPE_5300
:
270 case CSR_HW_REV_TYPE_5350
:
271 priv
->hw_params
.tx_chains_num
= 3;
272 priv
->hw_params
.rx_chains_num
= 3;
273 priv
->hw_params
.valid_tx_ant
= ANT_ABC
;
274 priv
->hw_params
.valid_rx_ant
= ANT_ABC
;
278 switch (priv
->hw_rev
& CSR_HW_REV_TYPE_MSK
) {
279 case CSR_HW_REV_TYPE_5100
:
280 case CSR_HW_REV_TYPE_5300
:
281 /* 5X00 wants in Celsius */
282 priv
->hw_params
.ct_kill_threshold
= CT_KILL_THRESHOLD
;
284 case CSR_HW_REV_TYPE_5150
:
285 case CSR_HW_REV_TYPE_5350
:
286 /* 5X50 wants in Kelvin */
287 priv
->hw_params
.ct_kill_threshold
=
288 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD
);
295 static int iwl5000_alloc_shared_mem(struct iwl_priv
*priv
)
297 priv
->shared_virt
= pci_alloc_consistent(priv
->pci_dev
,
298 sizeof(struct iwl5000_shared
),
300 if (!priv
->shared_virt
)
303 memset(priv
->shared_virt
, 0, sizeof(struct iwl5000_shared
));
308 static void iwl5000_free_shared_mem(struct iwl_priv
*priv
)
310 if (priv
->shared_virt
)
311 pci_free_consistent(priv
->pci_dev
,
312 sizeof(struct iwl5000_shared
),
317 static struct iwl_hcmd_ops iwl5000_hcmd
= {
320 static struct iwl_hcmd_utils_ops iwl5000_hcmd_utils
= {
321 #ifdef CONFIG_IWL5000_RUN_TIME_CALIB
322 .gain_computation
= iwl5000_gain_computation
,
323 .chain_noise_reset
= iwl5000_chain_noise_reset
,
327 static struct iwl_lib_ops iwl5000_lib
= {
328 .set_hw_params
= iwl5000_hw_set_hw_params
,
329 .alloc_shared_mem
= iwl5000_alloc_shared_mem
,
330 .free_shared_mem
= iwl5000_free_shared_mem
,
332 .init
= iwl5000_apm_init
,
333 .set_pwr_src
= iwl4965_set_pwr_src
,
336 .regulatory_bands
= {
337 EEPROM_5000_REG_BAND_1_CHANNELS
,
338 EEPROM_5000_REG_BAND_2_CHANNELS
,
339 EEPROM_5000_REG_BAND_3_CHANNELS
,
340 EEPROM_5000_REG_BAND_4_CHANNELS
,
341 EEPROM_5000_REG_BAND_5_CHANNELS
,
342 EEPROM_5000_REG_BAND_24_FAT_CHANNELS
,
343 EEPROM_5000_REG_BAND_52_FAT_CHANNELS
345 .verify_signature
= iwlcore_eeprom_verify_signature
,
346 .acquire_semaphore
= iwlcore_eeprom_acquire_semaphore
,
347 .release_semaphore
= iwlcore_eeprom_release_semaphore
,
348 .query_addr
= iwl5000_eeprom_query_addr
,
352 static struct iwl_ops iwl5000_ops
= {
354 .hcmd
= &iwl5000_hcmd
,
355 .utils
= &iwl5000_hcmd_utils
,
358 static struct iwl_mod_params iwl50_mod_params
= {
359 .num_of_queues
= IWL50_NUM_QUEUES
,
362 /* the rest are 0 by default */
366 struct iwl_cfg iwl5300_agn_cfg
= {
368 .fw_name
= "iwlwifi-5000" IWL5000_UCODE_API
".ucode",
369 .sku
= IWL_SKU_A
|IWL_SKU_G
|IWL_SKU_N
,
371 .eeprom_size
= IWL_5000_EEPROM_IMG_SIZE
,
372 .mod_params
= &iwl50_mod_params
,
375 struct iwl_cfg iwl5100_agn_cfg
= {
377 .fw_name
= "iwlwifi-5000" IWL5000_UCODE_API
".ucode",
378 .sku
= IWL_SKU_A
|IWL_SKU_G
|IWL_SKU_N
,
380 .eeprom_size
= IWL_5000_EEPROM_IMG_SIZE
,
381 .mod_params
= &iwl50_mod_params
,
384 struct iwl_cfg iwl5350_agn_cfg
= {
386 .fw_name
= "iwlwifi-5000" IWL5000_UCODE_API
".ucode",
387 .sku
= IWL_SKU_A
|IWL_SKU_G
|IWL_SKU_N
,
389 .eeprom_size
= IWL_5000_EEPROM_IMG_SIZE
,
390 .mod_params
= &iwl50_mod_params
,
393 module_param_named(disable50
, iwl50_mod_params
.disable
, int, 0444);
394 MODULE_PARM_DESC(disable50
,
395 "manually disable the 50XX radio (default 0 [radio on])");
396 module_param_named(swcrypto50
, iwl50_mod_params
.sw_crypto
, bool, 0444);
397 MODULE_PARM_DESC(swcrypto50
,
398 "using software crypto engine (default 0 [hardware])\n");
399 module_param_named(debug50
, iwl50_mod_params
.debug
, int, 0444);
400 MODULE_PARM_DESC(debug50
, "50XX debug output mask");
401 module_param_named(queues_num50
, iwl50_mod_params
.num_of_queues
, int, 0444);
402 MODULE_PARM_DESC(queues_num50
, "number of hw queues in 50xx series");
403 module_param_named(qos_enable50
, iwl50_mod_params
.enable_qos
, int, 0444);
404 MODULE_PARM_DESC(qos_enable50
, "enable all 50XX QoS functionality");
405 module_param_named(amsdu_size_8K50
, iwl50_mod_params
.amsdu_size_8K
, int, 0444);
406 MODULE_PARM_DESC(amsdu_size_8K50
, "enable 8K amsdu size in 50XX series");