1 /******************************************************************************
5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
29 #include <linux/etherdevice.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/sched.h>
38 #include "iwl-helpers.h"
39 #include "iwl-agn-hw.h"
43 static inline u32
iwlagn_get_scd_ssn(struct iwl5000_tx_resp
*tx_resp
)
45 return le32_to_cpup((__le32
*)&tx_resp
->status
+
46 tx_resp
->frame_count
) & MAX_SN
;
49 static int iwlagn_tx_status_reply_tx(struct iwl_priv
*priv
,
50 struct iwl_ht_agg
*agg
,
51 struct iwl5000_tx_resp
*tx_resp
,
52 int txq_id
, u16 start_idx
)
55 struct agg_tx_status
*frame_status
= &tx_resp
->status
;
56 struct ieee80211_tx_info
*info
= NULL
;
57 struct ieee80211_hdr
*hdr
= NULL
;
58 u32 rate_n_flags
= le32_to_cpu(tx_resp
->rate_n_flags
);
63 IWL_DEBUG_TX_REPLY(priv
, "got tx response w/o block-ack\n");
65 agg
->frame_count
= tx_resp
->frame_count
;
66 agg
->start_idx
= start_idx
;
67 agg
->rate_n_flags
= rate_n_flags
;
70 /* # frames attempted by Tx command */
71 if (agg
->frame_count
== 1) {
72 /* Only one frame was attempted; no block-ack will arrive */
73 status
= le16_to_cpu(frame_status
[0].status
);
76 /* FIXME: code repetition */
77 IWL_DEBUG_TX_REPLY(priv
, "FrameCnt = %d, StartIdx=%d idx=%d\n",
78 agg
->frame_count
, agg
->start_idx
, idx
);
80 info
= IEEE80211_SKB_CB(priv
->txq
[txq_id
].txb
[idx
].skb
);
81 info
->status
.rates
[0].count
= tx_resp
->failure_frame
+ 1;
82 info
->flags
&= ~IEEE80211_TX_CTL_AMPDU
;
83 info
->flags
|= iwl_tx_status_to_mac80211(status
);
84 iwlagn_hwrate_to_tx_control(priv
, rate_n_flags
, info
);
86 /* FIXME: code repetition end */
88 IWL_DEBUG_TX_REPLY(priv
, "1 Frame 0x%x failure :%d\n",
89 status
& 0xff, tx_resp
->failure_frame
);
90 IWL_DEBUG_TX_REPLY(priv
, "Rate Info rate_n_flags=%x\n", rate_n_flags
);
94 /* Two or more frames were attempted; expect block-ack */
98 * Start is the lowest frame sent. It may not be the first
99 * frame in the batch; we figure this out dynamically during
100 * the following loop.
102 int start
= agg
->start_idx
;
104 /* Construct bit-map of pending frames within Tx window */
105 for (i
= 0; i
< agg
->frame_count
; i
++) {
107 status
= le16_to_cpu(frame_status
[i
].status
);
108 seq
= le16_to_cpu(frame_status
[i
].sequence
);
109 idx
= SEQ_TO_INDEX(seq
);
110 txq_id
= SEQ_TO_QUEUE(seq
);
112 if (status
& (AGG_TX_STATE_FEW_BYTES_MSK
|
113 AGG_TX_STATE_ABORT_MSK
))
116 IWL_DEBUG_TX_REPLY(priv
, "FrameCnt = %d, txq_id=%d idx=%d\n",
117 agg
->frame_count
, txq_id
, idx
);
119 hdr
= iwl_tx_queue_get_hdr(priv
, txq_id
, idx
);
122 "BUG_ON idx doesn't point to valid skb"
123 " idx=%d, txq_id=%d\n", idx
, txq_id
);
127 sc
= le16_to_cpu(hdr
->seq_ctrl
);
128 if (idx
!= (SEQ_TO_SN(sc
) & 0xff)) {
130 "BUG_ON idx doesn't match seq control"
131 " idx=%d, seq_idx=%d, seq=%d\n",
137 IWL_DEBUG_TX_REPLY(priv
, "AGG Frame i=%d idx %d seq=%d\n",
138 i
, idx
, SEQ_TO_SN(sc
));
141 * sh -> how many frames ahead of the starting frame is
144 * Note that all frames sent in the batch must be in a
145 * 64-frame window, so this number should be in [0,63].
146 * If outside of this window, then we've found a new
147 * "first" frame in the batch and need to change start.
152 * If >= 64, out of window. start must be at the front
153 * of the circular buffer, idx must be near the end of
154 * the buffer, and idx is the new "first" frame. Shift
155 * the indices around.
158 /* Shift bitmap by start - idx, wrapped */
159 sh
= 0x100 - idx
+ start
;
160 bitmap
= bitmap
<< sh
;
161 /* Now idx is the new start so sh = 0 */
165 * If <= -64 then wraps the 256-pkt circular buffer
166 * (e.g., start = 255 and idx = 0, sh should be 1)
168 } else if (sh
<= -64) {
169 sh
= 0x100 - start
+ idx
;
171 * If < 0 but > -64, out of window. idx is before start
172 * but not wrapped. Shift the indices around.
175 /* Shift by how far start is ahead of idx */
177 bitmap
= bitmap
<< sh
;
178 /* Now idx is the new start so sh = 0 */
182 /* Sequence number start + sh was sent in this batch */
183 bitmap
|= 1ULL << sh
;
184 IWL_DEBUG_TX_REPLY(priv
, "start=%d bitmap=0x%llx\n",
185 start
, (unsigned long long)bitmap
);
189 * Store the bitmap and possibly the new start, if we wrapped
192 agg
->bitmap
= bitmap
;
193 agg
->start_idx
= start
;
194 IWL_DEBUG_TX_REPLY(priv
, "Frames %d start_idx=%d bitmap=0x%llx\n",
195 agg
->frame_count
, agg
->start_idx
,
196 (unsigned long long)agg
->bitmap
);
199 agg
->wait_for_ba
= 1;
204 void iwl_check_abort_status(struct iwl_priv
*priv
,
205 u8 frame_count
, u32 status
)
207 if (frame_count
== 1 && status
== TX_STATUS_FAIL_RFKILL_FLUSH
) {
208 IWL_ERR(priv
, "Tx flush command to flush out all frames\n");
209 if (!test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
210 queue_work(priv
->workqueue
, &priv
->tx_flush
);
214 static void iwlagn_rx_reply_tx(struct iwl_priv
*priv
,
215 struct iwl_rx_mem_buffer
*rxb
)
217 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
218 u16 sequence
= le16_to_cpu(pkt
->hdr
.sequence
);
219 int txq_id
= SEQ_TO_QUEUE(sequence
);
220 int index
= SEQ_TO_INDEX(sequence
);
221 struct iwl_tx_queue
*txq
= &priv
->txq
[txq_id
];
222 struct ieee80211_tx_info
*info
;
223 struct iwl5000_tx_resp
*tx_resp
= (void *)&pkt
->u
.raw
[0];
224 u32 status
= le16_to_cpu(tx_resp
->status
.status
);
230 if ((index
>= txq
->q
.n_bd
) || (iwl_queue_used(&txq
->q
, index
) == 0)) {
231 IWL_ERR(priv
, "Read index for DMA queue txq_id (%d) index %d "
232 "is out of range [0-%d] %d %d\n", txq_id
,
233 index
, txq
->q
.n_bd
, txq
->q
.write_ptr
,
238 info
= IEEE80211_SKB_CB(txq
->txb
[txq
->q
.read_ptr
].skb
);
239 memset(&info
->status
, 0, sizeof(info
->status
));
241 tid
= (tx_resp
->ra_tid
& IWL50_TX_RES_TID_MSK
) >> IWL50_TX_RES_TID_POS
;
242 sta_id
= (tx_resp
->ra_tid
& IWL50_TX_RES_RA_MSK
) >> IWL50_TX_RES_RA_POS
;
244 spin_lock_irqsave(&priv
->sta_lock
, flags
);
245 if (txq
->sched_retry
) {
246 const u32 scd_ssn
= iwlagn_get_scd_ssn(tx_resp
);
247 struct iwl_ht_agg
*agg
;
249 agg
= &priv
->stations
[sta_id
].tid
[tid
].agg
;
251 * If the BT kill count is non-zero, we'll get this
252 * notification again.
254 if (tx_resp
->bt_kill_count
&& tx_resp
->frame_count
== 1 &&
255 priv
->cfg
->advanced_bt_coexist
) {
256 IWL_WARN(priv
, "receive reply tx with bt_kill\n");
258 iwlagn_tx_status_reply_tx(priv
, agg
, tx_resp
, txq_id
, index
);
260 /* check if BAR is needed */
261 if ((tx_resp
->frame_count
== 1) && !iwl_is_tx_success(status
))
262 info
->flags
|= IEEE80211_TX_STAT_AMPDU_NO_BACK
;
264 if (txq
->q
.read_ptr
!= (scd_ssn
& 0xff)) {
265 index
= iwl_queue_dec_wrap(scd_ssn
& 0xff, txq
->q
.n_bd
);
266 IWL_DEBUG_TX_REPLY(priv
, "Retry scheduler reclaim "
267 "scd_ssn=%d idx=%d txq=%d swq=%d\n",
268 scd_ssn
, index
, txq_id
, txq
->swq_id
);
270 freed
= iwlagn_tx_queue_reclaim(priv
, txq_id
, index
);
271 iwl_free_tfds_in_queue(priv
, sta_id
, tid
, freed
);
273 if (priv
->mac80211_registered
&&
274 (iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
) &&
275 (agg
->state
!= IWL_EMPTYING_HW_QUEUE_DELBA
)) {
276 if (agg
->state
== IWL_AGG_OFF
)
277 iwl_wake_queue(priv
, txq_id
);
279 iwl_wake_queue(priv
, txq
->swq_id
);
283 BUG_ON(txq_id
!= txq
->swq_id
);
285 info
->status
.rates
[0].count
= tx_resp
->failure_frame
+ 1;
286 info
->flags
|= iwl_tx_status_to_mac80211(status
);
287 iwlagn_hwrate_to_tx_control(priv
,
288 le32_to_cpu(tx_resp
->rate_n_flags
),
291 IWL_DEBUG_TX_REPLY(priv
, "TXQ %d status %s (0x%08x) rate_n_flags "
294 iwl_get_tx_fail_reason(status
), status
,
295 le32_to_cpu(tx_resp
->rate_n_flags
),
296 tx_resp
->failure_frame
);
298 freed
= iwlagn_tx_queue_reclaim(priv
, txq_id
, index
);
299 iwl_free_tfds_in_queue(priv
, sta_id
, tid
, freed
);
301 if (priv
->mac80211_registered
&&
302 (iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
))
303 iwl_wake_queue(priv
, txq_id
);
306 iwlagn_txq_check_empty(priv
, sta_id
, tid
, txq_id
);
308 iwl_check_abort_status(priv
, tx_resp
->frame_count
, status
);
309 spin_unlock_irqrestore(&priv
->sta_lock
, flags
);
312 void iwlagn_rx_handler_setup(struct iwl_priv
*priv
)
314 /* init calibration handlers */
315 priv
->rx_handlers
[CALIBRATION_RES_NOTIFICATION
] =
316 iwlagn_rx_calib_result
;
317 priv
->rx_handlers
[CALIBRATION_COMPLETE_NOTIFICATION
] =
318 iwlagn_rx_calib_complete
;
319 priv
->rx_handlers
[REPLY_TX
] = iwlagn_rx_reply_tx
;
322 void iwlagn_setup_deferred_work(struct iwl_priv
*priv
)
324 /* in agn, the tx power calibration is done in uCode */
325 priv
->disable_tx_power_cal
= 1;
328 int iwlagn_hw_valid_rtc_data_addr(u32 addr
)
330 return (addr
>= IWLAGN_RTC_DATA_LOWER_BOUND
) &&
331 (addr
< IWLAGN_RTC_DATA_UPPER_BOUND
);
334 int iwlagn_send_tx_power(struct iwl_priv
*priv
)
336 struct iwl5000_tx_power_dbm_cmd tx_power_cmd
;
339 /* half dBm need to multiply */
340 tx_power_cmd
.global_lmt
= (s8
)(2 * priv
->tx_power_user_lmt
);
342 if (priv
->tx_power_lmt_in_half_dbm
&&
343 priv
->tx_power_lmt_in_half_dbm
< tx_power_cmd
.global_lmt
) {
345 * For the newer devices which using enhanced/extend tx power
346 * table in EEPROM, the format is in half dBm. driver need to
347 * convert to dBm format before report to mac80211.
348 * By doing so, there is a possibility of 1/2 dBm resolution
349 * lost. driver will perform "round-up" operation before
350 * reporting, but it will cause 1/2 dBm tx power over the
351 * regulatory limit. Perform the checking here, if the
352 * "tx_power_user_lmt" is higher than EEPROM value (in
353 * half-dBm format), lower the tx power based on EEPROM
355 tx_power_cmd
.global_lmt
= priv
->tx_power_lmt_in_half_dbm
;
357 tx_power_cmd
.flags
= IWL50_TX_POWER_NO_CLOSED
;
358 tx_power_cmd
.srv_chan_lmt
= IWL50_TX_POWER_AUTO
;
360 if (IWL_UCODE_API(priv
->ucode_ver
) == 1)
361 tx_ant_cfg_cmd
= REPLY_TX_POWER_DBM_CMD_V1
;
363 tx_ant_cfg_cmd
= REPLY_TX_POWER_DBM_CMD
;
365 return iwl_send_cmd_pdu_async(priv
, tx_ant_cfg_cmd
,
366 sizeof(tx_power_cmd
), &tx_power_cmd
,
370 void iwlagn_temperature(struct iwl_priv
*priv
)
372 /* store temperature from statistics (in Celsius) */
374 le32_to_cpu(priv
->_agn
.statistics
.general
.common
.temperature
);
375 iwl_tt_handler(priv
);
378 u16
iwlagn_eeprom_calib_version(struct iwl_priv
*priv
)
380 struct iwl_eeprom_calib_hdr
{
386 hdr
= (struct iwl_eeprom_calib_hdr
*)iwl_eeprom_query_addr(priv
,
395 static u32
eeprom_indirect_address(const struct iwl_priv
*priv
, u32 address
)
399 if ((address
& INDIRECT_ADDRESS
) == 0)
402 switch (address
& INDIRECT_TYPE_MSK
) {
404 offset
= iwl_eeprom_query16(priv
, EEPROM_LINK_HOST
);
406 case INDIRECT_GENERAL
:
407 offset
= iwl_eeprom_query16(priv
, EEPROM_LINK_GENERAL
);
409 case INDIRECT_REGULATORY
:
410 offset
= iwl_eeprom_query16(priv
, EEPROM_LINK_REGULATORY
);
412 case INDIRECT_CALIBRATION
:
413 offset
= iwl_eeprom_query16(priv
, EEPROM_LINK_CALIBRATION
);
415 case INDIRECT_PROCESS_ADJST
:
416 offset
= iwl_eeprom_query16(priv
, EEPROM_LINK_PROCESS_ADJST
);
418 case INDIRECT_OTHERS
:
419 offset
= iwl_eeprom_query16(priv
, EEPROM_LINK_OTHERS
);
422 IWL_ERR(priv
, "illegal indirect type: 0x%X\n",
423 address
& INDIRECT_TYPE_MSK
);
427 /* translate the offset from words to byte */
428 return (address
& ADDRESS_MSK
) + (offset
<< 1);
431 const u8
*iwlagn_eeprom_query_addr(const struct iwl_priv
*priv
,
434 u32 address
= eeprom_indirect_address(priv
, offset
);
435 BUG_ON(address
>= priv
->cfg
->eeprom_size
);
436 return &priv
->eeprom
[address
];
439 struct iwl_mod_params iwlagn_mod_params
= {
442 /* the rest are 0 by default */
445 void iwlagn_rx_queue_reset(struct iwl_priv
*priv
, struct iwl_rx_queue
*rxq
)
449 spin_lock_irqsave(&rxq
->lock
, flags
);
450 INIT_LIST_HEAD(&rxq
->rx_free
);
451 INIT_LIST_HEAD(&rxq
->rx_used
);
452 /* Fill the rx_used queue with _all_ of the Rx buffers */
453 for (i
= 0; i
< RX_FREE_BUFFERS
+ RX_QUEUE_SIZE
; i
++) {
454 /* In the reset function, these buffers may have been allocated
455 * to an SKB, so we need to unmap and free potential storage */
456 if (rxq
->pool
[i
].page
!= NULL
) {
457 pci_unmap_page(priv
->pci_dev
, rxq
->pool
[i
].page_dma
,
458 PAGE_SIZE
<< priv
->hw_params
.rx_page_order
,
460 __iwl_free_pages(priv
, rxq
->pool
[i
].page
);
461 rxq
->pool
[i
].page
= NULL
;
463 list_add_tail(&rxq
->pool
[i
].list
, &rxq
->rx_used
);
466 for (i
= 0; i
< RX_QUEUE_SIZE
; i
++)
467 rxq
->queue
[i
] = NULL
;
469 /* Set us so that we have processed and used all buffers, but have
470 * not restocked the Rx queue with fresh buffers */
471 rxq
->read
= rxq
->write
= 0;
472 rxq
->write_actual
= 0;
474 spin_unlock_irqrestore(&rxq
->lock
, flags
);
477 int iwlagn_rx_init(struct iwl_priv
*priv
, struct iwl_rx_queue
*rxq
)
480 const u32 rfdnlog
= RX_QUEUE_SIZE_LOG
; /* 256 RBDs */
481 u32 rb_timeout
= 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
483 if (!priv
->cfg
->use_isr_legacy
)
484 rb_timeout
= RX_RB_TIMEOUT
;
486 if (priv
->cfg
->mod_params
->amsdu_size_8K
)
487 rb_size
= FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K
;
489 rb_size
= FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K
;
492 iwl_write_direct32(priv
, FH_MEM_RCSR_CHNL0_CONFIG_REG
, 0);
494 /* Reset driver's Rx queue write index */
495 iwl_write_direct32(priv
, FH_RSCSR_CHNL0_RBDCB_WPTR_REG
, 0);
497 /* Tell device where to find RBD circular buffer in DRAM */
498 iwl_write_direct32(priv
, FH_RSCSR_CHNL0_RBDCB_BASE_REG
,
499 (u32
)(rxq
->bd_dma
>> 8));
501 /* Tell device where in DRAM to update its Rx status */
502 iwl_write_direct32(priv
, FH_RSCSR_CHNL0_STTS_WPTR_REG
,
503 rxq
->rb_stts_dma
>> 4);
506 * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
507 * the credit mechanism in 5000 HW RX FIFO
508 * Direct rx interrupts to hosts
509 * Rx buffer size 4 or 8k
513 iwl_write_direct32(priv
, FH_MEM_RCSR_CHNL0_CONFIG_REG
,
514 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL
|
515 FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY
|
516 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL
|
517 FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK
|
519 (rb_timeout
<< FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS
)|
520 (rfdnlog
<< FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS
));
522 /* Set interrupt coalescing timer to default (2048 usecs) */
523 iwl_write8(priv
, CSR_INT_COALESCING
, IWL_HOST_INT_TIMEOUT_DEF
);
528 int iwlagn_hw_nic_init(struct iwl_priv
*priv
)
531 struct iwl_rx_queue
*rxq
= &priv
->rxq
;
535 spin_lock_irqsave(&priv
->lock
, flags
);
536 priv
->cfg
->ops
->lib
->apm_ops
.init(priv
);
538 /* Set interrupt coalescing calibration timer to default (512 usecs) */
539 iwl_write8(priv
, CSR_INT_COALESCING
, IWL_HOST_INT_CALIB_TIMEOUT_DEF
);
541 spin_unlock_irqrestore(&priv
->lock
, flags
);
543 ret
= priv
->cfg
->ops
->lib
->apm_ops
.set_pwr_src(priv
, IWL_PWR_SRC_VMAIN
);
545 priv
->cfg
->ops
->lib
->apm_ops
.config(priv
);
547 /* Allocate the RX queue, or reset if it is already allocated */
549 ret
= iwl_rx_queue_alloc(priv
);
551 IWL_ERR(priv
, "Unable to initialize Rx queue\n");
555 iwlagn_rx_queue_reset(priv
, rxq
);
557 iwlagn_rx_replenish(priv
);
559 iwlagn_rx_init(priv
, rxq
);
561 spin_lock_irqsave(&priv
->lock
, flags
);
563 rxq
->need_update
= 1;
564 iwl_rx_queue_update_write_ptr(priv
, rxq
);
566 spin_unlock_irqrestore(&priv
->lock
, flags
);
568 /* Allocate or reset and init all Tx and Command queues */
570 ret
= iwlagn_txq_ctx_alloc(priv
);
574 iwlagn_txq_ctx_reset(priv
);
576 set_bit(STATUS_INIT
, &priv
->status
);
582 * iwlagn_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
584 static inline __le32
iwlagn_dma_addr2rbd_ptr(struct iwl_priv
*priv
,
587 return cpu_to_le32((u32
)(dma_addr
>> 8));
591 * iwlagn_rx_queue_restock - refill RX queue from pre-allocated pool
593 * If there are slots in the RX queue that need to be restocked,
594 * and we have free pre-allocated buffers, fill the ranks as much
595 * as we can, pulling from rx_free.
597 * This moves the 'write' index forward to catch up with 'processed', and
598 * also updates the memory address in the firmware to reference the new
601 void iwlagn_rx_queue_restock(struct iwl_priv
*priv
)
603 struct iwl_rx_queue
*rxq
= &priv
->rxq
;
604 struct list_head
*element
;
605 struct iwl_rx_mem_buffer
*rxb
;
608 spin_lock_irqsave(&rxq
->lock
, flags
);
609 while ((iwl_rx_queue_space(rxq
) > 0) && (rxq
->free_count
)) {
610 /* The overwritten rxb must be a used one */
611 rxb
= rxq
->queue
[rxq
->write
];
612 BUG_ON(rxb
&& rxb
->page
);
614 /* Get next free Rx buffer, remove from free list */
615 element
= rxq
->rx_free
.next
;
616 rxb
= list_entry(element
, struct iwl_rx_mem_buffer
, list
);
619 /* Point to Rx buffer via next RBD in circular buffer */
620 rxq
->bd
[rxq
->write
] = iwlagn_dma_addr2rbd_ptr(priv
,
622 rxq
->queue
[rxq
->write
] = rxb
;
623 rxq
->write
= (rxq
->write
+ 1) & RX_QUEUE_MASK
;
626 spin_unlock_irqrestore(&rxq
->lock
, flags
);
627 /* If the pre-allocated buffer pool is dropping low, schedule to
629 if (rxq
->free_count
<= RX_LOW_WATERMARK
)
630 queue_work(priv
->workqueue
, &priv
->rx_replenish
);
633 /* If we've added more space for the firmware to place data, tell it.
634 * Increment device's write pointer in multiples of 8. */
635 if (rxq
->write_actual
!= (rxq
->write
& ~0x7)) {
636 spin_lock_irqsave(&rxq
->lock
, flags
);
637 rxq
->need_update
= 1;
638 spin_unlock_irqrestore(&rxq
->lock
, flags
);
639 iwl_rx_queue_update_write_ptr(priv
, rxq
);
644 * iwlagn_rx_replenish - Move all used packet from rx_used to rx_free
646 * When moving to rx_free an SKB is allocated for the slot.
648 * Also restock the Rx queue via iwl_rx_queue_restock.
649 * This is called as a scheduled work item (except for during initialization)
651 void iwlagn_rx_allocate(struct iwl_priv
*priv
, gfp_t priority
)
653 struct iwl_rx_queue
*rxq
= &priv
->rxq
;
654 struct list_head
*element
;
655 struct iwl_rx_mem_buffer
*rxb
;
658 gfp_t gfp_mask
= priority
;
661 spin_lock_irqsave(&rxq
->lock
, flags
);
662 if (list_empty(&rxq
->rx_used
)) {
663 spin_unlock_irqrestore(&rxq
->lock
, flags
);
666 spin_unlock_irqrestore(&rxq
->lock
, flags
);
668 if (rxq
->free_count
> RX_LOW_WATERMARK
)
669 gfp_mask
|= __GFP_NOWARN
;
671 if (priv
->hw_params
.rx_page_order
> 0)
672 gfp_mask
|= __GFP_COMP
;
674 /* Alloc a new receive buffer */
675 page
= alloc_pages(gfp_mask
, priv
->hw_params
.rx_page_order
);
678 IWL_DEBUG_INFO(priv
, "alloc_pages failed, "
680 priv
->hw_params
.rx_page_order
);
682 if ((rxq
->free_count
<= RX_LOW_WATERMARK
) &&
684 IWL_CRIT(priv
, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
685 priority
== GFP_ATOMIC
? "GFP_ATOMIC" : "GFP_KERNEL",
687 /* We don't reschedule replenish work here -- we will
688 * call the restock method and if it still needs
689 * more buffers it will schedule replenish */
693 spin_lock_irqsave(&rxq
->lock
, flags
);
695 if (list_empty(&rxq
->rx_used
)) {
696 spin_unlock_irqrestore(&rxq
->lock
, flags
);
697 __free_pages(page
, priv
->hw_params
.rx_page_order
);
700 element
= rxq
->rx_used
.next
;
701 rxb
= list_entry(element
, struct iwl_rx_mem_buffer
, list
);
704 spin_unlock_irqrestore(&rxq
->lock
, flags
);
708 /* Get physical address of the RB */
709 rxb
->page_dma
= pci_map_page(priv
->pci_dev
, page
, 0,
710 PAGE_SIZE
<< priv
->hw_params
.rx_page_order
,
712 /* dma address must be no more than 36 bits */
713 BUG_ON(rxb
->page_dma
& ~DMA_BIT_MASK(36));
714 /* and also 256 byte aligned! */
715 BUG_ON(rxb
->page_dma
& DMA_BIT_MASK(8));
717 spin_lock_irqsave(&rxq
->lock
, flags
);
719 list_add_tail(&rxb
->list
, &rxq
->rx_free
);
721 priv
->alloc_rxb_page
++;
723 spin_unlock_irqrestore(&rxq
->lock
, flags
);
727 void iwlagn_rx_replenish(struct iwl_priv
*priv
)
731 iwlagn_rx_allocate(priv
, GFP_KERNEL
);
733 spin_lock_irqsave(&priv
->lock
, flags
);
734 iwlagn_rx_queue_restock(priv
);
735 spin_unlock_irqrestore(&priv
->lock
, flags
);
738 void iwlagn_rx_replenish_now(struct iwl_priv
*priv
)
740 iwlagn_rx_allocate(priv
, GFP_ATOMIC
);
742 iwlagn_rx_queue_restock(priv
);
745 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
746 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
747 * This free routine walks the list of POOL entries and if SKB is set to
748 * non NULL it is unmapped and freed
750 void iwlagn_rx_queue_free(struct iwl_priv
*priv
, struct iwl_rx_queue
*rxq
)
753 for (i
= 0; i
< RX_QUEUE_SIZE
+ RX_FREE_BUFFERS
; i
++) {
754 if (rxq
->pool
[i
].page
!= NULL
) {
755 pci_unmap_page(priv
->pci_dev
, rxq
->pool
[i
].page_dma
,
756 PAGE_SIZE
<< priv
->hw_params
.rx_page_order
,
758 __iwl_free_pages(priv
, rxq
->pool
[i
].page
);
759 rxq
->pool
[i
].page
= NULL
;
763 dma_free_coherent(&priv
->pci_dev
->dev
, 4 * RX_QUEUE_SIZE
, rxq
->bd
,
765 dma_free_coherent(&priv
->pci_dev
->dev
, sizeof(struct iwl_rb_status
),
766 rxq
->rb_stts
, rxq
->rb_stts_dma
);
771 int iwlagn_rxq_stop(struct iwl_priv
*priv
)
775 iwl_write_direct32(priv
, FH_MEM_RCSR_CHNL0_CONFIG_REG
, 0);
776 iwl_poll_direct_bit(priv
, FH_MEM_RSSR_RX_STATUS_REG
,
777 FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE
, 1000);
782 int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags
, enum ieee80211_band band
)
787 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
788 if (rate_n_flags
& RATE_MCS_HT_MSK
) {
789 idx
= (rate_n_flags
& 0xff);
791 /* Legacy rate format, search for match in table */
793 if (band
== IEEE80211_BAND_5GHZ
)
794 band_offset
= IWL_FIRST_OFDM_RATE
;
795 for (idx
= band_offset
; idx
< IWL_RATE_COUNT_LEGACY
; idx
++)
796 if (iwl_rates
[idx
].plcp
== (rate_n_flags
& 0xFF))
797 return idx
- band_offset
;
803 /* Calc max signal level (dBm) among 3 possible receivers */
804 static inline int iwlagn_calc_rssi(struct iwl_priv
*priv
,
805 struct iwl_rx_phy_res
*rx_resp
)
807 return priv
->cfg
->ops
->utils
->calc_rssi(priv
, rx_resp
);
810 static u32
iwlagn_translate_rx_status(struct iwl_priv
*priv
, u32 decrypt_in
)
814 if ((decrypt_in
& RX_RES_STATUS_STATION_FOUND
) ==
815 RX_RES_STATUS_STATION_FOUND
)
816 decrypt_out
|= (RX_RES_STATUS_STATION_FOUND
|
817 RX_RES_STATUS_NO_STATION_INFO_MISMATCH
);
819 decrypt_out
|= (decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
);
821 /* packet was not encrypted */
822 if ((decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
) ==
823 RX_RES_STATUS_SEC_TYPE_NONE
)
826 /* packet was encrypted with unknown alg */
827 if ((decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
) ==
828 RX_RES_STATUS_SEC_TYPE_ERR
)
831 /* decryption was not done in HW */
832 if ((decrypt_in
& RX_MPDU_RES_STATUS_DEC_DONE_MSK
) !=
833 RX_MPDU_RES_STATUS_DEC_DONE_MSK
)
836 switch (decrypt_in
& RX_RES_STATUS_SEC_TYPE_MSK
) {
838 case RX_RES_STATUS_SEC_TYPE_CCMP
:
839 /* alg is CCM: check MIC only */
840 if (!(decrypt_in
& RX_MPDU_RES_STATUS_MIC_OK
))
842 decrypt_out
|= RX_RES_STATUS_BAD_ICV_MIC
;
844 decrypt_out
|= RX_RES_STATUS_DECRYPT_OK
;
848 case RX_RES_STATUS_SEC_TYPE_TKIP
:
849 if (!(decrypt_in
& RX_MPDU_RES_STATUS_TTAK_OK
)) {
851 decrypt_out
|= RX_RES_STATUS_BAD_KEY_TTAK
;
854 /* fall through if TTAK OK */
856 if (!(decrypt_in
& RX_MPDU_RES_STATUS_ICV_OK
))
857 decrypt_out
|= RX_RES_STATUS_BAD_ICV_MIC
;
859 decrypt_out
|= RX_RES_STATUS_DECRYPT_OK
;
863 IWL_DEBUG_RX(priv
, "decrypt_in:0x%x decrypt_out = 0x%x\n",
864 decrypt_in
, decrypt_out
);
869 static void iwlagn_pass_packet_to_mac80211(struct iwl_priv
*priv
,
870 struct ieee80211_hdr
*hdr
,
873 struct iwl_rx_mem_buffer
*rxb
,
874 struct ieee80211_rx_status
*stats
)
877 __le16 fc
= hdr
->frame_control
;
879 /* We only process data packets if the interface is open */
880 if (unlikely(!priv
->is_open
)) {
881 IWL_DEBUG_DROP_LIMIT(priv
,
882 "Dropping packet while interface is not open.\n");
886 /* In case of HW accelerated crypto and bad decryption, drop */
887 if (!priv
->cfg
->mod_params
->sw_crypto
&&
888 iwl_set_decrypted_flag(priv
, hdr
, ampdu_status
, stats
))
891 skb
= dev_alloc_skb(128);
893 IWL_ERR(priv
, "dev_alloc_skb failed\n");
897 skb_add_rx_frag(skb
, 0, rxb
->page
, (void *)hdr
- rxb_addr(rxb
), len
);
899 iwl_update_stats(priv
, false, fc
, len
);
900 memcpy(IEEE80211_SKB_RXCB(skb
), stats
, sizeof(*stats
));
902 ieee80211_rx(priv
->hw
, skb
);
903 priv
->alloc_rxb_page
--;
907 /* Called for REPLY_RX (legacy ABG frames), or
908 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
909 void iwlagn_rx_reply_rx(struct iwl_priv
*priv
,
910 struct iwl_rx_mem_buffer
*rxb
)
912 struct ieee80211_hdr
*header
;
913 struct ieee80211_rx_status rx_status
;
914 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
915 struct iwl_rx_phy_res
*phy_res
;
916 __le32 rx_pkt_status
;
917 struct iwl_rx_mpdu_res_start
*amsdu
;
923 * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
924 * REPLY_RX: physical layer info is in this buffer
925 * REPLY_RX_MPDU_CMD: physical layer info was sent in separate
926 * command and cached in priv->last_phy_res
928 * Here we set up local variables depending on which command is
931 if (pkt
->hdr
.cmd
== REPLY_RX
) {
932 phy_res
= (struct iwl_rx_phy_res
*)pkt
->u
.raw
;
933 header
= (struct ieee80211_hdr
*)(pkt
->u
.raw
+ sizeof(*phy_res
)
934 + phy_res
->cfg_phy_cnt
);
936 len
= le16_to_cpu(phy_res
->byte_count
);
937 rx_pkt_status
= *(__le32
*)(pkt
->u
.raw
+ sizeof(*phy_res
) +
938 phy_res
->cfg_phy_cnt
+ len
);
939 ampdu_status
= le32_to_cpu(rx_pkt_status
);
941 if (!priv
->_agn
.last_phy_res_valid
) {
942 IWL_ERR(priv
, "MPDU frame without cached PHY data\n");
945 phy_res
= &priv
->_agn
.last_phy_res
;
946 amsdu
= (struct iwl_rx_mpdu_res_start
*)pkt
->u
.raw
;
947 header
= (struct ieee80211_hdr
*)(pkt
->u
.raw
+ sizeof(*amsdu
));
948 len
= le16_to_cpu(amsdu
->byte_count
);
949 rx_pkt_status
= *(__le32
*)(pkt
->u
.raw
+ sizeof(*amsdu
) + len
);
950 ampdu_status
= iwlagn_translate_rx_status(priv
,
951 le32_to_cpu(rx_pkt_status
));
954 if ((unlikely(phy_res
->cfg_phy_cnt
> 20))) {
955 IWL_DEBUG_DROP(priv
, "dsp size out of range [0,20]: %d/n",
956 phy_res
->cfg_phy_cnt
);
960 if (!(rx_pkt_status
& RX_RES_STATUS_NO_CRC32_ERROR
) ||
961 !(rx_pkt_status
& RX_RES_STATUS_NO_RXE_OVERFLOW
)) {
962 IWL_DEBUG_RX(priv
, "Bad CRC or FIFO: 0x%08X.\n",
963 le32_to_cpu(rx_pkt_status
));
967 /* This will be used in several places later */
968 rate_n_flags
= le32_to_cpu(phy_res
->rate_n_flags
);
970 /* rx_status carries information about the packet to mac80211 */
971 rx_status
.mactime
= le64_to_cpu(phy_res
->timestamp
);
973 ieee80211_channel_to_frequency(le16_to_cpu(phy_res
->channel
));
974 rx_status
.band
= (phy_res
->phy_flags
& RX_RES_PHY_FLAGS_BAND_24_MSK
) ?
975 IEEE80211_BAND_2GHZ
: IEEE80211_BAND_5GHZ
;
977 iwlagn_hwrate_to_mac80211_idx(rate_n_flags
, rx_status
.band
);
980 /* TSF isn't reliable. In order to allow smooth user experience,
981 * this W/A doesn't propagate it to the mac80211 */
982 /*rx_status.flag |= RX_FLAG_TSFT;*/
984 priv
->ucode_beacon_time
= le32_to_cpu(phy_res
->beacon_time_stamp
);
986 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
987 rx_status
.signal
= iwlagn_calc_rssi(priv
, phy_res
);
989 iwl_dbg_log_rx_data_frame(priv
, len
, header
);
990 IWL_DEBUG_STATS_LIMIT(priv
, "Rssi %d, TSF %llu\n",
991 rx_status
.signal
, (unsigned long long)rx_status
.mactime
);
996 * It seems that the antenna field in the phy flags value
997 * is actually a bit field. This is undefined by radiotap,
998 * it wants an actual antenna number but I always get "7"
999 * for most legacy frames I receive indicating that the
1000 * same frame was received on all three RX chains.
1002 * I think this field should be removed in favor of a
1003 * new 802.11n radiotap field "RX chains" that is defined
1007 (le16_to_cpu(phy_res
->phy_flags
) & RX_RES_PHY_FLAGS_ANTENNA_MSK
)
1008 >> RX_RES_PHY_FLAGS_ANTENNA_POS
;
1010 /* set the preamble flag if appropriate */
1011 if (phy_res
->phy_flags
& RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK
)
1012 rx_status
.flag
|= RX_FLAG_SHORTPRE
;
1014 /* Set up the HT phy flags */
1015 if (rate_n_flags
& RATE_MCS_HT_MSK
)
1016 rx_status
.flag
|= RX_FLAG_HT
;
1017 if (rate_n_flags
& RATE_MCS_HT40_MSK
)
1018 rx_status
.flag
|= RX_FLAG_40MHZ
;
1019 if (rate_n_flags
& RATE_MCS_SGI_MSK
)
1020 rx_status
.flag
|= RX_FLAG_SHORT_GI
;
1022 iwlagn_pass_packet_to_mac80211(priv
, header
, len
, ampdu_status
,
1026 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1027 * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1028 void iwlagn_rx_reply_rx_phy(struct iwl_priv
*priv
,
1029 struct iwl_rx_mem_buffer
*rxb
)
1031 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
1032 priv
->_agn
.last_phy_res_valid
= true;
1033 memcpy(&priv
->_agn
.last_phy_res
, pkt
->u
.raw
,
1034 sizeof(struct iwl_rx_phy_res
));
1037 static int iwl_get_single_channel_for_scan(struct iwl_priv
*priv
,
1038 struct ieee80211_vif
*vif
,
1039 enum ieee80211_band band
,
1040 struct iwl_scan_channel
*scan_ch
)
1042 const struct ieee80211_supported_band
*sband
;
1043 u16 passive_dwell
= 0;
1044 u16 active_dwell
= 0;
1048 sband
= iwl_get_hw_mode(priv
, band
);
1050 IWL_ERR(priv
, "invalid band\n");
1054 active_dwell
= iwl_get_active_dwell_time(priv
, band
, 0);
1055 passive_dwell
= iwl_get_passive_dwell_time(priv
, band
, vif
);
1057 if (passive_dwell
<= active_dwell
)
1058 passive_dwell
= active_dwell
+ 1;
1060 channel
= iwl_get_single_channel_number(priv
, band
);
1062 scan_ch
->channel
= cpu_to_le16(channel
);
1063 scan_ch
->type
= SCAN_CHANNEL_TYPE_PASSIVE
;
1064 scan_ch
->active_dwell
= cpu_to_le16(active_dwell
);
1065 scan_ch
->passive_dwell
= cpu_to_le16(passive_dwell
);
1066 /* Set txpower levels to defaults */
1067 scan_ch
->dsp_atten
= 110;
1068 if (band
== IEEE80211_BAND_5GHZ
)
1069 scan_ch
->tx_gain
= ((1 << 5) | (3 << 3)) | 3;
1071 scan_ch
->tx_gain
= ((1 << 5) | (5 << 3));
1074 IWL_ERR(priv
, "no valid channel found\n");
1078 static int iwl_get_channels_for_scan(struct iwl_priv
*priv
,
1079 struct ieee80211_vif
*vif
,
1080 enum ieee80211_band band
,
1081 u8 is_active
, u8 n_probes
,
1082 struct iwl_scan_channel
*scan_ch
)
1084 struct ieee80211_channel
*chan
;
1085 const struct ieee80211_supported_band
*sband
;
1086 const struct iwl_channel_info
*ch_info
;
1087 u16 passive_dwell
= 0;
1088 u16 active_dwell
= 0;
1092 sband
= iwl_get_hw_mode(priv
, band
);
1096 active_dwell
= iwl_get_active_dwell_time(priv
, band
, n_probes
);
1097 passive_dwell
= iwl_get_passive_dwell_time(priv
, band
, vif
);
1099 if (passive_dwell
<= active_dwell
)
1100 passive_dwell
= active_dwell
+ 1;
1102 for (i
= 0, added
= 0; i
< priv
->scan_request
->n_channels
; i
++) {
1103 chan
= priv
->scan_request
->channels
[i
];
1105 if (chan
->band
!= band
)
1108 channel
= chan
->hw_value
;
1109 scan_ch
->channel
= cpu_to_le16(channel
);
1111 ch_info
= iwl_get_channel_info(priv
, band
, channel
);
1112 if (!is_channel_valid(ch_info
)) {
1113 IWL_DEBUG_SCAN(priv
, "Channel %d is INVALID for this band.\n",
1118 if (!is_active
|| is_channel_passive(ch_info
) ||
1119 (chan
->flags
& IEEE80211_CHAN_PASSIVE_SCAN
))
1120 scan_ch
->type
= SCAN_CHANNEL_TYPE_PASSIVE
;
1122 scan_ch
->type
= SCAN_CHANNEL_TYPE_ACTIVE
;
1125 scan_ch
->type
|= IWL_SCAN_PROBE_MASK(n_probes
);
1127 scan_ch
->active_dwell
= cpu_to_le16(active_dwell
);
1128 scan_ch
->passive_dwell
= cpu_to_le16(passive_dwell
);
1130 /* Set txpower levels to defaults */
1131 scan_ch
->dsp_atten
= 110;
1133 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1135 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
1137 if (band
== IEEE80211_BAND_5GHZ
)
1138 scan_ch
->tx_gain
= ((1 << 5) | (3 << 3)) | 3;
1140 scan_ch
->tx_gain
= ((1 << 5) | (5 << 3));
1142 IWL_DEBUG_SCAN(priv
, "Scanning ch=%d prob=0x%X [%s %d]\n",
1143 channel
, le32_to_cpu(scan_ch
->type
),
1144 (scan_ch
->type
& SCAN_CHANNEL_TYPE_ACTIVE
) ?
1145 "ACTIVE" : "PASSIVE",
1146 (scan_ch
->type
& SCAN_CHANNEL_TYPE_ACTIVE
) ?
1147 active_dwell
: passive_dwell
);
1153 IWL_DEBUG_SCAN(priv
, "total channels to scan %d\n", added
);
1157 void iwlagn_request_scan(struct iwl_priv
*priv
, struct ieee80211_vif
*vif
)
1159 struct iwl_host_cmd cmd
= {
1160 .id
= REPLY_SCAN_CMD
,
1161 .len
= sizeof(struct iwl_scan_cmd
),
1162 .flags
= CMD_SIZE_HUGE
,
1164 struct iwl_scan_cmd
*scan
;
1165 struct ieee80211_conf
*conf
= NULL
;
1169 enum ieee80211_band band
;
1171 u8 rx_ant
= priv
->hw_params
.valid_rx_ant
;
1173 bool is_active
= false;
1176 u8 scan_tx_antennas
= priv
->hw_params
.valid_tx_ant
;
1178 conf
= ieee80211_get_hw_conf(priv
->hw
);
1180 cancel_delayed_work(&priv
->scan_check
);
1182 if (!iwl_is_ready(priv
)) {
1183 IWL_WARN(priv
, "request scan called when driver not ready.\n");
1187 /* Make sure the scan wasn't canceled before this queued work
1188 * was given the chance to run... */
1189 if (!test_bit(STATUS_SCANNING
, &priv
->status
))
1192 /* This should never be called or scheduled if there is currently
1193 * a scan active in the hardware. */
1194 if (test_bit(STATUS_SCAN_HW
, &priv
->status
)) {
1195 IWL_DEBUG_INFO(priv
, "Multiple concurrent scan requests in parallel. "
1196 "Ignoring second request.\n");
1200 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
)) {
1201 IWL_DEBUG_SCAN(priv
, "Aborting scan due to device shutdown\n");
1205 if (test_bit(STATUS_SCAN_ABORTING
, &priv
->status
)) {
1206 IWL_DEBUG_HC(priv
, "Scan request while abort pending. Queuing.\n");
1210 if (iwl_is_rfkill(priv
)) {
1211 IWL_DEBUG_HC(priv
, "Aborting scan due to RF Kill activation\n");
1215 if (!test_bit(STATUS_READY
, &priv
->status
)) {
1216 IWL_DEBUG_HC(priv
, "Scan request while uninitialized. Queuing.\n");
1220 if (!priv
->scan_cmd
) {
1221 priv
->scan_cmd
= kmalloc(sizeof(struct iwl_scan_cmd
) +
1222 IWL_MAX_SCAN_SIZE
, GFP_KERNEL
);
1223 if (!priv
->scan_cmd
) {
1224 IWL_DEBUG_SCAN(priv
,
1225 "fail to allocate memory for scan\n");
1229 scan
= priv
->scan_cmd
;
1230 memset(scan
, 0, sizeof(struct iwl_scan_cmd
) + IWL_MAX_SCAN_SIZE
);
1232 scan
->quiet_plcp_th
= IWL_PLCP_QUIET_THRESH
;
1233 scan
->quiet_time
= IWL_ACTIVE_QUIET_TIME
;
1235 if (iwl_is_associated(priv
)) {
1238 u32 suspend_time
= 100;
1239 u32 scan_suspend_time
= 100;
1240 unsigned long flags
;
1242 IWL_DEBUG_INFO(priv
, "Scanning while associated...\n");
1243 spin_lock_irqsave(&priv
->lock
, flags
);
1244 if (priv
->is_internal_short_scan
)
1247 interval
= vif
->bss_conf
.beacon_int
;
1248 spin_unlock_irqrestore(&priv
->lock
, flags
);
1250 scan
->suspend_time
= 0;
1251 scan
->max_out_time
= cpu_to_le32(200 * 1024);
1253 interval
= suspend_time
;
1255 extra
= (suspend_time
/ interval
) << 22;
1256 scan_suspend_time
= (extra
|
1257 ((suspend_time
% interval
) * 1024));
1258 scan
->suspend_time
= cpu_to_le32(scan_suspend_time
);
1259 IWL_DEBUG_SCAN(priv
, "suspend_time 0x%X beacon interval %d\n",
1260 scan_suspend_time
, interval
);
1263 if (priv
->is_internal_short_scan
) {
1264 IWL_DEBUG_SCAN(priv
, "Start internal passive scan.\n");
1265 } else if (priv
->scan_request
->n_ssids
) {
1267 IWL_DEBUG_SCAN(priv
, "Kicking off active scan\n");
1268 for (i
= 0; i
< priv
->scan_request
->n_ssids
; i
++) {
1269 /* always does wildcard anyway */
1270 if (!priv
->scan_request
->ssids
[i
].ssid_len
)
1272 scan
->direct_scan
[p
].id
= WLAN_EID_SSID
;
1273 scan
->direct_scan
[p
].len
=
1274 priv
->scan_request
->ssids
[i
].ssid_len
;
1275 memcpy(scan
->direct_scan
[p
].ssid
,
1276 priv
->scan_request
->ssids
[i
].ssid
,
1277 priv
->scan_request
->ssids
[i
].ssid_len
);
1283 IWL_DEBUG_SCAN(priv
, "Start passive scan.\n");
1285 scan
->tx_cmd
.tx_flags
= TX_CMD_FLG_SEQ_CTL_MSK
;
1286 scan
->tx_cmd
.sta_id
= priv
->hw_params
.bcast_sta_id
;
1287 scan
->tx_cmd
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
1289 switch (priv
->scan_band
) {
1290 case IEEE80211_BAND_2GHZ
:
1291 scan
->flags
= RXON_FLG_BAND_24G_MSK
| RXON_FLG_AUTO_DETECT_MSK
;
1292 chan_mod
= le32_to_cpu(priv
->active_rxon
.flags
& RXON_FLG_CHANNEL_MODE_MSK
)
1293 >> RXON_FLG_CHANNEL_MODE_POS
;
1294 if (chan_mod
== CHANNEL_MODE_PURE_40
) {
1295 rate
= IWL_RATE_6M_PLCP
;
1297 rate
= IWL_RATE_1M_PLCP
;
1298 rate_flags
= RATE_MCS_CCK_MSK
;
1301 * Internal scans are passive, so we can indiscriminately set
1302 * the BT ignore flag on 2.4 GHz since it applies to TX only.
1304 if (priv
->cfg
->advanced_bt_coexist
)
1305 scan
->tx_cmd
.tx_flags
|= TX_CMD_FLG_IGNORE_BT
;
1306 scan
->good_CRC_th
= IWL_GOOD_CRC_TH_DISABLED
;
1308 case IEEE80211_BAND_5GHZ
:
1309 rate
= IWL_RATE_6M_PLCP
;
1311 * If active scanning is requested but a certain channel is
1312 * marked passive, we can do active scanning if we detect
1315 * There is an issue with some firmware versions that triggers
1316 * a sysassert on a "good CRC threshold" of zero (== disabled),
1317 * on a radar channel even though this means that we should NOT
1320 * The "good CRC threshold" is the number of frames that we
1321 * need to receive during our dwell time on a channel before
1322 * sending out probes -- setting this to a huge value will
1323 * mean we never reach it, but at the same time work around
1324 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
1325 * here instead of IWL_GOOD_CRC_TH_DISABLED.
1327 scan
->good_CRC_th
= is_active
? IWL_GOOD_CRC_TH_DEFAULT
:
1328 IWL_GOOD_CRC_TH_NEVER
;
1331 IWL_WARN(priv
, "Invalid scan band count\n");
1335 band
= priv
->scan_band
;
1337 if (priv
->cfg
->scan_rx_antennas
[band
])
1338 rx_ant
= priv
->cfg
->scan_rx_antennas
[band
];
1340 if (priv
->cfg
->scan_tx_antennas
[band
])
1341 scan_tx_antennas
= priv
->cfg
->scan_tx_antennas
[band
];
1343 if (priv
->cfg
->advanced_bt_coexist
&& priv
->bt_full_concurrent
) {
1344 /* operated as 1x1 in full concurrency mode */
1346 first_antenna(priv
->cfg
->scan_tx_antennas
[band
]);
1349 priv
->scan_tx_ant
[band
] = iwl_toggle_tx_ant(priv
, priv
->scan_tx_ant
[band
],
1351 rate_flags
|= iwl_ant_idx_to_flags(priv
->scan_tx_ant
[band
]);
1352 scan
->tx_cmd
.rate_n_flags
= iwl_hw_set_rate_n_flags(rate
, rate_flags
);
1354 /* In power save mode use one chain, otherwise use all chains */
1355 if (test_bit(STATUS_POWER_PMI
, &priv
->status
)) {
1356 /* rx_ant has been set to all valid chains previously */
1357 active_chains
= rx_ant
&
1358 ((u8
)(priv
->chain_noise_data
.active_chains
));
1360 active_chains
= rx_ant
;
1362 IWL_DEBUG_SCAN(priv
, "chain_noise_data.active_chains: %u\n",
1363 priv
->chain_noise_data
.active_chains
);
1365 rx_ant
= first_antenna(active_chains
);
1367 if (priv
->cfg
->advanced_bt_coexist
&& priv
->bt_full_concurrent
) {
1368 /* operated as 1x1 in full concurrency mode */
1369 rx_ant
= first_antenna(rx_ant
);
1372 /* MIMO is not used here, but value is required */
1373 rx_chain
|= priv
->hw_params
.valid_rx_ant
<< RXON_RX_CHAIN_VALID_POS
;
1374 rx_chain
|= rx_ant
<< RXON_RX_CHAIN_FORCE_MIMO_SEL_POS
;
1375 rx_chain
|= rx_ant
<< RXON_RX_CHAIN_FORCE_SEL_POS
;
1376 rx_chain
|= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS
;
1377 scan
->rx_chain
= cpu_to_le16(rx_chain
);
1378 if (!priv
->is_internal_short_scan
) {
1379 cmd_len
= iwl_fill_probe_req(priv
,
1380 (struct ieee80211_mgmt
*)scan
->data
,
1382 priv
->scan_request
->ie
,
1383 priv
->scan_request
->ie_len
,
1384 IWL_MAX_SCAN_SIZE
- sizeof(*scan
));
1386 /* use bcast addr, will not be transmitted but must be valid */
1387 cmd_len
= iwl_fill_probe_req(priv
,
1388 (struct ieee80211_mgmt
*)scan
->data
,
1389 iwl_bcast_addr
, NULL
, 0,
1390 IWL_MAX_SCAN_SIZE
- sizeof(*scan
));
1393 scan
->tx_cmd
.len
= cpu_to_le16(cmd_len
);
1395 scan
->filter_flags
|= (RXON_FILTER_ACCEPT_GRP_MSK
|
1396 RXON_FILTER_BCON_AWARE_MSK
);
1398 if (priv
->is_internal_short_scan
) {
1399 scan
->channel_count
=
1400 iwl_get_single_channel_for_scan(priv
, vif
, band
,
1401 (void *)&scan
->data
[le16_to_cpu(
1402 scan
->tx_cmd
.len
)]);
1404 scan
->channel_count
=
1405 iwl_get_channels_for_scan(priv
, vif
, band
,
1406 is_active
, n_probes
,
1407 (void *)&scan
->data
[le16_to_cpu(
1408 scan
->tx_cmd
.len
)]);
1410 if (scan
->channel_count
== 0) {
1411 IWL_DEBUG_SCAN(priv
, "channel count %d\n", scan
->channel_count
);
1415 cmd
.len
+= le16_to_cpu(scan
->tx_cmd
.len
) +
1416 scan
->channel_count
* sizeof(struct iwl_scan_channel
);
1418 scan
->len
= cpu_to_le16(cmd
.len
);
1420 set_bit(STATUS_SCAN_HW
, &priv
->status
);
1421 if (iwl_send_cmd_sync(priv
, &cmd
))
1424 queue_delayed_work(priv
->workqueue
, &priv
->scan_check
,
1425 IWL_SCAN_CHECK_WATCHDOG
);
1430 /* Cannot perform scan. Make sure we clear scanning
1431 * bits from status so next scan request can be performed.
1432 * If we don't clear scanning status bit here all next scan
1435 clear_bit(STATUS_SCAN_HW
, &priv
->status
);
1436 clear_bit(STATUS_SCANNING
, &priv
->status
);
1437 /* inform mac80211 scan aborted */
1438 queue_work(priv
->workqueue
, &priv
->scan_completed
);
1441 int iwlagn_manage_ibss_station(struct iwl_priv
*priv
,
1442 struct ieee80211_vif
*vif
, bool add
)
1444 struct iwl_vif_priv
*vif_priv
= (void *)vif
->drv_priv
;
1447 return iwl_add_bssid_station(priv
, vif
->bss_conf
.bssid
, true,
1448 &vif_priv
->ibss_bssid_sta_id
);
1449 return iwl_remove_station(priv
, vif_priv
->ibss_bssid_sta_id
,
1450 vif
->bss_conf
.bssid
);
1453 void iwl_free_tfds_in_queue(struct iwl_priv
*priv
,
1454 int sta_id
, int tid
, int freed
)
1456 lockdep_assert_held(&priv
->sta_lock
);
1458 if (priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
>= freed
)
1459 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
1461 IWL_DEBUG_TX(priv
, "free more than tfds_in_queue (%u:%d)\n",
1462 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
,
1464 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
= 0;
1468 #define IWL_FLUSH_WAIT_MS 2000
1470 int iwlagn_wait_tx_queue_empty(struct iwl_priv
*priv
)
1472 struct iwl_tx_queue
*txq
;
1473 struct iwl_queue
*q
;
1475 unsigned long now
= jiffies
;
1478 /* waiting for all the tx frames complete might take a while */
1479 for (cnt
= 0; cnt
< priv
->hw_params
.max_txq_num
; cnt
++) {
1480 if (cnt
== IWL_CMD_QUEUE_NUM
)
1482 txq
= &priv
->txq
[cnt
];
1484 while (q
->read_ptr
!= q
->write_ptr
&& !time_after(jiffies
,
1485 now
+ msecs_to_jiffies(IWL_FLUSH_WAIT_MS
)))
1488 if (q
->read_ptr
!= q
->write_ptr
) {
1489 IWL_ERR(priv
, "fail to flush all tx fifo queues\n");
1497 #define IWL_TX_QUEUE_MSK 0xfffff
1500 * iwlagn_txfifo_flush: send REPLY_TXFIFO_FLUSH command to uCode
1503 * 1. acquire mutex before calling
1504 * 2. make sure rf is on and not in exit state
1506 int iwlagn_txfifo_flush(struct iwl_priv
*priv
, u16 flush_control
)
1508 struct iwl_txfifo_flush_cmd flush_cmd
;
1509 struct iwl_host_cmd cmd
= {
1510 .id
= REPLY_TXFIFO_FLUSH
,
1511 .len
= sizeof(struct iwl_txfifo_flush_cmd
),
1518 memset(&flush_cmd
, 0, sizeof(flush_cmd
));
1519 flush_cmd
.fifo_control
= IWL_TX_FIFO_VO_MSK
| IWL_TX_FIFO_VI_MSK
|
1520 IWL_TX_FIFO_BE_MSK
| IWL_TX_FIFO_BK_MSK
;
1521 if (priv
->cfg
->sku
& IWL_SKU_N
)
1522 flush_cmd
.fifo_control
|= IWL_AGG_TX_QUEUE_MSK
;
1524 IWL_DEBUG_INFO(priv
, "fifo queue control: 0X%x\n",
1525 flush_cmd
.fifo_control
);
1526 flush_cmd
.flush_control
= cpu_to_le16(flush_control
);
1528 return iwl_send_cmd(priv
, &cmd
);
1531 void iwlagn_dev_txfifo_flush(struct iwl_priv
*priv
, u16 flush_control
)
1533 mutex_lock(&priv
->mutex
);
1534 ieee80211_stop_queues(priv
->hw
);
1535 if (priv
->cfg
->ops
->lib
->txfifo_flush(priv
, IWL_DROP_ALL
)) {
1536 IWL_ERR(priv
, "flush request fail\n");
1539 IWL_DEBUG_INFO(priv
, "wait transmit/flush all frames\n");
1540 iwlagn_wait_tx_queue_empty(priv
);
1542 ieee80211_wake_queues(priv
->hw
);
1543 mutex_unlock(&priv
->mutex
);
1550 * Macros to access the lookup table.
1552 * The lookup table has 7 inputs: bt3_prio, bt3_txrx, bt_rf_act, wifi_req,
1553 * wifi_prio, wifi_txrx and wifi_sh_ant_req.
1555 * It has three outputs: WLAN_ACTIVE, WLAN_KILL and ANT_SWITCH
1557 * The format is that "registers" 8 through 11 contain the WLAN_ACTIVE bits
1558 * one after another in 32-bit registers, and "registers" 0 through 7 contain
1559 * the WLAN_KILL and ANT_SWITCH bits interleaved (in that order).
1561 * These macros encode that format.
1563 #define LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, wifi_req, wifi_prio, \
1564 wifi_txrx, wifi_sh_ant_req) \
1565 (bt3_prio | (bt3_txrx << 1) | (bt_rf_act << 2) | (wifi_req << 3) | \
1566 (wifi_prio << 4) | (wifi_txrx << 5) | (wifi_sh_ant_req << 6))
1568 #define LUT_PTA_WLAN_ACTIVE_OP(lut, op, val) \
1569 lut[8 + ((val) >> 5)] op (cpu_to_le32(BIT((val) & 0x1f)))
1570 #define LUT_TEST_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1571 wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1572 (!!(LUT_PTA_WLAN_ACTIVE_OP(lut, &, LUT_VALUE(bt3_prio, bt3_txrx, \
1573 bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \
1575 #define LUT_SET_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1576 wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1577 LUT_PTA_WLAN_ACTIVE_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, \
1578 bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \
1580 #define LUT_CLEAR_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, \
1581 wifi_req, wifi_prio, wifi_txrx, \
1583 LUT_PTA_WLAN_ACTIVE_OP(lut, &= ~, LUT_VALUE(bt3_prio, bt3_txrx, \
1584 bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \
1587 #define LUT_WLAN_KILL_OP(lut, op, val) \
1588 lut[(val) >> 4] op (cpu_to_le32(BIT(((val) << 1) & 0x1e)))
1589 #define LUT_TEST_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1590 wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1591 (!!(LUT_WLAN_KILL_OP(lut, &, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1592 wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))))
1593 #define LUT_SET_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1594 wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1595 LUT_WLAN_KILL_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1596 wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
1597 #define LUT_CLEAR_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1598 wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1599 LUT_WLAN_KILL_OP(lut, &= ~, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1600 wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
1602 #define LUT_ANT_SWITCH_OP(lut, op, val) \
1603 lut[(val) >> 4] op (cpu_to_le32(BIT((((val) << 1) & 0x1e) + 1)))
1604 #define LUT_TEST_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1605 wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1606 (!!(LUT_ANT_SWITCH_OP(lut, &, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1607 wifi_req, wifi_prio, wifi_txrx, \
1609 #define LUT_SET_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1610 wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1611 LUT_ANT_SWITCH_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1612 wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
1613 #define LUT_CLEAR_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
1614 wifi_prio, wifi_txrx, wifi_sh_ant_req) \
1615 LUT_ANT_SWITCH_OP(lut, &= ~, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
1616 wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
1618 static const __le32 iwlagn_def_3w_lookup
[12] = {
1619 cpu_to_le32(0xaaaaaaaa),
1620 cpu_to_le32(0xaaaaaaaa),
1621 cpu_to_le32(0xaeaaaaaa),
1622 cpu_to_le32(0xaaaaaaaa),
1623 cpu_to_le32(0xcc00ff28),
1624 cpu_to_le32(0x0000aaaa),
1625 cpu_to_le32(0xcc00aaaa),
1626 cpu_to_le32(0x0000aaaa),
1627 cpu_to_le32(0xc0004000),
1628 cpu_to_le32(0x00004000),
1629 cpu_to_le32(0xf0005000),
1630 cpu_to_le32(0xf0004000),
1633 static const __le32 iwlagn_concurrent_lookup
[12] = {
1634 cpu_to_le32(0xaaaaaaaa),
1635 cpu_to_le32(0xaaaaaaaa),
1636 cpu_to_le32(0xaaaaaaaa),
1637 cpu_to_le32(0xaaaaaaaa),
1638 cpu_to_le32(0xaaaaaaaa),
1639 cpu_to_le32(0xaaaaaaaa),
1640 cpu_to_le32(0xaaaaaaaa),
1641 cpu_to_le32(0xaaaaaaaa),
1642 cpu_to_le32(0x00000000),
1643 cpu_to_le32(0x00000000),
1644 cpu_to_le32(0x00000000),
1645 cpu_to_le32(0x00000000),
1648 void iwlagn_send_advance_bt_config(struct iwl_priv
*priv
)
1650 struct iwlagn_bt_cmd bt_cmd
= {
1651 .max_kill
= IWLAGN_BT_MAX_KILL_DEFAULT
,
1652 .bt3_timer_t7_value
= IWLAGN_BT3_T7_DEFAULT
,
1653 .bt3_prio_sample_time
= IWLAGN_BT3_PRIO_SAMPLE_DEFAULT
,
1654 .bt3_timer_t2_value
= IWLAGN_BT3_T2_DEFAULT
,
1657 BUILD_BUG_ON(sizeof(iwlagn_def_3w_lookup
) !=
1658 sizeof(bt_cmd
.bt3_lookup_table
));
1660 bt_cmd
.prio_boost
= priv
->cfg
->bt_prio_boost
;
1661 bt_cmd
.kill_ack_mask
= priv
->kill_ack_mask
;
1662 bt_cmd
.kill_cts_mask
= priv
->kill_cts_mask
;
1663 bt_cmd
.valid
= priv
->bt_valid
;
1666 * Configure BT coex mode to "no coexistence" when the
1667 * user disabled BT coexistence, we have no interface
1668 * (might be in monitor mode), or the interface is in
1669 * IBSS mode (no proper uCode support for coex then).
1671 if (!bt_coex_active
|| priv
->iw_mode
== NL80211_IFTYPE_ADHOC
) {
1674 bt_cmd
.flags
= IWLAGN_BT_FLAG_COEX_MODE_3W
<<
1675 IWLAGN_BT_FLAG_COEX_MODE_SHIFT
;
1676 if (priv
->bt_ch_announce
)
1677 bt_cmd
.flags
|= IWLAGN_BT_FLAG_CHANNEL_INHIBITION
;
1678 IWL_DEBUG_INFO(priv
, "BT coex flag: 0X%x\n", bt_cmd
.flags
);
1680 if (priv
->bt_full_concurrent
)
1681 memcpy(bt_cmd
.bt3_lookup_table
, iwlagn_concurrent_lookup
,
1682 sizeof(iwlagn_concurrent_lookup
));
1684 memcpy(bt_cmd
.bt3_lookup_table
, iwlagn_def_3w_lookup
,
1685 sizeof(iwlagn_def_3w_lookup
));
1687 IWL_DEBUG_INFO(priv
, "BT coex %s in %s mode\n",
1688 bt_cmd
.flags
? "active" : "disabled",
1689 priv
->bt_full_concurrent
?
1690 "full concurrency" : "3-wire");
1692 if (iwl_send_cmd_pdu(priv
, REPLY_BT_CONFIG
, sizeof(bt_cmd
), &bt_cmd
))
1693 IWL_ERR(priv
, "failed to send BT Coex Config\n");
1696 * When we are doing a restart, need to also reconfigure BT
1697 * SCO to the device. If not doing a restart, bt_sco_active
1698 * will always be false, so there's no need to have an extra
1699 * variable to check for it.
1701 if (priv
->bt_sco_active
) {
1702 struct iwlagn_bt_sco_cmd sco_cmd
= { .flags
= 0 };
1704 if (priv
->bt_sco_active
)
1705 sco_cmd
.flags
|= IWLAGN_BT_SCO_ACTIVE
;
1706 if (iwl_send_cmd_pdu(priv
, REPLY_BT_COEX_SCO
,
1707 sizeof(sco_cmd
), &sco_cmd
))
1708 IWL_ERR(priv
, "failed to send BT SCO command\n");
1712 static void iwlagn_bt_traffic_change_work(struct work_struct
*work
)
1714 struct iwl_priv
*priv
=
1715 container_of(work
, struct iwl_priv
, bt_traffic_change_work
);
1716 int smps_request
= -1;
1718 IWL_DEBUG_INFO(priv
, "BT traffic load changes: %d\n",
1719 priv
->bt_traffic_load
);
1721 switch (priv
->bt_traffic_load
) {
1722 case IWL_BT_COEX_TRAFFIC_LOAD_NONE
:
1723 smps_request
= IEEE80211_SMPS_AUTOMATIC
;
1725 case IWL_BT_COEX_TRAFFIC_LOAD_LOW
:
1726 smps_request
= IEEE80211_SMPS_DYNAMIC
;
1728 case IWL_BT_COEX_TRAFFIC_LOAD_HIGH
:
1729 case IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS
:
1730 smps_request
= IEEE80211_SMPS_STATIC
;
1733 IWL_ERR(priv
, "Invalid BT traffic load: %d\n",
1734 priv
->bt_traffic_load
);
1738 mutex_lock(&priv
->mutex
);
1740 if (priv
->cfg
->ops
->lib
->update_chain_flags
)
1741 priv
->cfg
->ops
->lib
->update_chain_flags(priv
);
1743 if (smps_request
!= -1 &&
1744 priv
->vif
&& priv
->vif
->type
== NL80211_IFTYPE_STATION
)
1745 ieee80211_request_smps(priv
->vif
, smps_request
);
1747 mutex_unlock(&priv
->mutex
);
1750 static void iwlagn_print_uartmsg(struct iwl_priv
*priv
,
1751 struct iwl_bt_uart_msg
*uart_msg
)
1753 IWL_DEBUG_NOTIF(priv
, "Message Type = 0x%X, SSN = 0x%X, "
1754 "Update Req = 0x%X",
1755 (BT_UART_MSG_FRAME1MSGTYPE_MSK
& uart_msg
->frame1
) >>
1756 BT_UART_MSG_FRAME1MSGTYPE_POS
,
1757 (BT_UART_MSG_FRAME1SSN_MSK
& uart_msg
->frame1
) >>
1758 BT_UART_MSG_FRAME1SSN_POS
,
1759 (BT_UART_MSG_FRAME1UPDATEREQ_MSK
& uart_msg
->frame1
) >>
1760 BT_UART_MSG_FRAME1UPDATEREQ_POS
);
1762 IWL_DEBUG_NOTIF(priv
, "Open connections = 0x%X, Traffic load = 0x%X, "
1763 "Chl_SeqN = 0x%X, In band = 0x%X",
1764 (BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK
& uart_msg
->frame2
) >>
1765 BT_UART_MSG_FRAME2OPENCONNECTIONS_POS
,
1766 (BT_UART_MSG_FRAME2TRAFFICLOAD_MSK
& uart_msg
->frame2
) >>
1767 BT_UART_MSG_FRAME2TRAFFICLOAD_POS
,
1768 (BT_UART_MSG_FRAME2CHLSEQN_MSK
& uart_msg
->frame2
) >>
1769 BT_UART_MSG_FRAME2CHLSEQN_POS
,
1770 (BT_UART_MSG_FRAME2INBAND_MSK
& uart_msg
->frame2
) >>
1771 BT_UART_MSG_FRAME2INBAND_POS
);
1773 IWL_DEBUG_NOTIF(priv
, "SCO/eSCO = 0x%X, Sniff = 0x%X, A2DP = 0x%X, "
1774 "ACL = 0x%X, Master = 0x%X, OBEX = 0x%X",
1775 (BT_UART_MSG_FRAME3SCOESCO_MSK
& uart_msg
->frame3
) >>
1776 BT_UART_MSG_FRAME3SCOESCO_POS
,
1777 (BT_UART_MSG_FRAME3SNIFF_MSK
& uart_msg
->frame3
) >>
1778 BT_UART_MSG_FRAME3SNIFF_POS
,
1779 (BT_UART_MSG_FRAME3A2DP_MSK
& uart_msg
->frame3
) >>
1780 BT_UART_MSG_FRAME3A2DP_POS
,
1781 (BT_UART_MSG_FRAME3ACL_MSK
& uart_msg
->frame3
) >>
1782 BT_UART_MSG_FRAME3ACL_POS
,
1783 (BT_UART_MSG_FRAME3MASTER_MSK
& uart_msg
->frame3
) >>
1784 BT_UART_MSG_FRAME3MASTER_POS
,
1785 (BT_UART_MSG_FRAME3OBEX_MSK
& uart_msg
->frame3
) >>
1786 BT_UART_MSG_FRAME3OBEX_POS
);
1788 IWL_DEBUG_NOTIF(priv
, "Idle duration = 0x%X",
1789 (BT_UART_MSG_FRAME4IDLEDURATION_MSK
& uart_msg
->frame4
) >>
1790 BT_UART_MSG_FRAME4IDLEDURATION_POS
);
1792 IWL_DEBUG_NOTIF(priv
, "Tx Activity = 0x%X, Rx Activity = 0x%X, "
1793 "eSCO Retransmissions = 0x%X",
1794 (BT_UART_MSG_FRAME5TXACTIVITY_MSK
& uart_msg
->frame5
) >>
1795 BT_UART_MSG_FRAME5TXACTIVITY_POS
,
1796 (BT_UART_MSG_FRAME5RXACTIVITY_MSK
& uart_msg
->frame5
) >>
1797 BT_UART_MSG_FRAME5RXACTIVITY_POS
,
1798 (BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK
& uart_msg
->frame5
) >>
1799 BT_UART_MSG_FRAME5ESCORETRANSMIT_POS
);
1801 IWL_DEBUG_NOTIF(priv
, "Sniff Interval = 0x%X, Discoverable = 0x%X",
1802 (BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK
& uart_msg
->frame6
) >>
1803 BT_UART_MSG_FRAME6SNIFFINTERVAL_POS
,
1804 (BT_UART_MSG_FRAME6DISCOVERABLE_MSK
& uart_msg
->frame6
) >>
1805 BT_UART_MSG_FRAME6DISCOVERABLE_POS
);
1807 IWL_DEBUG_NOTIF(priv
, "Sniff Activity = 0x%X, Inquiry/Page SR Mode = "
1808 "0x%X, Connectable = 0x%X",
1809 (BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK
& uart_msg
->frame7
) >>
1810 BT_UART_MSG_FRAME7SNIFFACTIVITY_POS
,
1811 (BT_UART_MSG_FRAME7INQUIRYPAGESRMODE_MSK
& uart_msg
->frame7
) >>
1812 BT_UART_MSG_FRAME7INQUIRYPAGESRMODE_POS
,
1813 (BT_UART_MSG_FRAME7CONNECTABLE_MSK
& uart_msg
->frame7
) >>
1814 BT_UART_MSG_FRAME7CONNECTABLE_POS
);
1817 static void iwlagn_set_kill_ack_msk(struct iwl_priv
*priv
,
1818 struct iwl_bt_uart_msg
*uart_msg
)
1821 __le32 bt_kill_ack_msg
[2] = {
1822 cpu_to_le32(0xFFFFFFF), cpu_to_le32(0xFFFFFC00) };
1824 kill_ack_msk
= (((BT_UART_MSG_FRAME3A2DP_MSK
|
1825 BT_UART_MSG_FRAME3SNIFF_MSK
|
1826 BT_UART_MSG_FRAME3SCOESCO_MSK
) &
1827 uart_msg
->frame3
) == 0) ? 1 : 0;
1828 if (priv
->kill_ack_mask
!= bt_kill_ack_msg
[kill_ack_msk
]) {
1829 priv
->bt_valid
|= IWLAGN_BT_VALID_KILL_ACK_MASK
;
1830 priv
->kill_ack_mask
= bt_kill_ack_msg
[kill_ack_msk
];
1831 /* schedule to send runtime bt_config */
1832 queue_work(priv
->workqueue
, &priv
->bt_runtime_config
);
1837 void iwlagn_bt_coex_profile_notif(struct iwl_priv
*priv
,
1838 struct iwl_rx_mem_buffer
*rxb
)
1840 unsigned long flags
;
1841 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
1842 struct iwl_bt_coex_profile_notif
*coex
= &pkt
->u
.bt_coex_profile_notif
;
1843 struct iwlagn_bt_sco_cmd sco_cmd
= { .flags
= 0 };
1844 struct iwl_bt_uart_msg
*uart_msg
= &coex
->last_bt_uart_msg
;
1845 u8 last_traffic_load
;
1847 IWL_DEBUG_NOTIF(priv
, "BT Coex notification:\n");
1848 IWL_DEBUG_NOTIF(priv
, " status: %d\n", coex
->bt_status
);
1849 IWL_DEBUG_NOTIF(priv
, " traffic load: %d\n", coex
->bt_traffic_load
);
1850 IWL_DEBUG_NOTIF(priv
, " CI compliance: %d\n",
1851 coex
->bt_ci_compliance
);
1852 iwlagn_print_uartmsg(priv
, uart_msg
);
1854 last_traffic_load
= priv
->notif_bt_traffic_load
;
1855 priv
->notif_bt_traffic_load
= coex
->bt_traffic_load
;
1856 if (priv
->iw_mode
!= NL80211_IFTYPE_ADHOC
) {
1857 if (priv
->bt_status
!= coex
->bt_status
||
1858 last_traffic_load
!= coex
->bt_traffic_load
) {
1859 if (coex
->bt_status
) {
1861 if (!priv
->bt_ch_announce
)
1862 priv
->bt_traffic_load
=
1863 IWL_BT_COEX_TRAFFIC_LOAD_HIGH
;
1865 priv
->bt_traffic_load
=
1866 coex
->bt_traffic_load
;
1869 priv
->bt_traffic_load
=
1870 IWL_BT_COEX_TRAFFIC_LOAD_NONE
;
1872 priv
->bt_status
= coex
->bt_status
;
1873 queue_work(priv
->workqueue
,
1874 &priv
->bt_traffic_change_work
);
1876 if (priv
->bt_sco_active
!=
1877 (uart_msg
->frame3
& BT_UART_MSG_FRAME3SCOESCO_MSK
)) {
1878 priv
->bt_sco_active
= uart_msg
->frame3
&
1879 BT_UART_MSG_FRAME3SCOESCO_MSK
;
1880 if (priv
->bt_sco_active
)
1881 sco_cmd
.flags
|= IWLAGN_BT_SCO_ACTIVE
;
1882 iwl_send_cmd_pdu_async(priv
, REPLY_BT_COEX_SCO
,
1883 sizeof(sco_cmd
), &sco_cmd
, NULL
);
1887 iwlagn_set_kill_ack_msk(priv
, uart_msg
);
1889 /* FIXME: based on notification, adjust the prio_boost */
1891 spin_lock_irqsave(&priv
->lock
, flags
);
1892 priv
->bt_ci_compliance
= coex
->bt_ci_compliance
;
1893 spin_unlock_irqrestore(&priv
->lock
, flags
);
1896 void iwlagn_bt_rx_handler_setup(struct iwl_priv
*priv
)
1898 iwlagn_rx_handler_setup(priv
);
1899 priv
->rx_handlers
[REPLY_BT_COEX_PROFILE_NOTIF
] =
1900 iwlagn_bt_coex_profile_notif
;
1903 void iwlagn_bt_setup_deferred_work(struct iwl_priv
*priv
)
1905 iwlagn_setup_deferred_work(priv
);
1907 INIT_WORK(&priv
->bt_traffic_change_work
,
1908 iwlagn_bt_traffic_change_work
);
1911 void iwlagn_bt_cancel_deferred_work(struct iwl_priv
*priv
)
1913 cancel_work_sync(&priv
->bt_traffic_change_work
);