1 /******************************************************************************
5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/sched.h>
39 #include "iwl-helpers.h"
40 #include "iwl-agn-hw.h"
44 * mac80211 queues, ACs, hardware queues, FIFOs.
46 * Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues
48 * Mac80211 uses the following numbers, which we get as from it
49 * by way of skb_get_queue_mapping(skb):
57 * Regular (not A-MPDU) frames are put into hardware queues corresponding
58 * to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their
59 * own queue per aggregation session (RA/TID combination), such queues are
60 * set up to map into FIFOs too, for which we need an AC->FIFO mapping. In
61 * order to map frames to the right queue, we also need an AC->hw queue
62 * mapping. This is implemented here.
64 * Due to the way hw queues are set up (by the hw specific modules like
65 * iwl-4965.c, iwl-5000.c etc.), the AC->hw queue mapping is the identity
69 static const u8 tid_to_ac
[] = {
80 static inline int get_ac_from_tid(u16 tid
)
82 if (likely(tid
< ARRAY_SIZE(tid_to_ac
)))
83 return tid_to_ac
[tid
];
85 /* no support for TIDs 8-15 yet */
89 static inline int get_fifo_from_tid(struct iwl_rxon_context
*ctx
, u16 tid
)
91 if (likely(tid
< ARRAY_SIZE(tid_to_ac
)))
92 return ctx
->ac_to_fifo
[tid_to_ac
[tid
]];
94 /* no support for TIDs 8-15 yet */
99 * iwlagn_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
101 static void iwlagn_txq_update_byte_cnt_tbl(struct iwl_priv
*priv
,
102 struct iwl_tx_queue
*txq
,
105 struct iwlagn_scd_bc_tbl
*scd_bc_tbl
= priv
->scd_bc_tbls
.addr
;
106 int write_ptr
= txq
->q
.write_ptr
;
107 int txq_id
= txq
->q
.id
;
110 u16 len
= byte_cnt
+ IWL_TX_CRC_SIZE
+ IWL_TX_DELIMITER_SIZE
;
113 WARN_ON(len
> 0xFFF || write_ptr
>= TFD_QUEUE_SIZE_MAX
);
115 sta_id
= txq
->cmd
[txq
->q
.write_ptr
]->cmd
.tx
.sta_id
;
116 sec_ctl
= txq
->cmd
[txq
->q
.write_ptr
]->cmd
.tx
.sec_ctl
;
118 switch (sec_ctl
& TX_CMD_SEC_MSK
) {
122 case TX_CMD_SEC_TKIP
:
126 len
+= WEP_IV_LEN
+ WEP_ICV_LEN
;
130 bc_ent
= cpu_to_le16((len
& 0xFFF) | (sta_id
<< 12));
132 scd_bc_tbl
[txq_id
].tfd_offset
[write_ptr
] = bc_ent
;
134 if (write_ptr
< TFD_QUEUE_SIZE_BC_DUP
)
136 tfd_offset
[TFD_QUEUE_SIZE_MAX
+ write_ptr
] = bc_ent
;
139 static void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_priv
*priv
,
140 struct iwl_tx_queue
*txq
)
142 struct iwlagn_scd_bc_tbl
*scd_bc_tbl
= priv
->scd_bc_tbls
.addr
;
143 int txq_id
= txq
->q
.id
;
144 int read_ptr
= txq
->q
.read_ptr
;
148 WARN_ON(read_ptr
>= TFD_QUEUE_SIZE_MAX
);
150 if (txq_id
!= priv
->cmd_queue
)
151 sta_id
= txq
->cmd
[read_ptr
]->cmd
.tx
.sta_id
;
153 bc_ent
= cpu_to_le16(1 | (sta_id
<< 12));
154 scd_bc_tbl
[txq_id
].tfd_offset
[read_ptr
] = bc_ent
;
156 if (read_ptr
< TFD_QUEUE_SIZE_BC_DUP
)
158 tfd_offset
[TFD_QUEUE_SIZE_MAX
+ read_ptr
] = bc_ent
;
161 static int iwlagn_tx_queue_set_q2ratid(struct iwl_priv
*priv
, u16 ra_tid
,
168 scd_q2ratid
= ra_tid
& IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK
;
170 tbl_dw_addr
= priv
->scd_base_addr
+
171 IWLAGN_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id
);
173 tbl_dw
= iwl_read_targ_mem(priv
, tbl_dw_addr
);
176 tbl_dw
= (scd_q2ratid
<< 16) | (tbl_dw
& 0x0000FFFF);
178 tbl_dw
= scd_q2ratid
| (tbl_dw
& 0xFFFF0000);
180 iwl_write_targ_mem(priv
, tbl_dw_addr
, tbl_dw
);
185 static void iwlagn_tx_queue_stop_scheduler(struct iwl_priv
*priv
, u16 txq_id
)
187 /* Simply stop the queue, but don't change any configuration;
188 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
190 IWLAGN_SCD_QUEUE_STATUS_BITS(txq_id
),
191 (0 << IWLAGN_SCD_QUEUE_STTS_REG_POS_ACTIVE
)|
192 (1 << IWLAGN_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN
));
195 void iwlagn_set_wr_ptrs(struct iwl_priv
*priv
,
196 int txq_id
, u32 index
)
198 iwl_write_direct32(priv
, HBUS_TARG_WRPTR
,
199 (index
& 0xff) | (txq_id
<< 8));
200 iwl_write_prph(priv
, IWLAGN_SCD_QUEUE_RDPTR(txq_id
), index
);
203 void iwlagn_tx_queue_set_status(struct iwl_priv
*priv
,
204 struct iwl_tx_queue
*txq
,
205 int tx_fifo_id
, int scd_retry
)
207 int txq_id
= txq
->q
.id
;
208 int active
= test_bit(txq_id
, &priv
->txq_ctx_active_msk
) ? 1 : 0;
210 iwl_write_prph(priv
, IWLAGN_SCD_QUEUE_STATUS_BITS(txq_id
),
211 (active
<< IWLAGN_SCD_QUEUE_STTS_REG_POS_ACTIVE
) |
212 (tx_fifo_id
<< IWLAGN_SCD_QUEUE_STTS_REG_POS_TXF
) |
213 (1 << IWLAGN_SCD_QUEUE_STTS_REG_POS_WSL
) |
214 IWLAGN_SCD_QUEUE_STTS_REG_MSK
);
216 txq
->sched_retry
= scd_retry
;
218 IWL_DEBUG_INFO(priv
, "%s %s Queue %d on FIFO %d\n",
219 active
? "Activate" : "Deactivate",
220 scd_retry
? "BA" : "AC/CMD", txq_id
, tx_fifo_id
);
223 static int iwlagn_txq_agg_enable(struct iwl_priv
*priv
, int txq_id
, int sta_id
, int tid
)
225 if ((IWLAGN_FIRST_AMPDU_QUEUE
> txq_id
) ||
226 (IWLAGN_FIRST_AMPDU_QUEUE
+
227 priv
->cfg
->base_params
->num_of_ampdu_queues
<= txq_id
)) {
229 "queue number out of range: %d, must be %d to %d\n",
230 txq_id
, IWLAGN_FIRST_AMPDU_QUEUE
,
231 IWLAGN_FIRST_AMPDU_QUEUE
+
232 priv
->cfg
->base_params
->num_of_ampdu_queues
- 1);
236 /* Modify device's station table to Tx this TID */
237 return iwl_sta_tx_modify_enable_tid(priv
, sta_id
, tid
);
240 void iwlagn_txq_agg_queue_setup(struct iwl_priv
*priv
,
241 struct ieee80211_sta
*sta
,
242 int tid
, int frame_limit
)
244 int sta_id
, tx_fifo
, txq_id
, ssn_idx
;
247 struct iwl_tid_data
*tid_data
;
249 sta_id
= iwl_sta_id(sta
);
250 if (WARN_ON(sta_id
== IWL_INVALID_STATION
))
252 if (WARN_ON(tid
>= MAX_TID_COUNT
))
255 spin_lock_irqsave(&priv
->sta_lock
, flags
);
256 tid_data
= &priv
->stations
[sta_id
].tid
[tid
];
257 ssn_idx
= SEQ_TO_SN(tid_data
->seq_number
);
258 txq_id
= tid_data
->agg
.txq_id
;
259 tx_fifo
= tid_data
->agg
.tx_fifo
;
260 spin_unlock_irqrestore(&priv
->sta_lock
, flags
);
262 ra_tid
= BUILD_RAxTID(sta_id
, tid
);
264 spin_lock_irqsave(&priv
->lock
, flags
);
266 /* Stop this Tx queue before configuring it */
267 iwlagn_tx_queue_stop_scheduler(priv
, txq_id
);
269 /* Map receiver-address / traffic-ID to this queue */
270 iwlagn_tx_queue_set_q2ratid(priv
, ra_tid
, txq_id
);
272 /* Set this queue as a chain-building queue */
273 iwl_set_bits_prph(priv
, IWLAGN_SCD_QUEUECHAIN_SEL
, (1<<txq_id
));
275 /* enable aggregations for the queue */
276 iwl_set_bits_prph(priv
, IWLAGN_SCD_AGGR_SEL
, (1<<txq_id
));
278 /* Place first TFD at index corresponding to start sequence number.
279 * Assumes that ssn_idx is valid (!= 0xFFF) */
280 priv
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
281 priv
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
282 iwlagn_set_wr_ptrs(priv
, txq_id
, ssn_idx
);
284 /* Set up Tx window size and frame limit for this queue */
285 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
286 IWLAGN_SCD_CONTEXT_QUEUE_OFFSET(txq_id
) +
289 IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS
) &
290 IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK
) |
292 IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
) &
293 IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
));
295 iwl_set_bits_prph(priv
, IWLAGN_SCD_INTERRUPT_MASK
, (1 << txq_id
));
297 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
298 iwlagn_tx_queue_set_status(priv
, &priv
->txq
[txq_id
], tx_fifo
, 1);
300 spin_unlock_irqrestore(&priv
->lock
, flags
);
303 static int iwlagn_txq_agg_disable(struct iwl_priv
*priv
, u16 txq_id
,
304 u16 ssn_idx
, u8 tx_fifo
)
306 if ((IWLAGN_FIRST_AMPDU_QUEUE
> txq_id
) ||
307 (IWLAGN_FIRST_AMPDU_QUEUE
+
308 priv
->cfg
->base_params
->num_of_ampdu_queues
<= txq_id
)) {
310 "queue number out of range: %d, must be %d to %d\n",
311 txq_id
, IWLAGN_FIRST_AMPDU_QUEUE
,
312 IWLAGN_FIRST_AMPDU_QUEUE
+
313 priv
->cfg
->base_params
->num_of_ampdu_queues
- 1);
317 iwlagn_tx_queue_stop_scheduler(priv
, txq_id
);
319 iwl_clear_bits_prph(priv
, IWLAGN_SCD_AGGR_SEL
, (1 << txq_id
));
321 priv
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
322 priv
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
323 /* supposes that ssn_idx is valid (!= 0xFFF) */
324 iwlagn_set_wr_ptrs(priv
, txq_id
, ssn_idx
);
326 iwl_clear_bits_prph(priv
, IWLAGN_SCD_INTERRUPT_MASK
, (1 << txq_id
));
327 iwl_txq_ctx_deactivate(priv
, txq_id
);
328 iwlagn_tx_queue_set_status(priv
, &priv
->txq
[txq_id
], tx_fifo
, 0);
334 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
335 * must be called under priv->lock and mac access
337 void iwlagn_txq_set_sched(struct iwl_priv
*priv
, u32 mask
)
339 iwl_write_prph(priv
, IWLAGN_SCD_TXFACT
, mask
);
343 * handle build REPLY_TX command notification.
345 static void iwlagn_tx_cmd_build_basic(struct iwl_priv
*priv
,
347 struct iwl_tx_cmd
*tx_cmd
,
348 struct ieee80211_tx_info
*info
,
349 struct ieee80211_hdr
*hdr
,
352 __le16 fc
= hdr
->frame_control
;
353 __le32 tx_flags
= tx_cmd
->tx_flags
;
355 tx_cmd
->stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
356 if (!(info
->flags
& IEEE80211_TX_CTL_NO_ACK
)) {
357 tx_flags
|= TX_CMD_FLG_ACK_MSK
;
358 if (ieee80211_is_mgmt(fc
))
359 tx_flags
|= TX_CMD_FLG_SEQ_CTL_MSK
;
360 if (ieee80211_is_probe_resp(fc
) &&
361 !(le16_to_cpu(hdr
->seq_ctrl
) & 0xf))
362 tx_flags
|= TX_CMD_FLG_TSF_MSK
;
364 tx_flags
&= (~TX_CMD_FLG_ACK_MSK
);
365 tx_flags
|= TX_CMD_FLG_SEQ_CTL_MSK
;
368 if (ieee80211_is_back_req(fc
))
369 tx_flags
|= TX_CMD_FLG_ACK_MSK
| TX_CMD_FLG_IMM_BA_RSP_MASK
;
370 else if (info
->band
== IEEE80211_BAND_2GHZ
&&
371 priv
->cfg
->bt_params
&&
372 priv
->cfg
->bt_params
->advanced_bt_coexist
&&
373 (ieee80211_is_auth(fc
) || ieee80211_is_assoc_req(fc
) ||
374 ieee80211_is_reassoc_req(fc
) ||
375 skb
->protocol
== cpu_to_be16(ETH_P_PAE
)))
376 tx_flags
|= TX_CMD_FLG_IGNORE_BT
;
379 tx_cmd
->sta_id
= std_id
;
380 if (ieee80211_has_morefrags(fc
))
381 tx_flags
|= TX_CMD_FLG_MORE_FRAG_MSK
;
383 if (ieee80211_is_data_qos(fc
)) {
384 u8
*qc
= ieee80211_get_qos_ctl(hdr
);
385 tx_cmd
->tid_tspec
= qc
[0] & 0xf;
386 tx_flags
&= ~TX_CMD_FLG_SEQ_CTL_MSK
;
388 tx_flags
|= TX_CMD_FLG_SEQ_CTL_MSK
;
391 priv
->cfg
->ops
->utils
->tx_cmd_protection(priv
, info
, fc
, &tx_flags
);
393 tx_flags
&= ~(TX_CMD_FLG_ANT_SEL_MSK
);
394 if (ieee80211_is_mgmt(fc
)) {
395 if (ieee80211_is_assoc_req(fc
) || ieee80211_is_reassoc_req(fc
))
396 tx_cmd
->timeout
.pm_frame_timeout
= cpu_to_le16(3);
398 tx_cmd
->timeout
.pm_frame_timeout
= cpu_to_le16(2);
400 tx_cmd
->timeout
.pm_frame_timeout
= 0;
403 tx_cmd
->driver_txop
= 0;
404 tx_cmd
->tx_flags
= tx_flags
;
405 tx_cmd
->next_frame_len
= 0;
408 #define RTS_DFAULT_RETRY_LIMIT 60
410 static void iwlagn_tx_cmd_build_rate(struct iwl_priv
*priv
,
411 struct iwl_tx_cmd
*tx_cmd
,
412 struct ieee80211_tx_info
*info
,
421 /* Set retry limit on DATA packets and Probe Responses*/
422 if (ieee80211_is_probe_resp(fc
))
423 data_retry_limit
= 3;
425 data_retry_limit
= IWLAGN_DEFAULT_TX_RETRY
;
426 tx_cmd
->data_retry_limit
= data_retry_limit
;
428 /* Set retry limit on RTS packets */
429 rts_retry_limit
= RTS_DFAULT_RETRY_LIMIT
;
430 if (data_retry_limit
< rts_retry_limit
)
431 rts_retry_limit
= data_retry_limit
;
432 tx_cmd
->rts_retry_limit
= rts_retry_limit
;
434 /* DATA packets will use the uCode station table for rate/antenna
436 if (ieee80211_is_data(fc
)) {
437 tx_cmd
->initial_rate_index
= 0;
438 tx_cmd
->tx_flags
|= TX_CMD_FLG_STA_RATE_MSK
;
443 * If the current TX rate stored in mac80211 has the MCS bit set, it's
444 * not really a TX rate. Thus, we use the lowest supported rate for
445 * this band. Also use the lowest supported rate if the stored rate
448 rate_idx
= info
->control
.rates
[0].idx
;
449 if (info
->control
.rates
[0].flags
& IEEE80211_TX_RC_MCS
||
450 (rate_idx
< 0) || (rate_idx
> IWL_RATE_COUNT_LEGACY
))
451 rate_idx
= rate_lowest_index(&priv
->bands
[info
->band
],
453 /* For 5 GHZ band, remap mac80211 rate indices into driver indices */
454 if (info
->band
== IEEE80211_BAND_5GHZ
)
455 rate_idx
+= IWL_FIRST_OFDM_RATE
;
456 /* Get PLCP rate for tx_cmd->rate_n_flags */
457 rate_plcp
= iwl_rates
[rate_idx
].plcp
;
458 /* Zero out flags for this packet */
461 /* Set CCK flag as needed */
462 if ((rate_idx
>= IWL_FIRST_CCK_RATE
) && (rate_idx
<= IWL_LAST_CCK_RATE
))
463 rate_flags
|= RATE_MCS_CCK_MSK
;
465 /* Set up antennas */
466 if (priv
->cfg
->bt_params
&&
467 priv
->cfg
->bt_params
->advanced_bt_coexist
&&
468 priv
->bt_full_concurrent
) {
469 /* operated as 1x1 in full concurrency mode */
470 priv
->mgmt_tx_ant
= iwl_toggle_tx_ant(priv
, priv
->mgmt_tx_ant
,
471 first_antenna(priv
->hw_params
.valid_tx_ant
));
473 priv
->mgmt_tx_ant
= iwl_toggle_tx_ant(priv
, priv
->mgmt_tx_ant
,
474 priv
->hw_params
.valid_tx_ant
);
475 rate_flags
|= iwl_ant_idx_to_flags(priv
->mgmt_tx_ant
);
477 /* Set the rate in the TX cmd */
478 tx_cmd
->rate_n_flags
= iwl_hw_set_rate_n_flags(rate_plcp
, rate_flags
);
481 static void iwlagn_tx_cmd_build_hwcrypto(struct iwl_priv
*priv
,
482 struct ieee80211_tx_info
*info
,
483 struct iwl_tx_cmd
*tx_cmd
,
484 struct sk_buff
*skb_frag
,
487 struct ieee80211_key_conf
*keyconf
= info
->control
.hw_key
;
489 switch (keyconf
->cipher
) {
490 case WLAN_CIPHER_SUITE_CCMP
:
491 tx_cmd
->sec_ctl
= TX_CMD_SEC_CCM
;
492 memcpy(tx_cmd
->key
, keyconf
->key
, keyconf
->keylen
);
493 if (info
->flags
& IEEE80211_TX_CTL_AMPDU
)
494 tx_cmd
->tx_flags
|= TX_CMD_FLG_AGG_CCMP_MSK
;
495 IWL_DEBUG_TX(priv
, "tx_cmd with AES hwcrypto\n");
498 case WLAN_CIPHER_SUITE_TKIP
:
499 tx_cmd
->sec_ctl
= TX_CMD_SEC_TKIP
;
500 ieee80211_get_tkip_key(keyconf
, skb_frag
,
501 IEEE80211_TKIP_P2_KEY
, tx_cmd
->key
);
502 IWL_DEBUG_TX(priv
, "tx_cmd with tkip hwcrypto\n");
505 case WLAN_CIPHER_SUITE_WEP104
:
506 tx_cmd
->sec_ctl
|= TX_CMD_SEC_KEY128
;
508 case WLAN_CIPHER_SUITE_WEP40
:
509 tx_cmd
->sec_ctl
|= (TX_CMD_SEC_WEP
|
510 (keyconf
->keyidx
& TX_CMD_SEC_MSK
) << TX_CMD_SEC_SHIFT
);
512 memcpy(&tx_cmd
->key
[3], keyconf
->key
, keyconf
->keylen
);
514 IWL_DEBUG_TX(priv
, "Configuring packet for WEP encryption "
515 "with key %d\n", keyconf
->keyidx
);
519 IWL_ERR(priv
, "Unknown encode cipher %x\n", keyconf
->cipher
);
525 * start REPLY_TX command process
527 int iwlagn_tx_skb(struct iwl_priv
*priv
, struct sk_buff
*skb
)
529 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
530 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
531 struct ieee80211_sta
*sta
= info
->control
.sta
;
532 struct iwl_station_priv
*sta_priv
= NULL
;
533 struct iwl_tx_queue
*txq
;
535 struct iwl_device_cmd
*out_cmd
;
536 struct iwl_cmd_meta
*out_meta
;
537 struct iwl_tx_cmd
*tx_cmd
;
538 struct iwl_rxon_context
*ctx
= &priv
->contexts
[IWL_RXON_CTX_BSS
];
540 dma_addr_t phys_addr
= 0;
541 dma_addr_t txcmd_phys
;
542 dma_addr_t scratch_phys
;
543 u16 len
, firstlen
, secondlen
;
548 u8 wait_write_ptr
= 0;
555 * If the frame needs to go out off-channel, then
556 * we'll have put the PAN context to that channel,
557 * so make the frame go out there.
559 if (info
->flags
& IEEE80211_TX_CTL_TX_OFFCHAN
)
560 ctx
= &priv
->contexts
[IWL_RXON_CTX_PAN
];
561 else if (info
->control
.vif
)
562 ctx
= iwl_rxon_ctx_from_vif(info
->control
.vif
);
564 spin_lock_irqsave(&priv
->lock
, flags
);
565 if (iwl_is_rfkill(priv
)) {
566 IWL_DEBUG_DROP(priv
, "Dropping - RF KILL\n");
567 goto drop_unlock_priv
;
570 fc
= hdr
->frame_control
;
572 #ifdef CONFIG_IWLWIFI_DEBUG
573 if (ieee80211_is_auth(fc
))
574 IWL_DEBUG_TX(priv
, "Sending AUTH frame\n");
575 else if (ieee80211_is_assoc_req(fc
))
576 IWL_DEBUG_TX(priv
, "Sending ASSOC frame\n");
577 else if (ieee80211_is_reassoc_req(fc
))
578 IWL_DEBUG_TX(priv
, "Sending REASSOC frame\n");
581 hdr_len
= ieee80211_hdrlen(fc
);
583 /* For management frames use broadcast id to do not break aggregation */
584 if (!ieee80211_is_data(fc
))
585 sta_id
= ctx
->bcast_sta_id
;
587 /* Find index into station table for destination station */
588 sta_id
= iwl_sta_id_or_broadcast(priv
, ctx
, info
->control
.sta
);
589 if (sta_id
== IWL_INVALID_STATION
) {
590 IWL_DEBUG_DROP(priv
, "Dropping - INVALID STATION: %pM\n",
592 goto drop_unlock_priv
;
596 IWL_DEBUG_TX(priv
, "station Id %d\n", sta_id
);
599 sta_priv
= (void *)sta
->drv_priv
;
601 if (sta_priv
&& sta_priv
->asleep
&&
602 (info
->flags
& IEEE80211_TX_CTL_PSPOLL_RESPONSE
)) {
604 * This sends an asynchronous command to the device,
605 * but we can rely on it being processed before the
606 * next frame is processed -- and the next frame to
607 * this station is the one that will consume this
609 * For now set the counter to just 1 since we do not
612 iwl_sta_modify_sleep_tx_count(priv
, sta_id
, 1);
616 * Send this frame after DTIM -- there's a special queue
617 * reserved for this for contexts that support AP mode.
619 if (info
->flags
& IEEE80211_TX_CTL_SEND_AFTER_DTIM
) {
620 txq_id
= ctx
->mcast_queue
;
622 * The microcode will clear the more data
623 * bit in the last frame it transmits.
625 hdr
->frame_control
|=
626 cpu_to_le16(IEEE80211_FCTL_MOREDATA
);
628 txq_id
= ctx
->ac_to_queue
[skb_get_queue_mapping(skb
)];
630 /* irqs already disabled/saved above when locking priv->lock */
631 spin_lock(&priv
->sta_lock
);
633 if (ieee80211_is_data_qos(fc
)) {
634 qc
= ieee80211_get_qos_ctl(hdr
);
635 tid
= qc
[0] & IEEE80211_QOS_CTL_TID_MASK
;
637 if (WARN_ON_ONCE(tid
>= MAX_TID_COUNT
))
638 goto drop_unlock_sta
;
640 seq_number
= priv
->stations
[sta_id
].tid
[tid
].seq_number
;
641 seq_number
&= IEEE80211_SCTL_SEQ
;
642 hdr
->seq_ctrl
= hdr
->seq_ctrl
&
643 cpu_to_le16(IEEE80211_SCTL_FRAG
);
644 hdr
->seq_ctrl
|= cpu_to_le16(seq_number
);
646 /* aggregation is on for this <sta,tid> */
647 if (info
->flags
& IEEE80211_TX_CTL_AMPDU
&&
648 priv
->stations
[sta_id
].tid
[tid
].agg
.state
== IWL_AGG_ON
) {
649 txq_id
= priv
->stations
[sta_id
].tid
[tid
].agg
.txq_id
;
654 txq
= &priv
->txq
[txq_id
];
657 if (unlikely(iwl_queue_space(q
) < q
->high_mark
))
658 goto drop_unlock_sta
;
660 /* Set up driver data for this TFD */
661 memset(&(txq
->txb
[q
->write_ptr
]), 0, sizeof(struct iwl_tx_info
));
662 txq
->txb
[q
->write_ptr
].skb
= skb
;
663 txq
->txb
[q
->write_ptr
].ctx
= ctx
;
665 /* Set up first empty entry in queue's array of Tx/cmd buffers */
666 out_cmd
= txq
->cmd
[q
->write_ptr
];
667 out_meta
= &txq
->meta
[q
->write_ptr
];
668 tx_cmd
= &out_cmd
->cmd
.tx
;
669 memset(&out_cmd
->hdr
, 0, sizeof(out_cmd
->hdr
));
670 memset(tx_cmd
, 0, sizeof(struct iwl_tx_cmd
));
673 * Set up the Tx-command (not MAC!) header.
674 * Store the chosen Tx queue and TFD index within the sequence field;
675 * after Tx, uCode's Tx response will return this value so driver can
676 * locate the frame within the tx queue and do post-tx processing.
678 out_cmd
->hdr
.cmd
= REPLY_TX
;
679 out_cmd
->hdr
.sequence
= cpu_to_le16((u16
)(QUEUE_TO_SEQ(txq_id
) |
680 INDEX_TO_SEQ(q
->write_ptr
)));
682 /* Copy MAC header from skb into command buffer */
683 memcpy(tx_cmd
->hdr
, hdr
, hdr_len
);
686 /* Total # bytes to be transmitted */
688 tx_cmd
->len
= cpu_to_le16(len
);
690 if (info
->control
.hw_key
)
691 iwlagn_tx_cmd_build_hwcrypto(priv
, info
, tx_cmd
, skb
, sta_id
);
693 /* TODO need this for burst mode later on */
694 iwlagn_tx_cmd_build_basic(priv
, skb
, tx_cmd
, info
, hdr
, sta_id
);
695 iwl_dbg_log_tx_data_frame(priv
, len
, hdr
);
697 iwlagn_tx_cmd_build_rate(priv
, tx_cmd
, info
, fc
);
699 iwl_update_stats(priv
, true, fc
, len
);
701 * Use the first empty entry in this queue's command buffer array
702 * to contain the Tx command and MAC header concatenated together
703 * (payload data will be in another buffer).
704 * Size of this varies, due to varying MAC header length.
705 * If end is not dword aligned, we'll have 2 extra bytes at the end
706 * of the MAC header (device reads on dword boundaries).
707 * We'll tell device about this padding later.
709 len
= sizeof(struct iwl_tx_cmd
) +
710 sizeof(struct iwl_cmd_header
) + hdr_len
;
711 firstlen
= (len
+ 3) & ~3;
713 /* Tell NIC about any 2-byte padding after MAC header */
715 tx_cmd
->tx_flags
|= TX_CMD_FLG_MH_PAD_MSK
;
717 /* Physical address of this Tx command's header (not MAC header!),
718 * within command buffer array. */
719 txcmd_phys
= pci_map_single(priv
->pci_dev
,
720 &out_cmd
->hdr
, firstlen
,
721 PCI_DMA_BIDIRECTIONAL
);
722 if (unlikely(pci_dma_mapping_error(priv
->pci_dev
, txcmd_phys
)))
723 goto drop_unlock_sta
;
724 dma_unmap_addr_set(out_meta
, mapping
, txcmd_phys
);
725 dma_unmap_len_set(out_meta
, len
, firstlen
);
727 if (!ieee80211_has_morefrags(hdr
->frame_control
)) {
728 txq
->need_update
= 1;
731 txq
->need_update
= 0;
734 /* Set up TFD's 2nd entry to point directly to remainder of skb,
735 * if any (802.11 null frames have no payload). */
736 secondlen
= skb
->len
- hdr_len
;
738 phys_addr
= pci_map_single(priv
->pci_dev
, skb
->data
+ hdr_len
,
739 secondlen
, PCI_DMA_TODEVICE
);
740 if (unlikely(pci_dma_mapping_error(priv
->pci_dev
, phys_addr
))) {
741 pci_unmap_single(priv
->pci_dev
,
742 dma_unmap_addr(out_meta
, mapping
),
743 dma_unmap_len(out_meta
, len
),
744 PCI_DMA_BIDIRECTIONAL
);
745 goto drop_unlock_sta
;
749 if (ieee80211_is_data_qos(fc
)) {
750 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
++;
751 if (!ieee80211_has_morefrags(fc
))
752 priv
->stations
[sta_id
].tid
[tid
].seq_number
= seq_number
;
755 spin_unlock(&priv
->sta_lock
);
757 /* Attach buffers to TFD */
758 iwlagn_txq_attach_buf_to_tfd(priv
, txq
, txcmd_phys
, firstlen
, 1);
760 iwlagn_txq_attach_buf_to_tfd(priv
, txq
, phys_addr
,
763 scratch_phys
= txcmd_phys
+ sizeof(struct iwl_cmd_header
) +
764 offsetof(struct iwl_tx_cmd
, scratch
);
766 /* take back ownership of DMA buffer to enable update */
767 pci_dma_sync_single_for_cpu(priv
->pci_dev
, txcmd_phys
,
768 firstlen
, PCI_DMA_BIDIRECTIONAL
);
769 tx_cmd
->dram_lsb_ptr
= cpu_to_le32(scratch_phys
);
770 tx_cmd
->dram_msb_ptr
= iwl_get_dma_hi_addr(scratch_phys
);
772 IWL_DEBUG_TX(priv
, "sequence nr = 0X%x\n",
773 le16_to_cpu(out_cmd
->hdr
.sequence
));
774 IWL_DEBUG_TX(priv
, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd
->tx_flags
));
775 iwl_print_hex_dump(priv
, IWL_DL_TX
, (u8
*)tx_cmd
, sizeof(*tx_cmd
));
776 iwl_print_hex_dump(priv
, IWL_DL_TX
, (u8
*)tx_cmd
->hdr
, hdr_len
);
778 /* Set up entry for this TFD in Tx byte-count array */
779 if (info
->flags
& IEEE80211_TX_CTL_AMPDU
)
780 iwlagn_txq_update_byte_cnt_tbl(priv
, txq
,
781 le16_to_cpu(tx_cmd
->len
));
783 pci_dma_sync_single_for_device(priv
->pci_dev
, txcmd_phys
,
784 firstlen
, PCI_DMA_BIDIRECTIONAL
);
786 trace_iwlwifi_dev_tx(priv
,
787 &((struct iwl_tfd
*)txq
->tfds
)[txq
->q
.write_ptr
],
788 sizeof(struct iwl_tfd
),
789 &out_cmd
->hdr
, firstlen
,
790 skb
->data
+ hdr_len
, secondlen
);
792 /* Tell device the write index *just past* this latest filled TFD */
793 q
->write_ptr
= iwl_queue_inc_wrap(q
->write_ptr
, q
->n_bd
);
794 iwl_txq_update_write_ptr(priv
, txq
);
795 spin_unlock_irqrestore(&priv
->lock
, flags
);
798 * At this point the frame is "transmitted" successfully
799 * and we will get a TX status notification eventually,
800 * regardless of the value of ret. "ret" only indicates
801 * whether or not we should update the write pointer.
805 * Avoid atomic ops if it isn't an associated client.
806 * Also, if this is a packet for aggregation, don't
807 * increase the counter because the ucode will stop
808 * aggregation queues when their respective station
811 if (sta_priv
&& sta_priv
->client
&& !is_agg
)
812 atomic_inc(&sta_priv
->pending_frames
);
814 if ((iwl_queue_space(q
) < q
->high_mark
) && priv
->mac80211_registered
) {
815 if (wait_write_ptr
) {
816 spin_lock_irqsave(&priv
->lock
, flags
);
817 txq
->need_update
= 1;
818 iwl_txq_update_write_ptr(priv
, txq
);
819 spin_unlock_irqrestore(&priv
->lock
, flags
);
821 iwl_stop_queue(priv
, txq
);
828 spin_unlock(&priv
->sta_lock
);
830 spin_unlock_irqrestore(&priv
->lock
, flags
);
834 static inline int iwlagn_alloc_dma_ptr(struct iwl_priv
*priv
,
835 struct iwl_dma_ptr
*ptr
, size_t size
)
837 ptr
->addr
= dma_alloc_coherent(&priv
->pci_dev
->dev
, size
, &ptr
->dma
,
845 static inline void iwlagn_free_dma_ptr(struct iwl_priv
*priv
,
846 struct iwl_dma_ptr
*ptr
)
848 if (unlikely(!ptr
->addr
))
851 dma_free_coherent(&priv
->pci_dev
->dev
, ptr
->size
, ptr
->addr
, ptr
->dma
);
852 memset(ptr
, 0, sizeof(*ptr
));
856 * iwlagn_hw_txq_ctx_free - Free TXQ Context
858 * Destroy all TX DMA queues and structures
860 void iwlagn_hw_txq_ctx_free(struct iwl_priv
*priv
)
866 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
; txq_id
++)
867 if (txq_id
== priv
->cmd_queue
)
868 iwl_cmd_queue_free(priv
);
870 iwl_tx_queue_free(priv
, txq_id
);
872 iwlagn_free_dma_ptr(priv
, &priv
->kw
);
874 iwlagn_free_dma_ptr(priv
, &priv
->scd_bc_tbls
);
876 /* free tx queue structure */
877 iwl_free_txq_mem(priv
);
881 * iwlagn_txq_ctx_alloc - allocate TX queue context
882 * Allocate all Tx DMA structures and initialize them
887 int iwlagn_txq_ctx_alloc(struct iwl_priv
*priv
)
890 int txq_id
, slots_num
;
893 /* Free all tx/cmd queues and keep-warm buffer */
894 iwlagn_hw_txq_ctx_free(priv
);
896 ret
= iwlagn_alloc_dma_ptr(priv
, &priv
->scd_bc_tbls
,
897 priv
->hw_params
.scd_bc_tbls_size
);
899 IWL_ERR(priv
, "Scheduler BC Table allocation failed\n");
902 /* Alloc keep-warm buffer */
903 ret
= iwlagn_alloc_dma_ptr(priv
, &priv
->kw
, IWL_KW_SIZE
);
905 IWL_ERR(priv
, "Keep Warm allocation failed\n");
909 /* allocate tx queue structure */
910 ret
= iwl_alloc_txq_mem(priv
);
914 spin_lock_irqsave(&priv
->lock
, flags
);
916 /* Turn off all Tx DMA fifos */
917 iwlagn_txq_set_sched(priv
, 0);
919 /* Tell NIC where to find the "keep warm" buffer */
920 iwl_write_direct32(priv
, FH_KW_MEM_ADDR_REG
, priv
->kw
.dma
>> 4);
922 spin_unlock_irqrestore(&priv
->lock
, flags
);
924 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
925 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
; txq_id
++) {
926 slots_num
= (txq_id
== priv
->cmd_queue
) ?
927 TFD_CMD_SLOTS
: TFD_TX_CMD_SLOTS
;
928 ret
= iwl_tx_queue_init(priv
, &priv
->txq
[txq_id
], slots_num
,
931 IWL_ERR(priv
, "Tx %d queue init failed\n", txq_id
);
939 iwlagn_hw_txq_ctx_free(priv
);
940 iwlagn_free_dma_ptr(priv
, &priv
->kw
);
942 iwlagn_free_dma_ptr(priv
, &priv
->scd_bc_tbls
);
947 void iwlagn_txq_ctx_reset(struct iwl_priv
*priv
)
949 int txq_id
, slots_num
;
952 spin_lock_irqsave(&priv
->lock
, flags
);
954 /* Turn off all Tx DMA fifos */
955 iwlagn_txq_set_sched(priv
, 0);
957 /* Tell NIC where to find the "keep warm" buffer */
958 iwl_write_direct32(priv
, FH_KW_MEM_ADDR_REG
, priv
->kw
.dma
>> 4);
960 spin_unlock_irqrestore(&priv
->lock
, flags
);
962 /* Alloc and init all Tx queues, including the command queue (#4) */
963 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
; txq_id
++) {
964 slots_num
= txq_id
== priv
->cmd_queue
?
965 TFD_CMD_SLOTS
: TFD_TX_CMD_SLOTS
;
966 iwl_tx_queue_reset(priv
, &priv
->txq
[txq_id
], slots_num
, txq_id
);
971 * iwlagn_txq_ctx_stop - Stop all Tx DMA channels
973 void iwlagn_txq_ctx_stop(struct iwl_priv
*priv
)
978 /* Turn off all Tx DMA fifos */
979 spin_lock_irqsave(&priv
->lock
, flags
);
981 iwlagn_txq_set_sched(priv
, 0);
983 /* Stop each Tx DMA channel, and wait for it to be idle */
984 for (ch
= 0; ch
< priv
->hw_params
.dma_chnl_num
; ch
++) {
985 iwl_write_direct32(priv
, FH_TCSR_CHNL_TX_CONFIG_REG(ch
), 0x0);
986 if (iwl_poll_direct_bit(priv
, FH_TSSR_TX_STATUS_REG
,
987 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch
),
989 IWL_ERR(priv
, "Failing on timeout while stopping"
990 " DMA channel %d [0x%08x]", ch
,
991 iwl_read_direct32(priv
, FH_TSSR_TX_STATUS_REG
));
993 spin_unlock_irqrestore(&priv
->lock
, flags
);
998 /* Unmap DMA from host system and free skb's */
999 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
; txq_id
++)
1000 if (txq_id
== priv
->cmd_queue
)
1001 iwl_cmd_queue_unmap(priv
);
1003 iwl_tx_queue_unmap(priv
, txq_id
);
1007 * Find first available (lowest unused) Tx Queue, mark it "active".
1008 * Called only when finding queue for aggregation.
1009 * Should never return anything < 7, because they should already
1010 * be in use as EDCA AC (0-3), Command (4), reserved (5, 6)
1012 static int iwlagn_txq_ctx_activate_free(struct iwl_priv
*priv
)
1016 for (txq_id
= 0; txq_id
< priv
->hw_params
.max_txq_num
; txq_id
++)
1017 if (!test_and_set_bit(txq_id
, &priv
->txq_ctx_active_msk
))
1022 int iwlagn_tx_agg_start(struct iwl_priv
*priv
, struct ieee80211_vif
*vif
,
1023 struct ieee80211_sta
*sta
, u16 tid
, u16
*ssn
)
1029 unsigned long flags
;
1030 struct iwl_tid_data
*tid_data
;
1032 tx_fifo
= get_fifo_from_tid(iwl_rxon_ctx_from_vif(vif
), tid
);
1033 if (unlikely(tx_fifo
< 0))
1036 IWL_DEBUG_HT(priv
, "TX AGG request on ra = %pM tid = %d\n",
1039 sta_id
= iwl_sta_id(sta
);
1040 if (sta_id
== IWL_INVALID_STATION
) {
1041 IWL_ERR(priv
, "Start AGG on invalid station\n");
1044 if (unlikely(tid
>= MAX_TID_COUNT
))
1047 if (priv
->stations
[sta_id
].tid
[tid
].agg
.state
!= IWL_AGG_OFF
) {
1048 IWL_ERR(priv
, "Start AGG when state is not IWL_AGG_OFF !\n");
1052 txq_id
= iwlagn_txq_ctx_activate_free(priv
);
1054 IWL_ERR(priv
, "No free aggregation queue available\n");
1058 spin_lock_irqsave(&priv
->sta_lock
, flags
);
1059 tid_data
= &priv
->stations
[sta_id
].tid
[tid
];
1060 *ssn
= SEQ_TO_SN(tid_data
->seq_number
);
1061 tid_data
->agg
.txq_id
= txq_id
;
1062 tid_data
->agg
.tx_fifo
= tx_fifo
;
1063 iwl_set_swq_id(&priv
->txq
[txq_id
], get_ac_from_tid(tid
), txq_id
);
1064 spin_unlock_irqrestore(&priv
->sta_lock
, flags
);
1066 ret
= iwlagn_txq_agg_enable(priv
, txq_id
, sta_id
, tid
);
1070 spin_lock_irqsave(&priv
->sta_lock
, flags
);
1071 tid_data
= &priv
->stations
[sta_id
].tid
[tid
];
1072 if (tid_data
->tfds_in_queue
== 0) {
1073 IWL_DEBUG_HT(priv
, "HW queue is empty\n");
1074 tid_data
->agg
.state
= IWL_AGG_ON
;
1075 ieee80211_start_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
1077 IWL_DEBUG_HT(priv
, "HW queue is NOT empty: %d packets in HW queue\n",
1078 tid_data
->tfds_in_queue
);
1079 tid_data
->agg
.state
= IWL_EMPTYING_HW_QUEUE_ADDBA
;
1081 spin_unlock_irqrestore(&priv
->sta_lock
, flags
);
1085 int iwlagn_tx_agg_stop(struct iwl_priv
*priv
, struct ieee80211_vif
*vif
,
1086 struct ieee80211_sta
*sta
, u16 tid
)
1088 int tx_fifo_id
, txq_id
, sta_id
, ssn
;
1089 struct iwl_tid_data
*tid_data
;
1090 int write_ptr
, read_ptr
;
1091 unsigned long flags
;
1093 tx_fifo_id
= get_fifo_from_tid(iwl_rxon_ctx_from_vif(vif
), tid
);
1094 if (unlikely(tx_fifo_id
< 0))
1097 sta_id
= iwl_sta_id(sta
);
1099 if (sta_id
== IWL_INVALID_STATION
) {
1100 IWL_ERR(priv
, "Invalid station for AGG tid %d\n", tid
);
1104 spin_lock_irqsave(&priv
->sta_lock
, flags
);
1106 tid_data
= &priv
->stations
[sta_id
].tid
[tid
];
1107 ssn
= (tid_data
->seq_number
& IEEE80211_SCTL_SEQ
) >> 4;
1108 txq_id
= tid_data
->agg
.txq_id
;
1110 switch (priv
->stations
[sta_id
].tid
[tid
].agg
.state
) {
1111 case IWL_EMPTYING_HW_QUEUE_ADDBA
:
1113 * This can happen if the peer stops aggregation
1114 * again before we've had a chance to drain the
1115 * queue we selected previously, i.e. before the
1116 * session was really started completely.
1118 IWL_DEBUG_HT(priv
, "AGG stop before setup done\n");
1123 IWL_WARN(priv
, "Stopping AGG while state not ON or starting\n");
1126 write_ptr
= priv
->txq
[txq_id
].q
.write_ptr
;
1127 read_ptr
= priv
->txq
[txq_id
].q
.read_ptr
;
1129 /* The queue is not empty */
1130 if (write_ptr
!= read_ptr
) {
1131 IWL_DEBUG_HT(priv
, "Stopping a non empty AGG HW QUEUE\n");
1132 priv
->stations
[sta_id
].tid
[tid
].agg
.state
=
1133 IWL_EMPTYING_HW_QUEUE_DELBA
;
1134 spin_unlock_irqrestore(&priv
->sta_lock
, flags
);
1138 IWL_DEBUG_HT(priv
, "HW queue is empty\n");
1140 priv
->stations
[sta_id
].tid
[tid
].agg
.state
= IWL_AGG_OFF
;
1142 /* do not restore/save irqs */
1143 spin_unlock(&priv
->sta_lock
);
1144 spin_lock(&priv
->lock
);
1147 * the only reason this call can fail is queue number out of range,
1148 * which can happen if uCode is reloaded and all the station
1149 * information are lost. if it is outside the range, there is no need
1150 * to deactivate the uCode queue, just return "success" to allow
1151 * mac80211 to clean up it own data.
1153 iwlagn_txq_agg_disable(priv
, txq_id
, ssn
, tx_fifo_id
);
1154 spin_unlock_irqrestore(&priv
->lock
, flags
);
1156 ieee80211_stop_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
1161 int iwlagn_txq_check_empty(struct iwl_priv
*priv
,
1162 int sta_id
, u8 tid
, int txq_id
)
1164 struct iwl_queue
*q
= &priv
->txq
[txq_id
].q
;
1165 u8
*addr
= priv
->stations
[sta_id
].sta
.sta
.addr
;
1166 struct iwl_tid_data
*tid_data
= &priv
->stations
[sta_id
].tid
[tid
];
1167 struct iwl_rxon_context
*ctx
;
1169 ctx
= &priv
->contexts
[priv
->stations
[sta_id
].ctxid
];
1171 lockdep_assert_held(&priv
->sta_lock
);
1173 switch (priv
->stations
[sta_id
].tid
[tid
].agg
.state
) {
1174 case IWL_EMPTYING_HW_QUEUE_DELBA
:
1175 /* We are reclaiming the last packet of the */
1176 /* aggregated HW queue */
1177 if ((txq_id
== tid_data
->agg
.txq_id
) &&
1178 (q
->read_ptr
== q
->write_ptr
)) {
1179 u16 ssn
= SEQ_TO_SN(tid_data
->seq_number
);
1180 int tx_fifo
= get_fifo_from_tid(ctx
, tid
);
1181 IWL_DEBUG_HT(priv
, "HW queue empty: continue DELBA flow\n");
1182 iwlagn_txq_agg_disable(priv
, txq_id
, ssn
, tx_fifo
);
1183 tid_data
->agg
.state
= IWL_AGG_OFF
;
1184 ieee80211_stop_tx_ba_cb_irqsafe(ctx
->vif
, addr
, tid
);
1187 case IWL_EMPTYING_HW_QUEUE_ADDBA
:
1188 /* We are reclaiming the last packet of the queue */
1189 if (tid_data
->tfds_in_queue
== 0) {
1190 IWL_DEBUG_HT(priv
, "HW queue empty: continue ADDBA flow\n");
1191 tid_data
->agg
.state
= IWL_AGG_ON
;
1192 ieee80211_start_tx_ba_cb_irqsafe(ctx
->vif
, addr
, tid
);
1200 static void iwlagn_non_agg_tx_status(struct iwl_priv
*priv
,
1201 struct iwl_rxon_context
*ctx
,
1204 struct ieee80211_sta
*sta
;
1205 struct iwl_station_priv
*sta_priv
;
1208 sta
= ieee80211_find_sta(ctx
->vif
, addr1
);
1210 sta_priv
= (void *)sta
->drv_priv
;
1211 /* avoid atomic ops if this isn't a client */
1212 if (sta_priv
->client
&&
1213 atomic_dec_return(&sta_priv
->pending_frames
) == 0)
1214 ieee80211_sta_block_awake(priv
->hw
, sta
, false);
1219 static void iwlagn_tx_status(struct iwl_priv
*priv
, struct iwl_tx_info
*tx_info
,
1222 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) tx_info
->skb
->data
;
1225 iwlagn_non_agg_tx_status(priv
, tx_info
->ctx
, hdr
->addr1
);
1227 ieee80211_tx_status_irqsafe(priv
->hw
, tx_info
->skb
);
1230 int iwlagn_tx_queue_reclaim(struct iwl_priv
*priv
, int txq_id
, int index
)
1232 struct iwl_tx_queue
*txq
= &priv
->txq
[txq_id
];
1233 struct iwl_queue
*q
= &txq
->q
;
1234 struct iwl_tx_info
*tx_info
;
1236 struct ieee80211_hdr
*hdr
;
1238 if ((index
>= q
->n_bd
) || (iwl_queue_used(q
, index
) == 0)) {
1239 IWL_ERR(priv
, "%s: Read index for DMA queue txq id (%d), "
1240 "index %d is out of range [0-%d] %d %d.\n", __func__
,
1241 txq_id
, index
, q
->n_bd
, q
->write_ptr
, q
->read_ptr
);
1245 for (index
= iwl_queue_inc_wrap(index
, q
->n_bd
);
1246 q
->read_ptr
!= index
;
1247 q
->read_ptr
= iwl_queue_inc_wrap(q
->read_ptr
, q
->n_bd
)) {
1249 tx_info
= &txq
->txb
[txq
->q
.read_ptr
];
1251 if (WARN_ON_ONCE(tx_info
->skb
== NULL
))
1254 hdr
= (struct ieee80211_hdr
*)tx_info
->skb
->data
;
1255 if (ieee80211_is_data_qos(hdr
->frame_control
))
1258 iwlagn_tx_status(priv
, tx_info
,
1259 txq_id
>= IWLAGN_FIRST_AMPDU_QUEUE
);
1260 tx_info
->skb
= NULL
;
1262 iwlagn_txq_inval_byte_cnt_tbl(priv
, txq
);
1264 iwlagn_txq_free_tfd(priv
, txq
);
1270 * iwlagn_tx_status_reply_compressed_ba - Update tx status from block-ack
1272 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
1273 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
1275 static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv
*priv
,
1276 struct iwl_ht_agg
*agg
,
1277 struct iwl_compressed_ba_resp
*ba_resp
)
1281 u16 seq_ctl
= le16_to_cpu(ba_resp
->seq_ctl
);
1282 u16 scd_flow
= le16_to_cpu(ba_resp
->scd_flow
);
1283 struct ieee80211_tx_info
*info
;
1284 u64 bitmap
, sent_bitmap
;
1286 if (unlikely(!agg
->wait_for_ba
)) {
1287 if (unlikely(ba_resp
->bitmap
))
1288 IWL_ERR(priv
, "Received BA when not expected\n");
1292 /* Mark that the expected block-ack response arrived */
1293 agg
->wait_for_ba
= 0;
1294 IWL_DEBUG_TX_REPLY(priv
, "BA %d %d\n", agg
->start_idx
, ba_resp
->seq_ctl
);
1296 /* Calculate shift to align block-ack bits with our Tx window bits */
1297 sh
= agg
->start_idx
- SEQ_TO_INDEX(seq_ctl
>> 4);
1302 * Check for success or failure according to the
1303 * transmitted bitmap and block-ack bitmap
1305 bitmap
= le64_to_cpu(ba_resp
->bitmap
) >> sh
;
1306 sent_bitmap
= bitmap
& agg
->bitmap
;
1308 /* Sanity check values reported by uCode */
1309 if (ba_resp
->txed_2_done
> ba_resp
->txed
) {
1310 IWL_DEBUG_TX_REPLY(priv
,
1311 "bogus sent(%d) and ack(%d) count\n",
1312 ba_resp
->txed
, ba_resp
->txed_2_done
);
1314 * set txed_2_done = txed,
1315 * so it won't impact rate scale
1317 ba_resp
->txed
= ba_resp
->txed_2_done
;
1319 IWL_DEBUG_HT(priv
, "agg frames sent:%d, acked:%d\n",
1320 ba_resp
->txed
, ba_resp
->txed_2_done
);
1322 /* Find the first ACKed frame to store the TX status */
1323 while (sent_bitmap
&& !(sent_bitmap
& 1)) {
1324 agg
->start_idx
= (agg
->start_idx
+ 1) & 0xff;
1328 info
= IEEE80211_SKB_CB(priv
->txq
[scd_flow
].txb
[agg
->start_idx
].skb
);
1329 memset(&info
->status
, 0, sizeof(info
->status
));
1330 info
->flags
|= IEEE80211_TX_STAT_ACK
;
1331 info
->flags
|= IEEE80211_TX_STAT_AMPDU
;
1332 info
->status
.ampdu_ack_len
= ba_resp
->txed_2_done
;
1333 info
->status
.ampdu_len
= ba_resp
->txed
;
1334 iwlagn_hwrate_to_tx_control(priv
, agg
->rate_n_flags
, info
);
1340 * translate ucode response to mac80211 tx status control values
1342 void iwlagn_hwrate_to_tx_control(struct iwl_priv
*priv
, u32 rate_n_flags
,
1343 struct ieee80211_tx_info
*info
)
1345 struct ieee80211_tx_rate
*r
= &info
->control
.rates
[0];
1347 info
->antenna_sel_tx
=
1348 ((rate_n_flags
& RATE_MCS_ANT_ABC_MSK
) >> RATE_MCS_ANT_POS
);
1349 if (rate_n_flags
& RATE_MCS_HT_MSK
)
1350 r
->flags
|= IEEE80211_TX_RC_MCS
;
1351 if (rate_n_flags
& RATE_MCS_GF_MSK
)
1352 r
->flags
|= IEEE80211_TX_RC_GREEN_FIELD
;
1353 if (rate_n_flags
& RATE_MCS_HT40_MSK
)
1354 r
->flags
|= IEEE80211_TX_RC_40_MHZ_WIDTH
;
1355 if (rate_n_flags
& RATE_MCS_DUP_MSK
)
1356 r
->flags
|= IEEE80211_TX_RC_DUP_DATA
;
1357 if (rate_n_flags
& RATE_MCS_SGI_MSK
)
1358 r
->flags
|= IEEE80211_TX_RC_SHORT_GI
;
1359 r
->idx
= iwlagn_hwrate_to_mac80211_idx(rate_n_flags
, info
->band
);
1363 * iwlagn_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
1365 * Handles block-acknowledge notification from device, which reports success
1366 * of frames sent via aggregation.
1368 void iwlagn_rx_reply_compressed_ba(struct iwl_priv
*priv
,
1369 struct iwl_rx_mem_buffer
*rxb
)
1371 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
1372 struct iwl_compressed_ba_resp
*ba_resp
= &pkt
->u
.compressed_ba
;
1373 struct iwl_tx_queue
*txq
= NULL
;
1374 struct iwl_ht_agg
*agg
;
1378 unsigned long flags
;
1380 /* "flow" corresponds to Tx queue */
1381 u16 scd_flow
= le16_to_cpu(ba_resp
->scd_flow
);
1383 /* "ssn" is start of block-ack Tx window, corresponds to index
1384 * (in Tx queue's circular buffer) of first TFD/frame in window */
1385 u16 ba_resp_scd_ssn
= le16_to_cpu(ba_resp
->scd_ssn
);
1387 if (scd_flow
>= priv
->hw_params
.max_txq_num
) {
1389 "BUG_ON scd_flow is bigger than number of queues\n");
1393 txq
= &priv
->txq
[scd_flow
];
1394 sta_id
= ba_resp
->sta_id
;
1396 agg
= &priv
->stations
[sta_id
].tid
[tid
].agg
;
1397 if (unlikely(agg
->txq_id
!= scd_flow
)) {
1399 * FIXME: this is a uCode bug which need to be addressed,
1400 * log the information and return for now!
1401 * since it is possible happen very often and in order
1402 * not to fill the syslog, don't enable the logging by default
1404 IWL_DEBUG_TX_REPLY(priv
,
1405 "BA scd_flow %d does not match txq_id %d\n",
1406 scd_flow
, agg
->txq_id
);
1410 /* Find index just before block-ack window */
1411 index
= iwl_queue_dec_wrap(ba_resp_scd_ssn
& 0xff, txq
->q
.n_bd
);
1413 spin_lock_irqsave(&priv
->sta_lock
, flags
);
1415 IWL_DEBUG_TX_REPLY(priv
, "REPLY_COMPRESSED_BA [%d] Received from %pM, "
1418 (u8
*) &ba_resp
->sta_addr_lo32
,
1420 IWL_DEBUG_TX_REPLY(priv
, "TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
1421 "%d, scd_ssn = %d\n",
1424 (unsigned long long)le64_to_cpu(ba_resp
->bitmap
),
1427 IWL_DEBUG_TX_REPLY(priv
, "DAT start_idx = %d, bitmap = 0x%llx\n",
1429 (unsigned long long)agg
->bitmap
);
1431 /* Update driver's record of ACK vs. not for each frame in window */
1432 iwlagn_tx_status_reply_compressed_ba(priv
, agg
, ba_resp
);
1434 /* Release all TFDs before the SSN, i.e. all TFDs in front of
1435 * block-ack window (we assume that they've been successfully
1436 * transmitted ... if not, it's too late anyway). */
1437 if (txq
->q
.read_ptr
!= (ba_resp_scd_ssn
& 0xff)) {
1438 /* calculate mac80211 ampdu sw queue to wake */
1439 int freed
= iwlagn_tx_queue_reclaim(priv
, scd_flow
, index
);
1440 iwl_free_tfds_in_queue(priv
, sta_id
, tid
, freed
);
1442 if ((iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
) &&
1443 priv
->mac80211_registered
&&
1444 (agg
->state
!= IWL_EMPTYING_HW_QUEUE_DELBA
))
1445 iwl_wake_queue(priv
, txq
);
1447 iwlagn_txq_check_empty(priv
, sta_id
, tid
, scd_flow
);
1450 spin_unlock_irqrestore(&priv
->sta_lock
, flags
);
1453 #ifdef CONFIG_IWLWIFI_DEBUG
1454 const char *iwl_get_tx_fail_reason(u32 status
)
1456 #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x
1457 #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x
1459 switch (status
& TX_STATUS_MSK
) {
1460 case TX_STATUS_SUCCESS
:
1462 TX_STATUS_POSTPONE(DELAY
);
1463 TX_STATUS_POSTPONE(FEW_BYTES
);
1464 TX_STATUS_POSTPONE(BT_PRIO
);
1465 TX_STATUS_POSTPONE(QUIET_PERIOD
);
1466 TX_STATUS_POSTPONE(CALC_TTAK
);
1467 TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY
);
1468 TX_STATUS_FAIL(SHORT_LIMIT
);
1469 TX_STATUS_FAIL(LONG_LIMIT
);
1470 TX_STATUS_FAIL(FIFO_UNDERRUN
);
1471 TX_STATUS_FAIL(DRAIN_FLOW
);
1472 TX_STATUS_FAIL(RFKILL_FLUSH
);
1473 TX_STATUS_FAIL(LIFE_EXPIRE
);
1474 TX_STATUS_FAIL(DEST_PS
);
1475 TX_STATUS_FAIL(HOST_ABORTED
);
1476 TX_STATUS_FAIL(BT_RETRY
);
1477 TX_STATUS_FAIL(STA_INVALID
);
1478 TX_STATUS_FAIL(FRAG_DROPPED
);
1479 TX_STATUS_FAIL(TID_DISABLE
);
1480 TX_STATUS_FAIL(FIFO_FLUSHED
);
1481 TX_STATUS_FAIL(INSUFFICIENT_CF_POLL
);
1482 TX_STATUS_FAIL(PASSIVE_NO_RX
);
1483 TX_STATUS_FAIL(NO_BEACON_ON_RADAR
);
1488 #undef TX_STATUS_FAIL
1489 #undef TX_STATUS_POSTPONE
1491 #endif /* CONFIG_IWLWIFI_DEBUG */