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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn-tx.c
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/sched.h>
34
35 #include "iwl-dev.h"
36 #include "iwl-core.h"
37 #include "iwl-sta.h"
38 #include "iwl-io.h"
39 #include "iwl-helpers.h"
40 #include "iwl-agn-hw.h"
41 #include "iwl-agn.h"
42
43 /*
44 * mac80211 queues, ACs, hardware queues, FIFOs.
45 *
46 * Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues
47 *
48 * Mac80211 uses the following numbers, which we get as from it
49 * by way of skb_get_queue_mapping(skb):
50 *
51 * VO 0
52 * VI 1
53 * BE 2
54 * BK 3
55 *
56 *
57 * Regular (not A-MPDU) frames are put into hardware queues corresponding
58 * to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their
59 * own queue per aggregation session (RA/TID combination), such queues are
60 * set up to map into FIFOs too, for which we need an AC->FIFO mapping. In
61 * order to map frames to the right queue, we also need an AC->hw queue
62 * mapping. This is implemented here.
63 *
64 * Due to the way hw queues are set up (by the hw specific modules like
65 * iwl-4965.c, iwl-5000.c etc.), the AC->hw queue mapping is the identity
66 * mapping.
67 */
68
69 static const u8 tid_to_ac[] = {
70 IEEE80211_AC_BE,
71 IEEE80211_AC_BK,
72 IEEE80211_AC_BK,
73 IEEE80211_AC_BE,
74 IEEE80211_AC_VI,
75 IEEE80211_AC_VI,
76 IEEE80211_AC_VO,
77 IEEE80211_AC_VO
78 };
79
80 static inline int get_ac_from_tid(u16 tid)
81 {
82 if (likely(tid < ARRAY_SIZE(tid_to_ac)))
83 return tid_to_ac[tid];
84
85 /* no support for TIDs 8-15 yet */
86 return -EINVAL;
87 }
88
89 static inline int get_fifo_from_tid(struct iwl_rxon_context *ctx, u16 tid)
90 {
91 if (likely(tid < ARRAY_SIZE(tid_to_ac)))
92 return ctx->ac_to_fifo[tid_to_ac[tid]];
93
94 /* no support for TIDs 8-15 yet */
95 return -EINVAL;
96 }
97
98 /**
99 * iwlagn_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
100 */
101 static void iwlagn_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
102 struct iwl_tx_queue *txq,
103 u16 byte_cnt)
104 {
105 struct iwlagn_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
106 int write_ptr = txq->q.write_ptr;
107 int txq_id = txq->q.id;
108 u8 sec_ctl = 0;
109 u8 sta_id = 0;
110 u16 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
111 __le16 bc_ent;
112
113 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
114
115 sta_id = txq->cmd[txq->q.write_ptr]->cmd.tx.sta_id;
116 sec_ctl = txq->cmd[txq->q.write_ptr]->cmd.tx.sec_ctl;
117
118 switch (sec_ctl & TX_CMD_SEC_MSK) {
119 case TX_CMD_SEC_CCM:
120 len += CCMP_MIC_LEN;
121 break;
122 case TX_CMD_SEC_TKIP:
123 len += TKIP_ICV_LEN;
124 break;
125 case TX_CMD_SEC_WEP:
126 len += WEP_IV_LEN + WEP_ICV_LEN;
127 break;
128 }
129
130 bc_ent = cpu_to_le16((len & 0xFFF) | (sta_id << 12));
131
132 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
133
134 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
135 scd_bc_tbl[txq_id].
136 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
137 }
138
139 static void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
140 struct iwl_tx_queue *txq)
141 {
142 struct iwlagn_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
143 int txq_id = txq->q.id;
144 int read_ptr = txq->q.read_ptr;
145 u8 sta_id = 0;
146 __le16 bc_ent;
147
148 WARN_ON(read_ptr >= TFD_QUEUE_SIZE_MAX);
149
150 if (txq_id != priv->cmd_queue)
151 sta_id = txq->cmd[read_ptr]->cmd.tx.sta_id;
152
153 bc_ent = cpu_to_le16(1 | (sta_id << 12));
154 scd_bc_tbl[txq_id].tfd_offset[read_ptr] = bc_ent;
155
156 if (read_ptr < TFD_QUEUE_SIZE_BC_DUP)
157 scd_bc_tbl[txq_id].
158 tfd_offset[TFD_QUEUE_SIZE_MAX + read_ptr] = bc_ent;
159 }
160
161 static int iwlagn_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
162 u16 txq_id)
163 {
164 u32 tbl_dw_addr;
165 u32 tbl_dw;
166 u16 scd_q2ratid;
167
168 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
169
170 tbl_dw_addr = priv->scd_base_addr +
171 IWLAGN_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
172
173 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
174
175 if (txq_id & 0x1)
176 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
177 else
178 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
179
180 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
181
182 return 0;
183 }
184
185 static void iwlagn_tx_queue_stop_scheduler(struct iwl_priv *priv, u16 txq_id)
186 {
187 /* Simply stop the queue, but don't change any configuration;
188 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
189 iwl_write_prph(priv,
190 IWLAGN_SCD_QUEUE_STATUS_BITS(txq_id),
191 (0 << IWLAGN_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
192 (1 << IWLAGN_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
193 }
194
195 void iwlagn_set_wr_ptrs(struct iwl_priv *priv,
196 int txq_id, u32 index)
197 {
198 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
199 (index & 0xff) | (txq_id << 8));
200 iwl_write_prph(priv, IWLAGN_SCD_QUEUE_RDPTR(txq_id), index);
201 }
202
203 void iwlagn_tx_queue_set_status(struct iwl_priv *priv,
204 struct iwl_tx_queue *txq,
205 int tx_fifo_id, int scd_retry)
206 {
207 int txq_id = txq->q.id;
208 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
209
210 iwl_write_prph(priv, IWLAGN_SCD_QUEUE_STATUS_BITS(txq_id),
211 (active << IWLAGN_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
212 (tx_fifo_id << IWLAGN_SCD_QUEUE_STTS_REG_POS_TXF) |
213 (1 << IWLAGN_SCD_QUEUE_STTS_REG_POS_WSL) |
214 IWLAGN_SCD_QUEUE_STTS_REG_MSK);
215
216 txq->sched_retry = scd_retry;
217
218 IWL_DEBUG_INFO(priv, "%s %s Queue %d on FIFO %d\n",
219 active ? "Activate" : "Deactivate",
220 scd_retry ? "BA" : "AC/CMD", txq_id, tx_fifo_id);
221 }
222
223 static int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, int sta_id, int tid)
224 {
225 if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) ||
226 (IWLAGN_FIRST_AMPDU_QUEUE +
227 priv->cfg->base_params->num_of_ampdu_queues <= txq_id)) {
228 IWL_WARN(priv,
229 "queue number out of range: %d, must be %d to %d\n",
230 txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
231 IWLAGN_FIRST_AMPDU_QUEUE +
232 priv->cfg->base_params->num_of_ampdu_queues - 1);
233 return -EINVAL;
234 }
235
236 /* Modify device's station table to Tx this TID */
237 return iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
238 }
239
240 void iwlagn_txq_agg_queue_setup(struct iwl_priv *priv,
241 struct ieee80211_sta *sta,
242 int tid, int frame_limit)
243 {
244 int sta_id, tx_fifo, txq_id, ssn_idx;
245 u16 ra_tid;
246 unsigned long flags;
247 struct iwl_tid_data *tid_data;
248
249 sta_id = iwl_sta_id(sta);
250 if (WARN_ON(sta_id == IWL_INVALID_STATION))
251 return;
252 if (WARN_ON(tid >= MAX_TID_COUNT))
253 return;
254
255 spin_lock_irqsave(&priv->sta_lock, flags);
256 tid_data = &priv->stations[sta_id].tid[tid];
257 ssn_idx = SEQ_TO_SN(tid_data->seq_number);
258 txq_id = tid_data->agg.txq_id;
259 tx_fifo = tid_data->agg.tx_fifo;
260 spin_unlock_irqrestore(&priv->sta_lock, flags);
261
262 ra_tid = BUILD_RAxTID(sta_id, tid);
263
264 spin_lock_irqsave(&priv->lock, flags);
265
266 /* Stop this Tx queue before configuring it */
267 iwlagn_tx_queue_stop_scheduler(priv, txq_id);
268
269 /* Map receiver-address / traffic-ID to this queue */
270 iwlagn_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
271
272 /* Set this queue as a chain-building queue */
273 iwl_set_bits_prph(priv, IWLAGN_SCD_QUEUECHAIN_SEL, (1<<txq_id));
274
275 /* enable aggregations for the queue */
276 iwl_set_bits_prph(priv, IWLAGN_SCD_AGGR_SEL, (1<<txq_id));
277
278 /* Place first TFD at index corresponding to start sequence number.
279 * Assumes that ssn_idx is valid (!= 0xFFF) */
280 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
281 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
282 iwlagn_set_wr_ptrs(priv, txq_id, ssn_idx);
283
284 /* Set up Tx window size and frame limit for this queue */
285 iwl_write_targ_mem(priv, priv->scd_base_addr +
286 IWLAGN_SCD_CONTEXT_QUEUE_OFFSET(txq_id) +
287 sizeof(u32),
288 ((frame_limit <<
289 IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &
290 IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |
291 ((frame_limit <<
292 IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
293 IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));
294
295 iwl_set_bits_prph(priv, IWLAGN_SCD_INTERRUPT_MASK, (1 << txq_id));
296
297 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
298 iwlagn_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
299
300 spin_unlock_irqrestore(&priv->lock, flags);
301 }
302
303 static int iwlagn_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
304 u16 ssn_idx, u8 tx_fifo)
305 {
306 if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) ||
307 (IWLAGN_FIRST_AMPDU_QUEUE +
308 priv->cfg->base_params->num_of_ampdu_queues <= txq_id)) {
309 IWL_ERR(priv,
310 "queue number out of range: %d, must be %d to %d\n",
311 txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
312 IWLAGN_FIRST_AMPDU_QUEUE +
313 priv->cfg->base_params->num_of_ampdu_queues - 1);
314 return -EINVAL;
315 }
316
317 iwlagn_tx_queue_stop_scheduler(priv, txq_id);
318
319 iwl_clear_bits_prph(priv, IWLAGN_SCD_AGGR_SEL, (1 << txq_id));
320
321 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
322 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
323 /* supposes that ssn_idx is valid (!= 0xFFF) */
324 iwlagn_set_wr_ptrs(priv, txq_id, ssn_idx);
325
326 iwl_clear_bits_prph(priv, IWLAGN_SCD_INTERRUPT_MASK, (1 << txq_id));
327 iwl_txq_ctx_deactivate(priv, txq_id);
328 iwlagn_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
329
330 return 0;
331 }
332
333 /*
334 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
335 * must be called under priv->lock and mac access
336 */
337 void iwlagn_txq_set_sched(struct iwl_priv *priv, u32 mask)
338 {
339 iwl_write_prph(priv, IWLAGN_SCD_TXFACT, mask);
340 }
341
342 static void iwlagn_tx_cmd_protection(struct iwl_priv *priv,
343 struct ieee80211_tx_info *info,
344 __le16 fc, __le32 *tx_flags)
345 {
346 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS ||
347 info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT ||
348 info->flags & IEEE80211_TX_CTL_AMPDU)
349 *tx_flags |= TX_CMD_FLG_PROT_REQUIRE_MSK;
350 }
351
352 /*
353 * handle build REPLY_TX command notification.
354 */
355 static void iwlagn_tx_cmd_build_basic(struct iwl_priv *priv,
356 struct sk_buff *skb,
357 struct iwl_tx_cmd *tx_cmd,
358 struct ieee80211_tx_info *info,
359 struct ieee80211_hdr *hdr,
360 u8 std_id)
361 {
362 __le16 fc = hdr->frame_control;
363 __le32 tx_flags = tx_cmd->tx_flags;
364
365 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
366 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
367 tx_flags |= TX_CMD_FLG_ACK_MSK;
368 if (ieee80211_is_mgmt(fc))
369 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
370 if (ieee80211_is_probe_resp(fc) &&
371 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
372 tx_flags |= TX_CMD_FLG_TSF_MSK;
373 } else {
374 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
375 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
376 }
377
378 if (ieee80211_is_back_req(fc))
379 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
380 else if (info->band == IEEE80211_BAND_2GHZ &&
381 priv->cfg->bt_params &&
382 priv->cfg->bt_params->advanced_bt_coexist &&
383 (ieee80211_is_auth(fc) || ieee80211_is_assoc_req(fc) ||
384 ieee80211_is_reassoc_req(fc) ||
385 skb->protocol == cpu_to_be16(ETH_P_PAE)))
386 tx_flags |= TX_CMD_FLG_IGNORE_BT;
387
388
389 tx_cmd->sta_id = std_id;
390 if (ieee80211_has_morefrags(fc))
391 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
392
393 if (ieee80211_is_data_qos(fc)) {
394 u8 *qc = ieee80211_get_qos_ctl(hdr);
395 tx_cmd->tid_tspec = qc[0] & 0xf;
396 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
397 } else {
398 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
399 }
400
401 iwlagn_tx_cmd_protection(priv, info, fc, &tx_flags);
402
403 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
404 if (ieee80211_is_mgmt(fc)) {
405 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
406 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
407 else
408 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
409 } else {
410 tx_cmd->timeout.pm_frame_timeout = 0;
411 }
412
413 tx_cmd->driver_txop = 0;
414 tx_cmd->tx_flags = tx_flags;
415 tx_cmd->next_frame_len = 0;
416 }
417
418 #define RTS_DFAULT_RETRY_LIMIT 60
419
420 static void iwlagn_tx_cmd_build_rate(struct iwl_priv *priv,
421 struct iwl_tx_cmd *tx_cmd,
422 struct ieee80211_tx_info *info,
423 __le16 fc)
424 {
425 u32 rate_flags;
426 int rate_idx;
427 u8 rts_retry_limit;
428 u8 data_retry_limit;
429 u8 rate_plcp;
430
431 /* Set retry limit on DATA packets and Probe Responses*/
432 if (ieee80211_is_probe_resp(fc))
433 data_retry_limit = 3;
434 else
435 data_retry_limit = IWLAGN_DEFAULT_TX_RETRY;
436 tx_cmd->data_retry_limit = data_retry_limit;
437
438 /* Set retry limit on RTS packets */
439 rts_retry_limit = RTS_DFAULT_RETRY_LIMIT;
440 if (data_retry_limit < rts_retry_limit)
441 rts_retry_limit = data_retry_limit;
442 tx_cmd->rts_retry_limit = rts_retry_limit;
443
444 /* DATA packets will use the uCode station table for rate/antenna
445 * selection */
446 if (ieee80211_is_data(fc)) {
447 tx_cmd->initial_rate_index = 0;
448 tx_cmd->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
449 if (priv->tm_fixed_rate) {
450 /*
451 * rate overwrite by testmode
452 * we not only send lq command to change rate
453 * we also re-enforce per data pkt base.
454 */
455 tx_cmd->tx_flags &= ~TX_CMD_FLG_STA_RATE_MSK;
456 memcpy(&tx_cmd->rate_n_flags, &priv->tm_fixed_rate,
457 sizeof(tx_cmd->rate_n_flags));
458 }
459 return;
460 }
461
462 /**
463 * If the current TX rate stored in mac80211 has the MCS bit set, it's
464 * not really a TX rate. Thus, we use the lowest supported rate for
465 * this band. Also use the lowest supported rate if the stored rate
466 * index is invalid.
467 */
468 rate_idx = info->control.rates[0].idx;
469 if (info->control.rates[0].flags & IEEE80211_TX_RC_MCS ||
470 (rate_idx < 0) || (rate_idx > IWL_RATE_COUNT_LEGACY))
471 rate_idx = rate_lowest_index(&priv->bands[info->band],
472 info->control.sta);
473 /* For 5 GHZ band, remap mac80211 rate indices into driver indices */
474 if (info->band == IEEE80211_BAND_5GHZ)
475 rate_idx += IWL_FIRST_OFDM_RATE;
476 /* Get PLCP rate for tx_cmd->rate_n_flags */
477 rate_plcp = iwl_rates[rate_idx].plcp;
478 /* Zero out flags for this packet */
479 rate_flags = 0;
480
481 /* Set CCK flag as needed */
482 if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
483 rate_flags |= RATE_MCS_CCK_MSK;
484
485 /* Set up antennas */
486 if (priv->cfg->bt_params &&
487 priv->cfg->bt_params->advanced_bt_coexist &&
488 priv->bt_full_concurrent) {
489 /* operated as 1x1 in full concurrency mode */
490 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
491 first_antenna(priv->hw_params.valid_tx_ant));
492 } else
493 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
494 priv->hw_params.valid_tx_ant);
495 rate_flags |= iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
496
497 /* Set the rate in the TX cmd */
498 tx_cmd->rate_n_flags = iwl_hw_set_rate_n_flags(rate_plcp, rate_flags);
499 }
500
501 static void iwlagn_tx_cmd_build_hwcrypto(struct iwl_priv *priv,
502 struct ieee80211_tx_info *info,
503 struct iwl_tx_cmd *tx_cmd,
504 struct sk_buff *skb_frag,
505 int sta_id)
506 {
507 struct ieee80211_key_conf *keyconf = info->control.hw_key;
508
509 switch (keyconf->cipher) {
510 case WLAN_CIPHER_SUITE_CCMP:
511 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
512 memcpy(tx_cmd->key, keyconf->key, keyconf->keylen);
513 if (info->flags & IEEE80211_TX_CTL_AMPDU)
514 tx_cmd->tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
515 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
516 break;
517
518 case WLAN_CIPHER_SUITE_TKIP:
519 tx_cmd->sec_ctl = TX_CMD_SEC_TKIP;
520 ieee80211_get_tkip_p2k(keyconf, skb_frag, tx_cmd->key);
521 IWL_DEBUG_TX(priv, "tx_cmd with tkip hwcrypto\n");
522 break;
523
524 case WLAN_CIPHER_SUITE_WEP104:
525 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
526 /* fall through */
527 case WLAN_CIPHER_SUITE_WEP40:
528 tx_cmd->sec_ctl |= (TX_CMD_SEC_WEP |
529 (keyconf->keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
530
531 memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen);
532
533 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
534 "with key %d\n", keyconf->keyidx);
535 break;
536
537 default:
538 IWL_ERR(priv, "Unknown encode cipher %x\n", keyconf->cipher);
539 break;
540 }
541 }
542
543 /*
544 * start REPLY_TX command process
545 */
546 int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
547 {
548 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
549 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
550 struct ieee80211_sta *sta = info->control.sta;
551 struct iwl_station_priv *sta_priv = NULL;
552 struct iwl_tx_queue *txq;
553 struct iwl_queue *q;
554 struct iwl_device_cmd *out_cmd;
555 struct iwl_cmd_meta *out_meta;
556 struct iwl_tx_cmd *tx_cmd;
557 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
558 int txq_id;
559 dma_addr_t phys_addr = 0;
560 dma_addr_t txcmd_phys;
561 dma_addr_t scratch_phys;
562 u16 len, firstlen, secondlen;
563 u16 seq_number = 0;
564 __le16 fc;
565 u8 hdr_len;
566 u8 sta_id;
567 u8 wait_write_ptr = 0;
568 u8 tid = 0;
569 u8 *qc = NULL;
570 unsigned long flags;
571 bool is_agg = false;
572
573 /*
574 * If the frame needs to go out off-channel, then
575 * we'll have put the PAN context to that channel,
576 * so make the frame go out there.
577 */
578 if (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)
579 ctx = &priv->contexts[IWL_RXON_CTX_PAN];
580 else if (info->control.vif)
581 ctx = iwl_rxon_ctx_from_vif(info->control.vif);
582
583 spin_lock_irqsave(&priv->lock, flags);
584 if (iwl_is_rfkill(priv)) {
585 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
586 goto drop_unlock_priv;
587 }
588
589 fc = hdr->frame_control;
590
591 #ifdef CONFIG_IWLWIFI_DEBUG
592 if (ieee80211_is_auth(fc))
593 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
594 else if (ieee80211_is_assoc_req(fc))
595 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
596 else if (ieee80211_is_reassoc_req(fc))
597 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
598 #endif
599
600 hdr_len = ieee80211_hdrlen(fc);
601
602 /* For management frames use broadcast id to do not break aggregation */
603 if (!ieee80211_is_data(fc))
604 sta_id = ctx->bcast_sta_id;
605 else {
606 /* Find index into station table for destination station */
607 sta_id = iwl_sta_id_or_broadcast(priv, ctx, info->control.sta);
608 if (sta_id == IWL_INVALID_STATION) {
609 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
610 hdr->addr1);
611 goto drop_unlock_priv;
612 }
613 }
614
615 IWL_DEBUG_TX(priv, "station Id %d\n", sta_id);
616
617 if (sta)
618 sta_priv = (void *)sta->drv_priv;
619
620 if (sta_priv && sta_priv->asleep &&
621 (info->flags & IEEE80211_TX_CTL_PSPOLL_RESPONSE)) {
622 /*
623 * This sends an asynchronous command to the device,
624 * but we can rely on it being processed before the
625 * next frame is processed -- and the next frame to
626 * this station is the one that will consume this
627 * counter.
628 * For now set the counter to just 1 since we do not
629 * support uAPSD yet.
630 */
631 iwl_sta_modify_sleep_tx_count(priv, sta_id, 1);
632 }
633
634 /*
635 * Send this frame after DTIM -- there's a special queue
636 * reserved for this for contexts that support AP mode.
637 */
638 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
639 txq_id = ctx->mcast_queue;
640 /*
641 * The microcode will clear the more data
642 * bit in the last frame it transmits.
643 */
644 hdr->frame_control |=
645 cpu_to_le16(IEEE80211_FCTL_MOREDATA);
646 } else
647 txq_id = ctx->ac_to_queue[skb_get_queue_mapping(skb)];
648
649 /* irqs already disabled/saved above when locking priv->lock */
650 spin_lock(&priv->sta_lock);
651
652 if (ieee80211_is_data_qos(fc)) {
653 qc = ieee80211_get_qos_ctl(hdr);
654 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
655
656 if (WARN_ON_ONCE(tid >= MAX_TID_COUNT))
657 goto drop_unlock_sta;
658
659 seq_number = priv->stations[sta_id].tid[tid].seq_number;
660 seq_number &= IEEE80211_SCTL_SEQ;
661 hdr->seq_ctrl = hdr->seq_ctrl &
662 cpu_to_le16(IEEE80211_SCTL_FRAG);
663 hdr->seq_ctrl |= cpu_to_le16(seq_number);
664 seq_number += 0x10;
665 /* aggregation is on for this <sta,tid> */
666 if (info->flags & IEEE80211_TX_CTL_AMPDU &&
667 priv->stations[sta_id].tid[tid].agg.state == IWL_AGG_ON) {
668 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
669 is_agg = true;
670 }
671 }
672
673 txq = &priv->txq[txq_id];
674 q = &txq->q;
675
676 if (unlikely(iwl_queue_space(q) < q->high_mark))
677 goto drop_unlock_sta;
678
679 /* Set up driver data for this TFD */
680 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
681 txq->txb[q->write_ptr].skb = skb;
682 txq->txb[q->write_ptr].ctx = ctx;
683
684 /* Set up first empty entry in queue's array of Tx/cmd buffers */
685 out_cmd = txq->cmd[q->write_ptr];
686 out_meta = &txq->meta[q->write_ptr];
687 tx_cmd = &out_cmd->cmd.tx;
688 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
689 memset(tx_cmd, 0, sizeof(struct iwl_tx_cmd));
690
691 /*
692 * Set up the Tx-command (not MAC!) header.
693 * Store the chosen Tx queue and TFD index within the sequence field;
694 * after Tx, uCode's Tx response will return this value so driver can
695 * locate the frame within the tx queue and do post-tx processing.
696 */
697 out_cmd->hdr.cmd = REPLY_TX;
698 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
699 INDEX_TO_SEQ(q->write_ptr)));
700
701 /* Copy MAC header from skb into command buffer */
702 memcpy(tx_cmd->hdr, hdr, hdr_len);
703
704
705 /* Total # bytes to be transmitted */
706 len = (u16)skb->len;
707 tx_cmd->len = cpu_to_le16(len);
708
709 if (info->control.hw_key)
710 iwlagn_tx_cmd_build_hwcrypto(priv, info, tx_cmd, skb, sta_id);
711
712 /* TODO need this for burst mode later on */
713 iwlagn_tx_cmd_build_basic(priv, skb, tx_cmd, info, hdr, sta_id);
714 iwl_dbg_log_tx_data_frame(priv, len, hdr);
715
716 iwlagn_tx_cmd_build_rate(priv, tx_cmd, info, fc);
717
718 iwl_update_stats(priv, true, fc, len);
719 /*
720 * Use the first empty entry in this queue's command buffer array
721 * to contain the Tx command and MAC header concatenated together
722 * (payload data will be in another buffer).
723 * Size of this varies, due to varying MAC header length.
724 * If end is not dword aligned, we'll have 2 extra bytes at the end
725 * of the MAC header (device reads on dword boundaries).
726 * We'll tell device about this padding later.
727 */
728 len = sizeof(struct iwl_tx_cmd) +
729 sizeof(struct iwl_cmd_header) + hdr_len;
730 firstlen = (len + 3) & ~3;
731
732 /* Tell NIC about any 2-byte padding after MAC header */
733 if (firstlen != len)
734 tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
735
736 /* Physical address of this Tx command's header (not MAC header!),
737 * within command buffer array. */
738 txcmd_phys = dma_map_single(priv->bus.dev,
739 &out_cmd->hdr, firstlen,
740 DMA_BIDIRECTIONAL);
741 if (unlikely(dma_mapping_error(priv->bus.dev, txcmd_phys)))
742 goto drop_unlock_sta;
743 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
744 dma_unmap_len_set(out_meta, len, firstlen);
745
746 if (!ieee80211_has_morefrags(hdr->frame_control)) {
747 txq->need_update = 1;
748 } else {
749 wait_write_ptr = 1;
750 txq->need_update = 0;
751 }
752
753 /* Set up TFD's 2nd entry to point directly to remainder of skb,
754 * if any (802.11 null frames have no payload). */
755 secondlen = skb->len - hdr_len;
756 if (secondlen > 0) {
757 phys_addr = dma_map_single(priv->bus.dev, skb->data + hdr_len,
758 secondlen, DMA_TO_DEVICE);
759 if (unlikely(dma_mapping_error(priv->bus.dev, phys_addr))) {
760 dma_unmap_single(priv->bus.dev,
761 dma_unmap_addr(out_meta, mapping),
762 dma_unmap_len(out_meta, len),
763 DMA_BIDIRECTIONAL);
764 goto drop_unlock_sta;
765 }
766 }
767
768 if (ieee80211_is_data_qos(fc)) {
769 priv->stations[sta_id].tid[tid].tfds_in_queue++;
770 if (!ieee80211_has_morefrags(fc))
771 priv->stations[sta_id].tid[tid].seq_number = seq_number;
772 }
773
774 spin_unlock(&priv->sta_lock);
775
776 /* Attach buffers to TFD */
777 iwlagn_txq_attach_buf_to_tfd(priv, txq, txcmd_phys, firstlen, 1);
778 if (secondlen > 0)
779 iwlagn_txq_attach_buf_to_tfd(priv, txq, phys_addr,
780 secondlen, 0);
781
782 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
783 offsetof(struct iwl_tx_cmd, scratch);
784
785 /* take back ownership of DMA buffer to enable update */
786 dma_sync_single_for_cpu(priv->bus.dev, txcmd_phys, firstlen,
787 DMA_BIDIRECTIONAL);
788 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
789 tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
790
791 IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
792 le16_to_cpu(out_cmd->hdr.sequence));
793 IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
794 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd));
795 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
796
797 /* Set up entry for this TFD in Tx byte-count array */
798 if (info->flags & IEEE80211_TX_CTL_AMPDU)
799 iwlagn_txq_update_byte_cnt_tbl(priv, txq,
800 le16_to_cpu(tx_cmd->len));
801
802 dma_sync_single_for_device(priv->bus.dev, txcmd_phys, firstlen,
803 DMA_BIDIRECTIONAL);
804
805 trace_iwlwifi_dev_tx(priv,
806 &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr],
807 sizeof(struct iwl_tfd),
808 &out_cmd->hdr, firstlen,
809 skb->data + hdr_len, secondlen);
810
811 /* Tell device the write index *just past* this latest filled TFD */
812 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
813 iwl_txq_update_write_ptr(priv, txq);
814 spin_unlock_irqrestore(&priv->lock, flags);
815
816 /*
817 * At this point the frame is "transmitted" successfully
818 * and we will get a TX status notification eventually,
819 * regardless of the value of ret. "ret" only indicates
820 * whether or not we should update the write pointer.
821 */
822
823 /*
824 * Avoid atomic ops if it isn't an associated client.
825 * Also, if this is a packet for aggregation, don't
826 * increase the counter because the ucode will stop
827 * aggregation queues when their respective station
828 * goes to sleep.
829 */
830 if (sta_priv && sta_priv->client && !is_agg)
831 atomic_inc(&sta_priv->pending_frames);
832
833 if ((iwl_queue_space(q) < q->high_mark) && priv->mac80211_registered) {
834 if (wait_write_ptr) {
835 spin_lock_irqsave(&priv->lock, flags);
836 txq->need_update = 1;
837 iwl_txq_update_write_ptr(priv, txq);
838 spin_unlock_irqrestore(&priv->lock, flags);
839 } else {
840 iwl_stop_queue(priv, txq);
841 }
842 }
843
844 return 0;
845
846 drop_unlock_sta:
847 spin_unlock(&priv->sta_lock);
848 drop_unlock_priv:
849 spin_unlock_irqrestore(&priv->lock, flags);
850 return -1;
851 }
852
853 /*
854 * Find first available (lowest unused) Tx Queue, mark it "active".
855 * Called only when finding queue for aggregation.
856 * Should never return anything < 7, because they should already
857 * be in use as EDCA AC (0-3), Command (4), reserved (5, 6)
858 */
859 static int iwlagn_txq_ctx_activate_free(struct iwl_priv *priv)
860 {
861 int txq_id;
862
863 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
864 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
865 return txq_id;
866 return -1;
867 }
868
869 int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
870 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
871 {
872 int sta_id;
873 int tx_fifo;
874 int txq_id;
875 int ret;
876 unsigned long flags;
877 struct iwl_tid_data *tid_data;
878
879 tx_fifo = get_fifo_from_tid(iwl_rxon_ctx_from_vif(vif), tid);
880 if (unlikely(tx_fifo < 0))
881 return tx_fifo;
882
883 IWL_DEBUG_HT(priv, "TX AGG request on ra = %pM tid = %d\n",
884 sta->addr, tid);
885
886 sta_id = iwl_sta_id(sta);
887 if (sta_id == IWL_INVALID_STATION) {
888 IWL_ERR(priv, "Start AGG on invalid station\n");
889 return -ENXIO;
890 }
891 if (unlikely(tid >= MAX_TID_COUNT))
892 return -EINVAL;
893
894 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
895 IWL_ERR(priv, "Start AGG when state is not IWL_AGG_OFF !\n");
896 return -ENXIO;
897 }
898
899 txq_id = iwlagn_txq_ctx_activate_free(priv);
900 if (txq_id == -1) {
901 IWL_ERR(priv, "No free aggregation queue available\n");
902 return -ENXIO;
903 }
904
905 spin_lock_irqsave(&priv->sta_lock, flags);
906 tid_data = &priv->stations[sta_id].tid[tid];
907 *ssn = SEQ_TO_SN(tid_data->seq_number);
908 tid_data->agg.txq_id = txq_id;
909 tid_data->agg.tx_fifo = tx_fifo;
910 iwl_set_swq_id(&priv->txq[txq_id], get_ac_from_tid(tid), txq_id);
911 spin_unlock_irqrestore(&priv->sta_lock, flags);
912
913 ret = iwlagn_txq_agg_enable(priv, txq_id, sta_id, tid);
914 if (ret)
915 return ret;
916
917 spin_lock_irqsave(&priv->sta_lock, flags);
918 tid_data = &priv->stations[sta_id].tid[tid];
919 if (tid_data->tfds_in_queue == 0) {
920 IWL_DEBUG_HT(priv, "HW queue is empty\n");
921 tid_data->agg.state = IWL_AGG_ON;
922 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
923 } else {
924 IWL_DEBUG_HT(priv, "HW queue is NOT empty: %d packets in HW queue\n",
925 tid_data->tfds_in_queue);
926 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
927 }
928 spin_unlock_irqrestore(&priv->sta_lock, flags);
929 return ret;
930 }
931
932 int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
933 struct ieee80211_sta *sta, u16 tid)
934 {
935 int tx_fifo_id, txq_id, sta_id, ssn;
936 struct iwl_tid_data *tid_data;
937 int write_ptr, read_ptr;
938 unsigned long flags;
939
940 tx_fifo_id = get_fifo_from_tid(iwl_rxon_ctx_from_vif(vif), tid);
941 if (unlikely(tx_fifo_id < 0))
942 return tx_fifo_id;
943
944 sta_id = iwl_sta_id(sta);
945
946 if (sta_id == IWL_INVALID_STATION) {
947 IWL_ERR(priv, "Invalid station for AGG tid %d\n", tid);
948 return -ENXIO;
949 }
950
951 spin_lock_irqsave(&priv->sta_lock, flags);
952
953 tid_data = &priv->stations[sta_id].tid[tid];
954 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
955 txq_id = tid_data->agg.txq_id;
956
957 switch (priv->stations[sta_id].tid[tid].agg.state) {
958 case IWL_EMPTYING_HW_QUEUE_ADDBA:
959 /*
960 * This can happen if the peer stops aggregation
961 * again before we've had a chance to drain the
962 * queue we selected previously, i.e. before the
963 * session was really started completely.
964 */
965 IWL_DEBUG_HT(priv, "AGG stop before setup done\n");
966 goto turn_off;
967 case IWL_AGG_ON:
968 break;
969 default:
970 IWL_WARN(priv, "Stopping AGG while state not ON or starting\n");
971 }
972
973 write_ptr = priv->txq[txq_id].q.write_ptr;
974 read_ptr = priv->txq[txq_id].q.read_ptr;
975
976 /* The queue is not empty */
977 if (write_ptr != read_ptr) {
978 IWL_DEBUG_HT(priv, "Stopping a non empty AGG HW QUEUE\n");
979 priv->stations[sta_id].tid[tid].agg.state =
980 IWL_EMPTYING_HW_QUEUE_DELBA;
981 spin_unlock_irqrestore(&priv->sta_lock, flags);
982 return 0;
983 }
984
985 IWL_DEBUG_HT(priv, "HW queue is empty\n");
986 turn_off:
987 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
988
989 /* do not restore/save irqs */
990 spin_unlock(&priv->sta_lock);
991 spin_lock(&priv->lock);
992
993 /*
994 * the only reason this call can fail is queue number out of range,
995 * which can happen if uCode is reloaded and all the station
996 * information are lost. if it is outside the range, there is no need
997 * to deactivate the uCode queue, just return "success" to allow
998 * mac80211 to clean up it own data.
999 */
1000 iwlagn_txq_agg_disable(priv, txq_id, ssn, tx_fifo_id);
1001 spin_unlock_irqrestore(&priv->lock, flags);
1002
1003 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1004
1005 return 0;
1006 }
1007
1008 int iwlagn_txq_check_empty(struct iwl_priv *priv,
1009 int sta_id, u8 tid, int txq_id)
1010 {
1011 struct iwl_queue *q = &priv->txq[txq_id].q;
1012 u8 *addr = priv->stations[sta_id].sta.sta.addr;
1013 struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
1014 struct iwl_rxon_context *ctx;
1015
1016 ctx = &priv->contexts[priv->stations[sta_id].ctxid];
1017
1018 lockdep_assert_held(&priv->sta_lock);
1019
1020 switch (priv->stations[sta_id].tid[tid].agg.state) {
1021 case IWL_EMPTYING_HW_QUEUE_DELBA:
1022 /* We are reclaiming the last packet of the */
1023 /* aggregated HW queue */
1024 if ((txq_id == tid_data->agg.txq_id) &&
1025 (q->read_ptr == q->write_ptr)) {
1026 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
1027 int tx_fifo = get_fifo_from_tid(ctx, tid);
1028 IWL_DEBUG_HT(priv, "HW queue empty: continue DELBA flow\n");
1029 iwlagn_txq_agg_disable(priv, txq_id, ssn, tx_fifo);
1030 tid_data->agg.state = IWL_AGG_OFF;
1031 ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid);
1032 }
1033 break;
1034 case IWL_EMPTYING_HW_QUEUE_ADDBA:
1035 /* We are reclaiming the last packet of the queue */
1036 if (tid_data->tfds_in_queue == 0) {
1037 IWL_DEBUG_HT(priv, "HW queue empty: continue ADDBA flow\n");
1038 tid_data->agg.state = IWL_AGG_ON;
1039 ieee80211_start_tx_ba_cb_irqsafe(ctx->vif, addr, tid);
1040 }
1041 break;
1042 }
1043
1044 return 0;
1045 }
1046
1047 static void iwlagn_non_agg_tx_status(struct iwl_priv *priv,
1048 struct iwl_rxon_context *ctx,
1049 const u8 *addr1)
1050 {
1051 struct ieee80211_sta *sta;
1052 struct iwl_station_priv *sta_priv;
1053
1054 rcu_read_lock();
1055 sta = ieee80211_find_sta(ctx->vif, addr1);
1056 if (sta) {
1057 sta_priv = (void *)sta->drv_priv;
1058 /* avoid atomic ops if this isn't a client */
1059 if (sta_priv->client &&
1060 atomic_dec_return(&sta_priv->pending_frames) == 0)
1061 ieee80211_sta_block_awake(priv->hw, sta, false);
1062 }
1063 rcu_read_unlock();
1064 }
1065
1066 static void iwlagn_tx_status(struct iwl_priv *priv, struct iwl_tx_info *tx_info,
1067 bool is_agg)
1068 {
1069 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) tx_info->skb->data;
1070
1071 if (!is_agg)
1072 iwlagn_non_agg_tx_status(priv, tx_info->ctx, hdr->addr1);
1073
1074 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb);
1075 }
1076
1077 int iwlagn_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
1078 {
1079 struct iwl_tx_queue *txq = &priv->txq[txq_id];
1080 struct iwl_queue *q = &txq->q;
1081 struct iwl_tx_info *tx_info;
1082 int nfreed = 0;
1083 struct ieee80211_hdr *hdr;
1084
1085 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
1086 IWL_ERR(priv, "%s: Read index for DMA queue txq id (%d), "
1087 "index %d is out of range [0-%d] %d %d.\n", __func__,
1088 txq_id, index, q->n_bd, q->write_ptr, q->read_ptr);
1089 return 0;
1090 }
1091
1092 for (index = iwl_queue_inc_wrap(index, q->n_bd);
1093 q->read_ptr != index;
1094 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
1095
1096 tx_info = &txq->txb[txq->q.read_ptr];
1097
1098 if (WARN_ON_ONCE(tx_info->skb == NULL))
1099 continue;
1100
1101 hdr = (struct ieee80211_hdr *)tx_info->skb->data;
1102 if (ieee80211_is_data_qos(hdr->frame_control))
1103 nfreed++;
1104
1105 iwlagn_tx_status(priv, tx_info,
1106 txq_id >= IWLAGN_FIRST_AMPDU_QUEUE);
1107 tx_info->skb = NULL;
1108
1109 iwlagn_txq_inval_byte_cnt_tbl(priv, txq);
1110
1111 iwlagn_txq_free_tfd(priv, txq, txq->q.read_ptr);
1112 }
1113 return nfreed;
1114 }
1115
1116 /**
1117 * iwlagn_tx_status_reply_compressed_ba - Update tx status from block-ack
1118 *
1119 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
1120 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
1121 */
1122 static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv,
1123 struct iwl_ht_agg *agg,
1124 struct iwl_compressed_ba_resp *ba_resp)
1125
1126 {
1127 int sh;
1128 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
1129 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
1130 struct ieee80211_tx_info *info;
1131 u64 bitmap, sent_bitmap;
1132
1133 if (unlikely(!agg->wait_for_ba)) {
1134 if (unlikely(ba_resp->bitmap))
1135 IWL_ERR(priv, "Received BA when not expected\n");
1136 return -EINVAL;
1137 }
1138
1139 /* Mark that the expected block-ack response arrived */
1140 agg->wait_for_ba = 0;
1141 IWL_DEBUG_TX_REPLY(priv, "BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
1142
1143 /* Calculate shift to align block-ack bits with our Tx window bits */
1144 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl >> 4);
1145 if (sh < 0)
1146 sh += 0x100;
1147
1148 /*
1149 * Check for success or failure according to the
1150 * transmitted bitmap and block-ack bitmap
1151 */
1152 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
1153 sent_bitmap = bitmap & agg->bitmap;
1154
1155 /* Sanity check values reported by uCode */
1156 if (ba_resp->txed_2_done > ba_resp->txed) {
1157 IWL_DEBUG_TX_REPLY(priv,
1158 "bogus sent(%d) and ack(%d) count\n",
1159 ba_resp->txed, ba_resp->txed_2_done);
1160 /*
1161 * set txed_2_done = txed,
1162 * so it won't impact rate scale
1163 */
1164 ba_resp->txed = ba_resp->txed_2_done;
1165 }
1166 IWL_DEBUG_HT(priv, "agg frames sent:%d, acked:%d\n",
1167 ba_resp->txed, ba_resp->txed_2_done);
1168
1169 /* Find the first ACKed frame to store the TX status */
1170 while (sent_bitmap && !(sent_bitmap & 1)) {
1171 agg->start_idx = (agg->start_idx + 1) & 0xff;
1172 sent_bitmap >>= 1;
1173 }
1174
1175 info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb);
1176 memset(&info->status, 0, sizeof(info->status));
1177 info->flags |= IEEE80211_TX_STAT_ACK;
1178 info->flags |= IEEE80211_TX_STAT_AMPDU;
1179 info->status.ampdu_ack_len = ba_resp->txed_2_done;
1180 info->status.ampdu_len = ba_resp->txed;
1181 iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
1182
1183 return 0;
1184 }
1185
1186 /**
1187 * translate ucode response to mac80211 tx status control values
1188 */
1189 void iwlagn_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
1190 struct ieee80211_tx_info *info)
1191 {
1192 struct ieee80211_tx_rate *r = &info->control.rates[0];
1193
1194 info->antenna_sel_tx =
1195 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
1196 if (rate_n_flags & RATE_MCS_HT_MSK)
1197 r->flags |= IEEE80211_TX_RC_MCS;
1198 if (rate_n_flags & RATE_MCS_GF_MSK)
1199 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
1200 if (rate_n_flags & RATE_MCS_HT40_MSK)
1201 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
1202 if (rate_n_flags & RATE_MCS_DUP_MSK)
1203 r->flags |= IEEE80211_TX_RC_DUP_DATA;
1204 if (rate_n_flags & RATE_MCS_SGI_MSK)
1205 r->flags |= IEEE80211_TX_RC_SHORT_GI;
1206 r->idx = iwlagn_hwrate_to_mac80211_idx(rate_n_flags, info->band);
1207 }
1208
1209 /**
1210 * iwlagn_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
1211 *
1212 * Handles block-acknowledge notification from device, which reports success
1213 * of frames sent via aggregation.
1214 */
1215 void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
1216 struct iwl_rx_mem_buffer *rxb)
1217 {
1218 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1219 struct iwl_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
1220 struct iwl_tx_queue *txq = NULL;
1221 struct iwl_ht_agg *agg;
1222 int index;
1223 int sta_id;
1224 int tid;
1225 unsigned long flags;
1226
1227 /* "flow" corresponds to Tx queue */
1228 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
1229
1230 /* "ssn" is start of block-ack Tx window, corresponds to index
1231 * (in Tx queue's circular buffer) of first TFD/frame in window */
1232 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
1233
1234 if (scd_flow >= priv->hw_params.max_txq_num) {
1235 IWL_ERR(priv,
1236 "BUG_ON scd_flow is bigger than number of queues\n");
1237 return;
1238 }
1239
1240 txq = &priv->txq[scd_flow];
1241 sta_id = ba_resp->sta_id;
1242 tid = ba_resp->tid;
1243 agg = &priv->stations[sta_id].tid[tid].agg;
1244 if (unlikely(agg->txq_id != scd_flow)) {
1245 /*
1246 * FIXME: this is a uCode bug which need to be addressed,
1247 * log the information and return for now!
1248 * since it is possible happen very often and in order
1249 * not to fill the syslog, don't enable the logging by default
1250 */
1251 IWL_DEBUG_TX_REPLY(priv,
1252 "BA scd_flow %d does not match txq_id %d\n",
1253 scd_flow, agg->txq_id);
1254 return;
1255 }
1256
1257 /* Find index just before block-ack window */
1258 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
1259
1260 spin_lock_irqsave(&priv->sta_lock, flags);
1261
1262 IWL_DEBUG_TX_REPLY(priv, "REPLY_COMPRESSED_BA [%d] Received from %pM, "
1263 "sta_id = %d\n",
1264 agg->wait_for_ba,
1265 (u8 *) &ba_resp->sta_addr_lo32,
1266 ba_resp->sta_id);
1267 IWL_DEBUG_TX_REPLY(priv, "TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
1268 "%d, scd_ssn = %d\n",
1269 ba_resp->tid,
1270 ba_resp->seq_ctl,
1271 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
1272 ba_resp->scd_flow,
1273 ba_resp->scd_ssn);
1274 IWL_DEBUG_TX_REPLY(priv, "DAT start_idx = %d, bitmap = 0x%llx\n",
1275 agg->start_idx,
1276 (unsigned long long)agg->bitmap);
1277
1278 /* Update driver's record of ACK vs. not for each frame in window */
1279 iwlagn_tx_status_reply_compressed_ba(priv, agg, ba_resp);
1280
1281 /* Release all TFDs before the SSN, i.e. all TFDs in front of
1282 * block-ack window (we assume that they've been successfully
1283 * transmitted ... if not, it's too late anyway). */
1284 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
1285 /* calculate mac80211 ampdu sw queue to wake */
1286 int freed = iwlagn_tx_queue_reclaim(priv, scd_flow, index);
1287 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
1288
1289 if ((iwl_queue_space(&txq->q) > txq->q.low_mark) &&
1290 priv->mac80211_registered &&
1291 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
1292 iwl_wake_queue(priv, txq);
1293
1294 iwlagn_txq_check_empty(priv, sta_id, tid, scd_flow);
1295 }
1296
1297 spin_unlock_irqrestore(&priv->sta_lock, flags);
1298 }
1299
1300 #ifdef CONFIG_IWLWIFI_DEBUG
1301 const char *iwl_get_tx_fail_reason(u32 status)
1302 {
1303 #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x
1304 #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x
1305
1306 switch (status & TX_STATUS_MSK) {
1307 case TX_STATUS_SUCCESS:
1308 return "SUCCESS";
1309 TX_STATUS_POSTPONE(DELAY);
1310 TX_STATUS_POSTPONE(FEW_BYTES);
1311 TX_STATUS_POSTPONE(BT_PRIO);
1312 TX_STATUS_POSTPONE(QUIET_PERIOD);
1313 TX_STATUS_POSTPONE(CALC_TTAK);
1314 TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY);
1315 TX_STATUS_FAIL(SHORT_LIMIT);
1316 TX_STATUS_FAIL(LONG_LIMIT);
1317 TX_STATUS_FAIL(FIFO_UNDERRUN);
1318 TX_STATUS_FAIL(DRAIN_FLOW);
1319 TX_STATUS_FAIL(RFKILL_FLUSH);
1320 TX_STATUS_FAIL(LIFE_EXPIRE);
1321 TX_STATUS_FAIL(DEST_PS);
1322 TX_STATUS_FAIL(HOST_ABORTED);
1323 TX_STATUS_FAIL(BT_RETRY);
1324 TX_STATUS_FAIL(STA_INVALID);
1325 TX_STATUS_FAIL(FRAG_DROPPED);
1326 TX_STATUS_FAIL(TID_DISABLE);
1327 TX_STATUS_FAIL(FIFO_FLUSHED);
1328 TX_STATUS_FAIL(INSUFFICIENT_CF_POLL);
1329 TX_STATUS_FAIL(PASSIVE_NO_RX);
1330 TX_STATUS_FAIL(NO_BEACON_ON_RADAR);
1331 }
1332
1333 return "UNKNOWN";
1334
1335 #undef TX_STATUS_FAIL
1336 #undef TX_STATUS_POSTPONE
1337 }
1338 #endif /* CONFIG_IWLWIFI_DEBUG */
Linux kernel - Deliverables
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