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Merge branch 'for-linus' of git://neil.brown.name/md
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #define DRV_NAME "iwlagn"
49
50 #include "iwl-eeprom.h"
51 #include "iwl-dev.h"
52 #include "iwl-core.h"
53 #include "iwl-io.h"
54 #include "iwl-helpers.h"
55 #include "iwl-sta.h"
56 #include "iwl-calib.h"
57
58
59 /******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65 /*
66 * module name, copyright, version, etc.
67 */
68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
69
70 #ifdef CONFIG_IWLWIFI_DEBUG
71 #define VD "d"
72 #else
73 #define VD
74 #endif
75
76 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
77 #define VS "s"
78 #else
79 #define VS
80 #endif
81
82 #define DRV_VERSION IWLWIFI_VERSION VD VS
83
84
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89 MODULE_ALIAS("iwl4965");
90
91 /*************** STATION TABLE MANAGEMENT ****
92 * mac80211 should be examined to determine if sta_info is duplicating
93 * the functionality provided here
94 */
95
96 /**************************************************************/
97
98 /**
99 * iwl_commit_rxon - commit staging_rxon to hardware
100 *
101 * The RXON command in staging_rxon is committed to the hardware and
102 * the active_rxon structure is updated with the new data. This
103 * function correctly transitions out of the RXON_ASSOC_MSK state if
104 * a HW tune is required based on the RXON structure changes.
105 */
106 int iwl_commit_rxon(struct iwl_priv *priv)
107 {
108 /* cast away the const for active_rxon in this function */
109 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
110 int ret;
111 bool new_assoc =
112 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
113
114 if (!iwl_is_alive(priv))
115 return -EBUSY;
116
117 /* always get timestamp with Rx frame */
118 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
119
120 ret = iwl_check_rxon_cmd(priv);
121 if (ret) {
122 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
123 return -EINVAL;
124 }
125
126 /*
127 * receive commit_rxon request
128 * abort any previous channel switch if still in process
129 */
130 if (priv->switch_rxon.switch_in_progress &&
131 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
132 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
133 le16_to_cpu(priv->switch_rxon.channel));
134 priv->switch_rxon.switch_in_progress = false;
135 }
136
137 /* If we don't need to send a full RXON, we can use
138 * iwl_rxon_assoc_cmd which is used to reconfigure filter
139 * and other flags for the current radio configuration. */
140 if (!iwl_full_rxon_required(priv)) {
141 ret = iwl_send_rxon_assoc(priv);
142 if (ret) {
143 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
144 return ret;
145 }
146
147 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
148 iwl_print_rx_config_cmd(priv);
149 return 0;
150 }
151
152 /* station table will be cleared */
153 priv->assoc_station_added = 0;
154
155 /* If we are currently associated and the new config requires
156 * an RXON_ASSOC and the new config wants the associated mask enabled,
157 * we must clear the associated from the active configuration
158 * before we apply the new config */
159 if (iwl_is_associated(priv) && new_assoc) {
160 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
161 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
162
163 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
164 sizeof(struct iwl_rxon_cmd),
165 &priv->active_rxon);
166
167 /* If the mask clearing failed then we set
168 * active_rxon back to what it was previously */
169 if (ret) {
170 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
171 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
172 return ret;
173 }
174 }
175
176 IWL_DEBUG_INFO(priv, "Sending RXON\n"
177 "* with%s RXON_FILTER_ASSOC_MSK\n"
178 "* channel = %d\n"
179 "* bssid = %pM\n",
180 (new_assoc ? "" : "out"),
181 le16_to_cpu(priv->staging_rxon.channel),
182 priv->staging_rxon.bssid_addr);
183
184 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
185
186 /* Apply the new configuration
187 * RXON unassoc clears the station table in uCode, send it before
188 * we add the bcast station. If assoc bit is set, we will send RXON
189 * after having added the bcast and bssid station.
190 */
191 if (!new_assoc) {
192 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
193 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
194 if (ret) {
195 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
196 return ret;
197 }
198 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
199 }
200
201 iwl_clear_stations_table(priv);
202
203 priv->start_calib = 0;
204
205 /* Add the broadcast address so we can send broadcast frames */
206 iwl_add_bcast_station(priv);
207
208 /* If we have set the ASSOC_MSK and we are in BSS mode then
209 * add the IWL_AP_ID to the station rate table */
210 if (new_assoc) {
211 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
212 ret = iwl_rxon_add_station(priv,
213 priv->active_rxon.bssid_addr, 1);
214 if (ret == IWL_INVALID_STATION) {
215 IWL_ERR(priv,
216 "Error adding AP address for TX.\n");
217 return -EIO;
218 }
219 priv->assoc_station_added = 1;
220 if (priv->default_wep_key &&
221 iwl_send_static_wepkey_cmd(priv, 0))
222 IWL_ERR(priv,
223 "Could not send WEP static key.\n");
224 }
225
226 /*
227 * allow CTS-to-self if possible for new association.
228 * this is relevant only for 5000 series and up,
229 * but will not damage 4965
230 */
231 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
232
233 /* Apply the new configuration
234 * RXON assoc doesn't clear the station table in uCode,
235 */
236 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
237 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
238 if (ret) {
239 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
240 return ret;
241 }
242 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
243 }
244 iwl_print_rx_config_cmd(priv);
245
246 iwl_init_sensitivity(priv);
247
248 /* If we issue a new RXON command which required a tune then we must
249 * send a new TXPOWER command or we won't be able to Tx any frames */
250 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
251 if (ret) {
252 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
253 return ret;
254 }
255
256 return 0;
257 }
258
259 void iwl_update_chain_flags(struct iwl_priv *priv)
260 {
261
262 if (priv->cfg->ops->hcmd->set_rxon_chain)
263 priv->cfg->ops->hcmd->set_rxon_chain(priv);
264 iwlcore_commit_rxon(priv);
265 }
266
267 static void iwl_clear_free_frames(struct iwl_priv *priv)
268 {
269 struct list_head *element;
270
271 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
272 priv->frames_count);
273
274 while (!list_empty(&priv->free_frames)) {
275 element = priv->free_frames.next;
276 list_del(element);
277 kfree(list_entry(element, struct iwl_frame, list));
278 priv->frames_count--;
279 }
280
281 if (priv->frames_count) {
282 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
283 priv->frames_count);
284 priv->frames_count = 0;
285 }
286 }
287
288 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
289 {
290 struct iwl_frame *frame;
291 struct list_head *element;
292 if (list_empty(&priv->free_frames)) {
293 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
294 if (!frame) {
295 IWL_ERR(priv, "Could not allocate frame!\n");
296 return NULL;
297 }
298
299 priv->frames_count++;
300 return frame;
301 }
302
303 element = priv->free_frames.next;
304 list_del(element);
305 return list_entry(element, struct iwl_frame, list);
306 }
307
308 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
309 {
310 memset(frame, 0, sizeof(*frame));
311 list_add(&frame->list, &priv->free_frames);
312 }
313
314 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
315 struct ieee80211_hdr *hdr,
316 int left)
317 {
318 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
319 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
320 (priv->iw_mode != NL80211_IFTYPE_AP)))
321 return 0;
322
323 if (priv->ibss_beacon->len > left)
324 return 0;
325
326 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
327
328 return priv->ibss_beacon->len;
329 }
330
331 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
332 static void iwl_set_beacon_tim(struct iwl_priv *priv,
333 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
334 u8 *beacon, u32 frame_size)
335 {
336 u16 tim_idx;
337 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
338
339 /*
340 * The index is relative to frame start but we start looking at the
341 * variable-length part of the beacon.
342 */
343 tim_idx = mgmt->u.beacon.variable - beacon;
344
345 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
346 while ((tim_idx < (frame_size - 2)) &&
347 (beacon[tim_idx] != WLAN_EID_TIM))
348 tim_idx += beacon[tim_idx+1] + 2;
349
350 /* If TIM field was found, set variables */
351 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
352 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
353 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
354 } else
355 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
356 }
357
358 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
359 struct iwl_frame *frame)
360 {
361 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
362 u32 frame_size;
363 u32 rate_flags;
364 u32 rate;
365 /*
366 * We have to set up the TX command, the TX Beacon command, and the
367 * beacon contents.
368 */
369
370 /* Initialize memory */
371 tx_beacon_cmd = &frame->u.beacon;
372 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
373
374 /* Set up TX beacon contents */
375 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
376 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
377 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
378 return 0;
379
380 /* Set up TX command fields */
381 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
382 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
383 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
384 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
385 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
386
387 /* Set up TX beacon command fields */
388 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
389 frame_size);
390
391 /* Set up packet rate and flags */
392 rate = iwl_rate_get_lowest_plcp(priv);
393 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
394 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
395 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
396 rate_flags |= RATE_MCS_CCK_MSK;
397 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
398 rate_flags);
399
400 return sizeof(*tx_beacon_cmd) + frame_size;
401 }
402 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
403 {
404 struct iwl_frame *frame;
405 unsigned int frame_size;
406 int rc;
407
408 frame = iwl_get_free_frame(priv);
409 if (!frame) {
410 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
411 "command.\n");
412 return -ENOMEM;
413 }
414
415 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
416 if (!frame_size) {
417 IWL_ERR(priv, "Error configuring the beacon command\n");
418 iwl_free_frame(priv, frame);
419 return -EINVAL;
420 }
421
422 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
423 &frame->u.cmd[0]);
424
425 iwl_free_frame(priv, frame);
426
427 return rc;
428 }
429
430 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
431 {
432 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
433
434 dma_addr_t addr = get_unaligned_le32(&tb->lo);
435 if (sizeof(dma_addr_t) > sizeof(u32))
436 addr |=
437 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
438
439 return addr;
440 }
441
442 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
443 {
444 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
445
446 return le16_to_cpu(tb->hi_n_len) >> 4;
447 }
448
449 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
450 dma_addr_t addr, u16 len)
451 {
452 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
453 u16 hi_n_len = len << 4;
454
455 put_unaligned_le32(addr, &tb->lo);
456 if (sizeof(dma_addr_t) > sizeof(u32))
457 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
458
459 tb->hi_n_len = cpu_to_le16(hi_n_len);
460
461 tfd->num_tbs = idx + 1;
462 }
463
464 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
465 {
466 return tfd->num_tbs & 0x1f;
467 }
468
469 /**
470 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
471 * @priv - driver private data
472 * @txq - tx queue
473 *
474 * Does NOT advance any TFD circular buffer read/write indexes
475 * Does NOT free the TFD itself (which is within circular buffer)
476 */
477 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
478 {
479 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
480 struct iwl_tfd *tfd;
481 struct pci_dev *dev = priv->pci_dev;
482 int index = txq->q.read_ptr;
483 int i;
484 int num_tbs;
485
486 tfd = &tfd_tmp[index];
487
488 /* Sanity check on number of chunks */
489 num_tbs = iwl_tfd_get_num_tbs(tfd);
490
491 if (num_tbs >= IWL_NUM_OF_TBS) {
492 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
493 /* @todo issue fatal error, it is quite serious situation */
494 return;
495 }
496
497 /* Unmap tx_cmd */
498 if (num_tbs)
499 pci_unmap_single(dev,
500 pci_unmap_addr(&txq->meta[index], mapping),
501 pci_unmap_len(&txq->meta[index], len),
502 PCI_DMA_BIDIRECTIONAL);
503
504 /* Unmap chunks, if any. */
505 for (i = 1; i < num_tbs; i++) {
506 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
507 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
508
509 if (txq->txb) {
510 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
511 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
512 }
513 }
514 }
515
516 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
517 struct iwl_tx_queue *txq,
518 dma_addr_t addr, u16 len,
519 u8 reset, u8 pad)
520 {
521 struct iwl_queue *q;
522 struct iwl_tfd *tfd, *tfd_tmp;
523 u32 num_tbs;
524
525 q = &txq->q;
526 tfd_tmp = (struct iwl_tfd *)txq->tfds;
527 tfd = &tfd_tmp[q->write_ptr];
528
529 if (reset)
530 memset(tfd, 0, sizeof(*tfd));
531
532 num_tbs = iwl_tfd_get_num_tbs(tfd);
533
534 /* Each TFD can point to a maximum 20 Tx buffers */
535 if (num_tbs >= IWL_NUM_OF_TBS) {
536 IWL_ERR(priv, "Error can not send more than %d chunks\n",
537 IWL_NUM_OF_TBS);
538 return -EINVAL;
539 }
540
541 BUG_ON(addr & ~DMA_BIT_MASK(36));
542 if (unlikely(addr & ~IWL_TX_DMA_MASK))
543 IWL_ERR(priv, "Unaligned address = %llx\n",
544 (unsigned long long)addr);
545
546 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
547
548 return 0;
549 }
550
551 /*
552 * Tell nic where to find circular buffer of Tx Frame Descriptors for
553 * given Tx queue, and enable the DMA channel used for that queue.
554 *
555 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
556 * channels supported in hardware.
557 */
558 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
559 struct iwl_tx_queue *txq)
560 {
561 int txq_id = txq->q.id;
562
563 /* Circular buffer (TFD queue in DRAM) physical base address */
564 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
565 txq->q.dma_addr >> 8);
566
567 return 0;
568 }
569
570 /******************************************************************************
571 *
572 * Generic RX handler implementations
573 *
574 ******************************************************************************/
575 static void iwl_rx_reply_alive(struct iwl_priv *priv,
576 struct iwl_rx_mem_buffer *rxb)
577 {
578 struct iwl_rx_packet *pkt = rxb_addr(rxb);
579 struct iwl_alive_resp *palive;
580 struct delayed_work *pwork;
581
582 palive = &pkt->u.alive_frame;
583
584 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
585 "0x%01X 0x%01X\n",
586 palive->is_valid, palive->ver_type,
587 palive->ver_subtype);
588
589 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
590 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
591 memcpy(&priv->card_alive_init,
592 &pkt->u.alive_frame,
593 sizeof(struct iwl_init_alive_resp));
594 pwork = &priv->init_alive_start;
595 } else {
596 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
597 memcpy(&priv->card_alive, &pkt->u.alive_frame,
598 sizeof(struct iwl_alive_resp));
599 pwork = &priv->alive_start;
600 }
601
602 /* We delay the ALIVE response by 5ms to
603 * give the HW RF Kill time to activate... */
604 if (palive->is_valid == UCODE_VALID_OK)
605 queue_delayed_work(priv->workqueue, pwork,
606 msecs_to_jiffies(5));
607 else
608 IWL_WARN(priv, "uCode did not respond OK.\n");
609 }
610
611 static void iwl_bg_beacon_update(struct work_struct *work)
612 {
613 struct iwl_priv *priv =
614 container_of(work, struct iwl_priv, beacon_update);
615 struct sk_buff *beacon;
616
617 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
618 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
619
620 if (!beacon) {
621 IWL_ERR(priv, "update beacon failed\n");
622 return;
623 }
624
625 mutex_lock(&priv->mutex);
626 /* new beacon skb is allocated every time; dispose previous.*/
627 if (priv->ibss_beacon)
628 dev_kfree_skb(priv->ibss_beacon);
629
630 priv->ibss_beacon = beacon;
631 mutex_unlock(&priv->mutex);
632
633 iwl_send_beacon_cmd(priv);
634 }
635
636 /**
637 * iwl_bg_statistics_periodic - Timer callback to queue statistics
638 *
639 * This callback is provided in order to send a statistics request.
640 *
641 * This timer function is continually reset to execute within
642 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
643 * was received. We need to ensure we receive the statistics in order
644 * to update the temperature used for calibrating the TXPOWER.
645 */
646 static void iwl_bg_statistics_periodic(unsigned long data)
647 {
648 struct iwl_priv *priv = (struct iwl_priv *)data;
649
650 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
651 return;
652
653 /* dont send host command if rf-kill is on */
654 if (!iwl_is_ready_rf(priv))
655 return;
656
657 iwl_send_statistics_request(priv, CMD_ASYNC, false);
658 }
659
660 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
661 struct iwl_rx_mem_buffer *rxb)
662 {
663 #ifdef CONFIG_IWLWIFI_DEBUG
664 struct iwl_rx_packet *pkt = rxb_addr(rxb);
665 struct iwl4965_beacon_notif *beacon =
666 (struct iwl4965_beacon_notif *)pkt->u.raw;
667 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
668
669 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
670 "tsf %d %d rate %d\n",
671 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
672 beacon->beacon_notify_hdr.failure_frame,
673 le32_to_cpu(beacon->ibss_mgr_status),
674 le32_to_cpu(beacon->high_tsf),
675 le32_to_cpu(beacon->low_tsf), rate);
676 #endif
677
678 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
679 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
680 queue_work(priv->workqueue, &priv->beacon_update);
681 }
682
683 /* Handle notification from uCode that card's power state is changing
684 * due to software, hardware, or critical temperature RFKILL */
685 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
686 struct iwl_rx_mem_buffer *rxb)
687 {
688 struct iwl_rx_packet *pkt = rxb_addr(rxb);
689 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
690 unsigned long status = priv->status;
691
692 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
693 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
694 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
695
696 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
697 RF_CARD_DISABLED)) {
698
699 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
700 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
701
702 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
703 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
704
705 if (!(flags & RXON_CARD_DISABLED)) {
706 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
707 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
708 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
709 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
710 }
711 if (flags & RF_CARD_DISABLED)
712 iwl_tt_enter_ct_kill(priv);
713 }
714 if (!(flags & RF_CARD_DISABLED))
715 iwl_tt_exit_ct_kill(priv);
716
717 if (flags & HW_CARD_DISABLED)
718 set_bit(STATUS_RF_KILL_HW, &priv->status);
719 else
720 clear_bit(STATUS_RF_KILL_HW, &priv->status);
721
722
723 if (!(flags & RXON_CARD_DISABLED))
724 iwl_scan_cancel(priv);
725
726 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
727 test_bit(STATUS_RF_KILL_HW, &priv->status)))
728 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
729 test_bit(STATUS_RF_KILL_HW, &priv->status));
730 else
731 wake_up_interruptible(&priv->wait_command_queue);
732 }
733
734 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
735 {
736 if (src == IWL_PWR_SRC_VAUX) {
737 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
738 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
739 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
740 ~APMG_PS_CTRL_MSK_PWR_SRC);
741 } else {
742 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
743 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
744 ~APMG_PS_CTRL_MSK_PWR_SRC);
745 }
746
747 return 0;
748 }
749
750 /**
751 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
752 *
753 * Setup the RX handlers for each of the reply types sent from the uCode
754 * to the host.
755 *
756 * This function chains into the hardware specific files for them to setup
757 * any hardware specific handlers as well.
758 */
759 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
760 {
761 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
762 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
763 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
764 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
765 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
766 iwl_rx_pm_debug_statistics_notif;
767 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
768
769 /*
770 * The same handler is used for both the REPLY to a discrete
771 * statistics request from the host as well as for the periodic
772 * statistics notifications (after received beacons) from the uCode.
773 */
774 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
775 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
776
777 iwl_setup_spectrum_handlers(priv);
778 iwl_setup_rx_scan_handlers(priv);
779
780 /* status change handler */
781 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
782
783 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
784 iwl_rx_missed_beacon_notif;
785 /* Rx handlers */
786 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
787 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
788 /* block ack */
789 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
790 /* Set up hardware specific Rx handlers */
791 priv->cfg->ops->lib->rx_handler_setup(priv);
792 }
793
794 /**
795 * iwl_rx_handle - Main entry function for receiving responses from uCode
796 *
797 * Uses the priv->rx_handlers callback function array to invoke
798 * the appropriate handlers, including command responses,
799 * frame-received notifications, and other notifications.
800 */
801 void iwl_rx_handle(struct iwl_priv *priv)
802 {
803 struct iwl_rx_mem_buffer *rxb;
804 struct iwl_rx_packet *pkt;
805 struct iwl_rx_queue *rxq = &priv->rxq;
806 u32 r, i;
807 int reclaim;
808 unsigned long flags;
809 u8 fill_rx = 0;
810 u32 count = 8;
811 int total_empty;
812
813 /* uCode's read index (stored in shared DRAM) indicates the last Rx
814 * buffer that the driver may process (last buffer filled by ucode). */
815 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
816 i = rxq->read;
817
818 /* Rx interrupt, but nothing sent from uCode */
819 if (i == r)
820 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
821
822 /* calculate total frames need to be restock after handling RX */
823 total_empty = r - rxq->write_actual;
824 if (total_empty < 0)
825 total_empty += RX_QUEUE_SIZE;
826
827 if (total_empty > (RX_QUEUE_SIZE / 2))
828 fill_rx = 1;
829
830 while (i != r) {
831 rxb = rxq->queue[i];
832
833 /* If an RXB doesn't have a Rx queue slot associated with it,
834 * then a bug has been introduced in the queue refilling
835 * routines -- catch it here */
836 BUG_ON(rxb == NULL);
837
838 rxq->queue[i] = NULL;
839
840 pci_unmap_page(priv->pci_dev, rxb->page_dma,
841 PAGE_SIZE << priv->hw_params.rx_page_order,
842 PCI_DMA_FROMDEVICE);
843 pkt = rxb_addr(rxb);
844
845 trace_iwlwifi_dev_rx(priv, pkt,
846 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
847
848 /* Reclaim a command buffer only if this packet is a response
849 * to a (driver-originated) command.
850 * If the packet (e.g. Rx frame) originated from uCode,
851 * there is no command buffer to reclaim.
852 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
853 * but apparently a few don't get set; catch them here. */
854 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
855 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
856 (pkt->hdr.cmd != REPLY_RX) &&
857 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
858 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
859 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
860 (pkt->hdr.cmd != REPLY_TX);
861
862 /* Based on type of command response or notification,
863 * handle those that need handling via function in
864 * rx_handlers table. See iwl_setup_rx_handlers() */
865 if (priv->rx_handlers[pkt->hdr.cmd]) {
866 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
867 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
868 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
869 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
870 } else {
871 /* No handling needed */
872 IWL_DEBUG_RX(priv,
873 "r %d i %d No handler needed for %s, 0x%02x\n",
874 r, i, get_cmd_string(pkt->hdr.cmd),
875 pkt->hdr.cmd);
876 }
877
878 /*
879 * XXX: After here, we should always check rxb->page
880 * against NULL before touching it or its virtual
881 * memory (pkt). Because some rx_handler might have
882 * already taken or freed the pages.
883 */
884
885 if (reclaim) {
886 /* Invoke any callbacks, transfer the buffer to caller,
887 * and fire off the (possibly) blocking iwl_send_cmd()
888 * as we reclaim the driver command queue */
889 if (rxb->page)
890 iwl_tx_cmd_complete(priv, rxb);
891 else
892 IWL_WARN(priv, "Claim null rxb?\n");
893 }
894
895 /* Reuse the page if possible. For notification packets and
896 * SKBs that fail to Rx correctly, add them back into the
897 * rx_free list for reuse later. */
898 spin_lock_irqsave(&rxq->lock, flags);
899 if (rxb->page != NULL) {
900 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
901 0, PAGE_SIZE << priv->hw_params.rx_page_order,
902 PCI_DMA_FROMDEVICE);
903 list_add_tail(&rxb->list, &rxq->rx_free);
904 rxq->free_count++;
905 } else
906 list_add_tail(&rxb->list, &rxq->rx_used);
907
908 spin_unlock_irqrestore(&rxq->lock, flags);
909
910 i = (i + 1) & RX_QUEUE_MASK;
911 /* If there are a lot of unused frames,
912 * restock the Rx queue so ucode wont assert. */
913 if (fill_rx) {
914 count++;
915 if (count >= 8) {
916 rxq->read = i;
917 iwl_rx_replenish_now(priv);
918 count = 0;
919 }
920 }
921 }
922
923 /* Backtrack one entry */
924 rxq->read = i;
925 if (fill_rx)
926 iwl_rx_replenish_now(priv);
927 else
928 iwl_rx_queue_restock(priv);
929 }
930
931 /* call this function to flush any scheduled tasklet */
932 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
933 {
934 /* wait to make sure we flush pending tasklet*/
935 synchronize_irq(priv->pci_dev->irq);
936 tasklet_kill(&priv->irq_tasklet);
937 }
938
939 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
940 {
941 u32 inta, handled = 0;
942 u32 inta_fh;
943 unsigned long flags;
944 u32 i;
945 #ifdef CONFIG_IWLWIFI_DEBUG
946 u32 inta_mask;
947 #endif
948
949 spin_lock_irqsave(&priv->lock, flags);
950
951 /* Ack/clear/reset pending uCode interrupts.
952 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
953 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
954 inta = iwl_read32(priv, CSR_INT);
955 iwl_write32(priv, CSR_INT, inta);
956
957 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
958 * Any new interrupts that happen after this, either while we're
959 * in this tasklet, or later, will show up in next ISR/tasklet. */
960 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
961 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
962
963 #ifdef CONFIG_IWLWIFI_DEBUG
964 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
965 /* just for debug */
966 inta_mask = iwl_read32(priv, CSR_INT_MASK);
967 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
968 inta, inta_mask, inta_fh);
969 }
970 #endif
971
972 spin_unlock_irqrestore(&priv->lock, flags);
973
974 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
975 * atomic, make sure that inta covers all the interrupts that
976 * we've discovered, even if FH interrupt came in just after
977 * reading CSR_INT. */
978 if (inta_fh & CSR49_FH_INT_RX_MASK)
979 inta |= CSR_INT_BIT_FH_RX;
980 if (inta_fh & CSR49_FH_INT_TX_MASK)
981 inta |= CSR_INT_BIT_FH_TX;
982
983 /* Now service all interrupt bits discovered above. */
984 if (inta & CSR_INT_BIT_HW_ERR) {
985 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
986
987 /* Tell the device to stop sending interrupts */
988 iwl_disable_interrupts(priv);
989
990 priv->isr_stats.hw++;
991 iwl_irq_handle_error(priv);
992
993 handled |= CSR_INT_BIT_HW_ERR;
994
995 return;
996 }
997
998 #ifdef CONFIG_IWLWIFI_DEBUG
999 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1000 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1001 if (inta & CSR_INT_BIT_SCD) {
1002 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1003 "the frame/frames.\n");
1004 priv->isr_stats.sch++;
1005 }
1006
1007 /* Alive notification via Rx interrupt will do the real work */
1008 if (inta & CSR_INT_BIT_ALIVE) {
1009 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1010 priv->isr_stats.alive++;
1011 }
1012 }
1013 #endif
1014 /* Safely ignore these bits for debug checks below */
1015 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1016
1017 /* HW RF KILL switch toggled */
1018 if (inta & CSR_INT_BIT_RF_KILL) {
1019 int hw_rf_kill = 0;
1020 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1021 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1022 hw_rf_kill = 1;
1023
1024 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1025 hw_rf_kill ? "disable radio" : "enable radio");
1026
1027 priv->isr_stats.rfkill++;
1028
1029 /* driver only loads ucode once setting the interface up.
1030 * the driver allows loading the ucode even if the radio
1031 * is killed. Hence update the killswitch state here. The
1032 * rfkill handler will care about restarting if needed.
1033 */
1034 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1035 if (hw_rf_kill)
1036 set_bit(STATUS_RF_KILL_HW, &priv->status);
1037 else
1038 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1039 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1040 }
1041
1042 handled |= CSR_INT_BIT_RF_KILL;
1043 }
1044
1045 /* Chip got too hot and stopped itself */
1046 if (inta & CSR_INT_BIT_CT_KILL) {
1047 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1048 priv->isr_stats.ctkill++;
1049 handled |= CSR_INT_BIT_CT_KILL;
1050 }
1051
1052 /* Error detected by uCode */
1053 if (inta & CSR_INT_BIT_SW_ERR) {
1054 IWL_ERR(priv, "Microcode SW error detected. "
1055 " Restarting 0x%X.\n", inta);
1056 priv->isr_stats.sw++;
1057 priv->isr_stats.sw_err = inta;
1058 iwl_irq_handle_error(priv);
1059 handled |= CSR_INT_BIT_SW_ERR;
1060 }
1061
1062 /*
1063 * uCode wakes up after power-down sleep.
1064 * Tell device about any new tx or host commands enqueued,
1065 * and about any Rx buffers made available while asleep.
1066 */
1067 if (inta & CSR_INT_BIT_WAKEUP) {
1068 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1069 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1070 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1071 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1072 priv->isr_stats.wakeup++;
1073 handled |= CSR_INT_BIT_WAKEUP;
1074 }
1075
1076 /* All uCode command responses, including Tx command responses,
1077 * Rx "responses" (frame-received notification), and other
1078 * notifications from uCode come through here*/
1079 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1080 iwl_rx_handle(priv);
1081 priv->isr_stats.rx++;
1082 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1083 }
1084
1085 /* This "Tx" DMA channel is used only for loading uCode */
1086 if (inta & CSR_INT_BIT_FH_TX) {
1087 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1088 priv->isr_stats.tx++;
1089 handled |= CSR_INT_BIT_FH_TX;
1090 /* Wake up uCode load routine, now that load is complete */
1091 priv->ucode_write_complete = 1;
1092 wake_up_interruptible(&priv->wait_command_queue);
1093 }
1094
1095 if (inta & ~handled) {
1096 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1097 priv->isr_stats.unhandled++;
1098 }
1099
1100 if (inta & ~(priv->inta_mask)) {
1101 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1102 inta & ~priv->inta_mask);
1103 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1104 }
1105
1106 /* Re-enable all interrupts */
1107 /* only Re-enable if diabled by irq */
1108 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1109 iwl_enable_interrupts(priv);
1110
1111 #ifdef CONFIG_IWLWIFI_DEBUG
1112 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1113 inta = iwl_read32(priv, CSR_INT);
1114 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1115 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1116 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1117 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1118 }
1119 #endif
1120 }
1121
1122 /* tasklet for iwlagn interrupt */
1123 static void iwl_irq_tasklet(struct iwl_priv *priv)
1124 {
1125 u32 inta = 0;
1126 u32 handled = 0;
1127 unsigned long flags;
1128 u32 i;
1129 #ifdef CONFIG_IWLWIFI_DEBUG
1130 u32 inta_mask;
1131 #endif
1132
1133 spin_lock_irqsave(&priv->lock, flags);
1134
1135 /* Ack/clear/reset pending uCode interrupts.
1136 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1137 */
1138 iwl_write32(priv, CSR_INT, priv->inta);
1139
1140 inta = priv->inta;
1141
1142 #ifdef CONFIG_IWLWIFI_DEBUG
1143 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1144 /* just for debug */
1145 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1146 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1147 inta, inta_mask);
1148 }
1149 #endif
1150
1151 spin_unlock_irqrestore(&priv->lock, flags);
1152
1153 /* saved interrupt in inta variable now we can reset priv->inta */
1154 priv->inta = 0;
1155
1156 /* Now service all interrupt bits discovered above. */
1157 if (inta & CSR_INT_BIT_HW_ERR) {
1158 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1159
1160 /* Tell the device to stop sending interrupts */
1161 iwl_disable_interrupts(priv);
1162
1163 priv->isr_stats.hw++;
1164 iwl_irq_handle_error(priv);
1165
1166 handled |= CSR_INT_BIT_HW_ERR;
1167
1168 return;
1169 }
1170
1171 #ifdef CONFIG_IWLWIFI_DEBUG
1172 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1173 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1174 if (inta & CSR_INT_BIT_SCD) {
1175 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1176 "the frame/frames.\n");
1177 priv->isr_stats.sch++;
1178 }
1179
1180 /* Alive notification via Rx interrupt will do the real work */
1181 if (inta & CSR_INT_BIT_ALIVE) {
1182 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1183 priv->isr_stats.alive++;
1184 }
1185 }
1186 #endif
1187 /* Safely ignore these bits for debug checks below */
1188 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1189
1190 /* HW RF KILL switch toggled */
1191 if (inta & CSR_INT_BIT_RF_KILL) {
1192 int hw_rf_kill = 0;
1193 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1194 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1195 hw_rf_kill = 1;
1196
1197 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1198 hw_rf_kill ? "disable radio" : "enable radio");
1199
1200 priv->isr_stats.rfkill++;
1201
1202 /* driver only loads ucode once setting the interface up.
1203 * the driver allows loading the ucode even if the radio
1204 * is killed. Hence update the killswitch state here. The
1205 * rfkill handler will care about restarting if needed.
1206 */
1207 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1208 if (hw_rf_kill)
1209 set_bit(STATUS_RF_KILL_HW, &priv->status);
1210 else
1211 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1212 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1213 }
1214
1215 handled |= CSR_INT_BIT_RF_KILL;
1216 }
1217
1218 /* Chip got too hot and stopped itself */
1219 if (inta & CSR_INT_BIT_CT_KILL) {
1220 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1221 priv->isr_stats.ctkill++;
1222 handled |= CSR_INT_BIT_CT_KILL;
1223 }
1224
1225 /* Error detected by uCode */
1226 if (inta & CSR_INT_BIT_SW_ERR) {
1227 IWL_ERR(priv, "Microcode SW error detected. "
1228 " Restarting 0x%X.\n", inta);
1229 priv->isr_stats.sw++;
1230 priv->isr_stats.sw_err = inta;
1231 iwl_irq_handle_error(priv);
1232 handled |= CSR_INT_BIT_SW_ERR;
1233 }
1234
1235 /* uCode wakes up after power-down sleep */
1236 if (inta & CSR_INT_BIT_WAKEUP) {
1237 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1238 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1239 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1240 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1241
1242 priv->isr_stats.wakeup++;
1243
1244 handled |= CSR_INT_BIT_WAKEUP;
1245 }
1246
1247 /* All uCode command responses, including Tx command responses,
1248 * Rx "responses" (frame-received notification), and other
1249 * notifications from uCode come through here*/
1250 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1251 CSR_INT_BIT_RX_PERIODIC)) {
1252 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1253 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1254 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1255 iwl_write32(priv, CSR_FH_INT_STATUS,
1256 CSR49_FH_INT_RX_MASK);
1257 }
1258 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1259 handled |= CSR_INT_BIT_RX_PERIODIC;
1260 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1261 }
1262 /* Sending RX interrupt require many steps to be done in the
1263 * the device:
1264 * 1- write interrupt to current index in ICT table.
1265 * 2- dma RX frame.
1266 * 3- update RX shared data to indicate last write index.
1267 * 4- send interrupt.
1268 * This could lead to RX race, driver could receive RX interrupt
1269 * but the shared data changes does not reflect this;
1270 * periodic interrupt will detect any dangling Rx activity.
1271 */
1272
1273 /* Disable periodic interrupt; we use it as just a one-shot. */
1274 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1275 CSR_INT_PERIODIC_DIS);
1276 iwl_rx_handle(priv);
1277
1278 /*
1279 * Enable periodic interrupt in 8 msec only if we received
1280 * real RX interrupt (instead of just periodic int), to catch
1281 * any dangling Rx interrupt. If it was just the periodic
1282 * interrupt, there was no dangling Rx activity, and no need
1283 * to extend the periodic interrupt; one-shot is enough.
1284 */
1285 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1286 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1287 CSR_INT_PERIODIC_ENA);
1288
1289 priv->isr_stats.rx++;
1290 }
1291
1292 /* This "Tx" DMA channel is used only for loading uCode */
1293 if (inta & CSR_INT_BIT_FH_TX) {
1294 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1295 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1296 priv->isr_stats.tx++;
1297 handled |= CSR_INT_BIT_FH_TX;
1298 /* Wake up uCode load routine, now that load is complete */
1299 priv->ucode_write_complete = 1;
1300 wake_up_interruptible(&priv->wait_command_queue);
1301 }
1302
1303 if (inta & ~handled) {
1304 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1305 priv->isr_stats.unhandled++;
1306 }
1307
1308 if (inta & ~(priv->inta_mask)) {
1309 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1310 inta & ~priv->inta_mask);
1311 }
1312
1313 /* Re-enable all interrupts */
1314 /* only Re-enable if diabled by irq */
1315 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1316 iwl_enable_interrupts(priv);
1317 }
1318
1319
1320 /******************************************************************************
1321 *
1322 * uCode download functions
1323 *
1324 ******************************************************************************/
1325
1326 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1327 {
1328 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1329 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1330 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1331 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1332 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1333 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1334 }
1335
1336 static void iwl_nic_start(struct iwl_priv *priv)
1337 {
1338 /* Remove all resets to allow NIC to operate */
1339 iwl_write32(priv, CSR_RESET, 0);
1340 }
1341
1342
1343 /**
1344 * iwl_read_ucode - Read uCode images from disk file.
1345 *
1346 * Copy into buffers for card to fetch via bus-mastering
1347 */
1348 static int iwl_read_ucode(struct iwl_priv *priv)
1349 {
1350 struct iwl_ucode_header *ucode;
1351 int ret = -EINVAL, index;
1352 const struct firmware *ucode_raw;
1353 const char *name_pre = priv->cfg->fw_name_pre;
1354 const unsigned int api_max = priv->cfg->ucode_api_max;
1355 const unsigned int api_min = priv->cfg->ucode_api_min;
1356 char buf[25];
1357 u8 *src;
1358 size_t len;
1359 u32 api_ver, build;
1360 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1361 u16 eeprom_ver;
1362
1363 /* Ask kernel firmware_class module to get the boot firmware off disk.
1364 * request_firmware() is synchronous, file is in memory on return. */
1365 for (index = api_max; index >= api_min; index--) {
1366 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1367 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1368 if (ret < 0) {
1369 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1370 buf, ret);
1371 if (ret == -ENOENT)
1372 continue;
1373 else
1374 goto error;
1375 } else {
1376 if (index < api_max)
1377 IWL_ERR(priv, "Loaded firmware %s, "
1378 "which is deprecated. "
1379 "Please use API v%u instead.\n",
1380 buf, api_max);
1381
1382 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1383 buf, ucode_raw->size);
1384 break;
1385 }
1386 }
1387
1388 if (ret < 0)
1389 goto error;
1390
1391 /* Make sure that we got at least the v1 header! */
1392 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1393 IWL_ERR(priv, "File size way too small!\n");
1394 ret = -EINVAL;
1395 goto err_release;
1396 }
1397
1398 /* Data from ucode file: header followed by uCode images */
1399 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1400
1401 priv->ucode_ver = le32_to_cpu(ucode->ver);
1402 api_ver = IWL_UCODE_API(priv->ucode_ver);
1403 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1404 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1405 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1406 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1407 init_data_size =
1408 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1409 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1410 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1411
1412 /* api_ver should match the api version forming part of the
1413 * firmware filename ... but we don't check for that and only rely
1414 * on the API version read from firmware header from here on forward */
1415
1416 if (api_ver < api_min || api_ver > api_max) {
1417 IWL_ERR(priv, "Driver unable to support your firmware API. "
1418 "Driver supports v%u, firmware is v%u.\n",
1419 api_max, api_ver);
1420 priv->ucode_ver = 0;
1421 ret = -EINVAL;
1422 goto err_release;
1423 }
1424 if (api_ver != api_max)
1425 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1426 "got v%u. New firmware can be obtained "
1427 "from http://www.intellinuxwireless.org.\n",
1428 api_max, api_ver);
1429
1430 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1431 IWL_UCODE_MAJOR(priv->ucode_ver),
1432 IWL_UCODE_MINOR(priv->ucode_ver),
1433 IWL_UCODE_API(priv->ucode_ver),
1434 IWL_UCODE_SERIAL(priv->ucode_ver));
1435
1436 snprintf(priv->hw->wiphy->fw_version,
1437 sizeof(priv->hw->wiphy->fw_version),
1438 "%u.%u.%u.%u",
1439 IWL_UCODE_MAJOR(priv->ucode_ver),
1440 IWL_UCODE_MINOR(priv->ucode_ver),
1441 IWL_UCODE_API(priv->ucode_ver),
1442 IWL_UCODE_SERIAL(priv->ucode_ver));
1443
1444 if (build)
1445 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1446
1447 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1448 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1449 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1450 ? "OTP" : "EEPROM", eeprom_ver);
1451
1452 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1453 priv->ucode_ver);
1454 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1455 inst_size);
1456 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1457 data_size);
1458 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1459 init_size);
1460 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1461 init_data_size);
1462 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1463 boot_size);
1464
1465 /* Verify size of file vs. image size info in file's header */
1466 if (ucode_raw->size !=
1467 priv->cfg->ops->ucode->get_header_size(api_ver) +
1468 inst_size + data_size + init_size +
1469 init_data_size + boot_size) {
1470
1471 IWL_DEBUG_INFO(priv,
1472 "uCode file size %d does not match expected size\n",
1473 (int)ucode_raw->size);
1474 ret = -EINVAL;
1475 goto err_release;
1476 }
1477
1478 /* Verify that uCode images will fit in card's SRAM */
1479 if (inst_size > priv->hw_params.max_inst_size) {
1480 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1481 inst_size);
1482 ret = -EINVAL;
1483 goto err_release;
1484 }
1485
1486 if (data_size > priv->hw_params.max_data_size) {
1487 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1488 data_size);
1489 ret = -EINVAL;
1490 goto err_release;
1491 }
1492 if (init_size > priv->hw_params.max_inst_size) {
1493 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1494 init_size);
1495 ret = -EINVAL;
1496 goto err_release;
1497 }
1498 if (init_data_size > priv->hw_params.max_data_size) {
1499 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1500 init_data_size);
1501 ret = -EINVAL;
1502 goto err_release;
1503 }
1504 if (boot_size > priv->hw_params.max_bsm_size) {
1505 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1506 boot_size);
1507 ret = -EINVAL;
1508 goto err_release;
1509 }
1510
1511 /* Allocate ucode buffers for card's bus-master loading ... */
1512
1513 /* Runtime instructions and 2 copies of data:
1514 * 1) unmodified from disk
1515 * 2) backup cache for save/restore during power-downs */
1516 priv->ucode_code.len = inst_size;
1517 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1518
1519 priv->ucode_data.len = data_size;
1520 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1521
1522 priv->ucode_data_backup.len = data_size;
1523 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1524
1525 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1526 !priv->ucode_data_backup.v_addr)
1527 goto err_pci_alloc;
1528
1529 /* Initialization instructions and data */
1530 if (init_size && init_data_size) {
1531 priv->ucode_init.len = init_size;
1532 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1533
1534 priv->ucode_init_data.len = init_data_size;
1535 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1536
1537 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1538 goto err_pci_alloc;
1539 }
1540
1541 /* Bootstrap (instructions only, no data) */
1542 if (boot_size) {
1543 priv->ucode_boot.len = boot_size;
1544 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1545
1546 if (!priv->ucode_boot.v_addr)
1547 goto err_pci_alloc;
1548 }
1549
1550 /* Copy images into buffers for card's bus-master reads ... */
1551
1552 /* Runtime instructions (first block of data in file) */
1553 len = inst_size;
1554 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1555 memcpy(priv->ucode_code.v_addr, src, len);
1556 src += len;
1557
1558 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1559 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1560
1561 /* Runtime data (2nd block)
1562 * NOTE: Copy into backup buffer will be done in iwl_up() */
1563 len = data_size;
1564 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1565 memcpy(priv->ucode_data.v_addr, src, len);
1566 memcpy(priv->ucode_data_backup.v_addr, src, len);
1567 src += len;
1568
1569 /* Initialization instructions (3rd block) */
1570 if (init_size) {
1571 len = init_size;
1572 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1573 len);
1574 memcpy(priv->ucode_init.v_addr, src, len);
1575 src += len;
1576 }
1577
1578 /* Initialization data (4th block) */
1579 if (init_data_size) {
1580 len = init_data_size;
1581 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1582 len);
1583 memcpy(priv->ucode_init_data.v_addr, src, len);
1584 src += len;
1585 }
1586
1587 /* Bootstrap instructions (5th block) */
1588 len = boot_size;
1589 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1590 memcpy(priv->ucode_boot.v_addr, src, len);
1591
1592 /* We have our copies now, allow OS release its copies */
1593 release_firmware(ucode_raw);
1594 return 0;
1595
1596 err_pci_alloc:
1597 IWL_ERR(priv, "failed to allocate pci memory\n");
1598 ret = -ENOMEM;
1599 iwl_dealloc_ucode_pci(priv);
1600
1601 err_release:
1602 release_firmware(ucode_raw);
1603
1604 error:
1605 return ret;
1606 }
1607
1608 static const char *desc_lookup_text[] = {
1609 "OK",
1610 "FAIL",
1611 "BAD_PARAM",
1612 "BAD_CHECKSUM",
1613 "NMI_INTERRUPT_WDG",
1614 "SYSASSERT",
1615 "FATAL_ERROR",
1616 "BAD_COMMAND",
1617 "HW_ERROR_TUNE_LOCK",
1618 "HW_ERROR_TEMPERATURE",
1619 "ILLEGAL_CHAN_FREQ",
1620 "VCC_NOT_STABLE",
1621 "FH_ERROR",
1622 "NMI_INTERRUPT_HOST",
1623 "NMI_INTERRUPT_ACTION_PT",
1624 "NMI_INTERRUPT_UNKNOWN",
1625 "UCODE_VERSION_MISMATCH",
1626 "HW_ERROR_ABS_LOCK",
1627 "HW_ERROR_CAL_LOCK_FAIL",
1628 "NMI_INTERRUPT_INST_ACTION_PT",
1629 "NMI_INTERRUPT_DATA_ACTION_PT",
1630 "NMI_TRM_HW_ER",
1631 "NMI_INTERRUPT_TRM",
1632 "NMI_INTERRUPT_BREAK_POINT"
1633 "DEBUG_0",
1634 "DEBUG_1",
1635 "DEBUG_2",
1636 "DEBUG_3",
1637 "UNKNOWN"
1638 };
1639
1640 static const char *desc_lookup(int i)
1641 {
1642 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1643
1644 if (i < 0 || i > max)
1645 i = max;
1646
1647 return desc_lookup_text[i];
1648 }
1649
1650 #define ERROR_START_OFFSET (1 * sizeof(u32))
1651 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1652
1653 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1654 {
1655 u32 data2, line;
1656 u32 desc, time, count, base, data1;
1657 u32 blink1, blink2, ilink1, ilink2;
1658
1659 if (priv->ucode_type == UCODE_INIT)
1660 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1661 else
1662 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1663
1664 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1665 IWL_ERR(priv,
1666 "Not valid error log pointer 0x%08X for %s uCode\n",
1667 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1668 return;
1669 }
1670
1671 count = iwl_read_targ_mem(priv, base);
1672
1673 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1674 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1675 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1676 priv->status, count);
1677 }
1678
1679 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1680 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1681 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1682 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1683 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1684 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1685 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1686 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1687 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1688
1689 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1690 blink1, blink2, ilink1, ilink2);
1691
1692 IWL_ERR(priv, "Desc Time "
1693 "data1 data2 line\n");
1694 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1695 desc_lookup(desc), desc, time, data1, data2, line);
1696 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1697 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1698 ilink1, ilink2);
1699
1700 }
1701
1702 #define EVENT_START_OFFSET (4 * sizeof(u32))
1703
1704 /**
1705 * iwl_print_event_log - Dump error event log to syslog
1706 *
1707 */
1708 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1709 u32 num_events, u32 mode)
1710 {
1711 u32 i;
1712 u32 base; /* SRAM byte address of event log header */
1713 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1714 u32 ptr; /* SRAM byte address of log data */
1715 u32 ev, time, data; /* event log data */
1716 unsigned long reg_flags;
1717
1718 if (num_events == 0)
1719 return;
1720 if (priv->ucode_type == UCODE_INIT)
1721 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1722 else
1723 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1724
1725 if (mode == 0)
1726 event_size = 2 * sizeof(u32);
1727 else
1728 event_size = 3 * sizeof(u32);
1729
1730 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1731
1732 /* Make sure device is powered up for SRAM reads */
1733 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1734 iwl_grab_nic_access(priv);
1735
1736 /* Set starting address; reads will auto-increment */
1737 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1738 rmb();
1739
1740 /* "time" is actually "data" for mode 0 (no timestamp).
1741 * place event id # at far right for easier visual parsing. */
1742 for (i = 0; i < num_events; i++) {
1743 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1744 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1745 if (mode == 0) {
1746 /* data, ev */
1747 trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1748 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1749 } else {
1750 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1751 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1752 time, data, ev);
1753 trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1754 }
1755 }
1756
1757 /* Allow device to power down */
1758 iwl_release_nic_access(priv);
1759 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1760 }
1761
1762 /**
1763 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1764 */
1765 static void iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1766 u32 num_wraps, u32 next_entry,
1767 u32 size, u32 mode)
1768 {
1769 /*
1770 * display the newest DEFAULT_LOG_ENTRIES entries
1771 * i.e the entries just before the next ont that uCode would fill.
1772 */
1773 if (num_wraps) {
1774 if (next_entry < size) {
1775 iwl_print_event_log(priv,
1776 capacity - (size - next_entry),
1777 size - next_entry, mode);
1778 iwl_print_event_log(priv, 0,
1779 next_entry, mode);
1780 } else
1781 iwl_print_event_log(priv, next_entry - size,
1782 size, mode);
1783 } else {
1784 if (next_entry < size)
1785 iwl_print_event_log(priv, 0, next_entry, mode);
1786 else
1787 iwl_print_event_log(priv, next_entry - size,
1788 size, mode);
1789 }
1790 }
1791
1792 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1793 #define MAX_EVENT_LOG_SIZE (512)
1794
1795 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1796
1797 void iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log)
1798 {
1799 u32 base; /* SRAM byte address of event log header */
1800 u32 capacity; /* event log capacity in # entries */
1801 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1802 u32 num_wraps; /* # times uCode wrapped to top of log */
1803 u32 next_entry; /* index of next entry to be written by uCode */
1804 u32 size; /* # entries that we'll print */
1805
1806 if (priv->ucode_type == UCODE_INIT)
1807 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1808 else
1809 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1810
1811 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1812 IWL_ERR(priv,
1813 "Invalid event log pointer 0x%08X for %s uCode\n",
1814 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1815 return;
1816 }
1817
1818 /* event log header */
1819 capacity = iwl_read_targ_mem(priv, base);
1820 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1821 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1822 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1823
1824 if (capacity > MAX_EVENT_LOG_SIZE) {
1825 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1826 capacity, MAX_EVENT_LOG_SIZE);
1827 capacity = MAX_EVENT_LOG_SIZE;
1828 }
1829
1830 if (next_entry > MAX_EVENT_LOG_SIZE) {
1831 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1832 next_entry, MAX_EVENT_LOG_SIZE);
1833 next_entry = MAX_EVENT_LOG_SIZE;
1834 }
1835
1836 size = num_wraps ? capacity : next_entry;
1837
1838 /* bail out if nothing in log */
1839 if (size == 0) {
1840 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1841 return;
1842 }
1843
1844 #ifdef CONFIG_IWLWIFI_DEBUG
1845 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1846 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1847 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1848 #else
1849 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1850 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1851 #endif
1852 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
1853 size);
1854
1855 #ifdef CONFIG_IWLWIFI_DEBUG
1856 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1857 /*
1858 * if uCode has wrapped back to top of log,
1859 * start at the oldest entry,
1860 * i.e the next one that uCode would fill.
1861 */
1862 if (num_wraps)
1863 iwl_print_event_log(priv, next_entry,
1864 capacity - next_entry, mode);
1865 /* (then/else) start at top of log */
1866 iwl_print_event_log(priv, 0, next_entry, mode);
1867 } else
1868 iwl_print_last_event_logs(priv, capacity, num_wraps,
1869 next_entry, size, mode);
1870 #else
1871 iwl_print_last_event_logs(priv, capacity, num_wraps,
1872 next_entry, size, mode);
1873 #endif
1874 }
1875
1876 /**
1877 * iwl_alive_start - called after REPLY_ALIVE notification received
1878 * from protocol/runtime uCode (initialization uCode's
1879 * Alive gets handled by iwl_init_alive_start()).
1880 */
1881 static void iwl_alive_start(struct iwl_priv *priv)
1882 {
1883 int ret = 0;
1884
1885 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1886
1887 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1888 /* We had an error bringing up the hardware, so take it
1889 * all the way back down so we can try again */
1890 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1891 goto restart;
1892 }
1893
1894 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1895 * This is a paranoid check, because we would not have gotten the
1896 * "runtime" alive if code weren't properly loaded. */
1897 if (iwl_verify_ucode(priv)) {
1898 /* Runtime instruction load was bad;
1899 * take it all the way back down so we can try again */
1900 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1901 goto restart;
1902 }
1903
1904 iwl_clear_stations_table(priv);
1905 ret = priv->cfg->ops->lib->alive_notify(priv);
1906 if (ret) {
1907 IWL_WARN(priv,
1908 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1909 goto restart;
1910 }
1911
1912 /* After the ALIVE response, we can send host commands to the uCode */
1913 set_bit(STATUS_ALIVE, &priv->status);
1914
1915 if (iwl_is_rfkill(priv))
1916 return;
1917
1918 ieee80211_wake_queues(priv->hw);
1919
1920 priv->active_rate = priv->rates_mask;
1921 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1922
1923 /* Configure Tx antenna selection based on H/W config */
1924 if (priv->cfg->ops->hcmd->set_tx_ant)
1925 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1926
1927 if (iwl_is_associated(priv)) {
1928 struct iwl_rxon_cmd *active_rxon =
1929 (struct iwl_rxon_cmd *)&priv->active_rxon;
1930 /* apply any changes in staging */
1931 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1932 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1933 } else {
1934 /* Initialize our rx_config data */
1935 iwl_connection_init_rx_config(priv, priv->iw_mode);
1936
1937 if (priv->cfg->ops->hcmd->set_rxon_chain)
1938 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1939
1940 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1941 }
1942
1943 /* Configure Bluetooth device coexistence support */
1944 iwl_send_bt_config(priv);
1945
1946 iwl_reset_run_time_calib(priv);
1947
1948 /* Configure the adapter for unassociated operation */
1949 iwlcore_commit_rxon(priv);
1950
1951 /* At this point, the NIC is initialized and operational */
1952 iwl_rf_kill_ct_config(priv);
1953
1954 iwl_leds_init(priv);
1955
1956 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1957 set_bit(STATUS_READY, &priv->status);
1958 wake_up_interruptible(&priv->wait_command_queue);
1959
1960 iwl_power_update_mode(priv, true);
1961
1962 /* reassociate for ADHOC mode */
1963 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1964 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1965 priv->vif);
1966 if (beacon)
1967 iwl_mac_beacon_update(priv->hw, beacon);
1968 }
1969
1970
1971 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1972 iwl_set_mode(priv, priv->iw_mode);
1973
1974 return;
1975
1976 restart:
1977 queue_work(priv->workqueue, &priv->restart);
1978 }
1979
1980 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1981
1982 static void __iwl_down(struct iwl_priv *priv)
1983 {
1984 unsigned long flags;
1985 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1986
1987 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1988
1989 if (!exit_pending)
1990 set_bit(STATUS_EXIT_PENDING, &priv->status);
1991
1992 iwl_clear_stations_table(priv);
1993
1994 /* Unblock any waiting calls */
1995 wake_up_interruptible_all(&priv->wait_command_queue);
1996
1997 /* Wipe out the EXIT_PENDING status bit if we are not actually
1998 * exiting the module */
1999 if (!exit_pending)
2000 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2001
2002 /* stop and reset the on-board processor */
2003 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2004
2005 /* tell the device to stop sending interrupts */
2006 spin_lock_irqsave(&priv->lock, flags);
2007 iwl_disable_interrupts(priv);
2008 spin_unlock_irqrestore(&priv->lock, flags);
2009 iwl_synchronize_irq(priv);
2010
2011 if (priv->mac80211_registered)
2012 ieee80211_stop_queues(priv->hw);
2013
2014 /* If we have not previously called iwl_init() then
2015 * clear all bits but the RF Kill bit and return */
2016 if (!iwl_is_init(priv)) {
2017 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2018 STATUS_RF_KILL_HW |
2019 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2020 STATUS_GEO_CONFIGURED |
2021 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2022 STATUS_EXIT_PENDING;
2023 goto exit;
2024 }
2025
2026 /* ...otherwise clear out all the status bits but the RF Kill
2027 * bit and continue taking the NIC down. */
2028 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2029 STATUS_RF_KILL_HW |
2030 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2031 STATUS_GEO_CONFIGURED |
2032 test_bit(STATUS_FW_ERROR, &priv->status) <<
2033 STATUS_FW_ERROR |
2034 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2035 STATUS_EXIT_PENDING;
2036
2037 /* device going down, Stop using ICT table */
2038 iwl_disable_ict(priv);
2039
2040 iwl_txq_ctx_stop(priv);
2041 iwl_rxq_stop(priv);
2042
2043 /* Power-down device's busmaster DMA clocks */
2044 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2045 udelay(5);
2046
2047 /* Make sure (redundant) we've released our request to stay awake */
2048 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2049
2050 /* Stop the device, and put it in low power state */
2051 priv->cfg->ops->lib->apm_ops.stop(priv);
2052
2053 exit:
2054 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2055
2056 if (priv->ibss_beacon)
2057 dev_kfree_skb(priv->ibss_beacon);
2058 priv->ibss_beacon = NULL;
2059
2060 /* clear out any free frames */
2061 iwl_clear_free_frames(priv);
2062 }
2063
2064 static void iwl_down(struct iwl_priv *priv)
2065 {
2066 mutex_lock(&priv->mutex);
2067 __iwl_down(priv);
2068 mutex_unlock(&priv->mutex);
2069
2070 iwl_cancel_deferred_work(priv);
2071 }
2072
2073 #define HW_READY_TIMEOUT (50)
2074
2075 static int iwl_set_hw_ready(struct iwl_priv *priv)
2076 {
2077 int ret = 0;
2078
2079 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2080 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2081
2082 /* See if we got it */
2083 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2084 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2085 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2086 HW_READY_TIMEOUT);
2087 if (ret != -ETIMEDOUT)
2088 priv->hw_ready = true;
2089 else
2090 priv->hw_ready = false;
2091
2092 IWL_DEBUG_INFO(priv, "hardware %s\n",
2093 (priv->hw_ready == 1) ? "ready" : "not ready");
2094 return ret;
2095 }
2096
2097 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2098 {
2099 int ret = 0;
2100
2101 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2102
2103 ret = iwl_set_hw_ready(priv);
2104 if (priv->hw_ready)
2105 return ret;
2106
2107 /* If HW is not ready, prepare the conditions to check again */
2108 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2109 CSR_HW_IF_CONFIG_REG_PREPARE);
2110
2111 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2112 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2113 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2114
2115 /* HW should be ready by now, check again. */
2116 if (ret != -ETIMEDOUT)
2117 iwl_set_hw_ready(priv);
2118
2119 return ret;
2120 }
2121
2122 #define MAX_HW_RESTARTS 5
2123
2124 static int __iwl_up(struct iwl_priv *priv)
2125 {
2126 int i;
2127 int ret;
2128
2129 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2130 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2131 return -EIO;
2132 }
2133
2134 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2135 IWL_ERR(priv, "ucode not available for device bringup\n");
2136 return -EIO;
2137 }
2138
2139 iwl_prepare_card_hw(priv);
2140
2141 if (!priv->hw_ready) {
2142 IWL_WARN(priv, "Exit HW not ready\n");
2143 return -EIO;
2144 }
2145
2146 /* If platform's RF_KILL switch is NOT set to KILL */
2147 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2148 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2149 else
2150 set_bit(STATUS_RF_KILL_HW, &priv->status);
2151
2152 if (iwl_is_rfkill(priv)) {
2153 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2154
2155 iwl_enable_interrupts(priv);
2156 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2157 return 0;
2158 }
2159
2160 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2161
2162 ret = iwl_hw_nic_init(priv);
2163 if (ret) {
2164 IWL_ERR(priv, "Unable to init nic\n");
2165 return ret;
2166 }
2167
2168 /* make sure rfkill handshake bits are cleared */
2169 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2170 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2171 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2172
2173 /* clear (again), then enable host interrupts */
2174 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2175 iwl_enable_interrupts(priv);
2176
2177 /* really make sure rfkill handshake bits are cleared */
2178 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2179 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2180
2181 /* Copy original ucode data image from disk into backup cache.
2182 * This will be used to initialize the on-board processor's
2183 * data SRAM for a clean start when the runtime program first loads. */
2184 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2185 priv->ucode_data.len);
2186
2187 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2188
2189 iwl_clear_stations_table(priv);
2190
2191 /* load bootstrap state machine,
2192 * load bootstrap program into processor's memory,
2193 * prepare to load the "initialize" uCode */
2194 ret = priv->cfg->ops->lib->load_ucode(priv);
2195
2196 if (ret) {
2197 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2198 ret);
2199 continue;
2200 }
2201
2202 /* start card; "initialize" will load runtime ucode */
2203 iwl_nic_start(priv);
2204
2205 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2206
2207 return 0;
2208 }
2209
2210 set_bit(STATUS_EXIT_PENDING, &priv->status);
2211 __iwl_down(priv);
2212 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2213
2214 /* tried to restart and config the device for as long as our
2215 * patience could withstand */
2216 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2217 return -EIO;
2218 }
2219
2220
2221 /*****************************************************************************
2222 *
2223 * Workqueue callbacks
2224 *
2225 *****************************************************************************/
2226
2227 static void iwl_bg_init_alive_start(struct work_struct *data)
2228 {
2229 struct iwl_priv *priv =
2230 container_of(data, struct iwl_priv, init_alive_start.work);
2231
2232 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2233 return;
2234
2235 mutex_lock(&priv->mutex);
2236 priv->cfg->ops->lib->init_alive_start(priv);
2237 mutex_unlock(&priv->mutex);
2238 }
2239
2240 static void iwl_bg_alive_start(struct work_struct *data)
2241 {
2242 struct iwl_priv *priv =
2243 container_of(data, struct iwl_priv, alive_start.work);
2244
2245 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2246 return;
2247
2248 /* enable dram interrupt */
2249 iwl_reset_ict(priv);
2250
2251 mutex_lock(&priv->mutex);
2252 iwl_alive_start(priv);
2253 mutex_unlock(&priv->mutex);
2254 }
2255
2256 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2257 {
2258 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2259 run_time_calib_work);
2260
2261 mutex_lock(&priv->mutex);
2262
2263 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2264 test_bit(STATUS_SCANNING, &priv->status)) {
2265 mutex_unlock(&priv->mutex);
2266 return;
2267 }
2268
2269 if (priv->start_calib) {
2270 iwl_chain_noise_calibration(priv, &priv->statistics);
2271
2272 iwl_sensitivity_calibration(priv, &priv->statistics);
2273 }
2274
2275 mutex_unlock(&priv->mutex);
2276 return;
2277 }
2278
2279 static void iwl_bg_up(struct work_struct *data)
2280 {
2281 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2282
2283 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2284 return;
2285
2286 mutex_lock(&priv->mutex);
2287 __iwl_up(priv);
2288 mutex_unlock(&priv->mutex);
2289 }
2290
2291 static void iwl_bg_restart(struct work_struct *data)
2292 {
2293 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2294
2295 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2296 return;
2297
2298 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2299 mutex_lock(&priv->mutex);
2300 priv->vif = NULL;
2301 priv->is_open = 0;
2302 mutex_unlock(&priv->mutex);
2303 iwl_down(priv);
2304 ieee80211_restart_hw(priv->hw);
2305 } else {
2306 iwl_down(priv);
2307 queue_work(priv->workqueue, &priv->up);
2308 }
2309 }
2310
2311 static void iwl_bg_rx_replenish(struct work_struct *data)
2312 {
2313 struct iwl_priv *priv =
2314 container_of(data, struct iwl_priv, rx_replenish);
2315
2316 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2317 return;
2318
2319 mutex_lock(&priv->mutex);
2320 iwl_rx_replenish(priv);
2321 mutex_unlock(&priv->mutex);
2322 }
2323
2324 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2325
2326 void iwl_post_associate(struct iwl_priv *priv)
2327 {
2328 struct ieee80211_conf *conf = NULL;
2329 int ret = 0;
2330 unsigned long flags;
2331
2332 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2333 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2334 return;
2335 }
2336
2337 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2338 priv->assoc_id, priv->active_rxon.bssid_addr);
2339
2340
2341 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2342 return;
2343
2344
2345 if (!priv->vif || !priv->is_open)
2346 return;
2347
2348 iwl_scan_cancel_timeout(priv, 200);
2349
2350 conf = ieee80211_get_hw_conf(priv->hw);
2351
2352 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2353 iwlcore_commit_rxon(priv);
2354
2355 iwl_setup_rxon_timing(priv);
2356 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2357 sizeof(priv->rxon_timing), &priv->rxon_timing);
2358 if (ret)
2359 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2360 "Attempting to continue.\n");
2361
2362 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2363
2364 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2365
2366 if (priv->cfg->ops->hcmd->set_rxon_chain)
2367 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2368
2369 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2370
2371 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2372 priv->assoc_id, priv->beacon_int);
2373
2374 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2375 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2376 else
2377 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2378
2379 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2380 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2381 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2382 else
2383 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2384
2385 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2386 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2387
2388 }
2389
2390 iwlcore_commit_rxon(priv);
2391
2392 switch (priv->iw_mode) {
2393 case NL80211_IFTYPE_STATION:
2394 break;
2395
2396 case NL80211_IFTYPE_ADHOC:
2397
2398 /* assume default assoc id */
2399 priv->assoc_id = 1;
2400
2401 iwl_rxon_add_station(priv, priv->bssid, 0);
2402 iwl_send_beacon_cmd(priv);
2403
2404 break;
2405
2406 default:
2407 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2408 __func__, priv->iw_mode);
2409 break;
2410 }
2411
2412 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2413 priv->assoc_station_added = 1;
2414
2415 spin_lock_irqsave(&priv->lock, flags);
2416 iwl_activate_qos(priv, 0);
2417 spin_unlock_irqrestore(&priv->lock, flags);
2418
2419 /* the chain noise calibration will enabled PM upon completion
2420 * If chain noise has already been run, then we need to enable
2421 * power management here */
2422 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2423 iwl_power_update_mode(priv, false);
2424
2425 /* Enable Rx differential gain and sensitivity calibrations */
2426 iwl_chain_noise_reset(priv);
2427 priv->start_calib = 1;
2428
2429 }
2430
2431 /*****************************************************************************
2432 *
2433 * mac80211 entry point functions
2434 *
2435 *****************************************************************************/
2436
2437 #define UCODE_READY_TIMEOUT (4 * HZ)
2438
2439 /*
2440 * Not a mac80211 entry point function, but it fits in with all the
2441 * other mac80211 functions grouped here.
2442 */
2443 static int iwl_setup_mac(struct iwl_priv *priv)
2444 {
2445 int ret;
2446 struct ieee80211_hw *hw = priv->hw;
2447 hw->rate_control_algorithm = "iwl-agn-rs";
2448
2449 /* Tell mac80211 our characteristics */
2450 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2451 IEEE80211_HW_NOISE_DBM |
2452 IEEE80211_HW_AMPDU_AGGREGATION |
2453 IEEE80211_HW_SPECTRUM_MGMT;
2454
2455 if (!priv->cfg->broken_powersave)
2456 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2457 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2458
2459 hw->sta_data_size = sizeof(struct iwl_station_priv);
2460 hw->wiphy->interface_modes =
2461 BIT(NL80211_IFTYPE_STATION) |
2462 BIT(NL80211_IFTYPE_ADHOC);
2463
2464 hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
2465 WIPHY_FLAG_DISABLE_BEACON_HINTS;
2466
2467 /*
2468 * For now, disable PS by default because it affects
2469 * RX performance significantly.
2470 */
2471 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2472
2473 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2474 /* we create the 802.11 header and a zero-length SSID element */
2475 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2476
2477 /* Default value; 4 EDCA QOS priorities */
2478 hw->queues = 4;
2479
2480 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2481
2482 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2483 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2484 &priv->bands[IEEE80211_BAND_2GHZ];
2485 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2486 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2487 &priv->bands[IEEE80211_BAND_5GHZ];
2488
2489 ret = ieee80211_register_hw(priv->hw);
2490 if (ret) {
2491 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2492 return ret;
2493 }
2494 priv->mac80211_registered = 1;
2495
2496 return 0;
2497 }
2498
2499
2500 static int iwl_mac_start(struct ieee80211_hw *hw)
2501 {
2502 struct iwl_priv *priv = hw->priv;
2503 int ret;
2504
2505 IWL_DEBUG_MAC80211(priv, "enter\n");
2506
2507 /* we should be verifying the device is ready to be opened */
2508 mutex_lock(&priv->mutex);
2509
2510 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2511 * ucode filename and max sizes are card-specific. */
2512
2513 if (!priv->ucode_code.len) {
2514 ret = iwl_read_ucode(priv);
2515 if (ret) {
2516 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2517 mutex_unlock(&priv->mutex);
2518 return ret;
2519 }
2520 }
2521
2522 ret = __iwl_up(priv);
2523
2524 mutex_unlock(&priv->mutex);
2525
2526 if (ret)
2527 return ret;
2528
2529 if (iwl_is_rfkill(priv))
2530 goto out;
2531
2532 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2533
2534 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2535 * mac80211 will not be run successfully. */
2536 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2537 test_bit(STATUS_READY, &priv->status),
2538 UCODE_READY_TIMEOUT);
2539 if (!ret) {
2540 if (!test_bit(STATUS_READY, &priv->status)) {
2541 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2542 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2543 return -ETIMEDOUT;
2544 }
2545 }
2546
2547 iwl_led_start(priv);
2548
2549 out:
2550 priv->is_open = 1;
2551 IWL_DEBUG_MAC80211(priv, "leave\n");
2552 return 0;
2553 }
2554
2555 static void iwl_mac_stop(struct ieee80211_hw *hw)
2556 {
2557 struct iwl_priv *priv = hw->priv;
2558
2559 IWL_DEBUG_MAC80211(priv, "enter\n");
2560
2561 if (!priv->is_open)
2562 return;
2563
2564 priv->is_open = 0;
2565
2566 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2567 /* stop mac, cancel any scan request and clear
2568 * RXON_FILTER_ASSOC_MSK BIT
2569 */
2570 mutex_lock(&priv->mutex);
2571 iwl_scan_cancel_timeout(priv, 100);
2572 mutex_unlock(&priv->mutex);
2573 }
2574
2575 iwl_down(priv);
2576
2577 flush_workqueue(priv->workqueue);
2578
2579 /* enable interrupts again in order to receive rfkill changes */
2580 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2581 iwl_enable_interrupts(priv);
2582
2583 IWL_DEBUG_MAC80211(priv, "leave\n");
2584 }
2585
2586 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2587 {
2588 struct iwl_priv *priv = hw->priv;
2589
2590 IWL_DEBUG_MACDUMP(priv, "enter\n");
2591
2592 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2593 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2594
2595 if (iwl_tx_skb(priv, skb))
2596 dev_kfree_skb_any(skb);
2597
2598 IWL_DEBUG_MACDUMP(priv, "leave\n");
2599 return NETDEV_TX_OK;
2600 }
2601
2602 void iwl_config_ap(struct iwl_priv *priv)
2603 {
2604 int ret = 0;
2605 unsigned long flags;
2606
2607 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2608 return;
2609
2610 /* The following should be done only at AP bring up */
2611 if (!iwl_is_associated(priv)) {
2612
2613 /* RXON - unassoc (to set timing command) */
2614 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2615 iwlcore_commit_rxon(priv);
2616
2617 /* RXON Timing */
2618 iwl_setup_rxon_timing(priv);
2619 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2620 sizeof(priv->rxon_timing), &priv->rxon_timing);
2621 if (ret)
2622 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2623 "Attempting to continue.\n");
2624
2625 /* AP has all antennas */
2626 priv->chain_noise_data.active_chains =
2627 priv->hw_params.valid_rx_ant;
2628 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2629 if (priv->cfg->ops->hcmd->set_rxon_chain)
2630 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2631
2632 /* FIXME: what should be the assoc_id for AP? */
2633 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2634 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2635 priv->staging_rxon.flags |=
2636 RXON_FLG_SHORT_PREAMBLE_MSK;
2637 else
2638 priv->staging_rxon.flags &=
2639 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2640
2641 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2642 if (priv->assoc_capability &
2643 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2644 priv->staging_rxon.flags |=
2645 RXON_FLG_SHORT_SLOT_MSK;
2646 else
2647 priv->staging_rxon.flags &=
2648 ~RXON_FLG_SHORT_SLOT_MSK;
2649
2650 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2651 priv->staging_rxon.flags &=
2652 ~RXON_FLG_SHORT_SLOT_MSK;
2653 }
2654 /* restore RXON assoc */
2655 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2656 iwlcore_commit_rxon(priv);
2657 iwl_reset_qos(priv);
2658 spin_lock_irqsave(&priv->lock, flags);
2659 iwl_activate_qos(priv, 1);
2660 spin_unlock_irqrestore(&priv->lock, flags);
2661 iwl_add_bcast_station(priv);
2662 }
2663 iwl_send_beacon_cmd(priv);
2664
2665 /* FIXME - we need to add code here to detect a totally new
2666 * configuration, reset the AP, unassoc, rxon timing, assoc,
2667 * clear sta table, add BCAST sta... */
2668 }
2669
2670 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2671 struct ieee80211_key_conf *keyconf, const u8 *addr,
2672 u32 iv32, u16 *phase1key)
2673 {
2674
2675 struct iwl_priv *priv = hw->priv;
2676 IWL_DEBUG_MAC80211(priv, "enter\n");
2677
2678 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2679
2680 IWL_DEBUG_MAC80211(priv, "leave\n");
2681 }
2682
2683 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2684 struct ieee80211_vif *vif,
2685 struct ieee80211_sta *sta,
2686 struct ieee80211_key_conf *key)
2687 {
2688 struct iwl_priv *priv = hw->priv;
2689 const u8 *addr;
2690 int ret;
2691 u8 sta_id;
2692 bool is_default_wep_key = false;
2693
2694 IWL_DEBUG_MAC80211(priv, "enter\n");
2695
2696 if (priv->cfg->mod_params->sw_crypto) {
2697 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2698 return -EOPNOTSUPP;
2699 }
2700 addr = sta ? sta->addr : iwl_bcast_addr;
2701 sta_id = iwl_find_station(priv, addr);
2702 if (sta_id == IWL_INVALID_STATION) {
2703 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2704 addr);
2705 return -EINVAL;
2706
2707 }
2708
2709 mutex_lock(&priv->mutex);
2710 iwl_scan_cancel_timeout(priv, 100);
2711 mutex_unlock(&priv->mutex);
2712
2713 /* If we are getting WEP group key and we didn't receive any key mapping
2714 * so far, we are in legacy wep mode (group key only), otherwise we are
2715 * in 1X mode.
2716 * In legacy wep mode, we use another host command to the uCode */
2717 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2718 priv->iw_mode != NL80211_IFTYPE_AP) {
2719 if (cmd == SET_KEY)
2720 is_default_wep_key = !priv->key_mapping_key;
2721 else
2722 is_default_wep_key =
2723 (key->hw_key_idx == HW_KEY_DEFAULT);
2724 }
2725
2726 switch (cmd) {
2727 case SET_KEY:
2728 if (is_default_wep_key)
2729 ret = iwl_set_default_wep_key(priv, key);
2730 else
2731 ret = iwl_set_dynamic_key(priv, key, sta_id);
2732
2733 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2734 break;
2735 case DISABLE_KEY:
2736 if (is_default_wep_key)
2737 ret = iwl_remove_default_wep_key(priv, key);
2738 else
2739 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2740
2741 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2742 break;
2743 default:
2744 ret = -EINVAL;
2745 }
2746
2747 IWL_DEBUG_MAC80211(priv, "leave\n");
2748
2749 return ret;
2750 }
2751
2752 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2753 struct ieee80211_vif *vif,
2754 enum ieee80211_ampdu_mlme_action action,
2755 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2756 {
2757 struct iwl_priv *priv = hw->priv;
2758 int ret;
2759
2760 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2761 sta->addr, tid);
2762
2763 if (!(priv->cfg->sku & IWL_SKU_N))
2764 return -EACCES;
2765
2766 switch (action) {
2767 case IEEE80211_AMPDU_RX_START:
2768 IWL_DEBUG_HT(priv, "start Rx\n");
2769 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2770 case IEEE80211_AMPDU_RX_STOP:
2771 IWL_DEBUG_HT(priv, "stop Rx\n");
2772 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2773 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2774 return 0;
2775 else
2776 return ret;
2777 case IEEE80211_AMPDU_TX_START:
2778 IWL_DEBUG_HT(priv, "start Tx\n");
2779 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2780 case IEEE80211_AMPDU_TX_STOP:
2781 IWL_DEBUG_HT(priv, "stop Tx\n");
2782 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2783 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2784 return 0;
2785 else
2786 return ret;
2787 default:
2788 IWL_DEBUG_HT(priv, "unknown\n");
2789 return -EINVAL;
2790 break;
2791 }
2792 return 0;
2793 }
2794
2795 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2796 struct ieee80211_low_level_stats *stats)
2797 {
2798 struct iwl_priv *priv = hw->priv;
2799
2800 priv = hw->priv;
2801 IWL_DEBUG_MAC80211(priv, "enter\n");
2802 IWL_DEBUG_MAC80211(priv, "leave\n");
2803
2804 return 0;
2805 }
2806
2807 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2808 struct ieee80211_vif *vif,
2809 enum sta_notify_cmd cmd,
2810 struct ieee80211_sta *sta)
2811 {
2812 struct iwl_priv *priv = hw->priv;
2813 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2814 int sta_id;
2815
2816 /*
2817 * TODO: We really should use this callback to
2818 * actually maintain the station table in
2819 * the device.
2820 */
2821
2822 switch (cmd) {
2823 case STA_NOTIFY_ADD:
2824 atomic_set(&sta_priv->pending_frames, 0);
2825 if (vif->type == NL80211_IFTYPE_AP)
2826 sta_priv->client = true;
2827 break;
2828 case STA_NOTIFY_SLEEP:
2829 WARN_ON(!sta_priv->client);
2830 sta_priv->asleep = true;
2831 if (atomic_read(&sta_priv->pending_frames) > 0)
2832 ieee80211_sta_block_awake(hw, sta, true);
2833 break;
2834 case STA_NOTIFY_AWAKE:
2835 WARN_ON(!sta_priv->client);
2836 sta_priv->asleep = false;
2837 sta_id = iwl_find_station(priv, sta->addr);
2838 if (sta_id != IWL_INVALID_STATION)
2839 iwl_sta_modify_ps_wake(priv, sta_id);
2840 break;
2841 default:
2842 break;
2843 }
2844 }
2845
2846 /*****************************************************************************
2847 *
2848 * sysfs attributes
2849 *
2850 *****************************************************************************/
2851
2852 #ifdef CONFIG_IWLWIFI_DEBUG
2853
2854 /*
2855 * The following adds a new attribute to the sysfs representation
2856 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2857 * used for controlling the debug level.
2858 *
2859 * See the level definitions in iwl for details.
2860 *
2861 * The debug_level being managed using sysfs below is a per device debug
2862 * level that is used instead of the global debug level if it (the per
2863 * device debug level) is set.
2864 */
2865 static ssize_t show_debug_level(struct device *d,
2866 struct device_attribute *attr, char *buf)
2867 {
2868 struct iwl_priv *priv = dev_get_drvdata(d);
2869 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2870 }
2871 static ssize_t store_debug_level(struct device *d,
2872 struct device_attribute *attr,
2873 const char *buf, size_t count)
2874 {
2875 struct iwl_priv *priv = dev_get_drvdata(d);
2876 unsigned long val;
2877 int ret;
2878
2879 ret = strict_strtoul(buf, 0, &val);
2880 if (ret)
2881 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2882 else {
2883 priv->debug_level = val;
2884 if (iwl_alloc_traffic_mem(priv))
2885 IWL_ERR(priv,
2886 "Not enough memory to generate traffic log\n");
2887 }
2888 return strnlen(buf, count);
2889 }
2890
2891 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2892 show_debug_level, store_debug_level);
2893
2894
2895 #endif /* CONFIG_IWLWIFI_DEBUG */
2896
2897
2898 static ssize_t show_temperature(struct device *d,
2899 struct device_attribute *attr, char *buf)
2900 {
2901 struct iwl_priv *priv = dev_get_drvdata(d);
2902
2903 if (!iwl_is_alive(priv))
2904 return -EAGAIN;
2905
2906 return sprintf(buf, "%d\n", priv->temperature);
2907 }
2908
2909 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2910
2911 static ssize_t show_tx_power(struct device *d,
2912 struct device_attribute *attr, char *buf)
2913 {
2914 struct iwl_priv *priv = dev_get_drvdata(d);
2915
2916 if (!iwl_is_ready_rf(priv))
2917 return sprintf(buf, "off\n");
2918 else
2919 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2920 }
2921
2922 static ssize_t store_tx_power(struct device *d,
2923 struct device_attribute *attr,
2924 const char *buf, size_t count)
2925 {
2926 struct iwl_priv *priv = dev_get_drvdata(d);
2927 unsigned long val;
2928 int ret;
2929
2930 ret = strict_strtoul(buf, 10, &val);
2931 if (ret)
2932 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2933 else {
2934 ret = iwl_set_tx_power(priv, val, false);
2935 if (ret)
2936 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2937 ret);
2938 else
2939 ret = count;
2940 }
2941 return ret;
2942 }
2943
2944 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2945
2946 static ssize_t show_flags(struct device *d,
2947 struct device_attribute *attr, char *buf)
2948 {
2949 struct iwl_priv *priv = dev_get_drvdata(d);
2950
2951 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2952 }
2953
2954 static ssize_t store_flags(struct device *d,
2955 struct device_attribute *attr,
2956 const char *buf, size_t count)
2957 {
2958 struct iwl_priv *priv = dev_get_drvdata(d);
2959 unsigned long val;
2960 u32 flags;
2961 int ret = strict_strtoul(buf, 0, &val);
2962 if (ret)
2963 return ret;
2964 flags = (u32)val;
2965
2966 mutex_lock(&priv->mutex);
2967 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2968 /* Cancel any currently running scans... */
2969 if (iwl_scan_cancel_timeout(priv, 100))
2970 IWL_WARN(priv, "Could not cancel scan.\n");
2971 else {
2972 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2973 priv->staging_rxon.flags = cpu_to_le32(flags);
2974 iwlcore_commit_rxon(priv);
2975 }
2976 }
2977 mutex_unlock(&priv->mutex);
2978
2979 return count;
2980 }
2981
2982 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2983
2984 static ssize_t show_filter_flags(struct device *d,
2985 struct device_attribute *attr, char *buf)
2986 {
2987 struct iwl_priv *priv = dev_get_drvdata(d);
2988
2989 return sprintf(buf, "0x%04X\n",
2990 le32_to_cpu(priv->active_rxon.filter_flags));
2991 }
2992
2993 static ssize_t store_filter_flags(struct device *d,
2994 struct device_attribute *attr,
2995 const char *buf, size_t count)
2996 {
2997 struct iwl_priv *priv = dev_get_drvdata(d);
2998 unsigned long val;
2999 u32 filter_flags;
3000 int ret = strict_strtoul(buf, 0, &val);
3001 if (ret)
3002 return ret;
3003 filter_flags = (u32)val;
3004
3005 mutex_lock(&priv->mutex);
3006 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3007 /* Cancel any currently running scans... */
3008 if (iwl_scan_cancel_timeout(priv, 100))
3009 IWL_WARN(priv, "Could not cancel scan.\n");
3010 else {
3011 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3012 "0x%04X\n", filter_flags);
3013 priv->staging_rxon.filter_flags =
3014 cpu_to_le32(filter_flags);
3015 iwlcore_commit_rxon(priv);
3016 }
3017 }
3018 mutex_unlock(&priv->mutex);
3019
3020 return count;
3021 }
3022
3023 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3024 store_filter_flags);
3025
3026
3027 static ssize_t show_statistics(struct device *d,
3028 struct device_attribute *attr, char *buf)
3029 {
3030 struct iwl_priv *priv = dev_get_drvdata(d);
3031 u32 size = sizeof(struct iwl_notif_statistics);
3032 u32 len = 0, ofs = 0;
3033 u8 *data = (u8 *)&priv->statistics;
3034 int rc = 0;
3035
3036 if (!iwl_is_alive(priv))
3037 return -EAGAIN;
3038
3039 mutex_lock(&priv->mutex);
3040 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3041 mutex_unlock(&priv->mutex);
3042
3043 if (rc) {
3044 len = sprintf(buf,
3045 "Error sending statistics request: 0x%08X\n", rc);
3046 return len;
3047 }
3048
3049 while (size && (PAGE_SIZE - len)) {
3050 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3051 PAGE_SIZE - len, 1);
3052 len = strlen(buf);
3053 if (PAGE_SIZE - len)
3054 buf[len++] = '\n';
3055
3056 ofs += 16;
3057 size -= min(size, 16U);
3058 }
3059
3060 return len;
3061 }
3062
3063 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3064
3065 static ssize_t show_rts_ht_protection(struct device *d,
3066 struct device_attribute *attr, char *buf)
3067 {
3068 struct iwl_priv *priv = dev_get_drvdata(d);
3069
3070 return sprintf(buf, "%s\n",
3071 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3072 }
3073
3074 static ssize_t store_rts_ht_protection(struct device *d,
3075 struct device_attribute *attr,
3076 const char *buf, size_t count)
3077 {
3078 struct iwl_priv *priv = dev_get_drvdata(d);
3079 unsigned long val;
3080 int ret;
3081
3082 ret = strict_strtoul(buf, 10, &val);
3083 if (ret)
3084 IWL_INFO(priv, "Input is not in decimal form.\n");
3085 else {
3086 if (!iwl_is_associated(priv))
3087 priv->cfg->use_rts_for_ht = val ? true : false;
3088 else
3089 IWL_ERR(priv, "Sta associated with AP - "
3090 "Change protection mechanism is not allowed\n");
3091 ret = count;
3092 }
3093 return ret;
3094 }
3095
3096 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3097 show_rts_ht_protection, store_rts_ht_protection);
3098
3099
3100 /*****************************************************************************
3101 *
3102 * driver setup and teardown
3103 *
3104 *****************************************************************************/
3105
3106 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3107 {
3108 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3109
3110 init_waitqueue_head(&priv->wait_command_queue);
3111
3112 INIT_WORK(&priv->up, iwl_bg_up);
3113 INIT_WORK(&priv->restart, iwl_bg_restart);
3114 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3115 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3116 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3117 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3118 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3119
3120 iwl_setup_scan_deferred_work(priv);
3121
3122 if (priv->cfg->ops->lib->setup_deferred_work)
3123 priv->cfg->ops->lib->setup_deferred_work(priv);
3124
3125 init_timer(&priv->statistics_periodic);
3126 priv->statistics_periodic.data = (unsigned long)priv;
3127 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3128
3129 if (!priv->cfg->use_isr_legacy)
3130 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3131 iwl_irq_tasklet, (unsigned long)priv);
3132 else
3133 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3134 iwl_irq_tasklet_legacy, (unsigned long)priv);
3135 }
3136
3137 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3138 {
3139 if (priv->cfg->ops->lib->cancel_deferred_work)
3140 priv->cfg->ops->lib->cancel_deferred_work(priv);
3141
3142 cancel_delayed_work_sync(&priv->init_alive_start);
3143 cancel_delayed_work(&priv->scan_check);
3144 cancel_delayed_work(&priv->alive_start);
3145 cancel_work_sync(&priv->beacon_update);
3146 del_timer_sync(&priv->statistics_periodic);
3147 }
3148
3149 static void iwl_init_hw_rates(struct iwl_priv *priv,
3150 struct ieee80211_rate *rates)
3151 {
3152 int i;
3153
3154 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3155 rates[i].bitrate = iwl_rates[i].ieee * 5;
3156 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3157 rates[i].hw_value_short = i;
3158 rates[i].flags = 0;
3159 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3160 /*
3161 * If CCK != 1M then set short preamble rate flag.
3162 */
3163 rates[i].flags |=
3164 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3165 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3166 }
3167 }
3168 }
3169
3170 static int iwl_init_drv(struct iwl_priv *priv)
3171 {
3172 int ret;
3173
3174 priv->ibss_beacon = NULL;
3175
3176 spin_lock_init(&priv->sta_lock);
3177 spin_lock_init(&priv->hcmd_lock);
3178
3179 INIT_LIST_HEAD(&priv->free_frames);
3180
3181 mutex_init(&priv->mutex);
3182
3183 /* Clear the driver's (not device's) station table */
3184 iwl_clear_stations_table(priv);
3185
3186 priv->ieee_channels = NULL;
3187 priv->ieee_rates = NULL;
3188 priv->band = IEEE80211_BAND_2GHZ;
3189
3190 priv->iw_mode = NL80211_IFTYPE_STATION;
3191
3192 /* Choose which receivers/antennas to use */
3193 if (priv->cfg->ops->hcmd->set_rxon_chain)
3194 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3195
3196 iwl_init_scan_params(priv);
3197
3198 iwl_reset_qos(priv);
3199
3200 priv->qos_data.qos_active = 0;
3201 priv->qos_data.qos_cap.val = 0;
3202
3203 priv->rates_mask = IWL_RATES_MASK;
3204 /* Set the tx_power_user_lmt to the lowest power level
3205 * this value will get overwritten by channel max power avg
3206 * from eeprom */
3207 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3208
3209 ret = iwl_init_channel_map(priv);
3210 if (ret) {
3211 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3212 goto err;
3213 }
3214
3215 ret = iwlcore_init_geos(priv);
3216 if (ret) {
3217 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3218 goto err_free_channel_map;
3219 }
3220 iwl_init_hw_rates(priv, priv->ieee_rates);
3221
3222 return 0;
3223
3224 err_free_channel_map:
3225 iwl_free_channel_map(priv);
3226 err:
3227 return ret;
3228 }
3229
3230 static void iwl_uninit_drv(struct iwl_priv *priv)
3231 {
3232 iwl_calib_free_results(priv);
3233 iwlcore_free_geos(priv);
3234 iwl_free_channel_map(priv);
3235 kfree(priv->scan);
3236 }
3237
3238 static struct attribute *iwl_sysfs_entries[] = {
3239 &dev_attr_flags.attr,
3240 &dev_attr_filter_flags.attr,
3241 &dev_attr_statistics.attr,
3242 &dev_attr_temperature.attr,
3243 &dev_attr_tx_power.attr,
3244 &dev_attr_rts_ht_protection.attr,
3245 #ifdef CONFIG_IWLWIFI_DEBUG
3246 &dev_attr_debug_level.attr,
3247 #endif
3248 NULL
3249 };
3250
3251 static struct attribute_group iwl_attribute_group = {
3252 .name = NULL, /* put in device directory */
3253 .attrs = iwl_sysfs_entries,
3254 };
3255
3256 static struct ieee80211_ops iwl_hw_ops = {
3257 .tx = iwl_mac_tx,
3258 .start = iwl_mac_start,
3259 .stop = iwl_mac_stop,
3260 .add_interface = iwl_mac_add_interface,
3261 .remove_interface = iwl_mac_remove_interface,
3262 .config = iwl_mac_config,
3263 .configure_filter = iwl_configure_filter,
3264 .set_key = iwl_mac_set_key,
3265 .update_tkip_key = iwl_mac_update_tkip_key,
3266 .get_stats = iwl_mac_get_stats,
3267 .get_tx_stats = iwl_mac_get_tx_stats,
3268 .conf_tx = iwl_mac_conf_tx,
3269 .reset_tsf = iwl_mac_reset_tsf,
3270 .bss_info_changed = iwl_bss_info_changed,
3271 .ampdu_action = iwl_mac_ampdu_action,
3272 .hw_scan = iwl_mac_hw_scan,
3273 .sta_notify = iwl_mac_sta_notify,
3274 };
3275
3276 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3277 {
3278 int err = 0;
3279 struct iwl_priv *priv;
3280 struct ieee80211_hw *hw;
3281 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3282 unsigned long flags;
3283 u16 pci_cmd;
3284
3285 /************************
3286 * 1. Allocating HW data
3287 ************************/
3288
3289 /* Disabling hardware scan means that mac80211 will perform scans
3290 * "the hard way", rather than using device's scan. */
3291 if (cfg->mod_params->disable_hw_scan) {
3292 if (iwl_debug_level & IWL_DL_INFO)
3293 dev_printk(KERN_DEBUG, &(pdev->dev),
3294 "Disabling hw_scan\n");
3295 iwl_hw_ops.hw_scan = NULL;
3296 }
3297
3298 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3299 if (!hw) {
3300 err = -ENOMEM;
3301 goto out;
3302 }
3303 priv = hw->priv;
3304 /* At this point both hw and priv are allocated. */
3305
3306 SET_IEEE80211_DEV(hw, &pdev->dev);
3307
3308 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3309 priv->cfg = cfg;
3310 priv->pci_dev = pdev;
3311 priv->inta_mask = CSR_INI_SET_MASK;
3312
3313 #ifdef CONFIG_IWLWIFI_DEBUG
3314 atomic_set(&priv->restrict_refcnt, 0);
3315 #endif
3316 if (iwl_alloc_traffic_mem(priv))
3317 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3318
3319 /**************************
3320 * 2. Initializing PCI bus
3321 **************************/
3322 if (pci_enable_device(pdev)) {
3323 err = -ENODEV;
3324 goto out_ieee80211_free_hw;
3325 }
3326
3327 pci_set_master(pdev);
3328
3329 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3330 if (!err)
3331 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3332 if (err) {
3333 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3334 if (!err)
3335 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3336 /* both attempts failed: */
3337 if (err) {
3338 IWL_WARN(priv, "No suitable DMA available.\n");
3339 goto out_pci_disable_device;
3340 }
3341 }
3342
3343 err = pci_request_regions(pdev, DRV_NAME);
3344 if (err)
3345 goto out_pci_disable_device;
3346
3347 pci_set_drvdata(pdev, priv);
3348
3349
3350 /***********************
3351 * 3. Read REV register
3352 ***********************/
3353 priv->hw_base = pci_iomap(pdev, 0, 0);
3354 if (!priv->hw_base) {
3355 err = -ENODEV;
3356 goto out_pci_release_regions;
3357 }
3358
3359 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3360 (unsigned long long) pci_resource_len(pdev, 0));
3361 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3362
3363 /* these spin locks will be used in apm_ops.init and EEPROM access
3364 * we should init now
3365 */
3366 spin_lock_init(&priv->reg_lock);
3367 spin_lock_init(&priv->lock);
3368 iwl_hw_detect(priv);
3369 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3370 priv->cfg->name, priv->hw_rev);
3371
3372 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3373 * PCI Tx retries from interfering with C3 CPU state */
3374 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3375
3376 iwl_prepare_card_hw(priv);
3377 if (!priv->hw_ready) {
3378 IWL_WARN(priv, "Failed, HW not ready\n");
3379 goto out_iounmap;
3380 }
3381
3382 /*****************
3383 * 4. Read EEPROM
3384 *****************/
3385 /* Read the EEPROM */
3386 err = iwl_eeprom_init(priv);
3387 if (err) {
3388 IWL_ERR(priv, "Unable to init EEPROM\n");
3389 goto out_iounmap;
3390 }
3391 err = iwl_eeprom_check_version(priv);
3392 if (err)
3393 goto out_free_eeprom;
3394
3395 /* extract MAC Address */
3396 iwl_eeprom_get_mac(priv, priv->mac_addr);
3397 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3398 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3399
3400 /************************
3401 * 5. Setup HW constants
3402 ************************/
3403 if (iwl_set_hw_params(priv)) {
3404 IWL_ERR(priv, "failed to set hw parameters\n");
3405 goto out_free_eeprom;
3406 }
3407
3408 /*******************
3409 * 6. Setup priv
3410 *******************/
3411
3412 err = iwl_init_drv(priv);
3413 if (err)
3414 goto out_free_eeprom;
3415 /* At this point both hw and priv are initialized. */
3416
3417 /********************
3418 * 7. Setup services
3419 ********************/
3420 spin_lock_irqsave(&priv->lock, flags);
3421 iwl_disable_interrupts(priv);
3422 spin_unlock_irqrestore(&priv->lock, flags);
3423
3424 pci_enable_msi(priv->pci_dev);
3425
3426 iwl_alloc_isr_ict(priv);
3427 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3428 IRQF_SHARED, DRV_NAME, priv);
3429 if (err) {
3430 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3431 goto out_disable_msi;
3432 }
3433 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3434 if (err) {
3435 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3436 goto out_free_irq;
3437 }
3438
3439 iwl_setup_deferred_work(priv);
3440 iwl_setup_rx_handlers(priv);
3441
3442 /**********************************
3443 * 8. Setup and register mac80211
3444 **********************************/
3445
3446 /* enable interrupts if needed: hw bug w/a */
3447 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3448 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3449 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3450 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3451 }
3452
3453 iwl_enable_interrupts(priv);
3454
3455 err = iwl_setup_mac(priv);
3456 if (err)
3457 goto out_remove_sysfs;
3458
3459 err = iwl_dbgfs_register(priv, DRV_NAME);
3460 if (err)
3461 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3462
3463 /* If platform's RF_KILL switch is NOT set to KILL */
3464 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3465 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3466 else
3467 set_bit(STATUS_RF_KILL_HW, &priv->status);
3468
3469 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3470 test_bit(STATUS_RF_KILL_HW, &priv->status));
3471
3472 iwl_power_initialize(priv);
3473 iwl_tt_initialize(priv);
3474 return 0;
3475
3476 out_remove_sysfs:
3477 destroy_workqueue(priv->workqueue);
3478 priv->workqueue = NULL;
3479 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3480 out_free_irq:
3481 free_irq(priv->pci_dev->irq, priv);
3482 iwl_free_isr_ict(priv);
3483 out_disable_msi:
3484 pci_disable_msi(priv->pci_dev);
3485 iwl_uninit_drv(priv);
3486 out_free_eeprom:
3487 iwl_eeprom_free(priv);
3488 out_iounmap:
3489 pci_iounmap(pdev, priv->hw_base);
3490 out_pci_release_regions:
3491 pci_set_drvdata(pdev, NULL);
3492 pci_release_regions(pdev);
3493 out_pci_disable_device:
3494 pci_disable_device(pdev);
3495 out_ieee80211_free_hw:
3496 iwl_free_traffic_mem(priv);
3497 ieee80211_free_hw(priv->hw);
3498 out:
3499 return err;
3500 }
3501
3502 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3503 {
3504 struct iwl_priv *priv = pci_get_drvdata(pdev);
3505 unsigned long flags;
3506
3507 if (!priv)
3508 return;
3509
3510 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3511
3512 iwl_dbgfs_unregister(priv);
3513 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3514
3515 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3516 * to be called and iwl_down since we are removing the device
3517 * we need to set STATUS_EXIT_PENDING bit.
3518 */
3519 set_bit(STATUS_EXIT_PENDING, &priv->status);
3520 if (priv->mac80211_registered) {
3521 ieee80211_unregister_hw(priv->hw);
3522 priv->mac80211_registered = 0;
3523 } else {
3524 iwl_down(priv);
3525 }
3526
3527 /*
3528 * Make sure device is reset to low power before unloading driver.
3529 * This may be redundant with iwl_down(), but there are paths to
3530 * run iwl_down() without calling apm_ops.stop(), and there are
3531 * paths to avoid running iwl_down() at all before leaving driver.
3532 * This (inexpensive) call *makes sure* device is reset.
3533 */
3534 priv->cfg->ops->lib->apm_ops.stop(priv);
3535
3536 iwl_tt_exit(priv);
3537
3538 /* make sure we flush any pending irq or
3539 * tasklet for the driver
3540 */
3541 spin_lock_irqsave(&priv->lock, flags);
3542 iwl_disable_interrupts(priv);
3543 spin_unlock_irqrestore(&priv->lock, flags);
3544
3545 iwl_synchronize_irq(priv);
3546
3547 iwl_dealloc_ucode_pci(priv);
3548
3549 if (priv->rxq.bd)
3550 iwl_rx_queue_free(priv, &priv->rxq);
3551 iwl_hw_txq_ctx_free(priv);
3552
3553 iwl_clear_stations_table(priv);
3554 iwl_eeprom_free(priv);
3555
3556
3557 /*netif_stop_queue(dev); */
3558 flush_workqueue(priv->workqueue);
3559
3560 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3561 * priv->workqueue... so we can't take down the workqueue
3562 * until now... */
3563 destroy_workqueue(priv->workqueue);
3564 priv->workqueue = NULL;
3565 iwl_free_traffic_mem(priv);
3566
3567 free_irq(priv->pci_dev->irq, priv);
3568 pci_disable_msi(priv->pci_dev);
3569 pci_iounmap(pdev, priv->hw_base);
3570 pci_release_regions(pdev);
3571 pci_disable_device(pdev);
3572 pci_set_drvdata(pdev, NULL);
3573
3574 iwl_uninit_drv(priv);
3575
3576 iwl_free_isr_ict(priv);
3577
3578 if (priv->ibss_beacon)
3579 dev_kfree_skb(priv->ibss_beacon);
3580
3581 ieee80211_free_hw(priv->hw);
3582 }
3583
3584
3585 /*****************************************************************************
3586 *
3587 * driver and module entry point
3588 *
3589 *****************************************************************************/
3590
3591 /* Hardware specific file defines the PCI IDs table for that hardware module */
3592 static struct pci_device_id iwl_hw_card_ids[] = {
3593 #ifdef CONFIG_IWL4965
3594 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3595 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3596 #endif /* CONFIG_IWL4965 */
3597 #ifdef CONFIG_IWL5000
3598 /* 5100 Series WiFi */
3599 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3600 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3601 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3602 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3603 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3604 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3605 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3606 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3607 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3608 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3609 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3610 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3611 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3612 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3613 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3614 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3615 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3616 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3617 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3618 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3619 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3620 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3621 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3622 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3623
3624 /* 5300 Series WiFi */
3625 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3626 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3627 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3628 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3629 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3630 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3631 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3632 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3633 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3634 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3635 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3636 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3637
3638 /* 5350 Series WiFi/WiMax */
3639 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3640 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3641 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3642
3643 /* 5150 Series Wifi/WiMax */
3644 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3645 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3646 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3647 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3648 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3649 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3650
3651 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3652 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3653 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3654 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3655
3656 /* 6x00 Series */
3657 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3658 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3659 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3660 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3661 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3662 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3663 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3664 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3665 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3666 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3667
3668 /* 6x50 WiFi/WiMax Series */
3669 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3670 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3671 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3672 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3673 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3674 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3675
3676 /* 1000 Series WiFi */
3677 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3678 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3679 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3680 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3681 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3682 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3683 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3684 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3685 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3686 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3687 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3688 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3689 #endif /* CONFIG_IWL5000 */
3690
3691 {0}
3692 };
3693 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3694
3695 static struct pci_driver iwl_driver = {
3696 .name = DRV_NAME,
3697 .id_table = iwl_hw_card_ids,
3698 .probe = iwl_pci_probe,
3699 .remove = __devexit_p(iwl_pci_remove),
3700 #ifdef CONFIG_PM
3701 .suspend = iwl_pci_suspend,
3702 .resume = iwl_pci_resume,
3703 #endif
3704 };
3705
3706 static int __init iwl_init(void)
3707 {
3708
3709 int ret;
3710 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3711 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3712
3713 ret = iwlagn_rate_control_register();
3714 if (ret) {
3715 printk(KERN_ERR DRV_NAME
3716 "Unable to register rate control algorithm: %d\n", ret);
3717 return ret;
3718 }
3719
3720 ret = pci_register_driver(&iwl_driver);
3721 if (ret) {
3722 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3723 goto error_register;
3724 }
3725
3726 return ret;
3727
3728 error_register:
3729 iwlagn_rate_control_unregister();
3730 return ret;
3731 }
3732
3733 static void __exit iwl_exit(void)
3734 {
3735 pci_unregister_driver(&iwl_driver);
3736 iwlagn_rate_control_unregister();
3737 }
3738
3739 module_exit(iwl_exit);
3740 module_init(iwl_init);
3741
3742 #ifdef CONFIG_IWLWIFI_DEBUG
3743 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3744 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3745 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3746 MODULE_PARM_DESC(debug, "debug output mask");
3747 #endif
3748
Linux kernel - Deliverables
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