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29f3b73c7560e067ad47aa9b67fcb3954911f124
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /*
65 * module name, copyright, version, etc.
66 */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
93 */
94
95 /**************************************************************/
96
97 /**
98 * iwl_commit_rxon - commit staging_rxon to hardware
99 *
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113 if (!iwl_is_alive(priv))
114 return -EBUSY;
115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118
119 ret = iwl_check_rxon_cmd(priv);
120 if (ret) {
121 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
122 return -EINVAL;
123 }
124
125 /*
126 * receive commit_rxon request
127 * abort any previous channel switch if still in process
128 */
129 if (priv->switch_rxon.switch_in_progress &&
130 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
131 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
132 le16_to_cpu(priv->switch_rxon.channel));
133 priv->switch_rxon.switch_in_progress = false;
134 }
135
136 /* If we don't need to send a full RXON, we can use
137 * iwl_rxon_assoc_cmd which is used to reconfigure filter
138 * and other flags for the current radio configuration. */
139 if (!iwl_full_rxon_required(priv)) {
140 ret = iwl_send_rxon_assoc(priv);
141 if (ret) {
142 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
143 return ret;
144 }
145
146 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
147 iwl_print_rx_config_cmd(priv);
148 return 0;
149 }
150
151 /* station table will be cleared */
152 priv->assoc_station_added = 0;
153
154 /* If we are currently associated and the new config requires
155 * an RXON_ASSOC and the new config wants the associated mask enabled,
156 * we must clear the associated from the active configuration
157 * before we apply the new config */
158 if (iwl_is_associated(priv) && new_assoc) {
159 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
160 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
161
162 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
163 sizeof(struct iwl_rxon_cmd),
164 &priv->active_rxon);
165
166 /* If the mask clearing failed then we set
167 * active_rxon back to what it was previously */
168 if (ret) {
169 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
170 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
171 return ret;
172 }
173 }
174
175 IWL_DEBUG_INFO(priv, "Sending RXON\n"
176 "* with%s RXON_FILTER_ASSOC_MSK\n"
177 "* channel = %d\n"
178 "* bssid = %pM\n",
179 (new_assoc ? "" : "out"),
180 le16_to_cpu(priv->staging_rxon.channel),
181 priv->staging_rxon.bssid_addr);
182
183 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
184
185 /* Apply the new configuration
186 * RXON unassoc clears the station table in uCode, send it before
187 * we add the bcast station. If assoc bit is set, we will send RXON
188 * after having added the bcast and bssid station.
189 */
190 if (!new_assoc) {
191 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
192 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
193 if (ret) {
194 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
195 return ret;
196 }
197 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
198 }
199
200 iwl_clear_stations_table(priv);
201
202 priv->start_calib = 0;
203
204 /* Add the broadcast address so we can send broadcast frames */
205 iwl_add_bcast_station(priv);
206
207 /* If we have set the ASSOC_MSK and we are in BSS mode then
208 * add the IWL_AP_ID to the station rate table */
209 if (new_assoc) {
210 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
211 ret = iwl_rxon_add_station(priv,
212 priv->active_rxon.bssid_addr, 1);
213 if (ret == IWL_INVALID_STATION) {
214 IWL_ERR(priv,
215 "Error adding AP address for TX.\n");
216 return -EIO;
217 }
218 priv->assoc_station_added = 1;
219 if (priv->default_wep_key &&
220 iwl_send_static_wepkey_cmd(priv, 0))
221 IWL_ERR(priv,
222 "Could not send WEP static key.\n");
223 }
224
225 /*
226 * allow CTS-to-self if possible for new association.
227 * this is relevant only for 5000 series and up,
228 * but will not damage 4965
229 */
230 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
231
232 /* Apply the new configuration
233 * RXON assoc doesn't clear the station table in uCode,
234 */
235 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
236 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
237 if (ret) {
238 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
239 return ret;
240 }
241 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
242 }
243 iwl_print_rx_config_cmd(priv);
244
245 iwl_init_sensitivity(priv);
246
247 /* If we issue a new RXON command which required a tune then we must
248 * send a new TXPOWER command or we won't be able to Tx any frames */
249 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
250 if (ret) {
251 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
252 return ret;
253 }
254
255 return 0;
256 }
257
258 void iwl_update_chain_flags(struct iwl_priv *priv)
259 {
260
261 if (priv->cfg->ops->hcmd->set_rxon_chain)
262 priv->cfg->ops->hcmd->set_rxon_chain(priv);
263 iwlcore_commit_rxon(priv);
264 }
265
266 static void iwl_clear_free_frames(struct iwl_priv *priv)
267 {
268 struct list_head *element;
269
270 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
271 priv->frames_count);
272
273 while (!list_empty(&priv->free_frames)) {
274 element = priv->free_frames.next;
275 list_del(element);
276 kfree(list_entry(element, struct iwl_frame, list));
277 priv->frames_count--;
278 }
279
280 if (priv->frames_count) {
281 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
282 priv->frames_count);
283 priv->frames_count = 0;
284 }
285 }
286
287 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
288 {
289 struct iwl_frame *frame;
290 struct list_head *element;
291 if (list_empty(&priv->free_frames)) {
292 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
293 if (!frame) {
294 IWL_ERR(priv, "Could not allocate frame!\n");
295 return NULL;
296 }
297
298 priv->frames_count++;
299 return frame;
300 }
301
302 element = priv->free_frames.next;
303 list_del(element);
304 return list_entry(element, struct iwl_frame, list);
305 }
306
307 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
308 {
309 memset(frame, 0, sizeof(*frame));
310 list_add(&frame->list, &priv->free_frames);
311 }
312
313 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
314 struct ieee80211_hdr *hdr,
315 int left)
316 {
317 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
318 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
319 (priv->iw_mode != NL80211_IFTYPE_AP)))
320 return 0;
321
322 if (priv->ibss_beacon->len > left)
323 return 0;
324
325 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
326
327 return priv->ibss_beacon->len;
328 }
329
330 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
331 static void iwl_set_beacon_tim(struct iwl_priv *priv,
332 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
333 u8 *beacon, u32 frame_size)
334 {
335 u16 tim_idx;
336 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
337
338 /*
339 * The index is relative to frame start but we start looking at the
340 * variable-length part of the beacon.
341 */
342 tim_idx = mgmt->u.beacon.variable - beacon;
343
344 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
345 while ((tim_idx < (frame_size - 2)) &&
346 (beacon[tim_idx] != WLAN_EID_TIM))
347 tim_idx += beacon[tim_idx+1] + 2;
348
349 /* If TIM field was found, set variables */
350 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
351 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
352 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
353 } else
354 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
355 }
356
357 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
358 struct iwl_frame *frame)
359 {
360 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
361 u32 frame_size;
362 u32 rate_flags;
363 u32 rate;
364 /*
365 * We have to set up the TX command, the TX Beacon command, and the
366 * beacon contents.
367 */
368
369 /* Initialize memory */
370 tx_beacon_cmd = &frame->u.beacon;
371 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
372
373 /* Set up TX beacon contents */
374 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
375 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
376 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
377 return 0;
378
379 /* Set up TX command fields */
380 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
381 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
382 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
383 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
384 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
385
386 /* Set up TX beacon command fields */
387 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
388 frame_size);
389
390 /* Set up packet rate and flags */
391 rate = iwl_rate_get_lowest_plcp(priv);
392 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
393 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
394 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
395 rate_flags |= RATE_MCS_CCK_MSK;
396 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
397 rate_flags);
398
399 return sizeof(*tx_beacon_cmd) + frame_size;
400 }
401 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
402 {
403 struct iwl_frame *frame;
404 unsigned int frame_size;
405 int rc;
406
407 frame = iwl_get_free_frame(priv);
408 if (!frame) {
409 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
410 "command.\n");
411 return -ENOMEM;
412 }
413
414 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
415 if (!frame_size) {
416 IWL_ERR(priv, "Error configuring the beacon command\n");
417 iwl_free_frame(priv, frame);
418 return -EINVAL;
419 }
420
421 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
422 &frame->u.cmd[0]);
423
424 iwl_free_frame(priv, frame);
425
426 return rc;
427 }
428
429 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
430 {
431 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
432
433 dma_addr_t addr = get_unaligned_le32(&tb->lo);
434 if (sizeof(dma_addr_t) > sizeof(u32))
435 addr |=
436 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
437
438 return addr;
439 }
440
441 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
442 {
443 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
444
445 return le16_to_cpu(tb->hi_n_len) >> 4;
446 }
447
448 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
449 dma_addr_t addr, u16 len)
450 {
451 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
452 u16 hi_n_len = len << 4;
453
454 put_unaligned_le32(addr, &tb->lo);
455 if (sizeof(dma_addr_t) > sizeof(u32))
456 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
457
458 tb->hi_n_len = cpu_to_le16(hi_n_len);
459
460 tfd->num_tbs = idx + 1;
461 }
462
463 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
464 {
465 return tfd->num_tbs & 0x1f;
466 }
467
468 /**
469 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
470 * @priv - driver private data
471 * @txq - tx queue
472 *
473 * Does NOT advance any TFD circular buffer read/write indexes
474 * Does NOT free the TFD itself (which is within circular buffer)
475 */
476 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
477 {
478 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
479 struct iwl_tfd *tfd;
480 struct pci_dev *dev = priv->pci_dev;
481 int index = txq->q.read_ptr;
482 int i;
483 int num_tbs;
484
485 tfd = &tfd_tmp[index];
486
487 /* Sanity check on number of chunks */
488 num_tbs = iwl_tfd_get_num_tbs(tfd);
489
490 if (num_tbs >= IWL_NUM_OF_TBS) {
491 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
492 /* @todo issue fatal error, it is quite serious situation */
493 return;
494 }
495
496 /* Unmap tx_cmd */
497 if (num_tbs)
498 pci_unmap_single(dev,
499 pci_unmap_addr(&txq->meta[index], mapping),
500 pci_unmap_len(&txq->meta[index], len),
501 PCI_DMA_BIDIRECTIONAL);
502
503 /* Unmap chunks, if any. */
504 for (i = 1; i < num_tbs; i++) {
505 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
506 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
507
508 if (txq->txb) {
509 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
510 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
511 }
512 }
513 }
514
515 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
516 struct iwl_tx_queue *txq,
517 dma_addr_t addr, u16 len,
518 u8 reset, u8 pad)
519 {
520 struct iwl_queue *q;
521 struct iwl_tfd *tfd, *tfd_tmp;
522 u32 num_tbs;
523
524 q = &txq->q;
525 tfd_tmp = (struct iwl_tfd *)txq->tfds;
526 tfd = &tfd_tmp[q->write_ptr];
527
528 if (reset)
529 memset(tfd, 0, sizeof(*tfd));
530
531 num_tbs = iwl_tfd_get_num_tbs(tfd);
532
533 /* Each TFD can point to a maximum 20 Tx buffers */
534 if (num_tbs >= IWL_NUM_OF_TBS) {
535 IWL_ERR(priv, "Error can not send more than %d chunks\n",
536 IWL_NUM_OF_TBS);
537 return -EINVAL;
538 }
539
540 BUG_ON(addr & ~DMA_BIT_MASK(36));
541 if (unlikely(addr & ~IWL_TX_DMA_MASK))
542 IWL_ERR(priv, "Unaligned address = %llx\n",
543 (unsigned long long)addr);
544
545 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
546
547 return 0;
548 }
549
550 /*
551 * Tell nic where to find circular buffer of Tx Frame Descriptors for
552 * given Tx queue, and enable the DMA channel used for that queue.
553 *
554 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
555 * channels supported in hardware.
556 */
557 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
558 struct iwl_tx_queue *txq)
559 {
560 int txq_id = txq->q.id;
561
562 /* Circular buffer (TFD queue in DRAM) physical base address */
563 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
564 txq->q.dma_addr >> 8);
565
566 return 0;
567 }
568
569 /******************************************************************************
570 *
571 * Generic RX handler implementations
572 *
573 ******************************************************************************/
574 static void iwl_rx_reply_alive(struct iwl_priv *priv,
575 struct iwl_rx_mem_buffer *rxb)
576 {
577 struct iwl_rx_packet *pkt = rxb_addr(rxb);
578 struct iwl_alive_resp *palive;
579 struct delayed_work *pwork;
580
581 palive = &pkt->u.alive_frame;
582
583 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
584 "0x%01X 0x%01X\n",
585 palive->is_valid, palive->ver_type,
586 palive->ver_subtype);
587
588 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
589 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
590 memcpy(&priv->card_alive_init,
591 &pkt->u.alive_frame,
592 sizeof(struct iwl_init_alive_resp));
593 pwork = &priv->init_alive_start;
594 } else {
595 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
596 memcpy(&priv->card_alive, &pkt->u.alive_frame,
597 sizeof(struct iwl_alive_resp));
598 pwork = &priv->alive_start;
599 }
600
601 /* We delay the ALIVE response by 5ms to
602 * give the HW RF Kill time to activate... */
603 if (palive->is_valid == UCODE_VALID_OK)
604 queue_delayed_work(priv->workqueue, pwork,
605 msecs_to_jiffies(5));
606 else
607 IWL_WARN(priv, "uCode did not respond OK.\n");
608 }
609
610 static void iwl_bg_beacon_update(struct work_struct *work)
611 {
612 struct iwl_priv *priv =
613 container_of(work, struct iwl_priv, beacon_update);
614 struct sk_buff *beacon;
615
616 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
617 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
618
619 if (!beacon) {
620 IWL_ERR(priv, "update beacon failed\n");
621 return;
622 }
623
624 mutex_lock(&priv->mutex);
625 /* new beacon skb is allocated every time; dispose previous.*/
626 if (priv->ibss_beacon)
627 dev_kfree_skb(priv->ibss_beacon);
628
629 priv->ibss_beacon = beacon;
630 mutex_unlock(&priv->mutex);
631
632 iwl_send_beacon_cmd(priv);
633 }
634
635 /**
636 * iwl_bg_statistics_periodic - Timer callback to queue statistics
637 *
638 * This callback is provided in order to send a statistics request.
639 *
640 * This timer function is continually reset to execute within
641 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
642 * was received. We need to ensure we receive the statistics in order
643 * to update the temperature used for calibrating the TXPOWER.
644 */
645 static void iwl_bg_statistics_periodic(unsigned long data)
646 {
647 struct iwl_priv *priv = (struct iwl_priv *)data;
648
649 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
650 return;
651
652 /* dont send host command if rf-kill is on */
653 if (!iwl_is_ready_rf(priv))
654 return;
655
656 iwl_send_statistics_request(priv, CMD_ASYNC, false);
657 }
658
659 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
660 struct iwl_rx_mem_buffer *rxb)
661 {
662 #ifdef CONFIG_IWLWIFI_DEBUG
663 struct iwl_rx_packet *pkt = rxb_addr(rxb);
664 struct iwl4965_beacon_notif *beacon =
665 (struct iwl4965_beacon_notif *)pkt->u.raw;
666 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
667
668 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
669 "tsf %d %d rate %d\n",
670 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
671 beacon->beacon_notify_hdr.failure_frame,
672 le32_to_cpu(beacon->ibss_mgr_status),
673 le32_to_cpu(beacon->high_tsf),
674 le32_to_cpu(beacon->low_tsf), rate);
675 #endif
676
677 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
678 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
679 queue_work(priv->workqueue, &priv->beacon_update);
680 }
681
682 /* Handle notification from uCode that card's power state is changing
683 * due to software, hardware, or critical temperature RFKILL */
684 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
685 struct iwl_rx_mem_buffer *rxb)
686 {
687 struct iwl_rx_packet *pkt = rxb_addr(rxb);
688 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
689 unsigned long status = priv->status;
690
691 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
692 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
693 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
694
695 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
696 RF_CARD_DISABLED)) {
697
698 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
699 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
700
701 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
702 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
703
704 if (!(flags & RXON_CARD_DISABLED)) {
705 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
706 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
707 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
708 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
709 }
710 if (flags & RF_CARD_DISABLED)
711 iwl_tt_enter_ct_kill(priv);
712 }
713 if (!(flags & RF_CARD_DISABLED))
714 iwl_tt_exit_ct_kill(priv);
715
716 if (flags & HW_CARD_DISABLED)
717 set_bit(STATUS_RF_KILL_HW, &priv->status);
718 else
719 clear_bit(STATUS_RF_KILL_HW, &priv->status);
720
721
722 if (!(flags & RXON_CARD_DISABLED))
723 iwl_scan_cancel(priv);
724
725 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
726 test_bit(STATUS_RF_KILL_HW, &priv->status)))
727 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
728 test_bit(STATUS_RF_KILL_HW, &priv->status));
729 else
730 wake_up_interruptible(&priv->wait_command_queue);
731 }
732
733 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
734 {
735 if (src == IWL_PWR_SRC_VAUX) {
736 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
737 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
738 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
739 ~APMG_PS_CTRL_MSK_PWR_SRC);
740 } else {
741 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
742 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
743 ~APMG_PS_CTRL_MSK_PWR_SRC);
744 }
745
746 return 0;
747 }
748
749 /**
750 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
751 *
752 * Setup the RX handlers for each of the reply types sent from the uCode
753 * to the host.
754 *
755 * This function chains into the hardware specific files for them to setup
756 * any hardware specific handlers as well.
757 */
758 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
759 {
760 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
761 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
762 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
763 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
764 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
765 iwl_rx_pm_debug_statistics_notif;
766 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
767
768 /*
769 * The same handler is used for both the REPLY to a discrete
770 * statistics request from the host as well as for the periodic
771 * statistics notifications (after received beacons) from the uCode.
772 */
773 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
774 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
775
776 iwl_setup_spectrum_handlers(priv);
777 iwl_setup_rx_scan_handlers(priv);
778
779 /* status change handler */
780 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
781
782 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
783 iwl_rx_missed_beacon_notif;
784 /* Rx handlers */
785 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
786 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
787 /* block ack */
788 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
789 /* Set up hardware specific Rx handlers */
790 priv->cfg->ops->lib->rx_handler_setup(priv);
791 }
792
793 /**
794 * iwl_rx_handle - Main entry function for receiving responses from uCode
795 *
796 * Uses the priv->rx_handlers callback function array to invoke
797 * the appropriate handlers, including command responses,
798 * frame-received notifications, and other notifications.
799 */
800 void iwl_rx_handle(struct iwl_priv *priv)
801 {
802 struct iwl_rx_mem_buffer *rxb;
803 struct iwl_rx_packet *pkt;
804 struct iwl_rx_queue *rxq = &priv->rxq;
805 u32 r, i;
806 int reclaim;
807 unsigned long flags;
808 u8 fill_rx = 0;
809 u32 count = 8;
810 int total_empty;
811
812 /* uCode's read index (stored in shared DRAM) indicates the last Rx
813 * buffer that the driver may process (last buffer filled by ucode). */
814 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
815 i = rxq->read;
816
817 /* Rx interrupt, but nothing sent from uCode */
818 if (i == r)
819 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
820
821 /* calculate total frames need to be restock after handling RX */
822 total_empty = r - rxq->write_actual;
823 if (total_empty < 0)
824 total_empty += RX_QUEUE_SIZE;
825
826 if (total_empty > (RX_QUEUE_SIZE / 2))
827 fill_rx = 1;
828
829 while (i != r) {
830 rxb = rxq->queue[i];
831
832 /* If an RXB doesn't have a Rx queue slot associated with it,
833 * then a bug has been introduced in the queue refilling
834 * routines -- catch it here */
835 BUG_ON(rxb == NULL);
836
837 rxq->queue[i] = NULL;
838
839 pci_unmap_page(priv->pci_dev, rxb->page_dma,
840 PAGE_SIZE << priv->hw_params.rx_page_order,
841 PCI_DMA_FROMDEVICE);
842 pkt = rxb_addr(rxb);
843
844 trace_iwlwifi_dev_rx(priv, pkt,
845 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
846
847 /* Reclaim a command buffer only if this packet is a response
848 * to a (driver-originated) command.
849 * If the packet (e.g. Rx frame) originated from uCode,
850 * there is no command buffer to reclaim.
851 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
852 * but apparently a few don't get set; catch them here. */
853 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
854 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
855 (pkt->hdr.cmd != REPLY_RX) &&
856 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
857 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
858 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
859 (pkt->hdr.cmd != REPLY_TX);
860
861 /* Based on type of command response or notification,
862 * handle those that need handling via function in
863 * rx_handlers table. See iwl_setup_rx_handlers() */
864 if (priv->rx_handlers[pkt->hdr.cmd]) {
865 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
866 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
867 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
868 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
869 } else {
870 /* No handling needed */
871 IWL_DEBUG_RX(priv,
872 "r %d i %d No handler needed for %s, 0x%02x\n",
873 r, i, get_cmd_string(pkt->hdr.cmd),
874 pkt->hdr.cmd);
875 }
876
877 /*
878 * XXX: After here, we should always check rxb->page
879 * against NULL before touching it or its virtual
880 * memory (pkt). Because some rx_handler might have
881 * already taken or freed the pages.
882 */
883
884 if (reclaim) {
885 /* Invoke any callbacks, transfer the buffer to caller,
886 * and fire off the (possibly) blocking iwl_send_cmd()
887 * as we reclaim the driver command queue */
888 if (rxb->page)
889 iwl_tx_cmd_complete(priv, rxb);
890 else
891 IWL_WARN(priv, "Claim null rxb?\n");
892 }
893
894 /* Reuse the page if possible. For notification packets and
895 * SKBs that fail to Rx correctly, add them back into the
896 * rx_free list for reuse later. */
897 spin_lock_irqsave(&rxq->lock, flags);
898 if (rxb->page != NULL) {
899 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
900 0, PAGE_SIZE << priv->hw_params.rx_page_order,
901 PCI_DMA_FROMDEVICE);
902 list_add_tail(&rxb->list, &rxq->rx_free);
903 rxq->free_count++;
904 } else
905 list_add_tail(&rxb->list, &rxq->rx_used);
906
907 spin_unlock_irqrestore(&rxq->lock, flags);
908
909 i = (i + 1) & RX_QUEUE_MASK;
910 /* If there are a lot of unused frames,
911 * restock the Rx queue so ucode wont assert. */
912 if (fill_rx) {
913 count++;
914 if (count >= 8) {
915 rxq->read = i;
916 iwl_rx_replenish_now(priv);
917 count = 0;
918 }
919 }
920 }
921
922 /* Backtrack one entry */
923 rxq->read = i;
924 if (fill_rx)
925 iwl_rx_replenish_now(priv);
926 else
927 iwl_rx_queue_restock(priv);
928 }
929
930 /* call this function to flush any scheduled tasklet */
931 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
932 {
933 /* wait to make sure we flush pending tasklet*/
934 synchronize_irq(priv->pci_dev->irq);
935 tasklet_kill(&priv->irq_tasklet);
936 }
937
938 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
939 {
940 u32 inta, handled = 0;
941 u32 inta_fh;
942 unsigned long flags;
943 u32 i;
944 #ifdef CONFIG_IWLWIFI_DEBUG
945 u32 inta_mask;
946 #endif
947
948 spin_lock_irqsave(&priv->lock, flags);
949
950 /* Ack/clear/reset pending uCode interrupts.
951 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
952 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
953 inta = iwl_read32(priv, CSR_INT);
954 iwl_write32(priv, CSR_INT, inta);
955
956 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
957 * Any new interrupts that happen after this, either while we're
958 * in this tasklet, or later, will show up in next ISR/tasklet. */
959 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
960 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
961
962 #ifdef CONFIG_IWLWIFI_DEBUG
963 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
964 /* just for debug */
965 inta_mask = iwl_read32(priv, CSR_INT_MASK);
966 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
967 inta, inta_mask, inta_fh);
968 }
969 #endif
970
971 spin_unlock_irqrestore(&priv->lock, flags);
972
973 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
974 * atomic, make sure that inta covers all the interrupts that
975 * we've discovered, even if FH interrupt came in just after
976 * reading CSR_INT. */
977 if (inta_fh & CSR49_FH_INT_RX_MASK)
978 inta |= CSR_INT_BIT_FH_RX;
979 if (inta_fh & CSR49_FH_INT_TX_MASK)
980 inta |= CSR_INT_BIT_FH_TX;
981
982 /* Now service all interrupt bits discovered above. */
983 if (inta & CSR_INT_BIT_HW_ERR) {
984 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
985
986 /* Tell the device to stop sending interrupts */
987 iwl_disable_interrupts(priv);
988
989 priv->isr_stats.hw++;
990 iwl_irq_handle_error(priv);
991
992 handled |= CSR_INT_BIT_HW_ERR;
993
994 return;
995 }
996
997 #ifdef CONFIG_IWLWIFI_DEBUG
998 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
999 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1000 if (inta & CSR_INT_BIT_SCD) {
1001 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1002 "the frame/frames.\n");
1003 priv->isr_stats.sch++;
1004 }
1005
1006 /* Alive notification via Rx interrupt will do the real work */
1007 if (inta & CSR_INT_BIT_ALIVE) {
1008 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1009 priv->isr_stats.alive++;
1010 }
1011 }
1012 #endif
1013 /* Safely ignore these bits for debug checks below */
1014 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1015
1016 /* HW RF KILL switch toggled */
1017 if (inta & CSR_INT_BIT_RF_KILL) {
1018 int hw_rf_kill = 0;
1019 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1020 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1021 hw_rf_kill = 1;
1022
1023 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1024 hw_rf_kill ? "disable radio" : "enable radio");
1025
1026 priv->isr_stats.rfkill++;
1027
1028 /* driver only loads ucode once setting the interface up.
1029 * the driver allows loading the ucode even if the radio
1030 * is killed. Hence update the killswitch state here. The
1031 * rfkill handler will care about restarting if needed.
1032 */
1033 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1034 if (hw_rf_kill)
1035 set_bit(STATUS_RF_KILL_HW, &priv->status);
1036 else
1037 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1038 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1039 }
1040
1041 handled |= CSR_INT_BIT_RF_KILL;
1042 }
1043
1044 /* Chip got too hot and stopped itself */
1045 if (inta & CSR_INT_BIT_CT_KILL) {
1046 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1047 priv->isr_stats.ctkill++;
1048 handled |= CSR_INT_BIT_CT_KILL;
1049 }
1050
1051 /* Error detected by uCode */
1052 if (inta & CSR_INT_BIT_SW_ERR) {
1053 IWL_ERR(priv, "Microcode SW error detected. "
1054 " Restarting 0x%X.\n", inta);
1055 priv->isr_stats.sw++;
1056 priv->isr_stats.sw_err = inta;
1057 iwl_irq_handle_error(priv);
1058 handled |= CSR_INT_BIT_SW_ERR;
1059 }
1060
1061 /*
1062 * uCode wakes up after power-down sleep.
1063 * Tell device about any new tx or host commands enqueued,
1064 * and about any Rx buffers made available while asleep.
1065 */
1066 if (inta & CSR_INT_BIT_WAKEUP) {
1067 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1068 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1069 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1070 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1071 priv->isr_stats.wakeup++;
1072 handled |= CSR_INT_BIT_WAKEUP;
1073 }
1074
1075 /* All uCode command responses, including Tx command responses,
1076 * Rx "responses" (frame-received notification), and other
1077 * notifications from uCode come through here*/
1078 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1079 iwl_rx_handle(priv);
1080 priv->isr_stats.rx++;
1081 iwl_leds_background(priv);
1082 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1083 }
1084
1085 /* This "Tx" DMA channel is used only for loading uCode */
1086 if (inta & CSR_INT_BIT_FH_TX) {
1087 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1088 priv->isr_stats.tx++;
1089 handled |= CSR_INT_BIT_FH_TX;
1090 /* Wake up uCode load routine, now that load is complete */
1091 priv->ucode_write_complete = 1;
1092 wake_up_interruptible(&priv->wait_command_queue);
1093 }
1094
1095 if (inta & ~handled) {
1096 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1097 priv->isr_stats.unhandled++;
1098 }
1099
1100 if (inta & ~(priv->inta_mask)) {
1101 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1102 inta & ~priv->inta_mask);
1103 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1104 }
1105
1106 /* Re-enable all interrupts */
1107 /* only Re-enable if diabled by irq */
1108 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1109 iwl_enable_interrupts(priv);
1110
1111 #ifdef CONFIG_IWLWIFI_DEBUG
1112 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1113 inta = iwl_read32(priv, CSR_INT);
1114 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1115 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1116 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1117 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1118 }
1119 #endif
1120 }
1121
1122 /* tasklet for iwlagn interrupt */
1123 static void iwl_irq_tasklet(struct iwl_priv *priv)
1124 {
1125 u32 inta = 0;
1126 u32 handled = 0;
1127 unsigned long flags;
1128 u32 i;
1129 #ifdef CONFIG_IWLWIFI_DEBUG
1130 u32 inta_mask;
1131 #endif
1132
1133 spin_lock_irqsave(&priv->lock, flags);
1134
1135 /* Ack/clear/reset pending uCode interrupts.
1136 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1137 */
1138 iwl_write32(priv, CSR_INT, priv->inta);
1139
1140 inta = priv->inta;
1141
1142 #ifdef CONFIG_IWLWIFI_DEBUG
1143 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1144 /* just for debug */
1145 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1146 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1147 inta, inta_mask);
1148 }
1149 #endif
1150
1151 spin_unlock_irqrestore(&priv->lock, flags);
1152
1153 /* saved interrupt in inta variable now we can reset priv->inta */
1154 priv->inta = 0;
1155
1156 /* Now service all interrupt bits discovered above. */
1157 if (inta & CSR_INT_BIT_HW_ERR) {
1158 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1159
1160 /* Tell the device to stop sending interrupts */
1161 iwl_disable_interrupts(priv);
1162
1163 priv->isr_stats.hw++;
1164 iwl_irq_handle_error(priv);
1165
1166 handled |= CSR_INT_BIT_HW_ERR;
1167
1168 return;
1169 }
1170
1171 #ifdef CONFIG_IWLWIFI_DEBUG
1172 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1173 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1174 if (inta & CSR_INT_BIT_SCD) {
1175 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1176 "the frame/frames.\n");
1177 priv->isr_stats.sch++;
1178 }
1179
1180 /* Alive notification via Rx interrupt will do the real work */
1181 if (inta & CSR_INT_BIT_ALIVE) {
1182 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1183 priv->isr_stats.alive++;
1184 }
1185 }
1186 #endif
1187 /* Safely ignore these bits for debug checks below */
1188 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1189
1190 /* HW RF KILL switch toggled */
1191 if (inta & CSR_INT_BIT_RF_KILL) {
1192 int hw_rf_kill = 0;
1193 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1194 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1195 hw_rf_kill = 1;
1196
1197 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1198 hw_rf_kill ? "disable radio" : "enable radio");
1199
1200 priv->isr_stats.rfkill++;
1201
1202 /* driver only loads ucode once setting the interface up.
1203 * the driver allows loading the ucode even if the radio
1204 * is killed. Hence update the killswitch state here. The
1205 * rfkill handler will care about restarting if needed.
1206 */
1207 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1208 if (hw_rf_kill)
1209 set_bit(STATUS_RF_KILL_HW, &priv->status);
1210 else
1211 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1212 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1213 }
1214
1215 handled |= CSR_INT_BIT_RF_KILL;
1216 }
1217
1218 /* Chip got too hot and stopped itself */
1219 if (inta & CSR_INT_BIT_CT_KILL) {
1220 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1221 priv->isr_stats.ctkill++;
1222 handled |= CSR_INT_BIT_CT_KILL;
1223 }
1224
1225 /* Error detected by uCode */
1226 if (inta & CSR_INT_BIT_SW_ERR) {
1227 IWL_ERR(priv, "Microcode SW error detected. "
1228 " Restarting 0x%X.\n", inta);
1229 priv->isr_stats.sw++;
1230 priv->isr_stats.sw_err = inta;
1231 iwl_irq_handle_error(priv);
1232 handled |= CSR_INT_BIT_SW_ERR;
1233 }
1234
1235 /* uCode wakes up after power-down sleep */
1236 if (inta & CSR_INT_BIT_WAKEUP) {
1237 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1238 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1239 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1240 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1241
1242 priv->isr_stats.wakeup++;
1243
1244 handled |= CSR_INT_BIT_WAKEUP;
1245 }
1246
1247 /* All uCode command responses, including Tx command responses,
1248 * Rx "responses" (frame-received notification), and other
1249 * notifications from uCode come through here*/
1250 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1251 CSR_INT_BIT_RX_PERIODIC)) {
1252 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1253 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1254 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1255 iwl_write32(priv, CSR_FH_INT_STATUS,
1256 CSR49_FH_INT_RX_MASK);
1257 }
1258 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1259 handled |= CSR_INT_BIT_RX_PERIODIC;
1260 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1261 }
1262 /* Sending RX interrupt require many steps to be done in the
1263 * the device:
1264 * 1- write interrupt to current index in ICT table.
1265 * 2- dma RX frame.
1266 * 3- update RX shared data to indicate last write index.
1267 * 4- send interrupt.
1268 * This could lead to RX race, driver could receive RX interrupt
1269 * but the shared data changes does not reflect this.
1270 * this could lead to RX race, RX periodic will solve this race
1271 */
1272 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1273 CSR_INT_PERIODIC_DIS);
1274 iwl_rx_handle(priv);
1275 /* Only set RX periodic if real RX is received. */
1276 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1277 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1278 CSR_INT_PERIODIC_ENA);
1279
1280 priv->isr_stats.rx++;
1281 iwl_leds_background(priv);
1282 }
1283
1284 /* This "Tx" DMA channel is used only for loading uCode */
1285 if (inta & CSR_INT_BIT_FH_TX) {
1286 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1287 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1288 priv->isr_stats.tx++;
1289 handled |= CSR_INT_BIT_FH_TX;
1290 /* Wake up uCode load routine, now that load is complete */
1291 priv->ucode_write_complete = 1;
1292 wake_up_interruptible(&priv->wait_command_queue);
1293 }
1294
1295 if (inta & ~handled) {
1296 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1297 priv->isr_stats.unhandled++;
1298 }
1299
1300 if (inta & ~(priv->inta_mask)) {
1301 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1302 inta & ~priv->inta_mask);
1303 }
1304
1305 /* Re-enable all interrupts */
1306 /* only Re-enable if diabled by irq */
1307 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1308 iwl_enable_interrupts(priv);
1309 }
1310
1311
1312 /******************************************************************************
1313 *
1314 * uCode download functions
1315 *
1316 ******************************************************************************/
1317
1318 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1319 {
1320 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1321 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1322 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1323 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1324 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1325 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1326 }
1327
1328 static void iwl_nic_start(struct iwl_priv *priv)
1329 {
1330 /* Remove all resets to allow NIC to operate */
1331 iwl_write32(priv, CSR_RESET, 0);
1332 }
1333
1334
1335 /**
1336 * iwl_read_ucode - Read uCode images from disk file.
1337 *
1338 * Copy into buffers for card to fetch via bus-mastering
1339 */
1340 static int iwl_read_ucode(struct iwl_priv *priv)
1341 {
1342 struct iwl_ucode_header *ucode;
1343 int ret = -EINVAL, index;
1344 const struct firmware *ucode_raw;
1345 const char *name_pre = priv->cfg->fw_name_pre;
1346 const unsigned int api_max = priv->cfg->ucode_api_max;
1347 const unsigned int api_min = priv->cfg->ucode_api_min;
1348 char buf[25];
1349 u8 *src;
1350 size_t len;
1351 u32 api_ver, build;
1352 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1353 u16 eeprom_ver;
1354
1355 /* Ask kernel firmware_class module to get the boot firmware off disk.
1356 * request_firmware() is synchronous, file is in memory on return. */
1357 for (index = api_max; index >= api_min; index--) {
1358 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1359 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1360 if (ret < 0) {
1361 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1362 buf, ret);
1363 if (ret == -ENOENT)
1364 continue;
1365 else
1366 goto error;
1367 } else {
1368 if (index < api_max)
1369 IWL_ERR(priv, "Loaded firmware %s, "
1370 "which is deprecated. "
1371 "Please use API v%u instead.\n",
1372 buf, api_max);
1373
1374 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1375 buf, ucode_raw->size);
1376 break;
1377 }
1378 }
1379
1380 if (ret < 0)
1381 goto error;
1382
1383 /* Make sure that we got at least the v1 header! */
1384 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1385 IWL_ERR(priv, "File size way too small!\n");
1386 ret = -EINVAL;
1387 goto err_release;
1388 }
1389
1390 /* Data from ucode file: header followed by uCode images */
1391 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1392
1393 priv->ucode_ver = le32_to_cpu(ucode->ver);
1394 api_ver = IWL_UCODE_API(priv->ucode_ver);
1395 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1396 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1397 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1398 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1399 init_data_size =
1400 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1401 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1402 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1403
1404 /* api_ver should match the api version forming part of the
1405 * firmware filename ... but we don't check for that and only rely
1406 * on the API version read from firmware header from here on forward */
1407
1408 if (api_ver < api_min || api_ver > api_max) {
1409 IWL_ERR(priv, "Driver unable to support your firmware API. "
1410 "Driver supports v%u, firmware is v%u.\n",
1411 api_max, api_ver);
1412 priv->ucode_ver = 0;
1413 ret = -EINVAL;
1414 goto err_release;
1415 }
1416 if (api_ver != api_max)
1417 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1418 "got v%u. New firmware can be obtained "
1419 "from http://www.intellinuxwireless.org.\n",
1420 api_max, api_ver);
1421
1422 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1423 IWL_UCODE_MAJOR(priv->ucode_ver),
1424 IWL_UCODE_MINOR(priv->ucode_ver),
1425 IWL_UCODE_API(priv->ucode_ver),
1426 IWL_UCODE_SERIAL(priv->ucode_ver));
1427
1428 snprintf(priv->hw->wiphy->fw_version,
1429 sizeof(priv->hw->wiphy->fw_version),
1430 "%u.%u.%u.%u",
1431 IWL_UCODE_MAJOR(priv->ucode_ver),
1432 IWL_UCODE_MINOR(priv->ucode_ver),
1433 IWL_UCODE_API(priv->ucode_ver),
1434 IWL_UCODE_SERIAL(priv->ucode_ver));
1435
1436 if (build)
1437 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1438
1439 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1440 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1441 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1442 ? "OTP" : "EEPROM", eeprom_ver);
1443
1444 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1445 priv->ucode_ver);
1446 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1447 inst_size);
1448 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1449 data_size);
1450 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1451 init_size);
1452 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1453 init_data_size);
1454 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1455 boot_size);
1456
1457 /* Verify size of file vs. image size info in file's header */
1458 if (ucode_raw->size !=
1459 priv->cfg->ops->ucode->get_header_size(api_ver) +
1460 inst_size + data_size + init_size +
1461 init_data_size + boot_size) {
1462
1463 IWL_DEBUG_INFO(priv,
1464 "uCode file size %d does not match expected size\n",
1465 (int)ucode_raw->size);
1466 ret = -EINVAL;
1467 goto err_release;
1468 }
1469
1470 /* Verify that uCode images will fit in card's SRAM */
1471 if (inst_size > priv->hw_params.max_inst_size) {
1472 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1473 inst_size);
1474 ret = -EINVAL;
1475 goto err_release;
1476 }
1477
1478 if (data_size > priv->hw_params.max_data_size) {
1479 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1480 data_size);
1481 ret = -EINVAL;
1482 goto err_release;
1483 }
1484 if (init_size > priv->hw_params.max_inst_size) {
1485 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1486 init_size);
1487 ret = -EINVAL;
1488 goto err_release;
1489 }
1490 if (init_data_size > priv->hw_params.max_data_size) {
1491 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1492 init_data_size);
1493 ret = -EINVAL;
1494 goto err_release;
1495 }
1496 if (boot_size > priv->hw_params.max_bsm_size) {
1497 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1498 boot_size);
1499 ret = -EINVAL;
1500 goto err_release;
1501 }
1502
1503 /* Allocate ucode buffers for card's bus-master loading ... */
1504
1505 /* Runtime instructions and 2 copies of data:
1506 * 1) unmodified from disk
1507 * 2) backup cache for save/restore during power-downs */
1508 priv->ucode_code.len = inst_size;
1509 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1510
1511 priv->ucode_data.len = data_size;
1512 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1513
1514 priv->ucode_data_backup.len = data_size;
1515 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1516
1517 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1518 !priv->ucode_data_backup.v_addr)
1519 goto err_pci_alloc;
1520
1521 /* Initialization instructions and data */
1522 if (init_size && init_data_size) {
1523 priv->ucode_init.len = init_size;
1524 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1525
1526 priv->ucode_init_data.len = init_data_size;
1527 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1528
1529 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1530 goto err_pci_alloc;
1531 }
1532
1533 /* Bootstrap (instructions only, no data) */
1534 if (boot_size) {
1535 priv->ucode_boot.len = boot_size;
1536 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1537
1538 if (!priv->ucode_boot.v_addr)
1539 goto err_pci_alloc;
1540 }
1541
1542 /* Copy images into buffers for card's bus-master reads ... */
1543
1544 /* Runtime instructions (first block of data in file) */
1545 len = inst_size;
1546 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1547 memcpy(priv->ucode_code.v_addr, src, len);
1548 src += len;
1549
1550 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1551 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1552
1553 /* Runtime data (2nd block)
1554 * NOTE: Copy into backup buffer will be done in iwl_up() */
1555 len = data_size;
1556 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1557 memcpy(priv->ucode_data.v_addr, src, len);
1558 memcpy(priv->ucode_data_backup.v_addr, src, len);
1559 src += len;
1560
1561 /* Initialization instructions (3rd block) */
1562 if (init_size) {
1563 len = init_size;
1564 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1565 len);
1566 memcpy(priv->ucode_init.v_addr, src, len);
1567 src += len;
1568 }
1569
1570 /* Initialization data (4th block) */
1571 if (init_data_size) {
1572 len = init_data_size;
1573 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1574 len);
1575 memcpy(priv->ucode_init_data.v_addr, src, len);
1576 src += len;
1577 }
1578
1579 /* Bootstrap instructions (5th block) */
1580 len = boot_size;
1581 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1582 memcpy(priv->ucode_boot.v_addr, src, len);
1583
1584 /* We have our copies now, allow OS release its copies */
1585 release_firmware(ucode_raw);
1586 return 0;
1587
1588 err_pci_alloc:
1589 IWL_ERR(priv, "failed to allocate pci memory\n");
1590 ret = -ENOMEM;
1591 iwl_dealloc_ucode_pci(priv);
1592
1593 err_release:
1594 release_firmware(ucode_raw);
1595
1596 error:
1597 return ret;
1598 }
1599
1600 #ifdef CONFIG_IWLWIFI_DEBUG
1601 static const char *desc_lookup_text[] = {
1602 "OK",
1603 "FAIL",
1604 "BAD_PARAM",
1605 "BAD_CHECKSUM",
1606 "NMI_INTERRUPT_WDG",
1607 "SYSASSERT",
1608 "FATAL_ERROR",
1609 "BAD_COMMAND",
1610 "HW_ERROR_TUNE_LOCK",
1611 "HW_ERROR_TEMPERATURE",
1612 "ILLEGAL_CHAN_FREQ",
1613 "VCC_NOT_STABLE",
1614 "FH_ERROR",
1615 "NMI_INTERRUPT_HOST",
1616 "NMI_INTERRUPT_ACTION_PT",
1617 "NMI_INTERRUPT_UNKNOWN",
1618 "UCODE_VERSION_MISMATCH",
1619 "HW_ERROR_ABS_LOCK",
1620 "HW_ERROR_CAL_LOCK_FAIL",
1621 "NMI_INTERRUPT_INST_ACTION_PT",
1622 "NMI_INTERRUPT_DATA_ACTION_PT",
1623 "NMI_TRM_HW_ER",
1624 "NMI_INTERRUPT_TRM",
1625 "NMI_INTERRUPT_BREAK_POINT"
1626 "DEBUG_0",
1627 "DEBUG_1",
1628 "DEBUG_2",
1629 "DEBUG_3",
1630 "UNKNOWN"
1631 };
1632
1633 static const char *desc_lookup(int i)
1634 {
1635 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1636
1637 if (i < 0 || i > max)
1638 i = max;
1639
1640 return desc_lookup_text[i];
1641 }
1642
1643 #define ERROR_START_OFFSET (1 * sizeof(u32))
1644 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1645
1646 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1647 {
1648 u32 data2, line;
1649 u32 desc, time, count, base, data1;
1650 u32 blink1, blink2, ilink1, ilink2;
1651
1652 if (priv->ucode_type == UCODE_INIT)
1653 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1654 else
1655 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1656
1657 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1658 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1659 return;
1660 }
1661
1662 count = iwl_read_targ_mem(priv, base);
1663
1664 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1665 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1666 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1667 priv->status, count);
1668 }
1669
1670 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1671 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1672 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1673 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1674 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1675 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1676 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1677 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1678 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1679
1680 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1681 blink1, blink2, ilink1, ilink2);
1682
1683 IWL_ERR(priv, "Desc Time "
1684 "data1 data2 line\n");
1685 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1686 desc_lookup(desc), desc, time, data1, data2, line);
1687 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1688 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1689 ilink1, ilink2);
1690
1691 }
1692
1693 #define EVENT_START_OFFSET (4 * sizeof(u32))
1694
1695 /**
1696 * iwl_print_event_log - Dump error event log to syslog
1697 *
1698 */
1699 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1700 u32 num_events, u32 mode)
1701 {
1702 u32 i;
1703 u32 base; /* SRAM byte address of event log header */
1704 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1705 u32 ptr; /* SRAM byte address of log data */
1706 u32 ev, time, data; /* event log data */
1707 unsigned long reg_flags;
1708
1709 if (num_events == 0)
1710 return;
1711 if (priv->ucode_type == UCODE_INIT)
1712 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1713 else
1714 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1715
1716 if (mode == 0)
1717 event_size = 2 * sizeof(u32);
1718 else
1719 event_size = 3 * sizeof(u32);
1720
1721 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1722
1723 /* Make sure device is powered up for SRAM reads */
1724 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1725 iwl_grab_nic_access(priv);
1726
1727 /* Set starting address; reads will auto-increment */
1728 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1729 rmb();
1730
1731 /* "time" is actually "data" for mode 0 (no timestamp).
1732 * place event id # at far right for easier visual parsing. */
1733 for (i = 0; i < num_events; i++) {
1734 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1735 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1736 if (mode == 0) {
1737 /* data, ev */
1738 trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1739 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1740 } else {
1741 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1742 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1743 time, data, ev);
1744 trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1745 }
1746 }
1747
1748 /* Allow device to power down */
1749 iwl_release_nic_access(priv);
1750 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1751 }
1752
1753 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1754 #define MAX_EVENT_LOG_SIZE (512)
1755
1756 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1757 {
1758 u32 base; /* SRAM byte address of event log header */
1759 u32 capacity; /* event log capacity in # entries */
1760 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1761 u32 num_wraps; /* # times uCode wrapped to top of log */
1762 u32 next_entry; /* index of next entry to be written by uCode */
1763 u32 size; /* # entries that we'll print */
1764
1765 if (priv->ucode_type == UCODE_INIT)
1766 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1767 else
1768 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1769
1770 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1771 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1772 return;
1773 }
1774
1775 /* event log header */
1776 capacity = iwl_read_targ_mem(priv, base);
1777 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1778 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1779 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1780
1781 if (capacity > MAX_EVENT_LOG_SIZE) {
1782 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1783 capacity, MAX_EVENT_LOG_SIZE);
1784 capacity = MAX_EVENT_LOG_SIZE;
1785 }
1786
1787 if (next_entry > MAX_EVENT_LOG_SIZE) {
1788 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1789 next_entry, MAX_EVENT_LOG_SIZE);
1790 next_entry = MAX_EVENT_LOG_SIZE;
1791 }
1792
1793 size = num_wraps ? capacity : next_entry;
1794
1795 /* bail out if nothing in log */
1796 if (size == 0) {
1797 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1798 return;
1799 }
1800
1801 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1802 size, num_wraps);
1803
1804 /* if uCode has wrapped back to top of log, start at the oldest entry,
1805 * i.e the next one that uCode would fill. */
1806 if (num_wraps)
1807 iwl_print_event_log(priv, next_entry,
1808 capacity - next_entry, mode);
1809 /* (then/else) start at top of log */
1810 iwl_print_event_log(priv, 0, next_entry, mode);
1811
1812 }
1813 #endif
1814
1815 /**
1816 * iwl_alive_start - called after REPLY_ALIVE notification received
1817 * from protocol/runtime uCode (initialization uCode's
1818 * Alive gets handled by iwl_init_alive_start()).
1819 */
1820 static void iwl_alive_start(struct iwl_priv *priv)
1821 {
1822 int ret = 0;
1823
1824 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1825
1826 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1827 /* We had an error bringing up the hardware, so take it
1828 * all the way back down so we can try again */
1829 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1830 goto restart;
1831 }
1832
1833 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1834 * This is a paranoid check, because we would not have gotten the
1835 * "runtime" alive if code weren't properly loaded. */
1836 if (iwl_verify_ucode(priv)) {
1837 /* Runtime instruction load was bad;
1838 * take it all the way back down so we can try again */
1839 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1840 goto restart;
1841 }
1842
1843 iwl_clear_stations_table(priv);
1844 ret = priv->cfg->ops->lib->alive_notify(priv);
1845 if (ret) {
1846 IWL_WARN(priv,
1847 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1848 goto restart;
1849 }
1850
1851 /* After the ALIVE response, we can send host commands to the uCode */
1852 set_bit(STATUS_ALIVE, &priv->status);
1853
1854 if (iwl_is_rfkill(priv))
1855 return;
1856
1857 ieee80211_wake_queues(priv->hw);
1858
1859 priv->active_rate = priv->rates_mask;
1860 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1861
1862 /* Configure Tx antenna selection based on H/W config */
1863 if (priv->cfg->ops->hcmd->set_tx_ant)
1864 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1865
1866 if (iwl_is_associated(priv)) {
1867 struct iwl_rxon_cmd *active_rxon =
1868 (struct iwl_rxon_cmd *)&priv->active_rxon;
1869 /* apply any changes in staging */
1870 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1871 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1872 } else {
1873 /* Initialize our rx_config data */
1874 iwl_connection_init_rx_config(priv, priv->iw_mode);
1875
1876 if (priv->cfg->ops->hcmd->set_rxon_chain)
1877 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1878
1879 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1880 }
1881
1882 /* Configure Bluetooth device coexistence support */
1883 iwl_send_bt_config(priv);
1884
1885 iwl_reset_run_time_calib(priv);
1886
1887 /* Configure the adapter for unassociated operation */
1888 iwlcore_commit_rxon(priv);
1889
1890 /* At this point, the NIC is initialized and operational */
1891 iwl_rf_kill_ct_config(priv);
1892
1893 iwl_leds_init(priv);
1894
1895 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1896 set_bit(STATUS_READY, &priv->status);
1897 wake_up_interruptible(&priv->wait_command_queue);
1898
1899 iwl_power_update_mode(priv, true);
1900
1901 /* reassociate for ADHOC mode */
1902 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1903 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1904 priv->vif);
1905 if (beacon)
1906 iwl_mac_beacon_update(priv->hw, beacon);
1907 }
1908
1909
1910 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1911 iwl_set_mode(priv, priv->iw_mode);
1912
1913 return;
1914
1915 restart:
1916 queue_work(priv->workqueue, &priv->restart);
1917 }
1918
1919 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1920
1921 static void __iwl_down(struct iwl_priv *priv)
1922 {
1923 unsigned long flags;
1924 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1925
1926 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1927
1928 if (!exit_pending)
1929 set_bit(STATUS_EXIT_PENDING, &priv->status);
1930
1931 iwl_clear_stations_table(priv);
1932
1933 /* Unblock any waiting calls */
1934 wake_up_interruptible_all(&priv->wait_command_queue);
1935
1936 /* Wipe out the EXIT_PENDING status bit if we are not actually
1937 * exiting the module */
1938 if (!exit_pending)
1939 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1940
1941 /* stop and reset the on-board processor */
1942 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1943
1944 /* tell the device to stop sending interrupts */
1945 spin_lock_irqsave(&priv->lock, flags);
1946 iwl_disable_interrupts(priv);
1947 spin_unlock_irqrestore(&priv->lock, flags);
1948 iwl_synchronize_irq(priv);
1949
1950 if (priv->mac80211_registered)
1951 ieee80211_stop_queues(priv->hw);
1952
1953 /* If we have not previously called iwl_init() then
1954 * clear all bits but the RF Kill bit and return */
1955 if (!iwl_is_init(priv)) {
1956 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1957 STATUS_RF_KILL_HW |
1958 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1959 STATUS_GEO_CONFIGURED |
1960 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1961 STATUS_EXIT_PENDING;
1962 goto exit;
1963 }
1964
1965 /* ...otherwise clear out all the status bits but the RF Kill
1966 * bit and continue taking the NIC down. */
1967 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1968 STATUS_RF_KILL_HW |
1969 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1970 STATUS_GEO_CONFIGURED |
1971 test_bit(STATUS_FW_ERROR, &priv->status) <<
1972 STATUS_FW_ERROR |
1973 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1974 STATUS_EXIT_PENDING;
1975
1976 /* device going down, Stop using ICT table */
1977 iwl_disable_ict(priv);
1978
1979 iwl_txq_ctx_stop(priv);
1980 iwl_rxq_stop(priv);
1981
1982 /* Power-down device's busmaster DMA clocks */
1983 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
1984 udelay(5);
1985
1986 /* Make sure (redundant) we've released our request to stay awake */
1987 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1988
1989 /* Stop the device, and put it in low power state */
1990 priv->cfg->ops->lib->apm_ops.stop(priv);
1991
1992 exit:
1993 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1994
1995 if (priv->ibss_beacon)
1996 dev_kfree_skb(priv->ibss_beacon);
1997 priv->ibss_beacon = NULL;
1998
1999 /* clear out any free frames */
2000 iwl_clear_free_frames(priv);
2001 }
2002
2003 static void iwl_down(struct iwl_priv *priv)
2004 {
2005 mutex_lock(&priv->mutex);
2006 __iwl_down(priv);
2007 mutex_unlock(&priv->mutex);
2008
2009 iwl_cancel_deferred_work(priv);
2010 }
2011
2012 #define HW_READY_TIMEOUT (50)
2013
2014 static int iwl_set_hw_ready(struct iwl_priv *priv)
2015 {
2016 int ret = 0;
2017
2018 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2019 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2020
2021 /* See if we got it */
2022 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2023 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2024 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2025 HW_READY_TIMEOUT);
2026 if (ret != -ETIMEDOUT)
2027 priv->hw_ready = true;
2028 else
2029 priv->hw_ready = false;
2030
2031 IWL_DEBUG_INFO(priv, "hardware %s\n",
2032 (priv->hw_ready == 1) ? "ready" : "not ready");
2033 return ret;
2034 }
2035
2036 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2037 {
2038 int ret = 0;
2039
2040 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2041
2042 ret = iwl_set_hw_ready(priv);
2043 if (priv->hw_ready)
2044 return ret;
2045
2046 /* If HW is not ready, prepare the conditions to check again */
2047 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2048 CSR_HW_IF_CONFIG_REG_PREPARE);
2049
2050 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2051 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2052 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2053
2054 /* HW should be ready by now, check again. */
2055 if (ret != -ETIMEDOUT)
2056 iwl_set_hw_ready(priv);
2057
2058 return ret;
2059 }
2060
2061 #define MAX_HW_RESTARTS 5
2062
2063 static int __iwl_up(struct iwl_priv *priv)
2064 {
2065 int i;
2066 int ret;
2067
2068 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2069 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2070 return -EIO;
2071 }
2072
2073 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2074 IWL_ERR(priv, "ucode not available for device bringup\n");
2075 return -EIO;
2076 }
2077
2078 iwl_prepare_card_hw(priv);
2079
2080 if (!priv->hw_ready) {
2081 IWL_WARN(priv, "Exit HW not ready\n");
2082 return -EIO;
2083 }
2084
2085 /* If platform's RF_KILL switch is NOT set to KILL */
2086 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2087 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2088 else
2089 set_bit(STATUS_RF_KILL_HW, &priv->status);
2090
2091 if (iwl_is_rfkill(priv)) {
2092 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2093
2094 iwl_enable_interrupts(priv);
2095 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2096 return 0;
2097 }
2098
2099 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2100
2101 ret = iwl_hw_nic_init(priv);
2102 if (ret) {
2103 IWL_ERR(priv, "Unable to init nic\n");
2104 return ret;
2105 }
2106
2107 /* make sure rfkill handshake bits are cleared */
2108 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2109 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2110 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2111
2112 /* clear (again), then enable host interrupts */
2113 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2114 iwl_enable_interrupts(priv);
2115
2116 /* really make sure rfkill handshake bits are cleared */
2117 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2118 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2119
2120 /* Copy original ucode data image from disk into backup cache.
2121 * This will be used to initialize the on-board processor's
2122 * data SRAM for a clean start when the runtime program first loads. */
2123 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2124 priv->ucode_data.len);
2125
2126 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2127
2128 iwl_clear_stations_table(priv);
2129
2130 /* load bootstrap state machine,
2131 * load bootstrap program into processor's memory,
2132 * prepare to load the "initialize" uCode */
2133 ret = priv->cfg->ops->lib->load_ucode(priv);
2134
2135 if (ret) {
2136 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2137 ret);
2138 continue;
2139 }
2140
2141 /* start card; "initialize" will load runtime ucode */
2142 iwl_nic_start(priv);
2143
2144 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2145
2146 return 0;
2147 }
2148
2149 set_bit(STATUS_EXIT_PENDING, &priv->status);
2150 __iwl_down(priv);
2151 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2152
2153 /* tried to restart and config the device for as long as our
2154 * patience could withstand */
2155 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2156 return -EIO;
2157 }
2158
2159
2160 /*****************************************************************************
2161 *
2162 * Workqueue callbacks
2163 *
2164 *****************************************************************************/
2165
2166 static void iwl_bg_init_alive_start(struct work_struct *data)
2167 {
2168 struct iwl_priv *priv =
2169 container_of(data, struct iwl_priv, init_alive_start.work);
2170
2171 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2172 return;
2173
2174 mutex_lock(&priv->mutex);
2175 priv->cfg->ops->lib->init_alive_start(priv);
2176 mutex_unlock(&priv->mutex);
2177 }
2178
2179 static void iwl_bg_alive_start(struct work_struct *data)
2180 {
2181 struct iwl_priv *priv =
2182 container_of(data, struct iwl_priv, alive_start.work);
2183
2184 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2185 return;
2186
2187 /* enable dram interrupt */
2188 iwl_reset_ict(priv);
2189
2190 mutex_lock(&priv->mutex);
2191 iwl_alive_start(priv);
2192 mutex_unlock(&priv->mutex);
2193 }
2194
2195 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2196 {
2197 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2198 run_time_calib_work);
2199
2200 mutex_lock(&priv->mutex);
2201
2202 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2203 test_bit(STATUS_SCANNING, &priv->status)) {
2204 mutex_unlock(&priv->mutex);
2205 return;
2206 }
2207
2208 if (priv->start_calib) {
2209 iwl_chain_noise_calibration(priv, &priv->statistics);
2210
2211 iwl_sensitivity_calibration(priv, &priv->statistics);
2212 }
2213
2214 mutex_unlock(&priv->mutex);
2215 return;
2216 }
2217
2218 static void iwl_bg_up(struct work_struct *data)
2219 {
2220 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2221
2222 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2223 return;
2224
2225 mutex_lock(&priv->mutex);
2226 __iwl_up(priv);
2227 mutex_unlock(&priv->mutex);
2228 }
2229
2230 static void iwl_bg_restart(struct work_struct *data)
2231 {
2232 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2233
2234 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2235 return;
2236
2237 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2238 mutex_lock(&priv->mutex);
2239 priv->vif = NULL;
2240 priv->is_open = 0;
2241 mutex_unlock(&priv->mutex);
2242 iwl_down(priv);
2243 ieee80211_restart_hw(priv->hw);
2244 } else {
2245 iwl_down(priv);
2246 queue_work(priv->workqueue, &priv->up);
2247 }
2248 }
2249
2250 static void iwl_bg_rx_replenish(struct work_struct *data)
2251 {
2252 struct iwl_priv *priv =
2253 container_of(data, struct iwl_priv, rx_replenish);
2254
2255 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2256 return;
2257
2258 mutex_lock(&priv->mutex);
2259 iwl_rx_replenish(priv);
2260 mutex_unlock(&priv->mutex);
2261 }
2262
2263 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2264
2265 void iwl_post_associate(struct iwl_priv *priv)
2266 {
2267 struct ieee80211_conf *conf = NULL;
2268 int ret = 0;
2269 unsigned long flags;
2270
2271 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2272 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2273 return;
2274 }
2275
2276 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2277 priv->assoc_id, priv->active_rxon.bssid_addr);
2278
2279
2280 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2281 return;
2282
2283
2284 if (!priv->vif || !priv->is_open)
2285 return;
2286
2287 iwl_scan_cancel_timeout(priv, 200);
2288
2289 conf = ieee80211_get_hw_conf(priv->hw);
2290
2291 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2292 iwlcore_commit_rxon(priv);
2293
2294 iwl_setup_rxon_timing(priv);
2295 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2296 sizeof(priv->rxon_timing), &priv->rxon_timing);
2297 if (ret)
2298 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2299 "Attempting to continue.\n");
2300
2301 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2302
2303 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2304
2305 if (priv->cfg->ops->hcmd->set_rxon_chain)
2306 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2307
2308 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2309
2310 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2311 priv->assoc_id, priv->beacon_int);
2312
2313 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2314 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2315 else
2316 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2317
2318 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2319 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2320 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2321 else
2322 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2323
2324 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2325 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2326
2327 }
2328
2329 iwlcore_commit_rxon(priv);
2330
2331 switch (priv->iw_mode) {
2332 case NL80211_IFTYPE_STATION:
2333 break;
2334
2335 case NL80211_IFTYPE_ADHOC:
2336
2337 /* assume default assoc id */
2338 priv->assoc_id = 1;
2339
2340 iwl_rxon_add_station(priv, priv->bssid, 0);
2341 iwl_send_beacon_cmd(priv);
2342
2343 break;
2344
2345 default:
2346 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2347 __func__, priv->iw_mode);
2348 break;
2349 }
2350
2351 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2352 priv->assoc_station_added = 1;
2353
2354 spin_lock_irqsave(&priv->lock, flags);
2355 iwl_activate_qos(priv, 0);
2356 spin_unlock_irqrestore(&priv->lock, flags);
2357
2358 /* the chain noise calibration will enabled PM upon completion
2359 * If chain noise has already been run, then we need to enable
2360 * power management here */
2361 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2362 iwl_power_update_mode(priv, false);
2363
2364 /* Enable Rx differential gain and sensitivity calibrations */
2365 iwl_chain_noise_reset(priv);
2366 priv->start_calib = 1;
2367
2368 }
2369
2370 /*****************************************************************************
2371 *
2372 * mac80211 entry point functions
2373 *
2374 *****************************************************************************/
2375
2376 #define UCODE_READY_TIMEOUT (4 * HZ)
2377
2378 /*
2379 * Not a mac80211 entry point function, but it fits in with all the
2380 * other mac80211 functions grouped here.
2381 */
2382 static int iwl_setup_mac(struct iwl_priv *priv)
2383 {
2384 int ret;
2385 struct ieee80211_hw *hw = priv->hw;
2386 hw->rate_control_algorithm = "iwl-agn-rs";
2387
2388 /* Tell mac80211 our characteristics */
2389 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2390 IEEE80211_HW_NOISE_DBM |
2391 IEEE80211_HW_AMPDU_AGGREGATION |
2392 IEEE80211_HW_SPECTRUM_MGMT;
2393
2394 if (!priv->cfg->broken_powersave)
2395 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2396 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2397
2398 hw->sta_data_size = sizeof(struct iwl_station_priv);
2399 hw->wiphy->interface_modes =
2400 BIT(NL80211_IFTYPE_STATION) |
2401 BIT(NL80211_IFTYPE_ADHOC);
2402
2403 hw->wiphy->custom_regulatory = true;
2404
2405 /* Firmware does not support this */
2406 hw->wiphy->disable_beacon_hints = true;
2407
2408 /*
2409 * For now, disable PS by default because it affects
2410 * RX performance significantly.
2411 */
2412 hw->wiphy->ps_default = false;
2413
2414 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2415 /* we create the 802.11 header and a zero-length SSID element */
2416 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2417
2418 /* Default value; 4 EDCA QOS priorities */
2419 hw->queues = 4;
2420
2421 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2422
2423 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2424 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2425 &priv->bands[IEEE80211_BAND_2GHZ];
2426 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2427 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2428 &priv->bands[IEEE80211_BAND_5GHZ];
2429
2430 ret = ieee80211_register_hw(priv->hw);
2431 if (ret) {
2432 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2433 return ret;
2434 }
2435 priv->mac80211_registered = 1;
2436
2437 return 0;
2438 }
2439
2440
2441 static int iwl_mac_start(struct ieee80211_hw *hw)
2442 {
2443 struct iwl_priv *priv = hw->priv;
2444 int ret;
2445
2446 IWL_DEBUG_MAC80211(priv, "enter\n");
2447
2448 /* we should be verifying the device is ready to be opened */
2449 mutex_lock(&priv->mutex);
2450
2451 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2452 * ucode filename and max sizes are card-specific. */
2453
2454 if (!priv->ucode_code.len) {
2455 ret = iwl_read_ucode(priv);
2456 if (ret) {
2457 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2458 mutex_unlock(&priv->mutex);
2459 return ret;
2460 }
2461 }
2462
2463 ret = __iwl_up(priv);
2464
2465 mutex_unlock(&priv->mutex);
2466
2467 if (ret)
2468 return ret;
2469
2470 if (iwl_is_rfkill(priv))
2471 goto out;
2472
2473 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2474
2475 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2476 * mac80211 will not be run successfully. */
2477 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2478 test_bit(STATUS_READY, &priv->status),
2479 UCODE_READY_TIMEOUT);
2480 if (!ret) {
2481 if (!test_bit(STATUS_READY, &priv->status)) {
2482 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2483 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2484 return -ETIMEDOUT;
2485 }
2486 }
2487
2488 iwl_led_start(priv);
2489
2490 out:
2491 priv->is_open = 1;
2492 IWL_DEBUG_MAC80211(priv, "leave\n");
2493 return 0;
2494 }
2495
2496 static void iwl_mac_stop(struct ieee80211_hw *hw)
2497 {
2498 struct iwl_priv *priv = hw->priv;
2499
2500 IWL_DEBUG_MAC80211(priv, "enter\n");
2501
2502 if (!priv->is_open)
2503 return;
2504
2505 priv->is_open = 0;
2506
2507 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2508 /* stop mac, cancel any scan request and clear
2509 * RXON_FILTER_ASSOC_MSK BIT
2510 */
2511 mutex_lock(&priv->mutex);
2512 iwl_scan_cancel_timeout(priv, 100);
2513 mutex_unlock(&priv->mutex);
2514 }
2515
2516 iwl_down(priv);
2517
2518 flush_workqueue(priv->workqueue);
2519
2520 /* enable interrupts again in order to receive rfkill changes */
2521 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2522 iwl_enable_interrupts(priv);
2523
2524 IWL_DEBUG_MAC80211(priv, "leave\n");
2525 }
2526
2527 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2528 {
2529 struct iwl_priv *priv = hw->priv;
2530
2531 IWL_DEBUG_MACDUMP(priv, "enter\n");
2532
2533 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2534 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2535
2536 if (iwl_tx_skb(priv, skb))
2537 dev_kfree_skb_any(skb);
2538
2539 IWL_DEBUG_MACDUMP(priv, "leave\n");
2540 return NETDEV_TX_OK;
2541 }
2542
2543 void iwl_config_ap(struct iwl_priv *priv)
2544 {
2545 int ret = 0;
2546 unsigned long flags;
2547
2548 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2549 return;
2550
2551 /* The following should be done only at AP bring up */
2552 if (!iwl_is_associated(priv)) {
2553
2554 /* RXON - unassoc (to set timing command) */
2555 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2556 iwlcore_commit_rxon(priv);
2557
2558 /* RXON Timing */
2559 iwl_setup_rxon_timing(priv);
2560 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2561 sizeof(priv->rxon_timing), &priv->rxon_timing);
2562 if (ret)
2563 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2564 "Attempting to continue.\n");
2565
2566 if (priv->cfg->ops->hcmd->set_rxon_chain)
2567 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2568
2569 /* FIXME: what should be the assoc_id for AP? */
2570 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2571 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2572 priv->staging_rxon.flags |=
2573 RXON_FLG_SHORT_PREAMBLE_MSK;
2574 else
2575 priv->staging_rxon.flags &=
2576 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2577
2578 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2579 if (priv->assoc_capability &
2580 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2581 priv->staging_rxon.flags |=
2582 RXON_FLG_SHORT_SLOT_MSK;
2583 else
2584 priv->staging_rxon.flags &=
2585 ~RXON_FLG_SHORT_SLOT_MSK;
2586
2587 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2588 priv->staging_rxon.flags &=
2589 ~RXON_FLG_SHORT_SLOT_MSK;
2590 }
2591 /* restore RXON assoc */
2592 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2593 iwlcore_commit_rxon(priv);
2594 spin_lock_irqsave(&priv->lock, flags);
2595 iwl_activate_qos(priv, 1);
2596 spin_unlock_irqrestore(&priv->lock, flags);
2597 iwl_add_bcast_station(priv);
2598 }
2599 iwl_send_beacon_cmd(priv);
2600
2601 /* FIXME - we need to add code here to detect a totally new
2602 * configuration, reset the AP, unassoc, rxon timing, assoc,
2603 * clear sta table, add BCAST sta... */
2604 }
2605
2606 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2607 struct ieee80211_key_conf *keyconf, const u8 *addr,
2608 u32 iv32, u16 *phase1key)
2609 {
2610
2611 struct iwl_priv *priv = hw->priv;
2612 IWL_DEBUG_MAC80211(priv, "enter\n");
2613
2614 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2615
2616 IWL_DEBUG_MAC80211(priv, "leave\n");
2617 }
2618
2619 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2620 struct ieee80211_vif *vif,
2621 struct ieee80211_sta *sta,
2622 struct ieee80211_key_conf *key)
2623 {
2624 struct iwl_priv *priv = hw->priv;
2625 const u8 *addr;
2626 int ret;
2627 u8 sta_id;
2628 bool is_default_wep_key = false;
2629
2630 IWL_DEBUG_MAC80211(priv, "enter\n");
2631
2632 if (priv->cfg->mod_params->sw_crypto) {
2633 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2634 return -EOPNOTSUPP;
2635 }
2636 addr = sta ? sta->addr : iwl_bcast_addr;
2637 sta_id = iwl_find_station(priv, addr);
2638 if (sta_id == IWL_INVALID_STATION) {
2639 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2640 addr);
2641 return -EINVAL;
2642
2643 }
2644
2645 mutex_lock(&priv->mutex);
2646 iwl_scan_cancel_timeout(priv, 100);
2647 mutex_unlock(&priv->mutex);
2648
2649 /* If we are getting WEP group key and we didn't receive any key mapping
2650 * so far, we are in legacy wep mode (group key only), otherwise we are
2651 * in 1X mode.
2652 * In legacy wep mode, we use another host command to the uCode */
2653 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2654 priv->iw_mode != NL80211_IFTYPE_AP) {
2655 if (cmd == SET_KEY)
2656 is_default_wep_key = !priv->key_mapping_key;
2657 else
2658 is_default_wep_key =
2659 (key->hw_key_idx == HW_KEY_DEFAULT);
2660 }
2661
2662 switch (cmd) {
2663 case SET_KEY:
2664 if (is_default_wep_key)
2665 ret = iwl_set_default_wep_key(priv, key);
2666 else
2667 ret = iwl_set_dynamic_key(priv, key, sta_id);
2668
2669 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2670 break;
2671 case DISABLE_KEY:
2672 if (is_default_wep_key)
2673 ret = iwl_remove_default_wep_key(priv, key);
2674 else
2675 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2676
2677 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2678 break;
2679 default:
2680 ret = -EINVAL;
2681 }
2682
2683 IWL_DEBUG_MAC80211(priv, "leave\n");
2684
2685 return ret;
2686 }
2687
2688 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2689 enum ieee80211_ampdu_mlme_action action,
2690 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2691 {
2692 struct iwl_priv *priv = hw->priv;
2693 int ret;
2694
2695 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2696 sta->addr, tid);
2697
2698 if (!(priv->cfg->sku & IWL_SKU_N))
2699 return -EACCES;
2700
2701 switch (action) {
2702 case IEEE80211_AMPDU_RX_START:
2703 IWL_DEBUG_HT(priv, "start Rx\n");
2704 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2705 case IEEE80211_AMPDU_RX_STOP:
2706 IWL_DEBUG_HT(priv, "stop Rx\n");
2707 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2708 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2709 return 0;
2710 else
2711 return ret;
2712 case IEEE80211_AMPDU_TX_START:
2713 IWL_DEBUG_HT(priv, "start Tx\n");
2714 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2715 case IEEE80211_AMPDU_TX_STOP:
2716 IWL_DEBUG_HT(priv, "stop Tx\n");
2717 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2718 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2719 return 0;
2720 else
2721 return ret;
2722 default:
2723 IWL_DEBUG_HT(priv, "unknown\n");
2724 return -EINVAL;
2725 break;
2726 }
2727 return 0;
2728 }
2729
2730 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2731 struct ieee80211_low_level_stats *stats)
2732 {
2733 struct iwl_priv *priv = hw->priv;
2734
2735 priv = hw->priv;
2736 IWL_DEBUG_MAC80211(priv, "enter\n");
2737 IWL_DEBUG_MAC80211(priv, "leave\n");
2738
2739 return 0;
2740 }
2741
2742 /*****************************************************************************
2743 *
2744 * sysfs attributes
2745 *
2746 *****************************************************************************/
2747
2748 #ifdef CONFIG_IWLWIFI_DEBUG
2749
2750 /*
2751 * The following adds a new attribute to the sysfs representation
2752 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2753 * used for controlling the debug level.
2754 *
2755 * See the level definitions in iwl for details.
2756 *
2757 * The debug_level being managed using sysfs below is a per device debug
2758 * level that is used instead of the global debug level if it (the per
2759 * device debug level) is set.
2760 */
2761 static ssize_t show_debug_level(struct device *d,
2762 struct device_attribute *attr, char *buf)
2763 {
2764 struct iwl_priv *priv = dev_get_drvdata(d);
2765 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2766 }
2767 static ssize_t store_debug_level(struct device *d,
2768 struct device_attribute *attr,
2769 const char *buf, size_t count)
2770 {
2771 struct iwl_priv *priv = dev_get_drvdata(d);
2772 unsigned long val;
2773 int ret;
2774
2775 ret = strict_strtoul(buf, 0, &val);
2776 if (ret)
2777 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2778 else {
2779 priv->debug_level = val;
2780 if (iwl_alloc_traffic_mem(priv))
2781 IWL_ERR(priv,
2782 "Not enough memory to generate traffic log\n");
2783 }
2784 return strnlen(buf, count);
2785 }
2786
2787 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2788 show_debug_level, store_debug_level);
2789
2790
2791 #endif /* CONFIG_IWLWIFI_DEBUG */
2792
2793
2794 static ssize_t show_temperature(struct device *d,
2795 struct device_attribute *attr, char *buf)
2796 {
2797 struct iwl_priv *priv = dev_get_drvdata(d);
2798
2799 if (!iwl_is_alive(priv))
2800 return -EAGAIN;
2801
2802 return sprintf(buf, "%d\n", priv->temperature);
2803 }
2804
2805 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2806
2807 static ssize_t show_tx_power(struct device *d,
2808 struct device_attribute *attr, char *buf)
2809 {
2810 struct iwl_priv *priv = dev_get_drvdata(d);
2811
2812 if (!iwl_is_ready_rf(priv))
2813 return sprintf(buf, "off\n");
2814 else
2815 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2816 }
2817
2818 static ssize_t store_tx_power(struct device *d,
2819 struct device_attribute *attr,
2820 const char *buf, size_t count)
2821 {
2822 struct iwl_priv *priv = dev_get_drvdata(d);
2823 unsigned long val;
2824 int ret;
2825
2826 ret = strict_strtoul(buf, 10, &val);
2827 if (ret)
2828 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2829 else {
2830 ret = iwl_set_tx_power(priv, val, false);
2831 if (ret)
2832 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2833 ret);
2834 else
2835 ret = count;
2836 }
2837 return ret;
2838 }
2839
2840 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2841
2842 static ssize_t show_flags(struct device *d,
2843 struct device_attribute *attr, char *buf)
2844 {
2845 struct iwl_priv *priv = dev_get_drvdata(d);
2846
2847 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2848 }
2849
2850 static ssize_t store_flags(struct device *d,
2851 struct device_attribute *attr,
2852 const char *buf, size_t count)
2853 {
2854 struct iwl_priv *priv = dev_get_drvdata(d);
2855 unsigned long val;
2856 u32 flags;
2857 int ret = strict_strtoul(buf, 0, &val);
2858 if (ret)
2859 return ret;
2860 flags = (u32)val;
2861
2862 mutex_lock(&priv->mutex);
2863 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2864 /* Cancel any currently running scans... */
2865 if (iwl_scan_cancel_timeout(priv, 100))
2866 IWL_WARN(priv, "Could not cancel scan.\n");
2867 else {
2868 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2869 priv->staging_rxon.flags = cpu_to_le32(flags);
2870 iwlcore_commit_rxon(priv);
2871 }
2872 }
2873 mutex_unlock(&priv->mutex);
2874
2875 return count;
2876 }
2877
2878 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2879
2880 static ssize_t show_filter_flags(struct device *d,
2881 struct device_attribute *attr, char *buf)
2882 {
2883 struct iwl_priv *priv = dev_get_drvdata(d);
2884
2885 return sprintf(buf, "0x%04X\n",
2886 le32_to_cpu(priv->active_rxon.filter_flags));
2887 }
2888
2889 static ssize_t store_filter_flags(struct device *d,
2890 struct device_attribute *attr,
2891 const char *buf, size_t count)
2892 {
2893 struct iwl_priv *priv = dev_get_drvdata(d);
2894 unsigned long val;
2895 u32 filter_flags;
2896 int ret = strict_strtoul(buf, 0, &val);
2897 if (ret)
2898 return ret;
2899 filter_flags = (u32)val;
2900
2901 mutex_lock(&priv->mutex);
2902 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2903 /* Cancel any currently running scans... */
2904 if (iwl_scan_cancel_timeout(priv, 100))
2905 IWL_WARN(priv, "Could not cancel scan.\n");
2906 else {
2907 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2908 "0x%04X\n", filter_flags);
2909 priv->staging_rxon.filter_flags =
2910 cpu_to_le32(filter_flags);
2911 iwlcore_commit_rxon(priv);
2912 }
2913 }
2914 mutex_unlock(&priv->mutex);
2915
2916 return count;
2917 }
2918
2919 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2920 store_filter_flags);
2921
2922
2923 static ssize_t show_statistics(struct device *d,
2924 struct device_attribute *attr, char *buf)
2925 {
2926 struct iwl_priv *priv = dev_get_drvdata(d);
2927 u32 size = sizeof(struct iwl_notif_statistics);
2928 u32 len = 0, ofs = 0;
2929 u8 *data = (u8 *)&priv->statistics;
2930 int rc = 0;
2931
2932 if (!iwl_is_alive(priv))
2933 return -EAGAIN;
2934
2935 mutex_lock(&priv->mutex);
2936 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
2937 mutex_unlock(&priv->mutex);
2938
2939 if (rc) {
2940 len = sprintf(buf,
2941 "Error sending statistics request: 0x%08X\n", rc);
2942 return len;
2943 }
2944
2945 while (size && (PAGE_SIZE - len)) {
2946 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2947 PAGE_SIZE - len, 1);
2948 len = strlen(buf);
2949 if (PAGE_SIZE - len)
2950 buf[len++] = '\n';
2951
2952 ofs += 16;
2953 size -= min(size, 16U);
2954 }
2955
2956 return len;
2957 }
2958
2959 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2960
2961 static ssize_t show_rts_ht_protection(struct device *d,
2962 struct device_attribute *attr, char *buf)
2963 {
2964 struct iwl_priv *priv = dev_get_drvdata(d);
2965
2966 return sprintf(buf, "%s\n",
2967 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2968 }
2969
2970 static ssize_t store_rts_ht_protection(struct device *d,
2971 struct device_attribute *attr,
2972 const char *buf, size_t count)
2973 {
2974 struct iwl_priv *priv = dev_get_drvdata(d);
2975 unsigned long val;
2976 int ret;
2977
2978 ret = strict_strtoul(buf, 10, &val);
2979 if (ret)
2980 IWL_INFO(priv, "Input is not in decimal form.\n");
2981 else {
2982 if (!iwl_is_associated(priv))
2983 priv->cfg->use_rts_for_ht = val ? true : false;
2984 else
2985 IWL_ERR(priv, "Sta associated with AP - "
2986 "Change protection mechanism is not allowed\n");
2987 ret = count;
2988 }
2989 return ret;
2990 }
2991
2992 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2993 show_rts_ht_protection, store_rts_ht_protection);
2994
2995
2996 /*****************************************************************************
2997 *
2998 * driver setup and teardown
2999 *
3000 *****************************************************************************/
3001
3002 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3003 {
3004 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3005
3006 init_waitqueue_head(&priv->wait_command_queue);
3007
3008 INIT_WORK(&priv->up, iwl_bg_up);
3009 INIT_WORK(&priv->restart, iwl_bg_restart);
3010 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3011 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3012 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3013 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3014 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3015
3016 iwl_setup_scan_deferred_work(priv);
3017
3018 if (priv->cfg->ops->lib->setup_deferred_work)
3019 priv->cfg->ops->lib->setup_deferred_work(priv);
3020
3021 init_timer(&priv->statistics_periodic);
3022 priv->statistics_periodic.data = (unsigned long)priv;
3023 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3024
3025 if (!priv->cfg->use_isr_legacy)
3026 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3027 iwl_irq_tasklet, (unsigned long)priv);
3028 else
3029 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3030 iwl_irq_tasklet_legacy, (unsigned long)priv);
3031 }
3032
3033 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3034 {
3035 if (priv->cfg->ops->lib->cancel_deferred_work)
3036 priv->cfg->ops->lib->cancel_deferred_work(priv);
3037
3038 cancel_delayed_work_sync(&priv->init_alive_start);
3039 cancel_delayed_work(&priv->scan_check);
3040 cancel_delayed_work(&priv->alive_start);
3041 cancel_work_sync(&priv->beacon_update);
3042 del_timer_sync(&priv->statistics_periodic);
3043 }
3044
3045 static void iwl_init_hw_rates(struct iwl_priv *priv,
3046 struct ieee80211_rate *rates)
3047 {
3048 int i;
3049
3050 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3051 rates[i].bitrate = iwl_rates[i].ieee * 5;
3052 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3053 rates[i].hw_value_short = i;
3054 rates[i].flags = 0;
3055 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3056 /*
3057 * If CCK != 1M then set short preamble rate flag.
3058 */
3059 rates[i].flags |=
3060 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3061 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3062 }
3063 }
3064 }
3065
3066 static int iwl_init_drv(struct iwl_priv *priv)
3067 {
3068 int ret;
3069
3070 priv->ibss_beacon = NULL;
3071
3072 spin_lock_init(&priv->lock);
3073 spin_lock_init(&priv->sta_lock);
3074 spin_lock_init(&priv->hcmd_lock);
3075
3076 INIT_LIST_HEAD(&priv->free_frames);
3077
3078 mutex_init(&priv->mutex);
3079
3080 /* Clear the driver's (not device's) station table */
3081 iwl_clear_stations_table(priv);
3082
3083 priv->ieee_channels = NULL;
3084 priv->ieee_rates = NULL;
3085 priv->band = IEEE80211_BAND_2GHZ;
3086
3087 priv->iw_mode = NL80211_IFTYPE_STATION;
3088 if (priv->cfg->support_sm_ps)
3089 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DYNAMIC;
3090 else
3091 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
3092
3093 /* Choose which receivers/antennas to use */
3094 if (priv->cfg->ops->hcmd->set_rxon_chain)
3095 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3096
3097 iwl_init_scan_params(priv);
3098
3099 iwl_reset_qos(priv);
3100
3101 priv->qos_data.qos_active = 0;
3102 priv->qos_data.qos_cap.val = 0;
3103
3104 priv->rates_mask = IWL_RATES_MASK;
3105 /* Set the tx_power_user_lmt to the lowest power level
3106 * this value will get overwritten by channel max power avg
3107 * from eeprom */
3108 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3109
3110 ret = iwl_init_channel_map(priv);
3111 if (ret) {
3112 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3113 goto err;
3114 }
3115
3116 ret = iwlcore_init_geos(priv);
3117 if (ret) {
3118 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3119 goto err_free_channel_map;
3120 }
3121 iwl_init_hw_rates(priv, priv->ieee_rates);
3122
3123 return 0;
3124
3125 err_free_channel_map:
3126 iwl_free_channel_map(priv);
3127 err:
3128 return ret;
3129 }
3130
3131 static void iwl_uninit_drv(struct iwl_priv *priv)
3132 {
3133 iwl_calib_free_results(priv);
3134 iwlcore_free_geos(priv);
3135 iwl_free_channel_map(priv);
3136 kfree(priv->scan);
3137 }
3138
3139 static struct attribute *iwl_sysfs_entries[] = {
3140 &dev_attr_flags.attr,
3141 &dev_attr_filter_flags.attr,
3142 &dev_attr_statistics.attr,
3143 &dev_attr_temperature.attr,
3144 &dev_attr_tx_power.attr,
3145 &dev_attr_rts_ht_protection.attr,
3146 #ifdef CONFIG_IWLWIFI_DEBUG
3147 &dev_attr_debug_level.attr,
3148 #endif
3149 NULL
3150 };
3151
3152 static struct attribute_group iwl_attribute_group = {
3153 .name = NULL, /* put in device directory */
3154 .attrs = iwl_sysfs_entries,
3155 };
3156
3157 static struct ieee80211_ops iwl_hw_ops = {
3158 .tx = iwl_mac_tx,
3159 .start = iwl_mac_start,
3160 .stop = iwl_mac_stop,
3161 .add_interface = iwl_mac_add_interface,
3162 .remove_interface = iwl_mac_remove_interface,
3163 .config = iwl_mac_config,
3164 .configure_filter = iwl_configure_filter,
3165 .set_key = iwl_mac_set_key,
3166 .update_tkip_key = iwl_mac_update_tkip_key,
3167 .get_stats = iwl_mac_get_stats,
3168 .get_tx_stats = iwl_mac_get_tx_stats,
3169 .conf_tx = iwl_mac_conf_tx,
3170 .reset_tsf = iwl_mac_reset_tsf,
3171 .bss_info_changed = iwl_bss_info_changed,
3172 .ampdu_action = iwl_mac_ampdu_action,
3173 .hw_scan = iwl_mac_hw_scan
3174 };
3175
3176 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3177 {
3178 int err = 0;
3179 struct iwl_priv *priv;
3180 struct ieee80211_hw *hw;
3181 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3182 unsigned long flags;
3183 u16 pci_cmd;
3184
3185 /************************
3186 * 1. Allocating HW data
3187 ************************/
3188
3189 /* Disabling hardware scan means that mac80211 will perform scans
3190 * "the hard way", rather than using device's scan. */
3191 if (cfg->mod_params->disable_hw_scan) {
3192 if (iwl_debug_level & IWL_DL_INFO)
3193 dev_printk(KERN_DEBUG, &(pdev->dev),
3194 "Disabling hw_scan\n");
3195 iwl_hw_ops.hw_scan = NULL;
3196 }
3197
3198 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3199 if (!hw) {
3200 err = -ENOMEM;
3201 goto out;
3202 }
3203 priv = hw->priv;
3204 /* At this point both hw and priv are allocated. */
3205
3206 SET_IEEE80211_DEV(hw, &pdev->dev);
3207
3208 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3209 priv->cfg = cfg;
3210 priv->pci_dev = pdev;
3211 priv->inta_mask = CSR_INI_SET_MASK;
3212
3213 #ifdef CONFIG_IWLWIFI_DEBUG
3214 atomic_set(&priv->restrict_refcnt, 0);
3215 #endif
3216 if (iwl_alloc_traffic_mem(priv))
3217 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3218
3219 /**************************
3220 * 2. Initializing PCI bus
3221 **************************/
3222 if (pci_enable_device(pdev)) {
3223 err = -ENODEV;
3224 goto out_ieee80211_free_hw;
3225 }
3226
3227 pci_set_master(pdev);
3228
3229 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3230 if (!err)
3231 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3232 if (err) {
3233 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3234 if (!err)
3235 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3236 /* both attempts failed: */
3237 if (err) {
3238 IWL_WARN(priv, "No suitable DMA available.\n");
3239 goto out_pci_disable_device;
3240 }
3241 }
3242
3243 err = pci_request_regions(pdev, DRV_NAME);
3244 if (err)
3245 goto out_pci_disable_device;
3246
3247 pci_set_drvdata(pdev, priv);
3248
3249
3250 /***********************
3251 * 3. Read REV register
3252 ***********************/
3253 priv->hw_base = pci_iomap(pdev, 0, 0);
3254 if (!priv->hw_base) {
3255 err = -ENODEV;
3256 goto out_pci_release_regions;
3257 }
3258
3259 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3260 (unsigned long long) pci_resource_len(pdev, 0));
3261 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3262
3263 /* this spin lock will be used in apm_ops.init and EEPROM access
3264 * we should init now
3265 */
3266 spin_lock_init(&priv->reg_lock);
3267 iwl_hw_detect(priv);
3268 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3269 priv->cfg->name, priv->hw_rev);
3270
3271 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3272 * PCI Tx retries from interfering with C3 CPU state */
3273 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3274
3275 iwl_prepare_card_hw(priv);
3276 if (!priv->hw_ready) {
3277 IWL_WARN(priv, "Failed, HW not ready\n");
3278 goto out_iounmap;
3279 }
3280
3281 /*****************
3282 * 4. Read EEPROM
3283 *****************/
3284 /* Read the EEPROM */
3285 err = iwl_eeprom_init(priv);
3286 if (err) {
3287 IWL_ERR(priv, "Unable to init EEPROM\n");
3288 goto out_iounmap;
3289 }
3290 err = iwl_eeprom_check_version(priv);
3291 if (err)
3292 goto out_free_eeprom;
3293
3294 /* extract MAC Address */
3295 iwl_eeprom_get_mac(priv, priv->mac_addr);
3296 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3297 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3298
3299 /************************
3300 * 5. Setup HW constants
3301 ************************/
3302 if (iwl_set_hw_params(priv)) {
3303 IWL_ERR(priv, "failed to set hw parameters\n");
3304 goto out_free_eeprom;
3305 }
3306
3307 /*******************
3308 * 6. Setup priv
3309 *******************/
3310
3311 err = iwl_init_drv(priv);
3312 if (err)
3313 goto out_free_eeprom;
3314 /* At this point both hw and priv are initialized. */
3315
3316 /********************
3317 * 7. Setup services
3318 ********************/
3319 spin_lock_irqsave(&priv->lock, flags);
3320 iwl_disable_interrupts(priv);
3321 spin_unlock_irqrestore(&priv->lock, flags);
3322
3323 pci_enable_msi(priv->pci_dev);
3324
3325 iwl_alloc_isr_ict(priv);
3326 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3327 IRQF_SHARED, DRV_NAME, priv);
3328 if (err) {
3329 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3330 goto out_disable_msi;
3331 }
3332 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3333 if (err) {
3334 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3335 goto out_free_irq;
3336 }
3337
3338 iwl_setup_deferred_work(priv);
3339 iwl_setup_rx_handlers(priv);
3340
3341 /**********************************
3342 * 8. Setup and register mac80211
3343 **********************************/
3344
3345 /* enable interrupts if needed: hw bug w/a */
3346 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3347 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3348 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3349 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3350 }
3351
3352 iwl_enable_interrupts(priv);
3353
3354 err = iwl_setup_mac(priv);
3355 if (err)
3356 goto out_remove_sysfs;
3357
3358 err = iwl_dbgfs_register(priv, DRV_NAME);
3359 if (err)
3360 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3361
3362 /* If platform's RF_KILL switch is NOT set to KILL */
3363 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3364 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3365 else
3366 set_bit(STATUS_RF_KILL_HW, &priv->status);
3367
3368 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3369 test_bit(STATUS_RF_KILL_HW, &priv->status));
3370
3371 iwl_power_initialize(priv);
3372 iwl_tt_initialize(priv);
3373 return 0;
3374
3375 out_remove_sysfs:
3376 destroy_workqueue(priv->workqueue);
3377 priv->workqueue = NULL;
3378 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3379 out_free_irq:
3380 free_irq(priv->pci_dev->irq, priv);
3381 iwl_free_isr_ict(priv);
3382 out_disable_msi:
3383 pci_disable_msi(priv->pci_dev);
3384 iwl_uninit_drv(priv);
3385 out_free_eeprom:
3386 iwl_eeprom_free(priv);
3387 out_iounmap:
3388 pci_iounmap(pdev, priv->hw_base);
3389 out_pci_release_regions:
3390 pci_set_drvdata(pdev, NULL);
3391 pci_release_regions(pdev);
3392 out_pci_disable_device:
3393 pci_disable_device(pdev);
3394 out_ieee80211_free_hw:
3395 iwl_free_traffic_mem(priv);
3396 ieee80211_free_hw(priv->hw);
3397 out:
3398 return err;
3399 }
3400
3401 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3402 {
3403 struct iwl_priv *priv = pci_get_drvdata(pdev);
3404 unsigned long flags;
3405
3406 if (!priv)
3407 return;
3408
3409 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3410
3411 iwl_dbgfs_unregister(priv);
3412 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3413
3414 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3415 * to be called and iwl_down since we are removing the device
3416 * we need to set STATUS_EXIT_PENDING bit.
3417 */
3418 set_bit(STATUS_EXIT_PENDING, &priv->status);
3419 if (priv->mac80211_registered) {
3420 ieee80211_unregister_hw(priv->hw);
3421 priv->mac80211_registered = 0;
3422 } else {
3423 iwl_down(priv);
3424 }
3425
3426 /*
3427 * Make sure device is reset to low power before unloading driver.
3428 * This may be redundant with iwl_down(), but there are paths to
3429 * run iwl_down() without calling apm_ops.stop(), and there are
3430 * paths to avoid running iwl_down() at all before leaving driver.
3431 * This (inexpensive) call *makes sure* device is reset.
3432 */
3433 priv->cfg->ops->lib->apm_ops.stop(priv);
3434
3435 iwl_tt_exit(priv);
3436
3437 /* make sure we flush any pending irq or
3438 * tasklet for the driver
3439 */
3440 spin_lock_irqsave(&priv->lock, flags);
3441 iwl_disable_interrupts(priv);
3442 spin_unlock_irqrestore(&priv->lock, flags);
3443
3444 iwl_synchronize_irq(priv);
3445
3446 iwl_dealloc_ucode_pci(priv);
3447
3448 if (priv->rxq.bd)
3449 iwl_rx_queue_free(priv, &priv->rxq);
3450 iwl_hw_txq_ctx_free(priv);
3451
3452 iwl_clear_stations_table(priv);
3453 iwl_eeprom_free(priv);
3454
3455
3456 /*netif_stop_queue(dev); */
3457 flush_workqueue(priv->workqueue);
3458
3459 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3460 * priv->workqueue... so we can't take down the workqueue
3461 * until now... */
3462 destroy_workqueue(priv->workqueue);
3463 priv->workqueue = NULL;
3464 iwl_free_traffic_mem(priv);
3465
3466 free_irq(priv->pci_dev->irq, priv);
3467 pci_disable_msi(priv->pci_dev);
3468 pci_iounmap(pdev, priv->hw_base);
3469 pci_release_regions(pdev);
3470 pci_disable_device(pdev);
3471 pci_set_drvdata(pdev, NULL);
3472
3473 iwl_uninit_drv(priv);
3474
3475 iwl_free_isr_ict(priv);
3476
3477 if (priv->ibss_beacon)
3478 dev_kfree_skb(priv->ibss_beacon);
3479
3480 ieee80211_free_hw(priv->hw);
3481 }
3482
3483
3484 /*****************************************************************************
3485 *
3486 * driver and module entry point
3487 *
3488 *****************************************************************************/
3489
3490 /* Hardware specific file defines the PCI IDs table for that hardware module */
3491 static struct pci_device_id iwl_hw_card_ids[] = {
3492 #ifdef CONFIG_IWL4965
3493 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3494 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3495 #endif /* CONFIG_IWL4965 */
3496 #ifdef CONFIG_IWL5000
3497 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3498 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3499 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3500 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3501 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3502 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3503 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3504 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3505 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3506 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3507 /* 5350 WiFi/WiMax */
3508 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3509 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3510 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3511 /* 5150 Wifi/WiMax */
3512 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3513 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3514
3515 /* 6x00 Series */
3516 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3517 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3518 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3519 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3520 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3521 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3522 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3523 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3524 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3525 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3526
3527 /* 6x50 WiFi/WiMax Series */
3528 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3529 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3530 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3531 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3532 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3533 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3534
3535 /* 1000 Series WiFi */
3536 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3537 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3538 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3539 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3540 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3541 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3542 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3543 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3544 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3545 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3546 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3547 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3548 #endif /* CONFIG_IWL5000 */
3549
3550 {0}
3551 };
3552 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3553
3554 static struct pci_driver iwl_driver = {
3555 .name = DRV_NAME,
3556 .id_table = iwl_hw_card_ids,
3557 .probe = iwl_pci_probe,
3558 .remove = __devexit_p(iwl_pci_remove),
3559 #ifdef CONFIG_PM
3560 .suspend = iwl_pci_suspend,
3561 .resume = iwl_pci_resume,
3562 #endif
3563 };
3564
3565 static int __init iwl_init(void)
3566 {
3567
3568 int ret;
3569 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3570 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3571
3572 ret = iwlagn_rate_control_register();
3573 if (ret) {
3574 printk(KERN_ERR DRV_NAME
3575 "Unable to register rate control algorithm: %d\n", ret);
3576 return ret;
3577 }
3578
3579 ret = pci_register_driver(&iwl_driver);
3580 if (ret) {
3581 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3582 goto error_register;
3583 }
3584
3585 return ret;
3586
3587 error_register:
3588 iwlagn_rate_control_unregister();
3589 return ret;
3590 }
3591
3592 static void __exit iwl_exit(void)
3593 {
3594 pci_unregister_driver(&iwl_driver);
3595 iwlagn_rate_control_unregister();
3596 }
3597
3598 module_exit(iwl_exit);
3599 module_init(iwl_init);
3600
3601 #ifdef CONFIG_IWLWIFI_DEBUG
3602 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3603 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3604 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3605 MODULE_PARM_DESC(debug, "debug output mask");
3606 #endif
3607
Linux kernel - Deliverables
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