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[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /*
65 * module name, copyright, version, etc.
66 */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
93 */
94
95 /**************************************************************/
96
97 /**
98 * iwl_commit_rxon - commit staging_rxon to hardware
99 *
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113 if (!iwl_is_alive(priv))
114 return -EBUSY;
115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118
119 ret = iwl_check_rxon_cmd(priv);
120 if (ret) {
121 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
122 return -EINVAL;
123 }
124
125 /*
126 * receive commit_rxon request
127 * abort any previous channel switch if still in process
128 */
129 if (priv->switch_rxon.switch_in_progress &&
130 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
131 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
132 le16_to_cpu(priv->switch_rxon.channel));
133 priv->switch_rxon.switch_in_progress = false;
134 }
135
136 /* If we don't need to send a full RXON, we can use
137 * iwl_rxon_assoc_cmd which is used to reconfigure filter
138 * and other flags for the current radio configuration. */
139 if (!iwl_full_rxon_required(priv)) {
140 ret = iwl_send_rxon_assoc(priv);
141 if (ret) {
142 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
143 return ret;
144 }
145
146 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
147 iwl_print_rx_config_cmd(priv);
148 return 0;
149 }
150
151 /* station table will be cleared */
152 priv->assoc_station_added = 0;
153
154 /* If we are currently associated and the new config requires
155 * an RXON_ASSOC and the new config wants the associated mask enabled,
156 * we must clear the associated from the active configuration
157 * before we apply the new config */
158 if (iwl_is_associated(priv) && new_assoc) {
159 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
160 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
161
162 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
163 sizeof(struct iwl_rxon_cmd),
164 &priv->active_rxon);
165
166 /* If the mask clearing failed then we set
167 * active_rxon back to what it was previously */
168 if (ret) {
169 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
170 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
171 return ret;
172 }
173 }
174
175 IWL_DEBUG_INFO(priv, "Sending RXON\n"
176 "* with%s RXON_FILTER_ASSOC_MSK\n"
177 "* channel = %d\n"
178 "* bssid = %pM\n",
179 (new_assoc ? "" : "out"),
180 le16_to_cpu(priv->staging_rxon.channel),
181 priv->staging_rxon.bssid_addr);
182
183 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
184
185 /* Apply the new configuration
186 * RXON unassoc clears the station table in uCode, send it before
187 * we add the bcast station. If assoc bit is set, we will send RXON
188 * after having added the bcast and bssid station.
189 */
190 if (!new_assoc) {
191 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
192 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
193 if (ret) {
194 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
195 return ret;
196 }
197 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
198 }
199
200 iwl_clear_stations_table(priv);
201
202 priv->start_calib = 0;
203
204 /* Add the broadcast address so we can send broadcast frames */
205 iwl_add_bcast_station(priv);
206
207 /* If we have set the ASSOC_MSK and we are in BSS mode then
208 * add the IWL_AP_ID to the station rate table */
209 if (new_assoc) {
210 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
211 ret = iwl_rxon_add_station(priv,
212 priv->active_rxon.bssid_addr, 1);
213 if (ret == IWL_INVALID_STATION) {
214 IWL_ERR(priv,
215 "Error adding AP address for TX.\n");
216 return -EIO;
217 }
218 priv->assoc_station_added = 1;
219 if (priv->default_wep_key &&
220 iwl_send_static_wepkey_cmd(priv, 0))
221 IWL_ERR(priv,
222 "Could not send WEP static key.\n");
223 }
224
225 /*
226 * allow CTS-to-self if possible for new association.
227 * this is relevant only for 5000 series and up,
228 * but will not damage 4965
229 */
230 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
231
232 /* Apply the new configuration
233 * RXON assoc doesn't clear the station table in uCode,
234 */
235 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
236 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
237 if (ret) {
238 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
239 return ret;
240 }
241 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
242 }
243 iwl_print_rx_config_cmd(priv);
244
245 iwl_init_sensitivity(priv);
246
247 /* If we issue a new RXON command which required a tune then we must
248 * send a new TXPOWER command or we won't be able to Tx any frames */
249 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
250 if (ret) {
251 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
252 return ret;
253 }
254
255 return 0;
256 }
257
258 void iwl_update_chain_flags(struct iwl_priv *priv)
259 {
260
261 if (priv->cfg->ops->hcmd->set_rxon_chain)
262 priv->cfg->ops->hcmd->set_rxon_chain(priv);
263 iwlcore_commit_rxon(priv);
264 }
265
266 static void iwl_clear_free_frames(struct iwl_priv *priv)
267 {
268 struct list_head *element;
269
270 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
271 priv->frames_count);
272
273 while (!list_empty(&priv->free_frames)) {
274 element = priv->free_frames.next;
275 list_del(element);
276 kfree(list_entry(element, struct iwl_frame, list));
277 priv->frames_count--;
278 }
279
280 if (priv->frames_count) {
281 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
282 priv->frames_count);
283 priv->frames_count = 0;
284 }
285 }
286
287 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
288 {
289 struct iwl_frame *frame;
290 struct list_head *element;
291 if (list_empty(&priv->free_frames)) {
292 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
293 if (!frame) {
294 IWL_ERR(priv, "Could not allocate frame!\n");
295 return NULL;
296 }
297
298 priv->frames_count++;
299 return frame;
300 }
301
302 element = priv->free_frames.next;
303 list_del(element);
304 return list_entry(element, struct iwl_frame, list);
305 }
306
307 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
308 {
309 memset(frame, 0, sizeof(*frame));
310 list_add(&frame->list, &priv->free_frames);
311 }
312
313 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
314 struct ieee80211_hdr *hdr,
315 int left)
316 {
317 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
318 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
319 (priv->iw_mode != NL80211_IFTYPE_AP)))
320 return 0;
321
322 if (priv->ibss_beacon->len > left)
323 return 0;
324
325 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
326
327 return priv->ibss_beacon->len;
328 }
329
330 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
331 struct iwl_frame *frame, u8 rate)
332 {
333 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
334 unsigned int frame_size;
335
336 tx_beacon_cmd = &frame->u.beacon;
337 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
338
339 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
340 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
341
342 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
343 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
344
345 BUG_ON(frame_size > MAX_MPDU_SIZE);
346 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
347
348 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
349 tx_beacon_cmd->tx.rate_n_flags =
350 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
351 else
352 tx_beacon_cmd->tx.rate_n_flags =
353 iwl_hw_set_rate_n_flags(rate, 0);
354
355 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
356 TX_CMD_FLG_TSF_MSK |
357 TX_CMD_FLG_STA_RATE_MSK;
358
359 return sizeof(*tx_beacon_cmd) + frame_size;
360 }
361 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
362 {
363 struct iwl_frame *frame;
364 unsigned int frame_size;
365 int rc;
366 u8 rate;
367
368 frame = iwl_get_free_frame(priv);
369
370 if (!frame) {
371 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
372 "command.\n");
373 return -ENOMEM;
374 }
375
376 rate = iwl_rate_get_lowest_plcp(priv);
377
378 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
379
380 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
381 &frame->u.cmd[0]);
382
383 iwl_free_frame(priv, frame);
384
385 return rc;
386 }
387
388 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
389 {
390 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
391
392 dma_addr_t addr = get_unaligned_le32(&tb->lo);
393 if (sizeof(dma_addr_t) > sizeof(u32))
394 addr |=
395 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
396
397 return addr;
398 }
399
400 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
401 {
402 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
403
404 return le16_to_cpu(tb->hi_n_len) >> 4;
405 }
406
407 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
408 dma_addr_t addr, u16 len)
409 {
410 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
411 u16 hi_n_len = len << 4;
412
413 put_unaligned_le32(addr, &tb->lo);
414 if (sizeof(dma_addr_t) > sizeof(u32))
415 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
416
417 tb->hi_n_len = cpu_to_le16(hi_n_len);
418
419 tfd->num_tbs = idx + 1;
420 }
421
422 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
423 {
424 return tfd->num_tbs & 0x1f;
425 }
426
427 /**
428 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
429 * @priv - driver private data
430 * @txq - tx queue
431 *
432 * Does NOT advance any TFD circular buffer read/write indexes
433 * Does NOT free the TFD itself (which is within circular buffer)
434 */
435 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
436 {
437 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
438 struct iwl_tfd *tfd;
439 struct pci_dev *dev = priv->pci_dev;
440 int index = txq->q.read_ptr;
441 int i;
442 int num_tbs;
443
444 tfd = &tfd_tmp[index];
445
446 /* Sanity check on number of chunks */
447 num_tbs = iwl_tfd_get_num_tbs(tfd);
448
449 if (num_tbs >= IWL_NUM_OF_TBS) {
450 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
451 /* @todo issue fatal error, it is quite serious situation */
452 return;
453 }
454
455 /* Unmap tx_cmd */
456 if (num_tbs)
457 pci_unmap_single(dev,
458 pci_unmap_addr(&txq->meta[index], mapping),
459 pci_unmap_len(&txq->meta[index], len),
460 PCI_DMA_BIDIRECTIONAL);
461
462 /* Unmap chunks, if any. */
463 for (i = 1; i < num_tbs; i++) {
464 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
465 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
466
467 if (txq->txb) {
468 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
469 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
470 }
471 }
472 }
473
474 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
475 struct iwl_tx_queue *txq,
476 dma_addr_t addr, u16 len,
477 u8 reset, u8 pad)
478 {
479 struct iwl_queue *q;
480 struct iwl_tfd *tfd, *tfd_tmp;
481 u32 num_tbs;
482
483 q = &txq->q;
484 tfd_tmp = (struct iwl_tfd *)txq->tfds;
485 tfd = &tfd_tmp[q->write_ptr];
486
487 if (reset)
488 memset(tfd, 0, sizeof(*tfd));
489
490 num_tbs = iwl_tfd_get_num_tbs(tfd);
491
492 /* Each TFD can point to a maximum 20 Tx buffers */
493 if (num_tbs >= IWL_NUM_OF_TBS) {
494 IWL_ERR(priv, "Error can not send more than %d chunks\n",
495 IWL_NUM_OF_TBS);
496 return -EINVAL;
497 }
498
499 BUG_ON(addr & ~DMA_BIT_MASK(36));
500 if (unlikely(addr & ~IWL_TX_DMA_MASK))
501 IWL_ERR(priv, "Unaligned address = %llx\n",
502 (unsigned long long)addr);
503
504 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
505
506 return 0;
507 }
508
509 /*
510 * Tell nic where to find circular buffer of Tx Frame Descriptors for
511 * given Tx queue, and enable the DMA channel used for that queue.
512 *
513 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
514 * channels supported in hardware.
515 */
516 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
517 struct iwl_tx_queue *txq)
518 {
519 int txq_id = txq->q.id;
520
521 /* Circular buffer (TFD queue in DRAM) physical base address */
522 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
523 txq->q.dma_addr >> 8);
524
525 return 0;
526 }
527
528 /******************************************************************************
529 *
530 * Generic RX handler implementations
531 *
532 ******************************************************************************/
533 static void iwl_rx_reply_alive(struct iwl_priv *priv,
534 struct iwl_rx_mem_buffer *rxb)
535 {
536 struct iwl_rx_packet *pkt = rxb_addr(rxb);
537 struct iwl_alive_resp *palive;
538 struct delayed_work *pwork;
539
540 palive = &pkt->u.alive_frame;
541
542 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
543 "0x%01X 0x%01X\n",
544 palive->is_valid, palive->ver_type,
545 palive->ver_subtype);
546
547 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
548 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
549 memcpy(&priv->card_alive_init,
550 &pkt->u.alive_frame,
551 sizeof(struct iwl_init_alive_resp));
552 pwork = &priv->init_alive_start;
553 } else {
554 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
555 memcpy(&priv->card_alive, &pkt->u.alive_frame,
556 sizeof(struct iwl_alive_resp));
557 pwork = &priv->alive_start;
558 }
559
560 /* We delay the ALIVE response by 5ms to
561 * give the HW RF Kill time to activate... */
562 if (palive->is_valid == UCODE_VALID_OK)
563 queue_delayed_work(priv->workqueue, pwork,
564 msecs_to_jiffies(5));
565 else
566 IWL_WARN(priv, "uCode did not respond OK.\n");
567 }
568
569 static void iwl_bg_beacon_update(struct work_struct *work)
570 {
571 struct iwl_priv *priv =
572 container_of(work, struct iwl_priv, beacon_update);
573 struct sk_buff *beacon;
574
575 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
576 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
577
578 if (!beacon) {
579 IWL_ERR(priv, "update beacon failed\n");
580 return;
581 }
582
583 mutex_lock(&priv->mutex);
584 /* new beacon skb is allocated every time; dispose previous.*/
585 if (priv->ibss_beacon)
586 dev_kfree_skb(priv->ibss_beacon);
587
588 priv->ibss_beacon = beacon;
589 mutex_unlock(&priv->mutex);
590
591 iwl_send_beacon_cmd(priv);
592 }
593
594 /**
595 * iwl_bg_statistics_periodic - Timer callback to queue statistics
596 *
597 * This callback is provided in order to send a statistics request.
598 *
599 * This timer function is continually reset to execute within
600 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
601 * was received. We need to ensure we receive the statistics in order
602 * to update the temperature used for calibrating the TXPOWER.
603 */
604 static void iwl_bg_statistics_periodic(unsigned long data)
605 {
606 struct iwl_priv *priv = (struct iwl_priv *)data;
607
608 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
609 return;
610
611 /* dont send host command if rf-kill is on */
612 if (!iwl_is_ready_rf(priv))
613 return;
614
615 iwl_send_statistics_request(priv, CMD_ASYNC, false);
616 }
617
618 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
619 struct iwl_rx_mem_buffer *rxb)
620 {
621 #ifdef CONFIG_IWLWIFI_DEBUG
622 struct iwl_rx_packet *pkt = rxb_addr(rxb);
623 struct iwl4965_beacon_notif *beacon =
624 (struct iwl4965_beacon_notif *)pkt->u.raw;
625 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
626
627 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
628 "tsf %d %d rate %d\n",
629 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
630 beacon->beacon_notify_hdr.failure_frame,
631 le32_to_cpu(beacon->ibss_mgr_status),
632 le32_to_cpu(beacon->high_tsf),
633 le32_to_cpu(beacon->low_tsf), rate);
634 #endif
635
636 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
637 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
638 queue_work(priv->workqueue, &priv->beacon_update);
639 }
640
641 /* Handle notification from uCode that card's power state is changing
642 * due to software, hardware, or critical temperature RFKILL */
643 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
644 struct iwl_rx_mem_buffer *rxb)
645 {
646 struct iwl_rx_packet *pkt = rxb_addr(rxb);
647 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
648 unsigned long status = priv->status;
649
650 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
651 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
652 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
653
654 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
655 RF_CARD_DISABLED)) {
656
657 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
658 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
659
660 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
661 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
662
663 if (!(flags & RXON_CARD_DISABLED)) {
664 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
665 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
666 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
667 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
668 }
669 if (flags & RF_CARD_DISABLED)
670 iwl_tt_enter_ct_kill(priv);
671 }
672 if (!(flags & RF_CARD_DISABLED))
673 iwl_tt_exit_ct_kill(priv);
674
675 if (flags & HW_CARD_DISABLED)
676 set_bit(STATUS_RF_KILL_HW, &priv->status);
677 else
678 clear_bit(STATUS_RF_KILL_HW, &priv->status);
679
680
681 if (!(flags & RXON_CARD_DISABLED))
682 iwl_scan_cancel(priv);
683
684 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
685 test_bit(STATUS_RF_KILL_HW, &priv->status)))
686 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
687 test_bit(STATUS_RF_KILL_HW, &priv->status));
688 else
689 wake_up_interruptible(&priv->wait_command_queue);
690 }
691
692 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
693 {
694 if (src == IWL_PWR_SRC_VAUX) {
695 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
696 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
697 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
698 ~APMG_PS_CTRL_MSK_PWR_SRC);
699 } else {
700 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
701 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
702 ~APMG_PS_CTRL_MSK_PWR_SRC);
703 }
704
705 return 0;
706 }
707
708 /**
709 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
710 *
711 * Setup the RX handlers for each of the reply types sent from the uCode
712 * to the host.
713 *
714 * This function chains into the hardware specific files for them to setup
715 * any hardware specific handlers as well.
716 */
717 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
718 {
719 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
720 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
721 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
722 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
723 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
724 iwl_rx_pm_debug_statistics_notif;
725 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
726
727 /*
728 * The same handler is used for both the REPLY to a discrete
729 * statistics request from the host as well as for the periodic
730 * statistics notifications (after received beacons) from the uCode.
731 */
732 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
733 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
734
735 iwl_setup_spectrum_handlers(priv);
736 iwl_setup_rx_scan_handlers(priv);
737
738 /* status change handler */
739 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
740
741 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
742 iwl_rx_missed_beacon_notif;
743 /* Rx handlers */
744 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
745 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
746 /* block ack */
747 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
748 /* Set up hardware specific Rx handlers */
749 priv->cfg->ops->lib->rx_handler_setup(priv);
750 }
751
752 /**
753 * iwl_rx_handle - Main entry function for receiving responses from uCode
754 *
755 * Uses the priv->rx_handlers callback function array to invoke
756 * the appropriate handlers, including command responses,
757 * frame-received notifications, and other notifications.
758 */
759 void iwl_rx_handle(struct iwl_priv *priv)
760 {
761 struct iwl_rx_mem_buffer *rxb;
762 struct iwl_rx_packet *pkt;
763 struct iwl_rx_queue *rxq = &priv->rxq;
764 u32 r, i;
765 int reclaim;
766 unsigned long flags;
767 u8 fill_rx = 0;
768 u32 count = 8;
769 int total_empty;
770
771 /* uCode's read index (stored in shared DRAM) indicates the last Rx
772 * buffer that the driver may process (last buffer filled by ucode). */
773 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
774 i = rxq->read;
775
776 /* Rx interrupt, but nothing sent from uCode */
777 if (i == r)
778 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
779
780 /* calculate total frames need to be restock after handling RX */
781 total_empty = r - rxq->write_actual;
782 if (total_empty < 0)
783 total_empty += RX_QUEUE_SIZE;
784
785 if (total_empty > (RX_QUEUE_SIZE / 2))
786 fill_rx = 1;
787
788 while (i != r) {
789 rxb = rxq->queue[i];
790
791 /* If an RXB doesn't have a Rx queue slot associated with it,
792 * then a bug has been introduced in the queue refilling
793 * routines -- catch it here */
794 BUG_ON(rxb == NULL);
795
796 rxq->queue[i] = NULL;
797
798 pci_unmap_page(priv->pci_dev, rxb->page_dma,
799 PAGE_SIZE << priv->hw_params.rx_page_order,
800 PCI_DMA_FROMDEVICE);
801 pkt = rxb_addr(rxb);
802
803 trace_iwlwifi_dev_rx(priv, pkt,
804 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
805
806 /* Reclaim a command buffer only if this packet is a response
807 * to a (driver-originated) command.
808 * If the packet (e.g. Rx frame) originated from uCode,
809 * there is no command buffer to reclaim.
810 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
811 * but apparently a few don't get set; catch them here. */
812 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
813 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
814 (pkt->hdr.cmd != REPLY_RX) &&
815 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
816 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
817 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
818 (pkt->hdr.cmd != REPLY_TX);
819
820 /* Based on type of command response or notification,
821 * handle those that need handling via function in
822 * rx_handlers table. See iwl_setup_rx_handlers() */
823 if (priv->rx_handlers[pkt->hdr.cmd]) {
824 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
825 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
826 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
827 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
828 } else {
829 /* No handling needed */
830 IWL_DEBUG_RX(priv,
831 "r %d i %d No handler needed for %s, 0x%02x\n",
832 r, i, get_cmd_string(pkt->hdr.cmd),
833 pkt->hdr.cmd);
834 }
835
836 /*
837 * XXX: After here, we should always check rxb->page
838 * against NULL before touching it or its virtual
839 * memory (pkt). Because some rx_handler might have
840 * already taken or freed the pages.
841 */
842
843 if (reclaim) {
844 /* Invoke any callbacks, transfer the buffer to caller,
845 * and fire off the (possibly) blocking iwl_send_cmd()
846 * as we reclaim the driver command queue */
847 if (rxb->page)
848 iwl_tx_cmd_complete(priv, rxb);
849 else
850 IWL_WARN(priv, "Claim null rxb?\n");
851 }
852
853 /* Reuse the page if possible. For notification packets and
854 * SKBs that fail to Rx correctly, add them back into the
855 * rx_free list for reuse later. */
856 spin_lock_irqsave(&rxq->lock, flags);
857 if (rxb->page != NULL) {
858 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
859 0, PAGE_SIZE << priv->hw_params.rx_page_order,
860 PCI_DMA_FROMDEVICE);
861 list_add_tail(&rxb->list, &rxq->rx_free);
862 rxq->free_count++;
863 } else
864 list_add_tail(&rxb->list, &rxq->rx_used);
865
866 spin_unlock_irqrestore(&rxq->lock, flags);
867
868 i = (i + 1) & RX_QUEUE_MASK;
869 /* If there are a lot of unused frames,
870 * restock the Rx queue so ucode wont assert. */
871 if (fill_rx) {
872 count++;
873 if (count >= 8) {
874 rxq->read = i;
875 iwl_rx_replenish_now(priv);
876 count = 0;
877 }
878 }
879 }
880
881 /* Backtrack one entry */
882 rxq->read = i;
883 if (fill_rx)
884 iwl_rx_replenish_now(priv);
885 else
886 iwl_rx_queue_restock(priv);
887 }
888
889 /* call this function to flush any scheduled tasklet */
890 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
891 {
892 /* wait to make sure we flush pending tasklet*/
893 synchronize_irq(priv->pci_dev->irq);
894 tasklet_kill(&priv->irq_tasklet);
895 }
896
897 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
898 {
899 u32 inta, handled = 0;
900 u32 inta_fh;
901 unsigned long flags;
902 u32 i;
903 #ifdef CONFIG_IWLWIFI_DEBUG
904 u32 inta_mask;
905 #endif
906
907 spin_lock_irqsave(&priv->lock, flags);
908
909 /* Ack/clear/reset pending uCode interrupts.
910 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
911 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
912 inta = iwl_read32(priv, CSR_INT);
913 iwl_write32(priv, CSR_INT, inta);
914
915 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
916 * Any new interrupts that happen after this, either while we're
917 * in this tasklet, or later, will show up in next ISR/tasklet. */
918 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
919 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
920
921 #ifdef CONFIG_IWLWIFI_DEBUG
922 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
923 /* just for debug */
924 inta_mask = iwl_read32(priv, CSR_INT_MASK);
925 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
926 inta, inta_mask, inta_fh);
927 }
928 #endif
929
930 spin_unlock_irqrestore(&priv->lock, flags);
931
932 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
933 * atomic, make sure that inta covers all the interrupts that
934 * we've discovered, even if FH interrupt came in just after
935 * reading CSR_INT. */
936 if (inta_fh & CSR49_FH_INT_RX_MASK)
937 inta |= CSR_INT_BIT_FH_RX;
938 if (inta_fh & CSR49_FH_INT_TX_MASK)
939 inta |= CSR_INT_BIT_FH_TX;
940
941 /* Now service all interrupt bits discovered above. */
942 if (inta & CSR_INT_BIT_HW_ERR) {
943 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
944
945 /* Tell the device to stop sending interrupts */
946 iwl_disable_interrupts(priv);
947
948 priv->isr_stats.hw++;
949 iwl_irq_handle_error(priv);
950
951 handled |= CSR_INT_BIT_HW_ERR;
952
953 return;
954 }
955
956 #ifdef CONFIG_IWLWIFI_DEBUG
957 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
958 /* NIC fires this, but we don't use it, redundant with WAKEUP */
959 if (inta & CSR_INT_BIT_SCD) {
960 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
961 "the frame/frames.\n");
962 priv->isr_stats.sch++;
963 }
964
965 /* Alive notification via Rx interrupt will do the real work */
966 if (inta & CSR_INT_BIT_ALIVE) {
967 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
968 priv->isr_stats.alive++;
969 }
970 }
971 #endif
972 /* Safely ignore these bits for debug checks below */
973 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
974
975 /* HW RF KILL switch toggled */
976 if (inta & CSR_INT_BIT_RF_KILL) {
977 int hw_rf_kill = 0;
978 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
979 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
980 hw_rf_kill = 1;
981
982 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
983 hw_rf_kill ? "disable radio" : "enable radio");
984
985 priv->isr_stats.rfkill++;
986
987 /* driver only loads ucode once setting the interface up.
988 * the driver allows loading the ucode even if the radio
989 * is killed. Hence update the killswitch state here. The
990 * rfkill handler will care about restarting if needed.
991 */
992 if (!test_bit(STATUS_ALIVE, &priv->status)) {
993 if (hw_rf_kill)
994 set_bit(STATUS_RF_KILL_HW, &priv->status);
995 else
996 clear_bit(STATUS_RF_KILL_HW, &priv->status);
997 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
998 }
999
1000 handled |= CSR_INT_BIT_RF_KILL;
1001 }
1002
1003 /* Chip got too hot and stopped itself */
1004 if (inta & CSR_INT_BIT_CT_KILL) {
1005 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1006 priv->isr_stats.ctkill++;
1007 handled |= CSR_INT_BIT_CT_KILL;
1008 }
1009
1010 /* Error detected by uCode */
1011 if (inta & CSR_INT_BIT_SW_ERR) {
1012 IWL_ERR(priv, "Microcode SW error detected. "
1013 " Restarting 0x%X.\n", inta);
1014 priv->isr_stats.sw++;
1015 priv->isr_stats.sw_err = inta;
1016 iwl_irq_handle_error(priv);
1017 handled |= CSR_INT_BIT_SW_ERR;
1018 }
1019
1020 /*
1021 * uCode wakes up after power-down sleep.
1022 * Tell device about any new tx or host commands enqueued,
1023 * and about any Rx buffers made available while asleep.
1024 */
1025 if (inta & CSR_INT_BIT_WAKEUP) {
1026 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1027 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1028 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1029 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1030 priv->isr_stats.wakeup++;
1031 handled |= CSR_INT_BIT_WAKEUP;
1032 }
1033
1034 /* All uCode command responses, including Tx command responses,
1035 * Rx "responses" (frame-received notification), and other
1036 * notifications from uCode come through here*/
1037 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1038 iwl_rx_handle(priv);
1039 priv->isr_stats.rx++;
1040 iwl_leds_background(priv);
1041 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1042 }
1043
1044 /* This "Tx" DMA channel is used only for loading uCode */
1045 if (inta & CSR_INT_BIT_FH_TX) {
1046 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1047 priv->isr_stats.tx++;
1048 handled |= CSR_INT_BIT_FH_TX;
1049 /* Wake up uCode load routine, now that load is complete */
1050 priv->ucode_write_complete = 1;
1051 wake_up_interruptible(&priv->wait_command_queue);
1052 }
1053
1054 if (inta & ~handled) {
1055 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1056 priv->isr_stats.unhandled++;
1057 }
1058
1059 if (inta & ~(priv->inta_mask)) {
1060 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1061 inta & ~priv->inta_mask);
1062 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1063 }
1064
1065 /* Re-enable all interrupts */
1066 /* only Re-enable if diabled by irq */
1067 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1068 iwl_enable_interrupts(priv);
1069
1070 #ifdef CONFIG_IWLWIFI_DEBUG
1071 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1072 inta = iwl_read32(priv, CSR_INT);
1073 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1074 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1075 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1076 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1077 }
1078 #endif
1079 }
1080
1081 /* tasklet for iwlagn interrupt */
1082 static void iwl_irq_tasklet(struct iwl_priv *priv)
1083 {
1084 u32 inta = 0;
1085 u32 handled = 0;
1086 unsigned long flags;
1087 u32 i;
1088 #ifdef CONFIG_IWLWIFI_DEBUG
1089 u32 inta_mask;
1090 #endif
1091
1092 spin_lock_irqsave(&priv->lock, flags);
1093
1094 /* Ack/clear/reset pending uCode interrupts.
1095 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1096 */
1097 iwl_write32(priv, CSR_INT, priv->inta);
1098
1099 inta = priv->inta;
1100
1101 #ifdef CONFIG_IWLWIFI_DEBUG
1102 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1103 /* just for debug */
1104 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1105 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1106 inta, inta_mask);
1107 }
1108 #endif
1109
1110 spin_unlock_irqrestore(&priv->lock, flags);
1111
1112 /* saved interrupt in inta variable now we can reset priv->inta */
1113 priv->inta = 0;
1114
1115 /* Now service all interrupt bits discovered above. */
1116 if (inta & CSR_INT_BIT_HW_ERR) {
1117 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1118
1119 /* Tell the device to stop sending interrupts */
1120 iwl_disable_interrupts(priv);
1121
1122 priv->isr_stats.hw++;
1123 iwl_irq_handle_error(priv);
1124
1125 handled |= CSR_INT_BIT_HW_ERR;
1126
1127 return;
1128 }
1129
1130 #ifdef CONFIG_IWLWIFI_DEBUG
1131 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1132 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1133 if (inta & CSR_INT_BIT_SCD) {
1134 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1135 "the frame/frames.\n");
1136 priv->isr_stats.sch++;
1137 }
1138
1139 /* Alive notification via Rx interrupt will do the real work */
1140 if (inta & CSR_INT_BIT_ALIVE) {
1141 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1142 priv->isr_stats.alive++;
1143 }
1144 }
1145 #endif
1146 /* Safely ignore these bits for debug checks below */
1147 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1148
1149 /* HW RF KILL switch toggled */
1150 if (inta & CSR_INT_BIT_RF_KILL) {
1151 int hw_rf_kill = 0;
1152 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1153 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1154 hw_rf_kill = 1;
1155
1156 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1157 hw_rf_kill ? "disable radio" : "enable radio");
1158
1159 priv->isr_stats.rfkill++;
1160
1161 /* driver only loads ucode once setting the interface up.
1162 * the driver allows loading the ucode even if the radio
1163 * is killed. Hence update the killswitch state here. The
1164 * rfkill handler will care about restarting if needed.
1165 */
1166 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1167 if (hw_rf_kill)
1168 set_bit(STATUS_RF_KILL_HW, &priv->status);
1169 else
1170 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1171 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1172 }
1173
1174 handled |= CSR_INT_BIT_RF_KILL;
1175 }
1176
1177 /* Chip got too hot and stopped itself */
1178 if (inta & CSR_INT_BIT_CT_KILL) {
1179 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1180 priv->isr_stats.ctkill++;
1181 handled |= CSR_INT_BIT_CT_KILL;
1182 }
1183
1184 /* Error detected by uCode */
1185 if (inta & CSR_INT_BIT_SW_ERR) {
1186 IWL_ERR(priv, "Microcode SW error detected. "
1187 " Restarting 0x%X.\n", inta);
1188 priv->isr_stats.sw++;
1189 priv->isr_stats.sw_err = inta;
1190 iwl_irq_handle_error(priv);
1191 handled |= CSR_INT_BIT_SW_ERR;
1192 }
1193
1194 /* uCode wakes up after power-down sleep */
1195 if (inta & CSR_INT_BIT_WAKEUP) {
1196 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1197 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1198 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1199 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1200
1201 priv->isr_stats.wakeup++;
1202
1203 handled |= CSR_INT_BIT_WAKEUP;
1204 }
1205
1206 /* All uCode command responses, including Tx command responses,
1207 * Rx "responses" (frame-received notification), and other
1208 * notifications from uCode come through here*/
1209 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1210 CSR_INT_BIT_RX_PERIODIC)) {
1211 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1212 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1213 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1214 iwl_write32(priv, CSR_FH_INT_STATUS,
1215 CSR49_FH_INT_RX_MASK);
1216 }
1217 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1218 handled |= CSR_INT_BIT_RX_PERIODIC;
1219 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1220 }
1221 /* Sending RX interrupt require many steps to be done in the
1222 * the device:
1223 * 1- write interrupt to current index in ICT table.
1224 * 2- dma RX frame.
1225 * 3- update RX shared data to indicate last write index.
1226 * 4- send interrupt.
1227 * This could lead to RX race, driver could receive RX interrupt
1228 * but the shared data changes does not reflect this.
1229 * this could lead to RX race, RX periodic will solve this race
1230 */
1231 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1232 CSR_INT_PERIODIC_DIS);
1233 iwl_rx_handle(priv);
1234 /* Only set RX periodic if real RX is received. */
1235 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1236 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1237 CSR_INT_PERIODIC_ENA);
1238
1239 priv->isr_stats.rx++;
1240 iwl_leds_background(priv);
1241 }
1242
1243 /* This "Tx" DMA channel is used only for loading uCode */
1244 if (inta & CSR_INT_BIT_FH_TX) {
1245 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1246 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1247 priv->isr_stats.tx++;
1248 handled |= CSR_INT_BIT_FH_TX;
1249 /* Wake up uCode load routine, now that load is complete */
1250 priv->ucode_write_complete = 1;
1251 wake_up_interruptible(&priv->wait_command_queue);
1252 }
1253
1254 if (inta & ~handled) {
1255 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1256 priv->isr_stats.unhandled++;
1257 }
1258
1259 if (inta & ~(priv->inta_mask)) {
1260 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1261 inta & ~priv->inta_mask);
1262 }
1263
1264 /* Re-enable all interrupts */
1265 /* only Re-enable if diabled by irq */
1266 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1267 iwl_enable_interrupts(priv);
1268 }
1269
1270
1271 /******************************************************************************
1272 *
1273 * uCode download functions
1274 *
1275 ******************************************************************************/
1276
1277 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1278 {
1279 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1280 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1281 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1282 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1283 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1284 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1285 }
1286
1287 static void iwl_nic_start(struct iwl_priv *priv)
1288 {
1289 /* Remove all resets to allow NIC to operate */
1290 iwl_write32(priv, CSR_RESET, 0);
1291 }
1292
1293
1294 /**
1295 * iwl_read_ucode - Read uCode images from disk file.
1296 *
1297 * Copy into buffers for card to fetch via bus-mastering
1298 */
1299 static int iwl_read_ucode(struct iwl_priv *priv)
1300 {
1301 struct iwl_ucode_header *ucode;
1302 int ret = -EINVAL, index;
1303 const struct firmware *ucode_raw;
1304 const char *name_pre = priv->cfg->fw_name_pre;
1305 const unsigned int api_max = priv->cfg->ucode_api_max;
1306 const unsigned int api_min = priv->cfg->ucode_api_min;
1307 char buf[25];
1308 u8 *src;
1309 size_t len;
1310 u32 api_ver, build;
1311 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1312 u16 eeprom_ver;
1313
1314 /* Ask kernel firmware_class module to get the boot firmware off disk.
1315 * request_firmware() is synchronous, file is in memory on return. */
1316 for (index = api_max; index >= api_min; index--) {
1317 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1318 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1319 if (ret < 0) {
1320 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1321 buf, ret);
1322 if (ret == -ENOENT)
1323 continue;
1324 else
1325 goto error;
1326 } else {
1327 if (index < api_max)
1328 IWL_ERR(priv, "Loaded firmware %s, "
1329 "which is deprecated. "
1330 "Please use API v%u instead.\n",
1331 buf, api_max);
1332
1333 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1334 buf, ucode_raw->size);
1335 break;
1336 }
1337 }
1338
1339 if (ret < 0)
1340 goto error;
1341
1342 /* Make sure that we got at least the v1 header! */
1343 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1344 IWL_ERR(priv, "File size way too small!\n");
1345 ret = -EINVAL;
1346 goto err_release;
1347 }
1348
1349 /* Data from ucode file: header followed by uCode images */
1350 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1351
1352 priv->ucode_ver = le32_to_cpu(ucode->ver);
1353 api_ver = IWL_UCODE_API(priv->ucode_ver);
1354 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1355 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1356 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1357 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1358 init_data_size =
1359 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1360 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1361 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1362
1363 /* api_ver should match the api version forming part of the
1364 * firmware filename ... but we don't check for that and only rely
1365 * on the API version read from firmware header from here on forward */
1366
1367 if (api_ver < api_min || api_ver > api_max) {
1368 IWL_ERR(priv, "Driver unable to support your firmware API. "
1369 "Driver supports v%u, firmware is v%u.\n",
1370 api_max, api_ver);
1371 priv->ucode_ver = 0;
1372 ret = -EINVAL;
1373 goto err_release;
1374 }
1375 if (api_ver != api_max)
1376 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1377 "got v%u. New firmware can be obtained "
1378 "from http://www.intellinuxwireless.org.\n",
1379 api_max, api_ver);
1380
1381 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1382 IWL_UCODE_MAJOR(priv->ucode_ver),
1383 IWL_UCODE_MINOR(priv->ucode_ver),
1384 IWL_UCODE_API(priv->ucode_ver),
1385 IWL_UCODE_SERIAL(priv->ucode_ver));
1386
1387 snprintf(priv->hw->wiphy->fw_version,
1388 sizeof(priv->hw->wiphy->fw_version),
1389 "%u.%u.%u.%u",
1390 IWL_UCODE_MAJOR(priv->ucode_ver),
1391 IWL_UCODE_MINOR(priv->ucode_ver),
1392 IWL_UCODE_API(priv->ucode_ver),
1393 IWL_UCODE_SERIAL(priv->ucode_ver));
1394
1395 if (build)
1396 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1397
1398 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1399 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1400 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1401 ? "OTP" : "EEPROM", eeprom_ver);
1402
1403 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1404 priv->ucode_ver);
1405 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1406 inst_size);
1407 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1408 data_size);
1409 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1410 init_size);
1411 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1412 init_data_size);
1413 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1414 boot_size);
1415
1416 /* Verify size of file vs. image size info in file's header */
1417 if (ucode_raw->size !=
1418 priv->cfg->ops->ucode->get_header_size(api_ver) +
1419 inst_size + data_size + init_size +
1420 init_data_size + boot_size) {
1421
1422 IWL_DEBUG_INFO(priv,
1423 "uCode file size %d does not match expected size\n",
1424 (int)ucode_raw->size);
1425 ret = -EINVAL;
1426 goto err_release;
1427 }
1428
1429 /* Verify that uCode images will fit in card's SRAM */
1430 if (inst_size > priv->hw_params.max_inst_size) {
1431 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1432 inst_size);
1433 ret = -EINVAL;
1434 goto err_release;
1435 }
1436
1437 if (data_size > priv->hw_params.max_data_size) {
1438 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1439 data_size);
1440 ret = -EINVAL;
1441 goto err_release;
1442 }
1443 if (init_size > priv->hw_params.max_inst_size) {
1444 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1445 init_size);
1446 ret = -EINVAL;
1447 goto err_release;
1448 }
1449 if (init_data_size > priv->hw_params.max_data_size) {
1450 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1451 init_data_size);
1452 ret = -EINVAL;
1453 goto err_release;
1454 }
1455 if (boot_size > priv->hw_params.max_bsm_size) {
1456 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1457 boot_size);
1458 ret = -EINVAL;
1459 goto err_release;
1460 }
1461
1462 /* Allocate ucode buffers for card's bus-master loading ... */
1463
1464 /* Runtime instructions and 2 copies of data:
1465 * 1) unmodified from disk
1466 * 2) backup cache for save/restore during power-downs */
1467 priv->ucode_code.len = inst_size;
1468 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1469
1470 priv->ucode_data.len = data_size;
1471 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1472
1473 priv->ucode_data_backup.len = data_size;
1474 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1475
1476 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1477 !priv->ucode_data_backup.v_addr)
1478 goto err_pci_alloc;
1479
1480 /* Initialization instructions and data */
1481 if (init_size && init_data_size) {
1482 priv->ucode_init.len = init_size;
1483 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1484
1485 priv->ucode_init_data.len = init_data_size;
1486 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1487
1488 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1489 goto err_pci_alloc;
1490 }
1491
1492 /* Bootstrap (instructions only, no data) */
1493 if (boot_size) {
1494 priv->ucode_boot.len = boot_size;
1495 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1496
1497 if (!priv->ucode_boot.v_addr)
1498 goto err_pci_alloc;
1499 }
1500
1501 /* Copy images into buffers for card's bus-master reads ... */
1502
1503 /* Runtime instructions (first block of data in file) */
1504 len = inst_size;
1505 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1506 memcpy(priv->ucode_code.v_addr, src, len);
1507 src += len;
1508
1509 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1510 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1511
1512 /* Runtime data (2nd block)
1513 * NOTE: Copy into backup buffer will be done in iwl_up() */
1514 len = data_size;
1515 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1516 memcpy(priv->ucode_data.v_addr, src, len);
1517 memcpy(priv->ucode_data_backup.v_addr, src, len);
1518 src += len;
1519
1520 /* Initialization instructions (3rd block) */
1521 if (init_size) {
1522 len = init_size;
1523 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1524 len);
1525 memcpy(priv->ucode_init.v_addr, src, len);
1526 src += len;
1527 }
1528
1529 /* Initialization data (4th block) */
1530 if (init_data_size) {
1531 len = init_data_size;
1532 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1533 len);
1534 memcpy(priv->ucode_init_data.v_addr, src, len);
1535 src += len;
1536 }
1537
1538 /* Bootstrap instructions (5th block) */
1539 len = boot_size;
1540 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1541 memcpy(priv->ucode_boot.v_addr, src, len);
1542
1543 /* We have our copies now, allow OS release its copies */
1544 release_firmware(ucode_raw);
1545 return 0;
1546
1547 err_pci_alloc:
1548 IWL_ERR(priv, "failed to allocate pci memory\n");
1549 ret = -ENOMEM;
1550 iwl_dealloc_ucode_pci(priv);
1551
1552 err_release:
1553 release_firmware(ucode_raw);
1554
1555 error:
1556 return ret;
1557 }
1558
1559 #ifdef CONFIG_IWLWIFI_DEBUG
1560 static const char *desc_lookup_text[] = {
1561 "OK",
1562 "FAIL",
1563 "BAD_PARAM",
1564 "BAD_CHECKSUM",
1565 "NMI_INTERRUPT_WDG",
1566 "SYSASSERT",
1567 "FATAL_ERROR",
1568 "BAD_COMMAND",
1569 "HW_ERROR_TUNE_LOCK",
1570 "HW_ERROR_TEMPERATURE",
1571 "ILLEGAL_CHAN_FREQ",
1572 "VCC_NOT_STABLE",
1573 "FH_ERROR",
1574 "NMI_INTERRUPT_HOST",
1575 "NMI_INTERRUPT_ACTION_PT",
1576 "NMI_INTERRUPT_UNKNOWN",
1577 "UCODE_VERSION_MISMATCH",
1578 "HW_ERROR_ABS_LOCK",
1579 "HW_ERROR_CAL_LOCK_FAIL",
1580 "NMI_INTERRUPT_INST_ACTION_PT",
1581 "NMI_INTERRUPT_DATA_ACTION_PT",
1582 "NMI_TRM_HW_ER",
1583 "NMI_INTERRUPT_TRM",
1584 "NMI_INTERRUPT_BREAK_POINT"
1585 "DEBUG_0",
1586 "DEBUG_1",
1587 "DEBUG_2",
1588 "DEBUG_3",
1589 "UNKNOWN"
1590 };
1591
1592 static const char *desc_lookup(int i)
1593 {
1594 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1595
1596 if (i < 0 || i > max)
1597 i = max;
1598
1599 return desc_lookup_text[i];
1600 }
1601
1602 #define ERROR_START_OFFSET (1 * sizeof(u32))
1603 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1604
1605 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1606 {
1607 u32 data2, line;
1608 u32 desc, time, count, base, data1;
1609 u32 blink1, blink2, ilink1, ilink2;
1610
1611 if (priv->ucode_type == UCODE_INIT)
1612 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1613 else
1614 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1615
1616 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1617 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1618 return;
1619 }
1620
1621 count = iwl_read_targ_mem(priv, base);
1622
1623 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1624 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1625 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1626 priv->status, count);
1627 }
1628
1629 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1630 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1631 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1632 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1633 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1634 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1635 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1636 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1637 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1638
1639 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1640 blink1, blink2, ilink1, ilink2);
1641
1642 IWL_ERR(priv, "Desc Time "
1643 "data1 data2 line\n");
1644 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1645 desc_lookup(desc), desc, time, data1, data2, line);
1646 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1647 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1648 ilink1, ilink2);
1649
1650 }
1651
1652 #define EVENT_START_OFFSET (4 * sizeof(u32))
1653
1654 /**
1655 * iwl_print_event_log - Dump error event log to syslog
1656 *
1657 */
1658 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1659 u32 num_events, u32 mode)
1660 {
1661 u32 i;
1662 u32 base; /* SRAM byte address of event log header */
1663 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1664 u32 ptr; /* SRAM byte address of log data */
1665 u32 ev, time, data; /* event log data */
1666 unsigned long reg_flags;
1667
1668 if (num_events == 0)
1669 return;
1670 if (priv->ucode_type == UCODE_INIT)
1671 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1672 else
1673 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1674
1675 if (mode == 0)
1676 event_size = 2 * sizeof(u32);
1677 else
1678 event_size = 3 * sizeof(u32);
1679
1680 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1681
1682 /* Make sure device is powered up for SRAM reads */
1683 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1684 iwl_grab_nic_access(priv);
1685
1686 /* Set starting address; reads will auto-increment */
1687 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1688 rmb();
1689
1690 /* "time" is actually "data" for mode 0 (no timestamp).
1691 * place event id # at far right for easier visual parsing. */
1692 for (i = 0; i < num_events; i++) {
1693 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1694 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1695 if (mode == 0) {
1696 /* data, ev */
1697 trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1698 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1699 } else {
1700 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1701 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1702 time, data, ev);
1703 trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1704 }
1705 }
1706
1707 /* Allow device to power down */
1708 iwl_release_nic_access(priv);
1709 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1710 }
1711
1712 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1713 #define MAX_EVENT_LOG_SIZE (512)
1714
1715 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1716 {
1717 u32 base; /* SRAM byte address of event log header */
1718 u32 capacity; /* event log capacity in # entries */
1719 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1720 u32 num_wraps; /* # times uCode wrapped to top of log */
1721 u32 next_entry; /* index of next entry to be written by uCode */
1722 u32 size; /* # entries that we'll print */
1723
1724 if (priv->ucode_type == UCODE_INIT)
1725 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1726 else
1727 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1728
1729 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1730 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1731 return;
1732 }
1733
1734 /* event log header */
1735 capacity = iwl_read_targ_mem(priv, base);
1736 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1737 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1738 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1739
1740 if (capacity > MAX_EVENT_LOG_SIZE) {
1741 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1742 capacity, MAX_EVENT_LOG_SIZE);
1743 capacity = MAX_EVENT_LOG_SIZE;
1744 }
1745
1746 if (next_entry > MAX_EVENT_LOG_SIZE) {
1747 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1748 next_entry, MAX_EVENT_LOG_SIZE);
1749 next_entry = MAX_EVENT_LOG_SIZE;
1750 }
1751
1752 size = num_wraps ? capacity : next_entry;
1753
1754 /* bail out if nothing in log */
1755 if (size == 0) {
1756 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1757 return;
1758 }
1759
1760 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1761 size, num_wraps);
1762
1763 /* if uCode has wrapped back to top of log, start at the oldest entry,
1764 * i.e the next one that uCode would fill. */
1765 if (num_wraps)
1766 iwl_print_event_log(priv, next_entry,
1767 capacity - next_entry, mode);
1768 /* (then/else) start at top of log */
1769 iwl_print_event_log(priv, 0, next_entry, mode);
1770
1771 }
1772 #endif
1773
1774 /**
1775 * iwl_alive_start - called after REPLY_ALIVE notification received
1776 * from protocol/runtime uCode (initialization uCode's
1777 * Alive gets handled by iwl_init_alive_start()).
1778 */
1779 static void iwl_alive_start(struct iwl_priv *priv)
1780 {
1781 int ret = 0;
1782
1783 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1784
1785 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1786 /* We had an error bringing up the hardware, so take it
1787 * all the way back down so we can try again */
1788 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1789 goto restart;
1790 }
1791
1792 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1793 * This is a paranoid check, because we would not have gotten the
1794 * "runtime" alive if code weren't properly loaded. */
1795 if (iwl_verify_ucode(priv)) {
1796 /* Runtime instruction load was bad;
1797 * take it all the way back down so we can try again */
1798 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1799 goto restart;
1800 }
1801
1802 iwl_clear_stations_table(priv);
1803 ret = priv->cfg->ops->lib->alive_notify(priv);
1804 if (ret) {
1805 IWL_WARN(priv,
1806 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1807 goto restart;
1808 }
1809
1810 /* After the ALIVE response, we can send host commands to the uCode */
1811 set_bit(STATUS_ALIVE, &priv->status);
1812
1813 if (iwl_is_rfkill(priv))
1814 return;
1815
1816 ieee80211_wake_queues(priv->hw);
1817
1818 priv->active_rate = priv->rates_mask;
1819 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1820
1821 /* Configure Tx antenna selection based on H/W config */
1822 if (priv->cfg->ops->hcmd->set_tx_ant)
1823 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1824
1825 if (iwl_is_associated(priv)) {
1826 struct iwl_rxon_cmd *active_rxon =
1827 (struct iwl_rxon_cmd *)&priv->active_rxon;
1828 /* apply any changes in staging */
1829 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1830 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1831 } else {
1832 /* Initialize our rx_config data */
1833 iwl_connection_init_rx_config(priv, priv->iw_mode);
1834
1835 if (priv->cfg->ops->hcmd->set_rxon_chain)
1836 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1837
1838 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1839 }
1840
1841 /* Configure Bluetooth device coexistence support */
1842 iwl_send_bt_config(priv);
1843
1844 iwl_reset_run_time_calib(priv);
1845
1846 /* Configure the adapter for unassociated operation */
1847 iwlcore_commit_rxon(priv);
1848
1849 /* At this point, the NIC is initialized and operational */
1850 iwl_rf_kill_ct_config(priv);
1851
1852 iwl_leds_init(priv);
1853
1854 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1855 set_bit(STATUS_READY, &priv->status);
1856 wake_up_interruptible(&priv->wait_command_queue);
1857
1858 iwl_power_update_mode(priv, true);
1859
1860 /* reassociate for ADHOC mode */
1861 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1862 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1863 priv->vif);
1864 if (beacon)
1865 iwl_mac_beacon_update(priv->hw, beacon);
1866 }
1867
1868
1869 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1870 iwl_set_mode(priv, priv->iw_mode);
1871
1872 return;
1873
1874 restart:
1875 queue_work(priv->workqueue, &priv->restart);
1876 }
1877
1878 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1879
1880 static void __iwl_down(struct iwl_priv *priv)
1881 {
1882 unsigned long flags;
1883 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1884
1885 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1886
1887 if (!exit_pending)
1888 set_bit(STATUS_EXIT_PENDING, &priv->status);
1889
1890 iwl_clear_stations_table(priv);
1891
1892 /* Unblock any waiting calls */
1893 wake_up_interruptible_all(&priv->wait_command_queue);
1894
1895 /* Wipe out the EXIT_PENDING status bit if we are not actually
1896 * exiting the module */
1897 if (!exit_pending)
1898 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1899
1900 /* stop and reset the on-board processor */
1901 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1902
1903 /* tell the device to stop sending interrupts */
1904 spin_lock_irqsave(&priv->lock, flags);
1905 iwl_disable_interrupts(priv);
1906 spin_unlock_irqrestore(&priv->lock, flags);
1907 iwl_synchronize_irq(priv);
1908
1909 if (priv->mac80211_registered)
1910 ieee80211_stop_queues(priv->hw);
1911
1912 /* If we have not previously called iwl_init() then
1913 * clear all bits but the RF Kill bit and return */
1914 if (!iwl_is_init(priv)) {
1915 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1916 STATUS_RF_KILL_HW |
1917 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1918 STATUS_GEO_CONFIGURED |
1919 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1920 STATUS_EXIT_PENDING;
1921 goto exit;
1922 }
1923
1924 /* ...otherwise clear out all the status bits but the RF Kill
1925 * bit and continue taking the NIC down. */
1926 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1927 STATUS_RF_KILL_HW |
1928 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1929 STATUS_GEO_CONFIGURED |
1930 test_bit(STATUS_FW_ERROR, &priv->status) <<
1931 STATUS_FW_ERROR |
1932 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1933 STATUS_EXIT_PENDING;
1934
1935 /* device going down, Stop using ICT table */
1936 iwl_disable_ict(priv);
1937
1938 iwl_txq_ctx_stop(priv);
1939 iwl_rxq_stop(priv);
1940
1941 /* Power-down device's busmaster DMA clocks */
1942 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
1943 udelay(5);
1944
1945 /* Make sure (redundant) we've released our request to stay awake */
1946 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1947
1948 /* Stop the device, and put it in low power state */
1949 priv->cfg->ops->lib->apm_ops.stop(priv);
1950
1951 exit:
1952 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1953
1954 if (priv->ibss_beacon)
1955 dev_kfree_skb(priv->ibss_beacon);
1956 priv->ibss_beacon = NULL;
1957
1958 /* clear out any free frames */
1959 iwl_clear_free_frames(priv);
1960 }
1961
1962 static void iwl_down(struct iwl_priv *priv)
1963 {
1964 mutex_lock(&priv->mutex);
1965 __iwl_down(priv);
1966 mutex_unlock(&priv->mutex);
1967
1968 iwl_cancel_deferred_work(priv);
1969 }
1970
1971 #define HW_READY_TIMEOUT (50)
1972
1973 static int iwl_set_hw_ready(struct iwl_priv *priv)
1974 {
1975 int ret = 0;
1976
1977 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1978 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1979
1980 /* See if we got it */
1981 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1982 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1983 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1984 HW_READY_TIMEOUT);
1985 if (ret != -ETIMEDOUT)
1986 priv->hw_ready = true;
1987 else
1988 priv->hw_ready = false;
1989
1990 IWL_DEBUG_INFO(priv, "hardware %s\n",
1991 (priv->hw_ready == 1) ? "ready" : "not ready");
1992 return ret;
1993 }
1994
1995 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1996 {
1997 int ret = 0;
1998
1999 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2000
2001 ret = iwl_set_hw_ready(priv);
2002 if (priv->hw_ready)
2003 return ret;
2004
2005 /* If HW is not ready, prepare the conditions to check again */
2006 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2007 CSR_HW_IF_CONFIG_REG_PREPARE);
2008
2009 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2010 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2011 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2012
2013 /* HW should be ready by now, check again. */
2014 if (ret != -ETIMEDOUT)
2015 iwl_set_hw_ready(priv);
2016
2017 return ret;
2018 }
2019
2020 #define MAX_HW_RESTARTS 5
2021
2022 static int __iwl_up(struct iwl_priv *priv)
2023 {
2024 int i;
2025 int ret;
2026
2027 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2028 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2029 return -EIO;
2030 }
2031
2032 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2033 IWL_ERR(priv, "ucode not available for device bringup\n");
2034 return -EIO;
2035 }
2036
2037 iwl_prepare_card_hw(priv);
2038
2039 if (!priv->hw_ready) {
2040 IWL_WARN(priv, "Exit HW not ready\n");
2041 return -EIO;
2042 }
2043
2044 /* If platform's RF_KILL switch is NOT set to KILL */
2045 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2046 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2047 else
2048 set_bit(STATUS_RF_KILL_HW, &priv->status);
2049
2050 if (iwl_is_rfkill(priv)) {
2051 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2052
2053 iwl_enable_interrupts(priv);
2054 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2055 return 0;
2056 }
2057
2058 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2059
2060 ret = iwl_hw_nic_init(priv);
2061 if (ret) {
2062 IWL_ERR(priv, "Unable to init nic\n");
2063 return ret;
2064 }
2065
2066 /* make sure rfkill handshake bits are cleared */
2067 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2068 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2069 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2070
2071 /* clear (again), then enable host interrupts */
2072 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2073 iwl_enable_interrupts(priv);
2074
2075 /* really make sure rfkill handshake bits are cleared */
2076 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2077 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2078
2079 /* Copy original ucode data image from disk into backup cache.
2080 * This will be used to initialize the on-board processor's
2081 * data SRAM for a clean start when the runtime program first loads. */
2082 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2083 priv->ucode_data.len);
2084
2085 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2086
2087 iwl_clear_stations_table(priv);
2088
2089 /* load bootstrap state machine,
2090 * load bootstrap program into processor's memory,
2091 * prepare to load the "initialize" uCode */
2092 ret = priv->cfg->ops->lib->load_ucode(priv);
2093
2094 if (ret) {
2095 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2096 ret);
2097 continue;
2098 }
2099
2100 /* start card; "initialize" will load runtime ucode */
2101 iwl_nic_start(priv);
2102
2103 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2104
2105 return 0;
2106 }
2107
2108 set_bit(STATUS_EXIT_PENDING, &priv->status);
2109 __iwl_down(priv);
2110 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2111
2112 /* tried to restart and config the device for as long as our
2113 * patience could withstand */
2114 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2115 return -EIO;
2116 }
2117
2118
2119 /*****************************************************************************
2120 *
2121 * Workqueue callbacks
2122 *
2123 *****************************************************************************/
2124
2125 static void iwl_bg_init_alive_start(struct work_struct *data)
2126 {
2127 struct iwl_priv *priv =
2128 container_of(data, struct iwl_priv, init_alive_start.work);
2129
2130 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2131 return;
2132
2133 mutex_lock(&priv->mutex);
2134 priv->cfg->ops->lib->init_alive_start(priv);
2135 mutex_unlock(&priv->mutex);
2136 }
2137
2138 static void iwl_bg_alive_start(struct work_struct *data)
2139 {
2140 struct iwl_priv *priv =
2141 container_of(data, struct iwl_priv, alive_start.work);
2142
2143 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2144 return;
2145
2146 /* enable dram interrupt */
2147 iwl_reset_ict(priv);
2148
2149 mutex_lock(&priv->mutex);
2150 iwl_alive_start(priv);
2151 mutex_unlock(&priv->mutex);
2152 }
2153
2154 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2155 {
2156 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2157 run_time_calib_work);
2158
2159 mutex_lock(&priv->mutex);
2160
2161 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2162 test_bit(STATUS_SCANNING, &priv->status)) {
2163 mutex_unlock(&priv->mutex);
2164 return;
2165 }
2166
2167 if (priv->start_calib) {
2168 iwl_chain_noise_calibration(priv, &priv->statistics);
2169
2170 iwl_sensitivity_calibration(priv, &priv->statistics);
2171 }
2172
2173 mutex_unlock(&priv->mutex);
2174 return;
2175 }
2176
2177 static void iwl_bg_up(struct work_struct *data)
2178 {
2179 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2180
2181 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2182 return;
2183
2184 mutex_lock(&priv->mutex);
2185 __iwl_up(priv);
2186 mutex_unlock(&priv->mutex);
2187 }
2188
2189 static void iwl_bg_restart(struct work_struct *data)
2190 {
2191 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2192
2193 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2194 return;
2195
2196 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2197 mutex_lock(&priv->mutex);
2198 priv->vif = NULL;
2199 priv->is_open = 0;
2200 mutex_unlock(&priv->mutex);
2201 iwl_down(priv);
2202 ieee80211_restart_hw(priv->hw);
2203 } else {
2204 iwl_down(priv);
2205 queue_work(priv->workqueue, &priv->up);
2206 }
2207 }
2208
2209 static void iwl_bg_rx_replenish(struct work_struct *data)
2210 {
2211 struct iwl_priv *priv =
2212 container_of(data, struct iwl_priv, rx_replenish);
2213
2214 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2215 return;
2216
2217 mutex_lock(&priv->mutex);
2218 iwl_rx_replenish(priv);
2219 mutex_unlock(&priv->mutex);
2220 }
2221
2222 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2223
2224 void iwl_post_associate(struct iwl_priv *priv)
2225 {
2226 struct ieee80211_conf *conf = NULL;
2227 int ret = 0;
2228 unsigned long flags;
2229
2230 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2231 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2232 return;
2233 }
2234
2235 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2236 priv->assoc_id, priv->active_rxon.bssid_addr);
2237
2238
2239 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2240 return;
2241
2242
2243 if (!priv->vif || !priv->is_open)
2244 return;
2245
2246 iwl_scan_cancel_timeout(priv, 200);
2247
2248 conf = ieee80211_get_hw_conf(priv->hw);
2249
2250 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2251 iwlcore_commit_rxon(priv);
2252
2253 iwl_setup_rxon_timing(priv);
2254 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2255 sizeof(priv->rxon_timing), &priv->rxon_timing);
2256 if (ret)
2257 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2258 "Attempting to continue.\n");
2259
2260 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2261
2262 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2263
2264 if (priv->cfg->ops->hcmd->set_rxon_chain)
2265 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2266
2267 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2268
2269 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2270 priv->assoc_id, priv->beacon_int);
2271
2272 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2273 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2274 else
2275 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2276
2277 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2278 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2279 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2280 else
2281 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2282
2283 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2284 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2285
2286 }
2287
2288 iwlcore_commit_rxon(priv);
2289
2290 switch (priv->iw_mode) {
2291 case NL80211_IFTYPE_STATION:
2292 break;
2293
2294 case NL80211_IFTYPE_ADHOC:
2295
2296 /* assume default assoc id */
2297 priv->assoc_id = 1;
2298
2299 iwl_rxon_add_station(priv, priv->bssid, 0);
2300 iwl_send_beacon_cmd(priv);
2301
2302 break;
2303
2304 default:
2305 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2306 __func__, priv->iw_mode);
2307 break;
2308 }
2309
2310 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2311 priv->assoc_station_added = 1;
2312
2313 spin_lock_irqsave(&priv->lock, flags);
2314 iwl_activate_qos(priv, 0);
2315 spin_unlock_irqrestore(&priv->lock, flags);
2316
2317 /* the chain noise calibration will enabled PM upon completion
2318 * If chain noise has already been run, then we need to enable
2319 * power management here */
2320 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2321 iwl_power_update_mode(priv, false);
2322
2323 /* Enable Rx differential gain and sensitivity calibrations */
2324 iwl_chain_noise_reset(priv);
2325 priv->start_calib = 1;
2326
2327 }
2328
2329 /*****************************************************************************
2330 *
2331 * mac80211 entry point functions
2332 *
2333 *****************************************************************************/
2334
2335 #define UCODE_READY_TIMEOUT (4 * HZ)
2336
2337 /*
2338 * Not a mac80211 entry point function, but it fits in with all the
2339 * other mac80211 functions grouped here.
2340 */
2341 static int iwl_setup_mac(struct iwl_priv *priv)
2342 {
2343 int ret;
2344 struct ieee80211_hw *hw = priv->hw;
2345 hw->rate_control_algorithm = "iwl-agn-rs";
2346
2347 /* Tell mac80211 our characteristics */
2348 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2349 IEEE80211_HW_NOISE_DBM |
2350 IEEE80211_HW_AMPDU_AGGREGATION |
2351 IEEE80211_HW_SPECTRUM_MGMT;
2352
2353 if (!priv->cfg->broken_powersave)
2354 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2355 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2356
2357 hw->sta_data_size = sizeof(struct iwl_station_priv);
2358 hw->wiphy->interface_modes =
2359 BIT(NL80211_IFTYPE_STATION) |
2360 BIT(NL80211_IFTYPE_ADHOC);
2361
2362 hw->wiphy->custom_regulatory = true;
2363
2364 /* Firmware does not support this */
2365 hw->wiphy->disable_beacon_hints = true;
2366
2367 /*
2368 * For now, disable PS by default because it affects
2369 * RX performance significantly.
2370 */
2371 hw->wiphy->ps_default = false;
2372
2373 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2374 /* we create the 802.11 header and a zero-length SSID element */
2375 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2376
2377 /* Default value; 4 EDCA QOS priorities */
2378 hw->queues = 4;
2379
2380 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2381
2382 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2383 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2384 &priv->bands[IEEE80211_BAND_2GHZ];
2385 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2386 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2387 &priv->bands[IEEE80211_BAND_5GHZ];
2388
2389 ret = ieee80211_register_hw(priv->hw);
2390 if (ret) {
2391 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2392 return ret;
2393 }
2394 priv->mac80211_registered = 1;
2395
2396 return 0;
2397 }
2398
2399
2400 static int iwl_mac_start(struct ieee80211_hw *hw)
2401 {
2402 struct iwl_priv *priv = hw->priv;
2403 int ret;
2404
2405 IWL_DEBUG_MAC80211(priv, "enter\n");
2406
2407 /* we should be verifying the device is ready to be opened */
2408 mutex_lock(&priv->mutex);
2409
2410 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2411 * ucode filename and max sizes are card-specific. */
2412
2413 if (!priv->ucode_code.len) {
2414 ret = iwl_read_ucode(priv);
2415 if (ret) {
2416 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2417 mutex_unlock(&priv->mutex);
2418 return ret;
2419 }
2420 }
2421
2422 ret = __iwl_up(priv);
2423
2424 mutex_unlock(&priv->mutex);
2425
2426 if (ret)
2427 return ret;
2428
2429 if (iwl_is_rfkill(priv))
2430 goto out;
2431
2432 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2433
2434 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2435 * mac80211 will not be run successfully. */
2436 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2437 test_bit(STATUS_READY, &priv->status),
2438 UCODE_READY_TIMEOUT);
2439 if (!ret) {
2440 if (!test_bit(STATUS_READY, &priv->status)) {
2441 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2442 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2443 return -ETIMEDOUT;
2444 }
2445 }
2446
2447 iwl_led_start(priv);
2448
2449 out:
2450 priv->is_open = 1;
2451 IWL_DEBUG_MAC80211(priv, "leave\n");
2452 return 0;
2453 }
2454
2455 static void iwl_mac_stop(struct ieee80211_hw *hw)
2456 {
2457 struct iwl_priv *priv = hw->priv;
2458
2459 IWL_DEBUG_MAC80211(priv, "enter\n");
2460
2461 if (!priv->is_open)
2462 return;
2463
2464 priv->is_open = 0;
2465
2466 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2467 /* stop mac, cancel any scan request and clear
2468 * RXON_FILTER_ASSOC_MSK BIT
2469 */
2470 mutex_lock(&priv->mutex);
2471 iwl_scan_cancel_timeout(priv, 100);
2472 mutex_unlock(&priv->mutex);
2473 }
2474
2475 iwl_down(priv);
2476
2477 flush_workqueue(priv->workqueue);
2478
2479 /* enable interrupts again in order to receive rfkill changes */
2480 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2481 iwl_enable_interrupts(priv);
2482
2483 IWL_DEBUG_MAC80211(priv, "leave\n");
2484 }
2485
2486 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2487 {
2488 struct iwl_priv *priv = hw->priv;
2489
2490 IWL_DEBUG_MACDUMP(priv, "enter\n");
2491
2492 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2493 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2494
2495 if (iwl_tx_skb(priv, skb))
2496 dev_kfree_skb_any(skb);
2497
2498 IWL_DEBUG_MACDUMP(priv, "leave\n");
2499 return NETDEV_TX_OK;
2500 }
2501
2502 void iwl_config_ap(struct iwl_priv *priv)
2503 {
2504 int ret = 0;
2505 unsigned long flags;
2506
2507 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2508 return;
2509
2510 /* The following should be done only at AP bring up */
2511 if (!iwl_is_associated(priv)) {
2512
2513 /* RXON - unassoc (to set timing command) */
2514 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2515 iwlcore_commit_rxon(priv);
2516
2517 /* RXON Timing */
2518 iwl_setup_rxon_timing(priv);
2519 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2520 sizeof(priv->rxon_timing), &priv->rxon_timing);
2521 if (ret)
2522 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2523 "Attempting to continue.\n");
2524
2525 if (priv->cfg->ops->hcmd->set_rxon_chain)
2526 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2527
2528 /* FIXME: what should be the assoc_id for AP? */
2529 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2530 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2531 priv->staging_rxon.flags |=
2532 RXON_FLG_SHORT_PREAMBLE_MSK;
2533 else
2534 priv->staging_rxon.flags &=
2535 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2536
2537 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2538 if (priv->assoc_capability &
2539 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2540 priv->staging_rxon.flags |=
2541 RXON_FLG_SHORT_SLOT_MSK;
2542 else
2543 priv->staging_rxon.flags &=
2544 ~RXON_FLG_SHORT_SLOT_MSK;
2545
2546 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2547 priv->staging_rxon.flags &=
2548 ~RXON_FLG_SHORT_SLOT_MSK;
2549 }
2550 /* restore RXON assoc */
2551 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2552 iwlcore_commit_rxon(priv);
2553 spin_lock_irqsave(&priv->lock, flags);
2554 iwl_activate_qos(priv, 1);
2555 spin_unlock_irqrestore(&priv->lock, flags);
2556 iwl_add_bcast_station(priv);
2557 }
2558 iwl_send_beacon_cmd(priv);
2559
2560 /* FIXME - we need to add code here to detect a totally new
2561 * configuration, reset the AP, unassoc, rxon timing, assoc,
2562 * clear sta table, add BCAST sta... */
2563 }
2564
2565 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2566 struct ieee80211_key_conf *keyconf, const u8 *addr,
2567 u32 iv32, u16 *phase1key)
2568 {
2569
2570 struct iwl_priv *priv = hw->priv;
2571 IWL_DEBUG_MAC80211(priv, "enter\n");
2572
2573 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2574
2575 IWL_DEBUG_MAC80211(priv, "leave\n");
2576 }
2577
2578 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2579 struct ieee80211_vif *vif,
2580 struct ieee80211_sta *sta,
2581 struct ieee80211_key_conf *key)
2582 {
2583 struct iwl_priv *priv = hw->priv;
2584 const u8 *addr;
2585 int ret;
2586 u8 sta_id;
2587 bool is_default_wep_key = false;
2588
2589 IWL_DEBUG_MAC80211(priv, "enter\n");
2590
2591 if (priv->cfg->mod_params->sw_crypto) {
2592 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2593 return -EOPNOTSUPP;
2594 }
2595 addr = sta ? sta->addr : iwl_bcast_addr;
2596 sta_id = iwl_find_station(priv, addr);
2597 if (sta_id == IWL_INVALID_STATION) {
2598 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2599 addr);
2600 return -EINVAL;
2601
2602 }
2603
2604 mutex_lock(&priv->mutex);
2605 iwl_scan_cancel_timeout(priv, 100);
2606 mutex_unlock(&priv->mutex);
2607
2608 /* If we are getting WEP group key and we didn't receive any key mapping
2609 * so far, we are in legacy wep mode (group key only), otherwise we are
2610 * in 1X mode.
2611 * In legacy wep mode, we use another host command to the uCode */
2612 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2613 priv->iw_mode != NL80211_IFTYPE_AP) {
2614 if (cmd == SET_KEY)
2615 is_default_wep_key = !priv->key_mapping_key;
2616 else
2617 is_default_wep_key =
2618 (key->hw_key_idx == HW_KEY_DEFAULT);
2619 }
2620
2621 switch (cmd) {
2622 case SET_KEY:
2623 if (is_default_wep_key)
2624 ret = iwl_set_default_wep_key(priv, key);
2625 else
2626 ret = iwl_set_dynamic_key(priv, key, sta_id);
2627
2628 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2629 break;
2630 case DISABLE_KEY:
2631 if (is_default_wep_key)
2632 ret = iwl_remove_default_wep_key(priv, key);
2633 else
2634 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2635
2636 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2637 break;
2638 default:
2639 ret = -EINVAL;
2640 }
2641
2642 IWL_DEBUG_MAC80211(priv, "leave\n");
2643
2644 return ret;
2645 }
2646
2647 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2648 enum ieee80211_ampdu_mlme_action action,
2649 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2650 {
2651 struct iwl_priv *priv = hw->priv;
2652 int ret;
2653
2654 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2655 sta->addr, tid);
2656
2657 if (!(priv->cfg->sku & IWL_SKU_N))
2658 return -EACCES;
2659
2660 switch (action) {
2661 case IEEE80211_AMPDU_RX_START:
2662 IWL_DEBUG_HT(priv, "start Rx\n");
2663 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2664 case IEEE80211_AMPDU_RX_STOP:
2665 IWL_DEBUG_HT(priv, "stop Rx\n");
2666 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2667 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2668 return 0;
2669 else
2670 return ret;
2671 case IEEE80211_AMPDU_TX_START:
2672 IWL_DEBUG_HT(priv, "start Tx\n");
2673 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2674 case IEEE80211_AMPDU_TX_STOP:
2675 IWL_DEBUG_HT(priv, "stop Tx\n");
2676 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2677 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2678 return 0;
2679 else
2680 return ret;
2681 default:
2682 IWL_DEBUG_HT(priv, "unknown\n");
2683 return -EINVAL;
2684 break;
2685 }
2686 return 0;
2687 }
2688
2689 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2690 struct ieee80211_low_level_stats *stats)
2691 {
2692 struct iwl_priv *priv = hw->priv;
2693
2694 priv = hw->priv;
2695 IWL_DEBUG_MAC80211(priv, "enter\n");
2696 IWL_DEBUG_MAC80211(priv, "leave\n");
2697
2698 return 0;
2699 }
2700
2701 /*****************************************************************************
2702 *
2703 * sysfs attributes
2704 *
2705 *****************************************************************************/
2706
2707 #ifdef CONFIG_IWLWIFI_DEBUG
2708
2709 /*
2710 * The following adds a new attribute to the sysfs representation
2711 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2712 * used for controlling the debug level.
2713 *
2714 * See the level definitions in iwl for details.
2715 *
2716 * The debug_level being managed using sysfs below is a per device debug
2717 * level that is used instead of the global debug level if it (the per
2718 * device debug level) is set.
2719 */
2720 static ssize_t show_debug_level(struct device *d,
2721 struct device_attribute *attr, char *buf)
2722 {
2723 struct iwl_priv *priv = dev_get_drvdata(d);
2724 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2725 }
2726 static ssize_t store_debug_level(struct device *d,
2727 struct device_attribute *attr,
2728 const char *buf, size_t count)
2729 {
2730 struct iwl_priv *priv = dev_get_drvdata(d);
2731 unsigned long val;
2732 int ret;
2733
2734 ret = strict_strtoul(buf, 0, &val);
2735 if (ret)
2736 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2737 else {
2738 priv->debug_level = val;
2739 if (iwl_alloc_traffic_mem(priv))
2740 IWL_ERR(priv,
2741 "Not enough memory to generate traffic log\n");
2742 }
2743 return strnlen(buf, count);
2744 }
2745
2746 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2747 show_debug_level, store_debug_level);
2748
2749
2750 #endif /* CONFIG_IWLWIFI_DEBUG */
2751
2752
2753 static ssize_t show_temperature(struct device *d,
2754 struct device_attribute *attr, char *buf)
2755 {
2756 struct iwl_priv *priv = dev_get_drvdata(d);
2757
2758 if (!iwl_is_alive(priv))
2759 return -EAGAIN;
2760
2761 return sprintf(buf, "%d\n", priv->temperature);
2762 }
2763
2764 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2765
2766 static ssize_t show_tx_power(struct device *d,
2767 struct device_attribute *attr, char *buf)
2768 {
2769 struct iwl_priv *priv = dev_get_drvdata(d);
2770
2771 if (!iwl_is_ready_rf(priv))
2772 return sprintf(buf, "off\n");
2773 else
2774 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2775 }
2776
2777 static ssize_t store_tx_power(struct device *d,
2778 struct device_attribute *attr,
2779 const char *buf, size_t count)
2780 {
2781 struct iwl_priv *priv = dev_get_drvdata(d);
2782 unsigned long val;
2783 int ret;
2784
2785 ret = strict_strtoul(buf, 10, &val);
2786 if (ret)
2787 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2788 else {
2789 ret = iwl_set_tx_power(priv, val, false);
2790 if (ret)
2791 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2792 ret);
2793 else
2794 ret = count;
2795 }
2796 return ret;
2797 }
2798
2799 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2800
2801 static ssize_t show_flags(struct device *d,
2802 struct device_attribute *attr, char *buf)
2803 {
2804 struct iwl_priv *priv = dev_get_drvdata(d);
2805
2806 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2807 }
2808
2809 static ssize_t store_flags(struct device *d,
2810 struct device_attribute *attr,
2811 const char *buf, size_t count)
2812 {
2813 struct iwl_priv *priv = dev_get_drvdata(d);
2814 unsigned long val;
2815 u32 flags;
2816 int ret = strict_strtoul(buf, 0, &val);
2817 if (ret)
2818 return ret;
2819 flags = (u32)val;
2820
2821 mutex_lock(&priv->mutex);
2822 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2823 /* Cancel any currently running scans... */
2824 if (iwl_scan_cancel_timeout(priv, 100))
2825 IWL_WARN(priv, "Could not cancel scan.\n");
2826 else {
2827 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2828 priv->staging_rxon.flags = cpu_to_le32(flags);
2829 iwlcore_commit_rxon(priv);
2830 }
2831 }
2832 mutex_unlock(&priv->mutex);
2833
2834 return count;
2835 }
2836
2837 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2838
2839 static ssize_t show_filter_flags(struct device *d,
2840 struct device_attribute *attr, char *buf)
2841 {
2842 struct iwl_priv *priv = dev_get_drvdata(d);
2843
2844 return sprintf(buf, "0x%04X\n",
2845 le32_to_cpu(priv->active_rxon.filter_flags));
2846 }
2847
2848 static ssize_t store_filter_flags(struct device *d,
2849 struct device_attribute *attr,
2850 const char *buf, size_t count)
2851 {
2852 struct iwl_priv *priv = dev_get_drvdata(d);
2853 unsigned long val;
2854 u32 filter_flags;
2855 int ret = strict_strtoul(buf, 0, &val);
2856 if (ret)
2857 return ret;
2858 filter_flags = (u32)val;
2859
2860 mutex_lock(&priv->mutex);
2861 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2862 /* Cancel any currently running scans... */
2863 if (iwl_scan_cancel_timeout(priv, 100))
2864 IWL_WARN(priv, "Could not cancel scan.\n");
2865 else {
2866 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2867 "0x%04X\n", filter_flags);
2868 priv->staging_rxon.filter_flags =
2869 cpu_to_le32(filter_flags);
2870 iwlcore_commit_rxon(priv);
2871 }
2872 }
2873 mutex_unlock(&priv->mutex);
2874
2875 return count;
2876 }
2877
2878 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2879 store_filter_flags);
2880
2881
2882 static ssize_t show_statistics(struct device *d,
2883 struct device_attribute *attr, char *buf)
2884 {
2885 struct iwl_priv *priv = dev_get_drvdata(d);
2886 u32 size = sizeof(struct iwl_notif_statistics);
2887 u32 len = 0, ofs = 0;
2888 u8 *data = (u8 *)&priv->statistics;
2889 int rc = 0;
2890
2891 if (!iwl_is_alive(priv))
2892 return -EAGAIN;
2893
2894 mutex_lock(&priv->mutex);
2895 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
2896 mutex_unlock(&priv->mutex);
2897
2898 if (rc) {
2899 len = sprintf(buf,
2900 "Error sending statistics request: 0x%08X\n", rc);
2901 return len;
2902 }
2903
2904 while (size && (PAGE_SIZE - len)) {
2905 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2906 PAGE_SIZE - len, 1);
2907 len = strlen(buf);
2908 if (PAGE_SIZE - len)
2909 buf[len++] = '\n';
2910
2911 ofs += 16;
2912 size -= min(size, 16U);
2913 }
2914
2915 return len;
2916 }
2917
2918 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2919
2920 static ssize_t show_rts_ht_protection(struct device *d,
2921 struct device_attribute *attr, char *buf)
2922 {
2923 struct iwl_priv *priv = dev_get_drvdata(d);
2924
2925 return sprintf(buf, "%s\n",
2926 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2927 }
2928
2929 static ssize_t store_rts_ht_protection(struct device *d,
2930 struct device_attribute *attr,
2931 const char *buf, size_t count)
2932 {
2933 struct iwl_priv *priv = dev_get_drvdata(d);
2934 unsigned long val;
2935 int ret;
2936
2937 ret = strict_strtoul(buf, 10, &val);
2938 if (ret)
2939 IWL_INFO(priv, "Input is not in decimal form.\n");
2940 else {
2941 if (!iwl_is_associated(priv))
2942 priv->cfg->use_rts_for_ht = val ? true : false;
2943 else
2944 IWL_ERR(priv, "Sta associated with AP - "
2945 "Change protection mechanism is not allowed\n");
2946 ret = count;
2947 }
2948 return ret;
2949 }
2950
2951 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2952 show_rts_ht_protection, store_rts_ht_protection);
2953
2954
2955 /*****************************************************************************
2956 *
2957 * driver setup and teardown
2958 *
2959 *****************************************************************************/
2960
2961 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2962 {
2963 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2964
2965 init_waitqueue_head(&priv->wait_command_queue);
2966
2967 INIT_WORK(&priv->up, iwl_bg_up);
2968 INIT_WORK(&priv->restart, iwl_bg_restart);
2969 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2970 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2971 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2972 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2973 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2974
2975 iwl_setup_scan_deferred_work(priv);
2976
2977 if (priv->cfg->ops->lib->setup_deferred_work)
2978 priv->cfg->ops->lib->setup_deferred_work(priv);
2979
2980 init_timer(&priv->statistics_periodic);
2981 priv->statistics_periodic.data = (unsigned long)priv;
2982 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2983
2984 if (!priv->cfg->use_isr_legacy)
2985 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2986 iwl_irq_tasklet, (unsigned long)priv);
2987 else
2988 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2989 iwl_irq_tasklet_legacy, (unsigned long)priv);
2990 }
2991
2992 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2993 {
2994 if (priv->cfg->ops->lib->cancel_deferred_work)
2995 priv->cfg->ops->lib->cancel_deferred_work(priv);
2996
2997 cancel_delayed_work_sync(&priv->init_alive_start);
2998 cancel_delayed_work(&priv->scan_check);
2999 cancel_delayed_work(&priv->alive_start);
3000 cancel_work_sync(&priv->beacon_update);
3001 del_timer_sync(&priv->statistics_periodic);
3002 }
3003
3004 static void iwl_init_hw_rates(struct iwl_priv *priv,
3005 struct ieee80211_rate *rates)
3006 {
3007 int i;
3008
3009 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3010 rates[i].bitrate = iwl_rates[i].ieee * 5;
3011 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3012 rates[i].hw_value_short = i;
3013 rates[i].flags = 0;
3014 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3015 /*
3016 * If CCK != 1M then set short preamble rate flag.
3017 */
3018 rates[i].flags |=
3019 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3020 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3021 }
3022 }
3023 }
3024
3025 static int iwl_init_drv(struct iwl_priv *priv)
3026 {
3027 int ret;
3028
3029 priv->ibss_beacon = NULL;
3030
3031 spin_lock_init(&priv->lock);
3032 spin_lock_init(&priv->sta_lock);
3033 spin_lock_init(&priv->hcmd_lock);
3034
3035 INIT_LIST_HEAD(&priv->free_frames);
3036
3037 mutex_init(&priv->mutex);
3038
3039 /* Clear the driver's (not device's) station table */
3040 iwl_clear_stations_table(priv);
3041
3042 priv->ieee_channels = NULL;
3043 priv->ieee_rates = NULL;
3044 priv->band = IEEE80211_BAND_2GHZ;
3045
3046 priv->iw_mode = NL80211_IFTYPE_STATION;
3047 if (priv->cfg->support_sm_ps)
3048 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DYNAMIC;
3049 else
3050 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
3051
3052 /* Choose which receivers/antennas to use */
3053 if (priv->cfg->ops->hcmd->set_rxon_chain)
3054 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3055
3056 iwl_init_scan_params(priv);
3057
3058 iwl_reset_qos(priv);
3059
3060 priv->qos_data.qos_active = 0;
3061 priv->qos_data.qos_cap.val = 0;
3062
3063 priv->rates_mask = IWL_RATES_MASK;
3064 /* Set the tx_power_user_lmt to the lowest power level
3065 * this value will get overwritten by channel max power avg
3066 * from eeprom */
3067 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3068
3069 ret = iwl_init_channel_map(priv);
3070 if (ret) {
3071 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3072 goto err;
3073 }
3074
3075 ret = iwlcore_init_geos(priv);
3076 if (ret) {
3077 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3078 goto err_free_channel_map;
3079 }
3080 iwl_init_hw_rates(priv, priv->ieee_rates);
3081
3082 return 0;
3083
3084 err_free_channel_map:
3085 iwl_free_channel_map(priv);
3086 err:
3087 return ret;
3088 }
3089
3090 static void iwl_uninit_drv(struct iwl_priv *priv)
3091 {
3092 iwl_calib_free_results(priv);
3093 iwlcore_free_geos(priv);
3094 iwl_free_channel_map(priv);
3095 kfree(priv->scan);
3096 }
3097
3098 static struct attribute *iwl_sysfs_entries[] = {
3099 &dev_attr_flags.attr,
3100 &dev_attr_filter_flags.attr,
3101 &dev_attr_statistics.attr,
3102 &dev_attr_temperature.attr,
3103 &dev_attr_tx_power.attr,
3104 &dev_attr_rts_ht_protection.attr,
3105 #ifdef CONFIG_IWLWIFI_DEBUG
3106 &dev_attr_debug_level.attr,
3107 #endif
3108 NULL
3109 };
3110
3111 static struct attribute_group iwl_attribute_group = {
3112 .name = NULL, /* put in device directory */
3113 .attrs = iwl_sysfs_entries,
3114 };
3115
3116 static struct ieee80211_ops iwl_hw_ops = {
3117 .tx = iwl_mac_tx,
3118 .start = iwl_mac_start,
3119 .stop = iwl_mac_stop,
3120 .add_interface = iwl_mac_add_interface,
3121 .remove_interface = iwl_mac_remove_interface,
3122 .config = iwl_mac_config,
3123 .configure_filter = iwl_configure_filter,
3124 .set_key = iwl_mac_set_key,
3125 .update_tkip_key = iwl_mac_update_tkip_key,
3126 .get_stats = iwl_mac_get_stats,
3127 .get_tx_stats = iwl_mac_get_tx_stats,
3128 .conf_tx = iwl_mac_conf_tx,
3129 .reset_tsf = iwl_mac_reset_tsf,
3130 .bss_info_changed = iwl_bss_info_changed,
3131 .ampdu_action = iwl_mac_ampdu_action,
3132 .hw_scan = iwl_mac_hw_scan
3133 };
3134
3135 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3136 {
3137 int err = 0;
3138 struct iwl_priv *priv;
3139 struct ieee80211_hw *hw;
3140 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3141 unsigned long flags;
3142 u16 pci_cmd;
3143
3144 /************************
3145 * 1. Allocating HW data
3146 ************************/
3147
3148 /* Disabling hardware scan means that mac80211 will perform scans
3149 * "the hard way", rather than using device's scan. */
3150 if (cfg->mod_params->disable_hw_scan) {
3151 if (iwl_debug_level & IWL_DL_INFO)
3152 dev_printk(KERN_DEBUG, &(pdev->dev),
3153 "Disabling hw_scan\n");
3154 iwl_hw_ops.hw_scan = NULL;
3155 }
3156
3157 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3158 if (!hw) {
3159 err = -ENOMEM;
3160 goto out;
3161 }
3162 priv = hw->priv;
3163 /* At this point both hw and priv are allocated. */
3164
3165 SET_IEEE80211_DEV(hw, &pdev->dev);
3166
3167 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3168 priv->cfg = cfg;
3169 priv->pci_dev = pdev;
3170 priv->inta_mask = CSR_INI_SET_MASK;
3171
3172 #ifdef CONFIG_IWLWIFI_DEBUG
3173 atomic_set(&priv->restrict_refcnt, 0);
3174 #endif
3175 if (iwl_alloc_traffic_mem(priv))
3176 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3177
3178 /**************************
3179 * 2. Initializing PCI bus
3180 **************************/
3181 if (pci_enable_device(pdev)) {
3182 err = -ENODEV;
3183 goto out_ieee80211_free_hw;
3184 }
3185
3186 pci_set_master(pdev);
3187
3188 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3189 if (!err)
3190 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3191 if (err) {
3192 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3193 if (!err)
3194 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3195 /* both attempts failed: */
3196 if (err) {
3197 IWL_WARN(priv, "No suitable DMA available.\n");
3198 goto out_pci_disable_device;
3199 }
3200 }
3201
3202 err = pci_request_regions(pdev, DRV_NAME);
3203 if (err)
3204 goto out_pci_disable_device;
3205
3206 pci_set_drvdata(pdev, priv);
3207
3208
3209 /***********************
3210 * 3. Read REV register
3211 ***********************/
3212 priv->hw_base = pci_iomap(pdev, 0, 0);
3213 if (!priv->hw_base) {
3214 err = -ENODEV;
3215 goto out_pci_release_regions;
3216 }
3217
3218 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3219 (unsigned long long) pci_resource_len(pdev, 0));
3220 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3221
3222 /* this spin lock will be used in apm_ops.init and EEPROM access
3223 * we should init now
3224 */
3225 spin_lock_init(&priv->reg_lock);
3226 iwl_hw_detect(priv);
3227 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3228 priv->cfg->name, priv->hw_rev);
3229
3230 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3231 * PCI Tx retries from interfering with C3 CPU state */
3232 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3233
3234 iwl_prepare_card_hw(priv);
3235 if (!priv->hw_ready) {
3236 IWL_WARN(priv, "Failed, HW not ready\n");
3237 goto out_iounmap;
3238 }
3239
3240 /*****************
3241 * 4. Read EEPROM
3242 *****************/
3243 /* Read the EEPROM */
3244 err = iwl_eeprom_init(priv);
3245 if (err) {
3246 IWL_ERR(priv, "Unable to init EEPROM\n");
3247 goto out_iounmap;
3248 }
3249 err = iwl_eeprom_check_version(priv);
3250 if (err)
3251 goto out_free_eeprom;
3252
3253 /* extract MAC Address */
3254 iwl_eeprom_get_mac(priv, priv->mac_addr);
3255 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3256 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3257
3258 /************************
3259 * 5. Setup HW constants
3260 ************************/
3261 if (iwl_set_hw_params(priv)) {
3262 IWL_ERR(priv, "failed to set hw parameters\n");
3263 goto out_free_eeprom;
3264 }
3265
3266 /*******************
3267 * 6. Setup priv
3268 *******************/
3269
3270 err = iwl_init_drv(priv);
3271 if (err)
3272 goto out_free_eeprom;
3273 /* At this point both hw and priv are initialized. */
3274
3275 /********************
3276 * 7. Setup services
3277 ********************/
3278 spin_lock_irqsave(&priv->lock, flags);
3279 iwl_disable_interrupts(priv);
3280 spin_unlock_irqrestore(&priv->lock, flags);
3281
3282 pci_enable_msi(priv->pci_dev);
3283
3284 iwl_alloc_isr_ict(priv);
3285 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3286 IRQF_SHARED, DRV_NAME, priv);
3287 if (err) {
3288 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3289 goto out_disable_msi;
3290 }
3291 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3292 if (err) {
3293 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3294 goto out_free_irq;
3295 }
3296
3297 iwl_setup_deferred_work(priv);
3298 iwl_setup_rx_handlers(priv);
3299
3300 /**********************************
3301 * 8. Setup and register mac80211
3302 **********************************/
3303
3304 /* enable interrupts if needed: hw bug w/a */
3305 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3306 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3307 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3308 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3309 }
3310
3311 iwl_enable_interrupts(priv);
3312
3313 err = iwl_setup_mac(priv);
3314 if (err)
3315 goto out_remove_sysfs;
3316
3317 err = iwl_dbgfs_register(priv, DRV_NAME);
3318 if (err)
3319 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3320
3321 /* If platform's RF_KILL switch is NOT set to KILL */
3322 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3323 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3324 else
3325 set_bit(STATUS_RF_KILL_HW, &priv->status);
3326
3327 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3328 test_bit(STATUS_RF_KILL_HW, &priv->status));
3329
3330 iwl_power_initialize(priv);
3331 iwl_tt_initialize(priv);
3332 return 0;
3333
3334 out_remove_sysfs:
3335 destroy_workqueue(priv->workqueue);
3336 priv->workqueue = NULL;
3337 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3338 out_free_irq:
3339 free_irq(priv->pci_dev->irq, priv);
3340 iwl_free_isr_ict(priv);
3341 out_disable_msi:
3342 pci_disable_msi(priv->pci_dev);
3343 iwl_uninit_drv(priv);
3344 out_free_eeprom:
3345 iwl_eeprom_free(priv);
3346 out_iounmap:
3347 pci_iounmap(pdev, priv->hw_base);
3348 out_pci_release_regions:
3349 pci_set_drvdata(pdev, NULL);
3350 pci_release_regions(pdev);
3351 out_pci_disable_device:
3352 pci_disable_device(pdev);
3353 out_ieee80211_free_hw:
3354 iwl_free_traffic_mem(priv);
3355 ieee80211_free_hw(priv->hw);
3356 out:
3357 return err;
3358 }
3359
3360 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3361 {
3362 struct iwl_priv *priv = pci_get_drvdata(pdev);
3363 unsigned long flags;
3364
3365 if (!priv)
3366 return;
3367
3368 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3369
3370 iwl_dbgfs_unregister(priv);
3371 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3372
3373 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3374 * to be called and iwl_down since we are removing the device
3375 * we need to set STATUS_EXIT_PENDING bit.
3376 */
3377 set_bit(STATUS_EXIT_PENDING, &priv->status);
3378 if (priv->mac80211_registered) {
3379 ieee80211_unregister_hw(priv->hw);
3380 priv->mac80211_registered = 0;
3381 } else {
3382 iwl_down(priv);
3383 }
3384
3385 /*
3386 * Make sure device is reset to low power before unloading driver.
3387 * This may be redundant with iwl_down(), but there are paths to
3388 * run iwl_down() without calling apm_ops.stop(), and there are
3389 * paths to avoid running iwl_down() at all before leaving driver.
3390 * This (inexpensive) call *makes sure* device is reset.
3391 */
3392 priv->cfg->ops->lib->apm_ops.stop(priv);
3393
3394 iwl_tt_exit(priv);
3395
3396 /* make sure we flush any pending irq or
3397 * tasklet for the driver
3398 */
3399 spin_lock_irqsave(&priv->lock, flags);
3400 iwl_disable_interrupts(priv);
3401 spin_unlock_irqrestore(&priv->lock, flags);
3402
3403 iwl_synchronize_irq(priv);
3404
3405 iwl_dealloc_ucode_pci(priv);
3406
3407 if (priv->rxq.bd)
3408 iwl_rx_queue_free(priv, &priv->rxq);
3409 iwl_hw_txq_ctx_free(priv);
3410
3411 iwl_clear_stations_table(priv);
3412 iwl_eeprom_free(priv);
3413
3414
3415 /*netif_stop_queue(dev); */
3416 flush_workqueue(priv->workqueue);
3417
3418 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3419 * priv->workqueue... so we can't take down the workqueue
3420 * until now... */
3421 destroy_workqueue(priv->workqueue);
3422 priv->workqueue = NULL;
3423 iwl_free_traffic_mem(priv);
3424
3425 free_irq(priv->pci_dev->irq, priv);
3426 pci_disable_msi(priv->pci_dev);
3427 pci_iounmap(pdev, priv->hw_base);
3428 pci_release_regions(pdev);
3429 pci_disable_device(pdev);
3430 pci_set_drvdata(pdev, NULL);
3431
3432 iwl_uninit_drv(priv);
3433
3434 iwl_free_isr_ict(priv);
3435
3436 if (priv->ibss_beacon)
3437 dev_kfree_skb(priv->ibss_beacon);
3438
3439 ieee80211_free_hw(priv->hw);
3440 }
3441
3442
3443 /*****************************************************************************
3444 *
3445 * driver and module entry point
3446 *
3447 *****************************************************************************/
3448
3449 /* Hardware specific file defines the PCI IDs table for that hardware module */
3450 static struct pci_device_id iwl_hw_card_ids[] = {
3451 #ifdef CONFIG_IWL4965
3452 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3453 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3454 #endif /* CONFIG_IWL4965 */
3455 #ifdef CONFIG_IWL5000
3456 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3457 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3458 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3459 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3460 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3461 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3462 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3463 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3464 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3465 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3466 /* 5350 WiFi/WiMax */
3467 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3468 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3469 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3470 /* 5150 Wifi/WiMax */
3471 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3472 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3473
3474 /* 6x00 Series */
3475 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3476 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3477 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3478 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3479 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3480 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3481 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3482 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3483 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3484 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3485
3486 /* 6x50 WiFi/WiMax Series */
3487 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3488 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3489 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3490 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3491 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3492 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3493
3494 /* 1000 Series WiFi */
3495 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3496 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3497 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3498 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3499 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3500 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3501 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3502 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3503 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3504 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3505 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3506 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3507 #endif /* CONFIG_IWL5000 */
3508
3509 {0}
3510 };
3511 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3512
3513 static struct pci_driver iwl_driver = {
3514 .name = DRV_NAME,
3515 .id_table = iwl_hw_card_ids,
3516 .probe = iwl_pci_probe,
3517 .remove = __devexit_p(iwl_pci_remove),
3518 #ifdef CONFIG_PM
3519 .suspend = iwl_pci_suspend,
3520 .resume = iwl_pci_resume,
3521 #endif
3522 };
3523
3524 static int __init iwl_init(void)
3525 {
3526
3527 int ret;
3528 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3529 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3530
3531 ret = iwlagn_rate_control_register();
3532 if (ret) {
3533 printk(KERN_ERR DRV_NAME
3534 "Unable to register rate control algorithm: %d\n", ret);
3535 return ret;
3536 }
3537
3538 ret = pci_register_driver(&iwl_driver);
3539 if (ret) {
3540 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3541 goto error_register;
3542 }
3543
3544 return ret;
3545
3546 error_register:
3547 iwlagn_rate_control_unregister();
3548 return ret;
3549 }
3550
3551 static void __exit iwl_exit(void)
3552 {
3553 pci_unregister_driver(&iwl_driver);
3554 iwlagn_rate_control_unregister();
3555 }
3556
3557 module_exit(iwl_exit);
3558 module_init(iwl_init);
3559
3560 #ifdef CONFIG_IWLWIFI_DEBUG
3561 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3562 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3563 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3564 MODULE_PARM_DESC(debug, "debug output mask");
3565 #endif
3566
Linux kernel - Deliverables
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