1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
48 #include <net/mac80211.h>
50 #include <asm/div64.h>
52 #define DRV_NAME "iwlagn"
54 #include "iwl-eeprom.h"
58 #include "iwl-helpers.h"
60 #include "iwl-agn-calib.h"
64 /******************************************************************************
68 ******************************************************************************/
71 * module name, copyright, version, etc.
73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
75 #ifdef CONFIG_IWLWIFI_DEBUG
81 #define DRV_VERSION IWLWIFI_VERSION VD
84 MODULE_DESCRIPTION(DRV_DESCRIPTION
);
85 MODULE_VERSION(DRV_VERSION
);
86 MODULE_AUTHOR(DRV_COPYRIGHT
" " DRV_AUTHOR
);
87 MODULE_LICENSE("GPL");
89 static int iwlagn_ant_coupling
;
90 static bool iwlagn_bt_ch_announce
= 1;
92 void iwl_update_chain_flags(struct iwl_priv
*priv
)
94 struct iwl_rxon_context
*ctx
;
96 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
) {
97 for_each_context(priv
, ctx
) {
98 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
, ctx
);
99 if (ctx
->active
.rx_chain
!= ctx
->staging
.rx_chain
)
100 iwlcore_commit_rxon(priv
, ctx
);
105 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
106 static void iwl_set_beacon_tim(struct iwl_priv
*priv
,
107 struct iwl_tx_beacon_cmd
*tx_beacon_cmd
,
108 u8
*beacon
, u32 frame_size
)
111 struct ieee80211_mgmt
*mgmt
= (struct ieee80211_mgmt
*)beacon
;
114 * The index is relative to frame start but we start looking at the
115 * variable-length part of the beacon.
117 tim_idx
= mgmt
->u
.beacon
.variable
- beacon
;
119 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
120 while ((tim_idx
< (frame_size
- 2)) &&
121 (beacon
[tim_idx
] != WLAN_EID_TIM
))
122 tim_idx
+= beacon
[tim_idx
+1] + 2;
124 /* If TIM field was found, set variables */
125 if ((tim_idx
< (frame_size
- 1)) && (beacon
[tim_idx
] == WLAN_EID_TIM
)) {
126 tx_beacon_cmd
->tim_idx
= cpu_to_le16(tim_idx
);
127 tx_beacon_cmd
->tim_size
= beacon
[tim_idx
+1];
129 IWL_WARN(priv
, "Unable to find TIM Element in beacon\n");
132 int iwlagn_send_beacon_cmd(struct iwl_priv
*priv
)
134 struct iwl_tx_beacon_cmd
*tx_beacon_cmd
;
135 struct iwl_host_cmd cmd
= {
136 .id
= REPLY_TX_BEACON
,
137 .flags
= CMD_SIZE_HUGE
,
145 * We have to set up the TX command, the TX Beacon command, and the
149 lockdep_assert_held(&priv
->mutex
);
151 if (!priv
->beacon_ctx
) {
152 IWL_ERR(priv
, "trying to build beacon w/o beacon context!\n");
156 if (WARN_ON(!priv
->beacon_skb
))
159 /* Allocate beacon memory */
160 tx_beacon_cmd
= kzalloc(sizeof(*tx_beacon_cmd
) + priv
->beacon_skb
->len
,
165 frame_size
= priv
->beacon_skb
->len
;
167 /* Set up TX beacon contents */
168 memcpy(tx_beacon_cmd
->frame
, priv
->beacon_skb
->data
, frame_size
);
170 /* Set up TX command fields */
171 tx_beacon_cmd
->tx
.len
= cpu_to_le16((u16
)frame_size
);
172 tx_beacon_cmd
->tx
.sta_id
= priv
->beacon_ctx
->bcast_sta_id
;
173 tx_beacon_cmd
->tx
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
174 tx_beacon_cmd
->tx
.tx_flags
= TX_CMD_FLG_SEQ_CTL_MSK
|
175 TX_CMD_FLG_TSF_MSK
| TX_CMD_FLG_STA_RATE_MSK
;
177 /* Set up TX beacon command fields */
178 iwl_set_beacon_tim(priv
, tx_beacon_cmd
, (u8
*)tx_beacon_cmd
->frame
,
181 /* Set up packet rate and flags */
182 rate
= iwl_rate_get_lowest_plcp(priv
, priv
->beacon_ctx
);
183 priv
->mgmt_tx_ant
= iwl_toggle_tx_ant(priv
, priv
->mgmt_tx_ant
,
184 priv
->hw_params
.valid_tx_ant
);
185 rate_flags
= iwl_ant_idx_to_flags(priv
->mgmt_tx_ant
);
186 if ((rate
>= IWL_FIRST_CCK_RATE
) && (rate
<= IWL_LAST_CCK_RATE
))
187 rate_flags
|= RATE_MCS_CCK_MSK
;
188 tx_beacon_cmd
->tx
.rate_n_flags
= iwl_hw_set_rate_n_flags(rate
,
192 cmd
.len
= sizeof(*tx_beacon_cmd
) + frame_size
;
193 cmd
.data
= tx_beacon_cmd
;
195 err
= iwl_send_cmd_sync(priv
, &cmd
);
197 /* Free temporary storage */
198 kfree(tx_beacon_cmd
);
203 static inline dma_addr_t
iwl_tfd_tb_get_addr(struct iwl_tfd
*tfd
, u8 idx
)
205 struct iwl_tfd_tb
*tb
= &tfd
->tbs
[idx
];
207 dma_addr_t addr
= get_unaligned_le32(&tb
->lo
);
208 if (sizeof(dma_addr_t
) > sizeof(u32
))
210 ((dma_addr_t
)(le16_to_cpu(tb
->hi_n_len
) & 0xF) << 16) << 16;
215 static inline u16
iwl_tfd_tb_get_len(struct iwl_tfd
*tfd
, u8 idx
)
217 struct iwl_tfd_tb
*tb
= &tfd
->tbs
[idx
];
219 return le16_to_cpu(tb
->hi_n_len
) >> 4;
222 static inline void iwl_tfd_set_tb(struct iwl_tfd
*tfd
, u8 idx
,
223 dma_addr_t addr
, u16 len
)
225 struct iwl_tfd_tb
*tb
= &tfd
->tbs
[idx
];
226 u16 hi_n_len
= len
<< 4;
228 put_unaligned_le32(addr
, &tb
->lo
);
229 if (sizeof(dma_addr_t
) > sizeof(u32
))
230 hi_n_len
|= ((addr
>> 16) >> 16) & 0xF;
232 tb
->hi_n_len
= cpu_to_le16(hi_n_len
);
234 tfd
->num_tbs
= idx
+ 1;
237 static inline u8
iwl_tfd_get_num_tbs(struct iwl_tfd
*tfd
)
239 return tfd
->num_tbs
& 0x1f;
243 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
244 * @priv - driver private data
247 * Does NOT advance any TFD circular buffer read/write indexes
248 * Does NOT free the TFD itself (which is within circular buffer)
250 void iwl_hw_txq_free_tfd(struct iwl_priv
*priv
, struct iwl_tx_queue
*txq
)
252 struct iwl_tfd
*tfd_tmp
= (struct iwl_tfd
*)txq
->tfds
;
254 struct pci_dev
*dev
= priv
->pci_dev
;
255 int index
= txq
->q
.read_ptr
;
259 tfd
= &tfd_tmp
[index
];
261 /* Sanity check on number of chunks */
262 num_tbs
= iwl_tfd_get_num_tbs(tfd
);
264 if (num_tbs
>= IWL_NUM_OF_TBS
) {
265 IWL_ERR(priv
, "Too many chunks: %i\n", num_tbs
);
266 /* @todo issue fatal error, it is quite serious situation */
272 pci_unmap_single(dev
,
273 dma_unmap_addr(&txq
->meta
[index
], mapping
),
274 dma_unmap_len(&txq
->meta
[index
], len
),
275 PCI_DMA_BIDIRECTIONAL
);
277 /* Unmap chunks, if any. */
278 for (i
= 1; i
< num_tbs
; i
++)
279 pci_unmap_single(dev
, iwl_tfd_tb_get_addr(tfd
, i
),
280 iwl_tfd_tb_get_len(tfd
, i
), PCI_DMA_TODEVICE
);
286 skb
= txq
->txb
[txq
->q
.read_ptr
].skb
;
288 /* can be called from irqs-disabled context */
290 dev_kfree_skb_any(skb
);
291 txq
->txb
[txq
->q
.read_ptr
].skb
= NULL
;
296 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv
*priv
,
297 struct iwl_tx_queue
*txq
,
298 dma_addr_t addr
, u16 len
,
302 struct iwl_tfd
*tfd
, *tfd_tmp
;
306 tfd_tmp
= (struct iwl_tfd
*)txq
->tfds
;
307 tfd
= &tfd_tmp
[q
->write_ptr
];
310 memset(tfd
, 0, sizeof(*tfd
));
312 num_tbs
= iwl_tfd_get_num_tbs(tfd
);
314 /* Each TFD can point to a maximum 20 Tx buffers */
315 if (num_tbs
>= IWL_NUM_OF_TBS
) {
316 IWL_ERR(priv
, "Error can not send more than %d chunks\n",
321 if (WARN_ON(addr
& ~DMA_BIT_MASK(36)))
324 if (unlikely(addr
& ~IWL_TX_DMA_MASK
))
325 IWL_ERR(priv
, "Unaligned address = %llx\n",
326 (unsigned long long)addr
);
328 iwl_tfd_set_tb(tfd
, num_tbs
, addr
, len
);
334 * Tell nic where to find circular buffer of Tx Frame Descriptors for
335 * given Tx queue, and enable the DMA channel used for that queue.
337 * supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
338 * channels supported in hardware.
340 int iwl_hw_tx_queue_init(struct iwl_priv
*priv
,
341 struct iwl_tx_queue
*txq
)
343 int txq_id
= txq
->q
.id
;
345 /* Circular buffer (TFD queue in DRAM) physical base address */
346 iwl_write_direct32(priv
, FH_MEM_CBBC_QUEUE(txq_id
),
347 txq
->q
.dma_addr
>> 8);
352 static void iwl_bg_beacon_update(struct work_struct
*work
)
354 struct iwl_priv
*priv
=
355 container_of(work
, struct iwl_priv
, beacon_update
);
356 struct sk_buff
*beacon
;
358 mutex_lock(&priv
->mutex
);
359 if (!priv
->beacon_ctx
) {
360 IWL_ERR(priv
, "updating beacon w/o beacon context!\n");
364 if (priv
->beacon_ctx
->vif
->type
!= NL80211_IFTYPE_AP
) {
366 * The ucode will send beacon notifications even in
367 * IBSS mode, but we don't want to process them. But
368 * we need to defer the type check to here due to
369 * requiring locking around the beacon_ctx access.
374 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
375 beacon
= ieee80211_beacon_get(priv
->hw
, priv
->beacon_ctx
->vif
);
377 IWL_ERR(priv
, "update beacon failed -- keeping old\n");
381 /* new beacon skb is allocated every time; dispose previous.*/
382 dev_kfree_skb(priv
->beacon_skb
);
384 priv
->beacon_skb
= beacon
;
386 iwlagn_send_beacon_cmd(priv
);
388 mutex_unlock(&priv
->mutex
);
391 static void iwl_bg_bt_runtime_config(struct work_struct
*work
)
393 struct iwl_priv
*priv
=
394 container_of(work
, struct iwl_priv
, bt_runtime_config
);
396 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
399 /* dont send host command if rf-kill is on */
400 if (!iwl_is_ready_rf(priv
))
402 priv
->cfg
->ops
->hcmd
->send_bt_config(priv
);
405 static void iwl_bg_bt_full_concurrency(struct work_struct
*work
)
407 struct iwl_priv
*priv
=
408 container_of(work
, struct iwl_priv
, bt_full_concurrency
);
409 struct iwl_rxon_context
*ctx
;
411 mutex_lock(&priv
->mutex
);
413 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
416 /* dont send host command if rf-kill is on */
417 if (!iwl_is_ready_rf(priv
))
420 IWL_DEBUG_INFO(priv
, "BT coex in %s mode\n",
421 priv
->bt_full_concurrent
?
422 "full concurrency" : "3-wire");
425 * LQ & RXON updated cmds must be sent before BT Config cmd
426 * to avoid 3-wire collisions
428 for_each_context(priv
, ctx
) {
429 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
430 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
, ctx
);
431 iwlcore_commit_rxon(priv
, ctx
);
434 priv
->cfg
->ops
->hcmd
->send_bt_config(priv
);
436 mutex_unlock(&priv
->mutex
);
440 * iwl_bg_statistics_periodic - Timer callback to queue statistics
442 * This callback is provided in order to send a statistics request.
444 * This timer function is continually reset to execute within
445 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
446 * was received. We need to ensure we receive the statistics in order
447 * to update the temperature used for calibrating the TXPOWER.
449 static void iwl_bg_statistics_periodic(unsigned long data
)
451 struct iwl_priv
*priv
= (struct iwl_priv
*)data
;
453 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
456 /* dont send host command if rf-kill is on */
457 if (!iwl_is_ready_rf(priv
))
460 iwl_send_statistics_request(priv
, CMD_ASYNC
, false);
464 static void iwl_print_cont_event_trace(struct iwl_priv
*priv
, u32 base
,
465 u32 start_idx
, u32 num_events
,
469 u32 ptr
; /* SRAM byte address of log data */
470 u32 ev
, time
, data
; /* event log data */
471 unsigned long reg_flags
;
474 ptr
= base
+ (4 * sizeof(u32
)) + (start_idx
* 2 * sizeof(u32
));
476 ptr
= base
+ (4 * sizeof(u32
)) + (start_idx
* 3 * sizeof(u32
));
478 /* Make sure device is powered up for SRAM reads */
479 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
480 if (iwl_grab_nic_access(priv
)) {
481 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
485 /* Set starting address; reads will auto-increment */
486 iwl_write32(priv
, HBUS_TARG_MEM_RADDR
, ptr
);
490 * "time" is actually "data" for mode 0 (no timestamp).
491 * place event id # at far right for easier visual parsing.
493 for (i
= 0; i
< num_events
; i
++) {
494 ev
= iwl_read32(priv
, HBUS_TARG_MEM_RDAT
);
495 time
= iwl_read32(priv
, HBUS_TARG_MEM_RDAT
);
497 trace_iwlwifi_dev_ucode_cont_event(priv
,
500 data
= iwl_read32(priv
, HBUS_TARG_MEM_RDAT
);
501 trace_iwlwifi_dev_ucode_cont_event(priv
,
505 /* Allow device to power down */
506 iwl_release_nic_access(priv
);
507 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
510 static void iwl_continuous_event_trace(struct iwl_priv
*priv
)
512 u32 capacity
; /* event log capacity in # entries */
513 u32 base
; /* SRAM byte address of event log header */
514 u32 mode
; /* 0 - no timestamp, 1 - timestamp recorded */
515 u32 num_wraps
; /* # times uCode wrapped to top of log */
516 u32 next_entry
; /* index of next entry to be written by uCode */
518 base
= priv
->device_pointers
.error_event_table
;
519 if (priv
->cfg
->ops
->lib
->is_valid_rtc_data_addr(base
)) {
520 capacity
= iwl_read_targ_mem(priv
, base
);
521 num_wraps
= iwl_read_targ_mem(priv
, base
+ (2 * sizeof(u32
)));
522 mode
= iwl_read_targ_mem(priv
, base
+ (1 * sizeof(u32
)));
523 next_entry
= iwl_read_targ_mem(priv
, base
+ (3 * sizeof(u32
)));
527 if (num_wraps
== priv
->event_log
.num_wraps
) {
528 iwl_print_cont_event_trace(priv
,
529 base
, priv
->event_log
.next_entry
,
530 next_entry
- priv
->event_log
.next_entry
,
532 priv
->event_log
.non_wraps_count
++;
534 if ((num_wraps
- priv
->event_log
.num_wraps
) > 1)
535 priv
->event_log
.wraps_more_count
++;
537 priv
->event_log
.wraps_once_count
++;
538 trace_iwlwifi_dev_ucode_wrap_event(priv
,
539 num_wraps
- priv
->event_log
.num_wraps
,
540 next_entry
, priv
->event_log
.next_entry
);
541 if (next_entry
< priv
->event_log
.next_entry
) {
542 iwl_print_cont_event_trace(priv
, base
,
543 priv
->event_log
.next_entry
,
544 capacity
- priv
->event_log
.next_entry
,
547 iwl_print_cont_event_trace(priv
, base
, 0,
550 iwl_print_cont_event_trace(priv
, base
,
551 next_entry
, capacity
- next_entry
,
554 iwl_print_cont_event_trace(priv
, base
, 0,
558 priv
->event_log
.num_wraps
= num_wraps
;
559 priv
->event_log
.next_entry
= next_entry
;
563 * iwl_bg_ucode_trace - Timer callback to log ucode event
565 * The timer is continually set to execute every
566 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
567 * this function is to perform continuous uCode event logging operation
570 static void iwl_bg_ucode_trace(unsigned long data
)
572 struct iwl_priv
*priv
= (struct iwl_priv
*)data
;
574 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
577 if (priv
->event_log
.ucode_trace
) {
578 iwl_continuous_event_trace(priv
);
579 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
580 mod_timer(&priv
->ucode_trace
,
581 jiffies
+ msecs_to_jiffies(UCODE_TRACE_PERIOD
));
585 static void iwl_bg_tx_flush(struct work_struct
*work
)
587 struct iwl_priv
*priv
=
588 container_of(work
, struct iwl_priv
, tx_flush
);
590 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
593 /* do nothing if rf-kill is on */
594 if (!iwl_is_ready_rf(priv
))
597 if (priv
->cfg
->ops
->lib
->txfifo_flush
) {
598 IWL_DEBUG_INFO(priv
, "device request: flush all tx frames\n");
599 iwlagn_dev_txfifo_flush(priv
, IWL_DROP_ALL
);
604 * iwl_rx_handle - Main entry function for receiving responses from uCode
606 * Uses the priv->rx_handlers callback function array to invoke
607 * the appropriate handlers, including command responses,
608 * frame-received notifications, and other notifications.
610 static void iwl_rx_handle(struct iwl_priv
*priv
)
612 struct iwl_rx_mem_buffer
*rxb
;
613 struct iwl_rx_packet
*pkt
;
614 struct iwl_rx_queue
*rxq
= &priv
->rxq
;
622 /* uCode's read index (stored in shared DRAM) indicates the last Rx
623 * buffer that the driver may process (last buffer filled by ucode). */
624 r
= le16_to_cpu(rxq
->rb_stts
->closed_rb_num
) & 0x0FFF;
627 /* Rx interrupt, but nothing sent from uCode */
629 IWL_DEBUG_RX(priv
, "r = %d, i = %d\n", r
, i
);
631 /* calculate total frames need to be restock after handling RX */
632 total_empty
= r
- rxq
->write_actual
;
634 total_empty
+= RX_QUEUE_SIZE
;
636 if (total_empty
> (RX_QUEUE_SIZE
/ 2))
644 /* If an RXB doesn't have a Rx queue slot associated with it,
645 * then a bug has been introduced in the queue refilling
646 * routines -- catch it here */
647 if (WARN_ON(rxb
== NULL
)) {
648 i
= (i
+ 1) & RX_QUEUE_MASK
;
652 rxq
->queue
[i
] = NULL
;
654 pci_unmap_page(priv
->pci_dev
, rxb
->page_dma
,
655 PAGE_SIZE
<< priv
->hw_params
.rx_page_order
,
659 len
= le32_to_cpu(pkt
->len_n_flags
) & FH_RSCSR_FRAME_SIZE_MSK
;
660 len
+= sizeof(u32
); /* account for status word */
661 trace_iwlwifi_dev_rx(priv
, pkt
, len
);
663 /* Reclaim a command buffer only if this packet is a response
664 * to a (driver-originated) command.
665 * If the packet (e.g. Rx frame) originated from uCode,
666 * there is no command buffer to reclaim.
667 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
668 * but apparently a few don't get set; catch them here. */
669 reclaim
= !(pkt
->hdr
.sequence
& SEQ_RX_FRAME
) &&
670 (pkt
->hdr
.cmd
!= REPLY_RX_PHY_CMD
) &&
671 (pkt
->hdr
.cmd
!= REPLY_RX
) &&
672 (pkt
->hdr
.cmd
!= REPLY_RX_MPDU_CMD
) &&
673 (pkt
->hdr
.cmd
!= REPLY_COMPRESSED_BA
) &&
674 (pkt
->hdr
.cmd
!= STATISTICS_NOTIFICATION
) &&
675 (pkt
->hdr
.cmd
!= REPLY_TX
);
678 * Do the notification wait before RX handlers so
679 * even if the RX handler consumes the RXB we have
680 * access to it in the notification wait entry.
682 if (!list_empty(&priv
->_agn
.notif_waits
)) {
683 struct iwl_notification_wait
*w
;
685 spin_lock(&priv
->_agn
.notif_wait_lock
);
686 list_for_each_entry(w
, &priv
->_agn
.notif_waits
, list
) {
687 if (w
->cmd
== pkt
->hdr
.cmd
) {
690 w
->fn(priv
, pkt
, w
->fn_data
);
693 spin_unlock(&priv
->_agn
.notif_wait_lock
);
695 wake_up_all(&priv
->_agn
.notif_waitq
);
697 if (priv
->pre_rx_handler
)
698 priv
->pre_rx_handler(priv
, rxb
);
700 /* Based on type of command response or notification,
701 * handle those that need handling via function in
702 * rx_handlers table. See iwl_setup_rx_handlers() */
703 if (priv
->rx_handlers
[pkt
->hdr
.cmd
]) {
704 IWL_DEBUG_RX(priv
, "r = %d, i = %d, %s, 0x%02x\n", r
,
705 i
, get_cmd_string(pkt
->hdr
.cmd
), pkt
->hdr
.cmd
);
706 priv
->isr_stats
.rx_handlers
[pkt
->hdr
.cmd
]++;
707 priv
->rx_handlers
[pkt
->hdr
.cmd
] (priv
, rxb
);
709 /* No handling needed */
711 "r %d i %d No handler needed for %s, 0x%02x\n",
712 r
, i
, get_cmd_string(pkt
->hdr
.cmd
),
717 * XXX: After here, we should always check rxb->page
718 * against NULL before touching it or its virtual
719 * memory (pkt). Because some rx_handler might have
720 * already taken or freed the pages.
724 /* Invoke any callbacks, transfer the buffer to caller,
725 * and fire off the (possibly) blocking iwl_send_cmd()
726 * as we reclaim the driver command queue */
728 iwl_tx_cmd_complete(priv
, rxb
);
730 IWL_WARN(priv
, "Claim null rxb?\n");
733 /* Reuse the page if possible. For notification packets and
734 * SKBs that fail to Rx correctly, add them back into the
735 * rx_free list for reuse later. */
736 spin_lock_irqsave(&rxq
->lock
, flags
);
737 if (rxb
->page
!= NULL
) {
738 rxb
->page_dma
= pci_map_page(priv
->pci_dev
, rxb
->page
,
739 0, PAGE_SIZE
<< priv
->hw_params
.rx_page_order
,
741 list_add_tail(&rxb
->list
, &rxq
->rx_free
);
744 list_add_tail(&rxb
->list
, &rxq
->rx_used
);
746 spin_unlock_irqrestore(&rxq
->lock
, flags
);
748 i
= (i
+ 1) & RX_QUEUE_MASK
;
749 /* If there are a lot of unused frames,
750 * restock the Rx queue so ucode wont assert. */
755 iwlagn_rx_replenish_now(priv
);
761 /* Backtrack one entry */
764 iwlagn_rx_replenish_now(priv
);
766 iwlagn_rx_queue_restock(priv
);
769 /* tasklet for iwlagn interrupt */
770 static void iwl_irq_tasklet(struct iwl_priv
*priv
)
776 #ifdef CONFIG_IWLWIFI_DEBUG
780 spin_lock_irqsave(&priv
->lock
, flags
);
782 /* Ack/clear/reset pending uCode interrupts.
783 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
785 /* There is a hardware bug in the interrupt mask function that some
786 * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
787 * they are disabled in the CSR_INT_MASK register. Furthermore the
788 * ICT interrupt handling mechanism has another bug that might cause
789 * these unmasked interrupts fail to be detected. We workaround the
790 * hardware bugs here by ACKing all the possible interrupts so that
791 * interrupt coalescing can still be achieved.
793 iwl_write32(priv
, CSR_INT
, priv
->_agn
.inta
| ~priv
->inta_mask
);
795 inta
= priv
->_agn
.inta
;
797 #ifdef CONFIG_IWLWIFI_DEBUG
798 if (iwl_get_debug_level(priv
) & IWL_DL_ISR
) {
800 inta_mask
= iwl_read32(priv
, CSR_INT_MASK
);
801 IWL_DEBUG_ISR(priv
, "inta 0x%08x, enabled 0x%08x\n ",
806 spin_unlock_irqrestore(&priv
->lock
, flags
);
808 /* saved interrupt in inta variable now we can reset priv->_agn.inta */
811 /* Now service all interrupt bits discovered above. */
812 if (inta
& CSR_INT_BIT_HW_ERR
) {
813 IWL_ERR(priv
, "Hardware error detected. Restarting.\n");
815 /* Tell the device to stop sending interrupts */
816 iwl_disable_interrupts(priv
);
818 priv
->isr_stats
.hw
++;
819 iwl_irq_handle_error(priv
);
821 handled
|= CSR_INT_BIT_HW_ERR
;
826 #ifdef CONFIG_IWLWIFI_DEBUG
827 if (iwl_get_debug_level(priv
) & (IWL_DL_ISR
)) {
828 /* NIC fires this, but we don't use it, redundant with WAKEUP */
829 if (inta
& CSR_INT_BIT_SCD
) {
830 IWL_DEBUG_ISR(priv
, "Scheduler finished to transmit "
831 "the frame/frames.\n");
832 priv
->isr_stats
.sch
++;
835 /* Alive notification via Rx interrupt will do the real work */
836 if (inta
& CSR_INT_BIT_ALIVE
) {
837 IWL_DEBUG_ISR(priv
, "Alive interrupt\n");
838 priv
->isr_stats
.alive
++;
842 /* Safely ignore these bits for debug checks below */
843 inta
&= ~(CSR_INT_BIT_SCD
| CSR_INT_BIT_ALIVE
);
845 /* HW RF KILL switch toggled */
846 if (inta
& CSR_INT_BIT_RF_KILL
) {
848 if (!(iwl_read32(priv
, CSR_GP_CNTRL
) &
849 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
))
852 IWL_WARN(priv
, "RF_KILL bit toggled to %s.\n",
853 hw_rf_kill
? "disable radio" : "enable radio");
855 priv
->isr_stats
.rfkill
++;
857 /* driver only loads ucode once setting the interface up.
858 * the driver allows loading the ucode even if the radio
859 * is killed. Hence update the killswitch state here. The
860 * rfkill handler will care about restarting if needed.
862 if (!test_bit(STATUS_ALIVE
, &priv
->status
)) {
864 set_bit(STATUS_RF_KILL_HW
, &priv
->status
);
866 clear_bit(STATUS_RF_KILL_HW
, &priv
->status
);
867 wiphy_rfkill_set_hw_state(priv
->hw
->wiphy
, hw_rf_kill
);
870 handled
|= CSR_INT_BIT_RF_KILL
;
873 /* Chip got too hot and stopped itself */
874 if (inta
& CSR_INT_BIT_CT_KILL
) {
875 IWL_ERR(priv
, "Microcode CT kill error detected.\n");
876 priv
->isr_stats
.ctkill
++;
877 handled
|= CSR_INT_BIT_CT_KILL
;
880 /* Error detected by uCode */
881 if (inta
& CSR_INT_BIT_SW_ERR
) {
882 IWL_ERR(priv
, "Microcode SW error detected. "
883 " Restarting 0x%X.\n", inta
);
884 priv
->isr_stats
.sw
++;
885 iwl_irq_handle_error(priv
);
886 handled
|= CSR_INT_BIT_SW_ERR
;
889 /* uCode wakes up after power-down sleep */
890 if (inta
& CSR_INT_BIT_WAKEUP
) {
891 IWL_DEBUG_ISR(priv
, "Wakeup interrupt\n");
892 iwl_rx_queue_update_write_ptr(priv
, &priv
->rxq
);
893 for (i
= 0; i
< priv
->hw_params
.max_txq_num
; i
++)
894 iwl_txq_update_write_ptr(priv
, &priv
->txq
[i
]);
896 priv
->isr_stats
.wakeup
++;
898 handled
|= CSR_INT_BIT_WAKEUP
;
901 /* All uCode command responses, including Tx command responses,
902 * Rx "responses" (frame-received notification), and other
903 * notifications from uCode come through here*/
904 if (inta
& (CSR_INT_BIT_FH_RX
| CSR_INT_BIT_SW_RX
|
905 CSR_INT_BIT_RX_PERIODIC
)) {
906 IWL_DEBUG_ISR(priv
, "Rx interrupt\n");
907 if (inta
& (CSR_INT_BIT_FH_RX
| CSR_INT_BIT_SW_RX
)) {
908 handled
|= (CSR_INT_BIT_FH_RX
| CSR_INT_BIT_SW_RX
);
909 iwl_write32(priv
, CSR_FH_INT_STATUS
,
912 if (inta
& CSR_INT_BIT_RX_PERIODIC
) {
913 handled
|= CSR_INT_BIT_RX_PERIODIC
;
914 iwl_write32(priv
, CSR_INT
, CSR_INT_BIT_RX_PERIODIC
);
916 /* Sending RX interrupt require many steps to be done in the
918 * 1- write interrupt to current index in ICT table.
920 * 3- update RX shared data to indicate last write index.
922 * This could lead to RX race, driver could receive RX interrupt
923 * but the shared data changes does not reflect this;
924 * periodic interrupt will detect any dangling Rx activity.
927 /* Disable periodic interrupt; we use it as just a one-shot. */
928 iwl_write8(priv
, CSR_INT_PERIODIC_REG
,
929 CSR_INT_PERIODIC_DIS
);
933 * Enable periodic interrupt in 8 msec only if we received
934 * real RX interrupt (instead of just periodic int), to catch
935 * any dangling Rx interrupt. If it was just the periodic
936 * interrupt, there was no dangling Rx activity, and no need
937 * to extend the periodic interrupt; one-shot is enough.
939 if (inta
& (CSR_INT_BIT_FH_RX
| CSR_INT_BIT_SW_RX
))
940 iwl_write8(priv
, CSR_INT_PERIODIC_REG
,
941 CSR_INT_PERIODIC_ENA
);
943 priv
->isr_stats
.rx
++;
946 /* This "Tx" DMA channel is used only for loading uCode */
947 if (inta
& CSR_INT_BIT_FH_TX
) {
948 iwl_write32(priv
, CSR_FH_INT_STATUS
, CSR_FH_INT_TX_MASK
);
949 IWL_DEBUG_ISR(priv
, "uCode load interrupt\n");
950 priv
->isr_stats
.tx
++;
951 handled
|= CSR_INT_BIT_FH_TX
;
952 /* Wake up uCode load routine, now that load is complete */
953 priv
->ucode_write_complete
= 1;
954 wake_up_interruptible(&priv
->wait_command_queue
);
957 if (inta
& ~handled
) {
958 IWL_ERR(priv
, "Unhandled INTA bits 0x%08x\n", inta
& ~handled
);
959 priv
->isr_stats
.unhandled
++;
962 if (inta
& ~(priv
->inta_mask
)) {
963 IWL_WARN(priv
, "Disabled INTA bits 0x%08x were pending\n",
964 inta
& ~priv
->inta_mask
);
967 /* Re-enable all interrupts */
968 /* only Re-enable if disabled by irq */
969 if (test_bit(STATUS_INT_ENABLED
, &priv
->status
))
970 iwl_enable_interrupts(priv
);
971 /* Re-enable RF_KILL if it occurred */
972 else if (handled
& CSR_INT_BIT_RF_KILL
)
973 iwl_enable_rfkill_int(priv
);
976 /*****************************************************************************
980 *****************************************************************************/
982 #ifdef CONFIG_IWLWIFI_DEBUG
985 * The following adds a new attribute to the sysfs representation
986 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
987 * used for controlling the debug level.
989 * See the level definitions in iwl for details.
991 * The debug_level being managed using sysfs below is a per device debug
992 * level that is used instead of the global debug level if it (the per
993 * device debug level) is set.
995 static ssize_t
show_debug_level(struct device
*d
,
996 struct device_attribute
*attr
, char *buf
)
998 struct iwl_priv
*priv
= dev_get_drvdata(d
);
999 return sprintf(buf
, "0x%08X\n", iwl_get_debug_level(priv
));
1001 static ssize_t
store_debug_level(struct device
*d
,
1002 struct device_attribute
*attr
,
1003 const char *buf
, size_t count
)
1005 struct iwl_priv
*priv
= dev_get_drvdata(d
);
1009 ret
= strict_strtoul(buf
, 0, &val
);
1011 IWL_ERR(priv
, "%s is not in hex or decimal form.\n", buf
);
1013 priv
->debug_level
= val
;
1014 if (iwl_alloc_traffic_mem(priv
))
1016 "Not enough memory to generate traffic log\n");
1018 return strnlen(buf
, count
);
1021 static DEVICE_ATTR(debug_level
, S_IWUSR
| S_IRUGO
,
1022 show_debug_level
, store_debug_level
);
1025 #endif /* CONFIG_IWLWIFI_DEBUG */
1028 static ssize_t
show_temperature(struct device
*d
,
1029 struct device_attribute
*attr
, char *buf
)
1031 struct iwl_priv
*priv
= dev_get_drvdata(d
);
1033 if (!iwl_is_alive(priv
))
1036 return sprintf(buf
, "%d\n", priv
->temperature
);
1039 static DEVICE_ATTR(temperature
, S_IRUGO
, show_temperature
, NULL
);
1041 static ssize_t
show_tx_power(struct device
*d
,
1042 struct device_attribute
*attr
, char *buf
)
1044 struct iwl_priv
*priv
= dev_get_drvdata(d
);
1046 if (!iwl_is_ready_rf(priv
))
1047 return sprintf(buf
, "off\n");
1049 return sprintf(buf
, "%d\n", priv
->tx_power_user_lmt
);
1052 static ssize_t
store_tx_power(struct device
*d
,
1053 struct device_attribute
*attr
,
1054 const char *buf
, size_t count
)
1056 struct iwl_priv
*priv
= dev_get_drvdata(d
);
1060 ret
= strict_strtoul(buf
, 10, &val
);
1062 IWL_INFO(priv
, "%s is not in decimal form.\n", buf
);
1064 ret
= iwl_set_tx_power(priv
, val
, false);
1066 IWL_ERR(priv
, "failed setting tx power (0x%d).\n",
1074 static DEVICE_ATTR(tx_power
, S_IWUSR
| S_IRUGO
, show_tx_power
, store_tx_power
);
1076 static struct attribute
*iwl_sysfs_entries
[] = {
1077 &dev_attr_temperature
.attr
,
1078 &dev_attr_tx_power
.attr
,
1079 #ifdef CONFIG_IWLWIFI_DEBUG
1080 &dev_attr_debug_level
.attr
,
1085 static struct attribute_group iwl_attribute_group
= {
1086 .name
= NULL
, /* put in device directory */
1087 .attrs
= iwl_sysfs_entries
,
1090 /******************************************************************************
1092 * uCode download functions
1094 ******************************************************************************/
1096 static void iwl_free_fw_desc(struct pci_dev
*pci_dev
, struct fw_desc
*desc
)
1099 dma_free_coherent(&pci_dev
->dev
, desc
->len
,
1100 desc
->v_addr
, desc
->p_addr
);
1101 desc
->v_addr
= NULL
;
1105 static void iwl_free_fw_img(struct pci_dev
*pci_dev
, struct fw_img
*img
)
1107 iwl_free_fw_desc(pci_dev
, &img
->code
);
1108 iwl_free_fw_desc(pci_dev
, &img
->data
);
1111 static int iwl_alloc_fw_desc(struct pci_dev
*pci_dev
, struct fw_desc
*desc
,
1112 const void *data
, size_t len
)
1115 desc
->v_addr
= NULL
;
1119 desc
->v_addr
= dma_alloc_coherent(&pci_dev
->dev
, len
,
1120 &desc
->p_addr
, GFP_KERNEL
);
1124 memcpy(desc
->v_addr
, data
, len
);
1128 static void iwl_dealloc_ucode_pci(struct iwl_priv
*priv
)
1130 iwl_free_fw_img(priv
->pci_dev
, &priv
->ucode_rt
);
1131 iwl_free_fw_img(priv
->pci_dev
, &priv
->ucode_init
);
1134 struct iwlagn_ucode_capabilities
{
1135 u32 max_probe_length
;
1136 u32 standard_phy_calibration_size
;
1140 static void iwl_ucode_callback(const struct firmware
*ucode_raw
, void *context
);
1141 static int iwl_mac_setup_register(struct iwl_priv
*priv
,
1142 struct iwlagn_ucode_capabilities
*capa
);
1144 #define UCODE_EXPERIMENTAL_INDEX 100
1145 #define UCODE_EXPERIMENTAL_TAG "exp"
1147 static int __must_check
iwl_request_firmware(struct iwl_priv
*priv
, bool first
)
1149 const char *name_pre
= priv
->cfg
->fw_name_pre
;
1153 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1154 priv
->fw_index
= UCODE_EXPERIMENTAL_INDEX
;
1155 strcpy(tag
, UCODE_EXPERIMENTAL_TAG
);
1156 } else if (priv
->fw_index
== UCODE_EXPERIMENTAL_INDEX
) {
1158 priv
->fw_index
= priv
->cfg
->ucode_api_max
;
1159 sprintf(tag
, "%d", priv
->fw_index
);
1162 sprintf(tag
, "%d", priv
->fw_index
);
1165 if (priv
->fw_index
< priv
->cfg
->ucode_api_min
) {
1166 IWL_ERR(priv
, "no suitable firmware found!\n");
1170 sprintf(priv
->firmware_name
, "%s%s%s", name_pre
, tag
, ".ucode");
1172 IWL_DEBUG_INFO(priv
, "attempting to load firmware %s'%s'\n",
1173 (priv
->fw_index
== UCODE_EXPERIMENTAL_INDEX
)
1174 ? "EXPERIMENTAL " : "",
1175 priv
->firmware_name
);
1177 return request_firmware_nowait(THIS_MODULE
, 1, priv
->firmware_name
,
1178 &priv
->pci_dev
->dev
, GFP_KERNEL
, priv
,
1179 iwl_ucode_callback
);
1182 struct iwlagn_firmware_pieces
{
1183 const void *inst
, *data
, *init
, *init_data
;
1184 size_t inst_size
, data_size
, init_size
, init_data_size
;
1188 u32 init_evtlog_ptr
, init_evtlog_size
, init_errlog_ptr
;
1189 u32 inst_evtlog_ptr
, inst_evtlog_size
, inst_errlog_ptr
;
1192 static int iwlagn_load_legacy_firmware(struct iwl_priv
*priv
,
1193 const struct firmware
*ucode_raw
,
1194 struct iwlagn_firmware_pieces
*pieces
)
1196 struct iwl_ucode_header
*ucode
= (void *)ucode_raw
->data
;
1197 u32 api_ver
, hdr_size
;
1200 priv
->ucode_ver
= le32_to_cpu(ucode
->ver
);
1201 api_ver
= IWL_UCODE_API(priv
->ucode_ver
);
1206 if (ucode_raw
->size
< hdr_size
) {
1207 IWL_ERR(priv
, "File size too small!\n");
1210 pieces
->build
= le32_to_cpu(ucode
->u
.v2
.build
);
1211 pieces
->inst_size
= le32_to_cpu(ucode
->u
.v2
.inst_size
);
1212 pieces
->data_size
= le32_to_cpu(ucode
->u
.v2
.data_size
);
1213 pieces
->init_size
= le32_to_cpu(ucode
->u
.v2
.init_size
);
1214 pieces
->init_data_size
= le32_to_cpu(ucode
->u
.v2
.init_data_size
);
1215 src
= ucode
->u
.v2
.data
;
1221 if (ucode_raw
->size
< hdr_size
) {
1222 IWL_ERR(priv
, "File size too small!\n");
1226 pieces
->inst_size
= le32_to_cpu(ucode
->u
.v1
.inst_size
);
1227 pieces
->data_size
= le32_to_cpu(ucode
->u
.v1
.data_size
);
1228 pieces
->init_size
= le32_to_cpu(ucode
->u
.v1
.init_size
);
1229 pieces
->init_data_size
= le32_to_cpu(ucode
->u
.v1
.init_data_size
);
1230 src
= ucode
->u
.v1
.data
;
1234 /* Verify size of file vs. image size info in file's header */
1235 if (ucode_raw
->size
!= hdr_size
+ pieces
->inst_size
+
1236 pieces
->data_size
+ pieces
->init_size
+
1237 pieces
->init_data_size
) {
1240 "uCode file size %d does not match expected size\n",
1241 (int)ucode_raw
->size
);
1246 src
+= pieces
->inst_size
;
1248 src
+= pieces
->data_size
;
1250 src
+= pieces
->init_size
;
1251 pieces
->init_data
= src
;
1252 src
+= pieces
->init_data_size
;
1257 static int iwlagn_wanted_ucode_alternative
= 1;
1259 static int iwlagn_load_firmware(struct iwl_priv
*priv
,
1260 const struct firmware
*ucode_raw
,
1261 struct iwlagn_firmware_pieces
*pieces
,
1262 struct iwlagn_ucode_capabilities
*capa
)
1264 struct iwl_tlv_ucode_header
*ucode
= (void *)ucode_raw
->data
;
1265 struct iwl_ucode_tlv
*tlv
;
1266 size_t len
= ucode_raw
->size
;
1268 int wanted_alternative
= iwlagn_wanted_ucode_alternative
, tmp
;
1271 enum iwl_ucode_tlv_type tlv_type
;
1274 if (len
< sizeof(*ucode
)) {
1275 IWL_ERR(priv
, "uCode has invalid length: %zd\n", len
);
1279 if (ucode
->magic
!= cpu_to_le32(IWL_TLV_UCODE_MAGIC
)) {
1280 IWL_ERR(priv
, "invalid uCode magic: 0X%x\n",
1281 le32_to_cpu(ucode
->magic
));
1286 * Check which alternatives are present, and "downgrade"
1287 * when the chosen alternative is not present, warning
1288 * the user when that happens. Some files may not have
1289 * any alternatives, so don't warn in that case.
1291 alternatives
= le64_to_cpu(ucode
->alternatives
);
1292 tmp
= wanted_alternative
;
1293 if (wanted_alternative
> 63)
1294 wanted_alternative
= 63;
1295 while (wanted_alternative
&& !(alternatives
& BIT(wanted_alternative
)))
1296 wanted_alternative
--;
1297 if (wanted_alternative
&& wanted_alternative
!= tmp
)
1299 "uCode alternative %d not available, choosing %d\n",
1300 tmp
, wanted_alternative
);
1302 priv
->ucode_ver
= le32_to_cpu(ucode
->ver
);
1303 pieces
->build
= le32_to_cpu(ucode
->build
);
1306 len
-= sizeof(*ucode
);
1308 while (len
>= sizeof(*tlv
)) {
1311 len
-= sizeof(*tlv
);
1314 tlv_len
= le32_to_cpu(tlv
->length
);
1315 tlv_type
= le16_to_cpu(tlv
->type
);
1316 tlv_alt
= le16_to_cpu(tlv
->alternative
);
1317 tlv_data
= tlv
->data
;
1319 if (len
< tlv_len
) {
1320 IWL_ERR(priv
, "invalid TLV len: %zd/%u\n",
1324 len
-= ALIGN(tlv_len
, 4);
1325 data
+= sizeof(*tlv
) + ALIGN(tlv_len
, 4);
1328 * Alternative 0 is always valid.
1330 * Skip alternative TLVs that are not selected.
1332 if (tlv_alt
!= 0 && tlv_alt
!= wanted_alternative
)
1336 case IWL_UCODE_TLV_INST
:
1337 pieces
->inst
= tlv_data
;
1338 pieces
->inst_size
= tlv_len
;
1340 case IWL_UCODE_TLV_DATA
:
1341 pieces
->data
= tlv_data
;
1342 pieces
->data_size
= tlv_len
;
1344 case IWL_UCODE_TLV_INIT
:
1345 pieces
->init
= tlv_data
;
1346 pieces
->init_size
= tlv_len
;
1348 case IWL_UCODE_TLV_INIT_DATA
:
1349 pieces
->init_data
= tlv_data
;
1350 pieces
->init_data_size
= tlv_len
;
1352 case IWL_UCODE_TLV_BOOT
:
1353 IWL_ERR(priv
, "Found unexpected BOOT ucode\n");
1355 case IWL_UCODE_TLV_PROBE_MAX_LEN
:
1356 if (tlv_len
!= sizeof(u32
))
1357 goto invalid_tlv_len
;
1358 capa
->max_probe_length
=
1359 le32_to_cpup((__le32
*)tlv_data
);
1361 case IWL_UCODE_TLV_PAN
:
1363 goto invalid_tlv_len
;
1364 capa
->flags
|= IWL_UCODE_TLV_FLAGS_PAN
;
1366 case IWL_UCODE_TLV_FLAGS
:
1367 /* must be at least one u32 */
1368 if (tlv_len
< sizeof(u32
))
1369 goto invalid_tlv_len
;
1370 /* and a proper number of u32s */
1371 if (tlv_len
% sizeof(u32
))
1372 goto invalid_tlv_len
;
1374 * This driver only reads the first u32 as
1375 * right now no more features are defined,
1376 * if that changes then either the driver
1377 * will not work with the new firmware, or
1378 * it'll not take advantage of new features.
1380 capa
->flags
= le32_to_cpup((__le32
*)tlv_data
);
1382 case IWL_UCODE_TLV_INIT_EVTLOG_PTR
:
1383 if (tlv_len
!= sizeof(u32
))
1384 goto invalid_tlv_len
;
1385 pieces
->init_evtlog_ptr
=
1386 le32_to_cpup((__le32
*)tlv_data
);
1388 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE
:
1389 if (tlv_len
!= sizeof(u32
))
1390 goto invalid_tlv_len
;
1391 pieces
->init_evtlog_size
=
1392 le32_to_cpup((__le32
*)tlv_data
);
1394 case IWL_UCODE_TLV_INIT_ERRLOG_PTR
:
1395 if (tlv_len
!= sizeof(u32
))
1396 goto invalid_tlv_len
;
1397 pieces
->init_errlog_ptr
=
1398 le32_to_cpup((__le32
*)tlv_data
);
1400 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR
:
1401 if (tlv_len
!= sizeof(u32
))
1402 goto invalid_tlv_len
;
1403 pieces
->inst_evtlog_ptr
=
1404 le32_to_cpup((__le32
*)tlv_data
);
1406 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE
:
1407 if (tlv_len
!= sizeof(u32
))
1408 goto invalid_tlv_len
;
1409 pieces
->inst_evtlog_size
=
1410 le32_to_cpup((__le32
*)tlv_data
);
1412 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR
:
1413 if (tlv_len
!= sizeof(u32
))
1414 goto invalid_tlv_len
;
1415 pieces
->inst_errlog_ptr
=
1416 le32_to_cpup((__le32
*)tlv_data
);
1418 case IWL_UCODE_TLV_ENHANCE_SENS_TBL
:
1420 goto invalid_tlv_len
;
1421 priv
->enhance_sensitivity_table
= true;
1423 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE
:
1424 if (tlv_len
!= sizeof(u32
))
1425 goto invalid_tlv_len
;
1426 capa
->standard_phy_calibration_size
=
1427 le32_to_cpup((__le32
*)tlv_data
);
1430 IWL_DEBUG_INFO(priv
, "unknown TLV: %d\n", tlv_type
);
1436 IWL_ERR(priv
, "invalid TLV after parsing: %zd\n", len
);
1437 iwl_print_hex_dump(priv
, IWL_DL_FW
, (u8
*)data
, len
);
1444 IWL_ERR(priv
, "TLV %d has invalid size: %u\n", tlv_type
, tlv_len
);
1445 iwl_print_hex_dump(priv
, IWL_DL_FW
, tlv_data
, tlv_len
);
1451 * iwl_ucode_callback - callback when firmware was loaded
1453 * If loaded successfully, copies the firmware into buffers
1454 * for the card to fetch (via DMA).
1456 static void iwl_ucode_callback(const struct firmware
*ucode_raw
, void *context
)
1458 struct iwl_priv
*priv
= context
;
1459 struct iwl_ucode_header
*ucode
;
1461 struct iwlagn_firmware_pieces pieces
;
1462 const unsigned int api_max
= priv
->cfg
->ucode_api_max
;
1463 const unsigned int api_min
= priv
->cfg
->ucode_api_min
;
1467 struct iwlagn_ucode_capabilities ucode_capa
= {
1468 .max_probe_length
= 200,
1469 .standard_phy_calibration_size
=
1470 IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE
,
1473 memset(&pieces
, 0, sizeof(pieces
));
1476 if (priv
->fw_index
<= priv
->cfg
->ucode_api_max
)
1478 "request for firmware file '%s' failed.\n",
1479 priv
->firmware_name
);
1483 IWL_DEBUG_INFO(priv
, "Loaded firmware file '%s' (%zd bytes).\n",
1484 priv
->firmware_name
, ucode_raw
->size
);
1486 /* Make sure that we got at least the API version number */
1487 if (ucode_raw
->size
< 4) {
1488 IWL_ERR(priv
, "File size way too small!\n");
1492 /* Data from ucode file: header followed by uCode images */
1493 ucode
= (struct iwl_ucode_header
*)ucode_raw
->data
;
1496 err
= iwlagn_load_legacy_firmware(priv
, ucode_raw
, &pieces
);
1498 err
= iwlagn_load_firmware(priv
, ucode_raw
, &pieces
,
1504 api_ver
= IWL_UCODE_API(priv
->ucode_ver
);
1505 build
= pieces
.build
;
1508 * api_ver should match the api version forming part of the
1509 * firmware filename ... but we don't check for that and only rely
1510 * on the API version read from firmware header from here on forward
1512 /* no api version check required for experimental uCode */
1513 if (priv
->fw_index
!= UCODE_EXPERIMENTAL_INDEX
) {
1514 if (api_ver
< api_min
|| api_ver
> api_max
) {
1516 "Driver unable to support your firmware API. "
1517 "Driver supports v%u, firmware is v%u.\n",
1522 if (api_ver
!= api_max
)
1524 "Firmware has old API version. Expected v%u, "
1525 "got v%u. New firmware can be obtained "
1526 "from http://www.intellinuxwireless.org.\n",
1531 sprintf(buildstr
, " build %u%s", build
,
1532 (priv
->fw_index
== UCODE_EXPERIMENTAL_INDEX
)
1537 IWL_INFO(priv
, "loaded firmware version %u.%u.%u.%u%s\n",
1538 IWL_UCODE_MAJOR(priv
->ucode_ver
),
1539 IWL_UCODE_MINOR(priv
->ucode_ver
),
1540 IWL_UCODE_API(priv
->ucode_ver
),
1541 IWL_UCODE_SERIAL(priv
->ucode_ver
),
1544 snprintf(priv
->hw
->wiphy
->fw_version
,
1545 sizeof(priv
->hw
->wiphy
->fw_version
),
1547 IWL_UCODE_MAJOR(priv
->ucode_ver
),
1548 IWL_UCODE_MINOR(priv
->ucode_ver
),
1549 IWL_UCODE_API(priv
->ucode_ver
),
1550 IWL_UCODE_SERIAL(priv
->ucode_ver
),
1554 * For any of the failures below (before allocating pci memory)
1555 * we will try to load a version with a smaller API -- maybe the
1556 * user just got a corrupted version of the latest API.
1559 IWL_DEBUG_INFO(priv
, "f/w package hdr ucode version raw = 0x%x\n",
1561 IWL_DEBUG_INFO(priv
, "f/w package hdr runtime inst size = %Zd\n",
1563 IWL_DEBUG_INFO(priv
, "f/w package hdr runtime data size = %Zd\n",
1565 IWL_DEBUG_INFO(priv
, "f/w package hdr init inst size = %Zd\n",
1567 IWL_DEBUG_INFO(priv
, "f/w package hdr init data size = %Zd\n",
1568 pieces
.init_data_size
);
1570 /* Verify that uCode images will fit in card's SRAM */
1571 if (pieces
.inst_size
> priv
->hw_params
.max_inst_size
) {
1572 IWL_ERR(priv
, "uCode instr len %Zd too large to fit in\n",
1577 if (pieces
.data_size
> priv
->hw_params
.max_data_size
) {
1578 IWL_ERR(priv
, "uCode data len %Zd too large to fit in\n",
1583 if (pieces
.init_size
> priv
->hw_params
.max_inst_size
) {
1584 IWL_ERR(priv
, "uCode init instr len %Zd too large to fit in\n",
1589 if (pieces
.init_data_size
> priv
->hw_params
.max_data_size
) {
1590 IWL_ERR(priv
, "uCode init data len %Zd too large to fit in\n",
1591 pieces
.init_data_size
);
1595 /* Allocate ucode buffers for card's bus-master loading ... */
1597 /* Runtime instructions and 2 copies of data:
1598 * 1) unmodified from disk
1599 * 2) backup cache for save/restore during power-downs */
1600 if (iwl_alloc_fw_desc(priv
->pci_dev
, &priv
->ucode_rt
.code
,
1601 pieces
.inst
, pieces
.inst_size
))
1603 if (iwl_alloc_fw_desc(priv
->pci_dev
, &priv
->ucode_rt
.data
,
1604 pieces
.data
, pieces
.data_size
))
1607 /* Initialization instructions and data */
1608 if (pieces
.init_size
&& pieces
.init_data_size
) {
1609 if (iwl_alloc_fw_desc(priv
->pci_dev
, &priv
->ucode_init
.code
,
1610 pieces
.init
, pieces
.init_size
))
1612 if (iwl_alloc_fw_desc(priv
->pci_dev
, &priv
->ucode_init
.data
,
1613 pieces
.init_data
, pieces
.init_data_size
))
1617 /* Now that we can no longer fail, copy information */
1620 * The (size - 16) / 12 formula is based on the information recorded
1621 * for each event, which is of mode 1 (including timestamp) for all
1622 * new microcodes that include this information.
1624 priv
->_agn
.init_evtlog_ptr
= pieces
.init_evtlog_ptr
;
1625 if (pieces
.init_evtlog_size
)
1626 priv
->_agn
.init_evtlog_size
= (pieces
.init_evtlog_size
- 16)/12;
1628 priv
->_agn
.init_evtlog_size
=
1629 priv
->cfg
->base_params
->max_event_log_size
;
1630 priv
->_agn
.init_errlog_ptr
= pieces
.init_errlog_ptr
;
1631 priv
->_agn
.inst_evtlog_ptr
= pieces
.inst_evtlog_ptr
;
1632 if (pieces
.inst_evtlog_size
)
1633 priv
->_agn
.inst_evtlog_size
= (pieces
.inst_evtlog_size
- 16)/12;
1635 priv
->_agn
.inst_evtlog_size
=
1636 priv
->cfg
->base_params
->max_event_log_size
;
1637 priv
->_agn
.inst_errlog_ptr
= pieces
.inst_errlog_ptr
;
1639 priv
->new_scan_threshold_behaviour
=
1640 !!(ucode_capa
.flags
& IWL_UCODE_TLV_FLAGS_NEWSCAN
);
1642 if (ucode_capa
.flags
& IWL_UCODE_TLV_FLAGS_PAN
) {
1643 priv
->valid_contexts
|= BIT(IWL_RXON_CTX_PAN
);
1644 priv
->sta_key_max_num
= STA_KEY_MAX_NUM_PAN
;
1646 priv
->sta_key_max_num
= STA_KEY_MAX_NUM
;
1648 if (priv
->valid_contexts
!= BIT(IWL_RXON_CTX_BSS
))
1649 priv
->cmd_queue
= IWL_IPAN_CMD_QUEUE_NUM
;
1651 priv
->cmd_queue
= IWL_DEFAULT_CMD_QUEUE_NUM
;
1654 * figure out the offset of chain noise reset and gain commands
1655 * base on the size of standard phy calibration commands table size
1657 if (ucode_capa
.standard_phy_calibration_size
>
1658 IWL_MAX_PHY_CALIBRATE_TBL_SIZE
)
1659 ucode_capa
.standard_phy_calibration_size
=
1660 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE
;
1662 priv
->_agn
.phy_calib_chain_noise_reset_cmd
=
1663 ucode_capa
.standard_phy_calibration_size
;
1664 priv
->_agn
.phy_calib_chain_noise_gain_cmd
=
1665 ucode_capa
.standard_phy_calibration_size
+ 1;
1667 /**************************************************
1668 * This is still part of probe() in a sense...
1670 * 9. Setup and register with mac80211 and debugfs
1671 **************************************************/
1672 err
= iwl_mac_setup_register(priv
, &ucode_capa
);
1676 err
= iwl_dbgfs_register(priv
, DRV_NAME
);
1678 IWL_ERR(priv
, "failed to create debugfs files. Ignoring error: %d\n", err
);
1680 err
= sysfs_create_group(&priv
->pci_dev
->dev
.kobj
,
1681 &iwl_attribute_group
);
1683 IWL_ERR(priv
, "failed to create sysfs device attributes\n");
1687 /* We have our copies now, allow OS release its copies */
1688 release_firmware(ucode_raw
);
1689 complete(&priv
->_agn
.firmware_loading_complete
);
1693 /* try next, if any */
1694 if (iwl_request_firmware(priv
, false))
1696 release_firmware(ucode_raw
);
1700 IWL_ERR(priv
, "failed to allocate pci memory\n");
1701 iwl_dealloc_ucode_pci(priv
);
1703 complete(&priv
->_agn
.firmware_loading_complete
);
1704 device_release_driver(&priv
->pci_dev
->dev
);
1705 release_firmware(ucode_raw
);
1708 static const char *desc_lookup_text
[] = {
1713 "NMI_INTERRUPT_WDG",
1717 "HW_ERROR_TUNE_LOCK",
1718 "HW_ERROR_TEMPERATURE",
1719 "ILLEGAL_CHAN_FREQ",
1722 "NMI_INTERRUPT_HOST",
1723 "NMI_INTERRUPT_ACTION_PT",
1724 "NMI_INTERRUPT_UNKNOWN",
1725 "UCODE_VERSION_MISMATCH",
1726 "HW_ERROR_ABS_LOCK",
1727 "HW_ERROR_CAL_LOCK_FAIL",
1728 "NMI_INTERRUPT_INST_ACTION_PT",
1729 "NMI_INTERRUPT_DATA_ACTION_PT",
1731 "NMI_INTERRUPT_TRM",
1732 "NMI_INTERRUPT_BREAK_POINT"
1739 static struct { char *name
; u8 num
; } advanced_lookup
[] = {
1740 { "NMI_INTERRUPT_WDG", 0x34 },
1741 { "SYSASSERT", 0x35 },
1742 { "UCODE_VERSION_MISMATCH", 0x37 },
1743 { "BAD_COMMAND", 0x38 },
1744 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
1745 { "FATAL_ERROR", 0x3D },
1746 { "NMI_TRM_HW_ERR", 0x46 },
1747 { "NMI_INTERRUPT_TRM", 0x4C },
1748 { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
1749 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
1750 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
1751 { "NMI_INTERRUPT_HOST", 0x66 },
1752 { "NMI_INTERRUPT_ACTION_PT", 0x7C },
1753 { "NMI_INTERRUPT_UNKNOWN", 0x84 },
1754 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
1755 { "ADVANCED_SYSASSERT", 0 },
1758 static const char *desc_lookup(u32 num
)
1761 int max
= ARRAY_SIZE(desc_lookup_text
);
1764 return desc_lookup_text
[num
];
1766 max
= ARRAY_SIZE(advanced_lookup
) - 1;
1767 for (i
= 0; i
< max
; i
++) {
1768 if (advanced_lookup
[i
].num
== num
)
1771 return advanced_lookup
[i
].name
;
1774 #define ERROR_START_OFFSET (1 * sizeof(u32))
1775 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1777 void iwl_dump_nic_error_log(struct iwl_priv
*priv
)
1780 u32 desc
, time
, count
, base
, data1
;
1781 u32 blink1
, blink2
, ilink1
, ilink2
;
1783 struct iwl_error_event_table table
;
1785 base
= priv
->device_pointers
.error_event_table
;
1786 if (priv
->ucode_type
== UCODE_SUBTYPE_INIT
) {
1788 base
= priv
->_agn
.init_errlog_ptr
;
1791 base
= priv
->_agn
.inst_errlog_ptr
;
1794 if (!priv
->cfg
->ops
->lib
->is_valid_rtc_data_addr(base
)) {
1796 "Not valid error log pointer 0x%08X for %s uCode\n",
1798 (priv
->ucode_type
== UCODE_SUBTYPE_INIT
)
1803 iwl_read_targ_mem_words(priv
, base
, &table
, sizeof(table
));
1805 count
= table
.valid
;
1807 if (ERROR_START_OFFSET
<= count
* ERROR_ELEM_SIZE
) {
1808 IWL_ERR(priv
, "Start IWL Error Log Dump:\n");
1809 IWL_ERR(priv
, "Status: 0x%08lX, count: %d\n",
1810 priv
->status
, count
);
1813 desc
= table
.error_id
;
1814 priv
->isr_stats
.err_code
= desc
;
1816 blink1
= table
.blink1
;
1817 blink2
= table
.blink2
;
1818 ilink1
= table
.ilink1
;
1819 ilink2
= table
.ilink2
;
1820 data1
= table
.data1
;
1821 data2
= table
.data2
;
1823 time
= table
.tsf_low
;
1826 trace_iwlwifi_dev_ucode_error(priv
, desc
, time
, data1
, data2
, line
,
1827 blink1
, blink2
, ilink1
, ilink2
);
1829 IWL_ERR(priv
, "Desc Time "
1830 "data1 data2 line\n");
1831 IWL_ERR(priv
, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
1832 desc_lookup(desc
), desc
, time
, data1
, data2
, line
);
1833 IWL_ERR(priv
, "pc blink1 blink2 ilink1 ilink2 hcmd\n");
1834 IWL_ERR(priv
, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1835 pc
, blink1
, blink2
, ilink1
, ilink2
, hcmd
);
1838 #define EVENT_START_OFFSET (4 * sizeof(u32))
1841 * iwl_print_event_log - Dump error event log to syslog
1844 static int iwl_print_event_log(struct iwl_priv
*priv
, u32 start_idx
,
1845 u32 num_events
, u32 mode
,
1846 int pos
, char **buf
, size_t bufsz
)
1849 u32 base
; /* SRAM byte address of event log header */
1850 u32 event_size
; /* 2 u32s, or 3 u32s if timestamp recorded */
1851 u32 ptr
; /* SRAM byte address of log data */
1852 u32 ev
, time
, data
; /* event log data */
1853 unsigned long reg_flags
;
1855 if (num_events
== 0)
1858 base
= priv
->device_pointers
.log_event_table
;
1859 if (priv
->ucode_type
== UCODE_SUBTYPE_INIT
) {
1861 base
= priv
->_agn
.init_evtlog_ptr
;
1864 base
= priv
->_agn
.inst_evtlog_ptr
;
1868 event_size
= 2 * sizeof(u32
);
1870 event_size
= 3 * sizeof(u32
);
1872 ptr
= base
+ EVENT_START_OFFSET
+ (start_idx
* event_size
);
1874 /* Make sure device is powered up for SRAM reads */
1875 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
1876 iwl_grab_nic_access(priv
);
1878 /* Set starting address; reads will auto-increment */
1879 iwl_write32(priv
, HBUS_TARG_MEM_RADDR
, ptr
);
1882 /* "time" is actually "data" for mode 0 (no timestamp).
1883 * place event id # at far right for easier visual parsing. */
1884 for (i
= 0; i
< num_events
; i
++) {
1885 ev
= iwl_read32(priv
, HBUS_TARG_MEM_RDAT
);
1886 time
= iwl_read32(priv
, HBUS_TARG_MEM_RDAT
);
1890 pos
+= scnprintf(*buf
+ pos
, bufsz
- pos
,
1891 "EVT_LOG:0x%08x:%04u\n",
1894 trace_iwlwifi_dev_ucode_event(priv
, 0,
1896 IWL_ERR(priv
, "EVT_LOG:0x%08x:%04u\n",
1900 data
= iwl_read32(priv
, HBUS_TARG_MEM_RDAT
);
1902 pos
+= scnprintf(*buf
+ pos
, bufsz
- pos
,
1903 "EVT_LOGT:%010u:0x%08x:%04u\n",
1906 IWL_ERR(priv
, "EVT_LOGT:%010u:0x%08x:%04u\n",
1908 trace_iwlwifi_dev_ucode_event(priv
, time
,
1914 /* Allow device to power down */
1915 iwl_release_nic_access(priv
);
1916 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
1921 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1923 static int iwl_print_last_event_logs(struct iwl_priv
*priv
, u32 capacity
,
1924 u32 num_wraps
, u32 next_entry
,
1926 int pos
, char **buf
, size_t bufsz
)
1929 * display the newest DEFAULT_LOG_ENTRIES entries
1930 * i.e the entries just before the next ont that uCode would fill.
1933 if (next_entry
< size
) {
1934 pos
= iwl_print_event_log(priv
,
1935 capacity
- (size
- next_entry
),
1936 size
- next_entry
, mode
,
1938 pos
= iwl_print_event_log(priv
, 0,
1942 pos
= iwl_print_event_log(priv
, next_entry
- size
,
1943 size
, mode
, pos
, buf
, bufsz
);
1945 if (next_entry
< size
) {
1946 pos
= iwl_print_event_log(priv
, 0, next_entry
,
1947 mode
, pos
, buf
, bufsz
);
1949 pos
= iwl_print_event_log(priv
, next_entry
- size
,
1950 size
, mode
, pos
, buf
, bufsz
);
1956 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1958 int iwl_dump_nic_event_log(struct iwl_priv
*priv
, bool full_log
,
1959 char **buf
, bool display
)
1961 u32 base
; /* SRAM byte address of event log header */
1962 u32 capacity
; /* event log capacity in # entries */
1963 u32 mode
; /* 0 - no timestamp, 1 - timestamp recorded */
1964 u32 num_wraps
; /* # times uCode wrapped to top of log */
1965 u32 next_entry
; /* index of next entry to be written by uCode */
1966 u32 size
; /* # entries that we'll print */
1971 base
= priv
->device_pointers
.log_event_table
;
1972 if (priv
->ucode_type
== UCODE_SUBTYPE_INIT
) {
1973 logsize
= priv
->_agn
.init_evtlog_size
;
1975 base
= priv
->_agn
.init_evtlog_ptr
;
1977 logsize
= priv
->_agn
.inst_evtlog_size
;
1979 base
= priv
->_agn
.inst_evtlog_ptr
;
1982 if (!priv
->cfg
->ops
->lib
->is_valid_rtc_data_addr(base
)) {
1984 "Invalid event log pointer 0x%08X for %s uCode\n",
1986 (priv
->ucode_type
== UCODE_SUBTYPE_INIT
)
1991 /* event log header */
1992 capacity
= iwl_read_targ_mem(priv
, base
);
1993 mode
= iwl_read_targ_mem(priv
, base
+ (1 * sizeof(u32
)));
1994 num_wraps
= iwl_read_targ_mem(priv
, base
+ (2 * sizeof(u32
)));
1995 next_entry
= iwl_read_targ_mem(priv
, base
+ (3 * sizeof(u32
)));
1997 if (capacity
> logsize
) {
1998 IWL_ERR(priv
, "Log capacity %d is bogus, limit to %d entries\n",
2003 if (next_entry
> logsize
) {
2004 IWL_ERR(priv
, "Log write index %d is bogus, limit to %d\n",
2005 next_entry
, logsize
);
2006 next_entry
= logsize
;
2009 size
= num_wraps
? capacity
: next_entry
;
2011 /* bail out if nothing in log */
2013 IWL_ERR(priv
, "Start IWL Event Log Dump: nothing in log\n");
2017 /* enable/disable bt channel inhibition */
2018 priv
->bt_ch_announce
= iwlagn_bt_ch_announce
;
2020 #ifdef CONFIG_IWLWIFI_DEBUG
2021 if (!(iwl_get_debug_level(priv
) & IWL_DL_FW_ERRORS
) && !full_log
)
2022 size
= (size
> DEFAULT_DUMP_EVENT_LOG_ENTRIES
)
2023 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES
: size
;
2025 size
= (size
> DEFAULT_DUMP_EVENT_LOG_ENTRIES
)
2026 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES
: size
;
2028 IWL_ERR(priv
, "Start IWL Event Log Dump: display last %u entries\n",
2031 #ifdef CONFIG_IWLWIFI_DEBUG
2034 bufsz
= capacity
* 48;
2037 *buf
= kmalloc(bufsz
, GFP_KERNEL
);
2041 if ((iwl_get_debug_level(priv
) & IWL_DL_FW_ERRORS
) || full_log
) {
2043 * if uCode has wrapped back to top of log,
2044 * start at the oldest entry,
2045 * i.e the next one that uCode would fill.
2048 pos
= iwl_print_event_log(priv
, next_entry
,
2049 capacity
- next_entry
, mode
,
2051 /* (then/else) start at top of log */
2052 pos
= iwl_print_event_log(priv
, 0,
2053 next_entry
, mode
, pos
, buf
, bufsz
);
2055 pos
= iwl_print_last_event_logs(priv
, capacity
, num_wraps
,
2056 next_entry
, size
, mode
,
2059 pos
= iwl_print_last_event_logs(priv
, capacity
, num_wraps
,
2060 next_entry
, size
, mode
,
2066 static void iwl_rf_kill_ct_config(struct iwl_priv
*priv
)
2068 struct iwl_ct_kill_config cmd
;
2069 struct iwl_ct_kill_throttling_config adv_cmd
;
2070 unsigned long flags
;
2073 spin_lock_irqsave(&priv
->lock
, flags
);
2074 iwl_write32(priv
, CSR_UCODE_DRV_GP1_CLR
,
2075 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT
);
2076 spin_unlock_irqrestore(&priv
->lock
, flags
);
2077 priv
->thermal_throttle
.ct_kill_toggle
= false;
2079 if (priv
->cfg
->base_params
->support_ct_kill_exit
) {
2080 adv_cmd
.critical_temperature_enter
=
2081 cpu_to_le32(priv
->hw_params
.ct_kill_threshold
);
2082 adv_cmd
.critical_temperature_exit
=
2083 cpu_to_le32(priv
->hw_params
.ct_kill_exit_threshold
);
2085 ret
= iwl_send_cmd_pdu(priv
, REPLY_CT_KILL_CONFIG_CMD
,
2086 sizeof(adv_cmd
), &adv_cmd
);
2088 IWL_ERR(priv
, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2090 IWL_DEBUG_INFO(priv
, "REPLY_CT_KILL_CONFIG_CMD "
2092 "critical temperature enter is %d,"
2094 priv
->hw_params
.ct_kill_threshold
,
2095 priv
->hw_params
.ct_kill_exit_threshold
);
2097 cmd
.critical_temperature_R
=
2098 cpu_to_le32(priv
->hw_params
.ct_kill_threshold
);
2100 ret
= iwl_send_cmd_pdu(priv
, REPLY_CT_KILL_CONFIG_CMD
,
2103 IWL_ERR(priv
, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2105 IWL_DEBUG_INFO(priv
, "REPLY_CT_KILL_CONFIG_CMD "
2107 "critical temperature is %d\n",
2108 priv
->hw_params
.ct_kill_threshold
);
2112 static int iwlagn_send_calib_cfg_rt(struct iwl_priv
*priv
, u32 cfg
)
2114 struct iwl_calib_cfg_cmd calib_cfg_cmd
;
2115 struct iwl_host_cmd cmd
= {
2116 .id
= CALIBRATION_CFG_CMD
,
2117 .len
= sizeof(struct iwl_calib_cfg_cmd
),
2118 .data
= &calib_cfg_cmd
,
2121 memset(&calib_cfg_cmd
, 0, sizeof(calib_cfg_cmd
));
2122 calib_cfg_cmd
.ucd_calib_cfg
.once
.is_enable
= IWL_CALIB_INIT_CFG_ALL
;
2123 calib_cfg_cmd
.ucd_calib_cfg
.once
.start
= cpu_to_le32(cfg
);
2125 return iwl_send_cmd(priv
, &cmd
);
2130 * iwl_alive_start - called after REPLY_ALIVE notification received
2131 * from protocol/runtime uCode (initialization uCode's
2132 * Alive gets handled by iwl_init_alive_start()).
2134 int iwl_alive_start(struct iwl_priv
*priv
)
2137 struct iwl_rxon_context
*ctx
= &priv
->contexts
[IWL_RXON_CTX_BSS
];
2139 iwl_reset_ict(priv
);
2141 IWL_DEBUG_INFO(priv
, "Runtime Alive received.\n");
2143 /* After the ALIVE response, we can send host commands to the uCode */
2144 set_bit(STATUS_ALIVE
, &priv
->status
);
2146 /* Enable watchdog to monitor the driver tx queues */
2147 iwl_setup_watchdog(priv
);
2149 if (iwl_is_rfkill(priv
))
2152 /* download priority table before any calibration request */
2153 if (priv
->cfg
->bt_params
&&
2154 priv
->cfg
->bt_params
->advanced_bt_coexist
) {
2155 /* Configure Bluetooth device coexistence support */
2156 priv
->bt_valid
= IWLAGN_BT_ALL_VALID_MSK
;
2157 priv
->kill_ack_mask
= IWLAGN_BT_KILL_ACK_MASK_DEFAULT
;
2158 priv
->kill_cts_mask
= IWLAGN_BT_KILL_CTS_MASK_DEFAULT
;
2159 priv
->cfg
->ops
->hcmd
->send_bt_config(priv
);
2160 priv
->bt_valid
= IWLAGN_BT_VALID_ENABLE_FLAGS
;
2161 iwlagn_send_prio_tbl(priv
);
2163 /* FIXME: w/a to force change uCode BT state machine */
2164 ret
= iwlagn_send_bt_env(priv
, IWL_BT_COEX_ENV_OPEN
,
2165 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2
);
2168 ret
= iwlagn_send_bt_env(priv
, IWL_BT_COEX_ENV_CLOSE
,
2169 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2
);
2173 if (priv
->hw_params
.calib_rt_cfg
)
2174 iwlagn_send_calib_cfg_rt(priv
, priv
->hw_params
.calib_rt_cfg
);
2176 ieee80211_wake_queues(priv
->hw
);
2178 priv
->active_rate
= IWL_RATES_MASK
;
2180 /* Configure Tx antenna selection based on H/W config */
2181 if (priv
->cfg
->ops
->hcmd
->set_tx_ant
)
2182 priv
->cfg
->ops
->hcmd
->set_tx_ant(priv
, priv
->cfg
->valid_tx_ant
);
2184 if (iwl_is_associated_ctx(ctx
)) {
2185 struct iwl_rxon_cmd
*active_rxon
=
2186 (struct iwl_rxon_cmd
*)&ctx
->active
;
2187 /* apply any changes in staging */
2188 ctx
->staging
.filter_flags
|= RXON_FILTER_ASSOC_MSK
;
2189 active_rxon
->filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
2191 struct iwl_rxon_context
*tmp
;
2192 /* Initialize our rx_config data */
2193 for_each_context(priv
, tmp
)
2194 iwl_connection_init_rx_config(priv
, tmp
);
2196 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
2197 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
, ctx
);
2200 if (!priv
->cfg
->bt_params
|| (priv
->cfg
->bt_params
&&
2201 !priv
->cfg
->bt_params
->advanced_bt_coexist
)) {
2203 * default is 2-wire BT coexexistence support
2205 priv
->cfg
->ops
->hcmd
->send_bt_config(priv
);
2208 iwl_reset_run_time_calib(priv
);
2210 set_bit(STATUS_READY
, &priv
->status
);
2212 /* Configure the adapter for unassociated operation */
2213 ret
= iwlcore_commit_rxon(priv
, ctx
);
2217 /* At this point, the NIC is initialized and operational */
2218 iwl_rf_kill_ct_config(priv
);
2220 IWL_DEBUG_INFO(priv
, "ALIVE processing complete.\n");
2222 return iwl_power_update_mode(priv
, true);
2225 static void iwl_cancel_deferred_work(struct iwl_priv
*priv
);
2227 static void __iwl_down(struct iwl_priv
*priv
)
2231 IWL_DEBUG_INFO(priv
, DRV_NAME
" is going down\n");
2233 iwl_scan_cancel_timeout(priv
, 200);
2235 exit_pending
= test_and_set_bit(STATUS_EXIT_PENDING
, &priv
->status
);
2237 /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2238 * to prevent rearm timer */
2239 del_timer_sync(&priv
->watchdog
);
2241 iwl_clear_ucode_stations(priv
, NULL
);
2242 iwl_dealloc_bcast_stations(priv
);
2243 iwl_clear_driver_stations(priv
);
2245 /* reset BT coex data */
2246 priv
->bt_status
= 0;
2247 if (priv
->cfg
->bt_params
)
2248 priv
->bt_traffic_load
=
2249 priv
->cfg
->bt_params
->bt_init_traffic_load
;
2251 priv
->bt_traffic_load
= 0;
2252 priv
->bt_full_concurrent
= false;
2253 priv
->bt_ci_compliance
= 0;
2255 /* Wipe out the EXIT_PENDING status bit if we are not actually
2256 * exiting the module */
2258 clear_bit(STATUS_EXIT_PENDING
, &priv
->status
);
2260 if (priv
->mac80211_registered
)
2261 ieee80211_stop_queues(priv
->hw
);
2263 /* Clear out all status bits but a few that are stable across reset */
2264 priv
->status
&= test_bit(STATUS_RF_KILL_HW
, &priv
->status
) <<
2266 test_bit(STATUS_GEO_CONFIGURED
, &priv
->status
) <<
2267 STATUS_GEO_CONFIGURED
|
2268 test_bit(STATUS_FW_ERROR
, &priv
->status
) <<
2270 test_bit(STATUS_EXIT_PENDING
, &priv
->status
) <<
2271 STATUS_EXIT_PENDING
;
2273 iwlagn_stop_device(priv
);
2275 dev_kfree_skb(priv
->beacon_skb
);
2276 priv
->beacon_skb
= NULL
;
2279 static void iwl_down(struct iwl_priv
*priv
)
2281 mutex_lock(&priv
->mutex
);
2283 mutex_unlock(&priv
->mutex
);
2285 iwl_cancel_deferred_work(priv
);
2288 #define HW_READY_TIMEOUT (50)
2290 /* Note: returns poll_bit return value, which is >= 0 if success */
2291 static int iwl_set_hw_ready(struct iwl_priv
*priv
)
2295 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
2296 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY
);
2298 /* See if we got it */
2299 ret
= iwl_poll_bit(priv
, CSR_HW_IF_CONFIG_REG
,
2300 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY
,
2301 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY
,
2304 IWL_DEBUG_INFO(priv
, "hardware%s ready\n", ret
< 0 ? " not" : "");
2308 /* Note: returns standard 0/-ERROR code */
2309 int iwl_prepare_card_hw(struct iwl_priv
*priv
)
2313 IWL_DEBUG_INFO(priv
, "iwl_prepare_card_hw enter\n");
2315 ret
= iwl_set_hw_ready(priv
);
2319 /* If HW is not ready, prepare the conditions to check again */
2320 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
2321 CSR_HW_IF_CONFIG_REG_PREPARE
);
2323 ret
= iwl_poll_bit(priv
, CSR_HW_IF_CONFIG_REG
,
2324 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE
,
2325 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE
, 150000);
2330 /* HW should be ready by now, check again. */
2331 ret
= iwl_set_hw_ready(priv
);
2337 #define MAX_HW_RESTARTS 5
2339 static int __iwl_up(struct iwl_priv
*priv
)
2341 struct iwl_rxon_context
*ctx
;
2344 lockdep_assert_held(&priv
->mutex
);
2346 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
)) {
2347 IWL_WARN(priv
, "Exit pending; will not bring the NIC up\n");
2351 for_each_context(priv
, ctx
) {
2352 ret
= iwlagn_alloc_bcast_station(priv
, ctx
);
2354 iwl_dealloc_bcast_stations(priv
);
2359 ret
= iwlagn_run_init_ucode(priv
);
2361 IWL_ERR(priv
, "Failed to run INIT ucode: %d\n", ret
);
2365 ret
= iwlagn_load_ucode_wait_alive(priv
,
2367 UCODE_SUBTYPE_REGULAR
,
2368 UCODE_SUBTYPE_REGULAR_NEW
);
2370 IWL_ERR(priv
, "Failed to start RT ucode: %d\n", ret
);
2374 ret
= iwl_alive_start(priv
);
2380 set_bit(STATUS_EXIT_PENDING
, &priv
->status
);
2382 clear_bit(STATUS_EXIT_PENDING
, &priv
->status
);
2384 IWL_ERR(priv
, "Unable to initialize device.\n");
2389 /*****************************************************************************
2391 * Workqueue callbacks
2393 *****************************************************************************/
2395 static void iwl_bg_run_time_calib_work(struct work_struct
*work
)
2397 struct iwl_priv
*priv
= container_of(work
, struct iwl_priv
,
2398 run_time_calib_work
);
2400 mutex_lock(&priv
->mutex
);
2402 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
) ||
2403 test_bit(STATUS_SCANNING
, &priv
->status
)) {
2404 mutex_unlock(&priv
->mutex
);
2408 if (priv
->start_calib
) {
2409 iwl_chain_noise_calibration(priv
);
2410 iwl_sensitivity_calibration(priv
);
2413 mutex_unlock(&priv
->mutex
);
2416 static void iwlagn_prepare_restart(struct iwl_priv
*priv
)
2418 struct iwl_rxon_context
*ctx
;
2419 bool bt_full_concurrent
;
2420 u8 bt_ci_compliance
;
2424 lockdep_assert_held(&priv
->mutex
);
2426 for_each_context(priv
, ctx
)
2431 * __iwl_down() will clear the BT status variables,
2432 * which is correct, but when we restart we really
2433 * want to keep them so restore them afterwards.
2435 * The restart process will later pick them up and
2436 * re-configure the hw when we reconfigure the BT
2439 bt_full_concurrent
= priv
->bt_full_concurrent
;
2440 bt_ci_compliance
= priv
->bt_ci_compliance
;
2441 bt_load
= priv
->bt_traffic_load
;
2442 bt_status
= priv
->bt_status
;
2446 priv
->bt_full_concurrent
= bt_full_concurrent
;
2447 priv
->bt_ci_compliance
= bt_ci_compliance
;
2448 priv
->bt_traffic_load
= bt_load
;
2449 priv
->bt_status
= bt_status
;
2452 static void iwl_bg_restart(struct work_struct
*data
)
2454 struct iwl_priv
*priv
= container_of(data
, struct iwl_priv
, restart
);
2456 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
2459 if (test_and_clear_bit(STATUS_FW_ERROR
, &priv
->status
)) {
2460 mutex_lock(&priv
->mutex
);
2461 iwlagn_prepare_restart(priv
);
2462 mutex_unlock(&priv
->mutex
);
2463 iwl_cancel_deferred_work(priv
);
2464 ieee80211_restart_hw(priv
->hw
);
2470 static void iwl_bg_rx_replenish(struct work_struct
*data
)
2472 struct iwl_priv
*priv
=
2473 container_of(data
, struct iwl_priv
, rx_replenish
);
2475 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
2478 mutex_lock(&priv
->mutex
);
2479 iwlagn_rx_replenish(priv
);
2480 mutex_unlock(&priv
->mutex
);
2483 static int iwl_mac_offchannel_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
,
2484 struct ieee80211_channel
*chan
,
2485 enum nl80211_channel_type channel_type
,
2488 struct iwl_priv
*priv
= hw
->priv
;
2491 /* Not supported if we don't have PAN */
2492 if (!(priv
->valid_contexts
& BIT(IWL_RXON_CTX_PAN
))) {
2497 /* Not supported on pre-P2P firmware */
2498 if (!(priv
->contexts
[IWL_RXON_CTX_PAN
].interface_modes
&
2499 BIT(NL80211_IFTYPE_P2P_CLIENT
))) {
2504 mutex_lock(&priv
->mutex
);
2506 if (!priv
->contexts
[IWL_RXON_CTX_PAN
].is_active
) {
2508 * If the PAN context is free, use the normal
2509 * way of doing remain-on-channel offload + TX.
2515 /* TODO: queue up if scanning? */
2516 if (test_bit(STATUS_SCANNING
, &priv
->status
) ||
2517 priv
->_agn
.offchan_tx_skb
) {
2523 * max_scan_ie_len doesn't include the blank SSID or the header,
2524 * so need to add that again here.
2526 if (skb
->len
> hw
->wiphy
->max_scan_ie_len
+ 24 + 2) {
2531 priv
->_agn
.offchan_tx_skb
= skb
;
2532 priv
->_agn
.offchan_tx_timeout
= wait
;
2533 priv
->_agn
.offchan_tx_chan
= chan
;
2535 ret
= iwl_scan_initiate(priv
, priv
->contexts
[IWL_RXON_CTX_PAN
].vif
,
2536 IWL_SCAN_OFFCH_TX
, chan
->band
);
2538 priv
->_agn
.offchan_tx_skb
= NULL
;
2540 mutex_unlock(&priv
->mutex
);
2548 static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw
*hw
)
2550 struct iwl_priv
*priv
= hw
->priv
;
2553 mutex_lock(&priv
->mutex
);
2555 if (!priv
->_agn
.offchan_tx_skb
) {
2560 priv
->_agn
.offchan_tx_skb
= NULL
;
2562 ret
= iwl_scan_cancel_timeout(priv
, 200);
2566 mutex_unlock(&priv
->mutex
);
2571 /*****************************************************************************
2573 * mac80211 entry point functions
2575 *****************************************************************************/
2578 * Not a mac80211 entry point function, but it fits in with all the
2579 * other mac80211 functions grouped here.
2581 static int iwl_mac_setup_register(struct iwl_priv
*priv
,
2582 struct iwlagn_ucode_capabilities
*capa
)
2585 struct ieee80211_hw
*hw
= priv
->hw
;
2586 struct iwl_rxon_context
*ctx
;
2588 hw
->rate_control_algorithm
= "iwl-agn-rs";
2590 /* Tell mac80211 our characteristics */
2591 hw
->flags
= IEEE80211_HW_SIGNAL_DBM
|
2592 IEEE80211_HW_AMPDU_AGGREGATION
|
2593 IEEE80211_HW_NEED_DTIM_PERIOD
|
2594 IEEE80211_HW_SPECTRUM_MGMT
|
2595 IEEE80211_HW_REPORTS_TX_ACK_STATUS
;
2597 hw
->max_tx_aggregation_subframes
= LINK_QUAL_AGG_FRAME_LIMIT_DEF
;
2599 hw
->flags
|= IEEE80211_HW_SUPPORTS_PS
|
2600 IEEE80211_HW_SUPPORTS_DYNAMIC_PS
;
2602 if (priv
->cfg
->sku
& IWL_SKU_N
)
2603 hw
->flags
|= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS
|
2604 IEEE80211_HW_SUPPORTS_STATIC_SMPS
;
2606 if (capa
->flags
& IWL_UCODE_TLV_FLAGS_MFP
)
2607 hw
->flags
|= IEEE80211_HW_MFP_CAPABLE
;
2609 hw
->sta_data_size
= sizeof(struct iwl_station_priv
);
2610 hw
->vif_data_size
= sizeof(struct iwl_vif_priv
);
2612 for_each_context(priv
, ctx
) {
2613 hw
->wiphy
->interface_modes
|= ctx
->interface_modes
;
2614 hw
->wiphy
->interface_modes
|= ctx
->exclusive_interface_modes
;
2617 hw
->wiphy
->max_remain_on_channel_duration
= 1000;
2619 hw
->wiphy
->flags
|= WIPHY_FLAG_CUSTOM_REGULATORY
|
2620 WIPHY_FLAG_DISABLE_BEACON_HINTS
|
2621 WIPHY_FLAG_IBSS_RSN
;
2624 * For now, disable PS by default because it affects
2625 * RX performance significantly.
2627 hw
->wiphy
->flags
&= ~WIPHY_FLAG_PS_ON_BY_DEFAULT
;
2629 hw
->wiphy
->max_scan_ssids
= PROBE_OPTION_MAX
;
2630 /* we create the 802.11 header and a zero-length SSID element */
2631 hw
->wiphy
->max_scan_ie_len
= capa
->max_probe_length
- 24 - 2;
2633 /* Default value; 4 EDCA QOS priorities */
2636 hw
->max_listen_interval
= IWL_CONN_MAX_LISTEN_INTERVAL
;
2638 if (priv
->bands
[IEEE80211_BAND_2GHZ
].n_channels
)
2639 priv
->hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] =
2640 &priv
->bands
[IEEE80211_BAND_2GHZ
];
2641 if (priv
->bands
[IEEE80211_BAND_5GHZ
].n_channels
)
2642 priv
->hw
->wiphy
->bands
[IEEE80211_BAND_5GHZ
] =
2643 &priv
->bands
[IEEE80211_BAND_5GHZ
];
2645 iwl_leds_init(priv
);
2647 ret
= ieee80211_register_hw(priv
->hw
);
2649 IWL_ERR(priv
, "Failed to register hw (error %d)\n", ret
);
2652 priv
->mac80211_registered
= 1;
2658 static int iwlagn_mac_start(struct ieee80211_hw
*hw
)
2660 struct iwl_priv
*priv
= hw
->priv
;
2663 IWL_DEBUG_MAC80211(priv
, "enter\n");
2665 /* we should be verifying the device is ready to be opened */
2666 mutex_lock(&priv
->mutex
);
2667 ret
= __iwl_up(priv
);
2668 mutex_unlock(&priv
->mutex
);
2672 IWL_DEBUG_INFO(priv
, "Start UP work done.\n");
2674 /* Now we should be done, and the READY bit should be set. */
2675 if (WARN_ON(!test_bit(STATUS_READY
, &priv
->status
)))
2678 iwlagn_led_enable(priv
);
2681 IWL_DEBUG_MAC80211(priv
, "leave\n");
2685 static void iwlagn_mac_stop(struct ieee80211_hw
*hw
)
2687 struct iwl_priv
*priv
= hw
->priv
;
2689 IWL_DEBUG_MAC80211(priv
, "enter\n");
2698 flush_workqueue(priv
->workqueue
);
2700 /* User space software may expect getting rfkill changes
2701 * even if interface is down */
2702 iwl_write32(priv
, CSR_INT
, 0xFFFFFFFF);
2703 iwl_enable_rfkill_int(priv
);
2705 IWL_DEBUG_MAC80211(priv
, "leave\n");
2708 static void iwlagn_mac_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2710 struct iwl_priv
*priv
= hw
->priv
;
2712 IWL_DEBUG_MACDUMP(priv
, "enter\n");
2714 IWL_DEBUG_TX(priv
, "dev->xmit(%d bytes) at rate 0x%02x\n", skb
->len
,
2715 ieee80211_get_tx_rate(hw
, IEEE80211_SKB_CB(skb
))->bitrate
);
2717 if (iwlagn_tx_skb(priv
, skb
))
2718 dev_kfree_skb_any(skb
);
2720 IWL_DEBUG_MACDUMP(priv
, "leave\n");
2723 static void iwlagn_mac_update_tkip_key(struct ieee80211_hw
*hw
,
2724 struct ieee80211_vif
*vif
,
2725 struct ieee80211_key_conf
*keyconf
,
2726 struct ieee80211_sta
*sta
,
2727 u32 iv32
, u16
*phase1key
)
2729 struct iwl_priv
*priv
= hw
->priv
;
2730 struct iwl_vif_priv
*vif_priv
= (void *)vif
->drv_priv
;
2732 IWL_DEBUG_MAC80211(priv
, "enter\n");
2734 iwl_update_tkip_key(priv
, vif_priv
->ctx
, keyconf
, sta
,
2737 IWL_DEBUG_MAC80211(priv
, "leave\n");
2740 static int iwlagn_mac_set_key(struct ieee80211_hw
*hw
, enum set_key_cmd cmd
,
2741 struct ieee80211_vif
*vif
,
2742 struct ieee80211_sta
*sta
,
2743 struct ieee80211_key_conf
*key
)
2745 struct iwl_priv
*priv
= hw
->priv
;
2746 struct iwl_vif_priv
*vif_priv
= (void *)vif
->drv_priv
;
2747 struct iwl_rxon_context
*ctx
= vif_priv
->ctx
;
2750 bool is_default_wep_key
= false;
2752 IWL_DEBUG_MAC80211(priv
, "enter\n");
2754 if (iwlagn_mod_params
.sw_crypto
) {
2755 IWL_DEBUG_MAC80211(priv
, "leave - hwcrypto disabled\n");
2760 * To support IBSS RSN, don't program group keys in IBSS, the
2761 * hardware will then not attempt to decrypt the frames.
2763 if (vif
->type
== NL80211_IFTYPE_ADHOC
&&
2764 !(key
->flags
& IEEE80211_KEY_FLAG_PAIRWISE
))
2767 sta_id
= iwl_sta_id_or_broadcast(priv
, vif_priv
->ctx
, sta
);
2768 if (sta_id
== IWL_INVALID_STATION
)
2771 mutex_lock(&priv
->mutex
);
2772 iwl_scan_cancel_timeout(priv
, 100);
2775 * If we are getting WEP group key and we didn't receive any key mapping
2776 * so far, we are in legacy wep mode (group key only), otherwise we are
2778 * In legacy wep mode, we use another host command to the uCode.
2780 if ((key
->cipher
== WLAN_CIPHER_SUITE_WEP40
||
2781 key
->cipher
== WLAN_CIPHER_SUITE_WEP104
) &&
2784 is_default_wep_key
= !ctx
->key_mapping_keys
;
2786 is_default_wep_key
=
2787 (key
->hw_key_idx
== HW_KEY_DEFAULT
);
2792 if (is_default_wep_key
)
2793 ret
= iwl_set_default_wep_key(priv
, vif_priv
->ctx
, key
);
2795 ret
= iwl_set_dynamic_key(priv
, vif_priv
->ctx
,
2798 IWL_DEBUG_MAC80211(priv
, "enable hwcrypto key\n");
2801 if (is_default_wep_key
)
2802 ret
= iwl_remove_default_wep_key(priv
, ctx
, key
);
2804 ret
= iwl_remove_dynamic_key(priv
, ctx
, key
, sta_id
);
2806 IWL_DEBUG_MAC80211(priv
, "disable hwcrypto key\n");
2812 mutex_unlock(&priv
->mutex
);
2813 IWL_DEBUG_MAC80211(priv
, "leave\n");
2818 static int iwlagn_mac_ampdu_action(struct ieee80211_hw
*hw
,
2819 struct ieee80211_vif
*vif
,
2820 enum ieee80211_ampdu_mlme_action action
,
2821 struct ieee80211_sta
*sta
, u16 tid
, u16
*ssn
,
2824 struct iwl_priv
*priv
= hw
->priv
;
2826 struct iwl_station_priv
*sta_priv
= (void *) sta
->drv_priv
;
2828 IWL_DEBUG_HT(priv
, "A-MPDU action on addr %pM tid %d\n",
2831 if (!(priv
->cfg
->sku
& IWL_SKU_N
))
2834 mutex_lock(&priv
->mutex
);
2837 case IEEE80211_AMPDU_RX_START
:
2838 IWL_DEBUG_HT(priv
, "start Rx\n");
2839 ret
= iwl_sta_rx_agg_start(priv
, sta
, tid
, *ssn
);
2841 case IEEE80211_AMPDU_RX_STOP
:
2842 IWL_DEBUG_HT(priv
, "stop Rx\n");
2843 ret
= iwl_sta_rx_agg_stop(priv
, sta
, tid
);
2844 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
2847 case IEEE80211_AMPDU_TX_START
:
2848 IWL_DEBUG_HT(priv
, "start Tx\n");
2849 ret
= iwlagn_tx_agg_start(priv
, vif
, sta
, tid
, ssn
);
2851 priv
->_agn
.agg_tids_count
++;
2852 IWL_DEBUG_HT(priv
, "priv->_agn.agg_tids_count = %u\n",
2853 priv
->_agn
.agg_tids_count
);
2856 case IEEE80211_AMPDU_TX_STOP
:
2857 IWL_DEBUG_HT(priv
, "stop Tx\n");
2858 ret
= iwlagn_tx_agg_stop(priv
, vif
, sta
, tid
);
2859 if ((ret
== 0) && (priv
->_agn
.agg_tids_count
> 0)) {
2860 priv
->_agn
.agg_tids_count
--;
2861 IWL_DEBUG_HT(priv
, "priv->_agn.agg_tids_count = %u\n",
2862 priv
->_agn
.agg_tids_count
);
2864 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
2866 if (priv
->cfg
->ht_params
&&
2867 priv
->cfg
->ht_params
->use_rts_for_aggregation
) {
2868 struct iwl_station_priv
*sta_priv
=
2869 (void *) sta
->drv_priv
;
2871 * switch off RTS/CTS if it was previously enabled
2874 sta_priv
->lq_sta
.lq
.general_params
.flags
&=
2875 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK
;
2876 iwl_send_lq_cmd(priv
, iwl_rxon_ctx_from_vif(vif
),
2877 &sta_priv
->lq_sta
.lq
, CMD_ASYNC
, false);
2880 case IEEE80211_AMPDU_TX_OPERATIONAL
:
2881 buf_size
= min_t(int, buf_size
, LINK_QUAL_AGG_FRAME_LIMIT_DEF
);
2883 iwlagn_txq_agg_queue_setup(priv
, sta
, tid
, buf_size
);
2886 * If the limit is 0, then it wasn't initialised yet,
2887 * use the default. We can do that since we take the
2888 * minimum below, and we don't want to go above our
2889 * default due to hardware restrictions.
2891 if (sta_priv
->max_agg_bufsize
== 0)
2892 sta_priv
->max_agg_bufsize
=
2893 LINK_QUAL_AGG_FRAME_LIMIT_DEF
;
2896 * Even though in theory the peer could have different
2897 * aggregation reorder buffer sizes for different sessions,
2898 * our ucode doesn't allow for that and has a global limit
2899 * for each station. Therefore, use the minimum of all the
2900 * aggregation sessions and our default value.
2902 sta_priv
->max_agg_bufsize
=
2903 min(sta_priv
->max_agg_bufsize
, buf_size
);
2905 if (priv
->cfg
->ht_params
&&
2906 priv
->cfg
->ht_params
->use_rts_for_aggregation
) {
2908 * switch to RTS/CTS if it is the prefer protection
2909 * method for HT traffic
2912 sta_priv
->lq_sta
.lq
.general_params
.flags
|=
2913 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK
;
2916 sta_priv
->lq_sta
.lq
.agg_params
.agg_frame_cnt_limit
=
2917 sta_priv
->max_agg_bufsize
;
2919 iwl_send_lq_cmd(priv
, iwl_rxon_ctx_from_vif(vif
),
2920 &sta_priv
->lq_sta
.lq
, CMD_ASYNC
, false);
2924 mutex_unlock(&priv
->mutex
);
2929 static int iwlagn_mac_sta_add(struct ieee80211_hw
*hw
,
2930 struct ieee80211_vif
*vif
,
2931 struct ieee80211_sta
*sta
)
2933 struct iwl_priv
*priv
= hw
->priv
;
2934 struct iwl_station_priv
*sta_priv
= (void *)sta
->drv_priv
;
2935 struct iwl_vif_priv
*vif_priv
= (void *)vif
->drv_priv
;
2936 bool is_ap
= vif
->type
== NL80211_IFTYPE_STATION
;
2940 IWL_DEBUG_INFO(priv
, "received request to add station %pM\n",
2942 mutex_lock(&priv
->mutex
);
2943 IWL_DEBUG_INFO(priv
, "proceeding to add station %pM\n",
2945 sta_priv
->common
.sta_id
= IWL_INVALID_STATION
;
2947 atomic_set(&sta_priv
->pending_frames
, 0);
2948 if (vif
->type
== NL80211_IFTYPE_AP
)
2949 sta_priv
->client
= true;
2951 ret
= iwl_add_station_common(priv
, vif_priv
->ctx
, sta
->addr
,
2952 is_ap
, sta
, &sta_id
);
2954 IWL_ERR(priv
, "Unable to add station %pM (%d)\n",
2956 /* Should we return success if return code is EEXIST ? */
2957 mutex_unlock(&priv
->mutex
);
2961 sta_priv
->common
.sta_id
= sta_id
;
2963 /* Initialize rate scaling */
2964 IWL_DEBUG_INFO(priv
, "Initializing rate scaling for station %pM\n",
2966 iwl_rs_rate_init(priv
, sta
, sta_id
);
2967 mutex_unlock(&priv
->mutex
);
2972 static void iwlagn_mac_channel_switch(struct ieee80211_hw
*hw
,
2973 struct ieee80211_channel_switch
*ch_switch
)
2975 struct iwl_priv
*priv
= hw
->priv
;
2976 const struct iwl_channel_info
*ch_info
;
2977 struct ieee80211_conf
*conf
= &hw
->conf
;
2978 struct ieee80211_channel
*channel
= ch_switch
->channel
;
2979 struct iwl_ht_config
*ht_conf
= &priv
->current_ht_config
;
2982 * When we add support for multiple interfaces, we need to
2983 * revisit this. The channel switch command in the device
2984 * only affects the BSS context, but what does that really
2985 * mean? And what if we get a CSA on the second interface?
2986 * This needs a lot of work.
2988 struct iwl_rxon_context
*ctx
= &priv
->contexts
[IWL_RXON_CTX_BSS
];
2990 unsigned long flags
= 0;
2992 IWL_DEBUG_MAC80211(priv
, "enter\n");
2994 mutex_lock(&priv
->mutex
);
2996 if (iwl_is_rfkill(priv
))
2999 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
) ||
3000 test_bit(STATUS_SCANNING
, &priv
->status
))
3003 if (!iwl_is_associated_ctx(ctx
))
3006 /* channel switch in progress */
3007 if (priv
->switch_rxon
.switch_in_progress
== true)
3010 if (priv
->cfg
->ops
->lib
->set_channel_switch
) {
3012 ch
= channel
->hw_value
;
3013 if (le16_to_cpu(ctx
->active
.channel
) != ch
) {
3014 ch_info
= iwl_get_channel_info(priv
,
3017 if (!is_channel_valid(ch_info
)) {
3018 IWL_DEBUG_MAC80211(priv
, "invalid channel\n");
3021 spin_lock_irqsave(&priv
->lock
, flags
);
3023 priv
->current_ht_config
.smps
= conf
->smps_mode
;
3025 /* Configure HT40 channels */
3026 ctx
->ht
.enabled
= conf_is_ht(conf
);
3027 if (ctx
->ht
.enabled
) {
3028 if (conf_is_ht40_minus(conf
)) {
3029 ctx
->ht
.extension_chan_offset
=
3030 IEEE80211_HT_PARAM_CHA_SEC_BELOW
;
3031 ctx
->ht
.is_40mhz
= true;
3032 } else if (conf_is_ht40_plus(conf
)) {
3033 ctx
->ht
.extension_chan_offset
=
3034 IEEE80211_HT_PARAM_CHA_SEC_ABOVE
;
3035 ctx
->ht
.is_40mhz
= true;
3037 ctx
->ht
.extension_chan_offset
=
3038 IEEE80211_HT_PARAM_CHA_SEC_NONE
;
3039 ctx
->ht
.is_40mhz
= false;
3042 ctx
->ht
.is_40mhz
= false;
3044 if ((le16_to_cpu(ctx
->staging
.channel
) != ch
))
3045 ctx
->staging
.flags
= 0;
3047 iwl_set_rxon_channel(priv
, channel
, ctx
);
3048 iwl_set_rxon_ht(priv
, ht_conf
);
3049 iwl_set_flags_for_band(priv
, ctx
, channel
->band
,
3051 spin_unlock_irqrestore(&priv
->lock
, flags
);
3055 * at this point, staging_rxon has the
3056 * configuration for channel switch
3058 if (priv
->cfg
->ops
->lib
->set_channel_switch(priv
,
3060 priv
->switch_rxon
.switch_in_progress
= false;
3064 mutex_unlock(&priv
->mutex
);
3065 if (!priv
->switch_rxon
.switch_in_progress
)
3066 ieee80211_chswitch_done(ctx
->vif
, false);
3067 IWL_DEBUG_MAC80211(priv
, "leave\n");
3070 static void iwlagn_configure_filter(struct ieee80211_hw
*hw
,
3071 unsigned int changed_flags
,
3072 unsigned int *total_flags
,
3075 struct iwl_priv
*priv
= hw
->priv
;
3076 __le32 filter_or
= 0, filter_nand
= 0;
3077 struct iwl_rxon_context
*ctx
;
3079 #define CHK(test, flag) do { \
3080 if (*total_flags & (test)) \
3081 filter_or |= (flag); \
3083 filter_nand |= (flag); \
3086 IWL_DEBUG_MAC80211(priv
, "Enter: changed: 0x%x, total: 0x%x\n",
3087 changed_flags
, *total_flags
);
3089 CHK(FIF_OTHER_BSS
| FIF_PROMISC_IN_BSS
, RXON_FILTER_PROMISC_MSK
);
3090 /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
3091 CHK(FIF_CONTROL
, RXON_FILTER_CTL2HOST_MSK
| RXON_FILTER_PROMISC_MSK
);
3092 CHK(FIF_BCN_PRBRESP_PROMISC
, RXON_FILTER_BCON_AWARE_MSK
);
3096 mutex_lock(&priv
->mutex
);
3098 for_each_context(priv
, ctx
) {
3099 ctx
->staging
.filter_flags
&= ~filter_nand
;
3100 ctx
->staging
.filter_flags
|= filter_or
;
3103 * Not committing directly because hardware can perform a scan,
3104 * but we'll eventually commit the filter flags change anyway.
3108 mutex_unlock(&priv
->mutex
);
3111 * Receiving all multicast frames is always enabled by the
3112 * default flags setup in iwl_connection_init_rx_config()
3113 * since we currently do not support programming multicast
3114 * filters into the device.
3116 *total_flags
&= FIF_OTHER_BSS
| FIF_ALLMULTI
| FIF_PROMISC_IN_BSS
|
3117 FIF_BCN_PRBRESP_PROMISC
| FIF_CONTROL
;
3120 static void iwlagn_mac_flush(struct ieee80211_hw
*hw
, bool drop
)
3122 struct iwl_priv
*priv
= hw
->priv
;
3124 mutex_lock(&priv
->mutex
);
3125 IWL_DEBUG_MAC80211(priv
, "enter\n");
3127 /* do not support "flush" */
3128 if (!priv
->cfg
->ops
->lib
->txfifo_flush
)
3131 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
)) {
3132 IWL_DEBUG_TX(priv
, "Aborting flush due to device shutdown\n");
3135 if (iwl_is_rfkill(priv
)) {
3136 IWL_DEBUG_TX(priv
, "Aborting flush due to RF Kill\n");
3141 * mac80211 will not push any more frames for transmit
3142 * until the flush is completed
3145 IWL_DEBUG_MAC80211(priv
, "send flush command\n");
3146 if (priv
->cfg
->ops
->lib
->txfifo_flush(priv
, IWL_DROP_ALL
)) {
3147 IWL_ERR(priv
, "flush request fail\n");
3151 IWL_DEBUG_MAC80211(priv
, "wait transmit/flush all frames\n");
3152 iwlagn_wait_tx_queue_empty(priv
);
3154 mutex_unlock(&priv
->mutex
);
3155 IWL_DEBUG_MAC80211(priv
, "leave\n");
3158 static void iwlagn_disable_roc(struct iwl_priv
*priv
)
3160 struct iwl_rxon_context
*ctx
= &priv
->contexts
[IWL_RXON_CTX_PAN
];
3161 struct ieee80211_channel
*chan
= ACCESS_ONCE(priv
->hw
->conf
.channel
);
3163 lockdep_assert_held(&priv
->mutex
);
3165 if (!ctx
->is_active
)
3168 ctx
->staging
.dev_type
= RXON_DEV_TYPE_2STA
;
3169 ctx
->staging
.filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
3170 iwl_set_rxon_channel(priv
, chan
, ctx
);
3171 iwl_set_flags_for_band(priv
, ctx
, chan
->band
, NULL
);
3173 priv
->_agn
.hw_roc_channel
= NULL
;
3175 iwlcore_commit_rxon(priv
, ctx
);
3177 ctx
->is_active
= false;
3180 static void iwlagn_bg_roc_done(struct work_struct
*work
)
3182 struct iwl_priv
*priv
= container_of(work
, struct iwl_priv
,
3183 _agn
.hw_roc_work
.work
);
3185 mutex_lock(&priv
->mutex
);
3186 ieee80211_remain_on_channel_expired(priv
->hw
);
3187 iwlagn_disable_roc(priv
);
3188 mutex_unlock(&priv
->mutex
);
3191 static int iwl_mac_remain_on_channel(struct ieee80211_hw
*hw
,
3192 struct ieee80211_channel
*channel
,
3193 enum nl80211_channel_type channel_type
,
3196 struct iwl_priv
*priv
= hw
->priv
;
3199 if (!(priv
->valid_contexts
& BIT(IWL_RXON_CTX_PAN
)))
3202 if (!(priv
->contexts
[IWL_RXON_CTX_PAN
].interface_modes
&
3203 BIT(NL80211_IFTYPE_P2P_CLIENT
)))
3206 mutex_lock(&priv
->mutex
);
3208 if (priv
->contexts
[IWL_RXON_CTX_PAN
].is_active
||
3209 test_bit(STATUS_SCAN_HW
, &priv
->status
)) {
3214 priv
->contexts
[IWL_RXON_CTX_PAN
].is_active
= true;
3215 priv
->_agn
.hw_roc_channel
= channel
;
3216 priv
->_agn
.hw_roc_chantype
= channel_type
;
3217 priv
->_agn
.hw_roc_duration
= DIV_ROUND_UP(duration
* 1000, 1024);
3218 iwlcore_commit_rxon(priv
, &priv
->contexts
[IWL_RXON_CTX_PAN
]);
3219 queue_delayed_work(priv
->workqueue
, &priv
->_agn
.hw_roc_work
,
3220 msecs_to_jiffies(duration
+ 20));
3222 msleep(IWL_MIN_SLOT_TIME
); /* TU is almost ms */
3223 ieee80211_ready_on_channel(priv
->hw
);
3226 mutex_unlock(&priv
->mutex
);
3231 static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw
*hw
)
3233 struct iwl_priv
*priv
= hw
->priv
;
3235 if (!(priv
->valid_contexts
& BIT(IWL_RXON_CTX_PAN
)))
3238 cancel_delayed_work_sync(&priv
->_agn
.hw_roc_work
);
3240 mutex_lock(&priv
->mutex
);
3241 iwlagn_disable_roc(priv
);
3242 mutex_unlock(&priv
->mutex
);
3247 /*****************************************************************************
3249 * driver setup and teardown
3251 *****************************************************************************/
3253 static void iwl_setup_deferred_work(struct iwl_priv
*priv
)
3255 priv
->workqueue
= create_singlethread_workqueue(DRV_NAME
);
3257 init_waitqueue_head(&priv
->wait_command_queue
);
3259 INIT_WORK(&priv
->restart
, iwl_bg_restart
);
3260 INIT_WORK(&priv
->rx_replenish
, iwl_bg_rx_replenish
);
3261 INIT_WORK(&priv
->beacon_update
, iwl_bg_beacon_update
);
3262 INIT_WORK(&priv
->run_time_calib_work
, iwl_bg_run_time_calib_work
);
3263 INIT_WORK(&priv
->tx_flush
, iwl_bg_tx_flush
);
3264 INIT_WORK(&priv
->bt_full_concurrency
, iwl_bg_bt_full_concurrency
);
3265 INIT_WORK(&priv
->bt_runtime_config
, iwl_bg_bt_runtime_config
);
3266 INIT_DELAYED_WORK(&priv
->_agn
.hw_roc_work
, iwlagn_bg_roc_done
);
3268 iwl_setup_scan_deferred_work(priv
);
3270 if (priv
->cfg
->ops
->lib
->setup_deferred_work
)
3271 priv
->cfg
->ops
->lib
->setup_deferred_work(priv
);
3273 init_timer(&priv
->statistics_periodic
);
3274 priv
->statistics_periodic
.data
= (unsigned long)priv
;
3275 priv
->statistics_periodic
.function
= iwl_bg_statistics_periodic
;
3277 init_timer(&priv
->ucode_trace
);
3278 priv
->ucode_trace
.data
= (unsigned long)priv
;
3279 priv
->ucode_trace
.function
= iwl_bg_ucode_trace
;
3281 init_timer(&priv
->watchdog
);
3282 priv
->watchdog
.data
= (unsigned long)priv
;
3283 priv
->watchdog
.function
= iwl_bg_watchdog
;
3285 tasklet_init(&priv
->irq_tasklet
, (void (*)(unsigned long))
3286 iwl_irq_tasklet
, (unsigned long)priv
);
3289 static void iwl_cancel_deferred_work(struct iwl_priv
*priv
)
3291 if (priv
->cfg
->ops
->lib
->cancel_deferred_work
)
3292 priv
->cfg
->ops
->lib
->cancel_deferred_work(priv
);
3294 cancel_work_sync(&priv
->run_time_calib_work
);
3295 cancel_work_sync(&priv
->beacon_update
);
3297 iwl_cancel_scan_deferred_work(priv
);
3299 cancel_work_sync(&priv
->bt_full_concurrency
);
3300 cancel_work_sync(&priv
->bt_runtime_config
);
3302 del_timer_sync(&priv
->statistics_periodic
);
3303 del_timer_sync(&priv
->ucode_trace
);
3306 static void iwl_init_hw_rates(struct iwl_priv
*priv
,
3307 struct ieee80211_rate
*rates
)
3311 for (i
= 0; i
< IWL_RATE_COUNT_LEGACY
; i
++) {
3312 rates
[i
].bitrate
= iwl_rates
[i
].ieee
* 5;
3313 rates
[i
].hw_value
= i
; /* Rate scaling will work on indexes */
3314 rates
[i
].hw_value_short
= i
;
3316 if ((i
>= IWL_FIRST_CCK_RATE
) && (i
<= IWL_LAST_CCK_RATE
)) {
3318 * If CCK != 1M then set short preamble rate flag.
3321 (iwl_rates
[i
].plcp
== IWL_RATE_1M_PLCP
) ?
3322 0 : IEEE80211_RATE_SHORT_PREAMBLE
;
3327 static int iwl_init_drv(struct iwl_priv
*priv
)
3331 spin_lock_init(&priv
->sta_lock
);
3332 spin_lock_init(&priv
->hcmd_lock
);
3334 mutex_init(&priv
->mutex
);
3336 priv
->ieee_channels
= NULL
;
3337 priv
->ieee_rates
= NULL
;
3338 priv
->band
= IEEE80211_BAND_2GHZ
;
3340 priv
->iw_mode
= NL80211_IFTYPE_STATION
;
3341 priv
->current_ht_config
.smps
= IEEE80211_SMPS_STATIC
;
3342 priv
->missed_beacon_threshold
= IWL_MISSED_BEACON_THRESHOLD_DEF
;
3343 priv
->_agn
.agg_tids_count
= 0;
3345 /* initialize force reset */
3346 priv
->force_reset
[IWL_RF_RESET
].reset_duration
=
3347 IWL_DELAY_NEXT_FORCE_RF_RESET
;
3348 priv
->force_reset
[IWL_FW_RESET
].reset_duration
=
3349 IWL_DELAY_NEXT_FORCE_FW_RELOAD
;
3351 priv
->rx_statistics_jiffies
= jiffies
;
3353 /* Choose which receivers/antennas to use */
3354 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
3355 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
,
3356 &priv
->contexts
[IWL_RXON_CTX_BSS
]);
3358 iwl_init_scan_params(priv
);
3361 if (priv
->cfg
->bt_params
&&
3362 priv
->cfg
->bt_params
->advanced_bt_coexist
) {
3363 priv
->kill_ack_mask
= IWLAGN_BT_KILL_ACK_MASK_DEFAULT
;
3364 priv
->kill_cts_mask
= IWLAGN_BT_KILL_CTS_MASK_DEFAULT
;
3365 priv
->bt_valid
= IWLAGN_BT_ALL_VALID_MSK
;
3366 priv
->bt_on_thresh
= BT_ON_THRESHOLD_DEF
;
3367 priv
->bt_duration
= BT_DURATION_LIMIT_DEF
;
3368 priv
->dynamic_frag_thresh
= BT_FRAG_THRESHOLD_DEF
;
3371 ret
= iwl_init_channel_map(priv
);
3373 IWL_ERR(priv
, "initializing regulatory failed: %d\n", ret
);
3377 ret
= iwlcore_init_geos(priv
);
3379 IWL_ERR(priv
, "initializing geos failed: %d\n", ret
);
3380 goto err_free_channel_map
;
3382 iwl_init_hw_rates(priv
, priv
->ieee_rates
);
3386 err_free_channel_map
:
3387 iwl_free_channel_map(priv
);
3392 static void iwl_uninit_drv(struct iwl_priv
*priv
)
3394 iwl_calib_free_results(priv
);
3395 iwlcore_free_geos(priv
);
3396 iwl_free_channel_map(priv
);
3397 kfree(priv
->scan_cmd
);
3400 struct ieee80211_ops iwlagn_hw_ops
= {
3401 .tx
= iwlagn_mac_tx
,
3402 .start
= iwlagn_mac_start
,
3403 .stop
= iwlagn_mac_stop
,
3404 .add_interface
= iwl_mac_add_interface
,
3405 .remove_interface
= iwl_mac_remove_interface
,
3406 .change_interface
= iwl_mac_change_interface
,
3407 .config
= iwlagn_mac_config
,
3408 .configure_filter
= iwlagn_configure_filter
,
3409 .set_key
= iwlagn_mac_set_key
,
3410 .update_tkip_key
= iwlagn_mac_update_tkip_key
,
3411 .conf_tx
= iwl_mac_conf_tx
,
3412 .bss_info_changed
= iwlagn_bss_info_changed
,
3413 .ampdu_action
= iwlagn_mac_ampdu_action
,
3414 .hw_scan
= iwl_mac_hw_scan
,
3415 .sta_notify
= iwlagn_mac_sta_notify
,
3416 .sta_add
= iwlagn_mac_sta_add
,
3417 .sta_remove
= iwl_mac_sta_remove
,
3418 .channel_switch
= iwlagn_mac_channel_switch
,
3419 .flush
= iwlagn_mac_flush
,
3420 .tx_last_beacon
= iwl_mac_tx_last_beacon
,
3421 .remain_on_channel
= iwl_mac_remain_on_channel
,
3422 .cancel_remain_on_channel
= iwl_mac_cancel_remain_on_channel
,
3423 .offchannel_tx
= iwl_mac_offchannel_tx
,
3424 .offchannel_tx_cancel_wait
= iwl_mac_offchannel_tx_cancel_wait
,
3425 CFG80211_TESTMODE_CMD(iwl_testmode_cmd
)
3428 static u32
iwl_hw_detect(struct iwl_priv
*priv
)
3432 pci_read_config_byte(priv
->pci_dev
, PCI_REVISION_ID
, &rev_id
);
3433 IWL_DEBUG_INFO(priv
, "HW Revision ID = 0x%X\n", rev_id
);
3434 return iwl_read32(priv
, CSR_HW_REV
);
3437 static int iwl_set_hw_params(struct iwl_priv
*priv
)
3439 priv
->hw_params
.max_rxq_size
= RX_QUEUE_SIZE
;
3440 priv
->hw_params
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
3441 if (iwlagn_mod_params
.amsdu_size_8K
)
3442 priv
->hw_params
.rx_page_order
= get_order(IWL_RX_BUF_SIZE_8K
);
3444 priv
->hw_params
.rx_page_order
= get_order(IWL_RX_BUF_SIZE_4K
);
3446 priv
->hw_params
.max_beacon_itrvl
= IWL_MAX_UCODE_BEACON_INTERVAL
;
3448 if (iwlagn_mod_params
.disable_11n
)
3449 priv
->cfg
->sku
&= ~IWL_SKU_N
;
3451 /* Device-specific setup */
3452 return priv
->cfg
->ops
->lib
->set_hw_params(priv
);
3455 static const u8 iwlagn_bss_ac_to_fifo
[] = {
3462 static const u8 iwlagn_bss_ac_to_queue
[] = {
3466 static const u8 iwlagn_pan_ac_to_fifo
[] = {
3467 IWL_TX_FIFO_VO_IPAN
,
3468 IWL_TX_FIFO_VI_IPAN
,
3469 IWL_TX_FIFO_BE_IPAN
,
3470 IWL_TX_FIFO_BK_IPAN
,
3473 static const u8 iwlagn_pan_ac_to_queue
[] = {
3477 /* This function both allocates and initializes hw and priv. */
3478 static struct ieee80211_hw
*iwl_alloc_all(struct iwl_cfg
*cfg
)
3480 struct iwl_priv
*priv
;
3481 /* mac80211 allocates memory for this device instance, including
3482 * space for this driver's private structure */
3483 struct ieee80211_hw
*hw
;
3485 hw
= ieee80211_alloc_hw(sizeof(struct iwl_priv
), &iwlagn_hw_ops
);
3487 pr_err("%s: Can not allocate network device\n",
3499 static int iwl_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
3502 struct iwl_priv
*priv
;
3503 struct ieee80211_hw
*hw
;
3504 struct iwl_cfg
*cfg
= (struct iwl_cfg
*)(ent
->driver_data
);
3505 unsigned long flags
;
3506 u16 pci_cmd
, num_mac
;
3509 /************************
3510 * 1. Allocating HW data
3511 ************************/
3513 hw
= iwl_alloc_all(cfg
);
3519 /* At this point both hw and priv are allocated. */
3521 priv
->ucode_type
= UCODE_SUBTYPE_NONE_LOADED
;
3524 * The default context is always valid,
3525 * more may be discovered when firmware
3528 priv
->valid_contexts
= BIT(IWL_RXON_CTX_BSS
);
3530 for (i
= 0; i
< NUM_IWL_RXON_CTX
; i
++)
3531 priv
->contexts
[i
].ctxid
= i
;
3533 priv
->contexts
[IWL_RXON_CTX_BSS
].always_active
= true;
3534 priv
->contexts
[IWL_RXON_CTX_BSS
].is_active
= true;
3535 priv
->contexts
[IWL_RXON_CTX_BSS
].rxon_cmd
= REPLY_RXON
;
3536 priv
->contexts
[IWL_RXON_CTX_BSS
].rxon_timing_cmd
= REPLY_RXON_TIMING
;
3537 priv
->contexts
[IWL_RXON_CTX_BSS
].rxon_assoc_cmd
= REPLY_RXON_ASSOC
;
3538 priv
->contexts
[IWL_RXON_CTX_BSS
].qos_cmd
= REPLY_QOS_PARAM
;
3539 priv
->contexts
[IWL_RXON_CTX_BSS
].ap_sta_id
= IWL_AP_ID
;
3540 priv
->contexts
[IWL_RXON_CTX_BSS
].wep_key_cmd
= REPLY_WEPKEY
;
3541 priv
->contexts
[IWL_RXON_CTX_BSS
].ac_to_fifo
= iwlagn_bss_ac_to_fifo
;
3542 priv
->contexts
[IWL_RXON_CTX_BSS
].ac_to_queue
= iwlagn_bss_ac_to_queue
;
3543 priv
->contexts
[IWL_RXON_CTX_BSS
].exclusive_interface_modes
=
3544 BIT(NL80211_IFTYPE_ADHOC
);
3545 priv
->contexts
[IWL_RXON_CTX_BSS
].interface_modes
=
3546 BIT(NL80211_IFTYPE_STATION
);
3547 priv
->contexts
[IWL_RXON_CTX_BSS
].ap_devtype
= RXON_DEV_TYPE_AP
;
3548 priv
->contexts
[IWL_RXON_CTX_BSS
].ibss_devtype
= RXON_DEV_TYPE_IBSS
;
3549 priv
->contexts
[IWL_RXON_CTX_BSS
].station_devtype
= RXON_DEV_TYPE_ESS
;
3550 priv
->contexts
[IWL_RXON_CTX_BSS
].unused_devtype
= RXON_DEV_TYPE_ESS
;
3552 priv
->contexts
[IWL_RXON_CTX_PAN
].rxon_cmd
= REPLY_WIPAN_RXON
;
3553 priv
->contexts
[IWL_RXON_CTX_PAN
].rxon_timing_cmd
= REPLY_WIPAN_RXON_TIMING
;
3554 priv
->contexts
[IWL_RXON_CTX_PAN
].rxon_assoc_cmd
= REPLY_WIPAN_RXON_ASSOC
;
3555 priv
->contexts
[IWL_RXON_CTX_PAN
].qos_cmd
= REPLY_WIPAN_QOS_PARAM
;
3556 priv
->contexts
[IWL_RXON_CTX_PAN
].ap_sta_id
= IWL_AP_ID_PAN
;
3557 priv
->contexts
[IWL_RXON_CTX_PAN
].wep_key_cmd
= REPLY_WIPAN_WEPKEY
;
3558 priv
->contexts
[IWL_RXON_CTX_PAN
].bcast_sta_id
= IWLAGN_PAN_BCAST_ID
;
3559 priv
->contexts
[IWL_RXON_CTX_PAN
].station_flags
= STA_FLG_PAN_STATION
;
3560 priv
->contexts
[IWL_RXON_CTX_PAN
].ac_to_fifo
= iwlagn_pan_ac_to_fifo
;
3561 priv
->contexts
[IWL_RXON_CTX_PAN
].ac_to_queue
= iwlagn_pan_ac_to_queue
;
3562 priv
->contexts
[IWL_RXON_CTX_PAN
].mcast_queue
= IWL_IPAN_MCAST_QUEUE
;
3563 priv
->contexts
[IWL_RXON_CTX_PAN
].interface_modes
=
3564 BIT(NL80211_IFTYPE_STATION
) | BIT(NL80211_IFTYPE_AP
);
3565 #ifdef CONFIG_IWL_P2P
3566 priv
->contexts
[IWL_RXON_CTX_PAN
].interface_modes
|=
3567 BIT(NL80211_IFTYPE_P2P_CLIENT
) | BIT(NL80211_IFTYPE_P2P_GO
);
3569 priv
->contexts
[IWL_RXON_CTX_PAN
].ap_devtype
= RXON_DEV_TYPE_CP
;
3570 priv
->contexts
[IWL_RXON_CTX_PAN
].station_devtype
= RXON_DEV_TYPE_2STA
;
3571 priv
->contexts
[IWL_RXON_CTX_PAN
].unused_devtype
= RXON_DEV_TYPE_P2P
;
3573 BUILD_BUG_ON(NUM_IWL_RXON_CTX
!= 2);
3575 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
3577 IWL_DEBUG_INFO(priv
, "*** LOAD DRIVER ***\n");
3579 priv
->pci_dev
= pdev
;
3580 priv
->inta_mask
= CSR_INI_SET_MASK
;
3582 /* is antenna coupling more than 35dB ? */
3583 priv
->bt_ant_couple_ok
=
3584 (iwlagn_ant_coupling
> IWL_BT_ANTENNA_COUPLING_THRESHOLD
) ?
3587 /* enable/disable bt channel inhibition */
3588 priv
->bt_ch_announce
= iwlagn_bt_ch_announce
;
3589 IWL_DEBUG_INFO(priv
, "BT channel inhibition is %s\n",
3590 (priv
->bt_ch_announce
) ? "On" : "Off");
3592 if (iwl_alloc_traffic_mem(priv
))
3593 IWL_ERR(priv
, "Not enough memory to generate traffic log\n");
3595 /**************************
3596 * 2. Initializing PCI bus
3597 **************************/
3598 pci_disable_link_state(pdev
, PCIE_LINK_STATE_L0S
| PCIE_LINK_STATE_L1
|
3599 PCIE_LINK_STATE_CLKPM
);
3601 if (pci_enable_device(pdev
)) {
3603 goto out_ieee80211_free_hw
;
3606 pci_set_master(pdev
);
3608 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(36));
3610 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(36));
3612 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
3614 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
3615 /* both attempts failed: */
3617 IWL_WARN(priv
, "No suitable DMA available.\n");
3618 goto out_pci_disable_device
;
3622 err
= pci_request_regions(pdev
, DRV_NAME
);
3624 goto out_pci_disable_device
;
3626 pci_set_drvdata(pdev
, priv
);
3629 /***********************
3630 * 3. Read REV register
3631 ***********************/
3632 priv
->hw_base
= pci_iomap(pdev
, 0, 0);
3633 if (!priv
->hw_base
) {
3635 goto out_pci_release_regions
;
3638 IWL_DEBUG_INFO(priv
, "pci_resource_len = 0x%08llx\n",
3639 (unsigned long long) pci_resource_len(pdev
, 0));
3640 IWL_DEBUG_INFO(priv
, "pci_resource_base = %p\n", priv
->hw_base
);
3642 /* these spin locks will be used in apm_ops.init and EEPROM access
3643 * we should init now
3645 spin_lock_init(&priv
->reg_lock
);
3646 spin_lock_init(&priv
->lock
);
3649 * stop and reset the on-board processor just in case it is in a
3650 * strange state ... like being left stranded by a primary kernel
3651 * and this is now the kdump kernel trying to start up
3653 iwl_write32(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_NEVO_RESET
);
3655 hw_rev
= iwl_hw_detect(priv
);
3656 IWL_INFO(priv
, "Detected %s, REV=0x%X\n",
3657 priv
->cfg
->name
, hw_rev
);
3659 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3660 * PCI Tx retries from interfering with C3 CPU state */
3661 pci_write_config_byte(pdev
, PCI_CFG_RETRY_TIMEOUT
, 0x00);
3663 if (iwl_prepare_card_hw(priv
)) {
3664 IWL_WARN(priv
, "Failed, HW not ready\n");
3671 /* Read the EEPROM */
3672 err
= iwl_eeprom_init(priv
, hw_rev
);
3674 IWL_ERR(priv
, "Unable to init EEPROM\n");
3677 err
= iwl_eeprom_check_version(priv
);
3679 goto out_free_eeprom
;
3681 err
= iwl_eeprom_check_sku(priv
);
3683 goto out_free_eeprom
;
3685 /* extract MAC Address */
3686 iwl_eeprom_get_mac(priv
, priv
->addresses
[0].addr
);
3687 IWL_DEBUG_INFO(priv
, "MAC address: %pM\n", priv
->addresses
[0].addr
);
3688 priv
->hw
->wiphy
->addresses
= priv
->addresses
;
3689 priv
->hw
->wiphy
->n_addresses
= 1;
3690 num_mac
= iwl_eeprom_query16(priv
, EEPROM_NUM_MAC_ADDRESS
);
3692 memcpy(priv
->addresses
[1].addr
, priv
->addresses
[0].addr
,
3694 priv
->addresses
[1].addr
[5]++;
3695 priv
->hw
->wiphy
->n_addresses
++;
3698 /************************
3699 * 5. Setup HW constants
3700 ************************/
3701 if (iwl_set_hw_params(priv
)) {
3702 IWL_ERR(priv
, "failed to set hw parameters\n");
3703 goto out_free_eeprom
;
3706 /*******************
3708 *******************/
3710 err
= iwl_init_drv(priv
);
3712 goto out_free_eeprom
;
3713 /* At this point both hw and priv are initialized. */
3715 /********************
3717 ********************/
3718 spin_lock_irqsave(&priv
->lock
, flags
);
3719 iwl_disable_interrupts(priv
);
3720 spin_unlock_irqrestore(&priv
->lock
, flags
);
3722 pci_enable_msi(priv
->pci_dev
);
3724 iwl_alloc_isr_ict(priv
);
3726 err
= request_irq(priv
->pci_dev
->irq
, iwl_isr_ict
,
3727 IRQF_SHARED
, DRV_NAME
, priv
);
3729 IWL_ERR(priv
, "Error allocating IRQ %d\n", priv
->pci_dev
->irq
);
3730 goto out_disable_msi
;
3733 iwl_setup_deferred_work(priv
);
3734 iwl_setup_rx_handlers(priv
);
3735 iwl_testmode_init(priv
);
3737 /*********************************************
3738 * 8. Enable interrupts and read RFKILL state
3739 *********************************************/
3741 /* enable rfkill interrupt: hw bug w/a */
3742 pci_read_config_word(priv
->pci_dev
, PCI_COMMAND
, &pci_cmd
);
3743 if (pci_cmd
& PCI_COMMAND_INTX_DISABLE
) {
3744 pci_cmd
&= ~PCI_COMMAND_INTX_DISABLE
;
3745 pci_write_config_word(priv
->pci_dev
, PCI_COMMAND
, pci_cmd
);
3748 iwl_enable_rfkill_int(priv
);
3750 /* If platform's RF_KILL switch is NOT set to KILL */
3751 if (iwl_read32(priv
, CSR_GP_CNTRL
) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW
)
3752 clear_bit(STATUS_RF_KILL_HW
, &priv
->status
);
3754 set_bit(STATUS_RF_KILL_HW
, &priv
->status
);
3756 wiphy_rfkill_set_hw_state(priv
->hw
->wiphy
,
3757 test_bit(STATUS_RF_KILL_HW
, &priv
->status
));
3759 iwl_power_initialize(priv
);
3760 iwl_tt_initialize(priv
);
3762 init_completion(&priv
->_agn
.firmware_loading_complete
);
3764 err
= iwl_request_firmware(priv
, true);
3766 goto out_destroy_workqueue
;
3770 out_destroy_workqueue
:
3771 destroy_workqueue(priv
->workqueue
);
3772 priv
->workqueue
= NULL
;
3773 free_irq(priv
->pci_dev
->irq
, priv
);
3774 iwl_free_isr_ict(priv
);
3776 pci_disable_msi(priv
->pci_dev
);
3777 iwl_uninit_drv(priv
);
3779 iwl_eeprom_free(priv
);
3781 pci_iounmap(pdev
, priv
->hw_base
);
3782 out_pci_release_regions
:
3783 pci_set_drvdata(pdev
, NULL
);
3784 pci_release_regions(pdev
);
3785 out_pci_disable_device
:
3786 pci_disable_device(pdev
);
3787 out_ieee80211_free_hw
:
3788 iwl_free_traffic_mem(priv
);
3789 ieee80211_free_hw(priv
->hw
);
3794 static void __devexit
iwl_pci_remove(struct pci_dev
*pdev
)
3796 struct iwl_priv
*priv
= pci_get_drvdata(pdev
);
3797 unsigned long flags
;
3802 wait_for_completion(&priv
->_agn
.firmware_loading_complete
);
3804 IWL_DEBUG_INFO(priv
, "*** UNLOAD DRIVER ***\n");
3806 iwl_dbgfs_unregister(priv
);
3807 sysfs_remove_group(&pdev
->dev
.kobj
, &iwl_attribute_group
);
3809 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3810 * to be called and iwl_down since we are removing the device
3811 * we need to set STATUS_EXIT_PENDING bit.
3813 set_bit(STATUS_EXIT_PENDING
, &priv
->status
);
3815 iwl_leds_exit(priv
);
3817 if (priv
->mac80211_registered
) {
3818 ieee80211_unregister_hw(priv
->hw
);
3819 priv
->mac80211_registered
= 0;
3822 /* Reset to low power before unloading driver. */
3827 /* make sure we flush any pending irq or
3828 * tasklet for the driver
3830 spin_lock_irqsave(&priv
->lock
, flags
);
3831 iwl_disable_interrupts(priv
);
3832 spin_unlock_irqrestore(&priv
->lock
, flags
);
3834 iwl_synchronize_irq(priv
);
3836 iwl_dealloc_ucode_pci(priv
);
3839 iwlagn_rx_queue_free(priv
, &priv
->rxq
);
3840 iwlagn_hw_txq_ctx_free(priv
);
3842 iwl_eeprom_free(priv
);
3845 /*netif_stop_queue(dev); */
3846 flush_workqueue(priv
->workqueue
);
3848 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3849 * priv->workqueue... so we can't take down the workqueue
3851 destroy_workqueue(priv
->workqueue
);
3852 priv
->workqueue
= NULL
;
3853 iwl_free_traffic_mem(priv
);
3855 free_irq(priv
->pci_dev
->irq
, priv
);
3856 pci_disable_msi(priv
->pci_dev
);
3857 pci_iounmap(pdev
, priv
->hw_base
);
3858 pci_release_regions(pdev
);
3859 pci_disable_device(pdev
);
3860 pci_set_drvdata(pdev
, NULL
);
3862 iwl_uninit_drv(priv
);
3864 iwl_free_isr_ict(priv
);
3866 dev_kfree_skb(priv
->beacon_skb
);
3868 ieee80211_free_hw(priv
->hw
);
3872 /*****************************************************************************
3874 * driver and module entry point
3876 *****************************************************************************/
3878 /* Hardware specific file defines the PCI IDs table for that hardware module */
3879 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids
) = {
3880 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg
)}, /* Mini Card */
3881 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg
)}, /* Half Mini Card */
3882 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg
)}, /* Mini Card */
3883 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg
)}, /* Half Mini Card */
3884 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg
)}, /* Mini Card */
3885 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg
)}, /* Half Mini Card */
3886 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg
)}, /* Mini Card */
3887 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg
)}, /* Half Mini Card */
3888 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg
)}, /* Mini Card */
3889 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg
)}, /* Half Mini Card */
3890 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg
)}, /* Mini Card */
3891 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg
)}, /* Half Mini Card */
3892 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg
)}, /* Mini Card */
3893 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg
)}, /* Half Mini Card */
3894 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg
)}, /* Mini Card */
3895 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg
)}, /* Half Mini Card */
3896 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg
)}, /* Mini Card */
3897 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg
)}, /* Half Mini Card */
3898 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg
)}, /* Mini Card */
3899 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg
)}, /* Half Mini Card */
3900 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg
)}, /* Mini Card */
3901 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg
)}, /* Half Mini Card */
3902 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg
)}, /* Mini Card */
3903 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg
)}, /* Half Mini Card */
3905 /* 5300 Series WiFi */
3906 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg
)}, /* Mini Card */
3907 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg
)}, /* Half Mini Card */
3908 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg
)}, /* Mini Card */
3909 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg
)}, /* Half Mini Card */
3910 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg
)}, /* Mini Card */
3911 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg
)}, /* Half Mini Card */
3912 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg
)}, /* Mini Card */
3913 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg
)}, /* Half Mini Card */
3914 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg
)}, /* Mini Card */
3915 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg
)}, /* Half Mini Card */
3916 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg
)}, /* Mini Card */
3917 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg
)}, /* Half Mini Card */
3919 /* 5350 Series WiFi/WiMax */
3920 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg
)}, /* Mini Card */
3921 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg
)}, /* Mini Card */
3922 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg
)}, /* Mini Card */
3924 /* 5150 Series Wifi/WiMax */
3925 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg
)}, /* Mini Card */
3926 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg
)}, /* Half Mini Card */
3927 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg
)}, /* Mini Card */
3928 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg
)}, /* Half Mini Card */
3929 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg
)}, /* Mini Card */
3930 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg
)}, /* Half Mini Card */
3932 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg
)}, /* Mini Card */
3933 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg
)}, /* Half Mini Card */
3934 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg
)}, /* Mini Card */
3935 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg
)}, /* Half Mini Card */
3938 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg
)},
3939 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg
)},
3940 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg
)},
3941 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg
)},
3942 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg
)},
3943 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg
)},
3944 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg
)},
3945 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg
)},
3946 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg
)},
3947 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg
)},
3950 {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg
)},
3951 {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg
)},
3952 {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg
)},
3953 {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg
)},
3954 {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg
)},
3955 {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg
)},
3956 {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg
)},
3959 {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg
)},
3960 {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg
)},
3961 {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg
)},
3962 {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg
)},
3963 {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg
)},
3964 {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg
)},
3965 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg
)},
3966 {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg
)},
3967 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg
)},
3968 {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg
)},
3969 {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg
)},
3970 {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg
)},
3971 {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg
)},
3972 {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg
)},
3973 {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg
)},
3974 {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg
)},
3976 /* 6x50 WiFi/WiMax Series */
3977 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg
)},
3978 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg
)},
3979 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg
)},
3980 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg
)},
3981 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg
)},
3982 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg
)},
3984 /* 6150 WiFi/WiMax Series */
3985 {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg
)},
3986 {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6150_bgn_cfg
)},
3987 {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg
)},
3988 {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6150_bgn_cfg
)},
3989 {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg
)},
3990 {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6150_bgn_cfg
)},
3992 /* 1000 Series WiFi */
3993 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg
)},
3994 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg
)},
3995 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg
)},
3996 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg
)},
3997 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg
)},
3998 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg
)},
3999 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg
)},
4000 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg
)},
4001 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg
)},
4002 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg
)},
4003 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg
)},
4004 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg
)},
4006 /* 100 Series WiFi */
4007 {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg
)},
4008 {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg
)},
4009 {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg
)},
4010 {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg
)},
4011 {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg
)},
4012 {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg
)},
4014 /* 130 Series WiFi */
4015 {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg
)},
4016 {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg
)},
4017 {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg
)},
4018 {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg
)},
4019 {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg
)},
4020 {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg
)},
4023 {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg
)},
4024 {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg
)},
4025 {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg
)},
4026 {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg
)},
4027 {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg
)},
4028 {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg
)},
4031 {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg
)},
4032 {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg
)},
4033 {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg
)},
4034 {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg
)},
4035 {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg
)},
4036 {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg
)},
4039 {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg
)},
4040 {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg
)},
4041 {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg
)},
4042 {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg
)},
4043 {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg
)},
4044 {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg
)},
4045 {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg
)},
4046 {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg
)},
4047 {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg
)},
4050 {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg
)},
4051 {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg
)},
4052 {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg
)},
4053 {IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg
)},
4054 {IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg
)},
4055 {IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg
)},
4058 {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg
)},
4059 {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg
)},
4060 {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg
)},
4061 {IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg
)},
4062 {IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg
)},
4063 {IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg
)},
4067 MODULE_DEVICE_TABLE(pci
, iwl_hw_card_ids
);
4069 static struct pci_driver iwl_driver
= {
4071 .id_table
= iwl_hw_card_ids
,
4072 .probe
= iwl_pci_probe
,
4073 .remove
= __devexit_p(iwl_pci_remove
),
4074 .driver
.pm
= IWL_PM_OPS
,
4077 static int __init
iwl_init(void)
4081 pr_info(DRV_DESCRIPTION
", " DRV_VERSION
"\n");
4082 pr_info(DRV_COPYRIGHT
"\n");
4084 ret
= iwlagn_rate_control_register();
4086 pr_err("Unable to register rate control algorithm: %d\n", ret
);
4090 ret
= pci_register_driver(&iwl_driver
);
4092 pr_err("Unable to initialize PCI module\n");
4093 goto error_register
;
4099 iwlagn_rate_control_unregister();
4103 static void __exit
iwl_exit(void)
4105 pci_unregister_driver(&iwl_driver
);
4106 iwlagn_rate_control_unregister();
4109 module_exit(iwl_exit
);
4110 module_init(iwl_init
);
4112 #ifdef CONFIG_IWLWIFI_DEBUG
4113 module_param_named(debug
, iwl_debug_level
, uint
, S_IRUGO
| S_IWUSR
);
4114 MODULE_PARM_DESC(debug
, "debug output mask");
4117 module_param_named(swcrypto
, iwlagn_mod_params
.sw_crypto
, int, S_IRUGO
);
4118 MODULE_PARM_DESC(swcrypto
, "using crypto in software (default 0 [hardware])");
4119 module_param_named(queues_num
, iwlagn_mod_params
.num_of_queues
, int, S_IRUGO
);
4120 MODULE_PARM_DESC(queues_num
, "number of hw queues.");
4121 module_param_named(11n_disable
, iwlagn_mod_params
.disable_11n
, int, S_IRUGO
);
4122 MODULE_PARM_DESC(11n_disable
, "disable 11n functionality");
4123 module_param_named(amsdu_size_8K
, iwlagn_mod_params
.amsdu_size_8K
,
4125 MODULE_PARM_DESC(amsdu_size_8K
, "enable 8K amsdu size");
4126 module_param_named(fw_restart
, iwlagn_mod_params
.restart_fw
, int, S_IRUGO
);
4127 MODULE_PARM_DESC(fw_restart
, "restart firmware in case of error");
4129 module_param_named(ucode_alternative
, iwlagn_wanted_ucode_alternative
, int,
4131 MODULE_PARM_DESC(ucode_alternative
,
4132 "specify ucode alternative to use from ucode file");
4134 module_param_named(antenna_coupling
, iwlagn_ant_coupling
, int, S_IRUGO
);
4135 MODULE_PARM_DESC(antenna_coupling
,
4136 "specify antenna coupling in dB (defualt: 0 dB)");
4138 module_param_named(bt_ch_inhibition
, iwlagn_bt_ch_announce
, bool, S_IRUGO
);
4139 MODULE_PARM_DESC(bt_ch_inhibition
,
4140 "Disable BT channel inhibition (default: enable)");
4142 module_param_named(plcp_check
, iwlagn_mod_params
.plcp_check
, bool, S_IRUGO
);
4143 MODULE_PARM_DESC(plcp_check
, "Check plcp health (default: 1 [enabled])");
4145 module_param_named(ack_check
, iwlagn_mod_params
.ack_check
, bool, S_IRUGO
);
4146 MODULE_PARM_DESC(ack_check
, "Check ack health (default: 0 [disabled])");