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iwlagn: Clarify FH_TX interrupt
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /*
65 * module name, copyright, version, etc.
66 */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
93 */
94
95 /**************************************************************/
96
97 /**
98 * iwl_commit_rxon - commit staging_rxon to hardware
99 *
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113 if (!iwl_is_alive(priv))
114 return -EBUSY;
115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118
119 ret = iwl_check_rxon_cmd(priv);
120 if (ret) {
121 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
122 return -EINVAL;
123 }
124
125 /* If we don't need to send a full RXON, we can use
126 * iwl_rxon_assoc_cmd which is used to reconfigure filter
127 * and other flags for the current radio configuration. */
128 if (!iwl_full_rxon_required(priv)) {
129 ret = iwl_send_rxon_assoc(priv);
130 if (ret) {
131 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
132 return ret;
133 }
134
135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
136 return 0;
137 }
138
139 /* station table will be cleared */
140 priv->assoc_station_added = 0;
141
142 /* If we are currently associated and the new config requires
143 * an RXON_ASSOC and the new config wants the associated mask enabled,
144 * we must clear the associated from the active configuration
145 * before we apply the new config */
146 if (iwl_is_associated(priv) && new_assoc) {
147 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
148 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
149
150 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
151 sizeof(struct iwl_rxon_cmd),
152 &priv->active_rxon);
153
154 /* If the mask clearing failed then we set
155 * active_rxon back to what it was previously */
156 if (ret) {
157 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
158 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
159 return ret;
160 }
161 }
162
163 IWL_DEBUG_INFO(priv, "Sending RXON\n"
164 "* with%s RXON_FILTER_ASSOC_MSK\n"
165 "* channel = %d\n"
166 "* bssid = %pM\n",
167 (new_assoc ? "" : "out"),
168 le16_to_cpu(priv->staging_rxon.channel),
169 priv->staging_rxon.bssid_addr);
170
171 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
172
173 /* Apply the new configuration
174 * RXON unassoc clears the station table in uCode, send it before
175 * we add the bcast station. If assoc bit is set, we will send RXON
176 * after having added the bcast and bssid station.
177 */
178 if (!new_assoc) {
179 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
180 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
181 if (ret) {
182 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
183 return ret;
184 }
185 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
186 }
187
188 iwl_clear_stations_table(priv);
189
190 priv->start_calib = 0;
191
192 /* Add the broadcast address so we can send broadcast frames */
193 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
194 IWL_INVALID_STATION) {
195 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
196 return -EIO;
197 }
198
199 /* If we have set the ASSOC_MSK and we are in BSS mode then
200 * add the IWL_AP_ID to the station rate table */
201 if (new_assoc) {
202 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
203 ret = iwl_rxon_add_station(priv,
204 priv->active_rxon.bssid_addr, 1);
205 if (ret == IWL_INVALID_STATION) {
206 IWL_ERR(priv,
207 "Error adding AP address for TX.\n");
208 return -EIO;
209 }
210 priv->assoc_station_added = 1;
211 if (priv->default_wep_key &&
212 iwl_send_static_wepkey_cmd(priv, 0))
213 IWL_ERR(priv,
214 "Could not send WEP static key.\n");
215 }
216
217 /*
218 * allow CTS-to-self if possible for new association.
219 * this is relevant only for 5000 series and up,
220 * but will not damage 4965
221 */
222 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
223
224 /* Apply the new configuration
225 * RXON assoc doesn't clear the station table in uCode,
226 */
227 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
228 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
229 if (ret) {
230 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
231 return ret;
232 }
233 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
234 }
235
236 iwl_init_sensitivity(priv);
237
238 /* If we issue a new RXON command which required a tune then we must
239 * send a new TXPOWER command or we won't be able to Tx any frames */
240 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
241 if (ret) {
242 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
243 return ret;
244 }
245
246 return 0;
247 }
248
249 void iwl_update_chain_flags(struct iwl_priv *priv)
250 {
251
252 if (priv->cfg->ops->hcmd->set_rxon_chain)
253 priv->cfg->ops->hcmd->set_rxon_chain(priv);
254 iwlcore_commit_rxon(priv);
255 }
256
257 static void iwl_clear_free_frames(struct iwl_priv *priv)
258 {
259 struct list_head *element;
260
261 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
262 priv->frames_count);
263
264 while (!list_empty(&priv->free_frames)) {
265 element = priv->free_frames.next;
266 list_del(element);
267 kfree(list_entry(element, struct iwl_frame, list));
268 priv->frames_count--;
269 }
270
271 if (priv->frames_count) {
272 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
273 priv->frames_count);
274 priv->frames_count = 0;
275 }
276 }
277
278 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
279 {
280 struct iwl_frame *frame;
281 struct list_head *element;
282 if (list_empty(&priv->free_frames)) {
283 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
284 if (!frame) {
285 IWL_ERR(priv, "Could not allocate frame!\n");
286 return NULL;
287 }
288
289 priv->frames_count++;
290 return frame;
291 }
292
293 element = priv->free_frames.next;
294 list_del(element);
295 return list_entry(element, struct iwl_frame, list);
296 }
297
298 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
299 {
300 memset(frame, 0, sizeof(*frame));
301 list_add(&frame->list, &priv->free_frames);
302 }
303
304 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
305 struct ieee80211_hdr *hdr,
306 int left)
307 {
308 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
309 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
310 (priv->iw_mode != NL80211_IFTYPE_AP)))
311 return 0;
312
313 if (priv->ibss_beacon->len > left)
314 return 0;
315
316 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
317
318 return priv->ibss_beacon->len;
319 }
320
321 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
322 struct iwl_frame *frame, u8 rate)
323 {
324 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
325 unsigned int frame_size;
326
327 tx_beacon_cmd = &frame->u.beacon;
328 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
329
330 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
331 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
332
333 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
334 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
335
336 BUG_ON(frame_size > MAX_MPDU_SIZE);
337 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
338
339 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
340 tx_beacon_cmd->tx.rate_n_flags =
341 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
342 else
343 tx_beacon_cmd->tx.rate_n_flags =
344 iwl_hw_set_rate_n_flags(rate, 0);
345
346 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
347 TX_CMD_FLG_TSF_MSK |
348 TX_CMD_FLG_STA_RATE_MSK;
349
350 return sizeof(*tx_beacon_cmd) + frame_size;
351 }
352 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
353 {
354 struct iwl_frame *frame;
355 unsigned int frame_size;
356 int rc;
357 u8 rate;
358
359 frame = iwl_get_free_frame(priv);
360
361 if (!frame) {
362 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
363 "command.\n");
364 return -ENOMEM;
365 }
366
367 rate = iwl_rate_get_lowest_plcp(priv);
368
369 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
370
371 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
372 &frame->u.cmd[0]);
373
374 iwl_free_frame(priv, frame);
375
376 return rc;
377 }
378
379 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
380 {
381 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
382
383 dma_addr_t addr = get_unaligned_le32(&tb->lo);
384 if (sizeof(dma_addr_t) > sizeof(u32))
385 addr |=
386 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
387
388 return addr;
389 }
390
391 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
392 {
393 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
394
395 return le16_to_cpu(tb->hi_n_len) >> 4;
396 }
397
398 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
399 dma_addr_t addr, u16 len)
400 {
401 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
402 u16 hi_n_len = len << 4;
403
404 put_unaligned_le32(addr, &tb->lo);
405 if (sizeof(dma_addr_t) > sizeof(u32))
406 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
407
408 tb->hi_n_len = cpu_to_le16(hi_n_len);
409
410 tfd->num_tbs = idx + 1;
411 }
412
413 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
414 {
415 return tfd->num_tbs & 0x1f;
416 }
417
418 /**
419 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
420 * @priv - driver private data
421 * @txq - tx queue
422 *
423 * Does NOT advance any TFD circular buffer read/write indexes
424 * Does NOT free the TFD itself (which is within circular buffer)
425 */
426 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
427 {
428 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
429 struct iwl_tfd *tfd;
430 struct pci_dev *dev = priv->pci_dev;
431 int index = txq->q.read_ptr;
432 int i;
433 int num_tbs;
434
435 tfd = &tfd_tmp[index];
436
437 /* Sanity check on number of chunks */
438 num_tbs = iwl_tfd_get_num_tbs(tfd);
439
440 if (num_tbs >= IWL_NUM_OF_TBS) {
441 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
442 /* @todo issue fatal error, it is quite serious situation */
443 return;
444 }
445
446 /* Unmap tx_cmd */
447 if (num_tbs)
448 pci_unmap_single(dev,
449 pci_unmap_addr(&txq->meta[index], mapping),
450 pci_unmap_len(&txq->meta[index], len),
451 PCI_DMA_BIDIRECTIONAL);
452
453 /* Unmap chunks, if any. */
454 for (i = 1; i < num_tbs; i++) {
455 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
456 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
457
458 if (txq->txb) {
459 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
460 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
461 }
462 }
463 }
464
465 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
466 struct iwl_tx_queue *txq,
467 dma_addr_t addr, u16 len,
468 u8 reset, u8 pad)
469 {
470 struct iwl_queue *q;
471 struct iwl_tfd *tfd, *tfd_tmp;
472 u32 num_tbs;
473
474 q = &txq->q;
475 tfd_tmp = (struct iwl_tfd *)txq->tfds;
476 tfd = &tfd_tmp[q->write_ptr];
477
478 if (reset)
479 memset(tfd, 0, sizeof(*tfd));
480
481 num_tbs = iwl_tfd_get_num_tbs(tfd);
482
483 /* Each TFD can point to a maximum 20 Tx buffers */
484 if (num_tbs >= IWL_NUM_OF_TBS) {
485 IWL_ERR(priv, "Error can not send more than %d chunks\n",
486 IWL_NUM_OF_TBS);
487 return -EINVAL;
488 }
489
490 BUG_ON(addr & ~DMA_BIT_MASK(36));
491 if (unlikely(addr & ~IWL_TX_DMA_MASK))
492 IWL_ERR(priv, "Unaligned address = %llx\n",
493 (unsigned long long)addr);
494
495 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
496
497 return 0;
498 }
499
500 /*
501 * Tell nic where to find circular buffer of Tx Frame Descriptors for
502 * given Tx queue, and enable the DMA channel used for that queue.
503 *
504 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
505 * channels supported in hardware.
506 */
507 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
508 struct iwl_tx_queue *txq)
509 {
510 int txq_id = txq->q.id;
511
512 /* Circular buffer (TFD queue in DRAM) physical base address */
513 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
514 txq->q.dma_addr >> 8);
515
516 return 0;
517 }
518
519 /******************************************************************************
520 *
521 * Generic RX handler implementations
522 *
523 ******************************************************************************/
524 static void iwl_rx_reply_alive(struct iwl_priv *priv,
525 struct iwl_rx_mem_buffer *rxb)
526 {
527 struct iwl_rx_packet *pkt = rxb_addr(rxb);
528 struct iwl_alive_resp *palive;
529 struct delayed_work *pwork;
530
531 palive = &pkt->u.alive_frame;
532
533 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
534 "0x%01X 0x%01X\n",
535 palive->is_valid, palive->ver_type,
536 palive->ver_subtype);
537
538 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
539 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
540 memcpy(&priv->card_alive_init,
541 &pkt->u.alive_frame,
542 sizeof(struct iwl_init_alive_resp));
543 pwork = &priv->init_alive_start;
544 } else {
545 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
546 memcpy(&priv->card_alive, &pkt->u.alive_frame,
547 sizeof(struct iwl_alive_resp));
548 pwork = &priv->alive_start;
549 }
550
551 /* We delay the ALIVE response by 5ms to
552 * give the HW RF Kill time to activate... */
553 if (palive->is_valid == UCODE_VALID_OK)
554 queue_delayed_work(priv->workqueue, pwork,
555 msecs_to_jiffies(5));
556 else
557 IWL_WARN(priv, "uCode did not respond OK.\n");
558 }
559
560 static void iwl_bg_beacon_update(struct work_struct *work)
561 {
562 struct iwl_priv *priv =
563 container_of(work, struct iwl_priv, beacon_update);
564 struct sk_buff *beacon;
565
566 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
567 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
568
569 if (!beacon) {
570 IWL_ERR(priv, "update beacon failed\n");
571 return;
572 }
573
574 mutex_lock(&priv->mutex);
575 /* new beacon skb is allocated every time; dispose previous.*/
576 if (priv->ibss_beacon)
577 dev_kfree_skb(priv->ibss_beacon);
578
579 priv->ibss_beacon = beacon;
580 mutex_unlock(&priv->mutex);
581
582 iwl_send_beacon_cmd(priv);
583 }
584
585 /**
586 * iwl_bg_statistics_periodic - Timer callback to queue statistics
587 *
588 * This callback is provided in order to send a statistics request.
589 *
590 * This timer function is continually reset to execute within
591 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
592 * was received. We need to ensure we receive the statistics in order
593 * to update the temperature used for calibrating the TXPOWER.
594 */
595 static void iwl_bg_statistics_periodic(unsigned long data)
596 {
597 struct iwl_priv *priv = (struct iwl_priv *)data;
598
599 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
600 return;
601
602 /* dont send host command if rf-kill is on */
603 if (!iwl_is_ready_rf(priv))
604 return;
605
606 iwl_send_statistics_request(priv, CMD_ASYNC);
607 }
608
609 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
610 struct iwl_rx_mem_buffer *rxb)
611 {
612 #ifdef CONFIG_IWLWIFI_DEBUG
613 struct iwl_rx_packet *pkt = rxb_addr(rxb);
614 struct iwl4965_beacon_notif *beacon =
615 (struct iwl4965_beacon_notif *)pkt->u.raw;
616 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
617
618 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
619 "tsf %d %d rate %d\n",
620 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
621 beacon->beacon_notify_hdr.failure_frame,
622 le32_to_cpu(beacon->ibss_mgr_status),
623 le32_to_cpu(beacon->high_tsf),
624 le32_to_cpu(beacon->low_tsf), rate);
625 #endif
626
627 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
628 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
629 queue_work(priv->workqueue, &priv->beacon_update);
630 }
631
632 /* Handle notification from uCode that card's power state is changing
633 * due to software, hardware, or critical temperature RFKILL */
634 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
635 struct iwl_rx_mem_buffer *rxb)
636 {
637 struct iwl_rx_packet *pkt = rxb_addr(rxb);
638 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
639 unsigned long status = priv->status;
640
641 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
642 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
643 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
644
645 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
646 RF_CARD_DISABLED)) {
647
648 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
649 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
650
651 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
652 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
653
654 if (!(flags & RXON_CARD_DISABLED)) {
655 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
656 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
657 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
658 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
659 }
660 if (flags & RF_CARD_DISABLED)
661 iwl_tt_enter_ct_kill(priv);
662 }
663 if (!(flags & RF_CARD_DISABLED))
664 iwl_tt_exit_ct_kill(priv);
665
666 if (flags & HW_CARD_DISABLED)
667 set_bit(STATUS_RF_KILL_HW, &priv->status);
668 else
669 clear_bit(STATUS_RF_KILL_HW, &priv->status);
670
671
672 if (!(flags & RXON_CARD_DISABLED))
673 iwl_scan_cancel(priv);
674
675 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
676 test_bit(STATUS_RF_KILL_HW, &priv->status)))
677 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
678 test_bit(STATUS_RF_KILL_HW, &priv->status));
679 else
680 wake_up_interruptible(&priv->wait_command_queue);
681 }
682
683 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
684 {
685 if (src == IWL_PWR_SRC_VAUX) {
686 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
687 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
688 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
689 ~APMG_PS_CTRL_MSK_PWR_SRC);
690 } else {
691 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
692 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
693 ~APMG_PS_CTRL_MSK_PWR_SRC);
694 }
695
696 return 0;
697 }
698
699 /**
700 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
701 *
702 * Setup the RX handlers for each of the reply types sent from the uCode
703 * to the host.
704 *
705 * This function chains into the hardware specific files for them to setup
706 * any hardware specific handlers as well.
707 */
708 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
709 {
710 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
711 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
712 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
713 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
714 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
715 iwl_rx_pm_debug_statistics_notif;
716 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
717
718 /*
719 * The same handler is used for both the REPLY to a discrete
720 * statistics request from the host as well as for the periodic
721 * statistics notifications (after received beacons) from the uCode.
722 */
723 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
724 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
725
726 iwl_setup_spectrum_handlers(priv);
727 iwl_setup_rx_scan_handlers(priv);
728
729 /* status change handler */
730 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
731
732 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
733 iwl_rx_missed_beacon_notif;
734 /* Rx handlers */
735 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
736 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
737 /* block ack */
738 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
739 /* Set up hardware specific Rx handlers */
740 priv->cfg->ops->lib->rx_handler_setup(priv);
741 }
742
743 /**
744 * iwl_rx_handle - Main entry function for receiving responses from uCode
745 *
746 * Uses the priv->rx_handlers callback function array to invoke
747 * the appropriate handlers, including command responses,
748 * frame-received notifications, and other notifications.
749 */
750 void iwl_rx_handle(struct iwl_priv *priv)
751 {
752 struct iwl_rx_mem_buffer *rxb;
753 struct iwl_rx_packet *pkt;
754 struct iwl_rx_queue *rxq = &priv->rxq;
755 u32 r, i;
756 int reclaim;
757 unsigned long flags;
758 u8 fill_rx = 0;
759 u32 count = 8;
760 int total_empty;
761
762 /* uCode's read index (stored in shared DRAM) indicates the last Rx
763 * buffer that the driver may process (last buffer filled by ucode). */
764 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
765 i = rxq->read;
766
767 /* Rx interrupt, but nothing sent from uCode */
768 if (i == r)
769 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
770
771 /* calculate total frames need to be restock after handling RX */
772 total_empty = r - rxq->write_actual;
773 if (total_empty < 0)
774 total_empty += RX_QUEUE_SIZE;
775
776 if (total_empty > (RX_QUEUE_SIZE / 2))
777 fill_rx = 1;
778
779 while (i != r) {
780 rxb = rxq->queue[i];
781
782 /* If an RXB doesn't have a Rx queue slot associated with it,
783 * then a bug has been introduced in the queue refilling
784 * routines -- catch it here */
785 BUG_ON(rxb == NULL);
786
787 rxq->queue[i] = NULL;
788
789 pci_unmap_page(priv->pci_dev, rxb->page_dma,
790 PAGE_SIZE << priv->hw_params.rx_page_order,
791 PCI_DMA_FROMDEVICE);
792 pkt = rxb_addr(rxb);
793
794 trace_iwlwifi_dev_rx(priv, pkt,
795 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
796
797 /* Reclaim a command buffer only if this packet is a response
798 * to a (driver-originated) command.
799 * If the packet (e.g. Rx frame) originated from uCode,
800 * there is no command buffer to reclaim.
801 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
802 * but apparently a few don't get set; catch them here. */
803 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
804 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
805 (pkt->hdr.cmd != REPLY_RX) &&
806 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
807 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
808 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
809 (pkt->hdr.cmd != REPLY_TX);
810
811 /* Based on type of command response or notification,
812 * handle those that need handling via function in
813 * rx_handlers table. See iwl_setup_rx_handlers() */
814 if (priv->rx_handlers[pkt->hdr.cmd]) {
815 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
816 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
817 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
818 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
819 } else {
820 /* No handling needed */
821 IWL_DEBUG_RX(priv,
822 "r %d i %d No handler needed for %s, 0x%02x\n",
823 r, i, get_cmd_string(pkt->hdr.cmd),
824 pkt->hdr.cmd);
825 }
826
827 /*
828 * XXX: After here, we should always check rxb->page
829 * against NULL before touching it or its virtual
830 * memory (pkt). Because some rx_handler might have
831 * already taken or freed the pages.
832 */
833
834 if (reclaim) {
835 /* Invoke any callbacks, transfer the buffer to caller,
836 * and fire off the (possibly) blocking iwl_send_cmd()
837 * as we reclaim the driver command queue */
838 if (rxb->page)
839 iwl_tx_cmd_complete(priv, rxb);
840 else
841 IWL_WARN(priv, "Claim null rxb?\n");
842 }
843
844 /* Reuse the page if possible. For notification packets and
845 * SKBs that fail to Rx correctly, add them back into the
846 * rx_free list for reuse later. */
847 spin_lock_irqsave(&rxq->lock, flags);
848 if (rxb->page != NULL) {
849 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
850 0, PAGE_SIZE << priv->hw_params.rx_page_order,
851 PCI_DMA_FROMDEVICE);
852 list_add_tail(&rxb->list, &rxq->rx_free);
853 rxq->free_count++;
854 } else
855 list_add_tail(&rxb->list, &rxq->rx_used);
856
857 spin_unlock_irqrestore(&rxq->lock, flags);
858
859 i = (i + 1) & RX_QUEUE_MASK;
860 /* If there are a lot of unused frames,
861 * restock the Rx queue so ucode wont assert. */
862 if (fill_rx) {
863 count++;
864 if (count >= 8) {
865 rxq->read = i;
866 iwl_rx_replenish_now(priv);
867 count = 0;
868 }
869 }
870 }
871
872 /* Backtrack one entry */
873 rxq->read = i;
874 if (fill_rx)
875 iwl_rx_replenish_now(priv);
876 else
877 iwl_rx_queue_restock(priv);
878 }
879
880 /* call this function to flush any scheduled tasklet */
881 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
882 {
883 /* wait to make sure we flush pending tasklet*/
884 synchronize_irq(priv->pci_dev->irq);
885 tasklet_kill(&priv->irq_tasklet);
886 }
887
888 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
889 {
890 u32 inta, handled = 0;
891 u32 inta_fh;
892 unsigned long flags;
893 #ifdef CONFIG_IWLWIFI_DEBUG
894 u32 inta_mask;
895 #endif
896
897 spin_lock_irqsave(&priv->lock, flags);
898
899 /* Ack/clear/reset pending uCode interrupts.
900 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
901 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
902 inta = iwl_read32(priv, CSR_INT);
903 iwl_write32(priv, CSR_INT, inta);
904
905 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
906 * Any new interrupts that happen after this, either while we're
907 * in this tasklet, or later, will show up in next ISR/tasklet. */
908 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
909 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
910
911 #ifdef CONFIG_IWLWIFI_DEBUG
912 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
913 /* just for debug */
914 inta_mask = iwl_read32(priv, CSR_INT_MASK);
915 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
916 inta, inta_mask, inta_fh);
917 }
918 #endif
919
920 spin_unlock_irqrestore(&priv->lock, flags);
921
922 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
923 * atomic, make sure that inta covers all the interrupts that
924 * we've discovered, even if FH interrupt came in just after
925 * reading CSR_INT. */
926 if (inta_fh & CSR49_FH_INT_RX_MASK)
927 inta |= CSR_INT_BIT_FH_RX;
928 if (inta_fh & CSR49_FH_INT_TX_MASK)
929 inta |= CSR_INT_BIT_FH_TX;
930
931 /* Now service all interrupt bits discovered above. */
932 if (inta & CSR_INT_BIT_HW_ERR) {
933 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
934
935 /* Tell the device to stop sending interrupts */
936 iwl_disable_interrupts(priv);
937
938 priv->isr_stats.hw++;
939 iwl_irq_handle_error(priv);
940
941 handled |= CSR_INT_BIT_HW_ERR;
942
943 return;
944 }
945
946 #ifdef CONFIG_IWLWIFI_DEBUG
947 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
948 /* NIC fires this, but we don't use it, redundant with WAKEUP */
949 if (inta & CSR_INT_BIT_SCD) {
950 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
951 "the frame/frames.\n");
952 priv->isr_stats.sch++;
953 }
954
955 /* Alive notification via Rx interrupt will do the real work */
956 if (inta & CSR_INT_BIT_ALIVE) {
957 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
958 priv->isr_stats.alive++;
959 }
960 }
961 #endif
962 /* Safely ignore these bits for debug checks below */
963 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
964
965 /* HW RF KILL switch toggled */
966 if (inta & CSR_INT_BIT_RF_KILL) {
967 int hw_rf_kill = 0;
968 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
969 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
970 hw_rf_kill = 1;
971
972 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
973 hw_rf_kill ? "disable radio" : "enable radio");
974
975 priv->isr_stats.rfkill++;
976
977 /* driver only loads ucode once setting the interface up.
978 * the driver allows loading the ucode even if the radio
979 * is killed. Hence update the killswitch state here. The
980 * rfkill handler will care about restarting if needed.
981 */
982 if (!test_bit(STATUS_ALIVE, &priv->status)) {
983 if (hw_rf_kill)
984 set_bit(STATUS_RF_KILL_HW, &priv->status);
985 else
986 clear_bit(STATUS_RF_KILL_HW, &priv->status);
987 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
988 }
989
990 handled |= CSR_INT_BIT_RF_KILL;
991 }
992
993 /* Chip got too hot and stopped itself */
994 if (inta & CSR_INT_BIT_CT_KILL) {
995 IWL_ERR(priv, "Microcode CT kill error detected.\n");
996 priv->isr_stats.ctkill++;
997 handled |= CSR_INT_BIT_CT_KILL;
998 }
999
1000 /* Error detected by uCode */
1001 if (inta & CSR_INT_BIT_SW_ERR) {
1002 IWL_ERR(priv, "Microcode SW error detected. "
1003 " Restarting 0x%X.\n", inta);
1004 priv->isr_stats.sw++;
1005 priv->isr_stats.sw_err = inta;
1006 iwl_irq_handle_error(priv);
1007 handled |= CSR_INT_BIT_SW_ERR;
1008 }
1009
1010 /* uCode wakes up after power-down sleep */
1011 if (inta & CSR_INT_BIT_WAKEUP) {
1012 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1013 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1014 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1015 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1016 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1017 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1018 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1019 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1020
1021 priv->isr_stats.wakeup++;
1022
1023 handled |= CSR_INT_BIT_WAKEUP;
1024 }
1025
1026 /* All uCode command responses, including Tx command responses,
1027 * Rx "responses" (frame-received notification), and other
1028 * notifications from uCode come through here*/
1029 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1030 iwl_rx_handle(priv);
1031 priv->isr_stats.rx++;
1032 iwl_leds_background(priv);
1033 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1034 }
1035
1036 /* This "Tx" DMA channel is used only for loading uCode */
1037 if (inta & CSR_INT_BIT_FH_TX) {
1038 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1039 priv->isr_stats.tx++;
1040 handled |= CSR_INT_BIT_FH_TX;
1041 /* Wake up uCode load routine, now that load is complete */
1042 priv->ucode_write_complete = 1;
1043 wake_up_interruptible(&priv->wait_command_queue);
1044 }
1045
1046 if (inta & ~handled) {
1047 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1048 priv->isr_stats.unhandled++;
1049 }
1050
1051 if (inta & ~(priv->inta_mask)) {
1052 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1053 inta & ~priv->inta_mask);
1054 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1055 }
1056
1057 /* Re-enable all interrupts */
1058 /* only Re-enable if diabled by irq */
1059 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1060 iwl_enable_interrupts(priv);
1061
1062 #ifdef CONFIG_IWLWIFI_DEBUG
1063 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1064 inta = iwl_read32(priv, CSR_INT);
1065 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1066 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1067 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1068 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1069 }
1070 #endif
1071 }
1072
1073 /* tasklet for iwlagn interrupt */
1074 static void iwl_irq_tasklet(struct iwl_priv *priv)
1075 {
1076 u32 inta = 0;
1077 u32 handled = 0;
1078 unsigned long flags;
1079 #ifdef CONFIG_IWLWIFI_DEBUG
1080 u32 inta_mask;
1081 #endif
1082
1083 spin_lock_irqsave(&priv->lock, flags);
1084
1085 /* Ack/clear/reset pending uCode interrupts.
1086 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1087 */
1088 iwl_write32(priv, CSR_INT, priv->inta);
1089
1090 inta = priv->inta;
1091
1092 #ifdef CONFIG_IWLWIFI_DEBUG
1093 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1094 /* just for debug */
1095 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1096 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1097 inta, inta_mask);
1098 }
1099 #endif
1100
1101 spin_unlock_irqrestore(&priv->lock, flags);
1102
1103 /* saved interrupt in inta variable now we can reset priv->inta */
1104 priv->inta = 0;
1105
1106 /* Now service all interrupt bits discovered above. */
1107 if (inta & CSR_INT_BIT_HW_ERR) {
1108 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1109
1110 /* Tell the device to stop sending interrupts */
1111 iwl_disable_interrupts(priv);
1112
1113 priv->isr_stats.hw++;
1114 iwl_irq_handle_error(priv);
1115
1116 handled |= CSR_INT_BIT_HW_ERR;
1117
1118 return;
1119 }
1120
1121 #ifdef CONFIG_IWLWIFI_DEBUG
1122 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1123 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1124 if (inta & CSR_INT_BIT_SCD) {
1125 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1126 "the frame/frames.\n");
1127 priv->isr_stats.sch++;
1128 }
1129
1130 /* Alive notification via Rx interrupt will do the real work */
1131 if (inta & CSR_INT_BIT_ALIVE) {
1132 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1133 priv->isr_stats.alive++;
1134 }
1135 }
1136 #endif
1137 /* Safely ignore these bits for debug checks below */
1138 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1139
1140 /* HW RF KILL switch toggled */
1141 if (inta & CSR_INT_BIT_RF_KILL) {
1142 int hw_rf_kill = 0;
1143 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1144 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1145 hw_rf_kill = 1;
1146
1147 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1148 hw_rf_kill ? "disable radio" : "enable radio");
1149
1150 priv->isr_stats.rfkill++;
1151
1152 /* driver only loads ucode once setting the interface up.
1153 * the driver allows loading the ucode even if the radio
1154 * is killed. Hence update the killswitch state here. The
1155 * rfkill handler will care about restarting if needed.
1156 */
1157 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1158 if (hw_rf_kill)
1159 set_bit(STATUS_RF_KILL_HW, &priv->status);
1160 else
1161 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1162 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1163 }
1164
1165 handled |= CSR_INT_BIT_RF_KILL;
1166 }
1167
1168 /* Chip got too hot and stopped itself */
1169 if (inta & CSR_INT_BIT_CT_KILL) {
1170 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1171 priv->isr_stats.ctkill++;
1172 handled |= CSR_INT_BIT_CT_KILL;
1173 }
1174
1175 /* Error detected by uCode */
1176 if (inta & CSR_INT_BIT_SW_ERR) {
1177 IWL_ERR(priv, "Microcode SW error detected. "
1178 " Restarting 0x%X.\n", inta);
1179 priv->isr_stats.sw++;
1180 priv->isr_stats.sw_err = inta;
1181 iwl_irq_handle_error(priv);
1182 handled |= CSR_INT_BIT_SW_ERR;
1183 }
1184
1185 /* uCode wakes up after power-down sleep */
1186 if (inta & CSR_INT_BIT_WAKEUP) {
1187 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1188 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1189 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1190 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1191 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1192 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1193 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1194 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1195
1196 priv->isr_stats.wakeup++;
1197
1198 handled |= CSR_INT_BIT_WAKEUP;
1199 }
1200
1201 /* All uCode command responses, including Tx command responses,
1202 * Rx "responses" (frame-received notification), and other
1203 * notifications from uCode come through here*/
1204 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1205 CSR_INT_BIT_RX_PERIODIC)) {
1206 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1207 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1208 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1209 iwl_write32(priv, CSR_FH_INT_STATUS,
1210 CSR49_FH_INT_RX_MASK);
1211 }
1212 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1213 handled |= CSR_INT_BIT_RX_PERIODIC;
1214 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1215 }
1216 /* Sending RX interrupt require many steps to be done in the
1217 * the device:
1218 * 1- write interrupt to current index in ICT table.
1219 * 2- dma RX frame.
1220 * 3- update RX shared data to indicate last write index.
1221 * 4- send interrupt.
1222 * This could lead to RX race, driver could receive RX interrupt
1223 * but the shared data changes does not reflect this.
1224 * this could lead to RX race, RX periodic will solve this race
1225 */
1226 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1227 CSR_INT_PERIODIC_DIS);
1228 iwl_rx_handle(priv);
1229 /* Only set RX periodic if real RX is received. */
1230 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1231 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1232 CSR_INT_PERIODIC_ENA);
1233
1234 priv->isr_stats.rx++;
1235 iwl_leds_background(priv);
1236 }
1237
1238 /* This "Tx" DMA channel is used only for loading uCode */
1239 if (inta & CSR_INT_BIT_FH_TX) {
1240 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1241 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1242 priv->isr_stats.tx++;
1243 handled |= CSR_INT_BIT_FH_TX;
1244 /* Wake up uCode load routine, now that load is complete */
1245 priv->ucode_write_complete = 1;
1246 wake_up_interruptible(&priv->wait_command_queue);
1247 }
1248
1249 if (inta & ~handled) {
1250 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1251 priv->isr_stats.unhandled++;
1252 }
1253
1254 if (inta & ~(priv->inta_mask)) {
1255 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1256 inta & ~priv->inta_mask);
1257 }
1258
1259 /* Re-enable all interrupts */
1260 /* only Re-enable if diabled by irq */
1261 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1262 iwl_enable_interrupts(priv);
1263 }
1264
1265
1266 /******************************************************************************
1267 *
1268 * uCode download functions
1269 *
1270 ******************************************************************************/
1271
1272 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1273 {
1274 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1275 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1276 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1277 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1278 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1279 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1280 }
1281
1282 static void iwl_nic_start(struct iwl_priv *priv)
1283 {
1284 /* Remove all resets to allow NIC to operate */
1285 iwl_write32(priv, CSR_RESET, 0);
1286 }
1287
1288
1289 /**
1290 * iwl_read_ucode - Read uCode images from disk file.
1291 *
1292 * Copy into buffers for card to fetch via bus-mastering
1293 */
1294 static int iwl_read_ucode(struct iwl_priv *priv)
1295 {
1296 struct iwl_ucode_header *ucode;
1297 int ret = -EINVAL, index;
1298 const struct firmware *ucode_raw;
1299 const char *name_pre = priv->cfg->fw_name_pre;
1300 const unsigned int api_max = priv->cfg->ucode_api_max;
1301 const unsigned int api_min = priv->cfg->ucode_api_min;
1302 char buf[25];
1303 u8 *src;
1304 size_t len;
1305 u32 api_ver, build;
1306 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1307 u16 eeprom_ver;
1308
1309 /* Ask kernel firmware_class module to get the boot firmware off disk.
1310 * request_firmware() is synchronous, file is in memory on return. */
1311 for (index = api_max; index >= api_min; index--) {
1312 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1313 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1314 if (ret < 0) {
1315 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1316 buf, ret);
1317 if (ret == -ENOENT)
1318 continue;
1319 else
1320 goto error;
1321 } else {
1322 if (index < api_max)
1323 IWL_ERR(priv, "Loaded firmware %s, "
1324 "which is deprecated. "
1325 "Please use API v%u instead.\n",
1326 buf, api_max);
1327
1328 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1329 buf, ucode_raw->size);
1330 break;
1331 }
1332 }
1333
1334 if (ret < 0)
1335 goto error;
1336
1337 /* Make sure that we got at least the v1 header! */
1338 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1339 IWL_ERR(priv, "File size way too small!\n");
1340 ret = -EINVAL;
1341 goto err_release;
1342 }
1343
1344 /* Data from ucode file: header followed by uCode images */
1345 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1346
1347 priv->ucode_ver = le32_to_cpu(ucode->ver);
1348 api_ver = IWL_UCODE_API(priv->ucode_ver);
1349 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1350 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1351 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1352 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1353 init_data_size =
1354 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1355 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1356 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1357
1358 /* api_ver should match the api version forming part of the
1359 * firmware filename ... but we don't check for that and only rely
1360 * on the API version read from firmware header from here on forward */
1361
1362 if (api_ver < api_min || api_ver > api_max) {
1363 IWL_ERR(priv, "Driver unable to support your firmware API. "
1364 "Driver supports v%u, firmware is v%u.\n",
1365 api_max, api_ver);
1366 priv->ucode_ver = 0;
1367 ret = -EINVAL;
1368 goto err_release;
1369 }
1370 if (api_ver != api_max)
1371 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1372 "got v%u. New firmware can be obtained "
1373 "from http://www.intellinuxwireless.org.\n",
1374 api_max, api_ver);
1375
1376 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1377 IWL_UCODE_MAJOR(priv->ucode_ver),
1378 IWL_UCODE_MINOR(priv->ucode_ver),
1379 IWL_UCODE_API(priv->ucode_ver),
1380 IWL_UCODE_SERIAL(priv->ucode_ver));
1381
1382 snprintf(priv->hw->wiphy->fw_version,
1383 sizeof(priv->hw->wiphy->fw_version),
1384 "%u.%u.%u.%u",
1385 IWL_UCODE_MAJOR(priv->ucode_ver),
1386 IWL_UCODE_MINOR(priv->ucode_ver),
1387 IWL_UCODE_API(priv->ucode_ver),
1388 IWL_UCODE_SERIAL(priv->ucode_ver));
1389
1390 if (build)
1391 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1392
1393 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1394 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1395 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1396 ? "OTP" : "EEPROM", eeprom_ver);
1397
1398 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1399 priv->ucode_ver);
1400 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1401 inst_size);
1402 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1403 data_size);
1404 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1405 init_size);
1406 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1407 init_data_size);
1408 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1409 boot_size);
1410
1411 /* Verify size of file vs. image size info in file's header */
1412 if (ucode_raw->size !=
1413 priv->cfg->ops->ucode->get_header_size(api_ver) +
1414 inst_size + data_size + init_size +
1415 init_data_size + boot_size) {
1416
1417 IWL_DEBUG_INFO(priv,
1418 "uCode file size %d does not match expected size\n",
1419 (int)ucode_raw->size);
1420 ret = -EINVAL;
1421 goto err_release;
1422 }
1423
1424 /* Verify that uCode images will fit in card's SRAM */
1425 if (inst_size > priv->hw_params.max_inst_size) {
1426 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1427 inst_size);
1428 ret = -EINVAL;
1429 goto err_release;
1430 }
1431
1432 if (data_size > priv->hw_params.max_data_size) {
1433 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1434 data_size);
1435 ret = -EINVAL;
1436 goto err_release;
1437 }
1438 if (init_size > priv->hw_params.max_inst_size) {
1439 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1440 init_size);
1441 ret = -EINVAL;
1442 goto err_release;
1443 }
1444 if (init_data_size > priv->hw_params.max_data_size) {
1445 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1446 init_data_size);
1447 ret = -EINVAL;
1448 goto err_release;
1449 }
1450 if (boot_size > priv->hw_params.max_bsm_size) {
1451 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1452 boot_size);
1453 ret = -EINVAL;
1454 goto err_release;
1455 }
1456
1457 /* Allocate ucode buffers for card's bus-master loading ... */
1458
1459 /* Runtime instructions and 2 copies of data:
1460 * 1) unmodified from disk
1461 * 2) backup cache for save/restore during power-downs */
1462 priv->ucode_code.len = inst_size;
1463 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1464
1465 priv->ucode_data.len = data_size;
1466 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1467
1468 priv->ucode_data_backup.len = data_size;
1469 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1470
1471 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1472 !priv->ucode_data_backup.v_addr)
1473 goto err_pci_alloc;
1474
1475 /* Initialization instructions and data */
1476 if (init_size && init_data_size) {
1477 priv->ucode_init.len = init_size;
1478 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1479
1480 priv->ucode_init_data.len = init_data_size;
1481 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1482
1483 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1484 goto err_pci_alloc;
1485 }
1486
1487 /* Bootstrap (instructions only, no data) */
1488 if (boot_size) {
1489 priv->ucode_boot.len = boot_size;
1490 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1491
1492 if (!priv->ucode_boot.v_addr)
1493 goto err_pci_alloc;
1494 }
1495
1496 /* Copy images into buffers for card's bus-master reads ... */
1497
1498 /* Runtime instructions (first block of data in file) */
1499 len = inst_size;
1500 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1501 memcpy(priv->ucode_code.v_addr, src, len);
1502 src += len;
1503
1504 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1505 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1506
1507 /* Runtime data (2nd block)
1508 * NOTE: Copy into backup buffer will be done in iwl_up() */
1509 len = data_size;
1510 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1511 memcpy(priv->ucode_data.v_addr, src, len);
1512 memcpy(priv->ucode_data_backup.v_addr, src, len);
1513 src += len;
1514
1515 /* Initialization instructions (3rd block) */
1516 if (init_size) {
1517 len = init_size;
1518 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1519 len);
1520 memcpy(priv->ucode_init.v_addr, src, len);
1521 src += len;
1522 }
1523
1524 /* Initialization data (4th block) */
1525 if (init_data_size) {
1526 len = init_data_size;
1527 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1528 len);
1529 memcpy(priv->ucode_init_data.v_addr, src, len);
1530 src += len;
1531 }
1532
1533 /* Bootstrap instructions (5th block) */
1534 len = boot_size;
1535 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1536 memcpy(priv->ucode_boot.v_addr, src, len);
1537
1538 /* We have our copies now, allow OS release its copies */
1539 release_firmware(ucode_raw);
1540 return 0;
1541
1542 err_pci_alloc:
1543 IWL_ERR(priv, "failed to allocate pci memory\n");
1544 ret = -ENOMEM;
1545 iwl_dealloc_ucode_pci(priv);
1546
1547 err_release:
1548 release_firmware(ucode_raw);
1549
1550 error:
1551 return ret;
1552 }
1553
1554 #ifdef CONFIG_IWLWIFI_DEBUG
1555 static const char *desc_lookup_text[] = {
1556 "OK",
1557 "FAIL",
1558 "BAD_PARAM",
1559 "BAD_CHECKSUM",
1560 "NMI_INTERRUPT_WDG",
1561 "SYSASSERT",
1562 "FATAL_ERROR",
1563 "BAD_COMMAND",
1564 "HW_ERROR_TUNE_LOCK",
1565 "HW_ERROR_TEMPERATURE",
1566 "ILLEGAL_CHAN_FREQ",
1567 "VCC_NOT_STABLE",
1568 "FH_ERROR",
1569 "NMI_INTERRUPT_HOST",
1570 "NMI_INTERRUPT_ACTION_PT",
1571 "NMI_INTERRUPT_UNKNOWN",
1572 "UCODE_VERSION_MISMATCH",
1573 "HW_ERROR_ABS_LOCK",
1574 "HW_ERROR_CAL_LOCK_FAIL",
1575 "NMI_INTERRUPT_INST_ACTION_PT",
1576 "NMI_INTERRUPT_DATA_ACTION_PT",
1577 "NMI_TRM_HW_ER",
1578 "NMI_INTERRUPT_TRM",
1579 "NMI_INTERRUPT_BREAK_POINT"
1580 "DEBUG_0",
1581 "DEBUG_1",
1582 "DEBUG_2",
1583 "DEBUG_3",
1584 "UNKNOWN"
1585 };
1586
1587 static const char *desc_lookup(int i)
1588 {
1589 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1590
1591 if (i < 0 || i > max)
1592 i = max;
1593
1594 return desc_lookup_text[i];
1595 }
1596
1597 #define ERROR_START_OFFSET (1 * sizeof(u32))
1598 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1599
1600 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1601 {
1602 u32 data2, line;
1603 u32 desc, time, count, base, data1;
1604 u32 blink1, blink2, ilink1, ilink2;
1605
1606 if (priv->ucode_type == UCODE_INIT)
1607 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1608 else
1609 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1610
1611 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1612 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1613 return;
1614 }
1615
1616 count = iwl_read_targ_mem(priv, base);
1617
1618 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1619 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1620 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1621 priv->status, count);
1622 }
1623
1624 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1625 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1626 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1627 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1628 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1629 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1630 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1631 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1632 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1633
1634 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1635 blink1, blink2, ilink1, ilink2);
1636
1637 IWL_ERR(priv, "Desc Time "
1638 "data1 data2 line\n");
1639 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1640 desc_lookup(desc), desc, time, data1, data2, line);
1641 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1642 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1643 ilink1, ilink2);
1644
1645 }
1646
1647 #define EVENT_START_OFFSET (4 * sizeof(u32))
1648
1649 /**
1650 * iwl_print_event_log - Dump error event log to syslog
1651 *
1652 */
1653 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1654 u32 num_events, u32 mode)
1655 {
1656 u32 i;
1657 u32 base; /* SRAM byte address of event log header */
1658 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1659 u32 ptr; /* SRAM byte address of log data */
1660 u32 ev, time, data; /* event log data */
1661
1662 if (num_events == 0)
1663 return;
1664 if (priv->ucode_type == UCODE_INIT)
1665 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1666 else
1667 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1668
1669 if (mode == 0)
1670 event_size = 2 * sizeof(u32);
1671 else
1672 event_size = 3 * sizeof(u32);
1673
1674 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1675
1676 /* "time" is actually "data" for mode 0 (no timestamp).
1677 * place event id # at far right for easier visual parsing. */
1678 for (i = 0; i < num_events; i++) {
1679 ev = iwl_read_targ_mem(priv, ptr);
1680 ptr += sizeof(u32);
1681 time = iwl_read_targ_mem(priv, ptr);
1682 ptr += sizeof(u32);
1683 if (mode == 0) {
1684 /* data, ev */
1685 trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1686 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1687 } else {
1688 data = iwl_read_targ_mem(priv, ptr);
1689 ptr += sizeof(u32);
1690 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1691 time, data, ev);
1692 trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1693 }
1694 }
1695 }
1696
1697 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1698 {
1699 u32 base; /* SRAM byte address of event log header */
1700 u32 capacity; /* event log capacity in # entries */
1701 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1702 u32 num_wraps; /* # times uCode wrapped to top of log */
1703 u32 next_entry; /* index of next entry to be written by uCode */
1704 u32 size; /* # entries that we'll print */
1705
1706 if (priv->ucode_type == UCODE_INIT)
1707 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1708 else
1709 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1710
1711 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1712 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1713 return;
1714 }
1715
1716 /* event log header */
1717 capacity = iwl_read_targ_mem(priv, base);
1718 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1719 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1720 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1721
1722 size = num_wraps ? capacity : next_entry;
1723
1724 /* bail out if nothing in log */
1725 if (size == 0) {
1726 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1727 return;
1728 }
1729
1730 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1731 size, num_wraps);
1732
1733 /* if uCode has wrapped back to top of log, start at the oldest entry,
1734 * i.e the next one that uCode would fill. */
1735 if (num_wraps)
1736 iwl_print_event_log(priv, next_entry,
1737 capacity - next_entry, mode);
1738 /* (then/else) start at top of log */
1739 iwl_print_event_log(priv, 0, next_entry, mode);
1740
1741 }
1742 #endif
1743
1744 /**
1745 * iwl_alive_start - called after REPLY_ALIVE notification received
1746 * from protocol/runtime uCode (initialization uCode's
1747 * Alive gets handled by iwl_init_alive_start()).
1748 */
1749 static void iwl_alive_start(struct iwl_priv *priv)
1750 {
1751 int ret = 0;
1752
1753 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1754
1755 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1756 /* We had an error bringing up the hardware, so take it
1757 * all the way back down so we can try again */
1758 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1759 goto restart;
1760 }
1761
1762 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1763 * This is a paranoid check, because we would not have gotten the
1764 * "runtime" alive if code weren't properly loaded. */
1765 if (iwl_verify_ucode(priv)) {
1766 /* Runtime instruction load was bad;
1767 * take it all the way back down so we can try again */
1768 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1769 goto restart;
1770 }
1771
1772 iwl_clear_stations_table(priv);
1773 ret = priv->cfg->ops->lib->alive_notify(priv);
1774 if (ret) {
1775 IWL_WARN(priv,
1776 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1777 goto restart;
1778 }
1779
1780 /* After the ALIVE response, we can send host commands to the uCode */
1781 set_bit(STATUS_ALIVE, &priv->status);
1782
1783 if (iwl_is_rfkill(priv))
1784 return;
1785
1786 ieee80211_wake_queues(priv->hw);
1787
1788 priv->active_rate = priv->rates_mask;
1789 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1790
1791 /* Configure Tx antenna selection based on H/W config */
1792 if (priv->cfg->ops->hcmd->set_tx_ant)
1793 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1794
1795 if (iwl_is_associated(priv)) {
1796 struct iwl_rxon_cmd *active_rxon =
1797 (struct iwl_rxon_cmd *)&priv->active_rxon;
1798 /* apply any changes in staging */
1799 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1800 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1801 } else {
1802 /* Initialize our rx_config data */
1803 iwl_connection_init_rx_config(priv, priv->iw_mode);
1804
1805 if (priv->cfg->ops->hcmd->set_rxon_chain)
1806 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1807
1808 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1809 }
1810
1811 /* Configure Bluetooth device coexistence support */
1812 iwl_send_bt_config(priv);
1813
1814 iwl_reset_run_time_calib(priv);
1815
1816 /* Configure the adapter for unassociated operation */
1817 iwlcore_commit_rxon(priv);
1818
1819 /* At this point, the NIC is initialized and operational */
1820 iwl_rf_kill_ct_config(priv);
1821
1822 iwl_leds_init(priv);
1823
1824 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1825 set_bit(STATUS_READY, &priv->status);
1826 wake_up_interruptible(&priv->wait_command_queue);
1827
1828 iwl_power_update_mode(priv, true);
1829
1830 /* reassociate for ADHOC mode */
1831 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1832 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1833 priv->vif);
1834 if (beacon)
1835 iwl_mac_beacon_update(priv->hw, beacon);
1836 }
1837
1838
1839 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1840 iwl_set_mode(priv, priv->iw_mode);
1841
1842 return;
1843
1844 restart:
1845 queue_work(priv->workqueue, &priv->restart);
1846 }
1847
1848 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1849
1850 static void __iwl_down(struct iwl_priv *priv)
1851 {
1852 unsigned long flags;
1853 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1854
1855 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1856
1857 if (!exit_pending)
1858 set_bit(STATUS_EXIT_PENDING, &priv->status);
1859
1860 iwl_clear_stations_table(priv);
1861
1862 /* Unblock any waiting calls */
1863 wake_up_interruptible_all(&priv->wait_command_queue);
1864
1865 /* Wipe out the EXIT_PENDING status bit if we are not actually
1866 * exiting the module */
1867 if (!exit_pending)
1868 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1869
1870 /* stop and reset the on-board processor */
1871 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1872
1873 /* tell the device to stop sending interrupts */
1874 spin_lock_irqsave(&priv->lock, flags);
1875 iwl_disable_interrupts(priv);
1876 spin_unlock_irqrestore(&priv->lock, flags);
1877 iwl_synchronize_irq(priv);
1878
1879 if (priv->mac80211_registered)
1880 ieee80211_stop_queues(priv->hw);
1881
1882 /* If we have not previously called iwl_init() then
1883 * clear all bits but the RF Kill bit and return */
1884 if (!iwl_is_init(priv)) {
1885 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1886 STATUS_RF_KILL_HW |
1887 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1888 STATUS_GEO_CONFIGURED |
1889 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1890 STATUS_EXIT_PENDING;
1891 goto exit;
1892 }
1893
1894 /* ...otherwise clear out all the status bits but the RF Kill
1895 * bit and continue taking the NIC down. */
1896 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1897 STATUS_RF_KILL_HW |
1898 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1899 STATUS_GEO_CONFIGURED |
1900 test_bit(STATUS_FW_ERROR, &priv->status) <<
1901 STATUS_FW_ERROR |
1902 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1903 STATUS_EXIT_PENDING;
1904
1905 /* device going down, Stop using ICT table */
1906 iwl_disable_ict(priv);
1907 spin_lock_irqsave(&priv->lock, flags);
1908 iwl_clear_bit(priv, CSR_GP_CNTRL,
1909 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1910 spin_unlock_irqrestore(&priv->lock, flags);
1911
1912 iwl_txq_ctx_stop(priv);
1913 iwl_rxq_stop(priv);
1914
1915 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1916 APMG_CLK_VAL_DMA_CLK_RQT);
1917
1918 udelay(5);
1919
1920 /* Stop the device, and put it in low power state */
1921 priv->cfg->ops->lib->apm_ops.stop(priv);
1922
1923 exit:
1924 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1925
1926 if (priv->ibss_beacon)
1927 dev_kfree_skb(priv->ibss_beacon);
1928 priv->ibss_beacon = NULL;
1929
1930 /* clear out any free frames */
1931 iwl_clear_free_frames(priv);
1932 }
1933
1934 static void iwl_down(struct iwl_priv *priv)
1935 {
1936 mutex_lock(&priv->mutex);
1937 __iwl_down(priv);
1938 mutex_unlock(&priv->mutex);
1939
1940 iwl_cancel_deferred_work(priv);
1941 }
1942
1943 #define HW_READY_TIMEOUT (50)
1944
1945 static int iwl_set_hw_ready(struct iwl_priv *priv)
1946 {
1947 int ret = 0;
1948
1949 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1950 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1951
1952 /* See if we got it */
1953 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1954 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1955 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1956 HW_READY_TIMEOUT);
1957 if (ret != -ETIMEDOUT)
1958 priv->hw_ready = true;
1959 else
1960 priv->hw_ready = false;
1961
1962 IWL_DEBUG_INFO(priv, "hardware %s\n",
1963 (priv->hw_ready == 1) ? "ready" : "not ready");
1964 return ret;
1965 }
1966
1967 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1968 {
1969 int ret = 0;
1970
1971 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1972
1973 ret = iwl_set_hw_ready(priv);
1974 if (priv->hw_ready)
1975 return ret;
1976
1977 /* If HW is not ready, prepare the conditions to check again */
1978 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1979 CSR_HW_IF_CONFIG_REG_PREPARE);
1980
1981 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1982 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1983 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1984
1985 /* HW should be ready by now, check again. */
1986 if (ret != -ETIMEDOUT)
1987 iwl_set_hw_ready(priv);
1988
1989 return ret;
1990 }
1991
1992 #define MAX_HW_RESTARTS 5
1993
1994 static int __iwl_up(struct iwl_priv *priv)
1995 {
1996 int i;
1997 int ret;
1998
1999 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2000 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2001 return -EIO;
2002 }
2003
2004 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2005 IWL_ERR(priv, "ucode not available for device bringup\n");
2006 return -EIO;
2007 }
2008
2009 iwl_prepare_card_hw(priv);
2010
2011 if (!priv->hw_ready) {
2012 IWL_WARN(priv, "Exit HW not ready\n");
2013 return -EIO;
2014 }
2015
2016 /* If platform's RF_KILL switch is NOT set to KILL */
2017 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2018 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2019 else
2020 set_bit(STATUS_RF_KILL_HW, &priv->status);
2021
2022 if (iwl_is_rfkill(priv)) {
2023 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2024
2025 iwl_enable_interrupts(priv);
2026 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2027 return 0;
2028 }
2029
2030 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2031
2032 ret = iwl_hw_nic_init(priv);
2033 if (ret) {
2034 IWL_ERR(priv, "Unable to init nic\n");
2035 return ret;
2036 }
2037
2038 /* make sure rfkill handshake bits are cleared */
2039 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2040 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2041 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2042
2043 /* clear (again), then enable host interrupts */
2044 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2045 iwl_enable_interrupts(priv);
2046
2047 /* really make sure rfkill handshake bits are cleared */
2048 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2049 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2050
2051 /* Copy original ucode data image from disk into backup cache.
2052 * This will be used to initialize the on-board processor's
2053 * data SRAM for a clean start when the runtime program first loads. */
2054 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2055 priv->ucode_data.len);
2056
2057 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2058
2059 iwl_clear_stations_table(priv);
2060
2061 /* load bootstrap state machine,
2062 * load bootstrap program into processor's memory,
2063 * prepare to load the "initialize" uCode */
2064 ret = priv->cfg->ops->lib->load_ucode(priv);
2065
2066 if (ret) {
2067 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2068 ret);
2069 continue;
2070 }
2071
2072 /* start card; "initialize" will load runtime ucode */
2073 iwl_nic_start(priv);
2074
2075 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2076
2077 return 0;
2078 }
2079
2080 set_bit(STATUS_EXIT_PENDING, &priv->status);
2081 __iwl_down(priv);
2082 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2083
2084 /* tried to restart and config the device for as long as our
2085 * patience could withstand */
2086 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2087 return -EIO;
2088 }
2089
2090
2091 /*****************************************************************************
2092 *
2093 * Workqueue callbacks
2094 *
2095 *****************************************************************************/
2096
2097 static void iwl_bg_init_alive_start(struct work_struct *data)
2098 {
2099 struct iwl_priv *priv =
2100 container_of(data, struct iwl_priv, init_alive_start.work);
2101
2102 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2103 return;
2104
2105 mutex_lock(&priv->mutex);
2106 priv->cfg->ops->lib->init_alive_start(priv);
2107 mutex_unlock(&priv->mutex);
2108 }
2109
2110 static void iwl_bg_alive_start(struct work_struct *data)
2111 {
2112 struct iwl_priv *priv =
2113 container_of(data, struct iwl_priv, alive_start.work);
2114
2115 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2116 return;
2117
2118 /* enable dram interrupt */
2119 iwl_reset_ict(priv);
2120
2121 mutex_lock(&priv->mutex);
2122 iwl_alive_start(priv);
2123 mutex_unlock(&priv->mutex);
2124 }
2125
2126 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2127 {
2128 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2129 run_time_calib_work);
2130
2131 mutex_lock(&priv->mutex);
2132
2133 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2134 test_bit(STATUS_SCANNING, &priv->status)) {
2135 mutex_unlock(&priv->mutex);
2136 return;
2137 }
2138
2139 if (priv->start_calib) {
2140 iwl_chain_noise_calibration(priv, &priv->statistics);
2141
2142 iwl_sensitivity_calibration(priv, &priv->statistics);
2143 }
2144
2145 mutex_unlock(&priv->mutex);
2146 return;
2147 }
2148
2149 static void iwl_bg_up(struct work_struct *data)
2150 {
2151 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2152
2153 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2154 return;
2155
2156 mutex_lock(&priv->mutex);
2157 __iwl_up(priv);
2158 mutex_unlock(&priv->mutex);
2159 }
2160
2161 static void iwl_bg_restart(struct work_struct *data)
2162 {
2163 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2164
2165 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2166 return;
2167
2168 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2169 mutex_lock(&priv->mutex);
2170 priv->vif = NULL;
2171 priv->is_open = 0;
2172 mutex_unlock(&priv->mutex);
2173 iwl_down(priv);
2174 ieee80211_restart_hw(priv->hw);
2175 } else {
2176 iwl_down(priv);
2177 queue_work(priv->workqueue, &priv->up);
2178 }
2179 }
2180
2181 static void iwl_bg_rx_replenish(struct work_struct *data)
2182 {
2183 struct iwl_priv *priv =
2184 container_of(data, struct iwl_priv, rx_replenish);
2185
2186 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2187 return;
2188
2189 mutex_lock(&priv->mutex);
2190 iwl_rx_replenish(priv);
2191 mutex_unlock(&priv->mutex);
2192 }
2193
2194 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2195
2196 void iwl_post_associate(struct iwl_priv *priv)
2197 {
2198 struct ieee80211_conf *conf = NULL;
2199 int ret = 0;
2200 unsigned long flags;
2201
2202 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2203 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2204 return;
2205 }
2206
2207 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2208 priv->assoc_id, priv->active_rxon.bssid_addr);
2209
2210
2211 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2212 return;
2213
2214
2215 if (!priv->vif || !priv->is_open)
2216 return;
2217
2218 iwl_scan_cancel_timeout(priv, 200);
2219
2220 conf = ieee80211_get_hw_conf(priv->hw);
2221
2222 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2223 iwlcore_commit_rxon(priv);
2224
2225 iwl_setup_rxon_timing(priv);
2226 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2227 sizeof(priv->rxon_timing), &priv->rxon_timing);
2228 if (ret)
2229 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2230 "Attempting to continue.\n");
2231
2232 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2233
2234 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2235
2236 if (priv->cfg->ops->hcmd->set_rxon_chain)
2237 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2238
2239 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2240
2241 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2242 priv->assoc_id, priv->beacon_int);
2243
2244 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2245 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2246 else
2247 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2248
2249 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2250 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2251 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2252 else
2253 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2254
2255 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2256 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2257
2258 }
2259
2260 iwlcore_commit_rxon(priv);
2261
2262 switch (priv->iw_mode) {
2263 case NL80211_IFTYPE_STATION:
2264 break;
2265
2266 case NL80211_IFTYPE_ADHOC:
2267
2268 /* assume default assoc id */
2269 priv->assoc_id = 1;
2270
2271 iwl_rxon_add_station(priv, priv->bssid, 0);
2272 iwl_send_beacon_cmd(priv);
2273
2274 break;
2275
2276 default:
2277 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2278 __func__, priv->iw_mode);
2279 break;
2280 }
2281
2282 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2283 priv->assoc_station_added = 1;
2284
2285 spin_lock_irqsave(&priv->lock, flags);
2286 iwl_activate_qos(priv, 0);
2287 spin_unlock_irqrestore(&priv->lock, flags);
2288
2289 /* the chain noise calibration will enabled PM upon completion
2290 * If chain noise has already been run, then we need to enable
2291 * power management here */
2292 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2293 iwl_power_update_mode(priv, false);
2294
2295 /* Enable Rx differential gain and sensitivity calibrations */
2296 iwl_chain_noise_reset(priv);
2297 priv->start_calib = 1;
2298
2299 }
2300
2301 /*****************************************************************************
2302 *
2303 * mac80211 entry point functions
2304 *
2305 *****************************************************************************/
2306
2307 #define UCODE_READY_TIMEOUT (4 * HZ)
2308
2309 /*
2310 * Not a mac80211 entry point function, but it fits in with all the
2311 * other mac80211 functions grouped here.
2312 */
2313 static int iwl_setup_mac(struct iwl_priv *priv)
2314 {
2315 int ret;
2316 struct ieee80211_hw *hw = priv->hw;
2317 hw->rate_control_algorithm = "iwl-agn-rs";
2318
2319 /* Tell mac80211 our characteristics */
2320 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2321 IEEE80211_HW_NOISE_DBM |
2322 IEEE80211_HW_AMPDU_AGGREGATION |
2323 IEEE80211_HW_SPECTRUM_MGMT;
2324
2325 if (!priv->cfg->broken_powersave)
2326 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2327 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2328
2329 hw->sta_data_size = sizeof(struct iwl_station_priv);
2330 hw->wiphy->interface_modes =
2331 BIT(NL80211_IFTYPE_STATION) |
2332 BIT(NL80211_IFTYPE_ADHOC);
2333
2334 hw->wiphy->custom_regulatory = true;
2335
2336 /* Firmware does not support this */
2337 hw->wiphy->disable_beacon_hints = true;
2338
2339 /*
2340 * For now, disable PS by default because it affects
2341 * RX performance significantly.
2342 */
2343 hw->wiphy->ps_default = false;
2344
2345 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2346 /* we create the 802.11 header and a zero-length SSID element */
2347 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2348
2349 /* Default value; 4 EDCA QOS priorities */
2350 hw->queues = 4;
2351
2352 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2353
2354 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2355 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2356 &priv->bands[IEEE80211_BAND_2GHZ];
2357 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2358 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2359 &priv->bands[IEEE80211_BAND_5GHZ];
2360
2361 ret = ieee80211_register_hw(priv->hw);
2362 if (ret) {
2363 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2364 return ret;
2365 }
2366 priv->mac80211_registered = 1;
2367
2368 return 0;
2369 }
2370
2371
2372 static int iwl_mac_start(struct ieee80211_hw *hw)
2373 {
2374 struct iwl_priv *priv = hw->priv;
2375 int ret;
2376
2377 IWL_DEBUG_MAC80211(priv, "enter\n");
2378
2379 /* we should be verifying the device is ready to be opened */
2380 mutex_lock(&priv->mutex);
2381
2382 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2383 * ucode filename and max sizes are card-specific. */
2384
2385 if (!priv->ucode_code.len) {
2386 ret = iwl_read_ucode(priv);
2387 if (ret) {
2388 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2389 mutex_unlock(&priv->mutex);
2390 return ret;
2391 }
2392 }
2393
2394 ret = __iwl_up(priv);
2395
2396 mutex_unlock(&priv->mutex);
2397
2398 if (ret)
2399 return ret;
2400
2401 if (iwl_is_rfkill(priv))
2402 goto out;
2403
2404 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2405
2406 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2407 * mac80211 will not be run successfully. */
2408 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2409 test_bit(STATUS_READY, &priv->status),
2410 UCODE_READY_TIMEOUT);
2411 if (!ret) {
2412 if (!test_bit(STATUS_READY, &priv->status)) {
2413 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2414 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2415 return -ETIMEDOUT;
2416 }
2417 }
2418
2419 iwl_led_start(priv);
2420
2421 out:
2422 priv->is_open = 1;
2423 IWL_DEBUG_MAC80211(priv, "leave\n");
2424 return 0;
2425 }
2426
2427 static void iwl_mac_stop(struct ieee80211_hw *hw)
2428 {
2429 struct iwl_priv *priv = hw->priv;
2430
2431 IWL_DEBUG_MAC80211(priv, "enter\n");
2432
2433 if (!priv->is_open)
2434 return;
2435
2436 priv->is_open = 0;
2437
2438 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2439 /* stop mac, cancel any scan request and clear
2440 * RXON_FILTER_ASSOC_MSK BIT
2441 */
2442 mutex_lock(&priv->mutex);
2443 iwl_scan_cancel_timeout(priv, 100);
2444 mutex_unlock(&priv->mutex);
2445 }
2446
2447 iwl_down(priv);
2448
2449 flush_workqueue(priv->workqueue);
2450
2451 /* enable interrupts again in order to receive rfkill changes */
2452 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2453 iwl_enable_interrupts(priv);
2454
2455 IWL_DEBUG_MAC80211(priv, "leave\n");
2456 }
2457
2458 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2459 {
2460 struct iwl_priv *priv = hw->priv;
2461
2462 IWL_DEBUG_MACDUMP(priv, "enter\n");
2463
2464 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2465 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2466
2467 if (iwl_tx_skb(priv, skb))
2468 dev_kfree_skb_any(skb);
2469
2470 IWL_DEBUG_MACDUMP(priv, "leave\n");
2471 return NETDEV_TX_OK;
2472 }
2473
2474 void iwl_config_ap(struct iwl_priv *priv)
2475 {
2476 int ret = 0;
2477 unsigned long flags;
2478
2479 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2480 return;
2481
2482 /* The following should be done only at AP bring up */
2483 if (!iwl_is_associated(priv)) {
2484
2485 /* RXON - unassoc (to set timing command) */
2486 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2487 iwlcore_commit_rxon(priv);
2488
2489 /* RXON Timing */
2490 iwl_setup_rxon_timing(priv);
2491 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2492 sizeof(priv->rxon_timing), &priv->rxon_timing);
2493 if (ret)
2494 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2495 "Attempting to continue.\n");
2496
2497 if (priv->cfg->ops->hcmd->set_rxon_chain)
2498 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2499
2500 /* FIXME: what should be the assoc_id for AP? */
2501 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2502 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2503 priv->staging_rxon.flags |=
2504 RXON_FLG_SHORT_PREAMBLE_MSK;
2505 else
2506 priv->staging_rxon.flags &=
2507 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2508
2509 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2510 if (priv->assoc_capability &
2511 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2512 priv->staging_rxon.flags |=
2513 RXON_FLG_SHORT_SLOT_MSK;
2514 else
2515 priv->staging_rxon.flags &=
2516 ~RXON_FLG_SHORT_SLOT_MSK;
2517
2518 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2519 priv->staging_rxon.flags &=
2520 ~RXON_FLG_SHORT_SLOT_MSK;
2521 }
2522 /* restore RXON assoc */
2523 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2524 iwlcore_commit_rxon(priv);
2525 spin_lock_irqsave(&priv->lock, flags);
2526 iwl_activate_qos(priv, 1);
2527 spin_unlock_irqrestore(&priv->lock, flags);
2528 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2529 }
2530 iwl_send_beacon_cmd(priv);
2531
2532 /* FIXME - we need to add code here to detect a totally new
2533 * configuration, reset the AP, unassoc, rxon timing, assoc,
2534 * clear sta table, add BCAST sta... */
2535 }
2536
2537 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2538 struct ieee80211_key_conf *keyconf, const u8 *addr,
2539 u32 iv32, u16 *phase1key)
2540 {
2541
2542 struct iwl_priv *priv = hw->priv;
2543 IWL_DEBUG_MAC80211(priv, "enter\n");
2544
2545 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2546
2547 IWL_DEBUG_MAC80211(priv, "leave\n");
2548 }
2549
2550 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2551 struct ieee80211_vif *vif,
2552 struct ieee80211_sta *sta,
2553 struct ieee80211_key_conf *key)
2554 {
2555 struct iwl_priv *priv = hw->priv;
2556 const u8 *addr;
2557 int ret;
2558 u8 sta_id;
2559 bool is_default_wep_key = false;
2560
2561 IWL_DEBUG_MAC80211(priv, "enter\n");
2562
2563 if (priv->cfg->mod_params->sw_crypto) {
2564 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2565 return -EOPNOTSUPP;
2566 }
2567 addr = sta ? sta->addr : iwl_bcast_addr;
2568 sta_id = iwl_find_station(priv, addr);
2569 if (sta_id == IWL_INVALID_STATION) {
2570 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2571 addr);
2572 return -EINVAL;
2573
2574 }
2575
2576 mutex_lock(&priv->mutex);
2577 iwl_scan_cancel_timeout(priv, 100);
2578 mutex_unlock(&priv->mutex);
2579
2580 /* If we are getting WEP group key and we didn't receive any key mapping
2581 * so far, we are in legacy wep mode (group key only), otherwise we are
2582 * in 1X mode.
2583 * In legacy wep mode, we use another host command to the uCode */
2584 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2585 priv->iw_mode != NL80211_IFTYPE_AP) {
2586 if (cmd == SET_KEY)
2587 is_default_wep_key = !priv->key_mapping_key;
2588 else
2589 is_default_wep_key =
2590 (key->hw_key_idx == HW_KEY_DEFAULT);
2591 }
2592
2593 switch (cmd) {
2594 case SET_KEY:
2595 if (is_default_wep_key)
2596 ret = iwl_set_default_wep_key(priv, key);
2597 else
2598 ret = iwl_set_dynamic_key(priv, key, sta_id);
2599
2600 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2601 break;
2602 case DISABLE_KEY:
2603 if (is_default_wep_key)
2604 ret = iwl_remove_default_wep_key(priv, key);
2605 else
2606 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2607
2608 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2609 break;
2610 default:
2611 ret = -EINVAL;
2612 }
2613
2614 IWL_DEBUG_MAC80211(priv, "leave\n");
2615
2616 return ret;
2617 }
2618
2619 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2620 enum ieee80211_ampdu_mlme_action action,
2621 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2622 {
2623 struct iwl_priv *priv = hw->priv;
2624 int ret;
2625
2626 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2627 sta->addr, tid);
2628
2629 if (!(priv->cfg->sku & IWL_SKU_N))
2630 return -EACCES;
2631
2632 switch (action) {
2633 case IEEE80211_AMPDU_RX_START:
2634 IWL_DEBUG_HT(priv, "start Rx\n");
2635 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2636 case IEEE80211_AMPDU_RX_STOP:
2637 IWL_DEBUG_HT(priv, "stop Rx\n");
2638 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2639 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2640 return 0;
2641 else
2642 return ret;
2643 case IEEE80211_AMPDU_TX_START:
2644 IWL_DEBUG_HT(priv, "start Tx\n");
2645 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2646 case IEEE80211_AMPDU_TX_STOP:
2647 IWL_DEBUG_HT(priv, "stop Tx\n");
2648 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2649 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2650 return 0;
2651 else
2652 return ret;
2653 default:
2654 IWL_DEBUG_HT(priv, "unknown\n");
2655 return -EINVAL;
2656 break;
2657 }
2658 return 0;
2659 }
2660
2661 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2662 struct ieee80211_low_level_stats *stats)
2663 {
2664 struct iwl_priv *priv = hw->priv;
2665
2666 priv = hw->priv;
2667 IWL_DEBUG_MAC80211(priv, "enter\n");
2668 IWL_DEBUG_MAC80211(priv, "leave\n");
2669
2670 return 0;
2671 }
2672
2673 /*****************************************************************************
2674 *
2675 * sysfs attributes
2676 *
2677 *****************************************************************************/
2678
2679 #ifdef CONFIG_IWLWIFI_DEBUG
2680
2681 /*
2682 * The following adds a new attribute to the sysfs representation
2683 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2684 * used for controlling the debug level.
2685 *
2686 * See the level definitions in iwl for details.
2687 *
2688 * The debug_level being managed using sysfs below is a per device debug
2689 * level that is used instead of the global debug level if it (the per
2690 * device debug level) is set.
2691 */
2692 static ssize_t show_debug_level(struct device *d,
2693 struct device_attribute *attr, char *buf)
2694 {
2695 struct iwl_priv *priv = dev_get_drvdata(d);
2696 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2697 }
2698 static ssize_t store_debug_level(struct device *d,
2699 struct device_attribute *attr,
2700 const char *buf, size_t count)
2701 {
2702 struct iwl_priv *priv = dev_get_drvdata(d);
2703 unsigned long val;
2704 int ret;
2705
2706 ret = strict_strtoul(buf, 0, &val);
2707 if (ret)
2708 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2709 else {
2710 priv->debug_level = val;
2711 if (iwl_alloc_traffic_mem(priv))
2712 IWL_ERR(priv,
2713 "Not enough memory to generate traffic log\n");
2714 }
2715 return strnlen(buf, count);
2716 }
2717
2718 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2719 show_debug_level, store_debug_level);
2720
2721
2722 #endif /* CONFIG_IWLWIFI_DEBUG */
2723
2724
2725 static ssize_t show_temperature(struct device *d,
2726 struct device_attribute *attr, char *buf)
2727 {
2728 struct iwl_priv *priv = dev_get_drvdata(d);
2729
2730 if (!iwl_is_alive(priv))
2731 return -EAGAIN;
2732
2733 return sprintf(buf, "%d\n", priv->temperature);
2734 }
2735
2736 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2737
2738 static ssize_t show_tx_power(struct device *d,
2739 struct device_attribute *attr, char *buf)
2740 {
2741 struct iwl_priv *priv = dev_get_drvdata(d);
2742
2743 if (!iwl_is_ready_rf(priv))
2744 return sprintf(buf, "off\n");
2745 else
2746 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2747 }
2748
2749 static ssize_t store_tx_power(struct device *d,
2750 struct device_attribute *attr,
2751 const char *buf, size_t count)
2752 {
2753 struct iwl_priv *priv = dev_get_drvdata(d);
2754 unsigned long val;
2755 int ret;
2756
2757 ret = strict_strtoul(buf, 10, &val);
2758 if (ret)
2759 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2760 else {
2761 ret = iwl_set_tx_power(priv, val, false);
2762 if (ret)
2763 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2764 ret);
2765 else
2766 ret = count;
2767 }
2768 return ret;
2769 }
2770
2771 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2772
2773 static ssize_t show_flags(struct device *d,
2774 struct device_attribute *attr, char *buf)
2775 {
2776 struct iwl_priv *priv = dev_get_drvdata(d);
2777
2778 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2779 }
2780
2781 static ssize_t store_flags(struct device *d,
2782 struct device_attribute *attr,
2783 const char *buf, size_t count)
2784 {
2785 struct iwl_priv *priv = dev_get_drvdata(d);
2786 unsigned long val;
2787 u32 flags;
2788 int ret = strict_strtoul(buf, 0, &val);
2789 if (ret)
2790 return ret;
2791 flags = (u32)val;
2792
2793 mutex_lock(&priv->mutex);
2794 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2795 /* Cancel any currently running scans... */
2796 if (iwl_scan_cancel_timeout(priv, 100))
2797 IWL_WARN(priv, "Could not cancel scan.\n");
2798 else {
2799 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2800 priv->staging_rxon.flags = cpu_to_le32(flags);
2801 iwlcore_commit_rxon(priv);
2802 }
2803 }
2804 mutex_unlock(&priv->mutex);
2805
2806 return count;
2807 }
2808
2809 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2810
2811 static ssize_t show_filter_flags(struct device *d,
2812 struct device_attribute *attr, char *buf)
2813 {
2814 struct iwl_priv *priv = dev_get_drvdata(d);
2815
2816 return sprintf(buf, "0x%04X\n",
2817 le32_to_cpu(priv->active_rxon.filter_flags));
2818 }
2819
2820 static ssize_t store_filter_flags(struct device *d,
2821 struct device_attribute *attr,
2822 const char *buf, size_t count)
2823 {
2824 struct iwl_priv *priv = dev_get_drvdata(d);
2825 unsigned long val;
2826 u32 filter_flags;
2827 int ret = strict_strtoul(buf, 0, &val);
2828 if (ret)
2829 return ret;
2830 filter_flags = (u32)val;
2831
2832 mutex_lock(&priv->mutex);
2833 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2834 /* Cancel any currently running scans... */
2835 if (iwl_scan_cancel_timeout(priv, 100))
2836 IWL_WARN(priv, "Could not cancel scan.\n");
2837 else {
2838 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2839 "0x%04X\n", filter_flags);
2840 priv->staging_rxon.filter_flags =
2841 cpu_to_le32(filter_flags);
2842 iwlcore_commit_rxon(priv);
2843 }
2844 }
2845 mutex_unlock(&priv->mutex);
2846
2847 return count;
2848 }
2849
2850 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2851 store_filter_flags);
2852
2853
2854 static ssize_t show_statistics(struct device *d,
2855 struct device_attribute *attr, char *buf)
2856 {
2857 struct iwl_priv *priv = dev_get_drvdata(d);
2858 u32 size = sizeof(struct iwl_notif_statistics);
2859 u32 len = 0, ofs = 0;
2860 u8 *data = (u8 *)&priv->statistics;
2861 int rc = 0;
2862
2863 if (!iwl_is_alive(priv))
2864 return -EAGAIN;
2865
2866 mutex_lock(&priv->mutex);
2867 rc = iwl_send_statistics_request(priv, 0);
2868 mutex_unlock(&priv->mutex);
2869
2870 if (rc) {
2871 len = sprintf(buf,
2872 "Error sending statistics request: 0x%08X\n", rc);
2873 return len;
2874 }
2875
2876 while (size && (PAGE_SIZE - len)) {
2877 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2878 PAGE_SIZE - len, 1);
2879 len = strlen(buf);
2880 if (PAGE_SIZE - len)
2881 buf[len++] = '\n';
2882
2883 ofs += 16;
2884 size -= min(size, 16U);
2885 }
2886
2887 return len;
2888 }
2889
2890 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2891
2892 static ssize_t show_rts_ht_protection(struct device *d,
2893 struct device_attribute *attr, char *buf)
2894 {
2895 struct iwl_priv *priv = dev_get_drvdata(d);
2896
2897 return sprintf(buf, "%s\n",
2898 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2899 }
2900
2901 static ssize_t store_rts_ht_protection(struct device *d,
2902 struct device_attribute *attr,
2903 const char *buf, size_t count)
2904 {
2905 struct iwl_priv *priv = dev_get_drvdata(d);
2906 unsigned long val;
2907 int ret;
2908
2909 ret = strict_strtoul(buf, 10, &val);
2910 if (ret)
2911 IWL_INFO(priv, "Input is not in decimal form.\n");
2912 else {
2913 if (!iwl_is_associated(priv))
2914 priv->cfg->use_rts_for_ht = val ? true : false;
2915 else
2916 IWL_ERR(priv, "Sta associated with AP - "
2917 "Change protection mechanism is not allowed\n");
2918 ret = count;
2919 }
2920 return ret;
2921 }
2922
2923 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2924 show_rts_ht_protection, store_rts_ht_protection);
2925
2926
2927 /*****************************************************************************
2928 *
2929 * driver setup and teardown
2930 *
2931 *****************************************************************************/
2932
2933 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2934 {
2935 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2936
2937 init_waitqueue_head(&priv->wait_command_queue);
2938
2939 INIT_WORK(&priv->up, iwl_bg_up);
2940 INIT_WORK(&priv->restart, iwl_bg_restart);
2941 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2942 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2943 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2944 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2945 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2946
2947 iwl_setup_scan_deferred_work(priv);
2948
2949 if (priv->cfg->ops->lib->setup_deferred_work)
2950 priv->cfg->ops->lib->setup_deferred_work(priv);
2951
2952 init_timer(&priv->statistics_periodic);
2953 priv->statistics_periodic.data = (unsigned long)priv;
2954 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2955
2956 if (!priv->cfg->use_isr_legacy)
2957 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2958 iwl_irq_tasklet, (unsigned long)priv);
2959 else
2960 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2961 iwl_irq_tasklet_legacy, (unsigned long)priv);
2962 }
2963
2964 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2965 {
2966 if (priv->cfg->ops->lib->cancel_deferred_work)
2967 priv->cfg->ops->lib->cancel_deferred_work(priv);
2968
2969 cancel_delayed_work_sync(&priv->init_alive_start);
2970 cancel_delayed_work(&priv->scan_check);
2971 cancel_delayed_work(&priv->alive_start);
2972 cancel_work_sync(&priv->beacon_update);
2973 del_timer_sync(&priv->statistics_periodic);
2974 }
2975
2976 static struct attribute *iwl_sysfs_entries[] = {
2977 &dev_attr_flags.attr,
2978 &dev_attr_filter_flags.attr,
2979 &dev_attr_statistics.attr,
2980 &dev_attr_temperature.attr,
2981 &dev_attr_tx_power.attr,
2982 &dev_attr_rts_ht_protection.attr,
2983 #ifdef CONFIG_IWLWIFI_DEBUG
2984 &dev_attr_debug_level.attr,
2985 #endif
2986 NULL
2987 };
2988
2989 static struct attribute_group iwl_attribute_group = {
2990 .name = NULL, /* put in device directory */
2991 .attrs = iwl_sysfs_entries,
2992 };
2993
2994 static struct ieee80211_ops iwl_hw_ops = {
2995 .tx = iwl_mac_tx,
2996 .start = iwl_mac_start,
2997 .stop = iwl_mac_stop,
2998 .add_interface = iwl_mac_add_interface,
2999 .remove_interface = iwl_mac_remove_interface,
3000 .config = iwl_mac_config,
3001 .configure_filter = iwl_configure_filter,
3002 .set_key = iwl_mac_set_key,
3003 .update_tkip_key = iwl_mac_update_tkip_key,
3004 .get_stats = iwl_mac_get_stats,
3005 .get_tx_stats = iwl_mac_get_tx_stats,
3006 .conf_tx = iwl_mac_conf_tx,
3007 .reset_tsf = iwl_mac_reset_tsf,
3008 .bss_info_changed = iwl_bss_info_changed,
3009 .ampdu_action = iwl_mac_ampdu_action,
3010 .hw_scan = iwl_mac_hw_scan
3011 };
3012
3013 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3014 {
3015 int err = 0;
3016 struct iwl_priv *priv;
3017 struct ieee80211_hw *hw;
3018 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3019 unsigned long flags;
3020 u16 pci_cmd;
3021
3022 /************************
3023 * 1. Allocating HW data
3024 ************************/
3025
3026 /* Disabling hardware scan means that mac80211 will perform scans
3027 * "the hard way", rather than using device's scan. */
3028 if (cfg->mod_params->disable_hw_scan) {
3029 if (iwl_debug_level & IWL_DL_INFO)
3030 dev_printk(KERN_DEBUG, &(pdev->dev),
3031 "Disabling hw_scan\n");
3032 iwl_hw_ops.hw_scan = NULL;
3033 }
3034
3035 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3036 if (!hw) {
3037 err = -ENOMEM;
3038 goto out;
3039 }
3040 priv = hw->priv;
3041 /* At this point both hw and priv are allocated. */
3042
3043 SET_IEEE80211_DEV(hw, &pdev->dev);
3044
3045 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3046 priv->cfg = cfg;
3047 priv->pci_dev = pdev;
3048 priv->inta_mask = CSR_INI_SET_MASK;
3049
3050 #ifdef CONFIG_IWLWIFI_DEBUG
3051 atomic_set(&priv->restrict_refcnt, 0);
3052 #endif
3053 if (iwl_alloc_traffic_mem(priv))
3054 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3055
3056 /**************************
3057 * 2. Initializing PCI bus
3058 **************************/
3059 if (pci_enable_device(pdev)) {
3060 err = -ENODEV;
3061 goto out_ieee80211_free_hw;
3062 }
3063
3064 pci_set_master(pdev);
3065
3066 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3067 if (!err)
3068 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3069 if (err) {
3070 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3071 if (!err)
3072 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3073 /* both attempts failed: */
3074 if (err) {
3075 IWL_WARN(priv, "No suitable DMA available.\n");
3076 goto out_pci_disable_device;
3077 }
3078 }
3079
3080 err = pci_request_regions(pdev, DRV_NAME);
3081 if (err)
3082 goto out_pci_disable_device;
3083
3084 pci_set_drvdata(pdev, priv);
3085
3086
3087 /***********************
3088 * 3. Read REV register
3089 ***********************/
3090 priv->hw_base = pci_iomap(pdev, 0, 0);
3091 if (!priv->hw_base) {
3092 err = -ENODEV;
3093 goto out_pci_release_regions;
3094 }
3095
3096 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3097 (unsigned long long) pci_resource_len(pdev, 0));
3098 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3099
3100 /* this spin lock will be used in apm_ops.init and EEPROM access
3101 * we should init now
3102 */
3103 spin_lock_init(&priv->reg_lock);
3104 iwl_hw_detect(priv);
3105 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3106 priv->cfg->name, priv->hw_rev);
3107
3108 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3109 * PCI Tx retries from interfering with C3 CPU state */
3110 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3111
3112 iwl_prepare_card_hw(priv);
3113 if (!priv->hw_ready) {
3114 IWL_WARN(priv, "Failed, HW not ready\n");
3115 goto out_iounmap;
3116 }
3117
3118 /*****************
3119 * 4. Read EEPROM
3120 *****************/
3121 /* Read the EEPROM */
3122 err = iwl_eeprom_init(priv);
3123 if (err) {
3124 IWL_ERR(priv, "Unable to init EEPROM\n");
3125 goto out_iounmap;
3126 }
3127 err = iwl_eeprom_check_version(priv);
3128 if (err)
3129 goto out_free_eeprom;
3130
3131 /* extract MAC Address */
3132 iwl_eeprom_get_mac(priv, priv->mac_addr);
3133 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3134 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3135
3136 /************************
3137 * 5. Setup HW constants
3138 ************************/
3139 if (iwl_set_hw_params(priv)) {
3140 IWL_ERR(priv, "failed to set hw parameters\n");
3141 goto out_free_eeprom;
3142 }
3143
3144 /*******************
3145 * 6. Setup priv
3146 *******************/
3147
3148 err = iwl_init_drv(priv);
3149 if (err)
3150 goto out_free_eeprom;
3151 /* At this point both hw and priv are initialized. */
3152
3153 /********************
3154 * 7. Setup services
3155 ********************/
3156 spin_lock_irqsave(&priv->lock, flags);
3157 iwl_disable_interrupts(priv);
3158 spin_unlock_irqrestore(&priv->lock, flags);
3159
3160 pci_enable_msi(priv->pci_dev);
3161
3162 iwl_alloc_isr_ict(priv);
3163 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3164 IRQF_SHARED, DRV_NAME, priv);
3165 if (err) {
3166 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3167 goto out_disable_msi;
3168 }
3169 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3170 if (err) {
3171 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3172 goto out_free_irq;
3173 }
3174
3175 iwl_setup_deferred_work(priv);
3176 iwl_setup_rx_handlers(priv);
3177
3178 /**********************************
3179 * 8. Setup and register mac80211
3180 **********************************/
3181
3182 /* enable interrupts if needed: hw bug w/a */
3183 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3184 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3185 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3186 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3187 }
3188
3189 iwl_enable_interrupts(priv);
3190
3191 err = iwl_setup_mac(priv);
3192 if (err)
3193 goto out_remove_sysfs;
3194
3195 err = iwl_dbgfs_register(priv, DRV_NAME);
3196 if (err)
3197 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3198
3199 /* If platform's RF_KILL switch is NOT set to KILL */
3200 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3201 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3202 else
3203 set_bit(STATUS_RF_KILL_HW, &priv->status);
3204
3205 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3206 test_bit(STATUS_RF_KILL_HW, &priv->status));
3207
3208 iwl_power_initialize(priv);
3209 iwl_tt_initialize(priv);
3210 return 0;
3211
3212 out_remove_sysfs:
3213 destroy_workqueue(priv->workqueue);
3214 priv->workqueue = NULL;
3215 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3216 out_free_irq:
3217 free_irq(priv->pci_dev->irq, priv);
3218 iwl_free_isr_ict(priv);
3219 out_disable_msi:
3220 pci_disable_msi(priv->pci_dev);
3221 iwl_uninit_drv(priv);
3222 out_free_eeprom:
3223 iwl_eeprom_free(priv);
3224 out_iounmap:
3225 pci_iounmap(pdev, priv->hw_base);
3226 out_pci_release_regions:
3227 pci_set_drvdata(pdev, NULL);
3228 pci_release_regions(pdev);
3229 out_pci_disable_device:
3230 pci_disable_device(pdev);
3231 out_ieee80211_free_hw:
3232 iwl_free_traffic_mem(priv);
3233 ieee80211_free_hw(priv->hw);
3234 out:
3235 return err;
3236 }
3237
3238 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3239 {
3240 struct iwl_priv *priv = pci_get_drvdata(pdev);
3241 unsigned long flags;
3242
3243 if (!priv)
3244 return;
3245
3246 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3247
3248 iwl_dbgfs_unregister(priv);
3249 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3250
3251 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3252 * to be called and iwl_down since we are removing the device
3253 * we need to set STATUS_EXIT_PENDING bit.
3254 */
3255 set_bit(STATUS_EXIT_PENDING, &priv->status);
3256 if (priv->mac80211_registered) {
3257 ieee80211_unregister_hw(priv->hw);
3258 priv->mac80211_registered = 0;
3259 } else {
3260 iwl_down(priv);
3261 }
3262
3263 /*
3264 * Make sure device is reset to low power before unloading driver.
3265 * This may be redundant with iwl_down(), but there are paths to
3266 * run iwl_down() without calling apm_ops.stop(), and there are
3267 * paths to avoid running iwl_down() at all before leaving driver.
3268 * This (inexpensive) call *makes sure* device is reset.
3269 */
3270 priv->cfg->ops->lib->apm_ops.stop(priv);
3271
3272 iwl_tt_exit(priv);
3273
3274 /* make sure we flush any pending irq or
3275 * tasklet for the driver
3276 */
3277 spin_lock_irqsave(&priv->lock, flags);
3278 iwl_disable_interrupts(priv);
3279 spin_unlock_irqrestore(&priv->lock, flags);
3280
3281 iwl_synchronize_irq(priv);
3282
3283 iwl_dealloc_ucode_pci(priv);
3284
3285 if (priv->rxq.bd)
3286 iwl_rx_queue_free(priv, &priv->rxq);
3287 iwl_hw_txq_ctx_free(priv);
3288
3289 iwl_clear_stations_table(priv);
3290 iwl_eeprom_free(priv);
3291
3292
3293 /*netif_stop_queue(dev); */
3294 flush_workqueue(priv->workqueue);
3295
3296 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3297 * priv->workqueue... so we can't take down the workqueue
3298 * until now... */
3299 destroy_workqueue(priv->workqueue);
3300 priv->workqueue = NULL;
3301 iwl_free_traffic_mem(priv);
3302
3303 free_irq(priv->pci_dev->irq, priv);
3304 pci_disable_msi(priv->pci_dev);
3305 pci_iounmap(pdev, priv->hw_base);
3306 pci_release_regions(pdev);
3307 pci_disable_device(pdev);
3308 pci_set_drvdata(pdev, NULL);
3309
3310 iwl_uninit_drv(priv);
3311
3312 iwl_free_isr_ict(priv);
3313
3314 if (priv->ibss_beacon)
3315 dev_kfree_skb(priv->ibss_beacon);
3316
3317 ieee80211_free_hw(priv->hw);
3318 }
3319
3320
3321 /*****************************************************************************
3322 *
3323 * driver and module entry point
3324 *
3325 *****************************************************************************/
3326
3327 /* Hardware specific file defines the PCI IDs table for that hardware module */
3328 static struct pci_device_id iwl_hw_card_ids[] = {
3329 #ifdef CONFIG_IWL4965
3330 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3331 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3332 #endif /* CONFIG_IWL4965 */
3333 #ifdef CONFIG_IWL5000
3334 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3335 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3336 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3337 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3338 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3339 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3340 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3341 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3342 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3343 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3344 /* 5350 WiFi/WiMax */
3345 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3346 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3347 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3348 /* 5150 Wifi/WiMax */
3349 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3350 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3351
3352 /* 6x00 Series */
3353 {IWL_PCI_DEVICE(0x008D, 0x1301, iwl6000h_2agn_cfg)},
3354 {IWL_PCI_DEVICE(0x008D, 0x1321, iwl6000h_2agn_cfg)},
3355 {IWL_PCI_DEVICE(0x008D, 0x1326, iwl6000h_2abg_cfg)},
3356 {IWL_PCI_DEVICE(0x008D, 0x1306, iwl6000h_2abg_cfg)},
3357 {IWL_PCI_DEVICE(0x008D, 0x1307, iwl6000h_2bg_cfg)},
3358 {IWL_PCI_DEVICE(0x008E, 0x1311, iwl6000h_2agn_cfg)},
3359 {IWL_PCI_DEVICE(0x008E, 0x1316, iwl6000h_2abg_cfg)},
3360
3361 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3362 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3363 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3364 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3365 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3366 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3367 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3368 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3369 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3370 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3371
3372 /* 6x50 WiFi/WiMax Series */
3373 {IWL_PCI_DEVICE(0x0086, 0x1101, iwl6050_3agn_cfg)},
3374 {IWL_PCI_DEVICE(0x0086, 0x1121, iwl6050_3agn_cfg)},
3375 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3376 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3377 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3378 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3379 {IWL_PCI_DEVICE(0x0088, 0x1111, iwl6050_3agn_cfg)},
3380 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3381 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3382
3383 /* 1000 Series WiFi */
3384 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3385 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3386 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3387 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3388 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3389 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3390 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3391 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3392 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3393 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3394 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3395 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3396 #endif /* CONFIG_IWL5000 */
3397
3398 {0}
3399 };
3400 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3401
3402 static struct pci_driver iwl_driver = {
3403 .name = DRV_NAME,
3404 .id_table = iwl_hw_card_ids,
3405 .probe = iwl_pci_probe,
3406 .remove = __devexit_p(iwl_pci_remove),
3407 #ifdef CONFIG_PM
3408 .suspend = iwl_pci_suspend,
3409 .resume = iwl_pci_resume,
3410 #endif
3411 };
3412
3413 static int __init iwl_init(void)
3414 {
3415
3416 int ret;
3417 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3418 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3419
3420 ret = iwlagn_rate_control_register();
3421 if (ret) {
3422 printk(KERN_ERR DRV_NAME
3423 "Unable to register rate control algorithm: %d\n", ret);
3424 return ret;
3425 }
3426
3427 ret = pci_register_driver(&iwl_driver);
3428 if (ret) {
3429 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3430 goto error_register;
3431 }
3432
3433 return ret;
3434
3435 error_register:
3436 iwlagn_rate_control_unregister();
3437 return ret;
3438 }
3439
3440 static void __exit iwl_exit(void)
3441 {
3442 pci_unregister_driver(&iwl_driver);
3443 iwlagn_rate_control_unregister();
3444 }
3445
3446 module_exit(iwl_exit);
3447 module_init(iwl_init);
3448
3449 #ifdef CONFIG_IWLWIFI_DEBUG
3450 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3451 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3452 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3453 MODULE_PARM_DESC(debug, "debug output mask");
3454 #endif
3455
Linux kernel - Deliverables
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