iwlwifi: update Copyright
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-commands.h
1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63 /*
64 * Please use this file (iwl-commands.h) only for uCode API definitions.
65 * Please use iwl-xxxx-hw.h for hardware-related definitions.
66 * Please use iwl-dev.h for driver implementation definitions.
67 */
68
69 #ifndef __iwl_commands_h__
70 #define __iwl_commands_h__
71
72 #include <linux/etherdevice.h>
73 #include <linux/ieee80211.h>
74
75 struct iwl_priv;
76
77 /* uCode version contains 4 values: Major/Minor/API/Serial */
78 #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
79 #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
80 #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
81 #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
82
83
84 /* Tx rates */
85 #define IWL_CCK_RATES 4
86 #define IWL_OFDM_RATES 8
87 #define IWL_MAX_RATES (IWL_CCK_RATES + IWL_OFDM_RATES)
88
89 enum {
90 REPLY_ALIVE = 0x1,
91 REPLY_ERROR = 0x2,
92 REPLY_ECHO = 0x3, /* test command */
93
94 /* RXON and QOS commands */
95 REPLY_RXON = 0x10,
96 REPLY_RXON_ASSOC = 0x11,
97 REPLY_QOS_PARAM = 0x13,
98 REPLY_RXON_TIMING = 0x14,
99
100 /* Multi-Station support */
101 REPLY_ADD_STA = 0x18,
102 REPLY_REMOVE_STA = 0x19,
103 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
104 REPLY_TXFIFO_FLUSH = 0x1e,
105
106 /* Security */
107 REPLY_WEPKEY = 0x20,
108
109 /* RX, TX, LEDs */
110 REPLY_TX = 0x1c,
111 REPLY_LEDS_CMD = 0x48,
112 REPLY_TX_LINK_QUALITY_CMD = 0x4e,
113
114 /* WiMAX coexistence */
115 COEX_PRIORITY_TABLE_CMD = 0x5a,
116 COEX_MEDIUM_NOTIFICATION = 0x5b,
117 COEX_EVENT_CMD = 0x5c,
118
119 /* Calibration */
120 TEMPERATURE_NOTIFICATION = 0x62,
121 CALIBRATION_CFG_CMD = 0x65,
122 CALIBRATION_RES_NOTIFICATION = 0x66,
123 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
124
125 /* 802.11h related */
126 REPLY_QUIET_CMD = 0x71, /* not used */
127 REPLY_CHANNEL_SWITCH = 0x72,
128 CHANNEL_SWITCH_NOTIFICATION = 0x73,
129 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
130 SPECTRUM_MEASURE_NOTIFICATION = 0x75,
131
132 /* Power Management */
133 POWER_TABLE_CMD = 0x77,
134 PM_SLEEP_NOTIFICATION = 0x7A,
135 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
136
137 /* Scan commands and notifications */
138 REPLY_SCAN_CMD = 0x80,
139 REPLY_SCAN_ABORT_CMD = 0x81,
140 SCAN_START_NOTIFICATION = 0x82,
141 SCAN_RESULTS_NOTIFICATION = 0x83,
142 SCAN_COMPLETE_NOTIFICATION = 0x84,
143
144 /* IBSS/AP commands */
145 BEACON_NOTIFICATION = 0x90,
146 REPLY_TX_BEACON = 0x91,
147 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
148
149 /* Miscellaneous commands */
150 REPLY_TX_POWER_DBM_CMD = 0x95,
151 QUIET_NOTIFICATION = 0x96, /* not used */
152 REPLY_TX_PWR_TABLE_CMD = 0x97,
153 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
154 TX_ANT_CONFIGURATION_CMD = 0x98,
155 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
156
157 /* Bluetooth device coexistence config command */
158 REPLY_BT_CONFIG = 0x9b,
159
160 /* Statistics */
161 REPLY_STATISTICS_CMD = 0x9c,
162 STATISTICS_NOTIFICATION = 0x9d,
163
164 /* RF-KILL commands and notifications */
165 REPLY_CARD_STATE_CMD = 0xa0,
166 CARD_STATE_NOTIFICATION = 0xa1,
167
168 /* Missed beacons notification */
169 MISSED_BEACONS_NOTIFICATION = 0xa2,
170
171 REPLY_CT_KILL_CONFIG_CMD = 0xa4,
172 SENSITIVITY_CMD = 0xa8,
173 REPLY_PHY_CALIBRATION_CMD = 0xb0,
174 REPLY_RX_PHY_CMD = 0xc0,
175 REPLY_RX_MPDU_CMD = 0xc1,
176 REPLY_RX = 0xc3,
177 REPLY_COMPRESSED_BA = 0xc5,
178
179 /* BT Coex */
180 REPLY_BT_COEX_PRIO_TABLE = 0xcc,
181 REPLY_BT_COEX_PROT_ENV = 0xcd,
182 REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
183
184 /* PAN commands */
185 REPLY_WIPAN_PARAMS = 0xb2,
186 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */
187 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
188 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */
189 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */
190 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */
191 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
192 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
193 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
194
195 REPLY_WOWLAN_PATTERNS = 0xe0,
196 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1,
197 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2,
198 REPLY_WOWLAN_TKIP_PARAMS = 0xe3,
199 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4,
200 REPLY_WOWLAN_GET_STATUS = 0xe5,
201 REPLY_D3_CONFIG = 0xd3,
202
203 REPLY_MAX = 0xff
204 };
205
206 /******************************************************************************
207 * (0)
208 * Commonly used structures and definitions:
209 * Command header, rate_n_flags, txpower
210 *
211 *****************************************************************************/
212
213 /* iwl_cmd_header flags value */
214 #define IWL_CMD_FAILED_MSK 0x40
215
216 #define SEQ_TO_QUEUE(s) (((s) >> 8) & 0x1f)
217 #define QUEUE_TO_SEQ(q) (((q) & 0x1f) << 8)
218 #define SEQ_TO_INDEX(s) ((s) & 0xff)
219 #define INDEX_TO_SEQ(i) ((i) & 0xff)
220 #define SEQ_RX_FRAME cpu_to_le16(0x8000)
221
222 /**
223 * struct iwl_cmd_header
224 *
225 * This header format appears in the beginning of each command sent from the
226 * driver, and each response/notification received from uCode.
227 */
228 struct iwl_cmd_header {
229 u8 cmd; /* Command ID: REPLY_RXON, etc. */
230 u8 flags; /* 0:5 reserved, 6 abort, 7 internal */
231 /*
232 * The driver sets up the sequence number to values of its choosing.
233 * uCode does not use this value, but passes it back to the driver
234 * when sending the response to each driver-originated command, so
235 * the driver can match the response to the command. Since the values
236 * don't get used by uCode, the driver may set up an arbitrary format.
237 *
238 * There is one exception: uCode sets bit 15 when it originates
239 * the response/notification, i.e. when the response/notification
240 * is not a direct response to a command sent by the driver. For
241 * example, uCode issues REPLY_RX when it sends a received frame
242 * to the driver; it is not a direct response to any driver command.
243 *
244 * The Linux driver uses the following format:
245 *
246 * 0:7 tfd index - position within TX queue
247 * 8:12 TX queue id
248 * 13:14 reserved
249 * 15 unsolicited RX or uCode-originated notification
250 */
251 __le16 sequence;
252
253 /* command or response/notification data follows immediately */
254 u8 data[0];
255 } __packed;
256
257
258 /**
259 * iwlagn rate_n_flags bit fields
260 *
261 * rate_n_flags format is used in following iwlagn commands:
262 * REPLY_RX (response only)
263 * REPLY_RX_MPDU (response only)
264 * REPLY_TX (both command and response)
265 * REPLY_TX_LINK_QUALITY_CMD
266 *
267 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
268 * 2-0: 0) 6 Mbps
269 * 1) 12 Mbps
270 * 2) 18 Mbps
271 * 3) 24 Mbps
272 * 4) 36 Mbps
273 * 5) 48 Mbps
274 * 6) 54 Mbps
275 * 7) 60 Mbps
276 *
277 * 4-3: 0) Single stream (SISO)
278 * 1) Dual stream (MIMO)
279 * 2) Triple stream (MIMO)
280 *
281 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
282 *
283 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
284 * 3-0: 0xD) 6 Mbps
285 * 0xF) 9 Mbps
286 * 0x5) 12 Mbps
287 * 0x7) 18 Mbps
288 * 0x9) 24 Mbps
289 * 0xB) 36 Mbps
290 * 0x1) 48 Mbps
291 * 0x3) 54 Mbps
292 *
293 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
294 * 6-0: 10) 1 Mbps
295 * 20) 2 Mbps
296 * 55) 5.5 Mbps
297 * 110) 11 Mbps
298 */
299 #define RATE_MCS_CODE_MSK 0x7
300 #define RATE_MCS_SPATIAL_POS 3
301 #define RATE_MCS_SPATIAL_MSK 0x18
302 #define RATE_MCS_HT_DUP_POS 5
303 #define RATE_MCS_HT_DUP_MSK 0x20
304 /* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
305 #define RATE_MCS_RATE_MSK 0xff
306
307 /* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
308 #define RATE_MCS_FLAGS_POS 8
309 #define RATE_MCS_HT_POS 8
310 #define RATE_MCS_HT_MSK 0x100
311
312 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
313 #define RATE_MCS_CCK_POS 9
314 #define RATE_MCS_CCK_MSK 0x200
315
316 /* Bit 10: (1) Use Green Field preamble */
317 #define RATE_MCS_GF_POS 10
318 #define RATE_MCS_GF_MSK 0x400
319
320 /* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
321 #define RATE_MCS_HT40_POS 11
322 #define RATE_MCS_HT40_MSK 0x800
323
324 /* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
325 #define RATE_MCS_DUP_POS 12
326 #define RATE_MCS_DUP_MSK 0x1000
327
328 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
329 #define RATE_MCS_SGI_POS 13
330 #define RATE_MCS_SGI_MSK 0x2000
331
332 /**
333 * rate_n_flags Tx antenna masks
334 * 4965 has 2 transmitters
335 * 5100 has 1 transmitter B
336 * 5150 has 1 transmitter A
337 * 5300 has 3 transmitters
338 * 5350 has 3 transmitters
339 * bit14:16
340 */
341 #define RATE_MCS_ANT_POS 14
342 #define RATE_MCS_ANT_A_MSK 0x04000
343 #define RATE_MCS_ANT_B_MSK 0x08000
344 #define RATE_MCS_ANT_C_MSK 0x10000
345 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
346 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
347 #define RATE_ANT_NUM 3
348
349 #define POWER_TABLE_NUM_ENTRIES 33
350 #define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
351 #define POWER_TABLE_CCK_ENTRY 32
352
353 #define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
354 #define IWL_PWR_CCK_ENTRIES 2
355
356 /**
357 * struct tx_power_dual_stream
358 *
359 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
360 *
361 * Same format as iwl_tx_power_dual_stream, but __le32
362 */
363 struct tx_power_dual_stream {
364 __le32 dw;
365 } __packed;
366
367 /**
368 * Command REPLY_TX_POWER_DBM_CMD = 0x98
369 * struct iwlagn_tx_power_dbm_cmd
370 */
371 #define IWLAGN_TX_POWER_AUTO 0x7f
372 #define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
373
374 struct iwlagn_tx_power_dbm_cmd {
375 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
376 u8 flags;
377 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
378 u8 reserved;
379 } __packed;
380
381 /**
382 * Command TX_ANT_CONFIGURATION_CMD = 0x98
383 * This command is used to configure valid Tx antenna.
384 * By default uCode concludes the valid antenna according to the radio flavor.
385 * This command enables the driver to override/modify this conclusion.
386 */
387 struct iwl_tx_ant_config_cmd {
388 __le32 valid;
389 } __packed;
390
391 /******************************************************************************
392 * (0a)
393 * Alive and Error Commands & Responses:
394 *
395 *****************************************************************************/
396
397 #define UCODE_VALID_OK cpu_to_le32(0x1)
398
399 /**
400 * REPLY_ALIVE = 0x1 (response only, not a command)
401 *
402 * uCode issues this "alive" notification once the runtime image is ready
403 * to receive commands from the driver. This is the *second* "alive"
404 * notification that the driver will receive after rebooting uCode;
405 * this "alive" is indicated by subtype field != 9.
406 *
407 * See comments documenting "BSM" (bootstrap state machine).
408 *
409 * This response includes two pointers to structures within the device's
410 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
411 *
412 * 1) log_event_table_ptr indicates base of the event log. This traces
413 * a 256-entry history of uCode execution within a circular buffer.
414 * Its header format is:
415 *
416 * __le32 log_size; log capacity (in number of entries)
417 * __le32 type; (1) timestamp with each entry, (0) no timestamp
418 * __le32 wraps; # times uCode has wrapped to top of circular buffer
419 * __le32 write_index; next circular buffer entry that uCode would fill
420 *
421 * The header is followed by the circular buffer of log entries. Entries
422 * with timestamps have the following format:
423 *
424 * __le32 event_id; range 0 - 1500
425 * __le32 timestamp; low 32 bits of TSF (of network, if associated)
426 * __le32 data; event_id-specific data value
427 *
428 * Entries without timestamps contain only event_id and data.
429 *
430 *
431 * 2) error_event_table_ptr indicates base of the error log. This contains
432 * information about any uCode error that occurs. For agn, the format
433 * of the error log is defined by struct iwl_error_event_table.
434 *
435 * The Linux driver can print both logs to the system log when a uCode error
436 * occurs.
437 */
438
439 /*
440 * Note: This structure is read from the device with IO accesses,
441 * and the reading already does the endian conversion. As it is
442 * read with u32-sized accesses, any members with a different size
443 * need to be ordered correctly though!
444 */
445 struct iwl_error_event_table {
446 u32 valid; /* (nonzero) valid, (0) log is empty */
447 u32 error_id; /* type of error */
448 u32 pc; /* program counter */
449 u32 blink1; /* branch link */
450 u32 blink2; /* branch link */
451 u32 ilink1; /* interrupt link */
452 u32 ilink2; /* interrupt link */
453 u32 data1; /* error-specific data */
454 u32 data2; /* error-specific data */
455 u32 line; /* source code line of error */
456 u32 bcon_time; /* beacon timer */
457 u32 tsf_low; /* network timestamp function timer */
458 u32 tsf_hi; /* network timestamp function timer */
459 u32 gp1; /* GP1 timer register */
460 u32 gp2; /* GP2 timer register */
461 u32 gp3; /* GP3 timer register */
462 u32 ucode_ver; /* uCode version */
463 u32 hw_ver; /* HW Silicon version */
464 u32 brd_ver; /* HW board version */
465 u32 log_pc; /* log program counter */
466 u32 frame_ptr; /* frame pointer */
467 u32 stack_ptr; /* stack pointer */
468 u32 hcmd; /* last host command header */
469 u32 isr0; /* isr status register LMPM_NIC_ISR0:
470 * rxtx_flag */
471 u32 isr1; /* isr status register LMPM_NIC_ISR1:
472 * host_flag */
473 u32 isr2; /* isr status register LMPM_NIC_ISR2:
474 * enc_flag */
475 u32 isr3; /* isr status register LMPM_NIC_ISR3:
476 * time_flag */
477 u32 isr4; /* isr status register LMPM_NIC_ISR4:
478 * wico interrupt */
479 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
480 u32 wait_event; /* wait event() caller address */
481 u32 l2p_control; /* L2pControlField */
482 u32 l2p_duration; /* L2pDurationField */
483 u32 l2p_mhvalid; /* L2pMhValidBits */
484 u32 l2p_addr_match; /* L2pAddrMatchStat */
485 u32 lmpm_pmg_sel; /* indicate which clocks are turned on
486 * (LMPM_PMG_SEL) */
487 u32 u_timestamp; /* indicate when the date and time of the
488 * compilation */
489 u32 flow_handler; /* FH read/write pointers, RX credit */
490 } __packed;
491
492 struct iwl_alive_resp {
493 u8 ucode_minor;
494 u8 ucode_major;
495 __le16 reserved1;
496 u8 sw_rev[8];
497 u8 ver_type;
498 u8 ver_subtype; /* not "9" for runtime alive */
499 __le16 reserved2;
500 __le32 log_event_table_ptr; /* SRAM address for event log */
501 __le32 error_event_table_ptr; /* SRAM address for error log */
502 __le32 timestamp;
503 __le32 is_valid;
504 } __packed;
505
506 /*
507 * REPLY_ERROR = 0x2 (response only, not a command)
508 */
509 struct iwl_error_resp {
510 __le32 error_type;
511 u8 cmd_id;
512 u8 reserved1;
513 __le16 bad_cmd_seq_num;
514 __le32 error_info;
515 __le64 timestamp;
516 } __packed;
517
518 /******************************************************************************
519 * (1)
520 * RXON Commands & Responses:
521 *
522 *****************************************************************************/
523
524 /*
525 * Rx config defines & structure
526 */
527 /* rx_config device types */
528 enum {
529 RXON_DEV_TYPE_AP = 1,
530 RXON_DEV_TYPE_ESS = 3,
531 RXON_DEV_TYPE_IBSS = 4,
532 RXON_DEV_TYPE_SNIFFER = 6,
533 RXON_DEV_TYPE_CP = 7,
534 RXON_DEV_TYPE_2STA = 8,
535 RXON_DEV_TYPE_P2P = 9,
536 };
537
538
539 #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
540 #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0)
541 #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
542 #define RXON_RX_CHAIN_VALID_POS (1)
543 #define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
544 #define RXON_RX_CHAIN_FORCE_SEL_POS (4)
545 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
546 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
547 #define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
548 #define RXON_RX_CHAIN_CNT_POS (10)
549 #define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
550 #define RXON_RX_CHAIN_MIMO_CNT_POS (12)
551 #define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
552 #define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
553
554 /* rx_config flags */
555 /* band & modulation selection */
556 #define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
557 #define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
558 /* auto detection enable */
559 #define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
560 /* TGg protection when tx */
561 #define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
562 /* cck short slot & preamble */
563 #define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
564 #define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
565 /* antenna selection */
566 #define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
567 #define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
568 #define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
569 #define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
570 /* radar detection enable */
571 #define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
572 #define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
573 /* rx response to host with 8-byte TSF
574 * (according to ON_AIR deassertion) */
575 #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
576
577
578 /* HT flags */
579 #define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
580 #define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
581
582 #define RXON_FLG_HT_OPERATING_MODE_POS (23)
583
584 #define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
585 #define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23)
586
587 #define RXON_FLG_CHANNEL_MODE_POS (25)
588 #define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
589
590 /* channel mode */
591 enum {
592 CHANNEL_MODE_LEGACY = 0,
593 CHANNEL_MODE_PURE_40 = 1,
594 CHANNEL_MODE_MIXED = 2,
595 CHANNEL_MODE_RESERVED = 3,
596 };
597 #define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
598 #define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
599 #define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
600
601 /* CTS to self (if spec allows) flag */
602 #define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
603
604 /* rx_config filter flags */
605 /* accept all data frames */
606 #define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
607 /* pass control & management to host */
608 #define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
609 /* accept multi-cast */
610 #define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
611 /* don't decrypt uni-cast frames */
612 #define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
613 /* don't decrypt multi-cast frames */
614 #define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
615 /* STA is associated */
616 #define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
617 /* transfer to host non bssid beacons in associated state */
618 #define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
619
620 /**
621 * REPLY_RXON = 0x10 (command, has simple generic response)
622 *
623 * RXON tunes the radio tuner to a service channel, and sets up a number
624 * of parameters that are used primarily for Rx, but also for Tx operations.
625 *
626 * NOTE: When tuning to a new channel, driver must set the
627 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent
628 * info within the device, including the station tables, tx retry
629 * rate tables, and txpower tables. Driver must build a new station
630 * table and txpower table before transmitting anything on the RXON
631 * channel.
632 *
633 * NOTE: All RXONs wipe clean the internal txpower table. Driver must
634 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
635 * regardless of whether RXON_FILTER_ASSOC_MSK is set.
636 */
637
638 struct iwl_rxon_cmd {
639 u8 node_addr[6];
640 __le16 reserved1;
641 u8 bssid_addr[6];
642 __le16 reserved2;
643 u8 wlap_bssid_addr[6];
644 __le16 reserved3;
645 u8 dev_type;
646 u8 air_propagation;
647 __le16 rx_chain;
648 u8 ofdm_basic_rates;
649 u8 cck_basic_rates;
650 __le16 assoc_id;
651 __le32 flags;
652 __le32 filter_flags;
653 __le16 channel;
654 u8 ofdm_ht_single_stream_basic_rates;
655 u8 ofdm_ht_dual_stream_basic_rates;
656 u8 ofdm_ht_triple_stream_basic_rates;
657 u8 reserved5;
658 __le16 acquisition_data;
659 __le16 reserved6;
660 } __packed;
661
662 /*
663 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
664 */
665 struct iwl_rxon_assoc_cmd {
666 __le32 flags;
667 __le32 filter_flags;
668 u8 ofdm_basic_rates;
669 u8 cck_basic_rates;
670 __le16 reserved1;
671 u8 ofdm_ht_single_stream_basic_rates;
672 u8 ofdm_ht_dual_stream_basic_rates;
673 u8 ofdm_ht_triple_stream_basic_rates;
674 u8 reserved2;
675 __le16 rx_chain_select_flags;
676 __le16 acquisition_data;
677 __le32 reserved3;
678 } __packed;
679
680 #define IWL_CONN_MAX_LISTEN_INTERVAL 10
681 #define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */
682
683 /*
684 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
685 */
686 struct iwl_rxon_time_cmd {
687 __le64 timestamp;
688 __le16 beacon_interval;
689 __le16 atim_window;
690 __le32 beacon_init_val;
691 __le16 listen_interval;
692 u8 dtim_period;
693 u8 delta_cp_bss_tbtts;
694 } __packed;
695
696 /*
697 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
698 */
699 /**
700 * struct iwl5000_channel_switch_cmd
701 * @band: 0- 5.2GHz, 1- 2.4GHz
702 * @expect_beacon: 0- resume transmits after channel switch
703 * 1- wait for beacon to resume transmits
704 * @channel: new channel number
705 * @rxon_flags: Rx on flags
706 * @rxon_filter_flags: filtering parameters
707 * @switch_time: switch time in extended beacon format
708 * @reserved: reserved bytes
709 */
710 struct iwl5000_channel_switch_cmd {
711 u8 band;
712 u8 expect_beacon;
713 __le16 channel;
714 __le32 rxon_flags;
715 __le32 rxon_filter_flags;
716 __le32 switch_time;
717 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
718 } __packed;
719
720 /**
721 * struct iwl6000_channel_switch_cmd
722 * @band: 0- 5.2GHz, 1- 2.4GHz
723 * @expect_beacon: 0- resume transmits after channel switch
724 * 1- wait for beacon to resume transmits
725 * @channel: new channel number
726 * @rxon_flags: Rx on flags
727 * @rxon_filter_flags: filtering parameters
728 * @switch_time: switch time in extended beacon format
729 * @reserved: reserved bytes
730 */
731 struct iwl6000_channel_switch_cmd {
732 u8 band;
733 u8 expect_beacon;
734 __le16 channel;
735 __le32 rxon_flags;
736 __le32 rxon_filter_flags;
737 __le32 switch_time;
738 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
739 } __packed;
740
741 /*
742 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
743 */
744 struct iwl_csa_notification {
745 __le16 band;
746 __le16 channel;
747 __le32 status; /* 0 - OK, 1 - fail */
748 } __packed;
749
750 /******************************************************************************
751 * (2)
752 * Quality-of-Service (QOS) Commands & Responses:
753 *
754 *****************************************************************************/
755
756 /**
757 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
758 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
759 *
760 * @cw_min: Contention window, start value in numbers of slots.
761 * Should be a power-of-2, minus 1. Device's default is 0x0f.
762 * @cw_max: Contention window, max value in numbers of slots.
763 * Should be a power-of-2, minus 1. Device's default is 0x3f.
764 * @aifsn: Number of slots in Arbitration Interframe Space (before
765 * performing random backoff timing prior to Tx). Device default 1.
766 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0.
767 *
768 * Device will automatically increase contention window by (2*CW) + 1 for each
769 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW
770 * value, to cap the CW value.
771 */
772 struct iwl_ac_qos {
773 __le16 cw_min;
774 __le16 cw_max;
775 u8 aifsn;
776 u8 reserved1;
777 __le16 edca_txop;
778 } __packed;
779
780 /* QoS flags defines */
781 #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
782 #define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
783 #define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
784
785 /* Number of Access Categories (AC) (EDCA), queues 0..3 */
786 #define AC_NUM 4
787
788 /*
789 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
790 *
791 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
792 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
793 */
794 struct iwl_qosparam_cmd {
795 __le32 qos_flags;
796 struct iwl_ac_qos ac[AC_NUM];
797 } __packed;
798
799 /******************************************************************************
800 * (3)
801 * Add/Modify Stations Commands & Responses:
802 *
803 *****************************************************************************/
804 /*
805 * Multi station support
806 */
807
808 /* Special, dedicated locations within device's station table */
809 #define IWL_AP_ID 0
810 #define IWL_AP_ID_PAN 1
811 #define IWL_STA_ID 2
812 #define IWLAGN_PAN_BCAST_ID 14
813 #define IWLAGN_BROADCAST_ID 15
814 #define IWLAGN_STATION_COUNT 16
815
816 #define IWL_INVALID_STATION 255
817 #define IWL_MAX_TID_COUNT 8
818
819 #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2)
820 #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8)
821 #define STA_FLG_PAN_STATION cpu_to_le32(1 << 13)
822 #define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
823 #define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
824 #define STA_FLG_MAX_AGG_SIZE_POS (19)
825 #define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
826 #define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21)
827 #define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
828 #define STA_FLG_AGG_MPDU_DENSITY_POS (23)
829 #define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
830
831 /* Use in mode field. 1: modify existing entry, 0: add new station entry */
832 #define STA_CONTROL_MODIFY_MSK 0x01
833
834 /* key flags __le16*/
835 #define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
836 #define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
837 #define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
838 #define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
839 #define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
840
841 #define STA_KEY_FLG_KEYID_POS 8
842 #define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
843 /* wep key is either from global key (0) or from station info array (1) */
844 #define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
845
846 /* wep key in STA: 5-bytes (0) or 13-bytes (1) */
847 #define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
848 #define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
849 #define STA_KEY_MAX_NUM 8
850 #define STA_KEY_MAX_NUM_PAN 16
851 /* must not match WEP_INVALID_OFFSET */
852 #define IWLAGN_HW_KEY_DEFAULT 0xfe
853
854 /* Flags indicate whether to modify vs. don't change various station params */
855 #define STA_MODIFY_KEY_MASK 0x01
856 #define STA_MODIFY_TID_DISABLE_TX 0x02
857 #define STA_MODIFY_TX_RATE_MSK 0x04
858 #define STA_MODIFY_ADDBA_TID_MSK 0x08
859 #define STA_MODIFY_DELBA_TID_MSK 0x10
860 #define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
861
862 /* Receiver address (actually, Rx station's index into station table),
863 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
864 #define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid))
865
866 /* agn */
867 struct iwl_keyinfo {
868 __le16 key_flags;
869 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
870 u8 reserved1;
871 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
872 u8 key_offset;
873 u8 reserved2;
874 u8 key[16]; /* 16-byte unicast decryption key */
875 __le64 tx_secur_seq_cnt;
876 __le64 hw_tkip_mic_rx_key;
877 __le64 hw_tkip_mic_tx_key;
878 } __packed;
879
880 /**
881 * struct sta_id_modify
882 * @addr[ETH_ALEN]: station's MAC address
883 * @sta_id: index of station in uCode's station table
884 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
885 *
886 * Driver selects unused table index when adding new station,
887 * or the index to a pre-existing station entry when modifying that station.
888 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
889 *
890 * modify_mask flags select which parameters to modify vs. leave alone.
891 */
892 struct sta_id_modify {
893 u8 addr[ETH_ALEN];
894 __le16 reserved1;
895 u8 sta_id;
896 u8 modify_mask;
897 __le16 reserved2;
898 } __packed;
899
900 /*
901 * REPLY_ADD_STA = 0x18 (command)
902 *
903 * The device contains an internal table of per-station information,
904 * with info on security keys, aggregation parameters, and Tx rates for
905 * initial Tx attempt and any retries (agn devices uses
906 * REPLY_TX_LINK_QUALITY_CMD,
907 *
908 * REPLY_ADD_STA sets up the table entry for one station, either creating
909 * a new entry, or modifying a pre-existing one.
910 *
911 * NOTE: RXON command (without "associated" bit set) wipes the station table
912 * clean. Moving into RF_KILL state does this also. Driver must set up
913 * new station table before transmitting anything on the RXON channel
914 * (except active scans or active measurements; those commands carry
915 * their own txpower/rate setup data).
916 *
917 * When getting started on a new channel, driver must set up the
918 * IWL_BROADCAST_ID entry (last entry in the table). For a client
919 * station in a BSS, once an AP is selected, driver sets up the AP STA
920 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP
921 * are all that are needed for a BSS client station. If the device is
922 * used as AP, or in an IBSS network, driver must set up station table
923 * entries for all STAs in network, starting with index IWL_STA_ID.
924 */
925
926 struct iwl_addsta_cmd {
927 u8 mode; /* 1: modify existing, 0: add new station */
928 u8 reserved[3];
929 struct sta_id_modify sta;
930 struct iwl_keyinfo key;
931 __le32 station_flags; /* STA_FLG_* */
932 __le32 station_flags_msk; /* STA_FLG_* */
933
934 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
935 * corresponding to bit (e.g. bit 5 controls TID 5).
936 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
937 __le16 tid_disable_tx;
938 __le16 legacy_reserved;
939
940 /* TID for which to add block-ack support.
941 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
942 u8 add_immediate_ba_tid;
943
944 /* TID for which to remove block-ack support.
945 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
946 u8 remove_immediate_ba_tid;
947
948 /* Starting Sequence Number for added block-ack support.
949 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
950 __le16 add_immediate_ba_ssn;
951
952 /*
953 * Number of packets OK to transmit to station even though
954 * it is asleep -- used to synchronise PS-poll and u-APSD
955 * responses while ucode keeps track of STA sleep state.
956 */
957 __le16 sleep_tx_count;
958
959 __le16 reserved2;
960 } __packed;
961
962
963 #define ADD_STA_SUCCESS_MSK 0x1
964 #define ADD_STA_NO_ROOM_IN_TABLE 0x2
965 #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4
966 #define ADD_STA_MODIFY_NON_EXIST_STA 0x8
967 /*
968 * REPLY_ADD_STA = 0x18 (response)
969 */
970 struct iwl_add_sta_resp {
971 u8 status; /* ADD_STA_* */
972 } __packed;
973
974 #define REM_STA_SUCCESS_MSK 0x1
975 /*
976 * REPLY_REM_STA = 0x19 (response)
977 */
978 struct iwl_rem_sta_resp {
979 u8 status;
980 } __packed;
981
982 /*
983 * REPLY_REM_STA = 0x19 (command)
984 */
985 struct iwl_rem_sta_cmd {
986 u8 num_sta; /* number of removed stations */
987 u8 reserved[3];
988 u8 addr[ETH_ALEN]; /* MAC addr of the first station */
989 u8 reserved2[2];
990 } __packed;
991
992
993 /* WiFi queues mask */
994 #define IWL_SCD_BK_MSK cpu_to_le32(BIT(0))
995 #define IWL_SCD_BE_MSK cpu_to_le32(BIT(1))
996 #define IWL_SCD_VI_MSK cpu_to_le32(BIT(2))
997 #define IWL_SCD_VO_MSK cpu_to_le32(BIT(3))
998 #define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3))
999
1000 /* PAN queues mask */
1001 #define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4))
1002 #define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5))
1003 #define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6))
1004 #define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7))
1005 #define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7))
1006 #define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8))
1007
1008 #define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00)
1009
1010 #define IWL_DROP_SINGLE 0
1011 #define IWL_DROP_ALL (BIT(IWL_RXON_CTX_BSS) | BIT(IWL_RXON_CTX_PAN))
1012
1013 /*
1014 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
1015 *
1016 * When using full FIFO flush this command checks the scheduler HW block WR/RD
1017 * pointers to check if all the frames were transferred by DMA into the
1018 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
1019 * empty the command can finish.
1020 * This command is used to flush the TXFIFO from transmit commands, it may
1021 * operate on single or multiple queues, the command queue can't be flushed by
1022 * this command. The command response is returned when all the queue flush
1023 * operations are done. Each TX command flushed return response with the FLUSH
1024 * status set in the TX response status. When FIFO flush operation is used,
1025 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
1026 * are set.
1027 *
1028 * @fifo_control: bit mask for which queues to flush
1029 * @flush_control: flush controls
1030 * 0: Dump single MSDU
1031 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
1032 * 2: Dump all FIFO
1033 */
1034 struct iwl_txfifo_flush_cmd {
1035 __le32 fifo_control;
1036 __le16 flush_control;
1037 __le16 reserved;
1038 } __packed;
1039
1040 /*
1041 * REPLY_WEP_KEY = 0x20
1042 */
1043 struct iwl_wep_key {
1044 u8 key_index;
1045 u8 key_offset;
1046 u8 reserved1[2];
1047 u8 key_size;
1048 u8 reserved2[3];
1049 u8 key[16];
1050 } __packed;
1051
1052 struct iwl_wep_cmd {
1053 u8 num_keys;
1054 u8 global_key_type;
1055 u8 flags;
1056 u8 reserved;
1057 struct iwl_wep_key key[0];
1058 } __packed;
1059
1060 #define WEP_KEY_WEP_TYPE 1
1061 #define WEP_KEYS_MAX 4
1062 #define WEP_INVALID_OFFSET 0xff
1063 #define WEP_KEY_LEN_64 5
1064 #define WEP_KEY_LEN_128 13
1065
1066 /******************************************************************************
1067 * (4)
1068 * Rx Responses:
1069 *
1070 *****************************************************************************/
1071
1072 #define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
1073 #define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
1074
1075 #define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
1076 #define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
1077 #define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
1078 #define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
1079 #define RX_RES_PHY_FLAGS_ANTENNA_MSK 0xf0
1080 #define RX_RES_PHY_FLAGS_ANTENNA_POS 4
1081
1082 #define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
1083 #define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
1084 #define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
1085 #define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
1086 #define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
1087 #define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8)
1088
1089 #define RX_RES_STATUS_STATION_FOUND (1<<6)
1090 #define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7)
1091
1092 #define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
1093 #define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
1094 #define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
1095 #define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
1096 #define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
1097
1098 #define RX_MPDU_RES_STATUS_ICV_OK (0x20)
1099 #define RX_MPDU_RES_STATUS_MIC_OK (0x40)
1100 #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7)
1101 #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1102
1103
1104 #define IWLAGN_RX_RES_PHY_CNT 8
1105 #define IWLAGN_RX_RES_AGC_IDX 1
1106 #define IWLAGN_RX_RES_RSSI_AB_IDX 2
1107 #define IWLAGN_RX_RES_RSSI_C_IDX 3
1108 #define IWLAGN_OFDM_AGC_MSK 0xfe00
1109 #define IWLAGN_OFDM_AGC_BIT_POS 9
1110 #define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1111 #define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1112 #define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1113 #define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1114 #define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1115 #define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1116 #define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1117 #define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1118 #define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1119
1120 struct iwlagn_non_cfg_phy {
1121 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */
1122 } __packed;
1123
1124
1125 /*
1126 * REPLY_RX = 0xc3 (response only, not a command)
1127 * Used only for legacy (non 11n) frames.
1128 */
1129 struct iwl_rx_phy_res {
1130 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
1131 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
1132 u8 stat_id; /* configurable DSP phy data set ID */
1133 u8 reserved1;
1134 __le64 timestamp; /* TSF at on air rise */
1135 __le32 beacon_time_stamp; /* beacon at on-air rise */
1136 __le16 phy_flags; /* general phy flags: band, modulation, ... */
1137 __le16 channel; /* channel number */
1138 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
1139 __le32 rate_n_flags; /* RATE_MCS_* */
1140 __le16 byte_count; /* frame's byte-count */
1141 __le16 frame_time; /* frame's time on the air */
1142 } __packed;
1143
1144 struct iwl_rx_mpdu_res_start {
1145 __le16 byte_count;
1146 __le16 reserved;
1147 } __packed;
1148
1149
1150 /******************************************************************************
1151 * (5)
1152 * Tx Commands & Responses:
1153 *
1154 * Driver must place each REPLY_TX command into one of the prioritized Tx
1155 * queues in host DRAM, shared between driver and device (see comments for
1156 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode
1157 * are preparing to transmit, the device pulls the Tx command over the PCI
1158 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1159 * from which data will be transmitted.
1160 *
1161 * uCode handles all timing and protocol related to control frames
1162 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler
1163 * handle reception of block-acks; uCode updates the host driver via
1164 * REPLY_COMPRESSED_BA.
1165 *
1166 * uCode handles retrying Tx when an ACK is expected but not received.
1167 * This includes trying lower data rates than the one requested in the Tx
1168 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn).
1169 *
1170 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1171 * This command must be executed after every RXON command, before Tx can occur.
1172 *****************************************************************************/
1173
1174 /* REPLY_TX Tx flags field */
1175
1176 /*
1177 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
1178 * before this frame. if CTS-to-self required check
1179 * RXON_FLG_SELF_CTS_EN status.
1180 */
1181 #define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
1182
1183 /* 1: Expect ACK from receiving station
1184 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1185 * Set this for unicast frames, but not broadcast/multicast. */
1186 #define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
1187
1188 /* For agn devices:
1189 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1190 * Tx command's initial_rate_index indicates first rate to try;
1191 * uCode walks through table for additional Tx attempts.
1192 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1193 * This rate will be used for all Tx attempts; it will not be scaled. */
1194 #define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
1195
1196 /* 1: Expect immediate block-ack.
1197 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
1198 #define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
1199
1200 /* Tx antenna selection field; reserved (0) for agn devices. */
1201 #define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1202
1203 /* 1: Ignore Bluetooth priority for this frame.
1204 * 0: Delay Tx until Bluetooth device is done (normal usage). */
1205 #define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
1206
1207 /* 1: uCode overrides sequence control field in MAC header.
1208 * 0: Driver provides sequence control field in MAC header.
1209 * Set this for management frames, non-QOS data frames, non-unicast frames,
1210 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
1211 #define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
1212
1213 /* 1: This frame is non-last MPDU; more fragments are coming.
1214 * 0: Last fragment, or not using fragmentation. */
1215 #define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
1216
1217 /* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1218 * 0: No TSF required in outgoing frame.
1219 * Set this for transmitting beacons and probe responses. */
1220 #define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
1221
1222 /* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1223 * alignment of frame's payload data field.
1224 * 0: No pad
1225 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1226 * field (but not both). Driver must align frame data (i.e. data following
1227 * MAC header) to DWORD boundary. */
1228 #define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
1229
1230 /* accelerate aggregation support
1231 * 0 - no CCMP encryption; 1 - CCMP encryption */
1232 #define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
1233
1234 /* HCCA-AP - disable duration overwriting. */
1235 #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
1236
1237
1238 /*
1239 * TX command security control
1240 */
1241 #define TX_CMD_SEC_WEP 0x01
1242 #define TX_CMD_SEC_CCM 0x02
1243 #define TX_CMD_SEC_TKIP 0x03
1244 #define TX_CMD_SEC_MSK 0x03
1245 #define TX_CMD_SEC_SHIFT 6
1246 #define TX_CMD_SEC_KEY128 0x08
1247
1248 /*
1249 * security overhead sizes
1250 */
1251 #define WEP_IV_LEN 4
1252 #define WEP_ICV_LEN 4
1253 #define CCMP_MIC_LEN 8
1254 #define TKIP_ICV_LEN 4
1255
1256 /*
1257 * REPLY_TX = 0x1c (command)
1258 */
1259
1260 /*
1261 * 4965 uCode updates these Tx attempt count values in host DRAM.
1262 * Used for managing Tx retries when expecting block-acks.
1263 * Driver should set these fields to 0.
1264 */
1265 struct iwl_dram_scratch {
1266 u8 try_cnt; /* Tx attempts */
1267 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */
1268 __le16 reserved;
1269 } __packed;
1270
1271 struct iwl_tx_cmd {
1272 /*
1273 * MPDU byte count:
1274 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1275 * + 8 byte IV for CCM or TKIP (not used for WEP)
1276 * + Data payload
1277 * + 8-byte MIC (not used for CCM/WEP)
1278 * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1279 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1280 * Range: 14-2342 bytes.
1281 */
1282 __le16 len;
1283
1284 /*
1285 * MPDU or MSDU byte count for next frame.
1286 * Used for fragmentation and bursting, but not 11n aggregation.
1287 * Same as "len", but for next frame. Set to 0 if not applicable.
1288 */
1289 __le16 next_frame_len;
1290
1291 __le32 tx_flags; /* TX_CMD_FLG_* */
1292
1293 /* uCode may modify this field of the Tx command (in host DRAM!).
1294 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
1295 struct iwl_dram_scratch scratch;
1296
1297 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1298 __le32 rate_n_flags; /* RATE_MCS_* */
1299
1300 /* Index of destination station in uCode's station table */
1301 u8 sta_id;
1302
1303 /* Type of security encryption: CCM or TKIP */
1304 u8 sec_ctl; /* TX_CMD_SEC_* */
1305
1306 /*
1307 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1308 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for
1309 * data frames, this field may be used to selectively reduce initial
1310 * rate (via non-0 value) for special frames (e.g. management), while
1311 * still supporting rate scaling for all frames.
1312 */
1313 u8 initial_rate_index;
1314 u8 reserved;
1315 u8 key[16];
1316 __le16 next_frame_flags;
1317 __le16 reserved2;
1318 union {
1319 __le32 life_time;
1320 __le32 attempt;
1321 } stop_time;
1322
1323 /* Host DRAM physical address pointer to "scratch" in this command.
1324 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */
1325 __le32 dram_lsb_ptr;
1326 u8 dram_msb_ptr;
1327
1328 u8 rts_retry_limit; /*byte 50 */
1329 u8 data_retry_limit; /*byte 51 */
1330 u8 tid_tspec;
1331 union {
1332 __le16 pm_frame_timeout;
1333 __le16 attempt_duration;
1334 } timeout;
1335
1336 /*
1337 * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1338 * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1339 */
1340 __le16 driver_txop;
1341
1342 /*
1343 * MAC header goes here, followed by 2 bytes padding if MAC header
1344 * length is 26 or 30 bytes, followed by payload data
1345 */
1346 u8 payload[0];
1347 struct ieee80211_hdr hdr[0];
1348 } __packed;
1349
1350 /*
1351 * TX command response is sent after *agn* transmission attempts.
1352 *
1353 * both postpone and abort status are expected behavior from uCode. there is
1354 * no special operation required from driver; except for RFKILL_FLUSH,
1355 * which required tx flush host command to flush all the tx frames in queues
1356 */
1357 enum {
1358 TX_STATUS_SUCCESS = 0x01,
1359 TX_STATUS_DIRECT_DONE = 0x02,
1360 /* postpone TX */
1361 TX_STATUS_POSTPONE_DELAY = 0x40,
1362 TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1363 TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1364 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1365 TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1366 /* abort TX */
1367 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
1368 TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1369 TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1370 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
1371 TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1372 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
1373 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1374 TX_STATUS_FAIL_DEST_PS = 0x88,
1375 TX_STATUS_FAIL_HOST_ABORTED = 0x89,
1376 TX_STATUS_FAIL_BT_RETRY = 0x8a,
1377 TX_STATUS_FAIL_STA_INVALID = 0x8b,
1378 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1379 TX_STATUS_FAIL_TID_DISABLE = 0x8d,
1380 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
1381 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1382 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1383 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
1384 };
1385
1386 #define TX_PACKET_MODE_REGULAR 0x0000
1387 #define TX_PACKET_MODE_BURST_SEQ 0x0100
1388 #define TX_PACKET_MODE_BURST_FIRST 0x0200
1389
1390 enum {
1391 TX_POWER_PA_NOT_ACTIVE = 0x0,
1392 };
1393
1394 enum {
1395 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
1396 TX_STATUS_DELAY_MSK = 0x00000040,
1397 TX_STATUS_ABORT_MSK = 0x00000080,
1398 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
1399 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
1400 TX_RESERVED = 0x00780000, /* bits 19:22 */
1401 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
1402 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1403 };
1404
1405 /* *******************************
1406 * TX aggregation status
1407 ******************************* */
1408
1409 enum {
1410 AGG_TX_STATE_TRANSMITTED = 0x00,
1411 AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1412 AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1413 AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1414 AGG_TX_STATE_ABORT_MSK = 0x08,
1415 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1416 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1417 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1418 AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1419 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1420 AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1421 AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1422 AGG_TX_STATE_DELAY_TX_MSK = 0x400
1423 };
1424
1425 #define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */
1426 #define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */
1427
1428 #define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1429 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1430 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
1431
1432 /* # tx attempts for first frame in aggregation */
1433 #define AGG_TX_STATE_TRY_CNT_POS 12
1434 #define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1435
1436 /* Command ID and sequence number of Tx command for this frame */
1437 #define AGG_TX_STATE_SEQ_NUM_POS 16
1438 #define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1439
1440 /*
1441 * REPLY_TX = 0x1c (response)
1442 *
1443 * This response may be in one of two slightly different formats, indicated
1444 * by the frame_count field:
1445 *
1446 * 1) No aggregation (frame_count == 1). This reports Tx results for
1447 * a single frame. Multiple attempts, at various bit rates, may have
1448 * been made for this frame.
1449 *
1450 * 2) Aggregation (frame_count > 1). This reports Tx results for
1451 * 2 or more frames that used block-acknowledge. All frames were
1452 * transmitted at same rate. Rate scaling may have been used if first
1453 * frame in this new agg block failed in previous agg block(s).
1454 *
1455 * Note that, for aggregation, ACK (block-ack) status is not delivered here;
1456 * block-ack has not been received by the time the agn device records
1457 * this status.
1458 * This status relates to reasons the tx might have been blocked or aborted
1459 * within the sending station (this agn device), rather than whether it was
1460 * received successfully by the destination station.
1461 */
1462 struct agg_tx_status {
1463 __le16 status;
1464 __le16 sequence;
1465 } __packed;
1466
1467 /*
1468 * definitions for initial rate index field
1469 * bits [3:0] initial rate index
1470 * bits [6:4] rate table color, used for the initial rate
1471 * bit-7 invalid rate indication
1472 * i.e. rate was not chosen from rate table
1473 * or rate table color was changed during frame retries
1474 * refer tlc rate info
1475 */
1476
1477 #define IWL50_TX_RES_INIT_RATE_INDEX_POS 0
1478 #define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f
1479 #define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4
1480 #define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70
1481 #define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80
1482
1483 /* refer to ra_tid */
1484 #define IWLAGN_TX_RES_TID_POS 0
1485 #define IWLAGN_TX_RES_TID_MSK 0x0f
1486 #define IWLAGN_TX_RES_RA_POS 4
1487 #define IWLAGN_TX_RES_RA_MSK 0xf0
1488
1489 struct iwlagn_tx_resp {
1490 u8 frame_count; /* 1 no aggregation, >1 aggregation */
1491 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1492 u8 failure_rts; /* # failures due to unsuccessful RTS */
1493 u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1494
1495 /* For non-agg: Rate at which frame was successful.
1496 * For agg: Rate at which all frames were transmitted. */
1497 __le32 rate_n_flags; /* RATE_MCS_* */
1498
1499 /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1500 * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1501 __le16 wireless_media_time; /* uSecs */
1502
1503 u8 pa_status; /* RF power amplifier measurement (not used) */
1504 u8 pa_integ_res_a[3];
1505 u8 pa_integ_res_b[3];
1506 u8 pa_integ_res_C[3];
1507
1508 __le32 tfd_info;
1509 __le16 seq_ctl;
1510 __le16 byte_cnt;
1511 u8 tlc_info;
1512 u8 ra_tid; /* tid (0:3), sta_id (4:7) */
1513 __le16 frame_ctrl;
1514 /*
1515 * For non-agg: frame status TX_STATUS_*
1516 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1517 * fields follow this one, up to frame_count.
1518 * Bit fields:
1519 * 11- 0: AGG_TX_STATE_* status code
1520 * 15-12: Retry count for 1st frame in aggregation (retries
1521 * occur if tx failed for this frame when it was a
1522 * member of a previous aggregation block). If rate
1523 * scaling is used, retry count indicates the rate
1524 * table entry used for all frames in the new agg.
1525 * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1526 */
1527 struct agg_tx_status status; /* TX status (in aggregation -
1528 * status of 1st frame) */
1529 } __packed;
1530 /*
1531 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
1532 *
1533 * Reports Block-Acknowledge from recipient station
1534 */
1535 struct iwl_compressed_ba_resp {
1536 __le32 sta_addr_lo32;
1537 __le16 sta_addr_hi16;
1538 __le16 reserved;
1539
1540 /* Index of recipient (BA-sending) station in uCode's station table */
1541 u8 sta_id;
1542 u8 tid;
1543 __le16 seq_ctl;
1544 __le64 bitmap;
1545 __le16 scd_flow;
1546 __le16 scd_ssn;
1547 u8 txed; /* number of frames sent */
1548 u8 txed_2_done; /* number of frames acked */
1549 } __packed;
1550
1551 /*
1552 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
1553 *
1554 */
1555
1556 /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
1557 #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
1558
1559 /* # of EDCA prioritized tx fifos */
1560 #define LINK_QUAL_AC_NUM AC_NUM
1561
1562 /* # entries in rate scale table to support Tx retries */
1563 #define LINK_QUAL_MAX_RETRY_NUM 16
1564
1565 /* Tx antenna selection values */
1566 #define LINK_QUAL_ANT_A_MSK (1 << 0)
1567 #define LINK_QUAL_ANT_B_MSK (1 << 1)
1568 #define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1569
1570
1571 /**
1572 * struct iwl_link_qual_general_params
1573 *
1574 * Used in REPLY_TX_LINK_QUALITY_CMD
1575 */
1576 struct iwl_link_qual_general_params {
1577 u8 flags;
1578
1579 /* No entries at or above this (driver chosen) index contain MIMO */
1580 u8 mimo_delimiter;
1581
1582 /* Best single antenna to use for single stream (legacy, SISO). */
1583 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */
1584
1585 /* Best antennas to use for MIMO (unused for 4965, assumes both). */
1586 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */
1587
1588 /*
1589 * If driver needs to use different initial rates for different
1590 * EDCA QOS access categories (as implemented by tx fifos 0-3),
1591 * this table will set that up, by indicating the indexes in the
1592 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1593 * Otherwise, driver should set all entries to 0.
1594 *
1595 * Entry usage:
1596 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1597 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1598 */
1599 u8 start_rate_index[LINK_QUAL_AC_NUM];
1600 } __packed;
1601
1602 #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
1603 #define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
1604 #define LINK_QUAL_AGG_TIME_LIMIT_MIN (100)
1605
1606 #define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1607 #define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1608 #define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1609
1610 #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63)
1611 #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
1612 #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
1613
1614 /**
1615 * struct iwl_link_qual_agg_params
1616 *
1617 * Used in REPLY_TX_LINK_QUALITY_CMD
1618 */
1619 struct iwl_link_qual_agg_params {
1620
1621 /*
1622 *Maximum number of uSec in aggregation.
1623 * default set to 4000 (4 milliseconds) if not configured in .cfg
1624 */
1625 __le16 agg_time_limit;
1626
1627 /*
1628 * Number of Tx retries allowed for a frame, before that frame will
1629 * no longer be considered for the start of an aggregation sequence
1630 * (scheduler will then try to tx it as single frame).
1631 * Driver should set this to 3.
1632 */
1633 u8 agg_dis_start_th;
1634
1635 /*
1636 * Maximum number of frames in aggregation.
1637 * 0 = no limit (default). 1 = no aggregation.
1638 * Other values = max # frames in aggregation.
1639 */
1640 u8 agg_frame_cnt_limit;
1641
1642 __le32 reserved;
1643 } __packed;
1644
1645 /*
1646 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
1647 *
1648 * For agn devices
1649 *
1650 * Each station in the agn device's internal station table has its own table
1651 * of 16
1652 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1653 * an ACK is not received. This command replaces the entire table for
1654 * one station.
1655 *
1656 * NOTE: Station must already be in agn device's station table.
1657 * Use REPLY_ADD_STA.
1658 *
1659 * The rate scaling procedures described below work well. Of course, other
1660 * procedures are possible, and may work better for particular environments.
1661 *
1662 *
1663 * FILLING THE RATE TABLE
1664 *
1665 * Given a particular initial rate and mode, as determined by the rate
1666 * scaling algorithm described below, the Linux driver uses the following
1667 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1668 * Link Quality command:
1669 *
1670 *
1671 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate:
1672 * a) Use this same initial rate for first 3 entries.
1673 * b) Find next lower available rate using same mode (SISO or MIMO),
1674 * use for next 3 entries. If no lower rate available, switch to
1675 * legacy mode (no HT40 channel, no MIMO, no short guard interval).
1676 * c) If using MIMO, set command's mimo_delimiter to number of entries
1677 * using MIMO (3 or 6).
1678 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
1679 * no MIMO, no short guard interval), at the next lower bit rate
1680 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1681 * legacy procedure for remaining table entries.
1682 *
1683 * 2) If using legacy initial rate:
1684 * a) Use the initial rate for only one entry.
1685 * b) For each following entry, reduce the rate to next lower available
1686 * rate, until reaching the lowest available rate.
1687 * c) When reducing rate, also switch antenna selection.
1688 * d) Once lowest available rate is reached, repeat this rate until
1689 * rate table is filled (16 entries), switching antenna each entry.
1690 *
1691 *
1692 * ACCUMULATING HISTORY
1693 *
1694 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1695 * uses two sets of frame Tx success history: One for the current/active
1696 * modulation mode, and one for a speculative/search mode that is being
1697 * attempted. If the speculative mode turns out to be more effective (i.e.
1698 * actual transfer rate is better), then the driver continues to use the
1699 * speculative mode as the new current active mode.
1700 *
1701 * Each history set contains, separately for each possible rate, data for a
1702 * sliding window of the 62 most recent tx attempts at that rate. The data
1703 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1704 * and attempted frames, from which the driver can additionally calculate a
1705 * success ratio (success / attempted) and number of failures
1706 * (attempted - success), and control the size of the window (attempted).
1707 * The driver uses the bit map to remove successes from the success sum, as
1708 * the oldest tx attempts fall out of the window.
1709 *
1710 * When the agn device makes multiple tx attempts for a given frame, each
1711 * attempt might be at a different rate, and have different modulation
1712 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1713 * up in the rate scaling table in the Link Quality command. The driver must
1714 * determine which rate table entry was used for each tx attempt, to determine
1715 * which rate-specific history to update, and record only those attempts that
1716 * match the modulation characteristics of the history set.
1717 *
1718 * When using block-ack (aggregation), all frames are transmitted at the same
1719 * rate, since there is no per-attempt acknowledgment from the destination
1720 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in
1721 * rate_n_flags field. After receiving a block-ack, the driver can update
1722 * history for the entire block all at once.
1723 *
1724 *
1725 * FINDING BEST STARTING RATE:
1726 *
1727 * When working with a selected initial modulation mode (see below), the
1728 * driver attempts to find a best initial rate. The initial rate is the
1729 * first entry in the Link Quality command's rate table.
1730 *
1731 * 1) Calculate actual throughput (success ratio * expected throughput, see
1732 * table below) for current initial rate. Do this only if enough frames
1733 * have been attempted to make the value meaningful: at least 6 failed
1734 * tx attempts, or at least 8 successes. If not enough, don't try rate
1735 * scaling yet.
1736 *
1737 * 2) Find available rates adjacent to current initial rate. Available means:
1738 * a) supported by hardware &&
1739 * b) supported by association &&
1740 * c) within any constraints selected by user
1741 *
1742 * 3) Gather measured throughputs for adjacent rates. These might not have
1743 * enough history to calculate a throughput. That's okay, we might try
1744 * using one of them anyway!
1745 *
1746 * 4) Try decreasing rate if, for current rate:
1747 * a) success ratio is < 15% ||
1748 * b) lower adjacent rate has better measured throughput ||
1749 * c) higher adjacent rate has worse throughput, and lower is unmeasured
1750 *
1751 * As a sanity check, if decrease was determined above, leave rate
1752 * unchanged if:
1753 * a) lower rate unavailable
1754 * b) success ratio at current rate > 85% (very good)
1755 * c) current measured throughput is better than expected throughput
1756 * of lower rate (under perfect 100% tx conditions, see table below)
1757 *
1758 * 5) Try increasing rate if, for current rate:
1759 * a) success ratio is < 15% ||
1760 * b) both adjacent rates' throughputs are unmeasured (try it!) ||
1761 * b) higher adjacent rate has better measured throughput ||
1762 * c) lower adjacent rate has worse throughput, and higher is unmeasured
1763 *
1764 * As a sanity check, if increase was determined above, leave rate
1765 * unchanged if:
1766 * a) success ratio at current rate < 70%. This is not particularly
1767 * good performance; higher rate is sure to have poorer success.
1768 *
1769 * 6) Re-evaluate the rate after each tx frame. If working with block-
1770 * acknowledge, history and statistics may be calculated for the entire
1771 * block (including prior history that fits within the history windows),
1772 * before re-evaluation.
1773 *
1774 * FINDING BEST STARTING MODULATION MODE:
1775 *
1776 * After working with a modulation mode for a "while" (and doing rate scaling),
1777 * the driver searches for a new initial mode in an attempt to improve
1778 * throughput. The "while" is measured by numbers of attempted frames:
1779 *
1780 * For legacy mode, search for new mode after:
1781 * 480 successful frames, or 160 failed frames
1782 * For high-throughput modes (SISO or MIMO), search for new mode after:
1783 * 4500 successful frames, or 400 failed frames
1784 *
1785 * Mode switch possibilities are (3 for each mode):
1786 *
1787 * For legacy:
1788 * Change antenna, try SISO (if HT association), try MIMO (if HT association)
1789 * For SISO:
1790 * Change antenna, try MIMO, try shortened guard interval (SGI)
1791 * For MIMO:
1792 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1793 *
1794 * When trying a new mode, use the same bit rate as the old/current mode when
1795 * trying antenna switches and shortened guard interval. When switching to
1796 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1797 * for which the expected throughput (under perfect conditions) is about the
1798 * same or slightly better than the actual measured throughput delivered by
1799 * the old/current mode.
1800 *
1801 * Actual throughput can be estimated by multiplying the expected throughput
1802 * by the success ratio (successful / attempted tx frames). Frame size is
1803 * not considered in this calculation; it assumes that frame size will average
1804 * out to be fairly consistent over several samples. The following are
1805 * metric values for expected throughput assuming 100% success ratio.
1806 * Only G band has support for CCK rates:
1807 *
1808 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60
1809 *
1810 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186
1811 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186
1812 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202
1813 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211
1814 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251
1815 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257
1816 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257
1817 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264
1818 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289
1819 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293
1820 *
1821 * After the new mode has been tried for a short while (minimum of 6 failed
1822 * frames or 8 successful frames), compare success ratio and actual throughput
1823 * estimate of the new mode with the old. If either is better with the new
1824 * mode, continue to use the new mode.
1825 *
1826 * Continue comparing modes until all 3 possibilities have been tried.
1827 * If moving from legacy to HT, try all 3 possibilities from the new HT
1828 * mode. After trying all 3, a best mode is found. Continue to use this mode
1829 * for the longer "while" described above (e.g. 480 successful frames for
1830 * legacy), and then repeat the search process.
1831 *
1832 */
1833 struct iwl_link_quality_cmd {
1834
1835 /* Index of destination/recipient station in uCode's station table */
1836 u8 sta_id;
1837 u8 reserved1;
1838 __le16 control; /* not used */
1839 struct iwl_link_qual_general_params general_params;
1840 struct iwl_link_qual_agg_params agg_params;
1841
1842 /*
1843 * Rate info; when using rate-scaling, Tx command's initial_rate_index
1844 * specifies 1st Tx rate attempted, via index into this table.
1845 * agn devices works its way through table when retrying Tx.
1846 */
1847 struct {
1848 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */
1849 } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1850 __le32 reserved2;
1851 } __packed;
1852
1853 /*
1854 * BT configuration enable flags:
1855 * bit 0 - 1: BT channel announcement enabled
1856 * 0: disable
1857 * bit 1 - 1: priority of BT device enabled
1858 * 0: disable
1859 * bit 2 - 1: BT 2 wire support enabled
1860 * 0: disable
1861 */
1862 #define BT_COEX_DISABLE (0x0)
1863 #define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1864 #define BT_ENABLE_PRIORITY BIT(1)
1865 #define BT_ENABLE_2_WIRE BIT(2)
1866
1867 #define BT_COEX_DISABLE (0x0)
1868 #define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1869
1870 #define BT_LEAD_TIME_MIN (0x0)
1871 #define BT_LEAD_TIME_DEF (0x1E)
1872 #define BT_LEAD_TIME_MAX (0xFF)
1873
1874 #define BT_MAX_KILL_MIN (0x1)
1875 #define BT_MAX_KILL_DEF (0x5)
1876 #define BT_MAX_KILL_MAX (0xFF)
1877
1878 #define BT_DURATION_LIMIT_DEF 625
1879 #define BT_DURATION_LIMIT_MAX 1250
1880 #define BT_DURATION_LIMIT_MIN 625
1881
1882 #define BT_ON_THRESHOLD_DEF 4
1883 #define BT_ON_THRESHOLD_MAX 1000
1884 #define BT_ON_THRESHOLD_MIN 1
1885
1886 #define BT_FRAG_THRESHOLD_DEF 0
1887 #define BT_FRAG_THRESHOLD_MAX 0
1888 #define BT_FRAG_THRESHOLD_MIN 0
1889
1890 #define BT_AGG_THRESHOLD_DEF 1200
1891 #define BT_AGG_THRESHOLD_MAX 8000
1892 #define BT_AGG_THRESHOLD_MIN 400
1893
1894 /*
1895 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
1896 *
1897 * agn devices support hardware handshake with Bluetooth device on
1898 * same platform. Bluetooth device alerts wireless device when it will Tx;
1899 * wireless device can delay or kill its own Tx to accommodate.
1900 */
1901 struct iwl_bt_cmd {
1902 u8 flags;
1903 u8 lead_time;
1904 u8 max_kill;
1905 u8 reserved;
1906 __le32 kill_ack_mask;
1907 __le32 kill_cts_mask;
1908 } __packed;
1909
1910 #define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0)
1911
1912 #define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5))
1913 #define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3
1914 #define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0
1915 #define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1
1916 #define IWLAGN_BT_FLAG_COEX_MODE_3W 2
1917 #define IWLAGN_BT_FLAG_COEX_MODE_4W 3
1918
1919 #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6)
1920 /* Disable Sync PSPoll on SCO/eSCO */
1921 #define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7)
1922
1923 #define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */
1924 #define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */
1925
1926 #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF
1927 #define IWLAGN_BT_PRIO_BOOST_MIN 0x00
1928 #define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0
1929
1930 #define IWLAGN_BT_MAX_KILL_DEFAULT 5
1931
1932 #define IWLAGN_BT3_T7_DEFAULT 1
1933
1934 #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1935 #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
1936 #define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
1937
1938 #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2
1939
1940 #define IWLAGN_BT3_T2_DEFAULT 0xc
1941
1942 #define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0))
1943 #define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1))
1944 #define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2))
1945 #define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3))
1946 #define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4))
1947 #define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5))
1948 #define IWLAGN_BT_VALID_BT4_TIMES cpu_to_le16(BIT(6))
1949 #define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7))
1950
1951 #define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1952 IWLAGN_BT_VALID_BOOST | \
1953 IWLAGN_BT_VALID_MAX_KILL | \
1954 IWLAGN_BT_VALID_3W_TIMERS | \
1955 IWLAGN_BT_VALID_KILL_ACK_MASK | \
1956 IWLAGN_BT_VALID_KILL_CTS_MASK | \
1957 IWLAGN_BT_VALID_BT4_TIMES | \
1958 IWLAGN_BT_VALID_3W_LUT)
1959
1960 struct iwl_basic_bt_cmd {
1961 u8 flags;
1962 u8 ledtime; /* unused */
1963 u8 max_kill;
1964 u8 bt3_timer_t7_value;
1965 __le32 kill_ack_mask;
1966 __le32 kill_cts_mask;
1967 u8 bt3_prio_sample_time;
1968 u8 bt3_timer_t2_value;
1969 __le16 bt4_reaction_time; /* unused */
1970 __le32 bt3_lookup_table[12];
1971 __le16 bt4_decision_time; /* unused */
1972 __le16 valid;
1973 };
1974
1975 struct iwl6000_bt_cmd {
1976 struct iwl_basic_bt_cmd basic;
1977 u8 prio_boost;
1978 /*
1979 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1980 * if configure the following patterns
1981 */
1982 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1983 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1984 };
1985
1986 struct iwl2000_bt_cmd {
1987 struct iwl_basic_bt_cmd basic;
1988 __le32 prio_boost;
1989 /*
1990 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1991 * if configure the following patterns
1992 */
1993 u8 reserved;
1994 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1995 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1996 };
1997
1998 #define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0))
1999
2000 struct iwlagn_bt_sco_cmd {
2001 __le32 flags;
2002 };
2003
2004 /******************************************************************************
2005 * (6)
2006 * Spectrum Management (802.11h) Commands, Responses, Notifications:
2007 *
2008 *****************************************************************************/
2009
2010 /*
2011 * Spectrum Management
2012 */
2013 #define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
2014 RXON_FILTER_CTL2HOST_MSK | \
2015 RXON_FILTER_ACCEPT_GRP_MSK | \
2016 RXON_FILTER_DIS_DECRYPT_MSK | \
2017 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
2018 RXON_FILTER_ASSOC_MSK | \
2019 RXON_FILTER_BCON_AWARE_MSK)
2020
2021 struct iwl_measure_channel {
2022 __le32 duration; /* measurement duration in extended beacon
2023 * format */
2024 u8 channel; /* channel to measure */
2025 u8 type; /* see enum iwl_measure_type */
2026 __le16 reserved;
2027 } __packed;
2028
2029 /*
2030 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
2031 */
2032 struct iwl_spectrum_cmd {
2033 __le16 len; /* number of bytes starting from token */
2034 u8 token; /* token id */
2035 u8 id; /* measurement id -- 0 or 1 */
2036 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
2037 u8 periodic; /* 1 = periodic */
2038 __le16 path_loss_timeout;
2039 __le32 start_time; /* start time in extended beacon format */
2040 __le32 reserved2;
2041 __le32 flags; /* rxon flags */
2042 __le32 filter_flags; /* rxon filter flags */
2043 __le16 channel_count; /* minimum 1, maximum 10 */
2044 __le16 reserved3;
2045 struct iwl_measure_channel channels[10];
2046 } __packed;
2047
2048 /*
2049 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
2050 */
2051 struct iwl_spectrum_resp {
2052 u8 token;
2053 u8 id; /* id of the prior command replaced, or 0xff */
2054 __le16 status; /* 0 - command will be handled
2055 * 1 - cannot handle (conflicts with another
2056 * measurement) */
2057 } __packed;
2058
2059 enum iwl_measurement_state {
2060 IWL_MEASUREMENT_START = 0,
2061 IWL_MEASUREMENT_STOP = 1,
2062 };
2063
2064 enum iwl_measurement_status {
2065 IWL_MEASUREMENT_OK = 0,
2066 IWL_MEASUREMENT_CONCURRENT = 1,
2067 IWL_MEASUREMENT_CSA_CONFLICT = 2,
2068 IWL_MEASUREMENT_TGH_CONFLICT = 3,
2069 /* 4-5 reserved */
2070 IWL_MEASUREMENT_STOPPED = 6,
2071 IWL_MEASUREMENT_TIMEOUT = 7,
2072 IWL_MEASUREMENT_PERIODIC_FAILED = 8,
2073 };
2074
2075 #define NUM_ELEMENTS_IN_HISTOGRAM 8
2076
2077 struct iwl_measurement_histogram {
2078 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2079 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
2080 } __packed;
2081
2082 /* clear channel availability counters */
2083 struct iwl_measurement_cca_counters {
2084 __le32 ofdm;
2085 __le32 cck;
2086 } __packed;
2087
2088 enum iwl_measure_type {
2089 IWL_MEASURE_BASIC = (1 << 0),
2090 IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2091 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2092 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2093 IWL_MEASURE_FRAME = (1 << 4),
2094 /* bits 5:6 are reserved */
2095 IWL_MEASURE_IDLE = (1 << 7),
2096 };
2097
2098 /*
2099 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2100 */
2101 struct iwl_spectrum_notification {
2102 u8 id; /* measurement id -- 0 or 1 */
2103 u8 token;
2104 u8 channel_index; /* index in measurement channel list */
2105 u8 state; /* 0 - start, 1 - stop */
2106 __le32 start_time; /* lower 32-bits of TSF */
2107 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
2108 u8 channel;
2109 u8 type; /* see enum iwl_measurement_type */
2110 u8 reserved1;
2111 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
2112 * valid if applicable for measurement type requested. */
2113 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
2114 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
2115 __le32 cca_time; /* channel load time in usecs */
2116 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
2117 * unidentified */
2118 u8 reserved2[3];
2119 struct iwl_measurement_histogram histogram;
2120 __le32 stop_time; /* lower 32-bits of TSF */
2121 __le32 status; /* see iwl_measurement_status */
2122 } __packed;
2123
2124 /******************************************************************************
2125 * (7)
2126 * Power Management Commands, Responses, Notifications:
2127 *
2128 *****************************************************************************/
2129
2130 /**
2131 * struct iwl_powertable_cmd - Power Table Command
2132 * @flags: See below:
2133 *
2134 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2135 *
2136 * PM allow:
2137 * bit 0 - '0' Driver not allow power management
2138 * '1' Driver allow PM (use rest of parameters)
2139 *
2140 * uCode send sleep notifications:
2141 * bit 1 - '0' Don't send sleep notification
2142 * '1' send sleep notification (SEND_PM_NOTIFICATION)
2143 *
2144 * Sleep over DTIM
2145 * bit 2 - '0' PM have to walk up every DTIM
2146 * '1' PM could sleep over DTIM till listen Interval.
2147 *
2148 * PCI power managed
2149 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2150 * '1' !(PCI_CFG_LINK_CTRL & 0x1)
2151 *
2152 * Fast PD
2153 * bit 4 - '1' Put radio to sleep when receiving frame for others
2154 *
2155 * Force sleep Modes
2156 * bit 31/30- '00' use both mac/xtal sleeps
2157 * '01' force Mac sleep
2158 * '10' force xtal sleep
2159 * '11' Illegal set
2160 *
2161 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
2162 * ucode assume sleep over DTIM is allowed and we don't need to wake up
2163 * for every DTIM.
2164 */
2165 #define IWL_POWER_VEC_SIZE 5
2166
2167 #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
2168 #define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0))
2169 #define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1))
2170 #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
2171 #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
2172 #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
2173 #define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5))
2174 #define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6))
2175 #define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7))
2176 #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8))
2177 #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9))
2178
2179 struct iwl_powertable_cmd {
2180 __le16 flags;
2181 u8 keep_alive_seconds;
2182 u8 debug_flags;
2183 __le32 rx_data_timeout;
2184 __le32 tx_data_timeout;
2185 __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2186 __le32 keep_alive_beacons;
2187 } __packed;
2188
2189 /*
2190 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
2191 * all devices identical.
2192 */
2193 struct iwl_sleep_notification {
2194 u8 pm_sleep_mode;
2195 u8 pm_wakeup_src;
2196 __le16 reserved;
2197 __le32 sleep_time;
2198 __le32 tsf_low;
2199 __le32 bcon_timer;
2200 } __packed;
2201
2202 /* Sleep states. all devices identical. */
2203 enum {
2204 IWL_PM_NO_SLEEP = 0,
2205 IWL_PM_SLP_MAC = 1,
2206 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2207 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2208 IWL_PM_SLP_PHY = 4,
2209 IWL_PM_SLP_REPENT = 5,
2210 IWL_PM_WAKEUP_BY_TIMER = 6,
2211 IWL_PM_WAKEUP_BY_DRIVER = 7,
2212 IWL_PM_WAKEUP_BY_RFKILL = 8,
2213 /* 3 reserved */
2214 IWL_PM_NUM_OF_MODES = 12,
2215 };
2216
2217 /*
2218 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2219 */
2220 #define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
2221 #define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
2222 #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
2223 struct iwl_card_state_cmd {
2224 __le32 status; /* CARD_STATE_CMD_* request new power state */
2225 } __packed;
2226
2227 /*
2228 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2229 */
2230 struct iwl_card_state_notif {
2231 __le32 flags;
2232 } __packed;
2233
2234 #define HW_CARD_DISABLED 0x01
2235 #define SW_CARD_DISABLED 0x02
2236 #define CT_CARD_DISABLED 0x04
2237 #define RXON_CARD_DISABLED 0x10
2238
2239 struct iwl_ct_kill_config {
2240 __le32 reserved;
2241 __le32 critical_temperature_M;
2242 __le32 critical_temperature_R;
2243 } __packed;
2244
2245 /* 1000, and 6x00 */
2246 struct iwl_ct_kill_throttling_config {
2247 __le32 critical_temperature_exit;
2248 __le32 reserved;
2249 __le32 critical_temperature_enter;
2250 } __packed;
2251
2252 /******************************************************************************
2253 * (8)
2254 * Scan Commands, Responses, Notifications:
2255 *
2256 *****************************************************************************/
2257
2258 #define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2259 #define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
2260
2261 /**
2262 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
2263 *
2264 * One for each channel in the scan list.
2265 * Each channel can independently select:
2266 * 1) SSID for directed active scans
2267 * 2) Txpower setting (for rate specified within Tx command)
2268 * 3) How long to stay on-channel (behavior may be modified by quiet_time,
2269 * quiet_plcp_th, good_CRC_th)
2270 *
2271 * To avoid uCode errors, make sure the following are true (see comments
2272 * under struct iwl_scan_cmd about max_out_time and quiet_time):
2273 * 1) If using passive_dwell (i.e. passive_dwell != 0):
2274 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2275 * 2) quiet_time <= active_dwell
2276 * 3) If restricting off-channel time (i.e. max_out_time !=0):
2277 * passive_dwell < max_out_time
2278 * active_dwell < max_out_time
2279 */
2280
2281 struct iwl_scan_channel {
2282 /*
2283 * type is defined as:
2284 * 0:0 1 = active, 0 = passive
2285 * 1:20 SSID direct bit map; if a bit is set, then corresponding
2286 * SSID IE is transmitted in probe request.
2287 * 21:31 reserved
2288 */
2289 __le32 type;
2290 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
2291 u8 tx_gain; /* gain for analog radio */
2292 u8 dsp_atten; /* gain for DSP */
2293 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2294 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
2295 } __packed;
2296
2297 /* set number of direct probes __le32 type */
2298 #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2299
2300 /**
2301 * struct iwl_ssid_ie - directed scan network information element
2302 *
2303 * Up to 20 of these may appear in REPLY_SCAN_CMD,
2304 * selected by "type" bit field in struct iwl_scan_channel;
2305 * each channel may select different ssids from among the 20 entries.
2306 * SSID IEs get transmitted in reverse order of entry.
2307 */
2308 struct iwl_ssid_ie {
2309 u8 id;
2310 u8 len;
2311 u8 ssid[32];
2312 } __packed;
2313
2314 #define PROBE_OPTION_MAX 20
2315 #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
2316 #define IWL_GOOD_CRC_TH_DISABLED 0
2317 #define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2318 #define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
2319 #define IWL_MAX_SCAN_SIZE 1024
2320 #define IWL_MAX_CMD_SIZE 4096
2321
2322 /*
2323 * REPLY_SCAN_CMD = 0x80 (command)
2324 *
2325 * The hardware scan command is very powerful; the driver can set it up to
2326 * maintain (relatively) normal network traffic while doing a scan in the
2327 * background. The max_out_time and suspend_time control the ratio of how
2328 * long the device stays on an associated network channel ("service channel")
2329 * vs. how long it's away from the service channel, i.e. tuned to other channels
2330 * for scanning.
2331 *
2332 * max_out_time is the max time off-channel (in usec), and suspend_time
2333 * is how long (in "extended beacon" format) that the scan is "suspended"
2334 * after returning to the service channel. That is, suspend_time is the
2335 * time that we stay on the service channel, doing normal work, between
2336 * scan segments. The driver may set these parameters differently to support
2337 * scanning when associated vs. not associated, and light vs. heavy traffic
2338 * loads when associated.
2339 *
2340 * After receiving this command, the device's scan engine does the following;
2341 *
2342 * 1) Sends SCAN_START notification to driver
2343 * 2) Checks to see if it has time to do scan for one channel
2344 * 3) Sends NULL packet, with power-save (PS) bit set to 1,
2345 * to tell AP that we're going off-channel
2346 * 4) Tunes to first channel in scan list, does active or passive scan
2347 * 5) Sends SCAN_RESULT notification to driver
2348 * 6) Checks to see if it has time to do scan on *next* channel in list
2349 * 7) Repeats 4-6 until it no longer has time to scan the next channel
2350 * before max_out_time expires
2351 * 8) Returns to service channel
2352 * 9) Sends NULL packet with PS=0 to tell AP that we're back
2353 * 10) Stays on service channel until suspend_time expires
2354 * 11) Repeats entire process 2-10 until list is complete
2355 * 12) Sends SCAN_COMPLETE notification
2356 *
2357 * For fast, efficient scans, the scan command also has support for staying on
2358 * a channel for just a short time, if doing active scanning and getting no
2359 * responses to the transmitted probe request. This time is controlled by
2360 * quiet_time, and the number of received packets below which a channel is
2361 * considered "quiet" is controlled by quiet_plcp_threshold.
2362 *
2363 * For active scanning on channels that have regulatory restrictions against
2364 * blindly transmitting, the scan can listen before transmitting, to make sure
2365 * that there is already legitimate activity on the channel. If enough
2366 * packets are cleanly received on the channel (controlled by good_CRC_th,
2367 * typical value 1), the scan engine starts transmitting probe requests.
2368 *
2369 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2370 *
2371 * To avoid uCode errors, see timing restrictions described under
2372 * struct iwl_scan_channel.
2373 */
2374
2375 enum iwl_scan_flags {
2376 /* BIT(0) currently unused */
2377 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1),
2378 /* bits 2-7 reserved */
2379 };
2380
2381 struct iwl_scan_cmd {
2382 __le16 len;
2383 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */
2384 u8 channel_count; /* # channels in channel list */
2385 __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2386 * (only for active scan) */
2387 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2388 __le16 good_CRC_th; /* passive -> active promotion threshold */
2389 __le16 rx_chain; /* RXON_RX_CHAIN_* */
2390 __le32 max_out_time; /* max usec to be away from associated (service)
2391 * channel */
2392 __le32 suspend_time; /* pause scan this long (in "extended beacon
2393 * format") when returning to service chnl:
2394 */
2395 __le32 flags; /* RXON_FLG_* */
2396 __le32 filter_flags; /* RXON_FILTER_* */
2397
2398 /* For active scans (set to all-0s for passive scans).
2399 * Does not include payload. Must specify Tx rate; no rate scaling. */
2400 struct iwl_tx_cmd tx_cmd;
2401
2402 /* For directed active scans (set to all-0s otherwise) */
2403 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
2404
2405 /*
2406 * Probe request frame, followed by channel list.
2407 *
2408 * Size of probe request frame is specified by byte count in tx_cmd.
2409 * Channel list follows immediately after probe request frame.
2410 * Number of channels in list is specified by channel_count.
2411 * Each channel in list is of type:
2412 *
2413 * struct iwl_scan_channel channels[0];
2414 *
2415 * NOTE: Only one band of channels can be scanned per pass. You
2416 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2417 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2418 * before requesting another scan.
2419 */
2420 u8 data[0];
2421 } __packed;
2422
2423 /* Can abort will notify by complete notification with abort status. */
2424 #define CAN_ABORT_STATUS cpu_to_le32(0x1)
2425 /* complete notification statuses */
2426 #define ABORT_STATUS 0x2
2427
2428 /*
2429 * REPLY_SCAN_CMD = 0x80 (response)
2430 */
2431 struct iwl_scanreq_notification {
2432 __le32 status; /* 1: okay, 2: cannot fulfill request */
2433 } __packed;
2434
2435 /*
2436 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2437 */
2438 struct iwl_scanstart_notification {
2439 __le32 tsf_low;
2440 __le32 tsf_high;
2441 __le32 beacon_timer;
2442 u8 channel;
2443 u8 band;
2444 u8 reserved[2];
2445 __le32 status;
2446 } __packed;
2447
2448 #define SCAN_OWNER_STATUS 0x1
2449 #define MEASURE_OWNER_STATUS 0x2
2450
2451 #define IWL_PROBE_STATUS_OK 0
2452 #define IWL_PROBE_STATUS_TX_FAILED BIT(0)
2453 /* error statuses combined with TX_FAILED */
2454 #define IWL_PROBE_STATUS_FAIL_TTL BIT(1)
2455 #define IWL_PROBE_STATUS_FAIL_BT BIT(2)
2456
2457 #define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
2458 /*
2459 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2460 */
2461 struct iwl_scanresults_notification {
2462 u8 channel;
2463 u8 band;
2464 u8 probe_status;
2465 u8 num_probe_not_sent; /* not enough time to send */
2466 __le32 tsf_low;
2467 __le32 tsf_high;
2468 __le32 statistics[NUMBER_OF_STATISTICS];
2469 } __packed;
2470
2471 /*
2472 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2473 */
2474 struct iwl_scancomplete_notification {
2475 u8 scanned_channels;
2476 u8 status;
2477 u8 bt_status; /* BT On/Off status */
2478 u8 last_channel;
2479 __le32 tsf_low;
2480 __le32 tsf_high;
2481 } __packed;
2482
2483
2484 /******************************************************************************
2485 * (9)
2486 * IBSS/AP Commands and Notifications:
2487 *
2488 *****************************************************************************/
2489
2490 enum iwl_ibss_manager {
2491 IWL_NOT_IBSS_MANAGER = 0,
2492 IWL_IBSS_MANAGER = 1,
2493 };
2494
2495 /*
2496 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2497 */
2498
2499 struct iwlagn_beacon_notif {
2500 struct iwlagn_tx_resp beacon_notify_hdr;
2501 __le32 low_tsf;
2502 __le32 high_tsf;
2503 __le32 ibss_mgr_status;
2504 } __packed;
2505
2506 /*
2507 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2508 */
2509
2510 struct iwl_tx_beacon_cmd {
2511 struct iwl_tx_cmd tx;
2512 __le16 tim_idx;
2513 u8 tim_size;
2514 u8 reserved1;
2515 struct ieee80211_hdr frame[0]; /* beacon frame */
2516 } __packed;
2517
2518 /******************************************************************************
2519 * (10)
2520 * Statistics Commands and Notifications:
2521 *
2522 *****************************************************************************/
2523
2524 #define IWL_TEMP_CONVERT 260
2525
2526 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
2527 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
2528 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
2529
2530 /* Used for passing to driver number of successes and failures per rate */
2531 struct rate_histogram {
2532 union {
2533 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2534 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2535 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2536 } success;
2537 union {
2538 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2539 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2540 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2541 } failed;
2542 } __packed;
2543
2544 /* statistics command response */
2545
2546 struct statistics_dbg {
2547 __le32 burst_check;
2548 __le32 burst_count;
2549 __le32 wait_for_silence_timeout_cnt;
2550 __le32 reserved[3];
2551 } __packed;
2552
2553 struct statistics_rx_phy {
2554 __le32 ina_cnt;
2555 __le32 fina_cnt;
2556 __le32 plcp_err;
2557 __le32 crc32_err;
2558 __le32 overrun_err;
2559 __le32 early_overrun_err;
2560 __le32 crc32_good;
2561 __le32 false_alarm_cnt;
2562 __le32 fina_sync_err_cnt;
2563 __le32 sfd_timeout;
2564 __le32 fina_timeout;
2565 __le32 unresponded_rts;
2566 __le32 rxe_frame_limit_overrun;
2567 __le32 sent_ack_cnt;
2568 __le32 sent_cts_cnt;
2569 __le32 sent_ba_rsp_cnt;
2570 __le32 dsp_self_kill;
2571 __le32 mh_format_err;
2572 __le32 re_acq_main_rssi_sum;
2573 __le32 reserved3;
2574 } __packed;
2575
2576 struct statistics_rx_ht_phy {
2577 __le32 plcp_err;
2578 __le32 overrun_err;
2579 __le32 early_overrun_err;
2580 __le32 crc32_good;
2581 __le32 crc32_err;
2582 __le32 mh_format_err;
2583 __le32 agg_crc32_good;
2584 __le32 agg_mpdu_cnt;
2585 __le32 agg_cnt;
2586 __le32 unsupport_mcs;
2587 } __packed;
2588
2589 #define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
2590
2591 struct statistics_rx_non_phy {
2592 __le32 bogus_cts; /* CTS received when not expecting CTS */
2593 __le32 bogus_ack; /* ACK received when not expecting ACK */
2594 __le32 non_bssid_frames; /* number of frames with BSSID that
2595 * doesn't belong to the STA BSSID */
2596 __le32 filtered_frames; /* count frames that were dumped in the
2597 * filtering process */
2598 __le32 non_channel_beacons; /* beacons with our bss id but not on
2599 * our serving channel */
2600 __le32 channel_beacons; /* beacons with our bss id and in our
2601 * serving channel */
2602 __le32 num_missed_bcon; /* number of missed beacons */
2603 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
2604 * ADC was in saturation */
2605 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2606 * for INA */
2607 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
2608 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
2609 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
2610 __le32 interference_data_flag; /* flag for interference data
2611 * availability. 1 when data is
2612 * available. */
2613 __le32 channel_load; /* counts RX Enable time in uSec */
2614 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
2615 * and CCK) counter */
2616 __le32 beacon_rssi_a;
2617 __le32 beacon_rssi_b;
2618 __le32 beacon_rssi_c;
2619 __le32 beacon_energy_a;
2620 __le32 beacon_energy_b;
2621 __le32 beacon_energy_c;
2622 } __packed;
2623
2624 struct statistics_rx_non_phy_bt {
2625 struct statistics_rx_non_phy common;
2626 /* additional stats for bt */
2627 __le32 num_bt_kills;
2628 __le32 reserved[2];
2629 } __packed;
2630
2631 struct statistics_rx {
2632 struct statistics_rx_phy ofdm;
2633 struct statistics_rx_phy cck;
2634 struct statistics_rx_non_phy general;
2635 struct statistics_rx_ht_phy ofdm_ht;
2636 } __packed;
2637
2638 struct statistics_rx_bt {
2639 struct statistics_rx_phy ofdm;
2640 struct statistics_rx_phy cck;
2641 struct statistics_rx_non_phy_bt general;
2642 struct statistics_rx_ht_phy ofdm_ht;
2643 } __packed;
2644
2645 /**
2646 * struct statistics_tx_power - current tx power
2647 *
2648 * @ant_a: current tx power on chain a in 1/2 dB step
2649 * @ant_b: current tx power on chain b in 1/2 dB step
2650 * @ant_c: current tx power on chain c in 1/2 dB step
2651 */
2652 struct statistics_tx_power {
2653 u8 ant_a;
2654 u8 ant_b;
2655 u8 ant_c;
2656 u8 reserved;
2657 } __packed;
2658
2659 struct statistics_tx_non_phy_agg {
2660 __le32 ba_timeout;
2661 __le32 ba_reschedule_frames;
2662 __le32 scd_query_agg_frame_cnt;
2663 __le32 scd_query_no_agg;
2664 __le32 scd_query_agg;
2665 __le32 scd_query_mismatch;
2666 __le32 frame_not_ready;
2667 __le32 underrun;
2668 __le32 bt_prio_kill;
2669 __le32 rx_ba_rsp_cnt;
2670 } __packed;
2671
2672 struct statistics_tx {
2673 __le32 preamble_cnt;
2674 __le32 rx_detected_cnt;
2675 __le32 bt_prio_defer_cnt;
2676 __le32 bt_prio_kill_cnt;
2677 __le32 few_bytes_cnt;
2678 __le32 cts_timeout;
2679 __le32 ack_timeout;
2680 __le32 expected_ack_cnt;
2681 __le32 actual_ack_cnt;
2682 __le32 dump_msdu_cnt;
2683 __le32 burst_abort_next_frame_mismatch_cnt;
2684 __le32 burst_abort_missing_next_frame_cnt;
2685 __le32 cts_timeout_collision;
2686 __le32 ack_or_ba_timeout_collision;
2687 struct statistics_tx_non_phy_agg agg;
2688 /*
2689 * "tx_power" are optional parameters provided by uCode,
2690 * 6000 series is the only device provide the information,
2691 * Those are reserved fields for all the other devices
2692 */
2693 struct statistics_tx_power tx_power;
2694 __le32 reserved1;
2695 } __packed;
2696
2697
2698 struct statistics_div {
2699 __le32 tx_on_a;
2700 __le32 tx_on_b;
2701 __le32 exec_time;
2702 __le32 probe_time;
2703 __le32 reserved1;
2704 __le32 reserved2;
2705 } __packed;
2706
2707 struct statistics_general_common {
2708 __le32 temperature; /* radio temperature */
2709 __le32 temperature_m; /* radio voltage */
2710 struct statistics_dbg dbg;
2711 __le32 sleep_time;
2712 __le32 slots_out;
2713 __le32 slots_idle;
2714 __le32 ttl_timestamp;
2715 struct statistics_div div;
2716 __le32 rx_enable_counter;
2717 /*
2718 * num_of_sos_states:
2719 * count the number of times we have to re-tune
2720 * in order to get out of bad PHY status
2721 */
2722 __le32 num_of_sos_states;
2723 } __packed;
2724
2725 struct statistics_bt_activity {
2726 /* Tx statistics */
2727 __le32 hi_priority_tx_req_cnt;
2728 __le32 hi_priority_tx_denied_cnt;
2729 __le32 lo_priority_tx_req_cnt;
2730 __le32 lo_priority_tx_denied_cnt;
2731 /* Rx statistics */
2732 __le32 hi_priority_rx_req_cnt;
2733 __le32 hi_priority_rx_denied_cnt;
2734 __le32 lo_priority_rx_req_cnt;
2735 __le32 lo_priority_rx_denied_cnt;
2736 } __packed;
2737
2738 struct statistics_general {
2739 struct statistics_general_common common;
2740 __le32 reserved2;
2741 __le32 reserved3;
2742 } __packed;
2743
2744 struct statistics_general_bt {
2745 struct statistics_general_common common;
2746 struct statistics_bt_activity activity;
2747 __le32 reserved2;
2748 __le32 reserved3;
2749 } __packed;
2750
2751 #define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
2752 #define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
2753 #define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
2754
2755 /*
2756 * REPLY_STATISTICS_CMD = 0x9c,
2757 * all devices identical.
2758 *
2759 * This command triggers an immediate response containing uCode statistics.
2760 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2761 *
2762 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2763 * internal copy of the statistics (counters) after issuing the response.
2764 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2765 *
2766 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2767 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
2768 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2769 */
2770 #define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
2771 #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
2772 struct iwl_statistics_cmd {
2773 __le32 configuration_flags; /* IWL_STATS_CONF_* */
2774 } __packed;
2775
2776 /*
2777 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2778 *
2779 * By default, uCode issues this notification after receiving a beacon
2780 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
2781 * REPLY_STATISTICS_CMD 0x9c, above.
2782 *
2783 * Statistics counters continue to increment beacon after beacon, but are
2784 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2785 * 0x9c with CLEAR_STATS bit set (see above).
2786 *
2787 * uCode also issues this notification during scans. uCode clears statistics
2788 * appropriately so that each notification contains statistics for only the
2789 * one channel that has just been scanned.
2790 */
2791 #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
2792 #define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8)
2793
2794 struct iwl_notif_statistics {
2795 __le32 flag;
2796 struct statistics_rx rx;
2797 struct statistics_tx tx;
2798 struct statistics_general general;
2799 } __packed;
2800
2801 struct iwl_bt_notif_statistics {
2802 __le32 flag;
2803 struct statistics_rx_bt rx;
2804 struct statistics_tx tx;
2805 struct statistics_general_bt general;
2806 } __packed;
2807
2808 /*
2809 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
2810 *
2811 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2812 * in regardless of how many missed beacons, which mean when driver receive the
2813 * notification, inside the command, it can find all the beacons information
2814 * which include number of total missed beacons, number of consecutive missed
2815 * beacons, number of beacons received and number of beacons expected to
2816 * receive.
2817 *
2818 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2819 * in order to bring the radio/PHY back to working state; which has no relation
2820 * to when driver will perform sensitivity calibration.
2821 *
2822 * Driver should set it own missed_beacon_threshold to decide when to perform
2823 * sensitivity calibration based on number of consecutive missed beacons in
2824 * order to improve overall performance, especially in noisy environment.
2825 *
2826 */
2827
2828 #define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2829 #define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2830 #define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
2831
2832 struct iwl_missed_beacon_notif {
2833 __le32 consecutive_missed_beacons;
2834 __le32 total_missed_becons;
2835 __le32 num_expected_beacons;
2836 __le32 num_recvd_beacons;
2837 } __packed;
2838
2839
2840 /******************************************************************************
2841 * (11)
2842 * Rx Calibration Commands:
2843 *
2844 * With the uCode used for open source drivers, most Tx calibration (except
2845 * for Tx Power) and most Rx calibration is done by uCode during the
2846 * "initialize" phase of uCode boot. Driver must calibrate only:
2847 *
2848 * 1) Tx power (depends on temperature), described elsewhere
2849 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2850 * 3) Receiver sensitivity (to optimize signal detection)
2851 *
2852 *****************************************************************************/
2853
2854 /**
2855 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2856 *
2857 * This command sets up the Rx signal detector for a sensitivity level that
2858 * is high enough to lock onto all signals within the associated network,
2859 * but low enough to ignore signals that are below a certain threshold, so as
2860 * not to have too many "false alarms". False alarms are signals that the
2861 * Rx DSP tries to lock onto, but then discards after determining that they
2862 * are noise.
2863 *
2864 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2865 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2866 * time listening, not transmitting). Driver must adjust sensitivity so that
2867 * the ratio of actual false alarms to actual Rx time falls within this range.
2868 *
2869 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2870 * received beacon. These provide information to the driver to analyze the
2871 * sensitivity. Don't analyze statistics that come in from scanning, or any
2872 * other non-associated-network source. Pertinent statistics include:
2873 *
2874 * From "general" statistics (struct statistics_rx_non_phy):
2875 *
2876 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2877 * Measure of energy of desired signal. Used for establishing a level
2878 * below which the device does not detect signals.
2879 *
2880 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2881 * Measure of background noise in silent period after beacon.
2882 *
2883 * channel_load
2884 * uSecs of actual Rx time during beacon period (varies according to
2885 * how much time was spent transmitting).
2886 *
2887 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2888 *
2889 * false_alarm_cnt
2890 * Signal locks abandoned early (before phy-level header).
2891 *
2892 * plcp_err
2893 * Signal locks abandoned late (during phy-level header).
2894 *
2895 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from
2896 * beacon to beacon, i.e. each value is an accumulation of all errors
2897 * before and including the latest beacon. Values will wrap around to 0
2898 * after counting up to 2^32 - 1. Driver must differentiate vs.
2899 * previous beacon's values to determine # false alarms in the current
2900 * beacon period.
2901 *
2902 * Total number of false alarms = false_alarms + plcp_errs
2903 *
2904 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2905 * (notice that the start points for OFDM are at or close to settings for
2906 * maximum sensitivity):
2907 *
2908 * START / MIN / MAX
2909 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120
2910 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210
2911 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140
2912 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270
2913 *
2914 * If actual rate of OFDM false alarms (+ plcp_errors) is too high
2915 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2916 * by *adding* 1 to all 4 of the table entries above, up to the max for
2917 * each entry. Conversely, if false alarm rate is too low (less than 5
2918 * for each 204.8 msecs listening), *subtract* 1 from each entry to
2919 * increase sensitivity.
2920 *
2921 * For CCK sensitivity, keep track of the following:
2922 *
2923 * 1). 20-beacon history of maximum background noise, indicated by
2924 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2925 * 3 receivers. For any given beacon, the "silence reference" is
2926 * the maximum of last 60 samples (20 beacons * 3 receivers).
2927 *
2928 * 2). 10-beacon history of strongest signal level, as indicated
2929 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2930 * i.e. the strength of the signal through the best receiver at the
2931 * moment. These measurements are "upside down", with lower values
2932 * for stronger signals, so max energy will be *minimum* value.
2933 *
2934 * Then for any given beacon, the driver must determine the *weakest*
2935 * of the strongest signals; this is the minimum level that needs to be
2936 * successfully detected, when using the best receiver at the moment.
2937 * "Max cck energy" is the maximum (higher value means lower energy!)
2938 * of the last 10 minima. Once this is determined, driver must add
2939 * a little margin by adding "6" to it.
2940 *
2941 * 3). Number of consecutive beacon periods with too few false alarms.
2942 * Reset this to 0 at the first beacon period that falls within the
2943 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2944 *
2945 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2946 * (notice that the start points for CCK are at maximum sensitivity):
2947 *
2948 * START / MIN / MAX
2949 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200
2950 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400
2951 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100
2952 *
2953 * If actual rate of CCK false alarms (+ plcp_errors) is too high
2954 * (greater than 50 for each 204.8 msecs listening), method for reducing
2955 * sensitivity is:
2956 *
2957 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2958 * up to max 400.
2959 *
2960 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2961 * sensitivity has been reduced a significant amount; bring it up to
2962 * a moderate 161. Otherwise, *add* 3, up to max 200.
2963 *
2964 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2965 * sensitivity has been reduced only a moderate or small amount;
2966 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2967 * down to min 0. Otherwise (if gain has been significantly reduced),
2968 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2969 *
2970 * b) Save a snapshot of the "silence reference".
2971 *
2972 * If actual rate of CCK false alarms (+ plcp_errors) is too low
2973 * (less than 5 for each 204.8 msecs listening), method for increasing
2974 * sensitivity is used only if:
2975 *
2976 * 1a) Previous beacon did not have too many false alarms
2977 * 1b) AND difference between previous "silence reference" and current
2978 * "silence reference" (prev - current) is 2 or more,
2979 * OR 2) 100 or more consecutive beacon periods have had rate of
2980 * less than 5 false alarms per 204.8 milliseconds rx time.
2981 *
2982 * Method for increasing sensitivity:
2983 *
2984 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
2985 * down to min 125.
2986 *
2987 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2988 * down to min 200.
2989 *
2990 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
2991 *
2992 * If actual rate of CCK false alarms (+ plcp_errors) is within good range
2993 * (between 5 and 50 for each 204.8 msecs listening):
2994 *
2995 * 1) Save a snapshot of the silence reference.
2996 *
2997 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors),
2998 * give some extra margin to energy threshold by *subtracting* 8
2999 * from value in HD_MIN_ENERGY_CCK_DET_INDEX.
3000 *
3001 * For all cases (too few, too many, good range), make sure that the CCK
3002 * detection threshold (energy) is below the energy level for robust
3003 * detection over the past 10 beacon periods, the "Max cck energy".
3004 * Lower values mean higher energy; this means making sure that the value
3005 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
3006 *
3007 */
3008
3009 /*
3010 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
3011 */
3012 #define HD_TABLE_SIZE (11) /* number of entries */
3013 #define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */
3014 #define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
3015 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
3016 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
3017 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
3018 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
3019 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
3020 #define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
3021 #define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
3022 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
3023 #define HD_OFDM_ENERGY_TH_IN_INDEX (10)
3024
3025 /*
3026 * Additional table entries in enhance SENSITIVITY_CMD
3027 */
3028 #define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11)
3029 #define HD_INA_NON_SQUARE_DET_CCK_INDEX (12)
3030 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13)
3031 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14)
3032 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15)
3033 #define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16)
3034 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17)
3035 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18)
3036 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19)
3037 #define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20)
3038 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21)
3039 #define HD_RESERVED (22)
3040
3041 /* number of entries for enhanced tbl */
3042 #define ENHANCE_HD_TABLE_SIZE (23)
3043
3044 /* number of additional entries for enhanced tbl */
3045 #define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
3046
3047 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0)
3048 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0)
3049 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0)
3050 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668)
3051 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
3052 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486)
3053 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37)
3054 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853)
3055 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
3056 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476)
3057 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99)
3058
3059 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1)
3060 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1)
3061 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1)
3062 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600)
3063 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40)
3064 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486)
3065 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45)
3066 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853)
3067 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60)
3068 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476)
3069 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99)
3070
3071
3072 /* Control field in struct iwl_sensitivity_cmd */
3073 #define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
3074 #define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
3075
3076 /**
3077 * struct iwl_sensitivity_cmd
3078 * @control: (1) updates working table, (0) updates default table
3079 * @table: energy threshold values, use HD_* as index into table
3080 *
3081 * Always use "1" in "control" to update uCode's working table and DSP.
3082 */
3083 struct iwl_sensitivity_cmd {
3084 __le16 control; /* always use "1" */
3085 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
3086 } __packed;
3087
3088 /*
3089 *
3090 */
3091 struct iwl_enhance_sensitivity_cmd {
3092 __le16 control; /* always use "1" */
3093 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
3094 } __packed;
3095
3096
3097 /**
3098 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3099 *
3100 * This command sets the relative gains of agn device's 3 radio receiver chains.
3101 *
3102 * After the first association, driver should accumulate signal and noise
3103 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3104 * beacons from the associated network (don't collect statistics that come
3105 * in from scanning, or any other non-network source).
3106 *
3107 * DISCONNECTED ANTENNA:
3108 *
3109 * Driver should determine which antennas are actually connected, by comparing
3110 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the
3111 * following values over 20 beacons, one accumulator for each of the chains
3112 * a/b/c, from struct statistics_rx_non_phy:
3113 *
3114 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3115 *
3116 * Find the strongest signal from among a/b/c. Compare the other two to the
3117 * strongest. If any signal is more than 15 dB (times 20, unless you
3118 * divide the accumulated values by 20) below the strongest, the driver
3119 * considers that antenna to be disconnected, and should not try to use that
3120 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected,
3121 * driver should declare the stronger one as connected, and attempt to use it
3122 * (A and B are the only 2 Tx chains!).
3123 *
3124 *
3125 * RX BALANCE:
3126 *
3127 * Driver should balance the 3 receivers (but just the ones that are connected
3128 * to antennas, see above) for gain, by comparing the average signal levels
3129 * detected during the silence after each beacon (background noise).
3130 * Accumulate (add) the following values over 20 beacons, one accumulator for
3131 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3132 *
3133 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3134 *
3135 * Find the weakest background noise level from among a/b/c. This Rx chain
3136 * will be the reference, with 0 gain adjustment. Attenuate other channels by
3137 * finding noise difference:
3138 *
3139 * (accum_noise[i] - accum_noise[reference]) / 30
3140 *
3141 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3142 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3143 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3144 * and set bit 2 to indicate "reduce gain". The value for the reference
3145 * (weakest) chain should be "0".
3146 *
3147 * diff_gain_[abc] bit fields:
3148 * 2: (1) reduce gain, (0) increase gain
3149 * 1-0: amount of gain, units of 1.5 dB
3150 */
3151
3152 /* Phy calibration command for series */
3153 /* The default calibrate table size if not specified by firmware */
3154 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
3155 enum {
3156 IWL_PHY_CALIBRATE_DC_CMD = 8,
3157 IWL_PHY_CALIBRATE_LO_CMD = 9,
3158 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
3159 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
3160 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16,
3161 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17,
3162 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18,
3163 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE = 19,
3164 };
3165
3166 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE (253)
3167
3168 /* This enum defines the bitmap of various calibrations to enable in both
3169 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3170 */
3171 enum iwl_ucode_calib_cfg {
3172 IWL_CALIB_CFG_RX_BB_IDX = BIT(0),
3173 IWL_CALIB_CFG_DC_IDX = BIT(1),
3174 IWL_CALIB_CFG_LO_IDX = BIT(2),
3175 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3),
3176 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4),
3177 IWL_CALIB_CFG_NOISE_IDX = BIT(5),
3178 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6),
3179 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7),
3180 IWL_CALIB_CFG_PAPD_IDX = BIT(8),
3181 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9),
3182 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10),
3183 };
3184
3185 #define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3186 IWL_CALIB_CFG_DC_IDX | \
3187 IWL_CALIB_CFG_LO_IDX | \
3188 IWL_CALIB_CFG_TX_IQ_IDX | \
3189 IWL_CALIB_CFG_RX_IQ_IDX | \
3190 IWL_CALIB_CFG_CRYSTAL_IDX)
3191
3192 #define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3193 IWL_CALIB_CFG_DC_IDX | \
3194 IWL_CALIB_CFG_LO_IDX | \
3195 IWL_CALIB_CFG_TX_IQ_IDX | \
3196 IWL_CALIB_CFG_RX_IQ_IDX | \
3197 IWL_CALIB_CFG_TEMPERATURE_IDX | \
3198 IWL_CALIB_CFG_PAPD_IDX | \
3199 IWL_CALIB_CFG_TX_PWR_IDX | \
3200 IWL_CALIB_CFG_CRYSTAL_IDX)
3201
3202 #define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0))
3203
3204 struct iwl_calib_cfg_elmnt_s {
3205 __le32 is_enable;
3206 __le32 start;
3207 __le32 send_res;
3208 __le32 apply_res;
3209 __le32 reserved;
3210 } __packed;
3211
3212 struct iwl_calib_cfg_status_s {
3213 struct iwl_calib_cfg_elmnt_s once;
3214 struct iwl_calib_cfg_elmnt_s perd;
3215 __le32 flags;
3216 } __packed;
3217
3218 struct iwl_calib_cfg_cmd {
3219 struct iwl_calib_cfg_status_s ucd_calib_cfg;
3220 struct iwl_calib_cfg_status_s drv_calib_cfg;
3221 __le32 reserved1;
3222 } __packed;
3223
3224 struct iwl_calib_hdr {
3225 u8 op_code;
3226 u8 first_group;
3227 u8 groups_num;
3228 u8 data_valid;
3229 } __packed;
3230
3231 struct iwl_calib_cmd {
3232 struct iwl_calib_hdr hdr;
3233 u8 data[0];
3234 } __packed;
3235
3236 struct iwl_calib_xtal_freq_cmd {
3237 struct iwl_calib_hdr hdr;
3238 u8 cap_pin1;
3239 u8 cap_pin2;
3240 u8 pad[2];
3241 } __packed;
3242
3243 #define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700)
3244 struct iwl_calib_temperature_offset_cmd {
3245 struct iwl_calib_hdr hdr;
3246 __le16 radio_sensor_offset;
3247 __le16 reserved;
3248 } __packed;
3249
3250 struct iwl_calib_temperature_offset_v2_cmd {
3251 struct iwl_calib_hdr hdr;
3252 __le16 radio_sensor_offset_high;
3253 __le16 radio_sensor_offset_low;
3254 __le16 burntVoltageRef;
3255 __le16 reserved;
3256 } __packed;
3257
3258 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3259 struct iwl_calib_chain_noise_reset_cmd {
3260 struct iwl_calib_hdr hdr;
3261 u8 data[0];
3262 };
3263
3264 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
3265 struct iwl_calib_chain_noise_gain_cmd {
3266 struct iwl_calib_hdr hdr;
3267 u8 delta_gain_1;
3268 u8 delta_gain_2;
3269 u8 pad[2];
3270 } __packed;
3271
3272 /******************************************************************************
3273 * (12)
3274 * Miscellaneous Commands:
3275 *
3276 *****************************************************************************/
3277
3278 /*
3279 * LEDs Command & Response
3280 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3281 *
3282 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3283 * this command turns it on or off, or sets up a periodic blinking cycle.
3284 */
3285 struct iwl_led_cmd {
3286 __le32 interval; /* "interval" in uSec */
3287 u8 id; /* 1: Activity, 2: Link, 3: Tech */
3288 u8 off; /* # intervals off while blinking;
3289 * "0", with >0 "on" value, turns LED on */
3290 u8 on; /* # intervals on while blinking;
3291 * "0", regardless of "off", turns LED off */
3292 u8 reserved;
3293 } __packed;
3294
3295 /*
3296 * station priority table entries
3297 * also used as potential "events" value for both
3298 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
3299 */
3300
3301 /*
3302 * COEX events entry flag masks
3303 * RP - Requested Priority
3304 * WP - Win Medium Priority: priority assigned when the contention has been won
3305 */
3306 #define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3307 #define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3308 #define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3309
3310 #define COEX_CU_UNASSOC_IDLE_RP 4
3311 #define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3312 #define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3313 #define COEX_CU_CALIBRATION_RP 4
3314 #define COEX_CU_PERIODIC_CALIBRATION_RP 4
3315 #define COEX_CU_CONNECTION_ESTAB_RP 4
3316 #define COEX_CU_ASSOCIATED_IDLE_RP 4
3317 #define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3318 #define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3319 #define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3320 #define COEX_CU_RF_ON_RP 6
3321 #define COEX_CU_RF_OFF_RP 4
3322 #define COEX_CU_STAND_ALONE_DEBUG_RP 6
3323 #define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3324 #define COEX_CU_RSRVD1_RP 4
3325 #define COEX_CU_RSRVD2_RP 4
3326
3327 #define COEX_CU_UNASSOC_IDLE_WP 3
3328 #define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3329 #define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3330 #define COEX_CU_CALIBRATION_WP 3
3331 #define COEX_CU_PERIODIC_CALIBRATION_WP 3
3332 #define COEX_CU_CONNECTION_ESTAB_WP 3
3333 #define COEX_CU_ASSOCIATED_IDLE_WP 3
3334 #define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3335 #define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3336 #define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3337 #define COEX_CU_RF_ON_WP 3
3338 #define COEX_CU_RF_OFF_WP 3
3339 #define COEX_CU_STAND_ALONE_DEBUG_WP 6
3340 #define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3341 #define COEX_CU_RSRVD1_WP 3
3342 #define COEX_CU_RSRVD2_WP 3
3343
3344 #define COEX_UNASSOC_IDLE_FLAGS 0
3345 #define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3346 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3347 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3348 #define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3349 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3350 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3351 #define COEX_CALIBRATION_FLAGS \
3352 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3353 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3354 #define COEX_PERIODIC_CALIBRATION_FLAGS 0
3355 /*
3356 * COEX_CONNECTION_ESTAB:
3357 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3358 */
3359 #define COEX_CONNECTION_ESTAB_FLAGS \
3360 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3361 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3362 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3363 #define COEX_ASSOCIATED_IDLE_FLAGS 0
3364 #define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3365 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3366 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3367 #define COEX_ASSOC_AUTO_SCAN_FLAGS \
3368 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3369 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3370 #define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3371 #define COEX_RF_ON_FLAGS 0
3372 #define COEX_RF_OFF_FLAGS 0
3373 #define COEX_STAND_ALONE_DEBUG_FLAGS \
3374 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3375 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3376 #define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3377 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3378 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3379 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3380 #define COEX_RSRVD1_FLAGS 0
3381 #define COEX_RSRVD2_FLAGS 0
3382 /*
3383 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3384 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3385 */
3386 #define COEX_CU_RF_ON_FLAGS \
3387 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3388 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3389 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3390
3391
3392 enum {
3393 /* un-association part */
3394 COEX_UNASSOC_IDLE = 0,
3395 COEX_UNASSOC_MANUAL_SCAN = 1,
3396 COEX_UNASSOC_AUTO_SCAN = 2,
3397 /* calibration */
3398 COEX_CALIBRATION = 3,
3399 COEX_PERIODIC_CALIBRATION = 4,
3400 /* connection */
3401 COEX_CONNECTION_ESTAB = 5,
3402 /* association part */
3403 COEX_ASSOCIATED_IDLE = 6,
3404 COEX_ASSOC_MANUAL_SCAN = 7,
3405 COEX_ASSOC_AUTO_SCAN = 8,
3406 COEX_ASSOC_ACTIVE_LEVEL = 9,
3407 /* RF ON/OFF */
3408 COEX_RF_ON = 10,
3409 COEX_RF_OFF = 11,
3410 COEX_STAND_ALONE_DEBUG = 12,
3411 /* IPAN */
3412 COEX_IPAN_ASSOC_LEVEL = 13,
3413 /* reserved */
3414 COEX_RSRVD1 = 14,
3415 COEX_RSRVD2 = 15,
3416 COEX_NUM_OF_EVENTS = 16
3417 };
3418
3419 /*
3420 * Coexistence WIFI/WIMAX Command
3421 * COEX_PRIORITY_TABLE_CMD = 0x5a
3422 *
3423 */
3424 struct iwl_wimax_coex_event_entry {
3425 u8 request_prio;
3426 u8 win_medium_prio;
3427 u8 reserved;
3428 u8 flags;
3429 } __packed;
3430
3431 /* COEX flag masks */
3432
3433 /* Station table is valid */
3434 #define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1)
3435 /* UnMask wake up src at unassociated sleep */
3436 #define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4)
3437 /* UnMask wake up src at associated sleep */
3438 #define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8)
3439 /* Enable CoEx feature. */
3440 #define COEX_FLAGS_COEX_ENABLE_MSK (0x80)
3441
3442 struct iwl_wimax_coex_cmd {
3443 u8 flags;
3444 u8 reserved[3];
3445 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
3446 } __packed;
3447
3448 /*
3449 * Coexistence MEDIUM NOTIFICATION
3450 * COEX_MEDIUM_NOTIFICATION = 0x5b
3451 *
3452 * notification from uCode to host to indicate medium changes
3453 *
3454 */
3455 /*
3456 * status field
3457 * bit 0 - 2: medium status
3458 * bit 3: medium change indication
3459 * bit 4 - 31: reserved
3460 */
3461 /* status option values, (0 - 2 bits) */
3462 #define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
3463 #define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
3464 #define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3465 #define COEX_MEDIUM_MSK (0x7)
3466
3467 /* send notification status (1 bit) */
3468 #define COEX_MEDIUM_CHANGED (0x8)
3469 #define COEX_MEDIUM_CHANGED_MSK (0x8)
3470 #define COEX_MEDIUM_SHIFT (3)
3471
3472 struct iwl_coex_medium_notification {
3473 __le32 status;
3474 __le32 events;
3475 } __packed;
3476
3477 /*
3478 * Coexistence EVENT Command
3479 * COEX_EVENT_CMD = 0x5c
3480 *
3481 * send from host to uCode for coex event request.
3482 */
3483 /* flags options */
3484 #define COEX_EVENT_REQUEST_MSK (0x1)
3485
3486 struct iwl_coex_event_cmd {
3487 u8 flags;
3488 u8 event;
3489 __le16 reserved;
3490 } __packed;
3491
3492 struct iwl_coex_event_resp {
3493 __le32 status;
3494 } __packed;
3495
3496
3497 /******************************************************************************
3498 * Bluetooth Coexistence commands
3499 *
3500 *****************************************************************************/
3501
3502 /*
3503 * BT Status notification
3504 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
3505 */
3506 enum iwl_bt_coex_profile_traffic_load {
3507 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0,
3508 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1,
3509 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2,
3510 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3,
3511 /*
3512 * There are no more even though below is a u8, the
3513 * indication from the BT device only has two bits.
3514 */
3515 };
3516
3517 #define BT_SESSION_ACTIVITY_1_UART_MSG 0x1
3518 #define BT_SESSION_ACTIVITY_2_UART_MSG 0x2
3519
3520 /* BT UART message - Share Part (BT -> WiFi) */
3521 #define BT_UART_MSG_FRAME1MSGTYPE_POS (0)
3522 #define BT_UART_MSG_FRAME1MSGTYPE_MSK \
3523 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3524 #define BT_UART_MSG_FRAME1SSN_POS (3)
3525 #define BT_UART_MSG_FRAME1SSN_MSK \
3526 (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3527 #define BT_UART_MSG_FRAME1UPDATEREQ_POS (5)
3528 #define BT_UART_MSG_FRAME1UPDATEREQ_MSK \
3529 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3530 #define BT_UART_MSG_FRAME1RESERVED_POS (6)
3531 #define BT_UART_MSG_FRAME1RESERVED_MSK \
3532 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3533
3534 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0)
3535 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \
3536 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3537 #define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2)
3538 #define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \
3539 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3540 #define BT_UART_MSG_FRAME2CHLSEQN_POS (4)
3541 #define BT_UART_MSG_FRAME2CHLSEQN_MSK \
3542 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3543 #define BT_UART_MSG_FRAME2INBAND_POS (5)
3544 #define BT_UART_MSG_FRAME2INBAND_MSK \
3545 (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3546 #define BT_UART_MSG_FRAME2RESERVED_POS (6)
3547 #define BT_UART_MSG_FRAME2RESERVED_MSK \
3548 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3549
3550 #define BT_UART_MSG_FRAME3SCOESCO_POS (0)
3551 #define BT_UART_MSG_FRAME3SCOESCO_MSK \
3552 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3553 #define BT_UART_MSG_FRAME3SNIFF_POS (1)
3554 #define BT_UART_MSG_FRAME3SNIFF_MSK \
3555 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3556 #define BT_UART_MSG_FRAME3A2DP_POS (2)
3557 #define BT_UART_MSG_FRAME3A2DP_MSK \
3558 (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3559 #define BT_UART_MSG_FRAME3ACL_POS (3)
3560 #define BT_UART_MSG_FRAME3ACL_MSK \
3561 (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3562 #define BT_UART_MSG_FRAME3MASTER_POS (4)
3563 #define BT_UART_MSG_FRAME3MASTER_MSK \
3564 (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3565 #define BT_UART_MSG_FRAME3OBEX_POS (5)
3566 #define BT_UART_MSG_FRAME3OBEX_MSK \
3567 (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3568 #define BT_UART_MSG_FRAME3RESERVED_POS (6)
3569 #define BT_UART_MSG_FRAME3RESERVED_MSK \
3570 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3571
3572 #define BT_UART_MSG_FRAME4IDLEDURATION_POS (0)
3573 #define BT_UART_MSG_FRAME4IDLEDURATION_MSK \
3574 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3575 #define BT_UART_MSG_FRAME4RESERVED_POS (6)
3576 #define BT_UART_MSG_FRAME4RESERVED_MSK \
3577 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3578
3579 #define BT_UART_MSG_FRAME5TXACTIVITY_POS (0)
3580 #define BT_UART_MSG_FRAME5TXACTIVITY_MSK \
3581 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3582 #define BT_UART_MSG_FRAME5RXACTIVITY_POS (2)
3583 #define BT_UART_MSG_FRAME5RXACTIVITY_MSK \
3584 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3585 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4)
3586 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \
3587 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3588 #define BT_UART_MSG_FRAME5RESERVED_POS (6)
3589 #define BT_UART_MSG_FRAME5RESERVED_MSK \
3590 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3591
3592 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0)
3593 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \
3594 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3595 #define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5)
3596 #define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \
3597 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3598 #define BT_UART_MSG_FRAME6RESERVED_POS (6)
3599 #define BT_UART_MSG_FRAME6RESERVED_MSK \
3600 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3601
3602 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0)
3603 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \
3604 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
3605 #define BT_UART_MSG_FRAME7PAGE_POS (3)
3606 #define BT_UART_MSG_FRAME7PAGE_MSK \
3607 (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3608 #define BT_UART_MSG_FRAME7INQUIRY_POS (4)
3609 #define BT_UART_MSG_FRAME7INQUIRY_MSK \
3610 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
3611 #define BT_UART_MSG_FRAME7CONNECTABLE_POS (5)
3612 #define BT_UART_MSG_FRAME7CONNECTABLE_MSK \
3613 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3614 #define BT_UART_MSG_FRAME7RESERVED_POS (6)
3615 #define BT_UART_MSG_FRAME7RESERVED_MSK \
3616 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3617
3618 /* BT Session Activity 2 UART message (BT -> WiFi) */
3619 #define BT_UART_MSG_2_FRAME1RESERVED1_POS (5)
3620 #define BT_UART_MSG_2_FRAME1RESERVED1_MSK \
3621 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3622 #define BT_UART_MSG_2_FRAME1RESERVED2_POS (6)
3623 #define BT_UART_MSG_2_FRAME1RESERVED2_MSK \
3624 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3625
3626 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0)
3627 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \
3628 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3629 #define BT_UART_MSG_2_FRAME2RESERVED_POS (6)
3630 #define BT_UART_MSG_2_FRAME2RESERVED_MSK \
3631 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3632
3633 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0)
3634 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \
3635 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3636 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4)
3637 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \
3638 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3639 #define BT_UART_MSG_2_FRAME3LEMASTER_POS (5)
3640 #define BT_UART_MSG_2_FRAME3LEMASTER_MSK \
3641 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3642 #define BT_UART_MSG_2_FRAME3RESERVED_POS (6)
3643 #define BT_UART_MSG_2_FRAME3RESERVED_MSK \
3644 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3645
3646 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0)
3647 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \
3648 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3649 #define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4)
3650 #define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \
3651 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3652 #define BT_UART_MSG_2_FRAME4RESERVED_POS (6)
3653 #define BT_UART_MSG_2_FRAME4RESERVED_MSK \
3654 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3655
3656 #define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0)
3657 #define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \
3658 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3659 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4)
3660 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \
3661 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3662 #define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5)
3663 #define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \
3664 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3665 #define BT_UART_MSG_2_FRAME5RESERVED_POS (6)
3666 #define BT_UART_MSG_2_FRAME5RESERVED_MSK \
3667 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3668
3669 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0)
3670 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \
3671 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3672 #define BT_UART_MSG_2_FRAME6RFU_POS (5)
3673 #define BT_UART_MSG_2_FRAME6RFU_MSK \
3674 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3675 #define BT_UART_MSG_2_FRAME6RESERVED_POS (6)
3676 #define BT_UART_MSG_2_FRAME6RESERVED_MSK \
3677 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3678
3679 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0)
3680 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \
3681 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3682 #define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3)
3683 #define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \
3684 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3685 #define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4)
3686 #define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \
3687 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3688 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5)
3689 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \
3690 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3691 #define BT_UART_MSG_2_FRAME7RESERVED_POS (6)
3692 #define BT_UART_MSG_2_FRAME7RESERVED_MSK \
3693 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3694
3695
3696 struct iwl_bt_uart_msg {
3697 u8 header;
3698 u8 frame1;
3699 u8 frame2;
3700 u8 frame3;
3701 u8 frame4;
3702 u8 frame5;
3703 u8 frame6;
3704 u8 frame7;
3705 } __attribute__((packed));
3706
3707 struct iwl_bt_coex_profile_notif {
3708 struct iwl_bt_uart_msg last_bt_uart_msg;
3709 u8 bt_status; /* 0 - off, 1 - on */
3710 u8 bt_traffic_load; /* 0 .. 3? */
3711 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3712 u8 reserved;
3713 } __attribute__((packed));
3714
3715 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3716 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3717 #define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1
3718 #define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e
3719 #define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4
3720 #define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0
3721 #define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1
3722
3723 /*
3724 * BT Coexistence Priority table
3725 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3726 */
3727 enum bt_coex_prio_table_events {
3728 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3729 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3730 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3731 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3732 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3733 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3734 BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3735 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3736 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3737 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3738 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3739 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3740 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3741 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3742 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3743 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3744 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3745 BT_COEX_PRIO_TBL_EVT_MAX,
3746 };
3747
3748 enum bt_coex_prio_table_priorities {
3749 BT_COEX_PRIO_TBL_DISABLED = 0,
3750 BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3751 BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3752 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3753 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3754 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3755 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3756 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3757 BT_COEX_PRIO_TBL_MAX,
3758 };
3759
3760 struct iwl_bt_coex_prio_table_cmd {
3761 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
3762 } __attribute__((packed));
3763
3764 #define IWL_BT_COEX_ENV_CLOSE 0
3765 #define IWL_BT_COEX_ENV_OPEN 1
3766 /*
3767 * BT Protection Envelope
3768 * REPLY_BT_COEX_PROT_ENV = 0xcd
3769 */
3770 struct iwl_bt_coex_prot_env_cmd {
3771 u8 action; /* 0 = closed, 1 = open */
3772 u8 type; /* 0 .. 15 */
3773 u8 reserved[2];
3774 } __attribute__((packed));
3775
3776 /*
3777 * REPLY_D3_CONFIG
3778 */
3779 enum iwlagn_d3_wakeup_filters {
3780 IWLAGN_D3_WAKEUP_RFKILL = BIT(0),
3781 IWLAGN_D3_WAKEUP_SYSASSERT = BIT(1),
3782 };
3783
3784 struct iwlagn_d3_config_cmd {
3785 __le32 min_sleep_time;
3786 __le32 wakeup_flags;
3787 } __packed;
3788
3789 /*
3790 * REPLY_WOWLAN_PATTERNS
3791 */
3792 #define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16
3793 #define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128
3794
3795 struct iwlagn_wowlan_pattern {
3796 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8];
3797 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN];
3798 u8 mask_size;
3799 u8 pattern_size;
3800 __le16 reserved;
3801 } __packed;
3802
3803 #define IWLAGN_WOWLAN_MAX_PATTERNS 20
3804
3805 struct iwlagn_wowlan_patterns_cmd {
3806 __le32 n_patterns;
3807 struct iwlagn_wowlan_pattern patterns[];
3808 } __packed;
3809
3810 /*
3811 * REPLY_WOWLAN_WAKEUP_FILTER
3812 */
3813 enum iwlagn_wowlan_wakeup_filters {
3814 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0),
3815 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1),
3816 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2),
3817 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3),
3818 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4),
3819 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(5),
3820 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(6),
3821 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(7),
3822 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(8),
3823 };
3824
3825 struct iwlagn_wowlan_wakeup_filter_cmd {
3826 __le32 enabled;
3827 __le16 non_qos_seq;
3828 __le16 reserved;
3829 __le16 qos_seq[8];
3830 };
3831
3832 /*
3833 * REPLY_WOWLAN_TSC_RSC_PARAMS
3834 */
3835 #define IWLAGN_NUM_RSC 16
3836
3837 struct tkip_sc {
3838 __le16 iv16;
3839 __le16 pad;
3840 __le32 iv32;
3841 } __packed;
3842
3843 struct iwlagn_tkip_rsc_tsc {
3844 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC];
3845 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC];
3846 struct tkip_sc tsc;
3847 } __packed;
3848
3849 struct aes_sc {
3850 __le64 pn;
3851 } __packed;
3852
3853 struct iwlagn_aes_rsc_tsc {
3854 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC];
3855 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC];
3856 struct aes_sc tsc;
3857 } __packed;
3858
3859 union iwlagn_all_tsc_rsc {
3860 struct iwlagn_tkip_rsc_tsc tkip;
3861 struct iwlagn_aes_rsc_tsc aes;
3862 };
3863
3864 struct iwlagn_wowlan_rsc_tsc_params_cmd {
3865 union iwlagn_all_tsc_rsc all_tsc_rsc;
3866 } __packed;
3867
3868 /*
3869 * REPLY_WOWLAN_TKIP_PARAMS
3870 */
3871 #define IWLAGN_MIC_KEY_SIZE 8
3872 #define IWLAGN_P1K_SIZE 5
3873 struct iwlagn_mic_keys {
3874 u8 tx[IWLAGN_MIC_KEY_SIZE];
3875 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE];
3876 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE];
3877 } __packed;
3878
3879 struct iwlagn_p1k_cache {
3880 __le16 p1k[IWLAGN_P1K_SIZE];
3881 } __packed;
3882
3883 #define IWLAGN_NUM_RX_P1K_CACHE 2
3884
3885 struct iwlagn_wowlan_tkip_params_cmd {
3886 struct iwlagn_mic_keys mic_keys;
3887 struct iwlagn_p1k_cache tx;
3888 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE];
3889 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE];
3890 } __packed;
3891
3892 /*
3893 * REPLY_WOWLAN_KEK_KCK_MATERIAL
3894 */
3895
3896 #define IWLAGN_KCK_MAX_SIZE 32
3897 #define IWLAGN_KEK_MAX_SIZE 32
3898
3899 struct iwlagn_wowlan_kek_kck_material_cmd {
3900 u8 kck[IWLAGN_KCK_MAX_SIZE];
3901 u8 kek[IWLAGN_KEK_MAX_SIZE];
3902 __le16 kck_len;
3903 __le16 kek_len;
3904 __le64 replay_ctr;
3905 } __packed;
3906
3907 /******************************************************************************
3908 * (13)
3909 * Union of all expected notifications/responses:
3910 *
3911 *****************************************************************************/
3912 #define FH_RSCSR_FRAME_SIZE_MSK (0x00003FFF) /* bits 0-13 */
3913
3914 struct iwl_rx_packet {
3915 /*
3916 * The first 4 bytes of the RX frame header contain both the RX frame
3917 * size and some flags.
3918 * Bit fields:
3919 * 31: flag flush RB request
3920 * 30: flag ignore TC (terminal counter) request
3921 * 29: flag fast IRQ request
3922 * 28-14: Reserved
3923 * 13-00: RX frame size
3924 */
3925 __le32 len_n_flags;
3926 struct iwl_cmd_header hdr;
3927 union {
3928 struct iwl_alive_resp alive_frame;
3929 struct iwl_spectrum_notification spectrum_notif;
3930 struct iwl_csa_notification csa_notif;
3931 struct iwl_error_resp err_resp;
3932 struct iwl_card_state_notif card_state_notif;
3933 struct iwl_add_sta_resp add_sta;
3934 struct iwl_rem_sta_resp rem_sta;
3935 struct iwl_sleep_notification sleep_notif;
3936 struct iwl_spectrum_resp spectrum;
3937 struct iwl_notif_statistics stats;
3938 struct iwl_bt_notif_statistics stats_bt;
3939 struct iwl_compressed_ba_resp compressed_ba;
3940 struct iwl_missed_beacon_notif missed_beacon;
3941 struct iwl_coex_medium_notification coex_medium_notif;
3942 struct iwl_coex_event_resp coex_event;
3943 struct iwl_bt_coex_profile_notif bt_coex_profile_notif;
3944 __le32 status;
3945 u8 raw[0];
3946 } u;
3947 } __packed;
3948
3949 int iwl_agn_check_rxon_cmd(struct iwl_priv *priv);
3950
3951 /*
3952 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3953 */
3954
3955 /*
3956 * Minimum slot time in TU
3957 */
3958 #define IWL_MIN_SLOT_TIME 20
3959
3960 /**
3961 * struct iwl_wipan_slot
3962 * @width: Time in TU
3963 * @type:
3964 * 0 - BSS
3965 * 1 - PAN
3966 */
3967 struct iwl_wipan_slot {
3968 __le16 width;
3969 u8 type;
3970 u8 reserved;
3971 } __packed;
3972
3973 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */
3974 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */
3975 #define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */
3976 #define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4)
3977 #define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5)
3978
3979 /**
3980 * struct iwl_wipan_params_cmd
3981 * @flags:
3982 * bit0: reserved
3983 * bit1: CP leave channel with CTS
3984 * bit2: CP leave channel qith Quiet
3985 * bit3: slotted mode
3986 * 1 - work in slotted mode
3987 * 0 - work in non slotted mode
3988 * bit4: filter beacon notification
3989 * bit5: full tx slotted mode. if this flag is set,
3990 * uCode will perform leaving channel methods in context switch
3991 * also when working in same channel mode
3992 * @num_slots: 1 - 10
3993 */
3994 struct iwl_wipan_params_cmd {
3995 __le16 flags;
3996 u8 reserved;
3997 u8 num_slots;
3998 struct iwl_wipan_slot slots[10];
3999 } __packed;
4000
4001 /*
4002 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
4003 *
4004 * TODO: Figure out what this is used for,
4005 * it can only switch between 2.4 GHz
4006 * channels!!
4007 */
4008
4009 struct iwl_wipan_p2p_channel_switch_cmd {
4010 __le16 channel;
4011 __le16 reserved;
4012 };
4013
4014 /*
4015 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
4016 *
4017 * This is used by the device to notify us of the
4018 * NoA schedule it determined so we can forward it
4019 * to userspace for inclusion in probe responses.
4020 *
4021 * In beacons, the NoA schedule is simply appended
4022 * to the frame we give the device.
4023 */
4024
4025 struct iwl_wipan_noa_descriptor {
4026 u8 count;
4027 __le32 duration;
4028 __le32 interval;
4029 __le32 starttime;
4030 } __packed;
4031
4032 struct iwl_wipan_noa_attribute {
4033 u8 id;
4034 __le16 length;
4035 u8 index;
4036 u8 ct_window;
4037 struct iwl_wipan_noa_descriptor descr0, descr1;
4038 u8 reserved;
4039 } __packed;
4040
4041 struct iwl_wipan_noa_notification {
4042 u32 noa_active;
4043 struct iwl_wipan_noa_attribute noa_attribute;
4044 } __packed;
4045
4046 #endif /* __iwl_commands_h__ */
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