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[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <net/mac80211.h>
35
36 #include "iwl-eeprom.h"
37 #include "iwl-dev.h" /* FIXME: remove */
38 #include "iwl-debug.h"
39 #include "iwl-core.h"
40 #include "iwl-io.h"
41 #include "iwl-power.h"
42 #include "iwl-sta.h"
43 #include "iwl-helpers.h"
44
45
46 MODULE_DESCRIPTION("iwl core");
47 MODULE_VERSION(IWLWIFI_VERSION);
48 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
49 MODULE_LICENSE("GPL");
50
51 /*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
67 static bool bt_coex_active = true;
68 module_param(bt_coex_active, bool, S_IRUGO);
69 MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
70
71 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
72 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
73 IWL_RATE_SISO_##s##M_PLCP, \
74 IWL_RATE_MIMO2_##s##M_PLCP,\
75 IWL_RATE_MIMO3_##s##M_PLCP,\
76 IWL_RATE_##r##M_IEEE, \
77 IWL_RATE_##ip##M_INDEX, \
78 IWL_RATE_##in##M_INDEX, \
79 IWL_RATE_##rp##M_INDEX, \
80 IWL_RATE_##rn##M_INDEX, \
81 IWL_RATE_##pp##M_INDEX, \
82 IWL_RATE_##np##M_INDEX }
83
84 u32 iwl_debug_level;
85 EXPORT_SYMBOL(iwl_debug_level);
86
87 /*
88 * Parameter order:
89 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
90 *
91 * If there isn't a valid next or previous rate then INV is used which
92 * maps to IWL_RATE_INVALID
93 *
94 */
95 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
96 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
97 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
98 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
99 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
100 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
101 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
102 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
103 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
104 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
105 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
106 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
107 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
108 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
109 /* FIXME:RS: ^^ should be INV (legacy) */
110 };
111 EXPORT_SYMBOL(iwl_rates);
112
113 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
114 {
115 int idx = 0;
116
117 /* HT rate format */
118 if (rate_n_flags & RATE_MCS_HT_MSK) {
119 idx = (rate_n_flags & 0xff);
120
121 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
122 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
123 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
124 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
125
126 idx += IWL_FIRST_OFDM_RATE;
127 /* skip 9M not supported in ht*/
128 if (idx >= IWL_RATE_9M_INDEX)
129 idx += 1;
130 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
131 return idx;
132
133 /* legacy rate format, search for match in table */
134 } else {
135 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
136 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
137 return idx;
138 }
139
140 return -1;
141 }
142 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
143
144 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
145 {
146 int i;
147 u8 ind = ant;
148 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
149 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
150 if (priv->hw_params.valid_tx_ant & BIT(ind))
151 return ind;
152 }
153 return ant;
154 }
155 EXPORT_SYMBOL(iwl_toggle_tx_ant);
156
157 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
158 EXPORT_SYMBOL(iwl_bcast_addr);
159
160
161 /* This function both allocates and initializes hw and priv. */
162 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
163 struct ieee80211_ops *hw_ops)
164 {
165 struct iwl_priv *priv;
166
167 /* mac80211 allocates memory for this device instance, including
168 * space for this driver's private structure */
169 struct ieee80211_hw *hw =
170 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
171 if (hw == NULL) {
172 printk(KERN_ERR "%s: Can not allocate network device\n",
173 cfg->name);
174 goto out;
175 }
176
177 priv = hw->priv;
178 priv->hw = hw;
179
180 out:
181 return hw;
182 }
183 EXPORT_SYMBOL(iwl_alloc_all);
184
185 void iwl_hw_detect(struct iwl_priv *priv)
186 {
187 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
188 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
189 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
190 }
191 EXPORT_SYMBOL(iwl_hw_detect);
192
193 /*
194 * QoS support
195 */
196 static void iwl_update_qos(struct iwl_priv *priv)
197 {
198 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
199 return;
200
201 priv->qos_data.def_qos_parm.qos_flags = 0;
202
203 if (priv->qos_data.qos_active)
204 priv->qos_data.def_qos_parm.qos_flags |=
205 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
206
207 if (priv->current_ht_config.is_ht)
208 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
209
210 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
211 priv->qos_data.qos_active,
212 priv->qos_data.def_qos_parm.qos_flags);
213
214 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
215 sizeof(struct iwl_qosparam_cmd),
216 &priv->qos_data.def_qos_parm, NULL);
217 }
218
219 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
220 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
221 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
222 struct ieee80211_sta_ht_cap *ht_info,
223 enum ieee80211_band band)
224 {
225 u16 max_bit_rate = 0;
226 u8 rx_chains_num = priv->hw_params.rx_chains_num;
227 u8 tx_chains_num = priv->hw_params.tx_chains_num;
228
229 ht_info->cap = 0;
230 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
231
232 ht_info->ht_supported = true;
233
234 if (priv->cfg->ht_greenfield_support)
235 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
236 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
237 max_bit_rate = MAX_BIT_RATE_20_MHZ;
238 if (priv->hw_params.ht40_channel & BIT(band)) {
239 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
240 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
241 ht_info->mcs.rx_mask[4] = 0x01;
242 max_bit_rate = MAX_BIT_RATE_40_MHZ;
243 }
244
245 if (priv->cfg->mod_params->amsdu_size_8K)
246 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
247
248 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
249 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
250
251 ht_info->mcs.rx_mask[0] = 0xFF;
252 if (rx_chains_num >= 2)
253 ht_info->mcs.rx_mask[1] = 0xFF;
254 if (rx_chains_num >= 3)
255 ht_info->mcs.rx_mask[2] = 0xFF;
256
257 /* Highest supported Rx data rate */
258 max_bit_rate *= rx_chains_num;
259 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
260 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
261
262 /* Tx MCS capabilities */
263 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
264 if (tx_chains_num != rx_chains_num) {
265 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
266 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
267 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
268 }
269 }
270
271 /**
272 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
273 */
274 int iwlcore_init_geos(struct iwl_priv *priv)
275 {
276 struct iwl_channel_info *ch;
277 struct ieee80211_supported_band *sband;
278 struct ieee80211_channel *channels;
279 struct ieee80211_channel *geo_ch;
280 struct ieee80211_rate *rates;
281 int i = 0;
282
283 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
284 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
285 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
286 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
287 return 0;
288 }
289
290 channels = kzalloc(sizeof(struct ieee80211_channel) *
291 priv->channel_count, GFP_KERNEL);
292 if (!channels)
293 return -ENOMEM;
294
295 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
296 GFP_KERNEL);
297 if (!rates) {
298 kfree(channels);
299 return -ENOMEM;
300 }
301
302 /* 5.2GHz channels start after the 2.4GHz channels */
303 sband = &priv->bands[IEEE80211_BAND_5GHZ];
304 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
305 /* just OFDM */
306 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
307 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
308
309 if (priv->cfg->sku & IWL_SKU_N)
310 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
311 IEEE80211_BAND_5GHZ);
312
313 sband = &priv->bands[IEEE80211_BAND_2GHZ];
314 sband->channels = channels;
315 /* OFDM & CCK */
316 sband->bitrates = rates;
317 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
318
319 if (priv->cfg->sku & IWL_SKU_N)
320 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
321 IEEE80211_BAND_2GHZ);
322
323 priv->ieee_channels = channels;
324 priv->ieee_rates = rates;
325
326 for (i = 0; i < priv->channel_count; i++) {
327 ch = &priv->channel_info[i];
328
329 /* FIXME: might be removed if scan is OK */
330 if (!is_channel_valid(ch))
331 continue;
332
333 if (is_channel_a_band(ch))
334 sband = &priv->bands[IEEE80211_BAND_5GHZ];
335 else
336 sband = &priv->bands[IEEE80211_BAND_2GHZ];
337
338 geo_ch = &sband->channels[sband->n_channels++];
339
340 geo_ch->center_freq =
341 ieee80211_channel_to_frequency(ch->channel);
342 geo_ch->max_power = ch->max_power_avg;
343 geo_ch->max_antenna_gain = 0xff;
344 geo_ch->hw_value = ch->channel;
345
346 if (is_channel_valid(ch)) {
347 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
348 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
349
350 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
351 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
352
353 if (ch->flags & EEPROM_CHANNEL_RADAR)
354 geo_ch->flags |= IEEE80211_CHAN_RADAR;
355
356 geo_ch->flags |= ch->ht40_extension_channel;
357
358 if (ch->max_power_avg > priv->tx_power_device_lmt)
359 priv->tx_power_device_lmt = ch->max_power_avg;
360 } else {
361 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
362 }
363
364 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
365 ch->channel, geo_ch->center_freq,
366 is_channel_a_band(ch) ? "5.2" : "2.4",
367 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
368 "restricted" : "valid",
369 geo_ch->flags);
370 }
371
372 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
373 priv->cfg->sku & IWL_SKU_A) {
374 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
375 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
376 priv->pci_dev->device,
377 priv->pci_dev->subsystem_device);
378 priv->cfg->sku &= ~IWL_SKU_A;
379 }
380
381 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
382 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
383 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
384
385 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
386
387 return 0;
388 }
389 EXPORT_SYMBOL(iwlcore_init_geos);
390
391 /*
392 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
393 */
394 void iwlcore_free_geos(struct iwl_priv *priv)
395 {
396 kfree(priv->ieee_channels);
397 kfree(priv->ieee_rates);
398 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
399 }
400 EXPORT_SYMBOL(iwlcore_free_geos);
401
402 /*
403 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
404 * function.
405 */
406 void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
407 __le32 *tx_flags)
408 {
409 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
410 *tx_flags |= TX_CMD_FLG_RTS_MSK;
411 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
412 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
413 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
414 *tx_flags |= TX_CMD_FLG_CTS_MSK;
415 }
416 }
417 EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
418
419 static bool is_single_rx_stream(struct iwl_priv *priv)
420 {
421 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
422 priv->current_ht_config.single_chain_sufficient;
423 }
424
425 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
426 enum ieee80211_band band,
427 u16 channel, u8 extension_chan_offset)
428 {
429 const struct iwl_channel_info *ch_info;
430
431 ch_info = iwl_get_channel_info(priv, band, channel);
432 if (!is_channel_valid(ch_info))
433 return 0;
434
435 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
436 return !(ch_info->ht40_extension_channel &
437 IEEE80211_CHAN_NO_HT40PLUS);
438 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
439 return !(ch_info->ht40_extension_channel &
440 IEEE80211_CHAN_NO_HT40MINUS);
441
442 return 0;
443 }
444
445 u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
446 struct ieee80211_sta_ht_cap *sta_ht_inf)
447 {
448 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
449
450 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
451 return 0;
452
453 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
454 * the bit will not set if it is pure 40MHz case
455 */
456 if (sta_ht_inf) {
457 if (!sta_ht_inf->ht_supported)
458 return 0;
459 }
460 #ifdef CONFIG_IWLWIFI_DEBUG
461 if (priv->disable_ht40)
462 return 0;
463 #endif
464 return iwl_is_channel_extension(priv, priv->band,
465 le16_to_cpu(priv->staging_rxon.channel),
466 ht_conf->extension_chan_offset);
467 }
468 EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
469
470 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
471 {
472 u16 new_val = 0;
473 u16 beacon_factor = 0;
474
475 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
476 new_val = beacon_val / beacon_factor;
477
478 if (!new_val)
479 new_val = max_beacon_val;
480
481 return new_val;
482 }
483
484 void iwl_setup_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
485 {
486 u64 tsf;
487 s32 interval_tm, rem;
488 unsigned long flags;
489 struct ieee80211_conf *conf = NULL;
490 u16 beacon_int;
491
492 conf = ieee80211_get_hw_conf(priv->hw);
493
494 spin_lock_irqsave(&priv->lock, flags);
495 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
496 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
497
498 beacon_int = vif->bss_conf.beacon_int;
499
500 if (vif->type == NL80211_IFTYPE_ADHOC) {
501 /* TODO: we need to get atim_window from upper stack
502 * for now we set to 0 */
503 priv->rxon_timing.atim_window = 0;
504 } else {
505 priv->rxon_timing.atim_window = 0;
506 }
507
508 beacon_int = iwl_adjust_beacon_interval(beacon_int,
509 priv->hw_params.max_beacon_itrvl * 1024);
510 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
511
512 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
513 interval_tm = beacon_int * 1024;
514 rem = do_div(tsf, interval_tm);
515 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
516
517 spin_unlock_irqrestore(&priv->lock, flags);
518 IWL_DEBUG_ASSOC(priv,
519 "beacon interval %d beacon timer %d beacon tim %d\n",
520 le16_to_cpu(priv->rxon_timing.beacon_interval),
521 le32_to_cpu(priv->rxon_timing.beacon_init_val),
522 le16_to_cpu(priv->rxon_timing.atim_window));
523 }
524 EXPORT_SYMBOL(iwl_setup_rxon_timing);
525
526 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
527 {
528 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
529
530 if (hw_decrypt)
531 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
532 else
533 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
534
535 }
536 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
537
538 /**
539 * iwl_check_rxon_cmd - validate RXON structure is valid
540 *
541 * NOTE: This is really only useful during development and can eventually
542 * be #ifdef'd out once the driver is stable and folks aren't actively
543 * making changes
544 */
545 int iwl_check_rxon_cmd(struct iwl_priv *priv)
546 {
547 int error = 0;
548 int counter = 1;
549 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
550
551 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
552 error |= le32_to_cpu(rxon->flags &
553 (RXON_FLG_TGJ_NARROW_BAND_MSK |
554 RXON_FLG_RADAR_DETECT_MSK));
555 if (error)
556 IWL_WARN(priv, "check 24G fields %d | %d\n",
557 counter++, error);
558 } else {
559 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
560 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
561 if (error)
562 IWL_WARN(priv, "check 52 fields %d | %d\n",
563 counter++, error);
564 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
565 if (error)
566 IWL_WARN(priv, "check 52 CCK %d | %d\n",
567 counter++, error);
568 }
569 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
570 if (error)
571 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
572
573 /* make sure basic rates 6Mbps and 1Mbps are supported */
574 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
575 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
576 if (error)
577 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
578
579 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
580 if (error)
581 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
582
583 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
584 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
585 if (error)
586 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
587 counter++, error);
588
589 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
590 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
591 if (error)
592 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
593 counter++, error);
594
595 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
596 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
597 if (error)
598 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
599 counter++, error);
600
601 if (error)
602 IWL_WARN(priv, "Tuning to channel %d\n",
603 le16_to_cpu(rxon->channel));
604
605 if (error) {
606 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
607 return -1;
608 }
609 return 0;
610 }
611 EXPORT_SYMBOL(iwl_check_rxon_cmd);
612
613 /**
614 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
615 * @priv: staging_rxon is compared to active_rxon
616 *
617 * If the RXON structure is changing enough to require a new tune,
618 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
619 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
620 */
621 int iwl_full_rxon_required(struct iwl_priv *priv)
622 {
623
624 /* These items are only settable from the full RXON command */
625 if (!(iwl_is_associated(priv)) ||
626 compare_ether_addr(priv->staging_rxon.bssid_addr,
627 priv->active_rxon.bssid_addr) ||
628 compare_ether_addr(priv->staging_rxon.node_addr,
629 priv->active_rxon.node_addr) ||
630 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
631 priv->active_rxon.wlap_bssid_addr) ||
632 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
633 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
634 (priv->staging_rxon.air_propagation !=
635 priv->active_rxon.air_propagation) ||
636 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
637 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
638 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
639 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
640 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
641 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
642 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
643 return 1;
644
645 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
646 * be updated with the RXON_ASSOC command -- however only some
647 * flag transitions are allowed using RXON_ASSOC */
648
649 /* Check if we are not switching bands */
650 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
651 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
652 return 1;
653
654 /* Check if we are switching association toggle */
655 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
656 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
657 return 1;
658
659 return 0;
660 }
661 EXPORT_SYMBOL(iwl_full_rxon_required);
662
663 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
664 {
665 /*
666 * Assign the lowest rate -- should really get this from
667 * the beacon skb from mac80211.
668 */
669 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
670 return IWL_RATE_1M_PLCP;
671 else
672 return IWL_RATE_6M_PLCP;
673 }
674 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
675
676 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
677 {
678 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
679
680 if (!ht_conf->is_ht) {
681 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
682 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
683 RXON_FLG_HT40_PROT_MSK |
684 RXON_FLG_HT_PROT_MSK);
685 return;
686 }
687
688 /* FIXME: if the definition of ht_protection changed, the "translation"
689 * will be needed for rxon->flags
690 */
691 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
692
693 /* Set up channel bandwidth:
694 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
695 /* clear the HT channel mode before set the mode */
696 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
697 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
698 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
699 /* pure ht40 */
700 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
701 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
702 /* Note: control channel is opposite of extension channel */
703 switch (ht_conf->extension_chan_offset) {
704 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
705 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
706 break;
707 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
708 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
709 break;
710 }
711 } else {
712 /* Note: control channel is opposite of extension channel */
713 switch (ht_conf->extension_chan_offset) {
714 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
715 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
716 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
717 break;
718 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
719 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
720 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
721 break;
722 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
723 default:
724 /* channel location only valid if in Mixed mode */
725 IWL_ERR(priv, "invalid extension channel offset\n");
726 break;
727 }
728 }
729 } else {
730 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
731 }
732
733 if (priv->cfg->ops->hcmd->set_rxon_chain)
734 priv->cfg->ops->hcmd->set_rxon_chain(priv);
735
736 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
737 "extension channel offset 0x%x\n",
738 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
739 ht_conf->extension_chan_offset);
740 }
741 EXPORT_SYMBOL(iwl_set_rxon_ht);
742
743 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
744 #define IWL_NUM_RX_CHAINS_SINGLE 2
745 #define IWL_NUM_IDLE_CHAINS_DUAL 2
746 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
747
748 /*
749 * Determine how many receiver/antenna chains to use.
750 *
751 * More provides better reception via diversity. Fewer saves power
752 * at the expense of throughput, but only when not in powersave to
753 * start with.
754 *
755 * MIMO (dual stream) requires at least 2, but works better with 3.
756 * This does not determine *which* chains to use, just how many.
757 */
758 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
759 {
760 /* # of Rx chains to use when expecting MIMO. */
761 if (is_single_rx_stream(priv))
762 return IWL_NUM_RX_CHAINS_SINGLE;
763 else
764 return IWL_NUM_RX_CHAINS_MULTIPLE;
765 }
766
767 /*
768 * When we are in power saving mode, unless device support spatial
769 * multiplexing power save, use the active count for rx chain count.
770 */
771 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
772 {
773 /* # Rx chains when idling, depending on SMPS mode */
774 switch (priv->current_ht_config.smps) {
775 case IEEE80211_SMPS_STATIC:
776 case IEEE80211_SMPS_DYNAMIC:
777 return IWL_NUM_IDLE_CHAINS_SINGLE;
778 case IEEE80211_SMPS_OFF:
779 return active_cnt;
780 default:
781 WARN(1, "invalid SMPS mode %d",
782 priv->current_ht_config.smps);
783 return active_cnt;
784 }
785 }
786
787 /* up to 4 chains */
788 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
789 {
790 u8 res;
791 res = (chain_bitmap & BIT(0)) >> 0;
792 res += (chain_bitmap & BIT(1)) >> 1;
793 res += (chain_bitmap & BIT(2)) >> 2;
794 res += (chain_bitmap & BIT(3)) >> 3;
795 return res;
796 }
797
798 /**
799 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
800 *
801 * Selects how many and which Rx receivers/antennas/chains to use.
802 * This should not be used for scan command ... it puts data in wrong place.
803 */
804 void iwl_set_rxon_chain(struct iwl_priv *priv)
805 {
806 bool is_single = is_single_rx_stream(priv);
807 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
808 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
809 u32 active_chains;
810 u16 rx_chain;
811
812 /* Tell uCode which antennas are actually connected.
813 * Before first association, we assume all antennas are connected.
814 * Just after first association, iwl_chain_noise_calibration()
815 * checks which antennas actually *are* connected. */
816 if (priv->chain_noise_data.active_chains)
817 active_chains = priv->chain_noise_data.active_chains;
818 else
819 active_chains = priv->hw_params.valid_rx_ant;
820
821 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
822
823 /* How many receivers should we use? */
824 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
825 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
826
827
828 /* correct rx chain count according hw settings
829 * and chain noise calibration
830 */
831 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
832 if (valid_rx_cnt < active_rx_cnt)
833 active_rx_cnt = valid_rx_cnt;
834
835 if (valid_rx_cnt < idle_rx_cnt)
836 idle_rx_cnt = valid_rx_cnt;
837
838 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
839 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
840
841 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
842
843 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
844 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
845 else
846 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
847
848 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
849 priv->staging_rxon.rx_chain,
850 active_rx_cnt, idle_rx_cnt);
851
852 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
853 active_rx_cnt < idle_rx_cnt);
854 }
855 EXPORT_SYMBOL(iwl_set_rxon_chain);
856
857 /* Return valid channel */
858 u8 iwl_get_single_channel_number(struct iwl_priv *priv,
859 enum ieee80211_band band)
860 {
861 const struct iwl_channel_info *ch_info;
862 int i;
863 u8 channel = 0;
864
865 /* only scan single channel, good enough to reset the RF */
866 /* pick the first valid not in-use channel */
867 if (band == IEEE80211_BAND_5GHZ) {
868 for (i = 14; i < priv->channel_count; i++) {
869 if (priv->channel_info[i].channel !=
870 le16_to_cpu(priv->staging_rxon.channel)) {
871 channel = priv->channel_info[i].channel;
872 ch_info = iwl_get_channel_info(priv,
873 band, channel);
874 if (is_channel_valid(ch_info))
875 break;
876 }
877 }
878 } else {
879 for (i = 0; i < 14; i++) {
880 if (priv->channel_info[i].channel !=
881 le16_to_cpu(priv->staging_rxon.channel)) {
882 channel =
883 priv->channel_info[i].channel;
884 ch_info = iwl_get_channel_info(priv,
885 band, channel);
886 if (is_channel_valid(ch_info))
887 break;
888 }
889 }
890 }
891
892 return channel;
893 }
894 EXPORT_SYMBOL(iwl_get_single_channel_number);
895
896 /**
897 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
898 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
899 * @channel: Any channel valid for the requested phymode
900
901 * In addition to setting the staging RXON, priv->phymode is also set.
902 *
903 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
904 * in the staging RXON flag structure based on the phymode
905 */
906 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
907 {
908 enum ieee80211_band band = ch->band;
909 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
910
911 if (!iwl_get_channel_info(priv, band, channel)) {
912 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
913 channel, band);
914 return -EINVAL;
915 }
916
917 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
918 (priv->band == band))
919 return 0;
920
921 priv->staging_rxon.channel = cpu_to_le16(channel);
922 if (band == IEEE80211_BAND_5GHZ)
923 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
924 else
925 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
926
927 priv->band = band;
928
929 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
930
931 return 0;
932 }
933 EXPORT_SYMBOL(iwl_set_rxon_channel);
934
935 static void iwl_set_flags_for_band(struct iwl_priv *priv,
936 enum ieee80211_band band,
937 struct ieee80211_vif *vif)
938 {
939 if (band == IEEE80211_BAND_5GHZ) {
940 priv->staging_rxon.flags &=
941 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
942 | RXON_FLG_CCK_MSK);
943 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
944 } else {
945 /* Copied from iwl_post_associate() */
946 if (vif && vif->bss_conf.assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
947 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
948 else
949 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
950
951 if (vif && vif->type == NL80211_IFTYPE_ADHOC)
952 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
953
954 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
955 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
956 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
957 }
958 }
959
960 /*
961 * initialize rxon structure with default values from eeprom
962 */
963 void iwl_connection_init_rx_config(struct iwl_priv *priv,
964 struct ieee80211_vif *vif)
965 {
966 const struct iwl_channel_info *ch_info;
967 enum nl80211_iftype type = NL80211_IFTYPE_STATION;
968
969 if (vif)
970 type = vif->type;
971
972 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
973
974 switch (type) {
975 case NL80211_IFTYPE_AP:
976 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
977 break;
978
979 case NL80211_IFTYPE_STATION:
980 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
981 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
982 break;
983
984 case NL80211_IFTYPE_ADHOC:
985 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
986 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
987 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
988 RXON_FILTER_ACCEPT_GRP_MSK;
989 break;
990
991 default:
992 IWL_ERR(priv, "Unsupported interface type %d\n", type);
993 break;
994 }
995
996 #if 0
997 /* TODO: Figure out when short_preamble would be set and cache from
998 * that */
999 if (!hw_to_local(priv->hw)->short_preamble)
1000 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1001 else
1002 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1003 #endif
1004
1005 ch_info = iwl_get_channel_info(priv, priv->band,
1006 le16_to_cpu(priv->active_rxon.channel));
1007
1008 if (!ch_info)
1009 ch_info = &priv->channel_info[0];
1010
1011 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1012 priv->band = ch_info->band;
1013
1014 iwl_set_flags_for_band(priv, priv->band, vif);
1015
1016 priv->staging_rxon.ofdm_basic_rates =
1017 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1018 priv->staging_rxon.cck_basic_rates =
1019 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1020
1021 /* clear both MIX and PURE40 mode flag */
1022 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1023 RXON_FLG_CHANNEL_MODE_PURE_40);
1024 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1025 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1026 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1027 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1028 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1029 }
1030 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1031
1032 static void iwl_set_rate(struct iwl_priv *priv)
1033 {
1034 const struct ieee80211_supported_band *hw = NULL;
1035 struct ieee80211_rate *rate;
1036 int i;
1037
1038 hw = iwl_get_hw_mode(priv, priv->band);
1039 if (!hw) {
1040 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1041 return;
1042 }
1043
1044 priv->active_rate = 0;
1045
1046 for (i = 0; i < hw->n_bitrates; i++) {
1047 rate = &(hw->bitrates[i]);
1048 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
1049 priv->active_rate |= (1 << rate->hw_value);
1050 }
1051
1052 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
1053
1054 priv->staging_rxon.cck_basic_rates =
1055 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1056
1057 priv->staging_rxon.ofdm_basic_rates =
1058 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1059 }
1060
1061 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1062 {
1063 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1064 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1065 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1066
1067 if (priv->switch_rxon.switch_in_progress) {
1068 if (!le32_to_cpu(csa->status) &&
1069 (csa->channel == priv->switch_rxon.channel)) {
1070 rxon->channel = csa->channel;
1071 priv->staging_rxon.channel = csa->channel;
1072 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1073 le16_to_cpu(csa->channel));
1074 } else
1075 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1076 le16_to_cpu(csa->channel));
1077
1078 priv->switch_rxon.switch_in_progress = false;
1079 }
1080 }
1081 EXPORT_SYMBOL(iwl_rx_csa);
1082
1083 #ifdef CONFIG_IWLWIFI_DEBUG
1084 void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1085 {
1086 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1087
1088 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1089 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1090 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1091 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1092 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1093 le32_to_cpu(rxon->filter_flags));
1094 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1095 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1096 rxon->ofdm_basic_rates);
1097 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1098 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1099 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1100 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1101 }
1102 EXPORT_SYMBOL(iwl_print_rx_config_cmd);
1103 #endif
1104 /**
1105 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1106 */
1107 void iwl_irq_handle_error(struct iwl_priv *priv)
1108 {
1109 /* Set the FW error flag -- cleared on iwl_down */
1110 set_bit(STATUS_FW_ERROR, &priv->status);
1111
1112 /* Cancel currently queued command. */
1113 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1114
1115 IWL_ERR(priv, "Loaded firmware version: %s\n",
1116 priv->hw->wiphy->fw_version);
1117
1118 priv->cfg->ops->lib->dump_nic_error_log(priv);
1119 if (priv->cfg->ops->lib->dump_csr)
1120 priv->cfg->ops->lib->dump_csr(priv);
1121 if (priv->cfg->ops->lib->dump_fh)
1122 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
1123 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
1124 #ifdef CONFIG_IWLWIFI_DEBUG
1125 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
1126 iwl_print_rx_config_cmd(priv);
1127 #endif
1128
1129 wake_up_interruptible(&priv->wait_command_queue);
1130
1131 /* Keep the restart process from trying to send host
1132 * commands by clearing the INIT status bit */
1133 clear_bit(STATUS_READY, &priv->status);
1134
1135 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1136 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1137 "Restarting adapter due to uCode error.\n");
1138
1139 if (priv->cfg->mod_params->restart_fw)
1140 queue_work(priv->workqueue, &priv->restart);
1141 }
1142 }
1143 EXPORT_SYMBOL(iwl_irq_handle_error);
1144
1145 static int iwl_apm_stop_master(struct iwl_priv *priv)
1146 {
1147 int ret = 0;
1148
1149 /* stop device's busmaster DMA activity */
1150 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1151
1152 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
1153 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1154 if (ret)
1155 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
1156
1157 IWL_DEBUG_INFO(priv, "stop master\n");
1158
1159 return ret;
1160 }
1161
1162 void iwl_apm_stop(struct iwl_priv *priv)
1163 {
1164 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1165
1166 /* Stop device's DMA activity */
1167 iwl_apm_stop_master(priv);
1168
1169 /* Reset the entire device */
1170 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1171
1172 udelay(10);
1173
1174 /*
1175 * Clear "initialization complete" bit to move adapter from
1176 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1177 */
1178 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1179 }
1180 EXPORT_SYMBOL(iwl_apm_stop);
1181
1182
1183 /*
1184 * Start up NIC's basic functionality after it has been reset
1185 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1186 * NOTE: This does not load uCode nor start the embedded processor
1187 */
1188 int iwl_apm_init(struct iwl_priv *priv)
1189 {
1190 int ret = 0;
1191 u16 lctl;
1192
1193 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1194
1195 /*
1196 * Use "set_bit" below rather than "write", to preserve any hardware
1197 * bits already set by default after reset.
1198 */
1199
1200 /* Disable L0S exit timer (platform NMI Work/Around) */
1201 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1202 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1203
1204 /*
1205 * Disable L0s without affecting L1;
1206 * don't wait for ICH L0s (ICH bug W/A)
1207 */
1208 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1209 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1210
1211 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1212 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1213
1214 /*
1215 * Enable HAP INTA (interrupt from management bus) to
1216 * wake device's PCI Express link L1a -> L0s
1217 * NOTE: This is no-op for 3945 (non-existant bit)
1218 */
1219 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1220 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1221
1222 /*
1223 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1224 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1225 * If so (likely), disable L0S, so device moves directly L0->L1;
1226 * costs negligible amount of power savings.
1227 * If not (unlikely), enable L0S, so there is at least some
1228 * power savings, even without L1.
1229 */
1230 if (priv->cfg->set_l0s) {
1231 lctl = iwl_pcie_link_ctl(priv);
1232 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1233 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1234 /* L1-ASPM enabled; disable(!) L0S */
1235 iwl_set_bit(priv, CSR_GIO_REG,
1236 CSR_GIO_REG_VAL_L0S_ENABLED);
1237 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1238 } else {
1239 /* L1-ASPM disabled; enable(!) L0S */
1240 iwl_clear_bit(priv, CSR_GIO_REG,
1241 CSR_GIO_REG_VAL_L0S_ENABLED);
1242 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1243 }
1244 }
1245
1246 /* Configure analog phase-lock-loop before activating to D0A */
1247 if (priv->cfg->pll_cfg_val)
1248 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1249
1250 /*
1251 * Set "initialization complete" bit to move adapter from
1252 * D0U* --> D0A* (powered-up active) state.
1253 */
1254 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1255
1256 /*
1257 * Wait for clock stabilization; once stabilized, access to
1258 * device-internal resources is supported, e.g. iwl_write_prph()
1259 * and accesses to uCode SRAM.
1260 */
1261 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1262 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1263 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1264 if (ret < 0) {
1265 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1266 goto out;
1267 }
1268
1269 /*
1270 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1271 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1272 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1273 * and don't need BSM to restore data after power-saving sleep.
1274 *
1275 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1276 * do not disable clocks. This preserves any hardware bits already
1277 * set by default in "CLK_CTRL_REG" after reset.
1278 */
1279 if (priv->cfg->use_bsm)
1280 iwl_write_prph(priv, APMG_CLK_EN_REG,
1281 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1282 else
1283 iwl_write_prph(priv, APMG_CLK_EN_REG,
1284 APMG_CLK_VAL_DMA_CLK_RQT);
1285 udelay(20);
1286
1287 /* Disable L1-Active */
1288 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1289 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1290
1291 out:
1292 return ret;
1293 }
1294 EXPORT_SYMBOL(iwl_apm_init);
1295
1296
1297
1298 void iwl_configure_filter(struct ieee80211_hw *hw,
1299 unsigned int changed_flags,
1300 unsigned int *total_flags,
1301 u64 multicast)
1302 {
1303 struct iwl_priv *priv = hw->priv;
1304 __le32 filter_or = 0, filter_nand = 0;
1305
1306 #define CHK(test, flag) do { \
1307 if (*total_flags & (test)) \
1308 filter_or |= (flag); \
1309 else \
1310 filter_nand |= (flag); \
1311 } while (0)
1312
1313 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1314 changed_flags, *total_flags);
1315
1316 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
1317 CHK(FIF_ALLMULTI, RXON_FILTER_ACCEPT_GRP_MSK);
1318 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
1319 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
1320
1321 #undef CHK
1322
1323 mutex_lock(&priv->mutex);
1324
1325 priv->staging_rxon.filter_flags &= ~filter_nand;
1326 priv->staging_rxon.filter_flags |= filter_or;
1327
1328 iwlcore_commit_rxon(priv);
1329
1330 mutex_unlock(&priv->mutex);
1331
1332 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1333 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1334 }
1335 EXPORT_SYMBOL(iwl_configure_filter);
1336
1337 int iwl_set_hw_params(struct iwl_priv *priv)
1338 {
1339 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1340 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1341 if (priv->cfg->mod_params->amsdu_size_8K)
1342 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
1343 else
1344 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
1345
1346 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1347
1348 if (priv->cfg->mod_params->disable_11n)
1349 priv->cfg->sku &= ~IWL_SKU_N;
1350
1351 /* Device-specific setup */
1352 return priv->cfg->ops->lib->set_hw_params(priv);
1353 }
1354 EXPORT_SYMBOL(iwl_set_hw_params);
1355
1356 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1357 {
1358 int ret = 0;
1359 s8 prev_tx_power = priv->tx_power_user_lmt;
1360
1361 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1362 IWL_WARN(priv,
1363 "Requested user TXPOWER %d below lower limit %d.\n",
1364 tx_power,
1365 IWLAGN_TX_POWER_TARGET_POWER_MIN);
1366 return -EINVAL;
1367 }
1368
1369 if (tx_power > priv->tx_power_device_lmt) {
1370 IWL_WARN(priv,
1371 "Requested user TXPOWER %d above upper limit %d.\n",
1372 tx_power, priv->tx_power_device_lmt);
1373 return -EINVAL;
1374 }
1375
1376 if (priv->tx_power_user_lmt != tx_power)
1377 force = true;
1378
1379 /* if nic is not up don't send command */
1380 if (iwl_is_ready_rf(priv)) {
1381 priv->tx_power_user_lmt = tx_power;
1382 if (force && priv->cfg->ops->lib->send_tx_power)
1383 ret = priv->cfg->ops->lib->send_tx_power(priv);
1384 else if (!priv->cfg->ops->lib->send_tx_power)
1385 ret = -EOPNOTSUPP;
1386 /*
1387 * if fail to set tx_power, restore the orig. tx power
1388 */
1389 if (ret)
1390 priv->tx_power_user_lmt = prev_tx_power;
1391 }
1392
1393 /*
1394 * Even this is an async host command, the command
1395 * will always report success from uCode
1396 * So once driver can placing the command into the queue
1397 * successfully, driver can use priv->tx_power_user_lmt
1398 * to reflect the current tx power
1399 */
1400 return ret;
1401 }
1402 EXPORT_SYMBOL(iwl_set_tx_power);
1403
1404 irqreturn_t iwl_isr_legacy(int irq, void *data)
1405 {
1406 struct iwl_priv *priv = data;
1407 u32 inta, inta_mask;
1408 u32 inta_fh;
1409 unsigned long flags;
1410 if (!priv)
1411 return IRQ_NONE;
1412
1413 spin_lock_irqsave(&priv->lock, flags);
1414
1415 /* Disable (but don't clear!) interrupts here to avoid
1416 * back-to-back ISRs and sporadic interrupts from our NIC.
1417 * If we have something to service, the tasklet will re-enable ints.
1418 * If we *don't* have something, we'll re-enable before leaving here. */
1419 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1420 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1421
1422 /* Discover which interrupts are active/pending */
1423 inta = iwl_read32(priv, CSR_INT);
1424 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1425
1426 /* Ignore interrupt if there's nothing in NIC to service.
1427 * This may be due to IRQ shared with another device,
1428 * or due to sporadic interrupts thrown from our NIC. */
1429 if (!inta && !inta_fh) {
1430 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1431 goto none;
1432 }
1433
1434 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1435 /* Hardware disappeared. It might have already raised
1436 * an interrupt */
1437 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1438 goto unplugged;
1439 }
1440
1441 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1442 inta, inta_mask, inta_fh);
1443
1444 inta &= ~CSR_INT_BIT_SCD;
1445
1446 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1447 if (likely(inta || inta_fh))
1448 tasklet_schedule(&priv->irq_tasklet);
1449
1450 unplugged:
1451 spin_unlock_irqrestore(&priv->lock, flags);
1452 return IRQ_HANDLED;
1453
1454 none:
1455 /* re-enable interrupts here since we don't have anything to service. */
1456 /* only Re-enable if diabled by irq */
1457 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1458 iwl_enable_interrupts(priv);
1459 spin_unlock_irqrestore(&priv->lock, flags);
1460 return IRQ_NONE;
1461 }
1462 EXPORT_SYMBOL(iwl_isr_legacy);
1463
1464 void iwl_send_bt_config(struct iwl_priv *priv)
1465 {
1466 struct iwl_bt_cmd bt_cmd = {
1467 .lead_time = BT_LEAD_TIME_DEF,
1468 .max_kill = BT_MAX_KILL_DEF,
1469 .kill_ack_mask = 0,
1470 .kill_cts_mask = 0,
1471 };
1472
1473 if (!bt_coex_active)
1474 bt_cmd.flags = BT_COEX_DISABLE;
1475 else
1476 bt_cmd.flags = BT_COEX_ENABLE;
1477
1478 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1479 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1480
1481 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1482 sizeof(struct iwl_bt_cmd), &bt_cmd))
1483 IWL_ERR(priv, "failed to send BT Coex Config\n");
1484 }
1485 EXPORT_SYMBOL(iwl_send_bt_config);
1486
1487 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
1488 {
1489 struct iwl_statistics_cmd statistics_cmd = {
1490 .configuration_flags =
1491 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
1492 };
1493
1494 if (flags & CMD_ASYNC)
1495 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1496 sizeof(struct iwl_statistics_cmd),
1497 &statistics_cmd, NULL);
1498 else
1499 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1500 sizeof(struct iwl_statistics_cmd),
1501 &statistics_cmd);
1502 }
1503 EXPORT_SYMBOL(iwl_send_statistics_request);
1504
1505 /**
1506 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1507 * using sample data 100 bytes apart. If these sample points are good,
1508 * it's a pretty good bet that everything between them is good, too.
1509 */
1510 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1511 {
1512 u32 val;
1513 int ret = 0;
1514 u32 errcnt = 0;
1515 u32 i;
1516
1517 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1518
1519 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1520 /* read data comes through single port, auto-incr addr */
1521 /* NOTE: Use the debugless read so we don't flood kernel log
1522 * if IWL_DL_IO is set */
1523 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1524 i + IWL49_RTC_INST_LOWER_BOUND);
1525 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1526 if (val != le32_to_cpu(*image)) {
1527 ret = -EIO;
1528 errcnt++;
1529 if (errcnt >= 3)
1530 break;
1531 }
1532 }
1533
1534 return ret;
1535 }
1536
1537 /**
1538 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1539 * looking at all data.
1540 */
1541 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1542 u32 len)
1543 {
1544 u32 val;
1545 u32 save_len = len;
1546 int ret = 0;
1547 u32 errcnt;
1548
1549 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1550
1551 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1552 IWL49_RTC_INST_LOWER_BOUND);
1553
1554 errcnt = 0;
1555 for (; len > 0; len -= sizeof(u32), image++) {
1556 /* read data comes through single port, auto-incr addr */
1557 /* NOTE: Use the debugless read so we don't flood kernel log
1558 * if IWL_DL_IO is set */
1559 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1560 if (val != le32_to_cpu(*image)) {
1561 IWL_ERR(priv, "uCode INST section is invalid at "
1562 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1563 save_len - len, val, le32_to_cpu(*image));
1564 ret = -EIO;
1565 errcnt++;
1566 if (errcnt >= 20)
1567 break;
1568 }
1569 }
1570
1571 if (!errcnt)
1572 IWL_DEBUG_INFO(priv,
1573 "ucode image in INSTRUCTION memory is good\n");
1574
1575 return ret;
1576 }
1577
1578 /**
1579 * iwl_verify_ucode - determine which instruction image is in SRAM,
1580 * and verify its contents
1581 */
1582 int iwl_verify_ucode(struct iwl_priv *priv)
1583 {
1584 __le32 *image;
1585 u32 len;
1586 int ret;
1587
1588 /* Try bootstrap */
1589 image = (__le32 *)priv->ucode_boot.v_addr;
1590 len = priv->ucode_boot.len;
1591 ret = iwlcore_verify_inst_sparse(priv, image, len);
1592 if (!ret) {
1593 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
1594 return 0;
1595 }
1596
1597 /* Try initialize */
1598 image = (__le32 *)priv->ucode_init.v_addr;
1599 len = priv->ucode_init.len;
1600 ret = iwlcore_verify_inst_sparse(priv, image, len);
1601 if (!ret) {
1602 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
1603 return 0;
1604 }
1605
1606 /* Try runtime/protocol */
1607 image = (__le32 *)priv->ucode_code.v_addr;
1608 len = priv->ucode_code.len;
1609 ret = iwlcore_verify_inst_sparse(priv, image, len);
1610 if (!ret) {
1611 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
1612 return 0;
1613 }
1614
1615 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1616
1617 /* Since nothing seems to match, show first several data entries in
1618 * instruction SRAM, so maybe visual inspection will give a clue.
1619 * Selection of bootstrap image (vs. other images) is arbitrary. */
1620 image = (__le32 *)priv->ucode_boot.v_addr;
1621 len = priv->ucode_boot.len;
1622 ret = iwl_verify_inst_full(priv, image, len);
1623
1624 return ret;
1625 }
1626 EXPORT_SYMBOL(iwl_verify_ucode);
1627
1628
1629 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1630 {
1631 struct iwl_ct_kill_config cmd;
1632 struct iwl_ct_kill_throttling_config adv_cmd;
1633 unsigned long flags;
1634 int ret = 0;
1635
1636 spin_lock_irqsave(&priv->lock, flags);
1637 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1638 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1639 spin_unlock_irqrestore(&priv->lock, flags);
1640 priv->thermal_throttle.ct_kill_toggle = false;
1641
1642 if (priv->cfg->support_ct_kill_exit) {
1643 adv_cmd.critical_temperature_enter =
1644 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1645 adv_cmd.critical_temperature_exit =
1646 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1647
1648 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1649 sizeof(adv_cmd), &adv_cmd);
1650 if (ret)
1651 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1652 else
1653 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1654 "succeeded, "
1655 "critical temperature enter is %d,"
1656 "exit is %d\n",
1657 priv->hw_params.ct_kill_threshold,
1658 priv->hw_params.ct_kill_exit_threshold);
1659 } else {
1660 cmd.critical_temperature_R =
1661 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1662
1663 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1664 sizeof(cmd), &cmd);
1665 if (ret)
1666 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1667 else
1668 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1669 "succeeded, "
1670 "critical temperature is %d\n",
1671 priv->hw_params.ct_kill_threshold);
1672 }
1673 }
1674 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
1675
1676
1677 /*
1678 * CARD_STATE_CMD
1679 *
1680 * Use: Sets the device's internal card state to enable, disable, or halt
1681 *
1682 * When in the 'enable' state the card operates as normal.
1683 * When in the 'disable' state, the card enters into a low power mode.
1684 * When in the 'halt' state, the card is shut down and must be fully
1685 * restarted to come back on.
1686 */
1687 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1688 {
1689 struct iwl_host_cmd cmd = {
1690 .id = REPLY_CARD_STATE_CMD,
1691 .len = sizeof(u32),
1692 .data = &flags,
1693 .flags = meta_flag,
1694 };
1695
1696 return iwl_send_cmd(priv, &cmd);
1697 }
1698
1699 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1700 struct iwl_rx_mem_buffer *rxb)
1701 {
1702 #ifdef CONFIG_IWLWIFI_DEBUG
1703 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1704 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1705 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1706 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1707 #endif
1708 }
1709 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1710
1711 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1712 struct iwl_rx_mem_buffer *rxb)
1713 {
1714 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1715 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1716 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
1717 "notification for %s:\n", len,
1718 get_cmd_string(pkt->hdr.cmd));
1719 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
1720 }
1721 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
1722
1723 void iwl_rx_reply_error(struct iwl_priv *priv,
1724 struct iwl_rx_mem_buffer *rxb)
1725 {
1726 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1727
1728 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1729 "seq 0x%04X ser 0x%08X\n",
1730 le32_to_cpu(pkt->u.err_resp.error_type),
1731 get_cmd_string(pkt->u.err_resp.cmd_id),
1732 pkt->u.err_resp.cmd_id,
1733 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1734 le32_to_cpu(pkt->u.err_resp.error_info));
1735 }
1736 EXPORT_SYMBOL(iwl_rx_reply_error);
1737
1738 void iwl_clear_isr_stats(struct iwl_priv *priv)
1739 {
1740 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1741 }
1742
1743 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1744 const struct ieee80211_tx_queue_params *params)
1745 {
1746 struct iwl_priv *priv = hw->priv;
1747 unsigned long flags;
1748 int q;
1749
1750 IWL_DEBUG_MAC80211(priv, "enter\n");
1751
1752 if (!iwl_is_ready_rf(priv)) {
1753 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1754 return -EIO;
1755 }
1756
1757 if (queue >= AC_NUM) {
1758 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1759 return 0;
1760 }
1761
1762 q = AC_NUM - 1 - queue;
1763
1764 spin_lock_irqsave(&priv->lock, flags);
1765
1766 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1767 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1768 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1769 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1770 cpu_to_le16((params->txop * 32));
1771
1772 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1773
1774 spin_unlock_irqrestore(&priv->lock, flags);
1775
1776 IWL_DEBUG_MAC80211(priv, "leave\n");
1777 return 0;
1778 }
1779 EXPORT_SYMBOL(iwl_mac_conf_tx);
1780
1781 static void iwl_ht_conf(struct iwl_priv *priv,
1782 struct ieee80211_vif *vif)
1783 {
1784 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
1785 struct ieee80211_sta *sta;
1786 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1787
1788 IWL_DEBUG_MAC80211(priv, "enter:\n");
1789
1790 if (!ht_conf->is_ht)
1791 return;
1792
1793 ht_conf->ht_protection =
1794 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
1795 ht_conf->non_GF_STA_present =
1796 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
1797
1798 ht_conf->single_chain_sufficient = false;
1799
1800 switch (vif->type) {
1801 case NL80211_IFTYPE_STATION:
1802 rcu_read_lock();
1803 sta = ieee80211_find_sta(vif, bss_conf->bssid);
1804 if (sta) {
1805 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1806 int maxstreams;
1807
1808 maxstreams = (ht_cap->mcs.tx_params &
1809 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1810 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1811 maxstreams += 1;
1812
1813 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1814 (ht_cap->mcs.rx_mask[2] == 0))
1815 ht_conf->single_chain_sufficient = true;
1816 if (maxstreams <= 1)
1817 ht_conf->single_chain_sufficient = true;
1818 } else {
1819 /*
1820 * If at all, this can only happen through a race
1821 * when the AP disconnects us while we're still
1822 * setting up the connection, in that case mac80211
1823 * will soon tell us about that.
1824 */
1825 ht_conf->single_chain_sufficient = true;
1826 }
1827 rcu_read_unlock();
1828 break;
1829 case NL80211_IFTYPE_ADHOC:
1830 ht_conf->single_chain_sufficient = true;
1831 break;
1832 default:
1833 break;
1834 }
1835
1836 IWL_DEBUG_MAC80211(priv, "leave\n");
1837 }
1838
1839 static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1840 {
1841 iwl_led_disassociate(priv);
1842 /*
1843 * inform the ucode that there is no longer an
1844 * association and that no more packets should be
1845 * sent
1846 */
1847 priv->staging_rxon.filter_flags &=
1848 ~RXON_FILTER_ASSOC_MSK;
1849 priv->staging_rxon.assoc_id = 0;
1850 iwlcore_commit_rxon(priv);
1851 }
1852
1853 void iwl_bss_info_changed(struct ieee80211_hw *hw,
1854 struct ieee80211_vif *vif,
1855 struct ieee80211_bss_conf *bss_conf,
1856 u32 changes)
1857 {
1858 struct iwl_priv *priv = hw->priv;
1859 int ret;
1860
1861 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1862
1863 if (!iwl_is_alive(priv))
1864 return;
1865
1866 mutex_lock(&priv->mutex);
1867
1868 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
1869 dev_kfree_skb(priv->ibss_beacon);
1870 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1871 }
1872
1873 if (changes & BSS_CHANGED_BEACON_INT) {
1874 /* TODO: in AP mode, do something to make this take effect */
1875 }
1876
1877 if (changes & BSS_CHANGED_BSSID) {
1878 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1879
1880 /*
1881 * If there is currently a HW scan going on in the
1882 * background then we need to cancel it else the RXON
1883 * below/in post_associate will fail.
1884 */
1885 if (iwl_scan_cancel_timeout(priv, 100)) {
1886 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
1887 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1888 mutex_unlock(&priv->mutex);
1889 return;
1890 }
1891
1892 /* mac80211 only sets assoc when in STATION mode */
1893 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
1894 memcpy(priv->staging_rxon.bssid_addr,
1895 bss_conf->bssid, ETH_ALEN);
1896
1897 /* currently needed in a few places */
1898 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1899 } else {
1900 priv->staging_rxon.filter_flags &=
1901 ~RXON_FILTER_ASSOC_MSK;
1902 }
1903
1904 }
1905
1906 /*
1907 * This needs to be after setting the BSSID in case
1908 * mac80211 decides to do both changes at once because
1909 * it will invoke post_associate.
1910 */
1911 if (vif->type == NL80211_IFTYPE_ADHOC &&
1912 changes & BSS_CHANGED_BEACON) {
1913 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1914
1915 if (beacon)
1916 iwl_mac_beacon_update(hw, beacon);
1917 }
1918
1919 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1920 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1921 bss_conf->use_short_preamble);
1922 if (bss_conf->use_short_preamble)
1923 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1924 else
1925 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1926 }
1927
1928 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1929 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1930 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1931 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1932 else
1933 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1934 }
1935
1936 if (changes & BSS_CHANGED_BASIC_RATES) {
1937 /* XXX use this information
1938 *
1939 * To do that, remove code from iwl_set_rate() and put something
1940 * like this here:
1941 *
1942 if (A-band)
1943 priv->staging_rxon.ofdm_basic_rates =
1944 bss_conf->basic_rates;
1945 else
1946 priv->staging_rxon.ofdm_basic_rates =
1947 bss_conf->basic_rates >> 4;
1948 priv->staging_rxon.cck_basic_rates =
1949 bss_conf->basic_rates & 0xF;
1950 */
1951 }
1952
1953 if (changes & BSS_CHANGED_HT) {
1954 iwl_ht_conf(priv, vif);
1955
1956 if (priv->cfg->ops->hcmd->set_rxon_chain)
1957 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1958 }
1959
1960 if (changes & BSS_CHANGED_ASSOC) {
1961 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
1962 if (bss_conf->assoc) {
1963 priv->timestamp = bss_conf->timestamp;
1964
1965 iwl_led_associate(priv);
1966
1967 if (!iwl_is_rfkill(priv))
1968 priv->cfg->ops->lib->post_associate(priv, vif);
1969 } else
1970 iwl_set_no_assoc(priv);
1971 }
1972
1973 if (changes && iwl_is_associated(priv) && bss_conf->aid) {
1974 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1975 changes);
1976 ret = iwl_send_rxon_assoc(priv);
1977 if (!ret) {
1978 /* Sync active_rxon with latest change. */
1979 memcpy((void *)&priv->active_rxon,
1980 &priv->staging_rxon,
1981 sizeof(struct iwl_rxon_cmd));
1982 }
1983 }
1984
1985 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1986 if (vif->bss_conf.enable_beacon) {
1987 memcpy(priv->staging_rxon.bssid_addr,
1988 bss_conf->bssid, ETH_ALEN);
1989 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1990 iwlcore_config_ap(priv, vif);
1991 } else
1992 iwl_set_no_assoc(priv);
1993 }
1994
1995 if (changes & BSS_CHANGED_IBSS) {
1996 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1997 bss_conf->ibss_joined);
1998 if (ret)
1999 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
2000 bss_conf->ibss_joined ? "add" : "remove",
2001 bss_conf->bssid);
2002 }
2003
2004 mutex_unlock(&priv->mutex);
2005
2006 IWL_DEBUG_MAC80211(priv, "leave\n");
2007 }
2008 EXPORT_SYMBOL(iwl_bss_info_changed);
2009
2010 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2011 {
2012 struct iwl_priv *priv = hw->priv;
2013 unsigned long flags;
2014 __le64 timestamp;
2015
2016 IWL_DEBUG_MAC80211(priv, "enter\n");
2017
2018 if (!iwl_is_ready_rf(priv)) {
2019 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2020 return -EIO;
2021 }
2022
2023 spin_lock_irqsave(&priv->lock, flags);
2024
2025 if (priv->ibss_beacon)
2026 dev_kfree_skb(priv->ibss_beacon);
2027
2028 priv->ibss_beacon = skb;
2029
2030 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2031 priv->timestamp = le64_to_cpu(timestamp);
2032
2033 IWL_DEBUG_MAC80211(priv, "leave\n");
2034 spin_unlock_irqrestore(&priv->lock, flags);
2035
2036 priv->cfg->ops->lib->post_associate(priv, priv->vif);
2037
2038 return 0;
2039 }
2040 EXPORT_SYMBOL(iwl_mac_beacon_update);
2041
2042 static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
2043 {
2044 iwl_connection_init_rx_config(priv, vif);
2045
2046 if (priv->cfg->ops->hcmd->set_rxon_chain)
2047 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2048
2049 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2050
2051 return iwlcore_commit_rxon(priv);
2052 }
2053
2054 int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2055 {
2056 struct iwl_priv *priv = hw->priv;
2057 int err = 0;
2058
2059 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
2060
2061 mutex_lock(&priv->mutex);
2062
2063 if (WARN_ON(!iwl_is_ready_rf(priv))) {
2064 err = -EINVAL;
2065 goto out;
2066 }
2067
2068 if (priv->vif) {
2069 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2070 err = -EOPNOTSUPP;
2071 goto out;
2072 }
2073
2074 priv->vif = vif;
2075 priv->iw_mode = vif->type;
2076
2077 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
2078 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
2079
2080 err = iwl_set_mode(priv, vif);
2081 if (err)
2082 goto out_err;
2083
2084 goto out;
2085
2086 out_err:
2087 priv->vif = NULL;
2088 priv->iw_mode = NL80211_IFTYPE_STATION;
2089 out:
2090 mutex_unlock(&priv->mutex);
2091
2092 IWL_DEBUG_MAC80211(priv, "leave\n");
2093 return err;
2094 }
2095 EXPORT_SYMBOL(iwl_mac_add_interface);
2096
2097 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2098 struct ieee80211_vif *vif)
2099 {
2100 struct iwl_priv *priv = hw->priv;
2101
2102 IWL_DEBUG_MAC80211(priv, "enter\n");
2103
2104 mutex_lock(&priv->mutex);
2105
2106 if (iwl_is_ready_rf(priv)) {
2107 iwl_scan_cancel_timeout(priv, 100);
2108 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2109 iwlcore_commit_rxon(priv);
2110 }
2111 if (priv->vif == vif) {
2112 priv->vif = NULL;
2113 memset(priv->bssid, 0, ETH_ALEN);
2114 }
2115 mutex_unlock(&priv->mutex);
2116
2117 IWL_DEBUG_MAC80211(priv, "leave\n");
2118
2119 }
2120 EXPORT_SYMBOL(iwl_mac_remove_interface);
2121
2122 /**
2123 * iwl_mac_config - mac80211 config callback
2124 */
2125 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2126 {
2127 struct iwl_priv *priv = hw->priv;
2128 const struct iwl_channel_info *ch_info;
2129 struct ieee80211_conf *conf = &hw->conf;
2130 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2131 unsigned long flags = 0;
2132 int ret = 0;
2133 u16 ch;
2134 int scan_active = 0;
2135
2136 mutex_lock(&priv->mutex);
2137
2138 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2139 conf->channel->hw_value, changed);
2140
2141 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2142 test_bit(STATUS_SCANNING, &priv->status))) {
2143 scan_active = 1;
2144 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2145 }
2146
2147 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2148 IEEE80211_CONF_CHANGE_CHANNEL)) {
2149 /* mac80211 uses static for non-HT which is what we want */
2150 priv->current_ht_config.smps = conf->smps_mode;
2151
2152 /*
2153 * Recalculate chain counts.
2154 *
2155 * If monitor mode is enabled then mac80211 will
2156 * set up the SM PS mode to OFF if an HT channel is
2157 * configured.
2158 */
2159 if (priv->cfg->ops->hcmd->set_rxon_chain)
2160 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2161 }
2162
2163 /* during scanning mac80211 will delay channel setting until
2164 * scan finish with changed = 0
2165 */
2166 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2167 if (scan_active)
2168 goto set_ch_out;
2169
2170 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2171 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2172 if (!is_channel_valid(ch_info)) {
2173 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2174 ret = -EINVAL;
2175 goto set_ch_out;
2176 }
2177
2178 spin_lock_irqsave(&priv->lock, flags);
2179
2180 /* Configure HT40 channels */
2181 ht_conf->is_ht = conf_is_ht(conf);
2182 if (ht_conf->is_ht) {
2183 if (conf_is_ht40_minus(conf)) {
2184 ht_conf->extension_chan_offset =
2185 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2186 ht_conf->is_40mhz = true;
2187 } else if (conf_is_ht40_plus(conf)) {
2188 ht_conf->extension_chan_offset =
2189 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2190 ht_conf->is_40mhz = true;
2191 } else {
2192 ht_conf->extension_chan_offset =
2193 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2194 ht_conf->is_40mhz = false;
2195 }
2196 } else
2197 ht_conf->is_40mhz = false;
2198 /* Default to no protection. Protection mode will later be set
2199 * from BSS config in iwl_ht_conf */
2200 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2201
2202 /* if we are switching from ht to 2.4 clear flags
2203 * from any ht related info since 2.4 does not
2204 * support ht */
2205 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2206 priv->staging_rxon.flags = 0;
2207
2208 iwl_set_rxon_channel(priv, conf->channel);
2209 iwl_set_rxon_ht(priv, ht_conf);
2210
2211 iwl_set_flags_for_band(priv, conf->channel->band, priv->vif);
2212 spin_unlock_irqrestore(&priv->lock, flags);
2213 if (iwl_is_associated(priv) &&
2214 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2215 priv->cfg->ops->lib->set_channel_switch) {
2216 iwl_set_rate(priv);
2217 /*
2218 * at this point, staging_rxon has the
2219 * configuration for channel switch
2220 */
2221 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2222 ch);
2223 if (!ret) {
2224 iwl_print_rx_config_cmd(priv);
2225 goto out;
2226 }
2227 priv->switch_rxon.switch_in_progress = false;
2228 }
2229 set_ch_out:
2230 /* The list of supported rates and rate mask can be different
2231 * for each band; since the band may have changed, reset
2232 * the rate mask to what mac80211 lists */
2233 iwl_set_rate(priv);
2234 }
2235
2236 if (changed & (IEEE80211_CONF_CHANGE_PS |
2237 IEEE80211_CONF_CHANGE_IDLE)) {
2238 ret = iwl_power_update_mode(priv, false);
2239 if (ret)
2240 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
2241 }
2242
2243 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2244 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2245 priv->tx_power_user_lmt, conf->power_level);
2246
2247 iwl_set_tx_power(priv, conf->power_level, false);
2248 }
2249
2250 if (changed & IEEE80211_CONF_CHANGE_QOS) {
2251 bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
2252
2253 spin_lock_irqsave(&priv->lock, flags);
2254 priv->qos_data.qos_active = qos_active;
2255 iwl_update_qos(priv);
2256 spin_unlock_irqrestore(&priv->lock, flags);
2257 }
2258
2259 if (!iwl_is_ready(priv)) {
2260 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2261 goto out;
2262 }
2263
2264 if (scan_active)
2265 goto out;
2266
2267 if (memcmp(&priv->active_rxon,
2268 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2269 iwlcore_commit_rxon(priv);
2270 else
2271 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2272
2273
2274 out:
2275 IWL_DEBUG_MAC80211(priv, "leave\n");
2276 mutex_unlock(&priv->mutex);
2277 return ret;
2278 }
2279 EXPORT_SYMBOL(iwl_mac_config);
2280
2281 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2282 {
2283 struct iwl_priv *priv = hw->priv;
2284 unsigned long flags;
2285
2286 mutex_lock(&priv->mutex);
2287 IWL_DEBUG_MAC80211(priv, "enter\n");
2288
2289 spin_lock_irqsave(&priv->lock, flags);
2290 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
2291 spin_unlock_irqrestore(&priv->lock, flags);
2292
2293 spin_lock_irqsave(&priv->lock, flags);
2294
2295 /* new association get rid of ibss beacon skb */
2296 if (priv->ibss_beacon)
2297 dev_kfree_skb(priv->ibss_beacon);
2298
2299 priv->ibss_beacon = NULL;
2300
2301 priv->timestamp = 0;
2302
2303 spin_unlock_irqrestore(&priv->lock, flags);
2304
2305 if (!iwl_is_ready_rf(priv)) {
2306 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2307 mutex_unlock(&priv->mutex);
2308 return;
2309 }
2310
2311 /* we are restarting association process
2312 * clear RXON_FILTER_ASSOC_MSK bit
2313 */
2314 iwl_scan_cancel_timeout(priv, 100);
2315 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2316 iwlcore_commit_rxon(priv);
2317
2318 iwl_set_rate(priv);
2319
2320 mutex_unlock(&priv->mutex);
2321
2322 IWL_DEBUG_MAC80211(priv, "leave\n");
2323 }
2324 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2325
2326 int iwl_alloc_txq_mem(struct iwl_priv *priv)
2327 {
2328 if (!priv->txq)
2329 priv->txq = kzalloc(
2330 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2331 GFP_KERNEL);
2332 if (!priv->txq) {
2333 IWL_ERR(priv, "Not enough memory for txq\n");
2334 return -ENOMEM;
2335 }
2336 return 0;
2337 }
2338 EXPORT_SYMBOL(iwl_alloc_txq_mem);
2339
2340 void iwl_free_txq_mem(struct iwl_priv *priv)
2341 {
2342 kfree(priv->txq);
2343 priv->txq = NULL;
2344 }
2345 EXPORT_SYMBOL(iwl_free_txq_mem);
2346
2347 #ifdef CONFIG_IWLWIFI_DEBUGFS
2348
2349 #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2350
2351 void iwl_reset_traffic_log(struct iwl_priv *priv)
2352 {
2353 priv->tx_traffic_idx = 0;
2354 priv->rx_traffic_idx = 0;
2355 if (priv->tx_traffic)
2356 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2357 if (priv->rx_traffic)
2358 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2359 }
2360
2361 int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2362 {
2363 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2364
2365 if (iwl_debug_level & IWL_DL_TX) {
2366 if (!priv->tx_traffic) {
2367 priv->tx_traffic =
2368 kzalloc(traffic_size, GFP_KERNEL);
2369 if (!priv->tx_traffic)
2370 return -ENOMEM;
2371 }
2372 }
2373 if (iwl_debug_level & IWL_DL_RX) {
2374 if (!priv->rx_traffic) {
2375 priv->rx_traffic =
2376 kzalloc(traffic_size, GFP_KERNEL);
2377 if (!priv->rx_traffic)
2378 return -ENOMEM;
2379 }
2380 }
2381 iwl_reset_traffic_log(priv);
2382 return 0;
2383 }
2384 EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2385
2386 void iwl_free_traffic_mem(struct iwl_priv *priv)
2387 {
2388 kfree(priv->tx_traffic);
2389 priv->tx_traffic = NULL;
2390
2391 kfree(priv->rx_traffic);
2392 priv->rx_traffic = NULL;
2393 }
2394 EXPORT_SYMBOL(iwl_free_traffic_mem);
2395
2396 void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2397 u16 length, struct ieee80211_hdr *header)
2398 {
2399 __le16 fc;
2400 u16 len;
2401
2402 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2403 return;
2404
2405 if (!priv->tx_traffic)
2406 return;
2407
2408 fc = header->frame_control;
2409 if (ieee80211_is_data(fc)) {
2410 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2411 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2412 memcpy((priv->tx_traffic +
2413 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2414 header, len);
2415 priv->tx_traffic_idx =
2416 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2417 }
2418 }
2419 EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2420
2421 void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2422 u16 length, struct ieee80211_hdr *header)
2423 {
2424 __le16 fc;
2425 u16 len;
2426
2427 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2428 return;
2429
2430 if (!priv->rx_traffic)
2431 return;
2432
2433 fc = header->frame_control;
2434 if (ieee80211_is_data(fc)) {
2435 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2436 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2437 memcpy((priv->rx_traffic +
2438 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2439 header, len);
2440 priv->rx_traffic_idx =
2441 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2442 }
2443 }
2444 EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
2445
2446 const char *get_mgmt_string(int cmd)
2447 {
2448 switch (cmd) {
2449 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2450 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2451 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2452 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2453 IWL_CMD(MANAGEMENT_PROBE_REQ);
2454 IWL_CMD(MANAGEMENT_PROBE_RESP);
2455 IWL_CMD(MANAGEMENT_BEACON);
2456 IWL_CMD(MANAGEMENT_ATIM);
2457 IWL_CMD(MANAGEMENT_DISASSOC);
2458 IWL_CMD(MANAGEMENT_AUTH);
2459 IWL_CMD(MANAGEMENT_DEAUTH);
2460 IWL_CMD(MANAGEMENT_ACTION);
2461 default:
2462 return "UNKNOWN";
2463
2464 }
2465 }
2466
2467 const char *get_ctrl_string(int cmd)
2468 {
2469 switch (cmd) {
2470 IWL_CMD(CONTROL_BACK_REQ);
2471 IWL_CMD(CONTROL_BACK);
2472 IWL_CMD(CONTROL_PSPOLL);
2473 IWL_CMD(CONTROL_RTS);
2474 IWL_CMD(CONTROL_CTS);
2475 IWL_CMD(CONTROL_ACK);
2476 IWL_CMD(CONTROL_CFEND);
2477 IWL_CMD(CONTROL_CFENDACK);
2478 default:
2479 return "UNKNOWN";
2480
2481 }
2482 }
2483
2484 void iwl_clear_traffic_stats(struct iwl_priv *priv)
2485 {
2486 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
2487 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
2488 priv->led_tpt = 0;
2489 }
2490
2491 /*
2492 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2493 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2494 * Use debugFs to display the rx/rx_statistics
2495 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2496 * information will be recorded, but DATA pkt still will be recorded
2497 * for the reason of iwl_led.c need to control the led blinking based on
2498 * number of tx and rx data.
2499 *
2500 */
2501 void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2502 {
2503 struct traffic_stats *stats;
2504
2505 if (is_tx)
2506 stats = &priv->tx_stats;
2507 else
2508 stats = &priv->rx_stats;
2509
2510 if (ieee80211_is_mgmt(fc)) {
2511 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2512 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2513 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2514 break;
2515 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2516 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2517 break;
2518 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2519 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2520 break;
2521 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2522 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2523 break;
2524 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2525 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2526 break;
2527 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2528 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2529 break;
2530 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2531 stats->mgmt[MANAGEMENT_BEACON]++;
2532 break;
2533 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2534 stats->mgmt[MANAGEMENT_ATIM]++;
2535 break;
2536 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2537 stats->mgmt[MANAGEMENT_DISASSOC]++;
2538 break;
2539 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2540 stats->mgmt[MANAGEMENT_AUTH]++;
2541 break;
2542 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2543 stats->mgmt[MANAGEMENT_DEAUTH]++;
2544 break;
2545 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2546 stats->mgmt[MANAGEMENT_ACTION]++;
2547 break;
2548 }
2549 } else if (ieee80211_is_ctl(fc)) {
2550 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2551 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2552 stats->ctrl[CONTROL_BACK_REQ]++;
2553 break;
2554 case cpu_to_le16(IEEE80211_STYPE_BACK):
2555 stats->ctrl[CONTROL_BACK]++;
2556 break;
2557 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2558 stats->ctrl[CONTROL_PSPOLL]++;
2559 break;
2560 case cpu_to_le16(IEEE80211_STYPE_RTS):
2561 stats->ctrl[CONTROL_RTS]++;
2562 break;
2563 case cpu_to_le16(IEEE80211_STYPE_CTS):
2564 stats->ctrl[CONTROL_CTS]++;
2565 break;
2566 case cpu_to_le16(IEEE80211_STYPE_ACK):
2567 stats->ctrl[CONTROL_ACK]++;
2568 break;
2569 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2570 stats->ctrl[CONTROL_CFEND]++;
2571 break;
2572 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2573 stats->ctrl[CONTROL_CFENDACK]++;
2574 break;
2575 }
2576 } else {
2577 /* data */
2578 stats->data_cnt++;
2579 stats->data_bytes += len;
2580 }
2581 iwl_leds_background(priv);
2582 }
2583 EXPORT_SYMBOL(iwl_update_stats);
2584 #endif
2585
2586 const static char *get_csr_string(int cmd)
2587 {
2588 switch (cmd) {
2589 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2590 IWL_CMD(CSR_INT_COALESCING);
2591 IWL_CMD(CSR_INT);
2592 IWL_CMD(CSR_INT_MASK);
2593 IWL_CMD(CSR_FH_INT_STATUS);
2594 IWL_CMD(CSR_GPIO_IN);
2595 IWL_CMD(CSR_RESET);
2596 IWL_CMD(CSR_GP_CNTRL);
2597 IWL_CMD(CSR_HW_REV);
2598 IWL_CMD(CSR_EEPROM_REG);
2599 IWL_CMD(CSR_EEPROM_GP);
2600 IWL_CMD(CSR_OTP_GP_REG);
2601 IWL_CMD(CSR_GIO_REG);
2602 IWL_CMD(CSR_GP_UCODE_REG);
2603 IWL_CMD(CSR_GP_DRIVER_REG);
2604 IWL_CMD(CSR_UCODE_DRV_GP1);
2605 IWL_CMD(CSR_UCODE_DRV_GP2);
2606 IWL_CMD(CSR_LED_REG);
2607 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2608 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2609 IWL_CMD(CSR_ANA_PLL_CFG);
2610 IWL_CMD(CSR_HW_REV_WA_REG);
2611 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2612 default:
2613 return "UNKNOWN";
2614
2615 }
2616 }
2617
2618 void iwl_dump_csr(struct iwl_priv *priv)
2619 {
2620 int i;
2621 u32 csr_tbl[] = {
2622 CSR_HW_IF_CONFIG_REG,
2623 CSR_INT_COALESCING,
2624 CSR_INT,
2625 CSR_INT_MASK,
2626 CSR_FH_INT_STATUS,
2627 CSR_GPIO_IN,
2628 CSR_RESET,
2629 CSR_GP_CNTRL,
2630 CSR_HW_REV,
2631 CSR_EEPROM_REG,
2632 CSR_EEPROM_GP,
2633 CSR_OTP_GP_REG,
2634 CSR_GIO_REG,
2635 CSR_GP_UCODE_REG,
2636 CSR_GP_DRIVER_REG,
2637 CSR_UCODE_DRV_GP1,
2638 CSR_UCODE_DRV_GP2,
2639 CSR_LED_REG,
2640 CSR_DRAM_INT_TBL_REG,
2641 CSR_GIO_CHICKEN_BITS,
2642 CSR_ANA_PLL_CFG,
2643 CSR_HW_REV_WA_REG,
2644 CSR_DBG_HPET_MEM_REG
2645 };
2646 IWL_ERR(priv, "CSR values:\n");
2647 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2648 "CSR_INT_PERIODIC_REG)\n");
2649 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2650 IWL_ERR(priv, " %25s: 0X%08x\n",
2651 get_csr_string(csr_tbl[i]),
2652 iwl_read32(priv, csr_tbl[i]));
2653 }
2654 }
2655 EXPORT_SYMBOL(iwl_dump_csr);
2656
2657 const static char *get_fh_string(int cmd)
2658 {
2659 switch (cmd) {
2660 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2661 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2662 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2663 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2664 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2665 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2666 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2667 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2668 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2669 default:
2670 return "UNKNOWN";
2671
2672 }
2673 }
2674
2675 int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2676 {
2677 int i;
2678 #ifdef CONFIG_IWLWIFI_DEBUG
2679 int pos = 0;
2680 size_t bufsz = 0;
2681 #endif
2682 u32 fh_tbl[] = {
2683 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2684 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2685 FH_RSCSR_CHNL0_WPTR,
2686 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2687 FH_MEM_RSSR_SHARED_CTRL_REG,
2688 FH_MEM_RSSR_RX_STATUS_REG,
2689 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2690 FH_TSSR_TX_STATUS_REG,
2691 FH_TSSR_TX_ERROR_REG
2692 };
2693 #ifdef CONFIG_IWLWIFI_DEBUG
2694 if (display) {
2695 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2696 *buf = kmalloc(bufsz, GFP_KERNEL);
2697 if (!*buf)
2698 return -ENOMEM;
2699 pos += scnprintf(*buf + pos, bufsz - pos,
2700 "FH register values:\n");
2701 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2702 pos += scnprintf(*buf + pos, bufsz - pos,
2703 " %34s: 0X%08x\n",
2704 get_fh_string(fh_tbl[i]),
2705 iwl_read_direct32(priv, fh_tbl[i]));
2706 }
2707 return pos;
2708 }
2709 #endif
2710 IWL_ERR(priv, "FH register values:\n");
2711 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2712 IWL_ERR(priv, " %34s: 0X%08x\n",
2713 get_fh_string(fh_tbl[i]),
2714 iwl_read_direct32(priv, fh_tbl[i]));
2715 }
2716 return 0;
2717 }
2718 EXPORT_SYMBOL(iwl_dump_fh);
2719
2720 static void iwl_force_rf_reset(struct iwl_priv *priv)
2721 {
2722 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2723 return;
2724
2725 if (!iwl_is_associated(priv)) {
2726 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2727 return;
2728 }
2729 /*
2730 * There is no easy and better way to force reset the radio,
2731 * the only known method is switching channel which will force to
2732 * reset and tune the radio.
2733 * Use internal short scan (single channel) operation to should
2734 * achieve this objective.
2735 * Driver should reset the radio when number of consecutive missed
2736 * beacon, or any other uCode error condition detected.
2737 */
2738 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2739 iwl_internal_short_hw_scan(priv);
2740 }
2741
2742
2743 int iwl_force_reset(struct iwl_priv *priv, int mode)
2744 {
2745 struct iwl_force_reset *force_reset;
2746
2747 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2748 return -EINVAL;
2749
2750 if (mode >= IWL_MAX_FORCE_RESET) {
2751 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2752 return -EINVAL;
2753 }
2754 force_reset = &priv->force_reset[mode];
2755 force_reset->reset_request_count++;
2756 if (force_reset->last_force_reset_jiffies &&
2757 time_after(force_reset->last_force_reset_jiffies +
2758 force_reset->reset_duration, jiffies)) {
2759 IWL_DEBUG_INFO(priv, "force reset rejected\n");
2760 force_reset->reset_reject_count++;
2761 return -EAGAIN;
2762 }
2763 force_reset->reset_success_count++;
2764 force_reset->last_force_reset_jiffies = jiffies;
2765 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
2766 switch (mode) {
2767 case IWL_RF_RESET:
2768 iwl_force_rf_reset(priv);
2769 break;
2770 case IWL_FW_RESET:
2771 IWL_ERR(priv, "On demand firmware reload\n");
2772 /* Set the FW error flag -- cleared on iwl_down */
2773 set_bit(STATUS_FW_ERROR, &priv->status);
2774 wake_up_interruptible(&priv->wait_command_queue);
2775 /*
2776 * Keep the restart process from trying to send host
2777 * commands by clearing the INIT status bit
2778 */
2779 clear_bit(STATUS_READY, &priv->status);
2780 queue_work(priv->workqueue, &priv->restart);
2781 break;
2782 }
2783 return 0;
2784 }
2785 EXPORT_SYMBOL(iwl_force_reset);
2786
2787 /**
2788 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2789 *
2790 * During normal condition (no queue is stuck), the timer is continually set to
2791 * execute every monitor_recover_period milliseconds after the last timer
2792 * expired. When the queue read_ptr is at the same place, the timer is
2793 * shorten to 100mSecs. This is
2794 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2795 * 2) to detect the stuck queues quicker before the station and AP can
2796 * disassociate each other.
2797 *
2798 * This function monitors all the tx queues and recover from it if any
2799 * of the queues are stuck.
2800 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2801 * it will recover by resetting the firmware and return.
2802 * 2. Then, it checks for station association. If it associates it will check
2803 * other queues. If any queue is stuck, it will recover by resetting
2804 * the firmware.
2805 * Note: It the number of times the queue read_ptr to be at the same place to
2806 * be MAX_REPEAT+1 in order to consider to be stuck.
2807 */
2808 /*
2809 * The maximum number of times the read pointer of the tx queue at the
2810 * same place without considering to be stuck.
2811 */
2812 #define MAX_REPEAT (2)
2813 static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2814 {
2815 struct iwl_tx_queue *txq;
2816 struct iwl_queue *q;
2817
2818 txq = &priv->txq[cnt];
2819 q = &txq->q;
2820 /* queue is empty, skip */
2821 if (q->read_ptr != q->write_ptr) {
2822 if (q->read_ptr == q->last_read_ptr) {
2823 /* a queue has not been read from last time */
2824 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2825 IWL_ERR(priv,
2826 "queue %d stuck %d time. Fw reload.\n",
2827 q->id, q->repeat_same_read_ptr);
2828 q->repeat_same_read_ptr = 0;
2829 iwl_force_reset(priv, IWL_FW_RESET);
2830 } else {
2831 q->repeat_same_read_ptr++;
2832 IWL_DEBUG_RADIO(priv,
2833 "queue %d, not read %d time\n",
2834 q->id,
2835 q->repeat_same_read_ptr);
2836 mod_timer(&priv->monitor_recover, jiffies +
2837 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2838 }
2839 return 1;
2840 } else {
2841 q->last_read_ptr = q->read_ptr;
2842 q->repeat_same_read_ptr = 0;
2843 }
2844 }
2845 return 0;
2846 }
2847
2848 void iwl_bg_monitor_recover(unsigned long data)
2849 {
2850 struct iwl_priv *priv = (struct iwl_priv *)data;
2851 int cnt;
2852
2853 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2854 return;
2855
2856 /* monitor and check for stuck cmd queue */
2857 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2858 return;
2859
2860 /* monitor and check for other stuck queues */
2861 if (iwl_is_associated(priv)) {
2862 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2863 /* skip as we already checked the command queue */
2864 if (cnt == IWL_CMD_QUEUE_NUM)
2865 continue;
2866 if (iwl_check_stuck_queue(priv, cnt))
2867 return;
2868 }
2869 }
2870 /*
2871 * Reschedule the timer to occur in
2872 * priv->cfg->monitor_recover_period
2873 */
2874 mod_timer(&priv->monitor_recover,
2875 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2876 }
2877 EXPORT_SYMBOL(iwl_bg_monitor_recover);
2878
2879 #ifdef CONFIG_PM
2880
2881 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2882 {
2883 struct iwl_priv *priv = pci_get_drvdata(pdev);
2884
2885 /*
2886 * This function is called when system goes into suspend state
2887 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2888 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2889 * it will not call apm_ops.stop() to stop the DMA operation.
2890 * Calling apm_ops.stop here to make sure we stop the DMA.
2891 */
2892 priv->cfg->ops->lib->apm_ops.stop(priv);
2893
2894 pci_save_state(pdev);
2895 pci_disable_device(pdev);
2896 pci_set_power_state(pdev, PCI_D3hot);
2897
2898 return 0;
2899 }
2900 EXPORT_SYMBOL(iwl_pci_suspend);
2901
2902 int iwl_pci_resume(struct pci_dev *pdev)
2903 {
2904 struct iwl_priv *priv = pci_get_drvdata(pdev);
2905 int ret;
2906
2907 /*
2908 * We disable the RETRY_TIMEOUT register (0x41) to keep
2909 * PCI Tx retries from interfering with C3 CPU state.
2910 */
2911 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2912
2913 pci_set_power_state(pdev, PCI_D0);
2914 ret = pci_enable_device(pdev);
2915 if (ret)
2916 return ret;
2917 pci_restore_state(pdev);
2918 iwl_enable_interrupts(priv);
2919
2920 return 0;
2921 }
2922 EXPORT_SYMBOL(iwl_pci_resume);
2923
2924 #endif /* CONFIG_PM */
Linux kernel - Deliverables
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