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[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <net/mac80211.h>
33
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h" /* FIXME: remove */
36 #include "iwl-debug.h"
37 #include "iwl-core.h"
38 #include "iwl-io.h"
39 #include "iwl-power.h"
40 #include "iwl-sta.h"
41 #include "iwl-helpers.h"
42
43
44 MODULE_DESCRIPTION("iwl core");
45 MODULE_VERSION(IWLWIFI_VERSION);
46 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
47 MODULE_LICENSE("GPL");
48
49 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
61
62 static irqreturn_t iwl_isr(int irq, void *data);
63
64 /*
65 * Parameter order:
66 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
67 *
68 * If there isn't a valid next or previous rate then INV is used which
69 * maps to IWL_RATE_INVALID
70 *
71 */
72 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
73 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
74 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
75 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
76 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
77 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
78 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
79 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
80 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
81 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
82 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
83 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
84 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
85 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
86 /* FIXME:RS: ^^ should be INV (legacy) */
87 };
88 EXPORT_SYMBOL(iwl_rates);
89
90 /**
91 * translate ucode response to mac80211 tx status control values
92 */
93 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
94 struct ieee80211_tx_info *info)
95 {
96 int rate_index;
97 struct ieee80211_tx_rate *r = &info->control.rates[0];
98
99 info->antenna_sel_tx =
100 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
101 if (rate_n_flags & RATE_MCS_HT_MSK)
102 r->flags |= IEEE80211_TX_RC_MCS;
103 if (rate_n_flags & RATE_MCS_GF_MSK)
104 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
105 if (rate_n_flags & RATE_MCS_FAT_MSK)
106 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
107 if (rate_n_flags & RATE_MCS_DUP_MSK)
108 r->flags |= IEEE80211_TX_RC_DUP_DATA;
109 if (rate_n_flags & RATE_MCS_SGI_MSK)
110 r->flags |= IEEE80211_TX_RC_SHORT_GI;
111 rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
112 if (info->band == IEEE80211_BAND_5GHZ)
113 rate_index -= IWL_FIRST_OFDM_RATE;
114 r->idx = rate_index;
115 }
116 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
117
118 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
119 {
120 int idx = 0;
121
122 /* HT rate format */
123 if (rate_n_flags & RATE_MCS_HT_MSK) {
124 idx = (rate_n_flags & 0xff);
125
126 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
127 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
128 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
129 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
130
131 idx += IWL_FIRST_OFDM_RATE;
132 /* skip 9M not supported in ht*/
133 if (idx >= IWL_RATE_9M_INDEX)
134 idx += 1;
135 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
136 return idx;
137
138 /* legacy rate format, search for match in table */
139 } else {
140 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
141 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
142 return idx;
143 }
144
145 return -1;
146 }
147 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
148
149 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
150 {
151 int i;
152 u8 ind = ant;
153 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
154 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
155 if (priv->hw_params.valid_tx_ant & BIT(ind))
156 return ind;
157 }
158 return ant;
159 }
160
161 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
162 EXPORT_SYMBOL(iwl_bcast_addr);
163
164
165 /* This function both allocates and initializes hw and priv. */
166 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
167 struct ieee80211_ops *hw_ops)
168 {
169 struct iwl_priv *priv;
170
171 /* mac80211 allocates memory for this device instance, including
172 * space for this driver's private structure */
173 struct ieee80211_hw *hw =
174 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
175 if (hw == NULL) {
176 printk(KERN_ERR "%s: Can not allocate network device\n",
177 cfg->name);
178 goto out;
179 }
180
181 priv = hw->priv;
182 priv->hw = hw;
183
184 out:
185 return hw;
186 }
187 EXPORT_SYMBOL(iwl_alloc_all);
188
189 void iwl_hw_detect(struct iwl_priv *priv)
190 {
191 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
192 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
193 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
194 }
195 EXPORT_SYMBOL(iwl_hw_detect);
196
197 int iwl_hw_nic_init(struct iwl_priv *priv)
198 {
199 unsigned long flags;
200 struct iwl_rx_queue *rxq = &priv->rxq;
201 int ret;
202
203 /* nic_init */
204 spin_lock_irqsave(&priv->lock, flags);
205 priv->cfg->ops->lib->apm_ops.init(priv);
206 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
207 spin_unlock_irqrestore(&priv->lock, flags);
208
209 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
210
211 priv->cfg->ops->lib->apm_ops.config(priv);
212
213 /* Allocate the RX queue, or reset if it is already allocated */
214 if (!rxq->bd) {
215 ret = iwl_rx_queue_alloc(priv);
216 if (ret) {
217 IWL_ERR(priv, "Unable to initialize Rx queue\n");
218 return -ENOMEM;
219 }
220 } else
221 iwl_rx_queue_reset(priv, rxq);
222
223 iwl_rx_replenish(priv);
224
225 iwl_rx_init(priv, rxq);
226
227 spin_lock_irqsave(&priv->lock, flags);
228
229 rxq->need_update = 1;
230 iwl_rx_queue_update_write_ptr(priv, rxq);
231
232 spin_unlock_irqrestore(&priv->lock, flags);
233
234 /* Allocate and init all Tx and Command queues */
235 ret = iwl_txq_ctx_reset(priv);
236 if (ret)
237 return ret;
238
239 set_bit(STATUS_INIT, &priv->status);
240
241 return 0;
242 }
243 EXPORT_SYMBOL(iwl_hw_nic_init);
244
245 /*
246 * QoS support
247 */
248 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
249 {
250 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
251 return;
252
253 priv->qos_data.def_qos_parm.qos_flags = 0;
254
255 if (priv->qos_data.qos_cap.q_AP.queue_request &&
256 !priv->qos_data.qos_cap.q_AP.txop_request)
257 priv->qos_data.def_qos_parm.qos_flags |=
258 QOS_PARAM_FLG_TXOP_TYPE_MSK;
259 if (priv->qos_data.qos_active)
260 priv->qos_data.def_qos_parm.qos_flags |=
261 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
262
263 if (priv->current_ht_config.is_ht)
264 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
265
266 if (force || iwl_is_associated(priv)) {
267 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
268 priv->qos_data.qos_active,
269 priv->qos_data.def_qos_parm.qos_flags);
270
271 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
272 sizeof(struct iwl_qosparam_cmd),
273 &priv->qos_data.def_qos_parm, NULL);
274 }
275 }
276 EXPORT_SYMBOL(iwl_activate_qos);
277
278 /*
279 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
280 * (802.11b) (802.11a/g)
281 * AC_BK 15 1023 7 0 0
282 * AC_BE 15 1023 3 0 0
283 * AC_VI 7 15 2 6.016ms 3.008ms
284 * AC_VO 3 7 2 3.264ms 1.504ms
285 */
286 void iwl_reset_qos(struct iwl_priv *priv)
287 {
288 u16 cw_min = 15;
289 u16 cw_max = 1023;
290 u8 aifs = 2;
291 bool is_legacy = false;
292 unsigned long flags;
293 int i;
294
295 spin_lock_irqsave(&priv->lock, flags);
296 /* QoS always active in AP and ADHOC mode
297 * In STA mode wait for association
298 */
299 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
300 priv->iw_mode == NL80211_IFTYPE_AP)
301 priv->qos_data.qos_active = 1;
302 else
303 priv->qos_data.qos_active = 0;
304
305 /* check for legacy mode */
306 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
307 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
308 (priv->iw_mode == NL80211_IFTYPE_STATION &&
309 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
310 cw_min = 31;
311 is_legacy = 1;
312 }
313
314 if (priv->qos_data.qos_active)
315 aifs = 3;
316
317 /* AC_BE */
318 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
319 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
320 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
321 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
322 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
323
324 if (priv->qos_data.qos_active) {
325 /* AC_BK */
326 i = 1;
327 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
328 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
329 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
330 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
331 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
332
333 /* AC_VI */
334 i = 2;
335 priv->qos_data.def_qos_parm.ac[i].cw_min =
336 cpu_to_le16((cw_min + 1) / 2 - 1);
337 priv->qos_data.def_qos_parm.ac[i].cw_max =
338 cpu_to_le16(cw_min);
339 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
340 if (is_legacy)
341 priv->qos_data.def_qos_parm.ac[i].edca_txop =
342 cpu_to_le16(6016);
343 else
344 priv->qos_data.def_qos_parm.ac[i].edca_txop =
345 cpu_to_le16(3008);
346 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
347
348 /* AC_VO */
349 i = 3;
350 priv->qos_data.def_qos_parm.ac[i].cw_min =
351 cpu_to_le16((cw_min + 1) / 4 - 1);
352 priv->qos_data.def_qos_parm.ac[i].cw_max =
353 cpu_to_le16((cw_min + 1) / 2 - 1);
354 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
355 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
356 if (is_legacy)
357 priv->qos_data.def_qos_parm.ac[i].edca_txop =
358 cpu_to_le16(3264);
359 else
360 priv->qos_data.def_qos_parm.ac[i].edca_txop =
361 cpu_to_le16(1504);
362 } else {
363 for (i = 1; i < 4; i++) {
364 priv->qos_data.def_qos_parm.ac[i].cw_min =
365 cpu_to_le16(cw_min);
366 priv->qos_data.def_qos_parm.ac[i].cw_max =
367 cpu_to_le16(cw_max);
368 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
369 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
370 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
371 }
372 }
373 IWL_DEBUG_QOS(priv, "set QoS to default \n");
374
375 spin_unlock_irqrestore(&priv->lock, flags);
376 }
377 EXPORT_SYMBOL(iwl_reset_qos);
378
379 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
380 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
381 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
382 struct ieee80211_sta_ht_cap *ht_info,
383 enum ieee80211_band band)
384 {
385 u16 max_bit_rate = 0;
386 u8 rx_chains_num = priv->hw_params.rx_chains_num;
387 u8 tx_chains_num = priv->hw_params.tx_chains_num;
388
389 ht_info->cap = 0;
390 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
391
392 ht_info->ht_supported = true;
393
394 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
395 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
396 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
397 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
398
399 max_bit_rate = MAX_BIT_RATE_20_MHZ;
400 if (priv->hw_params.fat_channel & BIT(band)) {
401 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
402 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
403 ht_info->mcs.rx_mask[4] = 0x01;
404 max_bit_rate = MAX_BIT_RATE_40_MHZ;
405 }
406
407 if (priv->cfg->mod_params->amsdu_size_8K)
408 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
409
410 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
411 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
412
413 ht_info->mcs.rx_mask[0] = 0xFF;
414 if (rx_chains_num >= 2)
415 ht_info->mcs.rx_mask[1] = 0xFF;
416 if (rx_chains_num >= 3)
417 ht_info->mcs.rx_mask[2] = 0xFF;
418
419 /* Highest supported Rx data rate */
420 max_bit_rate *= rx_chains_num;
421 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
422 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
423
424 /* Tx MCS capabilities */
425 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
426 if (tx_chains_num != rx_chains_num) {
427 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
428 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
429 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
430 }
431 }
432
433 static void iwlcore_init_hw_rates(struct iwl_priv *priv,
434 struct ieee80211_rate *rates)
435 {
436 int i;
437
438 for (i = 0; i < IWL_RATE_COUNT; i++) {
439 rates[i].bitrate = iwl_rates[i].ieee * 5;
440 rates[i].hw_value = i; /* Rate scaling will work on indexes */
441 rates[i].hw_value_short = i;
442 rates[i].flags = 0;
443 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
444 /*
445 * If CCK != 1M then set short preamble rate flag.
446 */
447 rates[i].flags |=
448 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
449 0 : IEEE80211_RATE_SHORT_PREAMBLE;
450 }
451 }
452 }
453
454
455 /**
456 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
457 */
458 int iwlcore_init_geos(struct iwl_priv *priv)
459 {
460 struct iwl_channel_info *ch;
461 struct ieee80211_supported_band *sband;
462 struct ieee80211_channel *channels;
463 struct ieee80211_channel *geo_ch;
464 struct ieee80211_rate *rates;
465 int i = 0;
466
467 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
468 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
469 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
470 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
471 return 0;
472 }
473
474 channels = kzalloc(sizeof(struct ieee80211_channel) *
475 priv->channel_count, GFP_KERNEL);
476 if (!channels)
477 return -ENOMEM;
478
479 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
480 GFP_KERNEL);
481 if (!rates) {
482 kfree(channels);
483 return -ENOMEM;
484 }
485
486 /* 5.2GHz channels start after the 2.4GHz channels */
487 sband = &priv->bands[IEEE80211_BAND_5GHZ];
488 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
489 /* just OFDM */
490 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
491 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
492
493 if (priv->cfg->sku & IWL_SKU_N)
494 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
495 IEEE80211_BAND_5GHZ);
496
497 sband = &priv->bands[IEEE80211_BAND_2GHZ];
498 sband->channels = channels;
499 /* OFDM & CCK */
500 sband->bitrates = rates;
501 sband->n_bitrates = IWL_RATE_COUNT;
502
503 if (priv->cfg->sku & IWL_SKU_N)
504 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
505 IEEE80211_BAND_2GHZ);
506
507 priv->ieee_channels = channels;
508 priv->ieee_rates = rates;
509
510 for (i = 0; i < priv->channel_count; i++) {
511 ch = &priv->channel_info[i];
512
513 /* FIXME: might be removed if scan is OK */
514 if (!is_channel_valid(ch))
515 continue;
516
517 if (is_channel_a_band(ch))
518 sband = &priv->bands[IEEE80211_BAND_5GHZ];
519 else
520 sband = &priv->bands[IEEE80211_BAND_2GHZ];
521
522 geo_ch = &sband->channels[sband->n_channels++];
523
524 geo_ch->center_freq =
525 ieee80211_channel_to_frequency(ch->channel);
526 geo_ch->max_power = ch->max_power_avg;
527 geo_ch->max_antenna_gain = 0xff;
528 geo_ch->hw_value = ch->channel;
529
530 if (is_channel_valid(ch)) {
531 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
532 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
533
534 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
535 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
536
537 if (ch->flags & EEPROM_CHANNEL_RADAR)
538 geo_ch->flags |= IEEE80211_CHAN_RADAR;
539
540 geo_ch->flags |= ch->fat_extension_channel;
541
542 if (ch->max_power_avg > priv->tx_power_channel_lmt)
543 priv->tx_power_channel_lmt = ch->max_power_avg;
544 } else {
545 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
546 }
547
548 /* Save flags for reg domain usage */
549 geo_ch->orig_flags = geo_ch->flags;
550
551 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
552 ch->channel, geo_ch->center_freq,
553 is_channel_a_band(ch) ? "5.2" : "2.4",
554 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
555 "restricted" : "valid",
556 geo_ch->flags);
557 }
558
559 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
560 priv->cfg->sku & IWL_SKU_A) {
561 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
562 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
563 priv->pci_dev->device,
564 priv->pci_dev->subsystem_device);
565 priv->cfg->sku &= ~IWL_SKU_A;
566 }
567
568 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
569 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
570 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
571
572 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
573
574 return 0;
575 }
576 EXPORT_SYMBOL(iwlcore_init_geos);
577
578 /*
579 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
580 */
581 void iwlcore_free_geos(struct iwl_priv *priv)
582 {
583 kfree(priv->ieee_channels);
584 kfree(priv->ieee_rates);
585 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
586 }
587 EXPORT_SYMBOL(iwlcore_free_geos);
588
589 static bool is_single_rx_stream(struct iwl_priv *priv)
590 {
591 return !priv->current_ht_config.is_ht ||
592 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
593 (priv->current_ht_config.mcs.rx_mask[2] == 0));
594 }
595
596 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
597 enum ieee80211_band band,
598 u16 channel, u8 extension_chan_offset)
599 {
600 const struct iwl_channel_info *ch_info;
601
602 ch_info = iwl_get_channel_info(priv, band, channel);
603 if (!is_channel_valid(ch_info))
604 return 0;
605
606 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
607 return !(ch_info->fat_extension_channel &
608 IEEE80211_CHAN_NO_HT40PLUS);
609 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
610 return !(ch_info->fat_extension_channel &
611 IEEE80211_CHAN_NO_HT40MINUS);
612
613 return 0;
614 }
615
616 u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
617 struct ieee80211_sta_ht_cap *sta_ht_inf)
618 {
619 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
620
621 if ((!iwl_ht_conf->is_ht) ||
622 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
623 return 0;
624
625 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
626 * the bit will not set if it is pure 40MHz case
627 */
628 if (sta_ht_inf) {
629 if (!sta_ht_inf->ht_supported)
630 return 0;
631 }
632
633 if (iwl_ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ)
634 return 1;
635 else
636 return iwl_is_channel_extension(priv, priv->band,
637 le16_to_cpu(priv->staging_rxon.channel),
638 iwl_ht_conf->extension_chan_offset);
639 }
640 EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
641
642 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
643 {
644 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
645
646 if (hw_decrypt)
647 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
648 else
649 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
650
651 }
652 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
653
654 /**
655 * iwl_check_rxon_cmd - validate RXON structure is valid
656 *
657 * NOTE: This is really only useful during development and can eventually
658 * be #ifdef'd out once the driver is stable and folks aren't actively
659 * making changes
660 */
661 int iwl_check_rxon_cmd(struct iwl_priv *priv)
662 {
663 int error = 0;
664 int counter = 1;
665 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
666
667 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
668 error |= le32_to_cpu(rxon->flags &
669 (RXON_FLG_TGJ_NARROW_BAND_MSK |
670 RXON_FLG_RADAR_DETECT_MSK));
671 if (error)
672 IWL_WARN(priv, "check 24G fields %d | %d\n",
673 counter++, error);
674 } else {
675 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
676 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
677 if (error)
678 IWL_WARN(priv, "check 52 fields %d | %d\n",
679 counter++, error);
680 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
681 if (error)
682 IWL_WARN(priv, "check 52 CCK %d | %d\n",
683 counter++, error);
684 }
685 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
686 if (error)
687 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
688
689 /* make sure basic rates 6Mbps and 1Mbps are supported */
690 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
691 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
692 if (error)
693 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
694
695 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
696 if (error)
697 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
698
699 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
700 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
701 if (error)
702 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
703 counter++, error);
704
705 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
706 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
707 if (error)
708 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
709 counter++, error);
710
711 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
712 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
713 if (error)
714 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
715 counter++, error);
716
717 if (error)
718 IWL_WARN(priv, "Tuning to channel %d\n",
719 le16_to_cpu(rxon->channel));
720
721 if (error) {
722 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
723 return -1;
724 }
725 return 0;
726 }
727 EXPORT_SYMBOL(iwl_check_rxon_cmd);
728
729 /**
730 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
731 * @priv: staging_rxon is compared to active_rxon
732 *
733 * If the RXON structure is changing enough to require a new tune,
734 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
735 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
736 */
737 int iwl_full_rxon_required(struct iwl_priv *priv)
738 {
739
740 /* These items are only settable from the full RXON command */
741 if (!(iwl_is_associated(priv)) ||
742 compare_ether_addr(priv->staging_rxon.bssid_addr,
743 priv->active_rxon.bssid_addr) ||
744 compare_ether_addr(priv->staging_rxon.node_addr,
745 priv->active_rxon.node_addr) ||
746 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
747 priv->active_rxon.wlap_bssid_addr) ||
748 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
749 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
750 (priv->staging_rxon.air_propagation !=
751 priv->active_rxon.air_propagation) ||
752 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
753 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
754 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
755 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
756 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
757 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
758 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
759 return 1;
760
761 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
762 * be updated with the RXON_ASSOC command -- however only some
763 * flag transitions are allowed using RXON_ASSOC */
764
765 /* Check if we are not switching bands */
766 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
767 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
768 return 1;
769
770 /* Check if we are switching association toggle */
771 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
772 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
773 return 1;
774
775 return 0;
776 }
777 EXPORT_SYMBOL(iwl_full_rxon_required);
778
779 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
780 {
781 int i;
782 int rate_mask;
783
784 /* Set rate mask*/
785 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
786 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
787 else
788 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
789
790 /* Find lowest valid rate */
791 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
792 i = iwl_rates[i].next_ieee) {
793 if (rate_mask & (1 << i))
794 return iwl_rates[i].plcp;
795 }
796
797 /* No valid rate was found. Assign the lowest one */
798 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
799 return IWL_RATE_1M_PLCP;
800 else
801 return IWL_RATE_6M_PLCP;
802 }
803 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
804
805 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
806 {
807 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
808
809 if (!ht_info->is_ht) {
810 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
811 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
812 RXON_FLG_FAT_PROT_MSK |
813 RXON_FLG_HT_PROT_MSK);
814 return;
815 }
816
817 /* FIXME: if the definition of ht_protection changed, the "translation"
818 * will be needed for rxon->flags
819 */
820 rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
821
822 /* Set up channel bandwidth:
823 * 20 MHz only, 20/40 mixed or pure 40 if fat ok */
824 /* clear the HT channel mode before set the mode */
825 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
826 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
827 if (iwl_is_fat_tx_allowed(priv, NULL)) {
828 /* pure 40 fat */
829 if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
830 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
831 /* Note: control channel is opposite of extension channel */
832 switch (ht_info->extension_chan_offset) {
833 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
834 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
835 break;
836 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
837 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
838 break;
839 }
840 } else {
841 /* Note: control channel is opposite of extension channel */
842 switch (ht_info->extension_chan_offset) {
843 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
844 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
845 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
846 break;
847 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
848 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
849 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
850 break;
851 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
852 default:
853 /* channel location only valid if in Mixed mode */
854 IWL_ERR(priv, "invalid extension channel offset\n");
855 break;
856 }
857 }
858 } else {
859 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
860 }
861
862 if (priv->cfg->ops->hcmd->set_rxon_chain)
863 priv->cfg->ops->hcmd->set_rxon_chain(priv);
864
865 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
866 "rxon flags 0x%X operation mode :0x%X "
867 "extension channel offset 0x%x\n",
868 ht_info->mcs.rx_mask[0],
869 ht_info->mcs.rx_mask[1],
870 ht_info->mcs.rx_mask[2],
871 le32_to_cpu(rxon->flags), ht_info->ht_protection,
872 ht_info->extension_chan_offset);
873 return;
874 }
875 EXPORT_SYMBOL(iwl_set_rxon_ht);
876
877 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
878 #define IWL_NUM_RX_CHAINS_SINGLE 2
879 #define IWL_NUM_IDLE_CHAINS_DUAL 2
880 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
881
882 /* Determine how many receiver/antenna chains to use.
883 * More provides better reception via diversity. Fewer saves power.
884 * MIMO (dual stream) requires at least 2, but works better with 3.
885 * This does not determine *which* chains to use, just how many.
886 */
887 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
888 {
889 bool is_single = is_single_rx_stream(priv);
890 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
891
892 /* # of Rx chains to use when expecting MIMO. */
893 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
894 WLAN_HT_CAP_SM_PS_STATIC)))
895 return IWL_NUM_RX_CHAINS_SINGLE;
896 else
897 return IWL_NUM_RX_CHAINS_MULTIPLE;
898 }
899
900 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
901 {
902 int idle_cnt;
903 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
904 /* # Rx chains when idling and maybe trying to save power */
905 switch (priv->current_ht_config.sm_ps) {
906 case WLAN_HT_CAP_SM_PS_STATIC:
907 case WLAN_HT_CAP_SM_PS_DYNAMIC:
908 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
909 IWL_NUM_IDLE_CHAINS_SINGLE;
910 break;
911 case WLAN_HT_CAP_SM_PS_DISABLED:
912 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
913 break;
914 case WLAN_HT_CAP_SM_PS_INVALID:
915 default:
916 IWL_ERR(priv, "invalid mimo ps mode %d\n",
917 priv->current_ht_config.sm_ps);
918 WARN_ON(1);
919 idle_cnt = -1;
920 break;
921 }
922 return idle_cnt;
923 }
924
925 /* up to 4 chains */
926 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
927 {
928 u8 res;
929 res = (chain_bitmap & BIT(0)) >> 0;
930 res += (chain_bitmap & BIT(1)) >> 1;
931 res += (chain_bitmap & BIT(2)) >> 2;
932 res += (chain_bitmap & BIT(4)) >> 4;
933 return res;
934 }
935
936 /**
937 * iwl_is_monitor_mode - Determine if interface in monitor mode
938 *
939 * priv->iw_mode is set in add_interface, but add_interface is
940 * never called for monitor mode. The only way mac80211 informs us about
941 * monitor mode is through configuring filters (call to configure_filter).
942 */
943 bool iwl_is_monitor_mode(struct iwl_priv *priv)
944 {
945 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
946 }
947 EXPORT_SYMBOL(iwl_is_monitor_mode);
948
949 /**
950 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
951 *
952 * Selects how many and which Rx receivers/antennas/chains to use.
953 * This should not be used for scan command ... it puts data in wrong place.
954 */
955 void iwl_set_rxon_chain(struct iwl_priv *priv)
956 {
957 bool is_single = is_single_rx_stream(priv);
958 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
959 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
960 u32 active_chains;
961 u16 rx_chain;
962
963 /* Tell uCode which antennas are actually connected.
964 * Before first association, we assume all antennas are connected.
965 * Just after first association, iwl_chain_noise_calibration()
966 * checks which antennas actually *are* connected. */
967 if (priv->chain_noise_data.active_chains)
968 active_chains = priv->chain_noise_data.active_chains;
969 else
970 active_chains = priv->hw_params.valid_rx_ant;
971
972 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
973
974 /* How many receivers should we use? */
975 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
976 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
977
978
979 /* correct rx chain count according hw settings
980 * and chain noise calibration
981 */
982 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
983 if (valid_rx_cnt < active_rx_cnt)
984 active_rx_cnt = valid_rx_cnt;
985
986 if (valid_rx_cnt < idle_rx_cnt)
987 idle_rx_cnt = valid_rx_cnt;
988
989 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
990 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
991
992 /* copied from 'iwl_bg_request_scan()' */
993 /* Force use of chains B and C (0x6) for Rx for 4965
994 * Avoid A (0x1) because of its off-channel reception on A-band.
995 * MIMO is not used here, but value is required */
996 if (iwl_is_monitor_mode(priv) &&
997 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
998 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
999 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1000 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1001 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1002 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1003 }
1004
1005 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1006
1007 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1008 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1009 else
1010 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1011
1012 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1013 priv->staging_rxon.rx_chain,
1014 active_rx_cnt, idle_rx_cnt);
1015
1016 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1017 active_rx_cnt < idle_rx_cnt);
1018 }
1019 EXPORT_SYMBOL(iwl_set_rxon_chain);
1020
1021 /**
1022 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1023 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1024 * @channel: Any channel valid for the requested phymode
1025
1026 * In addition to setting the staging RXON, priv->phymode is also set.
1027 *
1028 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1029 * in the staging RXON flag structure based on the phymode
1030 */
1031 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1032 {
1033 enum ieee80211_band band = ch->band;
1034 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1035
1036 if (!iwl_get_channel_info(priv, band, channel)) {
1037 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1038 channel, band);
1039 return -EINVAL;
1040 }
1041
1042 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1043 (priv->band == band))
1044 return 0;
1045
1046 priv->staging_rxon.channel = cpu_to_le16(channel);
1047 if (band == IEEE80211_BAND_5GHZ)
1048 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1049 else
1050 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1051
1052 priv->band = band;
1053
1054 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1055
1056 return 0;
1057 }
1058 EXPORT_SYMBOL(iwl_set_rxon_channel);
1059
1060 void iwl_set_flags_for_band(struct iwl_priv *priv,
1061 enum ieee80211_band band)
1062 {
1063 if (band == IEEE80211_BAND_5GHZ) {
1064 priv->staging_rxon.flags &=
1065 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1066 | RXON_FLG_CCK_MSK);
1067 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1068 } else {
1069 /* Copied from iwl_post_associate() */
1070 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1071 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1072 else
1073 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1074
1075 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1076 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1077
1078 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1079 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1080 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1081 }
1082 }
1083 EXPORT_SYMBOL(iwl_set_flags_for_band);
1084
1085 /*
1086 * initialize rxon structure with default values from eeprom
1087 */
1088 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1089 {
1090 const struct iwl_channel_info *ch_info;
1091
1092 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1093
1094 switch (mode) {
1095 case NL80211_IFTYPE_AP:
1096 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1097 break;
1098
1099 case NL80211_IFTYPE_STATION:
1100 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1101 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1102 break;
1103
1104 case NL80211_IFTYPE_ADHOC:
1105 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1106 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1107 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1108 RXON_FILTER_ACCEPT_GRP_MSK;
1109 break;
1110
1111 default:
1112 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1113 break;
1114 }
1115
1116 #if 0
1117 /* TODO: Figure out when short_preamble would be set and cache from
1118 * that */
1119 if (!hw_to_local(priv->hw)->short_preamble)
1120 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1121 else
1122 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1123 #endif
1124
1125 ch_info = iwl_get_channel_info(priv, priv->band,
1126 le16_to_cpu(priv->active_rxon.channel));
1127
1128 if (!ch_info)
1129 ch_info = &priv->channel_info[0];
1130
1131 /*
1132 * in some case A channels are all non IBSS
1133 * in this case force B/G channel
1134 */
1135 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1136 !(is_channel_ibss(ch_info)))
1137 ch_info = &priv->channel_info[0];
1138
1139 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1140 priv->band = ch_info->band;
1141
1142 iwl_set_flags_for_band(priv, priv->band);
1143
1144 priv->staging_rxon.ofdm_basic_rates =
1145 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1146 priv->staging_rxon.cck_basic_rates =
1147 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1148
1149 /* clear both MIX and PURE40 mode flag */
1150 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1151 RXON_FLG_CHANNEL_MODE_PURE_40);
1152 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1153 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1154 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1155 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1156 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1157 }
1158 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1159
1160 static void iwl_set_rate(struct iwl_priv *priv)
1161 {
1162 const struct ieee80211_supported_band *hw = NULL;
1163 struct ieee80211_rate *rate;
1164 int i;
1165
1166 hw = iwl_get_hw_mode(priv, priv->band);
1167 if (!hw) {
1168 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1169 return;
1170 }
1171
1172 priv->active_rate = 0;
1173 priv->active_rate_basic = 0;
1174
1175 for (i = 0; i < hw->n_bitrates; i++) {
1176 rate = &(hw->bitrates[i]);
1177 if (rate->hw_value < IWL_RATE_COUNT)
1178 priv->active_rate |= (1 << rate->hw_value);
1179 }
1180
1181 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1182 priv->active_rate, priv->active_rate_basic);
1183
1184 /*
1185 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1186 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1187 * OFDM
1188 */
1189 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1190 priv->staging_rxon.cck_basic_rates =
1191 ((priv->active_rate_basic &
1192 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1193 else
1194 priv->staging_rxon.cck_basic_rates =
1195 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1196
1197 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1198 priv->staging_rxon.ofdm_basic_rates =
1199 ((priv->active_rate_basic &
1200 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1201 IWL_FIRST_OFDM_RATE) & 0xFF;
1202 else
1203 priv->staging_rxon.ofdm_basic_rates =
1204 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1205 }
1206
1207 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1208 {
1209 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1210 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1211 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1212 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
1213 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1214 rxon->channel = csa->channel;
1215 priv->staging_rxon.channel = csa->channel;
1216 }
1217 EXPORT_SYMBOL(iwl_rx_csa);
1218
1219 #ifdef CONFIG_IWLWIFI_DEBUG
1220 static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1221 {
1222 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1223
1224 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1225 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1226 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1227 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1228 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1229 le32_to_cpu(rxon->filter_flags));
1230 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1231 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1232 rxon->ofdm_basic_rates);
1233 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1234 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1235 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1236 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1237 }
1238 #endif
1239
1240 /**
1241 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1242 */
1243 void iwl_irq_handle_error(struct iwl_priv *priv)
1244 {
1245 /* Set the FW error flag -- cleared on iwl_down */
1246 set_bit(STATUS_FW_ERROR, &priv->status);
1247
1248 /* Cancel currently queued command. */
1249 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1250
1251 #ifdef CONFIG_IWLWIFI_DEBUG
1252 if (priv->debug_level & IWL_DL_FW_ERRORS) {
1253 iwl_dump_nic_error_log(priv);
1254 iwl_dump_nic_event_log(priv);
1255 iwl_print_rx_config_cmd(priv);
1256 }
1257 #endif
1258
1259 wake_up_interruptible(&priv->wait_command_queue);
1260
1261 /* Keep the restart process from trying to send host
1262 * commands by clearing the INIT status bit */
1263 clear_bit(STATUS_READY, &priv->status);
1264
1265 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1266 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1267 "Restarting adapter due to uCode error.\n");
1268
1269 if (priv->cfg->mod_params->restart_fw)
1270 queue_work(priv->workqueue, &priv->restart);
1271 }
1272 }
1273 EXPORT_SYMBOL(iwl_irq_handle_error);
1274
1275 void iwl_configure_filter(struct ieee80211_hw *hw,
1276 unsigned int changed_flags,
1277 unsigned int *total_flags,
1278 int mc_count, struct dev_addr_list *mc_list)
1279 {
1280 struct iwl_priv *priv = hw->priv;
1281 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1282
1283 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1284 changed_flags, *total_flags);
1285
1286 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1287 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1288 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1289 else
1290 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1291 }
1292 if (changed_flags & FIF_ALLMULTI) {
1293 if (*total_flags & FIF_ALLMULTI)
1294 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1295 else
1296 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1297 }
1298 if (changed_flags & FIF_CONTROL) {
1299 if (*total_flags & FIF_CONTROL)
1300 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1301 else
1302 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1303 }
1304 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1305 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1306 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1307 else
1308 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1309 }
1310
1311 /* We avoid iwl_commit_rxon here to commit the new filter flags
1312 * since mac80211 will call ieee80211_hw_config immediately.
1313 * (mc_list is not supported at this time). Otherwise, we need to
1314 * queue a background iwl_commit_rxon work.
1315 */
1316
1317 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1318 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1319 }
1320 EXPORT_SYMBOL(iwl_configure_filter);
1321
1322 int iwl_setup_mac(struct iwl_priv *priv)
1323 {
1324 int ret;
1325 struct ieee80211_hw *hw = priv->hw;
1326 hw->rate_control_algorithm = "iwl-agn-rs";
1327
1328 /* Tell mac80211 our characteristics */
1329 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1330 IEEE80211_HW_NOISE_DBM |
1331 IEEE80211_HW_AMPDU_AGGREGATION |
1332 IEEE80211_HW_SPECTRUM_MGMT;
1333 hw->wiphy->interface_modes =
1334 BIT(NL80211_IFTYPE_STATION) |
1335 BIT(NL80211_IFTYPE_ADHOC);
1336
1337 hw->wiphy->custom_regulatory = true;
1338
1339 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1340 /* we create the 802.11 header and a zero-length SSID element */
1341 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
1342
1343 /* Default value; 4 EDCA QOS priorities */
1344 hw->queues = 4;
1345
1346 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
1347
1348 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1349 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1350 &priv->bands[IEEE80211_BAND_2GHZ];
1351 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1352 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1353 &priv->bands[IEEE80211_BAND_5GHZ];
1354
1355 ret = ieee80211_register_hw(priv->hw);
1356 if (ret) {
1357 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
1358 return ret;
1359 }
1360 priv->mac80211_registered = 1;
1361
1362 return 0;
1363 }
1364 EXPORT_SYMBOL(iwl_setup_mac);
1365
1366 int iwl_set_hw_params(struct iwl_priv *priv)
1367 {
1368 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
1369 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1370 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1371 if (priv->cfg->mod_params->amsdu_size_8K)
1372 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1373 else
1374 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1375 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1376
1377 if (priv->cfg->mod_params->disable_11n)
1378 priv->cfg->sku &= ~IWL_SKU_N;
1379
1380 /* Device-specific setup */
1381 return priv->cfg->ops->lib->set_hw_params(priv);
1382 }
1383 EXPORT_SYMBOL(iwl_set_hw_params);
1384
1385 int iwl_init_drv(struct iwl_priv *priv)
1386 {
1387 int ret;
1388
1389 priv->ibss_beacon = NULL;
1390
1391 spin_lock_init(&priv->lock);
1392 spin_lock_init(&priv->sta_lock);
1393 spin_lock_init(&priv->hcmd_lock);
1394
1395 INIT_LIST_HEAD(&priv->free_frames);
1396
1397 mutex_init(&priv->mutex);
1398
1399 /* Clear the driver's (not device's) station table */
1400 iwl_clear_stations_table(priv);
1401
1402 priv->data_retry_limit = -1;
1403 priv->ieee_channels = NULL;
1404 priv->ieee_rates = NULL;
1405 priv->band = IEEE80211_BAND_2GHZ;
1406
1407 priv->iw_mode = NL80211_IFTYPE_STATION;
1408
1409 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
1410
1411 /* Choose which receivers/antennas to use */
1412 if (priv->cfg->ops->hcmd->set_rxon_chain)
1413 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1414
1415 iwl_init_scan_params(priv);
1416
1417 iwl_reset_qos(priv);
1418
1419 priv->qos_data.qos_active = 0;
1420 priv->qos_data.qos_cap.val = 0;
1421
1422 priv->rates_mask = IWL_RATES_MASK;
1423 /* If power management is turned on, default to CAM mode */
1424 priv->power_mode = IWL_POWER_MODE_CAM;
1425 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
1426
1427 ret = iwl_init_channel_map(priv);
1428 if (ret) {
1429 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
1430 goto err;
1431 }
1432
1433 ret = iwlcore_init_geos(priv);
1434 if (ret) {
1435 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
1436 goto err_free_channel_map;
1437 }
1438 iwlcore_init_hw_rates(priv, priv->ieee_rates);
1439
1440 return 0;
1441
1442 err_free_channel_map:
1443 iwl_free_channel_map(priv);
1444 err:
1445 return ret;
1446 }
1447 EXPORT_SYMBOL(iwl_init_drv);
1448
1449 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1450 {
1451 int ret = 0;
1452 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1453 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1454 tx_power,
1455 IWL_TX_POWER_TARGET_POWER_MIN);
1456 return -EINVAL;
1457 }
1458
1459 if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
1460 IWL_WARN(priv, "Requested user TXPOWER %d above upper limit %d.\n",
1461 tx_power,
1462 IWL_TX_POWER_TARGET_POWER_MAX);
1463 return -EINVAL;
1464 }
1465
1466 if (priv->tx_power_user_lmt != tx_power)
1467 force = true;
1468
1469 priv->tx_power_user_lmt = tx_power;
1470
1471 /* if nic is not up don't send command */
1472 if (!iwl_is_ready_rf(priv))
1473 return ret;
1474
1475 if (force && priv->cfg->ops->lib->send_tx_power)
1476 ret = priv->cfg->ops->lib->send_tx_power(priv);
1477
1478 return ret;
1479 }
1480 EXPORT_SYMBOL(iwl_set_tx_power);
1481
1482 void iwl_uninit_drv(struct iwl_priv *priv)
1483 {
1484 iwl_calib_free_results(priv);
1485 iwlcore_free_geos(priv);
1486 iwl_free_channel_map(priv);
1487 kfree(priv->scan);
1488 }
1489 EXPORT_SYMBOL(iwl_uninit_drv);
1490
1491
1492 void iwl_disable_interrupts(struct iwl_priv *priv)
1493 {
1494 clear_bit(STATUS_INT_ENABLED, &priv->status);
1495
1496 /* disable interrupts from uCode/NIC to host */
1497 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1498
1499 /* acknowledge/clear/reset any interrupts still pending
1500 * from uCode or flow handler (Rx/Tx DMA) */
1501 iwl_write32(priv, CSR_INT, 0xffffffff);
1502 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
1503 IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
1504 }
1505 EXPORT_SYMBOL(iwl_disable_interrupts);
1506
1507 void iwl_enable_interrupts(struct iwl_priv *priv)
1508 {
1509 IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
1510 set_bit(STATUS_INT_ENABLED, &priv->status);
1511 iwl_write32(priv, CSR_INT_MASK, priv->inta_mask);
1512 }
1513 EXPORT_SYMBOL(iwl_enable_interrupts);
1514
1515
1516 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1517
1518 /* Free dram table */
1519 void iwl_free_isr_ict(struct iwl_priv *priv)
1520 {
1521 if (priv->ict_tbl_vir) {
1522 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1523 PAGE_SIZE, priv->ict_tbl_vir,
1524 priv->ict_tbl_dma);
1525 priv->ict_tbl_vir = NULL;
1526 }
1527 }
1528 EXPORT_SYMBOL(iwl_free_isr_ict);
1529
1530
1531 /* allocate dram shared table it is a PAGE_SIZE aligned
1532 * also reset all data related to ICT table interrupt.
1533 */
1534 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1535 {
1536
1537 if (priv->cfg->use_isr_legacy)
1538 return 0;
1539 /* allocate shrared data table */
1540 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1541 ICT_COUNT) + PAGE_SIZE,
1542 &priv->ict_tbl_dma);
1543 if (!priv->ict_tbl_vir)
1544 return -ENOMEM;
1545
1546 /* align table to PAGE_SIZE boundry */
1547 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1548
1549 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1550 (unsigned long long)priv->ict_tbl_dma,
1551 (unsigned long long)priv->aligned_ict_tbl_dma,
1552 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1553
1554 priv->ict_tbl = priv->ict_tbl_vir +
1555 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1556
1557 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1558 priv->ict_tbl, priv->ict_tbl_vir,
1559 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1560
1561 /* reset table and index to all 0 */
1562 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1563 priv->ict_index = 0;
1564
1565 /* add periodic RX interrupt */
1566 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1567 return 0;
1568 }
1569 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1570
1571 /* Device is going up inform it about using ICT interrupt table,
1572 * also we need to tell the driver to start using ICT interrupt.
1573 */
1574 int iwl_reset_ict(struct iwl_priv *priv)
1575 {
1576 u32 val;
1577 unsigned long flags;
1578
1579 if (!priv->ict_tbl_vir)
1580 return 0;
1581
1582 spin_lock_irqsave(&priv->lock, flags);
1583 iwl_disable_interrupts(priv);
1584
1585 memset(&priv->ict_tbl[0],0, sizeof(u32) * ICT_COUNT);
1586
1587 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1588
1589 val |= CSR_DRAM_INT_TBL_ENABLE;
1590 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1591
1592 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1593 "aligned dma address %Lx\n",
1594 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1595
1596 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1597 priv->use_ict = true;
1598 priv->ict_index = 0;
1599 iwl_write32(priv, CSR_INT, priv->inta_mask);
1600 iwl_enable_interrupts(priv);
1601 spin_unlock_irqrestore(&priv->lock, flags);
1602
1603 return 0;
1604 }
1605 EXPORT_SYMBOL(iwl_reset_ict);
1606
1607 /* Device is going down disable ict interrupt usage */
1608 void iwl_disable_ict(struct iwl_priv *priv)
1609 {
1610 unsigned long flags;
1611
1612 spin_lock_irqsave(&priv->lock, flags);
1613 priv->use_ict = false;
1614 spin_unlock_irqrestore(&priv->lock, flags);
1615 }
1616 EXPORT_SYMBOL(iwl_disable_ict);
1617
1618 /* interrupt handler using ict table, with this interrupt driver will
1619 * stop using INTA register to get device's interrupt, reading this register
1620 * is expensive, device will write interrupts in ICT dram table, increment
1621 * index then will fire interrupt to driver, driver will OR all ICT table
1622 * entries from current index up to table entry with 0 value. the result is
1623 * the interrupt we need to service, driver will set the entries back to 0 and
1624 * set index.
1625 */
1626 irqreturn_t iwl_isr_ict(int irq, void *data)
1627 {
1628 struct iwl_priv *priv = data;
1629 u32 inta, inta_mask;
1630 u32 val = 0;
1631
1632 if (!priv)
1633 return IRQ_NONE;
1634
1635 /* dram interrupt table not set yet,
1636 * use legacy interrupt.
1637 */
1638 if (!priv->use_ict)
1639 return iwl_isr(irq, data);
1640
1641 spin_lock(&priv->lock);
1642
1643 /* Disable (but don't clear!) interrupts here to avoid
1644 * back-to-back ISRs and sporadic interrupts from our NIC.
1645 * If we have something to service, the tasklet will re-enable ints.
1646 * If we *don't* have something, we'll re-enable before leaving here.
1647 */
1648 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1649 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1650
1651
1652 /* Ignore interrupt if there's nothing in NIC to service.
1653 * This may be due to IRQ shared with another device,
1654 * or due to sporadic interrupts thrown from our NIC. */
1655 if (!priv->ict_tbl[priv->ict_index]) {
1656 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1657 goto none;
1658 }
1659
1660 /* read all entries that not 0 start with ict_index */
1661 while (priv->ict_tbl[priv->ict_index]) {
1662
1663 val |= priv->ict_tbl[priv->ict_index];
1664 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1665 priv->ict_index,
1666 priv->ict_tbl[priv->ict_index]);
1667 priv->ict_tbl[priv->ict_index] = 0;
1668 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1669 ICT_COUNT);
1670
1671 }
1672
1673 /* We should not get this value, just ignore it. */
1674 if (val == 0xffffffff)
1675 val = 0;
1676
1677 inta = (0xff & val) | ((0xff00 & val) << 16);
1678 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1679 inta, inta_mask, val);
1680
1681 inta &= priv->inta_mask;
1682 priv->inta |= inta;
1683
1684 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1685 if (likely(inta))
1686 tasklet_schedule(&priv->irq_tasklet);
1687 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1688 /* Allow interrupt if was disabled by this handler and
1689 * no tasklet was schedules, We should not enable interrupt,
1690 * tasklet will enable it.
1691 */
1692 iwl_enable_interrupts(priv);
1693 }
1694
1695 spin_unlock(&priv->lock);
1696 return IRQ_HANDLED;
1697
1698 none:
1699 /* re-enable interrupts here since we don't have anything to service.
1700 * only Re-enable if disabled by irq.
1701 */
1702 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1703 iwl_enable_interrupts(priv);
1704
1705 spin_unlock(&priv->lock);
1706 return IRQ_NONE;
1707 }
1708 EXPORT_SYMBOL(iwl_isr_ict);
1709
1710
1711 static irqreturn_t iwl_isr(int irq, void *data)
1712 {
1713 struct iwl_priv *priv = data;
1714 u32 inta, inta_mask;
1715 #ifdef CONFIG_IWLWIFI_DEBUG
1716 u32 inta_fh;
1717 #endif
1718 if (!priv)
1719 return IRQ_NONE;
1720
1721 spin_lock(&priv->lock);
1722
1723 /* Disable (but don't clear!) interrupts here to avoid
1724 * back-to-back ISRs and sporadic interrupts from our NIC.
1725 * If we have something to service, the tasklet will re-enable ints.
1726 * If we *don't* have something, we'll re-enable before leaving here. */
1727 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1728 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1729
1730 /* Discover which interrupts are active/pending */
1731 inta = iwl_read32(priv, CSR_INT);
1732
1733 /* Ignore interrupt if there's nothing in NIC to service.
1734 * This may be due to IRQ shared with another device,
1735 * or due to sporadic interrupts thrown from our NIC. */
1736 if (!inta) {
1737 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1738 goto none;
1739 }
1740
1741 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1742 /* Hardware disappeared. It might have already raised
1743 * an interrupt */
1744 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1745 goto unplugged;
1746 }
1747
1748 #ifdef CONFIG_IWLWIFI_DEBUG
1749 if (priv->debug_level & (IWL_DL_ISR)) {
1750 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1751 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1752 "fh 0x%08x\n", inta, inta_mask, inta_fh);
1753 }
1754 #endif
1755
1756 priv->inta |= inta;
1757 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1758 if (likely(inta))
1759 tasklet_schedule(&priv->irq_tasklet);
1760 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1761 iwl_enable_interrupts(priv);
1762
1763 unplugged:
1764 spin_unlock(&priv->lock);
1765 return IRQ_HANDLED;
1766
1767 none:
1768 /* re-enable interrupts here since we don't have anything to service. */
1769 /* only Re-enable if diabled by irq and no schedules tasklet. */
1770 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1771 iwl_enable_interrupts(priv);
1772
1773 spin_unlock(&priv->lock);
1774 return IRQ_NONE;
1775 }
1776
1777 irqreturn_t iwl_isr_legacy(int irq, void *data)
1778 {
1779 struct iwl_priv *priv = data;
1780 u32 inta, inta_mask;
1781 u32 inta_fh;
1782 if (!priv)
1783 return IRQ_NONE;
1784
1785 spin_lock(&priv->lock);
1786
1787 /* Disable (but don't clear!) interrupts here to avoid
1788 * back-to-back ISRs and sporadic interrupts from our NIC.
1789 * If we have something to service, the tasklet will re-enable ints.
1790 * If we *don't* have something, we'll re-enable before leaving here. */
1791 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1792 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1793
1794 /* Discover which interrupts are active/pending */
1795 inta = iwl_read32(priv, CSR_INT);
1796 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1797
1798 /* Ignore interrupt if there's nothing in NIC to service.
1799 * This may be due to IRQ shared with another device,
1800 * or due to sporadic interrupts thrown from our NIC. */
1801 if (!inta && !inta_fh) {
1802 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1803 goto none;
1804 }
1805
1806 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1807 /* Hardware disappeared. It might have already raised
1808 * an interrupt */
1809 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1810 goto unplugged;
1811 }
1812
1813 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1814 inta, inta_mask, inta_fh);
1815
1816 inta &= ~CSR_INT_BIT_SCD;
1817
1818 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1819 if (likely(inta || inta_fh))
1820 tasklet_schedule(&priv->irq_tasklet);
1821
1822 unplugged:
1823 spin_unlock(&priv->lock);
1824 return IRQ_HANDLED;
1825
1826 none:
1827 /* re-enable interrupts here since we don't have anything to service. */
1828 /* only Re-enable if diabled by irq */
1829 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1830 iwl_enable_interrupts(priv);
1831 spin_unlock(&priv->lock);
1832 return IRQ_NONE;
1833 }
1834 EXPORT_SYMBOL(iwl_isr_legacy);
1835
1836 int iwl_send_bt_config(struct iwl_priv *priv)
1837 {
1838 struct iwl_bt_cmd bt_cmd = {
1839 .flags = 3,
1840 .lead_time = 0xAA,
1841 .max_kill = 1,
1842 .kill_ack_mask = 0,
1843 .kill_cts_mask = 0,
1844 };
1845
1846 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1847 sizeof(struct iwl_bt_cmd), &bt_cmd);
1848 }
1849 EXPORT_SYMBOL(iwl_send_bt_config);
1850
1851 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
1852 {
1853 u32 stat_flags = 0;
1854 struct iwl_host_cmd cmd = {
1855 .id = REPLY_STATISTICS_CMD,
1856 .meta.flags = flags,
1857 .len = sizeof(stat_flags),
1858 .data = (u8 *) &stat_flags,
1859 };
1860 return iwl_send_cmd(priv, &cmd);
1861 }
1862 EXPORT_SYMBOL(iwl_send_statistics_request);
1863
1864 /**
1865 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1866 * using sample data 100 bytes apart. If these sample points are good,
1867 * it's a pretty good bet that everything between them is good, too.
1868 */
1869 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1870 {
1871 u32 val;
1872 int ret = 0;
1873 u32 errcnt = 0;
1874 u32 i;
1875
1876 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1877
1878 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1879 /* read data comes through single port, auto-incr addr */
1880 /* NOTE: Use the debugless read so we don't flood kernel log
1881 * if IWL_DL_IO is set */
1882 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1883 i + IWL49_RTC_INST_LOWER_BOUND);
1884 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1885 if (val != le32_to_cpu(*image)) {
1886 ret = -EIO;
1887 errcnt++;
1888 if (errcnt >= 3)
1889 break;
1890 }
1891 }
1892
1893 return ret;
1894 }
1895
1896 /**
1897 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1898 * looking at all data.
1899 */
1900 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1901 u32 len)
1902 {
1903 u32 val;
1904 u32 save_len = len;
1905 int ret = 0;
1906 u32 errcnt;
1907
1908 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1909
1910 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1911 IWL49_RTC_INST_LOWER_BOUND);
1912
1913 errcnt = 0;
1914 for (; len > 0; len -= sizeof(u32), image++) {
1915 /* read data comes through single port, auto-incr addr */
1916 /* NOTE: Use the debugless read so we don't flood kernel log
1917 * if IWL_DL_IO is set */
1918 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1919 if (val != le32_to_cpu(*image)) {
1920 IWL_ERR(priv, "uCode INST section is invalid at "
1921 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1922 save_len - len, val, le32_to_cpu(*image));
1923 ret = -EIO;
1924 errcnt++;
1925 if (errcnt >= 20)
1926 break;
1927 }
1928 }
1929
1930 if (!errcnt)
1931 IWL_DEBUG_INFO(priv,
1932 "ucode image in INSTRUCTION memory is good\n");
1933
1934 return ret;
1935 }
1936
1937 /**
1938 * iwl_verify_ucode - determine which instruction image is in SRAM,
1939 * and verify its contents
1940 */
1941 int iwl_verify_ucode(struct iwl_priv *priv)
1942 {
1943 __le32 *image;
1944 u32 len;
1945 int ret;
1946
1947 /* Try bootstrap */
1948 image = (__le32 *)priv->ucode_boot.v_addr;
1949 len = priv->ucode_boot.len;
1950 ret = iwlcore_verify_inst_sparse(priv, image, len);
1951 if (!ret) {
1952 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
1953 return 0;
1954 }
1955
1956 /* Try initialize */
1957 image = (__le32 *)priv->ucode_init.v_addr;
1958 len = priv->ucode_init.len;
1959 ret = iwlcore_verify_inst_sparse(priv, image, len);
1960 if (!ret) {
1961 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
1962 return 0;
1963 }
1964
1965 /* Try runtime/protocol */
1966 image = (__le32 *)priv->ucode_code.v_addr;
1967 len = priv->ucode_code.len;
1968 ret = iwlcore_verify_inst_sparse(priv, image, len);
1969 if (!ret) {
1970 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
1971 return 0;
1972 }
1973
1974 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1975
1976 /* Since nothing seems to match, show first several data entries in
1977 * instruction SRAM, so maybe visual inspection will give a clue.
1978 * Selection of bootstrap image (vs. other images) is arbitrary. */
1979 image = (__le32 *)priv->ucode_boot.v_addr;
1980 len = priv->ucode_boot.len;
1981 ret = iwl_verify_inst_full(priv, image, len);
1982
1983 return ret;
1984 }
1985 EXPORT_SYMBOL(iwl_verify_ucode);
1986
1987
1988 static const char *desc_lookup_text[] = {
1989 "OK",
1990 "FAIL",
1991 "BAD_PARAM",
1992 "BAD_CHECKSUM",
1993 "NMI_INTERRUPT_WDG",
1994 "SYSASSERT",
1995 "FATAL_ERROR",
1996 "BAD_COMMAND",
1997 "HW_ERROR_TUNE_LOCK",
1998 "HW_ERROR_TEMPERATURE",
1999 "ILLEGAL_CHAN_FREQ",
2000 "VCC_NOT_STABLE",
2001 "FH_ERROR",
2002 "NMI_INTERRUPT_HOST",
2003 "NMI_INTERRUPT_ACTION_PT",
2004 "NMI_INTERRUPT_UNKNOWN",
2005 "UCODE_VERSION_MISMATCH",
2006 "HW_ERROR_ABS_LOCK",
2007 "HW_ERROR_CAL_LOCK_FAIL",
2008 "NMI_INTERRUPT_INST_ACTION_PT",
2009 "NMI_INTERRUPT_DATA_ACTION_PT",
2010 "NMI_TRM_HW_ER",
2011 "NMI_INTERRUPT_TRM",
2012 "NMI_INTERRUPT_BREAK_POINT"
2013 "DEBUG_0",
2014 "DEBUG_1",
2015 "DEBUG_2",
2016 "DEBUG_3",
2017 "UNKNOWN"
2018 };
2019
2020 static const char *desc_lookup(int i)
2021 {
2022 int max = ARRAY_SIZE(desc_lookup_text) - 1;
2023
2024 if (i < 0 || i > max)
2025 i = max;
2026
2027 return desc_lookup_text[i];
2028 }
2029
2030 #define ERROR_START_OFFSET (1 * sizeof(u32))
2031 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
2032
2033 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2034 {
2035 u32 data2, line;
2036 u32 desc, time, count, base, data1;
2037 u32 blink1, blink2, ilink1, ilink2;
2038
2039 if (priv->ucode_type == UCODE_INIT)
2040 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2041 else
2042 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2043
2044 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2045 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
2046 return;
2047 }
2048
2049 count = iwl_read_targ_mem(priv, base);
2050
2051 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2052 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2053 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2054 priv->status, count);
2055 }
2056
2057 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2058 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2059 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2060 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2061 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2062 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2063 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2064 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2065 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2066
2067 IWL_ERR(priv, "Desc Time "
2068 "data1 data2 line\n");
2069 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
2070 desc_lookup(desc), desc, time, data1, data2, line);
2071 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
2072 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
2073 ilink1, ilink2);
2074
2075 }
2076 EXPORT_SYMBOL(iwl_dump_nic_error_log);
2077
2078 #define EVENT_START_OFFSET (4 * sizeof(u32))
2079
2080 /**
2081 * iwl_print_event_log - Dump error event log to syslog
2082 *
2083 */
2084 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2085 u32 num_events, u32 mode)
2086 {
2087 u32 i;
2088 u32 base; /* SRAM byte address of event log header */
2089 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2090 u32 ptr; /* SRAM byte address of log data */
2091 u32 ev, time, data; /* event log data */
2092
2093 if (num_events == 0)
2094 return;
2095 if (priv->ucode_type == UCODE_INIT)
2096 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2097 else
2098 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2099
2100 if (mode == 0)
2101 event_size = 2 * sizeof(u32);
2102 else
2103 event_size = 3 * sizeof(u32);
2104
2105 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2106
2107 /* "time" is actually "data" for mode 0 (no timestamp).
2108 * place event id # at far right for easier visual parsing. */
2109 for (i = 0; i < num_events; i++) {
2110 ev = iwl_read_targ_mem(priv, ptr);
2111 ptr += sizeof(u32);
2112 time = iwl_read_targ_mem(priv, ptr);
2113 ptr += sizeof(u32);
2114 if (mode == 0) {
2115 /* data, ev */
2116 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
2117 } else {
2118 data = iwl_read_targ_mem(priv, ptr);
2119 ptr += sizeof(u32);
2120 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2121 time, data, ev);
2122 }
2123 }
2124 }
2125
2126 void iwl_dump_nic_event_log(struct iwl_priv *priv)
2127 {
2128 u32 base; /* SRAM byte address of event log header */
2129 u32 capacity; /* event log capacity in # entries */
2130 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
2131 u32 num_wraps; /* # times uCode wrapped to top of log */
2132 u32 next_entry; /* index of next entry to be written by uCode */
2133 u32 size; /* # entries that we'll print */
2134
2135 if (priv->ucode_type == UCODE_INIT)
2136 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2137 else
2138 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2139
2140 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2141 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
2142 return;
2143 }
2144
2145 /* event log header */
2146 capacity = iwl_read_targ_mem(priv, base);
2147 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2148 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2149 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2150
2151 size = num_wraps ? capacity : next_entry;
2152
2153 /* bail out if nothing in log */
2154 if (size == 0) {
2155 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2156 return;
2157 }
2158
2159 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
2160 size, num_wraps);
2161
2162 /* if uCode has wrapped back to top of log, start at the oldest entry,
2163 * i.e the next one that uCode would fill. */
2164 if (num_wraps)
2165 iwl_print_event_log(priv, next_entry,
2166 capacity - next_entry, mode);
2167 /* (then/else) start at top of log */
2168 iwl_print_event_log(priv, 0, next_entry, mode);
2169
2170 }
2171 EXPORT_SYMBOL(iwl_dump_nic_event_log);
2172
2173 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2174 {
2175 struct iwl_ct_kill_config cmd;
2176 unsigned long flags;
2177 int ret = 0;
2178
2179 spin_lock_irqsave(&priv->lock, flags);
2180 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2181 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2182 spin_unlock_irqrestore(&priv->lock, flags);
2183
2184 cmd.critical_temperature_R =
2185 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2186
2187 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2188 sizeof(cmd), &cmd);
2189 if (ret)
2190 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2191 else
2192 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
2193 "critical temperature is %d\n",
2194 cmd.critical_temperature_R);
2195 }
2196 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2197
2198
2199 /*
2200 * CARD_STATE_CMD
2201 *
2202 * Use: Sets the device's internal card state to enable, disable, or halt
2203 *
2204 * When in the 'enable' state the card operates as normal.
2205 * When in the 'disable' state, the card enters into a low power mode.
2206 * When in the 'halt' state, the card is shut down and must be fully
2207 * restarted to come back on.
2208 */
2209 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2210 {
2211 struct iwl_host_cmd cmd = {
2212 .id = REPLY_CARD_STATE_CMD,
2213 .len = sizeof(u32),
2214 .data = &flags,
2215 .meta.flags = meta_flag,
2216 };
2217
2218 return iwl_send_cmd(priv, &cmd);
2219 }
2220 EXPORT_SYMBOL(iwl_send_card_state);
2221
2222 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2223 struct iwl_rx_mem_buffer *rxb)
2224 {
2225 #ifdef CONFIG_IWLWIFI_DEBUG
2226 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2227 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2228 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2229 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2230 #endif
2231 }
2232 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2233
2234 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2235 struct iwl_rx_mem_buffer *rxb)
2236 {
2237 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2238 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2239 "notification for %s:\n",
2240 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2241 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
2242 }
2243 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2244
2245 void iwl_rx_reply_error(struct iwl_priv *priv,
2246 struct iwl_rx_mem_buffer *rxb)
2247 {
2248 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2249
2250 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2251 "seq 0x%04X ser 0x%08X\n",
2252 le32_to_cpu(pkt->u.err_resp.error_type),
2253 get_cmd_string(pkt->u.err_resp.cmd_id),
2254 pkt->u.err_resp.cmd_id,
2255 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2256 le32_to_cpu(pkt->u.err_resp.error_info));
2257 }
2258 EXPORT_SYMBOL(iwl_rx_reply_error);
2259
2260 void iwl_clear_isr_stats(struct iwl_priv *priv)
2261 {
2262 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2263 }
2264 EXPORT_SYMBOL(iwl_clear_isr_stats);
2265
2266 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2267 const struct ieee80211_tx_queue_params *params)
2268 {
2269 struct iwl_priv *priv = hw->priv;
2270 unsigned long flags;
2271 int q;
2272
2273 IWL_DEBUG_MAC80211(priv, "enter\n");
2274
2275 if (!iwl_is_ready_rf(priv)) {
2276 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2277 return -EIO;
2278 }
2279
2280 if (queue >= AC_NUM) {
2281 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2282 return 0;
2283 }
2284
2285 q = AC_NUM - 1 - queue;
2286
2287 spin_lock_irqsave(&priv->lock, flags);
2288
2289 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2290 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2291 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2292 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2293 cpu_to_le16((params->txop * 32));
2294
2295 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2296 priv->qos_data.qos_active = 1;
2297
2298 if (priv->iw_mode == NL80211_IFTYPE_AP)
2299 iwl_activate_qos(priv, 1);
2300 else if (priv->assoc_id && iwl_is_associated(priv))
2301 iwl_activate_qos(priv, 0);
2302
2303 spin_unlock_irqrestore(&priv->lock, flags);
2304
2305 IWL_DEBUG_MAC80211(priv, "leave\n");
2306 return 0;
2307 }
2308 EXPORT_SYMBOL(iwl_mac_conf_tx);
2309
2310 static void iwl_ht_conf(struct iwl_priv *priv,
2311 struct ieee80211_bss_conf *bss_conf)
2312 {
2313 struct ieee80211_sta_ht_cap *ht_conf;
2314 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2315 struct ieee80211_sta *sta;
2316
2317 IWL_DEBUG_MAC80211(priv, "enter: \n");
2318
2319 if (!iwl_conf->is_ht)
2320 return;
2321
2322
2323 /*
2324 * It is totally wrong to base global information on something
2325 * that is valid only when associated, alas, this driver works
2326 * that way and I don't know how to fix it.
2327 */
2328
2329 rcu_read_lock();
2330 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2331 if (!sta) {
2332 rcu_read_unlock();
2333 return;
2334 }
2335 ht_conf = &sta->ht_cap;
2336
2337 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
2338 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
2339 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
2340 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
2341
2342 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
2343 iwl_conf->max_amsdu_size =
2344 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
2345
2346 iwl_conf->supported_chan_width =
2347 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
2348
2349 /*
2350 * XXX: The HT configuration needs to be moved into iwl_mac_config()
2351 * to be done there correctly.
2352 */
2353
2354 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
2355 if (conf_is_ht40_minus(&priv->hw->conf))
2356 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2357 else if (conf_is_ht40_plus(&priv->hw->conf))
2358 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2359
2360 /* If no above or below channel supplied disable FAT channel */
2361 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
2362 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
2363 iwl_conf->supported_chan_width = 0;
2364
2365 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2366
2367 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2368
2369 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
2370 iwl_conf->ht_protection =
2371 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2372 iwl_conf->non_GF_STA_present =
2373 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2374
2375 rcu_read_unlock();
2376
2377 IWL_DEBUG_MAC80211(priv, "leave\n");
2378 }
2379
2380 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2381 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2382 struct ieee80211_vif *vif,
2383 struct ieee80211_bss_conf *bss_conf,
2384 u32 changes)
2385 {
2386 struct iwl_priv *priv = hw->priv;
2387 int ret;
2388
2389 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2390
2391 if (!iwl_is_alive(priv))
2392 return;
2393
2394 mutex_lock(&priv->mutex);
2395
2396 if (changes & BSS_CHANGED_BEACON &&
2397 priv->iw_mode == NL80211_IFTYPE_AP) {
2398 dev_kfree_skb(priv->ibss_beacon);
2399 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2400 }
2401
2402 if (changes & BSS_CHANGED_BEACON_INT) {
2403 priv->beacon_int = bss_conf->beacon_int;
2404 /* TODO: in AP mode, do something to make this take effect */
2405 }
2406
2407 if (changes & BSS_CHANGED_BSSID) {
2408 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2409
2410 /*
2411 * If there is currently a HW scan going on in the
2412 * background then we need to cancel it else the RXON
2413 * below/in post_associate will fail.
2414 */
2415 if (iwl_scan_cancel_timeout(priv, 100)) {
2416 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2417 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2418 mutex_unlock(&priv->mutex);
2419 return;
2420 }
2421
2422 /* mac80211 only sets assoc when in STATION mode */
2423 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2424 bss_conf->assoc) {
2425 memcpy(priv->staging_rxon.bssid_addr,
2426 bss_conf->bssid, ETH_ALEN);
2427
2428 /* currently needed in a few places */
2429 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2430 } else {
2431 priv->staging_rxon.filter_flags &=
2432 ~RXON_FILTER_ASSOC_MSK;
2433 }
2434
2435 }
2436
2437 /*
2438 * This needs to be after setting the BSSID in case
2439 * mac80211 decides to do both changes at once because
2440 * it will invoke post_associate.
2441 */
2442 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2443 changes & BSS_CHANGED_BEACON) {
2444 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2445
2446 if (beacon)
2447 iwl_mac_beacon_update(hw, beacon);
2448 }
2449
2450 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2451 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2452 bss_conf->use_short_preamble);
2453 if (bss_conf->use_short_preamble)
2454 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2455 else
2456 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2457 }
2458
2459 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2460 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2461 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2462 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2463 else
2464 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2465 }
2466
2467 if (changes & BSS_CHANGED_BASIC_RATES) {
2468 /* XXX use this information
2469 *
2470 * To do that, remove code from iwl_set_rate() and put something
2471 * like this here:
2472 *
2473 if (A-band)
2474 priv->staging_rxon.ofdm_basic_rates =
2475 bss_conf->basic_rates;
2476 else
2477 priv->staging_rxon.ofdm_basic_rates =
2478 bss_conf->basic_rates >> 4;
2479 priv->staging_rxon.cck_basic_rates =
2480 bss_conf->basic_rates & 0xF;
2481 */
2482 }
2483
2484 if (changes & BSS_CHANGED_HT) {
2485 iwl_ht_conf(priv, bss_conf);
2486
2487 if (priv->cfg->ops->hcmd->set_rxon_chain)
2488 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2489 }
2490
2491 if (changes & BSS_CHANGED_ASSOC) {
2492 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2493 if (bss_conf->assoc) {
2494 priv->assoc_id = bss_conf->aid;
2495 priv->beacon_int = bss_conf->beacon_int;
2496 priv->power_data.dtim_period = bss_conf->dtim_period;
2497 priv->timestamp = bss_conf->timestamp;
2498 priv->assoc_capability = bss_conf->assoc_capability;
2499
2500 /*
2501 * We have just associated, don't start scan too early
2502 * leave time for EAPOL exchange to complete.
2503 *
2504 * XXX: do this in mac80211
2505 */
2506 priv->next_scan_jiffies = jiffies +
2507 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2508 if (!iwl_is_rfkill(priv))
2509 priv->cfg->ops->lib->post_associate(priv);
2510 } else
2511 priv->assoc_id = 0;
2512
2513 }
2514
2515 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2516 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2517 changes);
2518 ret = iwl_send_rxon_assoc(priv);
2519 if (!ret) {
2520 /* Sync active_rxon with latest change. */
2521 memcpy((void *)&priv->active_rxon,
2522 &priv->staging_rxon,
2523 sizeof(struct iwl_rxon_cmd));
2524 }
2525 }
2526
2527 mutex_unlock(&priv->mutex);
2528
2529 IWL_DEBUG_MAC80211(priv, "leave\n");
2530 }
2531 EXPORT_SYMBOL(iwl_bss_info_changed);
2532
2533 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2534 {
2535 struct iwl_priv *priv = hw->priv;
2536 unsigned long flags;
2537 __le64 timestamp;
2538
2539 IWL_DEBUG_MAC80211(priv, "enter\n");
2540
2541 if (!iwl_is_ready_rf(priv)) {
2542 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2543 return -EIO;
2544 }
2545
2546 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2547 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2548 return -EIO;
2549 }
2550
2551 spin_lock_irqsave(&priv->lock, flags);
2552
2553 if (priv->ibss_beacon)
2554 dev_kfree_skb(priv->ibss_beacon);
2555
2556 priv->ibss_beacon = skb;
2557
2558 priv->assoc_id = 0;
2559 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2560 priv->timestamp = le64_to_cpu(timestamp);
2561
2562 IWL_DEBUG_MAC80211(priv, "leave\n");
2563 spin_unlock_irqrestore(&priv->lock, flags);
2564
2565 iwl_reset_qos(priv);
2566
2567 priv->cfg->ops->lib->post_associate(priv);
2568
2569
2570 return 0;
2571 }
2572 EXPORT_SYMBOL(iwl_mac_beacon_update);
2573
2574 int iwl_set_mode(struct iwl_priv *priv, int mode)
2575 {
2576 if (mode == NL80211_IFTYPE_ADHOC) {
2577 const struct iwl_channel_info *ch_info;
2578
2579 ch_info = iwl_get_channel_info(priv,
2580 priv->band,
2581 le16_to_cpu(priv->staging_rxon.channel));
2582
2583 if (!ch_info || !is_channel_ibss(ch_info)) {
2584 IWL_ERR(priv, "channel %d not IBSS channel\n",
2585 le16_to_cpu(priv->staging_rxon.channel));
2586 return -EINVAL;
2587 }
2588 }
2589
2590 iwl_connection_init_rx_config(priv, mode);
2591
2592 if (priv->cfg->ops->hcmd->set_rxon_chain)
2593 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2594
2595 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2596
2597 iwl_clear_stations_table(priv);
2598
2599 /* dont commit rxon if rf-kill is on*/
2600 if (!iwl_is_ready_rf(priv))
2601 return -EAGAIN;
2602
2603 iwlcore_commit_rxon(priv);
2604
2605 return 0;
2606 }
2607 EXPORT_SYMBOL(iwl_set_mode);
2608
2609 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2610 struct ieee80211_if_init_conf *conf)
2611 {
2612 struct iwl_priv *priv = hw->priv;
2613 unsigned long flags;
2614
2615 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2616
2617 if (priv->vif) {
2618 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2619 return -EOPNOTSUPP;
2620 }
2621
2622 spin_lock_irqsave(&priv->lock, flags);
2623 priv->vif = conf->vif;
2624 priv->iw_mode = conf->type;
2625
2626 spin_unlock_irqrestore(&priv->lock, flags);
2627
2628 mutex_lock(&priv->mutex);
2629
2630 if (conf->mac_addr) {
2631 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2632 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2633 }
2634
2635 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2636 /* we are not ready, will run again when ready */
2637 set_bit(STATUS_MODE_PENDING, &priv->status);
2638
2639 mutex_unlock(&priv->mutex);
2640
2641 IWL_DEBUG_MAC80211(priv, "leave\n");
2642 return 0;
2643 }
2644 EXPORT_SYMBOL(iwl_mac_add_interface);
2645
2646 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2647 struct ieee80211_if_init_conf *conf)
2648 {
2649 struct iwl_priv *priv = hw->priv;
2650
2651 IWL_DEBUG_MAC80211(priv, "enter\n");
2652
2653 mutex_lock(&priv->mutex);
2654
2655 if (iwl_is_ready_rf(priv)) {
2656 iwl_scan_cancel_timeout(priv, 100);
2657 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2658 iwlcore_commit_rxon(priv);
2659 }
2660 if (priv->vif == conf->vif) {
2661 priv->vif = NULL;
2662 memset(priv->bssid, 0, ETH_ALEN);
2663 }
2664 mutex_unlock(&priv->mutex);
2665
2666 IWL_DEBUG_MAC80211(priv, "leave\n");
2667
2668 }
2669 EXPORT_SYMBOL(iwl_mac_remove_interface);
2670
2671 /**
2672 * iwl_mac_config - mac80211 config callback
2673 *
2674 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2675 * be set inappropriately and the driver currently sets the hardware up to
2676 * use it whenever needed.
2677 */
2678 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2679 {
2680 struct iwl_priv *priv = hw->priv;
2681 const struct iwl_channel_info *ch_info;
2682 struct ieee80211_conf *conf = &hw->conf;
2683 unsigned long flags = 0;
2684 int ret = 0;
2685 u16 ch;
2686 int scan_active = 0;
2687
2688 mutex_lock(&priv->mutex);
2689
2690 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2691 conf->channel->hw_value, changed);
2692
2693 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2694 test_bit(STATUS_SCANNING, &priv->status))) {
2695 scan_active = 1;
2696 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2697 }
2698
2699
2700 /* during scanning mac80211 will delay channel setting until
2701 * scan finish with changed = 0
2702 */
2703 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2704 if (scan_active)
2705 goto set_ch_out;
2706
2707 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2708 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2709 if (!is_channel_valid(ch_info)) {
2710 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2711 ret = -EINVAL;
2712 goto set_ch_out;
2713 }
2714
2715 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2716 !is_channel_ibss(ch_info)) {
2717 IWL_ERR(priv, "channel %d in band %d not "
2718 "IBSS channel\n",
2719 conf->channel->hw_value, conf->channel->band);
2720 ret = -EINVAL;
2721 goto set_ch_out;
2722 }
2723
2724 priv->current_ht_config.is_ht = conf_is_ht(conf);
2725
2726 spin_lock_irqsave(&priv->lock, flags);
2727
2728
2729 /* if we are switching from ht to 2.4 clear flags
2730 * from any ht related info since 2.4 does not
2731 * support ht */
2732 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2733 priv->staging_rxon.flags = 0;
2734
2735 iwl_set_rxon_channel(priv, conf->channel);
2736
2737 iwl_set_flags_for_band(priv, conf->channel->band);
2738 spin_unlock_irqrestore(&priv->lock, flags);
2739 set_ch_out:
2740 /* The list of supported rates and rate mask can be different
2741 * for each band; since the band may have changed, reset
2742 * the rate mask to what mac80211 lists */
2743 iwl_set_rate(priv);
2744 }
2745
2746 if (changed & IEEE80211_CONF_CHANGE_PS &&
2747 priv->iw_mode == NL80211_IFTYPE_STATION) {
2748 priv->power_data.power_disabled =
2749 !(conf->flags & IEEE80211_CONF_PS);
2750 ret = iwl_power_update_mode(priv, 0);
2751 if (ret)
2752 IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
2753 }
2754
2755 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2756 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2757 priv->tx_power_user_lmt, conf->power_level);
2758
2759 iwl_set_tx_power(priv, conf->power_level, false);
2760 }
2761
2762 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2763 if (priv->cfg->ops->hcmd->set_rxon_chain)
2764 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2765
2766 if (!iwl_is_ready(priv)) {
2767 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2768 goto out;
2769 }
2770
2771 if (scan_active)
2772 goto out;
2773
2774 if (memcmp(&priv->active_rxon,
2775 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2776 iwlcore_commit_rxon(priv);
2777 else
2778 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2779
2780
2781 out:
2782 IWL_DEBUG_MAC80211(priv, "leave\n");
2783 mutex_unlock(&priv->mutex);
2784 return ret;
2785 }
2786 EXPORT_SYMBOL(iwl_mac_config);
2787
2788 int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2789 struct ieee80211_tx_queue_stats *stats)
2790 {
2791 struct iwl_priv *priv = hw->priv;
2792 int i, avail;
2793 struct iwl_tx_queue *txq;
2794 struct iwl_queue *q;
2795 unsigned long flags;
2796
2797 IWL_DEBUG_MAC80211(priv, "enter\n");
2798
2799 if (!iwl_is_ready_rf(priv)) {
2800 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2801 return -EIO;
2802 }
2803
2804 spin_lock_irqsave(&priv->lock, flags);
2805
2806 for (i = 0; i < AC_NUM; i++) {
2807 txq = &priv->txq[i];
2808 q = &txq->q;
2809 avail = iwl_queue_space(q);
2810
2811 stats[i].len = q->n_window - avail;
2812 stats[i].limit = q->n_window - q->high_mark;
2813 stats[i].count = q->n_window;
2814
2815 }
2816 spin_unlock_irqrestore(&priv->lock, flags);
2817
2818 IWL_DEBUG_MAC80211(priv, "leave\n");
2819
2820 return 0;
2821 }
2822 EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2823
2824 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2825 {
2826 struct iwl_priv *priv = hw->priv;
2827 unsigned long flags;
2828
2829 mutex_lock(&priv->mutex);
2830 IWL_DEBUG_MAC80211(priv, "enter\n");
2831
2832 spin_lock_irqsave(&priv->lock, flags);
2833 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2834 spin_unlock_irqrestore(&priv->lock, flags);
2835
2836 iwl_reset_qos(priv);
2837
2838 spin_lock_irqsave(&priv->lock, flags);
2839 priv->assoc_id = 0;
2840 priv->assoc_capability = 0;
2841 priv->assoc_station_added = 0;
2842
2843 /* new association get rid of ibss beacon skb */
2844 if (priv->ibss_beacon)
2845 dev_kfree_skb(priv->ibss_beacon);
2846
2847 priv->ibss_beacon = NULL;
2848
2849 priv->beacon_int = priv->vif->bss_conf.beacon_int;
2850 priv->timestamp = 0;
2851 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2852 priv->beacon_int = 0;
2853
2854 spin_unlock_irqrestore(&priv->lock, flags);
2855
2856 if (!iwl_is_ready_rf(priv)) {
2857 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2858 mutex_unlock(&priv->mutex);
2859 return;
2860 }
2861
2862 /* we are restarting association process
2863 * clear RXON_FILTER_ASSOC_MSK bit
2864 */
2865 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2866 iwl_scan_cancel_timeout(priv, 100);
2867 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2868 iwlcore_commit_rxon(priv);
2869 }
2870
2871 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2872 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2873 mutex_unlock(&priv->mutex);
2874 return;
2875 }
2876
2877 iwl_set_rate(priv);
2878
2879 mutex_unlock(&priv->mutex);
2880
2881 IWL_DEBUG_MAC80211(priv, "leave\n");
2882 }
2883 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2884
2885 #ifdef CONFIG_PM
2886
2887 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2888 {
2889 struct iwl_priv *priv = pci_get_drvdata(pdev);
2890
2891 /*
2892 * This function is called when system goes into suspend state
2893 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2894 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2895 * it will not call apm_ops.stop() to stop the DMA operation.
2896 * Calling apm_ops.stop here to make sure we stop the DMA.
2897 */
2898 priv->cfg->ops->lib->apm_ops.stop(priv);
2899
2900 pci_save_state(pdev);
2901 pci_disable_device(pdev);
2902 pci_set_power_state(pdev, PCI_D3hot);
2903
2904 return 0;
2905 }
2906 EXPORT_SYMBOL(iwl_pci_suspend);
2907
2908 int iwl_pci_resume(struct pci_dev *pdev)
2909 {
2910 struct iwl_priv *priv = pci_get_drvdata(pdev);
2911 int ret;
2912
2913 pci_set_power_state(pdev, PCI_D0);
2914 ret = pci_enable_device(pdev);
2915 if (ret)
2916 return ret;
2917 pci_restore_state(pdev);
2918 iwl_enable_interrupts(priv);
2919
2920 return 0;
2921 }
2922 EXPORT_SYMBOL(iwl_pci_resume);
2923
2924 #endif /* CONFIG_PM */
Linux kernel - Deliverables
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