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iwl3945: cleanup number of queues settings
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <net/mac80211.h>
33
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h" /* FIXME: remove */
36 #include "iwl-debug.h"
37 #include "iwl-core.h"
38 #include "iwl-io.h"
39 #include "iwl-power.h"
40 #include "iwl-sta.h"
41 #include "iwl-helpers.h"
42
43
44 MODULE_DESCRIPTION("iwl core");
45 MODULE_VERSION(IWLWIFI_VERSION);
46 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
47 MODULE_LICENSE("GPL");
48
49 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
61
62 static irqreturn_t iwl_isr(int irq, void *data);
63
64 /*
65 * Parameter order:
66 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
67 *
68 * If there isn't a valid next or previous rate then INV is used which
69 * maps to IWL_RATE_INVALID
70 *
71 */
72 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
73 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
74 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
75 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
76 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
77 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
78 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
79 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
80 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
81 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
82 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
83 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
84 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
85 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
86 /* FIXME:RS: ^^ should be INV (legacy) */
87 };
88 EXPORT_SYMBOL(iwl_rates);
89
90 /**
91 * translate ucode response to mac80211 tx status control values
92 */
93 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
94 struct ieee80211_tx_info *info)
95 {
96 int rate_index;
97 struct ieee80211_tx_rate *r = &info->control.rates[0];
98
99 info->antenna_sel_tx =
100 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
101 if (rate_n_flags & RATE_MCS_HT_MSK)
102 r->flags |= IEEE80211_TX_RC_MCS;
103 if (rate_n_flags & RATE_MCS_GF_MSK)
104 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
105 if (rate_n_flags & RATE_MCS_FAT_MSK)
106 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
107 if (rate_n_flags & RATE_MCS_DUP_MSK)
108 r->flags |= IEEE80211_TX_RC_DUP_DATA;
109 if (rate_n_flags & RATE_MCS_SGI_MSK)
110 r->flags |= IEEE80211_TX_RC_SHORT_GI;
111 rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
112 if (info->band == IEEE80211_BAND_5GHZ)
113 rate_index -= IWL_FIRST_OFDM_RATE;
114 r->idx = rate_index;
115 }
116 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
117
118 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
119 {
120 int idx = 0;
121
122 /* HT rate format */
123 if (rate_n_flags & RATE_MCS_HT_MSK) {
124 idx = (rate_n_flags & 0xff);
125
126 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
127 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
128 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
129 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
130
131 idx += IWL_FIRST_OFDM_RATE;
132 /* skip 9M not supported in ht*/
133 if (idx >= IWL_RATE_9M_INDEX)
134 idx += 1;
135 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
136 return idx;
137
138 /* legacy rate format, search for match in table */
139 } else {
140 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
141 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
142 return idx;
143 }
144
145 return -1;
146 }
147 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
148
149 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
150 {
151 int i;
152 u8 ind = ant;
153 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
154 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
155 if (priv->hw_params.valid_tx_ant & BIT(ind))
156 return ind;
157 }
158 return ant;
159 }
160
161 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
162 EXPORT_SYMBOL(iwl_bcast_addr);
163
164
165 /* This function both allocates and initializes hw and priv. */
166 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
167 struct ieee80211_ops *hw_ops)
168 {
169 struct iwl_priv *priv;
170
171 /* mac80211 allocates memory for this device instance, including
172 * space for this driver's private structure */
173 struct ieee80211_hw *hw =
174 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
175 if (hw == NULL) {
176 printk(KERN_ERR "%s: Can not allocate network device\n",
177 cfg->name);
178 goto out;
179 }
180
181 priv = hw->priv;
182 priv->hw = hw;
183
184 out:
185 return hw;
186 }
187 EXPORT_SYMBOL(iwl_alloc_all);
188
189 void iwl_hw_detect(struct iwl_priv *priv)
190 {
191 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
192 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
193 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
194 }
195 EXPORT_SYMBOL(iwl_hw_detect);
196
197 int iwl_hw_nic_init(struct iwl_priv *priv)
198 {
199 unsigned long flags;
200 struct iwl_rx_queue *rxq = &priv->rxq;
201 int ret;
202
203 /* nic_init */
204 spin_lock_irqsave(&priv->lock, flags);
205 priv->cfg->ops->lib->apm_ops.init(priv);
206 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
207 spin_unlock_irqrestore(&priv->lock, flags);
208
209 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
210
211 priv->cfg->ops->lib->apm_ops.config(priv);
212
213 /* Allocate the RX queue, or reset if it is already allocated */
214 if (!rxq->bd) {
215 ret = iwl_rx_queue_alloc(priv);
216 if (ret) {
217 IWL_ERR(priv, "Unable to initialize Rx queue\n");
218 return -ENOMEM;
219 }
220 } else
221 iwl_rx_queue_reset(priv, rxq);
222
223 iwl_rx_replenish(priv);
224
225 iwl_rx_init(priv, rxq);
226
227 spin_lock_irqsave(&priv->lock, flags);
228
229 rxq->need_update = 1;
230 iwl_rx_queue_update_write_ptr(priv, rxq);
231
232 spin_unlock_irqrestore(&priv->lock, flags);
233
234 /* Allocate and init all Tx and Command queues */
235 ret = iwl_txq_ctx_reset(priv);
236 if (ret)
237 return ret;
238
239 set_bit(STATUS_INIT, &priv->status);
240
241 return 0;
242 }
243 EXPORT_SYMBOL(iwl_hw_nic_init);
244
245 /*
246 * QoS support
247 */
248 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
249 {
250 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
251 return;
252
253 priv->qos_data.def_qos_parm.qos_flags = 0;
254
255 if (priv->qos_data.qos_cap.q_AP.queue_request &&
256 !priv->qos_data.qos_cap.q_AP.txop_request)
257 priv->qos_data.def_qos_parm.qos_flags |=
258 QOS_PARAM_FLG_TXOP_TYPE_MSK;
259 if (priv->qos_data.qos_active)
260 priv->qos_data.def_qos_parm.qos_flags |=
261 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
262
263 if (priv->current_ht_config.is_ht)
264 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
265
266 if (force || iwl_is_associated(priv)) {
267 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
268 priv->qos_data.qos_active,
269 priv->qos_data.def_qos_parm.qos_flags);
270
271 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
272 sizeof(struct iwl_qosparam_cmd),
273 &priv->qos_data.def_qos_parm, NULL);
274 }
275 }
276 EXPORT_SYMBOL(iwl_activate_qos);
277
278 /*
279 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
280 * (802.11b) (802.11a/g)
281 * AC_BK 15 1023 7 0 0
282 * AC_BE 15 1023 3 0 0
283 * AC_VI 7 15 2 6.016ms 3.008ms
284 * AC_VO 3 7 2 3.264ms 1.504ms
285 */
286 void iwl_reset_qos(struct iwl_priv *priv)
287 {
288 u16 cw_min = 15;
289 u16 cw_max = 1023;
290 u8 aifs = 2;
291 bool is_legacy = false;
292 unsigned long flags;
293 int i;
294
295 spin_lock_irqsave(&priv->lock, flags);
296 /* QoS always active in AP and ADHOC mode
297 * In STA mode wait for association
298 */
299 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
300 priv->iw_mode == NL80211_IFTYPE_AP)
301 priv->qos_data.qos_active = 1;
302 else
303 priv->qos_data.qos_active = 0;
304
305 /* check for legacy mode */
306 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
307 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
308 (priv->iw_mode == NL80211_IFTYPE_STATION &&
309 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
310 cw_min = 31;
311 is_legacy = 1;
312 }
313
314 if (priv->qos_data.qos_active)
315 aifs = 3;
316
317 /* AC_BE */
318 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
319 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
320 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
321 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
322 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
323
324 if (priv->qos_data.qos_active) {
325 /* AC_BK */
326 i = 1;
327 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
328 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
329 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
330 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
331 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
332
333 /* AC_VI */
334 i = 2;
335 priv->qos_data.def_qos_parm.ac[i].cw_min =
336 cpu_to_le16((cw_min + 1) / 2 - 1);
337 priv->qos_data.def_qos_parm.ac[i].cw_max =
338 cpu_to_le16(cw_min);
339 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
340 if (is_legacy)
341 priv->qos_data.def_qos_parm.ac[i].edca_txop =
342 cpu_to_le16(6016);
343 else
344 priv->qos_data.def_qos_parm.ac[i].edca_txop =
345 cpu_to_le16(3008);
346 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
347
348 /* AC_VO */
349 i = 3;
350 priv->qos_data.def_qos_parm.ac[i].cw_min =
351 cpu_to_le16((cw_min + 1) / 4 - 1);
352 priv->qos_data.def_qos_parm.ac[i].cw_max =
353 cpu_to_le16((cw_min + 1) / 2 - 1);
354 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
355 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
356 if (is_legacy)
357 priv->qos_data.def_qos_parm.ac[i].edca_txop =
358 cpu_to_le16(3264);
359 else
360 priv->qos_data.def_qos_parm.ac[i].edca_txop =
361 cpu_to_le16(1504);
362 } else {
363 for (i = 1; i < 4; i++) {
364 priv->qos_data.def_qos_parm.ac[i].cw_min =
365 cpu_to_le16(cw_min);
366 priv->qos_data.def_qos_parm.ac[i].cw_max =
367 cpu_to_le16(cw_max);
368 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
369 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
370 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
371 }
372 }
373 IWL_DEBUG_QOS(priv, "set QoS to default \n");
374
375 spin_unlock_irqrestore(&priv->lock, flags);
376 }
377 EXPORT_SYMBOL(iwl_reset_qos);
378
379 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
380 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
381 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
382 struct ieee80211_sta_ht_cap *ht_info,
383 enum ieee80211_band band)
384 {
385 u16 max_bit_rate = 0;
386 u8 rx_chains_num = priv->hw_params.rx_chains_num;
387 u8 tx_chains_num = priv->hw_params.tx_chains_num;
388
389 ht_info->cap = 0;
390 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
391
392 ht_info->ht_supported = true;
393
394 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
395 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
396 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
397 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
398
399 max_bit_rate = MAX_BIT_RATE_20_MHZ;
400 if (priv->hw_params.fat_channel & BIT(band)) {
401 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
402 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
403 ht_info->mcs.rx_mask[4] = 0x01;
404 max_bit_rate = MAX_BIT_RATE_40_MHZ;
405 }
406
407 if (priv->cfg->mod_params->amsdu_size_8K)
408 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
409
410 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
411 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
412
413 ht_info->mcs.rx_mask[0] = 0xFF;
414 if (rx_chains_num >= 2)
415 ht_info->mcs.rx_mask[1] = 0xFF;
416 if (rx_chains_num >= 3)
417 ht_info->mcs.rx_mask[2] = 0xFF;
418
419 /* Highest supported Rx data rate */
420 max_bit_rate *= rx_chains_num;
421 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
422 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
423
424 /* Tx MCS capabilities */
425 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
426 if (tx_chains_num != rx_chains_num) {
427 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
428 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
429 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
430 }
431 }
432
433 static void iwlcore_init_hw_rates(struct iwl_priv *priv,
434 struct ieee80211_rate *rates)
435 {
436 int i;
437
438 for (i = 0; i < IWL_RATE_COUNT; i++) {
439 rates[i].bitrate = iwl_rates[i].ieee * 5;
440 rates[i].hw_value = i; /* Rate scaling will work on indexes */
441 rates[i].hw_value_short = i;
442 rates[i].flags = 0;
443 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
444 /*
445 * If CCK != 1M then set short preamble rate flag.
446 */
447 rates[i].flags |=
448 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
449 0 : IEEE80211_RATE_SHORT_PREAMBLE;
450 }
451 }
452 }
453
454
455 /**
456 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
457 */
458 int iwlcore_init_geos(struct iwl_priv *priv)
459 {
460 struct iwl_channel_info *ch;
461 struct ieee80211_supported_band *sband;
462 struct ieee80211_channel *channels;
463 struct ieee80211_channel *geo_ch;
464 struct ieee80211_rate *rates;
465 int i = 0;
466
467 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
468 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
469 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
470 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
471 return 0;
472 }
473
474 channels = kzalloc(sizeof(struct ieee80211_channel) *
475 priv->channel_count, GFP_KERNEL);
476 if (!channels)
477 return -ENOMEM;
478
479 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
480 GFP_KERNEL);
481 if (!rates) {
482 kfree(channels);
483 return -ENOMEM;
484 }
485
486 /* 5.2GHz channels start after the 2.4GHz channels */
487 sband = &priv->bands[IEEE80211_BAND_5GHZ];
488 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
489 /* just OFDM */
490 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
491 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
492
493 if (priv->cfg->sku & IWL_SKU_N)
494 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
495 IEEE80211_BAND_5GHZ);
496
497 sband = &priv->bands[IEEE80211_BAND_2GHZ];
498 sband->channels = channels;
499 /* OFDM & CCK */
500 sband->bitrates = rates;
501 sband->n_bitrates = IWL_RATE_COUNT;
502
503 if (priv->cfg->sku & IWL_SKU_N)
504 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
505 IEEE80211_BAND_2GHZ);
506
507 priv->ieee_channels = channels;
508 priv->ieee_rates = rates;
509
510 for (i = 0; i < priv->channel_count; i++) {
511 ch = &priv->channel_info[i];
512
513 /* FIXME: might be removed if scan is OK */
514 if (!is_channel_valid(ch))
515 continue;
516
517 if (is_channel_a_band(ch))
518 sband = &priv->bands[IEEE80211_BAND_5GHZ];
519 else
520 sband = &priv->bands[IEEE80211_BAND_2GHZ];
521
522 geo_ch = &sband->channels[sband->n_channels++];
523
524 geo_ch->center_freq =
525 ieee80211_channel_to_frequency(ch->channel);
526 geo_ch->max_power = ch->max_power_avg;
527 geo_ch->max_antenna_gain = 0xff;
528 geo_ch->hw_value = ch->channel;
529
530 if (is_channel_valid(ch)) {
531 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
532 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
533
534 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
535 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
536
537 if (ch->flags & EEPROM_CHANNEL_RADAR)
538 geo_ch->flags |= IEEE80211_CHAN_RADAR;
539
540 geo_ch->flags |= ch->fat_extension_channel;
541
542 if (ch->max_power_avg > priv->tx_power_channel_lmt)
543 priv->tx_power_channel_lmt = ch->max_power_avg;
544 } else {
545 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
546 }
547
548 /* Save flags for reg domain usage */
549 geo_ch->orig_flags = geo_ch->flags;
550
551 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
552 ch->channel, geo_ch->center_freq,
553 is_channel_a_band(ch) ? "5.2" : "2.4",
554 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
555 "restricted" : "valid",
556 geo_ch->flags);
557 }
558
559 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
560 priv->cfg->sku & IWL_SKU_A) {
561 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
562 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
563 priv->pci_dev->device,
564 priv->pci_dev->subsystem_device);
565 priv->cfg->sku &= ~IWL_SKU_A;
566 }
567
568 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
569 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
570 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
571
572 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
573
574 return 0;
575 }
576 EXPORT_SYMBOL(iwlcore_init_geos);
577
578 /*
579 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
580 */
581 void iwlcore_free_geos(struct iwl_priv *priv)
582 {
583 kfree(priv->ieee_channels);
584 kfree(priv->ieee_rates);
585 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
586 }
587 EXPORT_SYMBOL(iwlcore_free_geos);
588
589 static bool is_single_rx_stream(struct iwl_priv *priv)
590 {
591 return !priv->current_ht_config.is_ht ||
592 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
593 (priv->current_ht_config.mcs.rx_mask[2] == 0));
594 }
595
596 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
597 enum ieee80211_band band,
598 u16 channel, u8 extension_chan_offset)
599 {
600 const struct iwl_channel_info *ch_info;
601
602 ch_info = iwl_get_channel_info(priv, band, channel);
603 if (!is_channel_valid(ch_info))
604 return 0;
605
606 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
607 return !(ch_info->fat_extension_channel &
608 IEEE80211_CHAN_NO_HT40PLUS);
609 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
610 return !(ch_info->fat_extension_channel &
611 IEEE80211_CHAN_NO_HT40MINUS);
612
613 return 0;
614 }
615
616 u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
617 struct ieee80211_sta_ht_cap *sta_ht_inf)
618 {
619 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
620
621 if ((!iwl_ht_conf->is_ht) ||
622 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
623 return 0;
624
625 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
626 * the bit will not set if it is pure 40MHz case
627 */
628 if (sta_ht_inf) {
629 if (!sta_ht_inf->ht_supported)
630 return 0;
631 }
632 return iwl_is_channel_extension(priv, priv->band,
633 le16_to_cpu(priv->staging_rxon.channel),
634 iwl_ht_conf->extension_chan_offset);
635 }
636 EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
637
638 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
639 {
640 u16 new_val = 0;
641 u16 beacon_factor = 0;
642
643 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
644 new_val = beacon_val / beacon_factor;
645
646 if (!new_val)
647 new_val = max_beacon_val;
648
649 return new_val;
650 }
651
652 void iwl_setup_rxon_timing(struct iwl_priv *priv)
653 {
654 u64 tsf;
655 s32 interval_tm, rem;
656 unsigned long flags;
657 struct ieee80211_conf *conf = NULL;
658 u16 beacon_int;
659
660 conf = ieee80211_get_hw_conf(priv->hw);
661
662 spin_lock_irqsave(&priv->lock, flags);
663 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
664 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
665
666 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
667 beacon_int = priv->beacon_int;
668 priv->rxon_timing.atim_window = 0;
669 } else {
670 beacon_int = priv->vif->bss_conf.beacon_int;
671
672 /* TODO: we need to get atim_window from upper stack
673 * for now we set to 0 */
674 priv->rxon_timing.atim_window = 0;
675 }
676
677 beacon_int = iwl_adjust_beacon_interval(beacon_int,
678 priv->hw_params.max_beacon_itrvl * 1024);
679 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
680
681 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
682 interval_tm = beacon_int * 1024;
683 rem = do_div(tsf, interval_tm);
684 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
685
686 spin_unlock_irqrestore(&priv->lock, flags);
687 IWL_DEBUG_ASSOC(priv,
688 "beacon interval %d beacon timer %d beacon tim %d\n",
689 le16_to_cpu(priv->rxon_timing.beacon_interval),
690 le32_to_cpu(priv->rxon_timing.beacon_init_val),
691 le16_to_cpu(priv->rxon_timing.atim_window));
692 }
693 EXPORT_SYMBOL(iwl_setup_rxon_timing);
694
695 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
696 {
697 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
698
699 if (hw_decrypt)
700 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
701 else
702 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
703
704 }
705 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
706
707 /**
708 * iwl_check_rxon_cmd - validate RXON structure is valid
709 *
710 * NOTE: This is really only useful during development and can eventually
711 * be #ifdef'd out once the driver is stable and folks aren't actively
712 * making changes
713 */
714 int iwl_check_rxon_cmd(struct iwl_priv *priv)
715 {
716 int error = 0;
717 int counter = 1;
718 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
719
720 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
721 error |= le32_to_cpu(rxon->flags &
722 (RXON_FLG_TGJ_NARROW_BAND_MSK |
723 RXON_FLG_RADAR_DETECT_MSK));
724 if (error)
725 IWL_WARN(priv, "check 24G fields %d | %d\n",
726 counter++, error);
727 } else {
728 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
729 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
730 if (error)
731 IWL_WARN(priv, "check 52 fields %d | %d\n",
732 counter++, error);
733 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
734 if (error)
735 IWL_WARN(priv, "check 52 CCK %d | %d\n",
736 counter++, error);
737 }
738 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
739 if (error)
740 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
741
742 /* make sure basic rates 6Mbps and 1Mbps are supported */
743 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
744 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
745 if (error)
746 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
747
748 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
749 if (error)
750 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
751
752 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
753 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
754 if (error)
755 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
756 counter++, error);
757
758 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
759 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
760 if (error)
761 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
762 counter++, error);
763
764 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
765 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
766 if (error)
767 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
768 counter++, error);
769
770 if (error)
771 IWL_WARN(priv, "Tuning to channel %d\n",
772 le16_to_cpu(rxon->channel));
773
774 if (error) {
775 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
776 return -1;
777 }
778 return 0;
779 }
780 EXPORT_SYMBOL(iwl_check_rxon_cmd);
781
782 /**
783 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
784 * @priv: staging_rxon is compared to active_rxon
785 *
786 * If the RXON structure is changing enough to require a new tune,
787 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
788 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
789 */
790 int iwl_full_rxon_required(struct iwl_priv *priv)
791 {
792
793 /* These items are only settable from the full RXON command */
794 if (!(iwl_is_associated(priv)) ||
795 compare_ether_addr(priv->staging_rxon.bssid_addr,
796 priv->active_rxon.bssid_addr) ||
797 compare_ether_addr(priv->staging_rxon.node_addr,
798 priv->active_rxon.node_addr) ||
799 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
800 priv->active_rxon.wlap_bssid_addr) ||
801 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
802 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
803 (priv->staging_rxon.air_propagation !=
804 priv->active_rxon.air_propagation) ||
805 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
806 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
807 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
808 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
809 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
810 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
811 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
812 return 1;
813
814 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
815 * be updated with the RXON_ASSOC command -- however only some
816 * flag transitions are allowed using RXON_ASSOC */
817
818 /* Check if we are not switching bands */
819 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
820 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
821 return 1;
822
823 /* Check if we are switching association toggle */
824 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
825 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
826 return 1;
827
828 return 0;
829 }
830 EXPORT_SYMBOL(iwl_full_rxon_required);
831
832 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
833 {
834 int i;
835 int rate_mask;
836
837 /* Set rate mask*/
838 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
839 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
840 else
841 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
842
843 /* Find lowest valid rate */
844 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
845 i = iwl_rates[i].next_ieee) {
846 if (rate_mask & (1 << i))
847 return iwl_rates[i].plcp;
848 }
849
850 /* No valid rate was found. Assign the lowest one */
851 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
852 return IWL_RATE_1M_PLCP;
853 else
854 return IWL_RATE_6M_PLCP;
855 }
856 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
857
858 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
859 {
860 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
861
862 if (!ht_info->is_ht) {
863 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
864 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
865 RXON_FLG_FAT_PROT_MSK |
866 RXON_FLG_HT_PROT_MSK);
867 return;
868 }
869
870 /* FIXME: if the definition of ht_protection changed, the "translation"
871 * will be needed for rxon->flags
872 */
873 rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
874
875 /* Set up channel bandwidth:
876 * 20 MHz only, 20/40 mixed or pure 40 if fat ok */
877 /* clear the HT channel mode before set the mode */
878 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
879 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
880 if (iwl_is_fat_tx_allowed(priv, NULL)) {
881 /* pure 40 fat */
882 if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
883 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
884 /* Note: control channel is opposite of extension channel */
885 switch (ht_info->extension_chan_offset) {
886 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
887 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
888 break;
889 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
890 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
891 break;
892 }
893 } else {
894 /* Note: control channel is opposite of extension channel */
895 switch (ht_info->extension_chan_offset) {
896 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
897 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
898 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
899 break;
900 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
901 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
902 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
903 break;
904 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
905 default:
906 /* channel location only valid if in Mixed mode */
907 IWL_ERR(priv, "invalid extension channel offset\n");
908 break;
909 }
910 }
911 } else {
912 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
913 }
914
915 if (priv->cfg->ops->hcmd->set_rxon_chain)
916 priv->cfg->ops->hcmd->set_rxon_chain(priv);
917
918 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
919 "rxon flags 0x%X operation mode :0x%X "
920 "extension channel offset 0x%x\n",
921 ht_info->mcs.rx_mask[0],
922 ht_info->mcs.rx_mask[1],
923 ht_info->mcs.rx_mask[2],
924 le32_to_cpu(rxon->flags), ht_info->ht_protection,
925 ht_info->extension_chan_offset);
926 return;
927 }
928 EXPORT_SYMBOL(iwl_set_rxon_ht);
929
930 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
931 #define IWL_NUM_RX_CHAINS_SINGLE 2
932 #define IWL_NUM_IDLE_CHAINS_DUAL 2
933 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
934
935 /* Determine how many receiver/antenna chains to use.
936 * More provides better reception via diversity. Fewer saves power.
937 * MIMO (dual stream) requires at least 2, but works better with 3.
938 * This does not determine *which* chains to use, just how many.
939 */
940 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
941 {
942 bool is_single = is_single_rx_stream(priv);
943 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
944
945 /* # of Rx chains to use when expecting MIMO. */
946 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
947 WLAN_HT_CAP_SM_PS_STATIC)))
948 return IWL_NUM_RX_CHAINS_SINGLE;
949 else
950 return IWL_NUM_RX_CHAINS_MULTIPLE;
951 }
952
953 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
954 {
955 int idle_cnt;
956 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
957 /* # Rx chains when idling and maybe trying to save power */
958 switch (priv->current_ht_config.sm_ps) {
959 case WLAN_HT_CAP_SM_PS_STATIC:
960 case WLAN_HT_CAP_SM_PS_DYNAMIC:
961 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
962 IWL_NUM_IDLE_CHAINS_SINGLE;
963 break;
964 case WLAN_HT_CAP_SM_PS_DISABLED:
965 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
966 break;
967 case WLAN_HT_CAP_SM_PS_INVALID:
968 default:
969 IWL_ERR(priv, "invalid mimo ps mode %d\n",
970 priv->current_ht_config.sm_ps);
971 WARN_ON(1);
972 idle_cnt = -1;
973 break;
974 }
975 return idle_cnt;
976 }
977
978 /* up to 4 chains */
979 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
980 {
981 u8 res;
982 res = (chain_bitmap & BIT(0)) >> 0;
983 res += (chain_bitmap & BIT(1)) >> 1;
984 res += (chain_bitmap & BIT(2)) >> 2;
985 res += (chain_bitmap & BIT(4)) >> 4;
986 return res;
987 }
988
989 /**
990 * iwl_is_monitor_mode - Determine if interface in monitor mode
991 *
992 * priv->iw_mode is set in add_interface, but add_interface is
993 * never called for monitor mode. The only way mac80211 informs us about
994 * monitor mode is through configuring filters (call to configure_filter).
995 */
996 bool iwl_is_monitor_mode(struct iwl_priv *priv)
997 {
998 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
999 }
1000 EXPORT_SYMBOL(iwl_is_monitor_mode);
1001
1002 /**
1003 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1004 *
1005 * Selects how many and which Rx receivers/antennas/chains to use.
1006 * This should not be used for scan command ... it puts data in wrong place.
1007 */
1008 void iwl_set_rxon_chain(struct iwl_priv *priv)
1009 {
1010 bool is_single = is_single_rx_stream(priv);
1011 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1012 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1013 u32 active_chains;
1014 u16 rx_chain;
1015
1016 /* Tell uCode which antennas are actually connected.
1017 * Before first association, we assume all antennas are connected.
1018 * Just after first association, iwl_chain_noise_calibration()
1019 * checks which antennas actually *are* connected. */
1020 if (priv->chain_noise_data.active_chains)
1021 active_chains = priv->chain_noise_data.active_chains;
1022 else
1023 active_chains = priv->hw_params.valid_rx_ant;
1024
1025 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1026
1027 /* How many receivers should we use? */
1028 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1029 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1030
1031
1032 /* correct rx chain count according hw settings
1033 * and chain noise calibration
1034 */
1035 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1036 if (valid_rx_cnt < active_rx_cnt)
1037 active_rx_cnt = valid_rx_cnt;
1038
1039 if (valid_rx_cnt < idle_rx_cnt)
1040 idle_rx_cnt = valid_rx_cnt;
1041
1042 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1043 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1044
1045 /* copied from 'iwl_bg_request_scan()' */
1046 /* Force use of chains B and C (0x6) for Rx for 4965
1047 * Avoid A (0x1) because of its off-channel reception on A-band.
1048 * MIMO is not used here, but value is required */
1049 if (iwl_is_monitor_mode(priv) &&
1050 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1051 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
1052 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1053 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1054 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1055 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1056 }
1057
1058 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1059
1060 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1061 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1062 else
1063 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1064
1065 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1066 priv->staging_rxon.rx_chain,
1067 active_rx_cnt, idle_rx_cnt);
1068
1069 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1070 active_rx_cnt < idle_rx_cnt);
1071 }
1072 EXPORT_SYMBOL(iwl_set_rxon_chain);
1073
1074 /**
1075 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1076 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1077 * @channel: Any channel valid for the requested phymode
1078
1079 * In addition to setting the staging RXON, priv->phymode is also set.
1080 *
1081 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1082 * in the staging RXON flag structure based on the phymode
1083 */
1084 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1085 {
1086 enum ieee80211_band band = ch->band;
1087 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1088
1089 if (!iwl_get_channel_info(priv, band, channel)) {
1090 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1091 channel, band);
1092 return -EINVAL;
1093 }
1094
1095 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1096 (priv->band == band))
1097 return 0;
1098
1099 priv->staging_rxon.channel = cpu_to_le16(channel);
1100 if (band == IEEE80211_BAND_5GHZ)
1101 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1102 else
1103 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1104
1105 priv->band = band;
1106
1107 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1108
1109 return 0;
1110 }
1111 EXPORT_SYMBOL(iwl_set_rxon_channel);
1112
1113 void iwl_set_flags_for_band(struct iwl_priv *priv,
1114 enum ieee80211_band band)
1115 {
1116 if (band == IEEE80211_BAND_5GHZ) {
1117 priv->staging_rxon.flags &=
1118 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1119 | RXON_FLG_CCK_MSK);
1120 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1121 } else {
1122 /* Copied from iwl_post_associate() */
1123 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1124 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1125 else
1126 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1127
1128 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1129 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1130
1131 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1132 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1133 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1134 }
1135 }
1136 EXPORT_SYMBOL(iwl_set_flags_for_band);
1137
1138 /*
1139 * initialize rxon structure with default values from eeprom
1140 */
1141 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1142 {
1143 const struct iwl_channel_info *ch_info;
1144
1145 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1146
1147 switch (mode) {
1148 case NL80211_IFTYPE_AP:
1149 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1150 break;
1151
1152 case NL80211_IFTYPE_STATION:
1153 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1154 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1155 break;
1156
1157 case NL80211_IFTYPE_ADHOC:
1158 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1159 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1160 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1161 RXON_FILTER_ACCEPT_GRP_MSK;
1162 break;
1163
1164 default:
1165 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1166 break;
1167 }
1168
1169 #if 0
1170 /* TODO: Figure out when short_preamble would be set and cache from
1171 * that */
1172 if (!hw_to_local(priv->hw)->short_preamble)
1173 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1174 else
1175 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1176 #endif
1177
1178 ch_info = iwl_get_channel_info(priv, priv->band,
1179 le16_to_cpu(priv->active_rxon.channel));
1180
1181 if (!ch_info)
1182 ch_info = &priv->channel_info[0];
1183
1184 /*
1185 * in some case A channels are all non IBSS
1186 * in this case force B/G channel
1187 */
1188 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1189 !(is_channel_ibss(ch_info)))
1190 ch_info = &priv->channel_info[0];
1191
1192 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1193 priv->band = ch_info->band;
1194
1195 iwl_set_flags_for_band(priv, priv->band);
1196
1197 priv->staging_rxon.ofdm_basic_rates =
1198 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1199 priv->staging_rxon.cck_basic_rates =
1200 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1201
1202 /* clear both MIX and PURE40 mode flag */
1203 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1204 RXON_FLG_CHANNEL_MODE_PURE_40);
1205 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1206 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1207 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1208 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1209 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1210 }
1211 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1212
1213 static void iwl_set_rate(struct iwl_priv *priv)
1214 {
1215 const struct ieee80211_supported_band *hw = NULL;
1216 struct ieee80211_rate *rate;
1217 int i;
1218
1219 hw = iwl_get_hw_mode(priv, priv->band);
1220 if (!hw) {
1221 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1222 return;
1223 }
1224
1225 priv->active_rate = 0;
1226 priv->active_rate_basic = 0;
1227
1228 for (i = 0; i < hw->n_bitrates; i++) {
1229 rate = &(hw->bitrates[i]);
1230 if (rate->hw_value < IWL_RATE_COUNT)
1231 priv->active_rate |= (1 << rate->hw_value);
1232 }
1233
1234 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1235 priv->active_rate, priv->active_rate_basic);
1236
1237 /*
1238 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1239 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1240 * OFDM
1241 */
1242 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1243 priv->staging_rxon.cck_basic_rates =
1244 ((priv->active_rate_basic &
1245 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1246 else
1247 priv->staging_rxon.cck_basic_rates =
1248 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1249
1250 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1251 priv->staging_rxon.ofdm_basic_rates =
1252 ((priv->active_rate_basic &
1253 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1254 IWL_FIRST_OFDM_RATE) & 0xFF;
1255 else
1256 priv->staging_rxon.ofdm_basic_rates =
1257 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1258 }
1259
1260 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1261 {
1262 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1263 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1264 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1265 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
1266 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1267 rxon->channel = csa->channel;
1268 priv->staging_rxon.channel = csa->channel;
1269 }
1270 EXPORT_SYMBOL(iwl_rx_csa);
1271
1272 #ifdef CONFIG_IWLWIFI_DEBUG
1273 static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1274 {
1275 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1276
1277 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1278 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1279 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1280 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1281 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1282 le32_to_cpu(rxon->filter_flags));
1283 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1284 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1285 rxon->ofdm_basic_rates);
1286 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1287 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1288 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1289 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1290 }
1291 #endif
1292
1293 /**
1294 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1295 */
1296 void iwl_irq_handle_error(struct iwl_priv *priv)
1297 {
1298 /* Set the FW error flag -- cleared on iwl_down */
1299 set_bit(STATUS_FW_ERROR, &priv->status);
1300
1301 /* Cancel currently queued command. */
1302 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1303
1304 #ifdef CONFIG_IWLWIFI_DEBUG
1305 if (priv->debug_level & IWL_DL_FW_ERRORS) {
1306 iwl_dump_nic_error_log(priv);
1307 iwl_dump_nic_event_log(priv);
1308 iwl_print_rx_config_cmd(priv);
1309 }
1310 #endif
1311
1312 wake_up_interruptible(&priv->wait_command_queue);
1313
1314 /* Keep the restart process from trying to send host
1315 * commands by clearing the INIT status bit */
1316 clear_bit(STATUS_READY, &priv->status);
1317
1318 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1319 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1320 "Restarting adapter due to uCode error.\n");
1321
1322 if (priv->cfg->mod_params->restart_fw)
1323 queue_work(priv->workqueue, &priv->restart);
1324 }
1325 }
1326 EXPORT_SYMBOL(iwl_irq_handle_error);
1327
1328 void iwl_configure_filter(struct ieee80211_hw *hw,
1329 unsigned int changed_flags,
1330 unsigned int *total_flags,
1331 int mc_count, struct dev_addr_list *mc_list)
1332 {
1333 struct iwl_priv *priv = hw->priv;
1334 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1335
1336 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1337 changed_flags, *total_flags);
1338
1339 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1340 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1341 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1342 else
1343 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1344 }
1345 if (changed_flags & FIF_ALLMULTI) {
1346 if (*total_flags & FIF_ALLMULTI)
1347 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1348 else
1349 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1350 }
1351 if (changed_flags & FIF_CONTROL) {
1352 if (*total_flags & FIF_CONTROL)
1353 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1354 else
1355 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1356 }
1357 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1358 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1359 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1360 else
1361 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1362 }
1363
1364 /* We avoid iwl_commit_rxon here to commit the new filter flags
1365 * since mac80211 will call ieee80211_hw_config immediately.
1366 * (mc_list is not supported at this time). Otherwise, we need to
1367 * queue a background iwl_commit_rxon work.
1368 */
1369
1370 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1371 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1372 }
1373 EXPORT_SYMBOL(iwl_configure_filter);
1374
1375 int iwl_setup_mac(struct iwl_priv *priv)
1376 {
1377 int ret;
1378 struct ieee80211_hw *hw = priv->hw;
1379 hw->rate_control_algorithm = "iwl-agn-rs";
1380
1381 /* Tell mac80211 our characteristics */
1382 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1383 IEEE80211_HW_NOISE_DBM |
1384 IEEE80211_HW_AMPDU_AGGREGATION |
1385 IEEE80211_HW_SPECTRUM_MGMT |
1386 IEEE80211_HW_SUPPORTS_PS;
1387 hw->wiphy->interface_modes =
1388 BIT(NL80211_IFTYPE_STATION) |
1389 BIT(NL80211_IFTYPE_ADHOC);
1390
1391 hw->wiphy->custom_regulatory = true;
1392
1393 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1394 /* we create the 802.11 header and a zero-length SSID element */
1395 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
1396
1397 /* Default value; 4 EDCA QOS priorities */
1398 hw->queues = 4;
1399
1400 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
1401
1402 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1403 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1404 &priv->bands[IEEE80211_BAND_2GHZ];
1405 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1406 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1407 &priv->bands[IEEE80211_BAND_5GHZ];
1408
1409 ret = ieee80211_register_hw(priv->hw);
1410 if (ret) {
1411 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
1412 return ret;
1413 }
1414 priv->mac80211_registered = 1;
1415
1416 return 0;
1417 }
1418 EXPORT_SYMBOL(iwl_setup_mac);
1419
1420 int iwl_set_hw_params(struct iwl_priv *priv)
1421 {
1422 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1423 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1424 if (priv->cfg->mod_params->amsdu_size_8K)
1425 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1426 else
1427 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1428 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1429
1430 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1431
1432 if (priv->cfg->mod_params->disable_11n)
1433 priv->cfg->sku &= ~IWL_SKU_N;
1434
1435 /* Device-specific setup */
1436 return priv->cfg->ops->lib->set_hw_params(priv);
1437 }
1438 EXPORT_SYMBOL(iwl_set_hw_params);
1439
1440 int iwl_init_drv(struct iwl_priv *priv)
1441 {
1442 int ret;
1443
1444 priv->ibss_beacon = NULL;
1445
1446 spin_lock_init(&priv->lock);
1447 spin_lock_init(&priv->sta_lock);
1448 spin_lock_init(&priv->hcmd_lock);
1449
1450 INIT_LIST_HEAD(&priv->free_frames);
1451
1452 mutex_init(&priv->mutex);
1453
1454 /* Clear the driver's (not device's) station table */
1455 iwl_clear_stations_table(priv);
1456
1457 priv->data_retry_limit = -1;
1458 priv->ieee_channels = NULL;
1459 priv->ieee_rates = NULL;
1460 priv->band = IEEE80211_BAND_2GHZ;
1461
1462 priv->iw_mode = NL80211_IFTYPE_STATION;
1463
1464 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
1465
1466 /* Choose which receivers/antennas to use */
1467 if (priv->cfg->ops->hcmd->set_rxon_chain)
1468 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1469
1470 iwl_init_scan_params(priv);
1471
1472 iwl_reset_qos(priv);
1473
1474 priv->qos_data.qos_active = 0;
1475 priv->qos_data.qos_cap.val = 0;
1476
1477 priv->rates_mask = IWL_RATES_MASK;
1478 /* If power management is turned on, default to CAM mode */
1479 priv->power_mode = IWL_POWER_MODE_CAM;
1480 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
1481
1482 ret = iwl_init_channel_map(priv);
1483 if (ret) {
1484 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
1485 goto err;
1486 }
1487
1488 ret = iwlcore_init_geos(priv);
1489 if (ret) {
1490 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
1491 goto err_free_channel_map;
1492 }
1493 iwlcore_init_hw_rates(priv, priv->ieee_rates);
1494
1495 return 0;
1496
1497 err_free_channel_map:
1498 iwl_free_channel_map(priv);
1499 err:
1500 return ret;
1501 }
1502 EXPORT_SYMBOL(iwl_init_drv);
1503
1504 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1505 {
1506 int ret = 0;
1507 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1508 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1509 tx_power,
1510 IWL_TX_POWER_TARGET_POWER_MIN);
1511 return -EINVAL;
1512 }
1513
1514 if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
1515 IWL_WARN(priv, "Requested user TXPOWER %d above upper limit %d.\n",
1516 tx_power,
1517 IWL_TX_POWER_TARGET_POWER_MAX);
1518 return -EINVAL;
1519 }
1520
1521 if (priv->tx_power_user_lmt != tx_power)
1522 force = true;
1523
1524 priv->tx_power_user_lmt = tx_power;
1525
1526 /* if nic is not up don't send command */
1527 if (!iwl_is_ready_rf(priv))
1528 return ret;
1529
1530 if (force && priv->cfg->ops->lib->send_tx_power)
1531 ret = priv->cfg->ops->lib->send_tx_power(priv);
1532
1533 return ret;
1534 }
1535 EXPORT_SYMBOL(iwl_set_tx_power);
1536
1537 void iwl_uninit_drv(struct iwl_priv *priv)
1538 {
1539 iwl_calib_free_results(priv);
1540 iwlcore_free_geos(priv);
1541 iwl_free_channel_map(priv);
1542 kfree(priv->scan);
1543 }
1544 EXPORT_SYMBOL(iwl_uninit_drv);
1545
1546
1547 void iwl_disable_interrupts(struct iwl_priv *priv)
1548 {
1549 clear_bit(STATUS_INT_ENABLED, &priv->status);
1550
1551 /* disable interrupts from uCode/NIC to host */
1552 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1553
1554 /* acknowledge/clear/reset any interrupts still pending
1555 * from uCode or flow handler (Rx/Tx DMA) */
1556 iwl_write32(priv, CSR_INT, 0xffffffff);
1557 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
1558 IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
1559 }
1560 EXPORT_SYMBOL(iwl_disable_interrupts);
1561
1562 void iwl_enable_interrupts(struct iwl_priv *priv)
1563 {
1564 IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
1565 set_bit(STATUS_INT_ENABLED, &priv->status);
1566 iwl_write32(priv, CSR_INT_MASK, priv->inta_mask);
1567 }
1568 EXPORT_SYMBOL(iwl_enable_interrupts);
1569
1570
1571 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1572
1573 /* Free dram table */
1574 void iwl_free_isr_ict(struct iwl_priv *priv)
1575 {
1576 if (priv->ict_tbl_vir) {
1577 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1578 PAGE_SIZE, priv->ict_tbl_vir,
1579 priv->ict_tbl_dma);
1580 priv->ict_tbl_vir = NULL;
1581 }
1582 }
1583 EXPORT_SYMBOL(iwl_free_isr_ict);
1584
1585
1586 /* allocate dram shared table it is a PAGE_SIZE aligned
1587 * also reset all data related to ICT table interrupt.
1588 */
1589 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1590 {
1591
1592 if (priv->cfg->use_isr_legacy)
1593 return 0;
1594 /* allocate shrared data table */
1595 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1596 ICT_COUNT) + PAGE_SIZE,
1597 &priv->ict_tbl_dma);
1598 if (!priv->ict_tbl_vir)
1599 return -ENOMEM;
1600
1601 /* align table to PAGE_SIZE boundry */
1602 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1603
1604 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1605 (unsigned long long)priv->ict_tbl_dma,
1606 (unsigned long long)priv->aligned_ict_tbl_dma,
1607 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1608
1609 priv->ict_tbl = priv->ict_tbl_vir +
1610 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1611
1612 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1613 priv->ict_tbl, priv->ict_tbl_vir,
1614 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1615
1616 /* reset table and index to all 0 */
1617 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1618 priv->ict_index = 0;
1619
1620 /* add periodic RX interrupt */
1621 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1622 return 0;
1623 }
1624 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1625
1626 /* Device is going up inform it about using ICT interrupt table,
1627 * also we need to tell the driver to start using ICT interrupt.
1628 */
1629 int iwl_reset_ict(struct iwl_priv *priv)
1630 {
1631 u32 val;
1632 unsigned long flags;
1633
1634 if (!priv->ict_tbl_vir)
1635 return 0;
1636
1637 spin_lock_irqsave(&priv->lock, flags);
1638 iwl_disable_interrupts(priv);
1639
1640 memset(&priv->ict_tbl[0],0, sizeof(u32) * ICT_COUNT);
1641
1642 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1643
1644 val |= CSR_DRAM_INT_TBL_ENABLE;
1645 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1646
1647 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1648 "aligned dma address %Lx\n",
1649 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1650
1651 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1652 priv->use_ict = true;
1653 priv->ict_index = 0;
1654 iwl_write32(priv, CSR_INT, priv->inta_mask);
1655 iwl_enable_interrupts(priv);
1656 spin_unlock_irqrestore(&priv->lock, flags);
1657
1658 return 0;
1659 }
1660 EXPORT_SYMBOL(iwl_reset_ict);
1661
1662 /* Device is going down disable ict interrupt usage */
1663 void iwl_disable_ict(struct iwl_priv *priv)
1664 {
1665 unsigned long flags;
1666
1667 spin_lock_irqsave(&priv->lock, flags);
1668 priv->use_ict = false;
1669 spin_unlock_irqrestore(&priv->lock, flags);
1670 }
1671 EXPORT_SYMBOL(iwl_disable_ict);
1672
1673 /* interrupt handler using ict table, with this interrupt driver will
1674 * stop using INTA register to get device's interrupt, reading this register
1675 * is expensive, device will write interrupts in ICT dram table, increment
1676 * index then will fire interrupt to driver, driver will OR all ICT table
1677 * entries from current index up to table entry with 0 value. the result is
1678 * the interrupt we need to service, driver will set the entries back to 0 and
1679 * set index.
1680 */
1681 irqreturn_t iwl_isr_ict(int irq, void *data)
1682 {
1683 struct iwl_priv *priv = data;
1684 u32 inta, inta_mask;
1685 u32 val = 0;
1686
1687 if (!priv)
1688 return IRQ_NONE;
1689
1690 /* dram interrupt table not set yet,
1691 * use legacy interrupt.
1692 */
1693 if (!priv->use_ict)
1694 return iwl_isr(irq, data);
1695
1696 spin_lock(&priv->lock);
1697
1698 /* Disable (but don't clear!) interrupts here to avoid
1699 * back-to-back ISRs and sporadic interrupts from our NIC.
1700 * If we have something to service, the tasklet will re-enable ints.
1701 * If we *don't* have something, we'll re-enable before leaving here.
1702 */
1703 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1704 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1705
1706
1707 /* Ignore interrupt if there's nothing in NIC to service.
1708 * This may be due to IRQ shared with another device,
1709 * or due to sporadic interrupts thrown from our NIC. */
1710 if (!priv->ict_tbl[priv->ict_index]) {
1711 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1712 goto none;
1713 }
1714
1715 /* read all entries that not 0 start with ict_index */
1716 while (priv->ict_tbl[priv->ict_index]) {
1717
1718 val |= priv->ict_tbl[priv->ict_index];
1719 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1720 priv->ict_index,
1721 priv->ict_tbl[priv->ict_index]);
1722 priv->ict_tbl[priv->ict_index] = 0;
1723 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1724 ICT_COUNT);
1725
1726 }
1727
1728 /* We should not get this value, just ignore it. */
1729 if (val == 0xffffffff)
1730 val = 0;
1731
1732 inta = (0xff & val) | ((0xff00 & val) << 16);
1733 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1734 inta, inta_mask, val);
1735
1736 inta &= priv->inta_mask;
1737 priv->inta |= inta;
1738
1739 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1740 if (likely(inta))
1741 tasklet_schedule(&priv->irq_tasklet);
1742 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1743 /* Allow interrupt if was disabled by this handler and
1744 * no tasklet was schedules, We should not enable interrupt,
1745 * tasklet will enable it.
1746 */
1747 iwl_enable_interrupts(priv);
1748 }
1749
1750 spin_unlock(&priv->lock);
1751 return IRQ_HANDLED;
1752
1753 none:
1754 /* re-enable interrupts here since we don't have anything to service.
1755 * only Re-enable if disabled by irq.
1756 */
1757 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1758 iwl_enable_interrupts(priv);
1759
1760 spin_unlock(&priv->lock);
1761 return IRQ_NONE;
1762 }
1763 EXPORT_SYMBOL(iwl_isr_ict);
1764
1765
1766 static irqreturn_t iwl_isr(int irq, void *data)
1767 {
1768 struct iwl_priv *priv = data;
1769 u32 inta, inta_mask;
1770 #ifdef CONFIG_IWLWIFI_DEBUG
1771 u32 inta_fh;
1772 #endif
1773 if (!priv)
1774 return IRQ_NONE;
1775
1776 spin_lock(&priv->lock);
1777
1778 /* Disable (but don't clear!) interrupts here to avoid
1779 * back-to-back ISRs and sporadic interrupts from our NIC.
1780 * If we have something to service, the tasklet will re-enable ints.
1781 * If we *don't* have something, we'll re-enable before leaving here. */
1782 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1783 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1784
1785 /* Discover which interrupts are active/pending */
1786 inta = iwl_read32(priv, CSR_INT);
1787
1788 /* Ignore interrupt if there's nothing in NIC to service.
1789 * This may be due to IRQ shared with another device,
1790 * or due to sporadic interrupts thrown from our NIC. */
1791 if (!inta) {
1792 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1793 goto none;
1794 }
1795
1796 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1797 /* Hardware disappeared. It might have already raised
1798 * an interrupt */
1799 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1800 goto unplugged;
1801 }
1802
1803 #ifdef CONFIG_IWLWIFI_DEBUG
1804 if (priv->debug_level & (IWL_DL_ISR)) {
1805 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1806 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1807 "fh 0x%08x\n", inta, inta_mask, inta_fh);
1808 }
1809 #endif
1810
1811 priv->inta |= inta;
1812 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1813 if (likely(inta))
1814 tasklet_schedule(&priv->irq_tasklet);
1815 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1816 iwl_enable_interrupts(priv);
1817
1818 unplugged:
1819 spin_unlock(&priv->lock);
1820 return IRQ_HANDLED;
1821
1822 none:
1823 /* re-enable interrupts here since we don't have anything to service. */
1824 /* only Re-enable if diabled by irq and no schedules tasklet. */
1825 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1826 iwl_enable_interrupts(priv);
1827
1828 spin_unlock(&priv->lock);
1829 return IRQ_NONE;
1830 }
1831
1832 irqreturn_t iwl_isr_legacy(int irq, void *data)
1833 {
1834 struct iwl_priv *priv = data;
1835 u32 inta, inta_mask;
1836 u32 inta_fh;
1837 if (!priv)
1838 return IRQ_NONE;
1839
1840 spin_lock(&priv->lock);
1841
1842 /* Disable (but don't clear!) interrupts here to avoid
1843 * back-to-back ISRs and sporadic interrupts from our NIC.
1844 * If we have something to service, the tasklet will re-enable ints.
1845 * If we *don't* have something, we'll re-enable before leaving here. */
1846 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1847 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1848
1849 /* Discover which interrupts are active/pending */
1850 inta = iwl_read32(priv, CSR_INT);
1851 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1852
1853 /* Ignore interrupt if there's nothing in NIC to service.
1854 * This may be due to IRQ shared with another device,
1855 * or due to sporadic interrupts thrown from our NIC. */
1856 if (!inta && !inta_fh) {
1857 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1858 goto none;
1859 }
1860
1861 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1862 /* Hardware disappeared. It might have already raised
1863 * an interrupt */
1864 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1865 goto unplugged;
1866 }
1867
1868 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1869 inta, inta_mask, inta_fh);
1870
1871 inta &= ~CSR_INT_BIT_SCD;
1872
1873 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1874 if (likely(inta || inta_fh))
1875 tasklet_schedule(&priv->irq_tasklet);
1876
1877 unplugged:
1878 spin_unlock(&priv->lock);
1879 return IRQ_HANDLED;
1880
1881 none:
1882 /* re-enable interrupts here since we don't have anything to service. */
1883 /* only Re-enable if diabled by irq */
1884 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1885 iwl_enable_interrupts(priv);
1886 spin_unlock(&priv->lock);
1887 return IRQ_NONE;
1888 }
1889 EXPORT_SYMBOL(iwl_isr_legacy);
1890
1891 int iwl_send_bt_config(struct iwl_priv *priv)
1892 {
1893 struct iwl_bt_cmd bt_cmd = {
1894 .flags = 3,
1895 .lead_time = 0xAA,
1896 .max_kill = 1,
1897 .kill_ack_mask = 0,
1898 .kill_cts_mask = 0,
1899 };
1900
1901 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1902 sizeof(struct iwl_bt_cmd), &bt_cmd);
1903 }
1904 EXPORT_SYMBOL(iwl_send_bt_config);
1905
1906 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
1907 {
1908 u32 stat_flags = 0;
1909 struct iwl_host_cmd cmd = {
1910 .id = REPLY_STATISTICS_CMD,
1911 .meta.flags = flags,
1912 .len = sizeof(stat_flags),
1913 .data = (u8 *) &stat_flags,
1914 };
1915 return iwl_send_cmd(priv, &cmd);
1916 }
1917 EXPORT_SYMBOL(iwl_send_statistics_request);
1918
1919 /**
1920 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1921 * using sample data 100 bytes apart. If these sample points are good,
1922 * it's a pretty good bet that everything between them is good, too.
1923 */
1924 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1925 {
1926 u32 val;
1927 int ret = 0;
1928 u32 errcnt = 0;
1929 u32 i;
1930
1931 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1932
1933 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1934 /* read data comes through single port, auto-incr addr */
1935 /* NOTE: Use the debugless read so we don't flood kernel log
1936 * if IWL_DL_IO is set */
1937 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1938 i + IWL49_RTC_INST_LOWER_BOUND);
1939 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1940 if (val != le32_to_cpu(*image)) {
1941 ret = -EIO;
1942 errcnt++;
1943 if (errcnt >= 3)
1944 break;
1945 }
1946 }
1947
1948 return ret;
1949 }
1950
1951 /**
1952 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1953 * looking at all data.
1954 */
1955 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1956 u32 len)
1957 {
1958 u32 val;
1959 u32 save_len = len;
1960 int ret = 0;
1961 u32 errcnt;
1962
1963 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1964
1965 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1966 IWL49_RTC_INST_LOWER_BOUND);
1967
1968 errcnt = 0;
1969 for (; len > 0; len -= sizeof(u32), image++) {
1970 /* read data comes through single port, auto-incr addr */
1971 /* NOTE: Use the debugless read so we don't flood kernel log
1972 * if IWL_DL_IO is set */
1973 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1974 if (val != le32_to_cpu(*image)) {
1975 IWL_ERR(priv, "uCode INST section is invalid at "
1976 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1977 save_len - len, val, le32_to_cpu(*image));
1978 ret = -EIO;
1979 errcnt++;
1980 if (errcnt >= 20)
1981 break;
1982 }
1983 }
1984
1985 if (!errcnt)
1986 IWL_DEBUG_INFO(priv,
1987 "ucode image in INSTRUCTION memory is good\n");
1988
1989 return ret;
1990 }
1991
1992 /**
1993 * iwl_verify_ucode - determine which instruction image is in SRAM,
1994 * and verify its contents
1995 */
1996 int iwl_verify_ucode(struct iwl_priv *priv)
1997 {
1998 __le32 *image;
1999 u32 len;
2000 int ret;
2001
2002 /* Try bootstrap */
2003 image = (__le32 *)priv->ucode_boot.v_addr;
2004 len = priv->ucode_boot.len;
2005 ret = iwlcore_verify_inst_sparse(priv, image, len);
2006 if (!ret) {
2007 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2008 return 0;
2009 }
2010
2011 /* Try initialize */
2012 image = (__le32 *)priv->ucode_init.v_addr;
2013 len = priv->ucode_init.len;
2014 ret = iwlcore_verify_inst_sparse(priv, image, len);
2015 if (!ret) {
2016 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2017 return 0;
2018 }
2019
2020 /* Try runtime/protocol */
2021 image = (__le32 *)priv->ucode_code.v_addr;
2022 len = priv->ucode_code.len;
2023 ret = iwlcore_verify_inst_sparse(priv, image, len);
2024 if (!ret) {
2025 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2026 return 0;
2027 }
2028
2029 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2030
2031 /* Since nothing seems to match, show first several data entries in
2032 * instruction SRAM, so maybe visual inspection will give a clue.
2033 * Selection of bootstrap image (vs. other images) is arbitrary. */
2034 image = (__le32 *)priv->ucode_boot.v_addr;
2035 len = priv->ucode_boot.len;
2036 ret = iwl_verify_inst_full(priv, image, len);
2037
2038 return ret;
2039 }
2040 EXPORT_SYMBOL(iwl_verify_ucode);
2041
2042
2043 static const char *desc_lookup_text[] = {
2044 "OK",
2045 "FAIL",
2046 "BAD_PARAM",
2047 "BAD_CHECKSUM",
2048 "NMI_INTERRUPT_WDG",
2049 "SYSASSERT",
2050 "FATAL_ERROR",
2051 "BAD_COMMAND",
2052 "HW_ERROR_TUNE_LOCK",
2053 "HW_ERROR_TEMPERATURE",
2054 "ILLEGAL_CHAN_FREQ",
2055 "VCC_NOT_STABLE",
2056 "FH_ERROR",
2057 "NMI_INTERRUPT_HOST",
2058 "NMI_INTERRUPT_ACTION_PT",
2059 "NMI_INTERRUPT_UNKNOWN",
2060 "UCODE_VERSION_MISMATCH",
2061 "HW_ERROR_ABS_LOCK",
2062 "HW_ERROR_CAL_LOCK_FAIL",
2063 "NMI_INTERRUPT_INST_ACTION_PT",
2064 "NMI_INTERRUPT_DATA_ACTION_PT",
2065 "NMI_TRM_HW_ER",
2066 "NMI_INTERRUPT_TRM",
2067 "NMI_INTERRUPT_BREAK_POINT"
2068 "DEBUG_0",
2069 "DEBUG_1",
2070 "DEBUG_2",
2071 "DEBUG_3",
2072 "UNKNOWN"
2073 };
2074
2075 static const char *desc_lookup(int i)
2076 {
2077 int max = ARRAY_SIZE(desc_lookup_text) - 1;
2078
2079 if (i < 0 || i > max)
2080 i = max;
2081
2082 return desc_lookup_text[i];
2083 }
2084
2085 #define ERROR_START_OFFSET (1 * sizeof(u32))
2086 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
2087
2088 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2089 {
2090 u32 data2, line;
2091 u32 desc, time, count, base, data1;
2092 u32 blink1, blink2, ilink1, ilink2;
2093
2094 if (priv->ucode_type == UCODE_INIT)
2095 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2096 else
2097 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2098
2099 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2100 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
2101 return;
2102 }
2103
2104 count = iwl_read_targ_mem(priv, base);
2105
2106 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2107 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2108 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2109 priv->status, count);
2110 }
2111
2112 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2113 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2114 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2115 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2116 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2117 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2118 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2119 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2120 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2121
2122 IWL_ERR(priv, "Desc Time "
2123 "data1 data2 line\n");
2124 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
2125 desc_lookup(desc), desc, time, data1, data2, line);
2126 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
2127 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
2128 ilink1, ilink2);
2129
2130 }
2131 EXPORT_SYMBOL(iwl_dump_nic_error_log);
2132
2133 #define EVENT_START_OFFSET (4 * sizeof(u32))
2134
2135 /**
2136 * iwl_print_event_log - Dump error event log to syslog
2137 *
2138 */
2139 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2140 u32 num_events, u32 mode)
2141 {
2142 u32 i;
2143 u32 base; /* SRAM byte address of event log header */
2144 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2145 u32 ptr; /* SRAM byte address of log data */
2146 u32 ev, time, data; /* event log data */
2147
2148 if (num_events == 0)
2149 return;
2150 if (priv->ucode_type == UCODE_INIT)
2151 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2152 else
2153 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2154
2155 if (mode == 0)
2156 event_size = 2 * sizeof(u32);
2157 else
2158 event_size = 3 * sizeof(u32);
2159
2160 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2161
2162 /* "time" is actually "data" for mode 0 (no timestamp).
2163 * place event id # at far right for easier visual parsing. */
2164 for (i = 0; i < num_events; i++) {
2165 ev = iwl_read_targ_mem(priv, ptr);
2166 ptr += sizeof(u32);
2167 time = iwl_read_targ_mem(priv, ptr);
2168 ptr += sizeof(u32);
2169 if (mode == 0) {
2170 /* data, ev */
2171 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
2172 } else {
2173 data = iwl_read_targ_mem(priv, ptr);
2174 ptr += sizeof(u32);
2175 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2176 time, data, ev);
2177 }
2178 }
2179 }
2180
2181 void iwl_dump_nic_event_log(struct iwl_priv *priv)
2182 {
2183 u32 base; /* SRAM byte address of event log header */
2184 u32 capacity; /* event log capacity in # entries */
2185 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
2186 u32 num_wraps; /* # times uCode wrapped to top of log */
2187 u32 next_entry; /* index of next entry to be written by uCode */
2188 u32 size; /* # entries that we'll print */
2189
2190 if (priv->ucode_type == UCODE_INIT)
2191 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2192 else
2193 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2194
2195 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2196 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
2197 return;
2198 }
2199
2200 /* event log header */
2201 capacity = iwl_read_targ_mem(priv, base);
2202 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2203 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2204 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2205
2206 size = num_wraps ? capacity : next_entry;
2207
2208 /* bail out if nothing in log */
2209 if (size == 0) {
2210 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2211 return;
2212 }
2213
2214 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
2215 size, num_wraps);
2216
2217 /* if uCode has wrapped back to top of log, start at the oldest entry,
2218 * i.e the next one that uCode would fill. */
2219 if (num_wraps)
2220 iwl_print_event_log(priv, next_entry,
2221 capacity - next_entry, mode);
2222 /* (then/else) start at top of log */
2223 iwl_print_event_log(priv, 0, next_entry, mode);
2224
2225 }
2226 EXPORT_SYMBOL(iwl_dump_nic_event_log);
2227
2228 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2229 {
2230 struct iwl_ct_kill_config cmd;
2231 unsigned long flags;
2232 int ret = 0;
2233
2234 spin_lock_irqsave(&priv->lock, flags);
2235 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2236 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2237 spin_unlock_irqrestore(&priv->lock, flags);
2238
2239 cmd.critical_temperature_R =
2240 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2241
2242 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2243 sizeof(cmd), &cmd);
2244 if (ret)
2245 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2246 else
2247 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
2248 "critical temperature is %d\n",
2249 cmd.critical_temperature_R);
2250 }
2251 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2252
2253
2254 /*
2255 * CARD_STATE_CMD
2256 *
2257 * Use: Sets the device's internal card state to enable, disable, or halt
2258 *
2259 * When in the 'enable' state the card operates as normal.
2260 * When in the 'disable' state, the card enters into a low power mode.
2261 * When in the 'halt' state, the card is shut down and must be fully
2262 * restarted to come back on.
2263 */
2264 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2265 {
2266 struct iwl_host_cmd cmd = {
2267 .id = REPLY_CARD_STATE_CMD,
2268 .len = sizeof(u32),
2269 .data = &flags,
2270 .meta.flags = meta_flag,
2271 };
2272
2273 return iwl_send_cmd(priv, &cmd);
2274 }
2275 EXPORT_SYMBOL(iwl_send_card_state);
2276
2277 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2278 struct iwl_rx_mem_buffer *rxb)
2279 {
2280 #ifdef CONFIG_IWLWIFI_DEBUG
2281 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2282 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2283 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2284 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2285 #endif
2286 }
2287 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2288
2289 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2290 struct iwl_rx_mem_buffer *rxb)
2291 {
2292 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2293 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2294 "notification for %s:\n",
2295 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2296 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
2297 }
2298 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2299
2300 void iwl_rx_reply_error(struct iwl_priv *priv,
2301 struct iwl_rx_mem_buffer *rxb)
2302 {
2303 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2304
2305 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2306 "seq 0x%04X ser 0x%08X\n",
2307 le32_to_cpu(pkt->u.err_resp.error_type),
2308 get_cmd_string(pkt->u.err_resp.cmd_id),
2309 pkt->u.err_resp.cmd_id,
2310 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2311 le32_to_cpu(pkt->u.err_resp.error_info));
2312 }
2313 EXPORT_SYMBOL(iwl_rx_reply_error);
2314
2315 void iwl_clear_isr_stats(struct iwl_priv *priv)
2316 {
2317 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2318 }
2319 EXPORT_SYMBOL(iwl_clear_isr_stats);
2320
2321 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2322 const struct ieee80211_tx_queue_params *params)
2323 {
2324 struct iwl_priv *priv = hw->priv;
2325 unsigned long flags;
2326 int q;
2327
2328 IWL_DEBUG_MAC80211(priv, "enter\n");
2329
2330 if (!iwl_is_ready_rf(priv)) {
2331 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2332 return -EIO;
2333 }
2334
2335 if (queue >= AC_NUM) {
2336 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2337 return 0;
2338 }
2339
2340 q = AC_NUM - 1 - queue;
2341
2342 spin_lock_irqsave(&priv->lock, flags);
2343
2344 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2345 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2346 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2347 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2348 cpu_to_le16((params->txop * 32));
2349
2350 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2351 priv->qos_data.qos_active = 1;
2352
2353 if (priv->iw_mode == NL80211_IFTYPE_AP)
2354 iwl_activate_qos(priv, 1);
2355 else if (priv->assoc_id && iwl_is_associated(priv))
2356 iwl_activate_qos(priv, 0);
2357
2358 spin_unlock_irqrestore(&priv->lock, flags);
2359
2360 IWL_DEBUG_MAC80211(priv, "leave\n");
2361 return 0;
2362 }
2363 EXPORT_SYMBOL(iwl_mac_conf_tx);
2364
2365 static void iwl_ht_conf(struct iwl_priv *priv,
2366 struct ieee80211_bss_conf *bss_conf)
2367 {
2368 struct ieee80211_sta_ht_cap *ht_conf;
2369 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2370 struct ieee80211_sta *sta;
2371
2372 IWL_DEBUG_MAC80211(priv, "enter: \n");
2373
2374 if (!iwl_conf->is_ht)
2375 return;
2376
2377
2378 /*
2379 * It is totally wrong to base global information on something
2380 * that is valid only when associated, alas, this driver works
2381 * that way and I don't know how to fix it.
2382 */
2383
2384 rcu_read_lock();
2385 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2386 if (!sta) {
2387 rcu_read_unlock();
2388 return;
2389 }
2390 ht_conf = &sta->ht_cap;
2391
2392 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
2393 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
2394 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
2395 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
2396
2397 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
2398 iwl_conf->max_amsdu_size =
2399 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
2400
2401 iwl_conf->supported_chan_width =
2402 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
2403
2404 /*
2405 * XXX: The HT configuration needs to be moved into iwl_mac_config()
2406 * to be done there correctly.
2407 */
2408
2409 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
2410 if (conf_is_ht40_minus(&priv->hw->conf))
2411 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2412 else if (conf_is_ht40_plus(&priv->hw->conf))
2413 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2414
2415 /* If no above or below channel supplied disable FAT channel */
2416 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
2417 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
2418 iwl_conf->supported_chan_width = 0;
2419
2420 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2421
2422 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2423
2424 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
2425 iwl_conf->ht_protection =
2426 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2427 iwl_conf->non_GF_STA_present =
2428 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2429
2430 rcu_read_unlock();
2431
2432 IWL_DEBUG_MAC80211(priv, "leave\n");
2433 }
2434
2435 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2436 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2437 struct ieee80211_vif *vif,
2438 struct ieee80211_bss_conf *bss_conf,
2439 u32 changes)
2440 {
2441 struct iwl_priv *priv = hw->priv;
2442 int ret;
2443
2444 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2445
2446 if (!iwl_is_alive(priv))
2447 return;
2448
2449 mutex_lock(&priv->mutex);
2450
2451 if (changes & BSS_CHANGED_BEACON &&
2452 priv->iw_mode == NL80211_IFTYPE_AP) {
2453 dev_kfree_skb(priv->ibss_beacon);
2454 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2455 }
2456
2457 if (changes & BSS_CHANGED_BEACON_INT) {
2458 priv->beacon_int = bss_conf->beacon_int;
2459 /* TODO: in AP mode, do something to make this take effect */
2460 }
2461
2462 if (changes & BSS_CHANGED_BSSID) {
2463 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2464
2465 /*
2466 * If there is currently a HW scan going on in the
2467 * background then we need to cancel it else the RXON
2468 * below/in post_associate will fail.
2469 */
2470 if (iwl_scan_cancel_timeout(priv, 100)) {
2471 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2472 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2473 mutex_unlock(&priv->mutex);
2474 return;
2475 }
2476
2477 /* mac80211 only sets assoc when in STATION mode */
2478 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2479 bss_conf->assoc) {
2480 memcpy(priv->staging_rxon.bssid_addr,
2481 bss_conf->bssid, ETH_ALEN);
2482
2483 /* currently needed in a few places */
2484 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2485 } else {
2486 priv->staging_rxon.filter_flags &=
2487 ~RXON_FILTER_ASSOC_MSK;
2488 }
2489
2490 }
2491
2492 /*
2493 * This needs to be after setting the BSSID in case
2494 * mac80211 decides to do both changes at once because
2495 * it will invoke post_associate.
2496 */
2497 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2498 changes & BSS_CHANGED_BEACON) {
2499 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2500
2501 if (beacon)
2502 iwl_mac_beacon_update(hw, beacon);
2503 }
2504
2505 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2506 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2507 bss_conf->use_short_preamble);
2508 if (bss_conf->use_short_preamble)
2509 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2510 else
2511 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2512 }
2513
2514 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2515 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2516 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2517 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2518 else
2519 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2520 }
2521
2522 if (changes & BSS_CHANGED_BASIC_RATES) {
2523 /* XXX use this information
2524 *
2525 * To do that, remove code from iwl_set_rate() and put something
2526 * like this here:
2527 *
2528 if (A-band)
2529 priv->staging_rxon.ofdm_basic_rates =
2530 bss_conf->basic_rates;
2531 else
2532 priv->staging_rxon.ofdm_basic_rates =
2533 bss_conf->basic_rates >> 4;
2534 priv->staging_rxon.cck_basic_rates =
2535 bss_conf->basic_rates & 0xF;
2536 */
2537 }
2538
2539 if (changes & BSS_CHANGED_HT) {
2540 iwl_ht_conf(priv, bss_conf);
2541
2542 if (priv->cfg->ops->hcmd->set_rxon_chain)
2543 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2544 }
2545
2546 if (changes & BSS_CHANGED_ASSOC) {
2547 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2548 if (bss_conf->assoc) {
2549 priv->assoc_id = bss_conf->aid;
2550 priv->beacon_int = bss_conf->beacon_int;
2551 priv->power_data.dtim_period = bss_conf->dtim_period;
2552 priv->timestamp = bss_conf->timestamp;
2553 priv->assoc_capability = bss_conf->assoc_capability;
2554
2555 /*
2556 * We have just associated, don't start scan too early
2557 * leave time for EAPOL exchange to complete.
2558 *
2559 * XXX: do this in mac80211
2560 */
2561 priv->next_scan_jiffies = jiffies +
2562 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2563 if (!iwl_is_rfkill(priv))
2564 priv->cfg->ops->lib->post_associate(priv);
2565 } else
2566 priv->assoc_id = 0;
2567
2568 }
2569
2570 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2571 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2572 changes);
2573 ret = iwl_send_rxon_assoc(priv);
2574 if (!ret) {
2575 /* Sync active_rxon with latest change. */
2576 memcpy((void *)&priv->active_rxon,
2577 &priv->staging_rxon,
2578 sizeof(struct iwl_rxon_cmd));
2579 }
2580 }
2581
2582 mutex_unlock(&priv->mutex);
2583
2584 IWL_DEBUG_MAC80211(priv, "leave\n");
2585 }
2586 EXPORT_SYMBOL(iwl_bss_info_changed);
2587
2588 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2589 {
2590 struct iwl_priv *priv = hw->priv;
2591 unsigned long flags;
2592 __le64 timestamp;
2593
2594 IWL_DEBUG_MAC80211(priv, "enter\n");
2595
2596 if (!iwl_is_ready_rf(priv)) {
2597 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2598 return -EIO;
2599 }
2600
2601 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2602 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2603 return -EIO;
2604 }
2605
2606 spin_lock_irqsave(&priv->lock, flags);
2607
2608 if (priv->ibss_beacon)
2609 dev_kfree_skb(priv->ibss_beacon);
2610
2611 priv->ibss_beacon = skb;
2612
2613 priv->assoc_id = 0;
2614 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2615 priv->timestamp = le64_to_cpu(timestamp);
2616
2617 IWL_DEBUG_MAC80211(priv, "leave\n");
2618 spin_unlock_irqrestore(&priv->lock, flags);
2619
2620 iwl_reset_qos(priv);
2621
2622 priv->cfg->ops->lib->post_associate(priv);
2623
2624
2625 return 0;
2626 }
2627 EXPORT_SYMBOL(iwl_mac_beacon_update);
2628
2629 int iwl_set_mode(struct iwl_priv *priv, int mode)
2630 {
2631 if (mode == NL80211_IFTYPE_ADHOC) {
2632 const struct iwl_channel_info *ch_info;
2633
2634 ch_info = iwl_get_channel_info(priv,
2635 priv->band,
2636 le16_to_cpu(priv->staging_rxon.channel));
2637
2638 if (!ch_info || !is_channel_ibss(ch_info)) {
2639 IWL_ERR(priv, "channel %d not IBSS channel\n",
2640 le16_to_cpu(priv->staging_rxon.channel));
2641 return -EINVAL;
2642 }
2643 }
2644
2645 iwl_connection_init_rx_config(priv, mode);
2646
2647 if (priv->cfg->ops->hcmd->set_rxon_chain)
2648 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2649
2650 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2651
2652 iwl_clear_stations_table(priv);
2653
2654 /* dont commit rxon if rf-kill is on*/
2655 if (!iwl_is_ready_rf(priv))
2656 return -EAGAIN;
2657
2658 iwlcore_commit_rxon(priv);
2659
2660 return 0;
2661 }
2662 EXPORT_SYMBOL(iwl_set_mode);
2663
2664 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2665 struct ieee80211_if_init_conf *conf)
2666 {
2667 struct iwl_priv *priv = hw->priv;
2668 unsigned long flags;
2669
2670 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2671
2672 if (priv->vif) {
2673 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2674 return -EOPNOTSUPP;
2675 }
2676
2677 spin_lock_irqsave(&priv->lock, flags);
2678 priv->vif = conf->vif;
2679 priv->iw_mode = conf->type;
2680
2681 spin_unlock_irqrestore(&priv->lock, flags);
2682
2683 mutex_lock(&priv->mutex);
2684
2685 if (conf->mac_addr) {
2686 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2687 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2688 }
2689
2690 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2691 /* we are not ready, will run again when ready */
2692 set_bit(STATUS_MODE_PENDING, &priv->status);
2693
2694 mutex_unlock(&priv->mutex);
2695
2696 IWL_DEBUG_MAC80211(priv, "leave\n");
2697 return 0;
2698 }
2699 EXPORT_SYMBOL(iwl_mac_add_interface);
2700
2701 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2702 struct ieee80211_if_init_conf *conf)
2703 {
2704 struct iwl_priv *priv = hw->priv;
2705
2706 IWL_DEBUG_MAC80211(priv, "enter\n");
2707
2708 mutex_lock(&priv->mutex);
2709
2710 if (iwl_is_ready_rf(priv)) {
2711 iwl_scan_cancel_timeout(priv, 100);
2712 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2713 iwlcore_commit_rxon(priv);
2714 }
2715 if (priv->vif == conf->vif) {
2716 priv->vif = NULL;
2717 memset(priv->bssid, 0, ETH_ALEN);
2718 }
2719 mutex_unlock(&priv->mutex);
2720
2721 IWL_DEBUG_MAC80211(priv, "leave\n");
2722
2723 }
2724 EXPORT_SYMBOL(iwl_mac_remove_interface);
2725
2726 /**
2727 * iwl_mac_config - mac80211 config callback
2728 *
2729 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2730 * be set inappropriately and the driver currently sets the hardware up to
2731 * use it whenever needed.
2732 */
2733 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2734 {
2735 struct iwl_priv *priv = hw->priv;
2736 const struct iwl_channel_info *ch_info;
2737 struct ieee80211_conf *conf = &hw->conf;
2738 unsigned long flags = 0;
2739 int ret = 0;
2740 u16 ch;
2741 int scan_active = 0;
2742
2743 mutex_lock(&priv->mutex);
2744
2745 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2746 conf->channel->hw_value, changed);
2747
2748 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2749 test_bit(STATUS_SCANNING, &priv->status))) {
2750 scan_active = 1;
2751 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2752 }
2753
2754
2755 /* during scanning mac80211 will delay channel setting until
2756 * scan finish with changed = 0
2757 */
2758 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2759 if (scan_active)
2760 goto set_ch_out;
2761
2762 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2763 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2764 if (!is_channel_valid(ch_info)) {
2765 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2766 ret = -EINVAL;
2767 goto set_ch_out;
2768 }
2769
2770 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2771 !is_channel_ibss(ch_info)) {
2772 IWL_ERR(priv, "channel %d in band %d not "
2773 "IBSS channel\n",
2774 conf->channel->hw_value, conf->channel->band);
2775 ret = -EINVAL;
2776 goto set_ch_out;
2777 }
2778
2779 priv->current_ht_config.is_ht = conf_is_ht(conf);
2780
2781 spin_lock_irqsave(&priv->lock, flags);
2782
2783
2784 /* if we are switching from ht to 2.4 clear flags
2785 * from any ht related info since 2.4 does not
2786 * support ht */
2787 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2788 priv->staging_rxon.flags = 0;
2789
2790 iwl_set_rxon_channel(priv, conf->channel);
2791
2792 iwl_set_flags_for_band(priv, conf->channel->band);
2793 spin_unlock_irqrestore(&priv->lock, flags);
2794 set_ch_out:
2795 /* The list of supported rates and rate mask can be different
2796 * for each band; since the band may have changed, reset
2797 * the rate mask to what mac80211 lists */
2798 iwl_set_rate(priv);
2799 }
2800
2801 if (changed & IEEE80211_CONF_CHANGE_PS &&
2802 priv->iw_mode == NL80211_IFTYPE_STATION) {
2803 priv->power_data.power_disabled =
2804 !(conf->flags & IEEE80211_CONF_PS);
2805 ret = iwl_power_update_mode(priv, 0);
2806 if (ret)
2807 IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
2808 }
2809
2810 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2811 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2812 priv->tx_power_user_lmt, conf->power_level);
2813
2814 iwl_set_tx_power(priv, conf->power_level, false);
2815 }
2816
2817 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2818 if (priv->cfg->ops->hcmd->set_rxon_chain)
2819 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2820
2821 if (!iwl_is_ready(priv)) {
2822 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2823 goto out;
2824 }
2825
2826 if (scan_active)
2827 goto out;
2828
2829 if (memcmp(&priv->active_rxon,
2830 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2831 iwlcore_commit_rxon(priv);
2832 else
2833 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2834
2835
2836 out:
2837 IWL_DEBUG_MAC80211(priv, "leave\n");
2838 mutex_unlock(&priv->mutex);
2839 return ret;
2840 }
2841 EXPORT_SYMBOL(iwl_mac_config);
2842
2843 int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2844 struct ieee80211_tx_queue_stats *stats)
2845 {
2846 struct iwl_priv *priv = hw->priv;
2847 int i, avail;
2848 struct iwl_tx_queue *txq;
2849 struct iwl_queue *q;
2850 unsigned long flags;
2851
2852 IWL_DEBUG_MAC80211(priv, "enter\n");
2853
2854 if (!iwl_is_ready_rf(priv)) {
2855 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2856 return -EIO;
2857 }
2858
2859 spin_lock_irqsave(&priv->lock, flags);
2860
2861 for (i = 0; i < AC_NUM; i++) {
2862 txq = &priv->txq[i];
2863 q = &txq->q;
2864 avail = iwl_queue_space(q);
2865
2866 stats[i].len = q->n_window - avail;
2867 stats[i].limit = q->n_window - q->high_mark;
2868 stats[i].count = q->n_window;
2869
2870 }
2871 spin_unlock_irqrestore(&priv->lock, flags);
2872
2873 IWL_DEBUG_MAC80211(priv, "leave\n");
2874
2875 return 0;
2876 }
2877 EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2878
2879 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2880 {
2881 struct iwl_priv *priv = hw->priv;
2882 unsigned long flags;
2883
2884 mutex_lock(&priv->mutex);
2885 IWL_DEBUG_MAC80211(priv, "enter\n");
2886
2887 spin_lock_irqsave(&priv->lock, flags);
2888 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2889 spin_unlock_irqrestore(&priv->lock, flags);
2890
2891 iwl_reset_qos(priv);
2892
2893 spin_lock_irqsave(&priv->lock, flags);
2894 priv->assoc_id = 0;
2895 priv->assoc_capability = 0;
2896 priv->assoc_station_added = 0;
2897
2898 /* new association get rid of ibss beacon skb */
2899 if (priv->ibss_beacon)
2900 dev_kfree_skb(priv->ibss_beacon);
2901
2902 priv->ibss_beacon = NULL;
2903
2904 priv->beacon_int = priv->vif->bss_conf.beacon_int;
2905 priv->timestamp = 0;
2906 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2907 priv->beacon_int = 0;
2908
2909 spin_unlock_irqrestore(&priv->lock, flags);
2910
2911 if (!iwl_is_ready_rf(priv)) {
2912 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2913 mutex_unlock(&priv->mutex);
2914 return;
2915 }
2916
2917 /* we are restarting association process
2918 * clear RXON_FILTER_ASSOC_MSK bit
2919 */
2920 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2921 iwl_scan_cancel_timeout(priv, 100);
2922 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2923 iwlcore_commit_rxon(priv);
2924 }
2925
2926 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2927 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2928 mutex_unlock(&priv->mutex);
2929 return;
2930 }
2931
2932 iwl_set_rate(priv);
2933
2934 mutex_unlock(&priv->mutex);
2935
2936 IWL_DEBUG_MAC80211(priv, "leave\n");
2937 }
2938 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2939
2940 #ifdef CONFIG_PM
2941
2942 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2943 {
2944 struct iwl_priv *priv = pci_get_drvdata(pdev);
2945
2946 /*
2947 * This function is called when system goes into suspend state
2948 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2949 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2950 * it will not call apm_ops.stop() to stop the DMA operation.
2951 * Calling apm_ops.stop here to make sure we stop the DMA.
2952 */
2953 priv->cfg->ops->lib->apm_ops.stop(priv);
2954
2955 pci_save_state(pdev);
2956 pci_disable_device(pdev);
2957 pci_set_power_state(pdev, PCI_D3hot);
2958
2959 return 0;
2960 }
2961 EXPORT_SYMBOL(iwl_pci_suspend);
2962
2963 int iwl_pci_resume(struct pci_dev *pdev)
2964 {
2965 struct iwl_priv *priv = pci_get_drvdata(pdev);
2966 int ret;
2967
2968 pci_set_power_state(pdev, PCI_D0);
2969 ret = pci_enable_device(pdev);
2970 if (ret)
2971 return ret;
2972 pci_restore_state(pdev);
2973 iwl_enable_interrupts(priv);
2974
2975 return 0;
2976 }
2977 EXPORT_SYMBOL(iwl_pci_resume);
2978
2979 #endif /* CONFIG_PM */
Linux kernel - Deliverables
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