fb690a2700016a1b5d545e8b3fdcdeb04760967a
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <net/mac80211.h>
35
36 #include "iwl-eeprom.h"
37 #include "iwl-debug.h"
38 #include "iwl-core.h"
39 #include "iwl-io.h"
40 #include "iwl-power.h"
41 #include "iwl-agn.h"
42 #include "iwl-shared.h"
43 #include "iwl-agn.h"
44 #include "iwl-trans.h"
45
46 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
47
48 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
49 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
50 static void iwl_init_ht_hw_capab(const struct iwl_priv *priv,
51 struct ieee80211_sta_ht_cap *ht_info,
52 enum ieee80211_band band)
53 {
54 u16 max_bit_rate = 0;
55 u8 rx_chains_num = hw_params(priv).rx_chains_num;
56 u8 tx_chains_num = hw_params(priv).tx_chains_num;
57
58 ht_info->cap = 0;
59 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
60
61 ht_info->ht_supported = true;
62
63 if (cfg(priv)->ht_params &&
64 cfg(priv)->ht_params->ht_greenfield_support)
65 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
66 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
67 max_bit_rate = MAX_BIT_RATE_20_MHZ;
68 if (hw_params(priv).ht40_channel & BIT(band)) {
69 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
70 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
71 ht_info->mcs.rx_mask[4] = 0x01;
72 max_bit_rate = MAX_BIT_RATE_40_MHZ;
73 }
74
75 if (iwlagn_mod_params.amsdu_size_8K)
76 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
77
78 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
79 if (cfg(priv)->bt_params && cfg(priv)->bt_params->ampdu_factor)
80 ht_info->ampdu_factor = cfg(priv)->bt_params->ampdu_factor;
81 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
82 if (cfg(priv)->bt_params && cfg(priv)->bt_params->ampdu_density)
83 ht_info->ampdu_density = cfg(priv)->bt_params->ampdu_density;
84
85 ht_info->mcs.rx_mask[0] = 0xFF;
86 if (rx_chains_num >= 2)
87 ht_info->mcs.rx_mask[1] = 0xFF;
88 if (rx_chains_num >= 3)
89 ht_info->mcs.rx_mask[2] = 0xFF;
90
91 /* Highest supported Rx data rate */
92 max_bit_rate *= rx_chains_num;
93 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
94 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
95
96 /* Tx MCS capabilities */
97 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
98 if (tx_chains_num != rx_chains_num) {
99 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
100 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
101 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
102 }
103 }
104
105 /**
106 * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
107 */
108 int iwl_init_geos(struct iwl_priv *priv)
109 {
110 struct iwl_channel_info *ch;
111 struct ieee80211_supported_band *sband;
112 struct ieee80211_channel *channels;
113 struct ieee80211_channel *geo_ch;
114 struct ieee80211_rate *rates;
115 int i = 0;
116 s8 max_tx_power = IWLAGN_TX_POWER_TARGET_POWER_MIN;
117
118 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
119 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
120 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
121 set_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status);
122 return 0;
123 }
124
125 channels = kcalloc(priv->channel_count,
126 sizeof(struct ieee80211_channel), GFP_KERNEL);
127 if (!channels)
128 return -ENOMEM;
129
130 rates = kcalloc(IWL_RATE_COUNT_LEGACY, sizeof(struct ieee80211_rate),
131 GFP_KERNEL);
132 if (!rates) {
133 kfree(channels);
134 return -ENOMEM;
135 }
136
137 /* 5.2GHz channels start after the 2.4GHz channels */
138 sband = &priv->bands[IEEE80211_BAND_5GHZ];
139 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
140 /* just OFDM */
141 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
142 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
143
144 if (cfg(priv)->sku & EEPROM_SKU_CAP_11N_ENABLE)
145 iwl_init_ht_hw_capab(priv, &sband->ht_cap,
146 IEEE80211_BAND_5GHZ);
147
148 sband = &priv->bands[IEEE80211_BAND_2GHZ];
149 sband->channels = channels;
150 /* OFDM & CCK */
151 sband->bitrates = rates;
152 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
153
154 if (cfg(priv)->sku & EEPROM_SKU_CAP_11N_ENABLE)
155 iwl_init_ht_hw_capab(priv, &sband->ht_cap,
156 IEEE80211_BAND_2GHZ);
157
158 priv->ieee_channels = channels;
159 priv->ieee_rates = rates;
160
161 for (i = 0; i < priv->channel_count; i++) {
162 ch = &priv->channel_info[i];
163
164 /* FIXME: might be removed if scan is OK */
165 if (!is_channel_valid(ch))
166 continue;
167
168 sband = &priv->bands[ch->band];
169
170 geo_ch = &sband->channels[sband->n_channels++];
171
172 geo_ch->center_freq =
173 ieee80211_channel_to_frequency(ch->channel, ch->band);
174 geo_ch->max_power = ch->max_power_avg;
175 geo_ch->max_antenna_gain = 0xff;
176 geo_ch->hw_value = ch->channel;
177
178 if (is_channel_valid(ch)) {
179 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
180 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
181
182 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
183 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
184
185 if (ch->flags & EEPROM_CHANNEL_RADAR)
186 geo_ch->flags |= IEEE80211_CHAN_RADAR;
187
188 geo_ch->flags |= ch->ht40_extension_channel;
189
190 if (ch->max_power_avg > max_tx_power)
191 max_tx_power = ch->max_power_avg;
192 } else {
193 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
194 }
195
196 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
197 ch->channel, geo_ch->center_freq,
198 is_channel_a_band(ch) ? "5.2" : "2.4",
199 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
200 "restricted" : "valid",
201 geo_ch->flags);
202 }
203
204 priv->tx_power_device_lmt = max_tx_power;
205 priv->tx_power_user_lmt = max_tx_power;
206 priv->tx_power_next = max_tx_power;
207
208 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
209 cfg(priv)->sku & EEPROM_SKU_CAP_BAND_52GHZ) {
210 char buf[32];
211 bus_get_hw_id(bus(priv), buf, sizeof(buf));
212 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
213 "Please send your %s to maintainer.\n", buf);
214 cfg(priv)->sku &= ~EEPROM_SKU_CAP_BAND_52GHZ;
215 }
216
217 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
218 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
219 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
220
221 set_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status);
222
223 return 0;
224 }
225
226 /*
227 * iwl_free_geos - undo allocations in iwl_init_geos
228 */
229 void iwl_free_geos(struct iwl_priv *priv)
230 {
231 kfree(priv->ieee_channels);
232 kfree(priv->ieee_rates);
233 clear_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status);
234 }
235
236 static bool iwl_is_channel_extension(struct iwl_priv *priv,
237 enum ieee80211_band band,
238 u16 channel, u8 extension_chan_offset)
239 {
240 const struct iwl_channel_info *ch_info;
241
242 ch_info = iwl_get_channel_info(priv, band, channel);
243 if (!is_channel_valid(ch_info))
244 return false;
245
246 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
247 return !(ch_info->ht40_extension_channel &
248 IEEE80211_CHAN_NO_HT40PLUS);
249 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
250 return !(ch_info->ht40_extension_channel &
251 IEEE80211_CHAN_NO_HT40MINUS);
252
253 return false;
254 }
255
256 bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
257 struct iwl_rxon_context *ctx,
258 struct ieee80211_sta_ht_cap *ht_cap)
259 {
260 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
261 return false;
262
263 /*
264 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
265 * the bit will not set if it is pure 40MHz case
266 */
267 if (ht_cap && !ht_cap->ht_supported)
268 return false;
269
270 #ifdef CONFIG_IWLWIFI_DEBUGFS
271 if (priv->disable_ht40)
272 return false;
273 #endif
274
275 return iwl_is_channel_extension(priv, priv->band,
276 le16_to_cpu(ctx->staging.channel),
277 ctx->ht.extension_chan_offset);
278 }
279
280 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
281 {
282 u16 new_val;
283 u16 beacon_factor;
284
285 /*
286 * If mac80211 hasn't given us a beacon interval, program
287 * the default into the device (not checking this here
288 * would cause the adjustment below to return the maximum
289 * value, which may break PAN.)
290 */
291 if (!beacon_val)
292 return DEFAULT_BEACON_INTERVAL;
293
294 /*
295 * If the beacon interval we obtained from the peer
296 * is too large, we'll have to wake up more often
297 * (and in IBSS case, we'll beacon too much)
298 *
299 * For example, if max_beacon_val is 4096, and the
300 * requested beacon interval is 7000, we'll have to
301 * use 3500 to be able to wake up on the beacons.
302 *
303 * This could badly influence beacon detection stats.
304 */
305
306 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
307 new_val = beacon_val / beacon_factor;
308
309 if (!new_val)
310 new_val = max_beacon_val;
311
312 return new_val;
313 }
314
315 int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
316 {
317 u64 tsf;
318 s32 interval_tm, rem;
319 struct ieee80211_conf *conf = NULL;
320 u16 beacon_int;
321 struct ieee80211_vif *vif = ctx->vif;
322
323 conf = &priv->hw->conf;
324
325 lockdep_assert_held(&priv->shrd->mutex);
326
327 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
328
329 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
330 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
331
332 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
333
334 /*
335 * TODO: For IBSS we need to get atim_window from mac80211,
336 * for now just always use 0
337 */
338 ctx->timing.atim_window = 0;
339
340 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
341 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
342 iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
343 priv->contexts[IWL_RXON_CTX_BSS].vif &&
344 priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
345 ctx->timing.beacon_interval =
346 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
347 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
348 } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
349 iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
350 priv->contexts[IWL_RXON_CTX_PAN].vif &&
351 priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
352 (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
353 !ctx->vif->bss_conf.beacon_int)) {
354 ctx->timing.beacon_interval =
355 priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
356 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
357 } else {
358 beacon_int = iwl_adjust_beacon_interval(beacon_int,
359 IWL_MAX_UCODE_BEACON_INTERVAL * TIME_UNIT);
360 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
361 }
362
363 ctx->beacon_int = beacon_int;
364
365 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
366 interval_tm = beacon_int * TIME_UNIT;
367 rem = do_div(tsf, interval_tm);
368 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
369
370 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
371
372 IWL_DEBUG_ASSOC(priv,
373 "beacon interval %d beacon timer %d beacon tim %d\n",
374 le16_to_cpu(ctx->timing.beacon_interval),
375 le32_to_cpu(ctx->timing.beacon_init_val),
376 le16_to_cpu(ctx->timing.atim_window));
377
378 return iwl_trans_send_cmd_pdu(trans(priv), ctx->rxon_timing_cmd,
379 CMD_SYNC, sizeof(ctx->timing), &ctx->timing);
380 }
381
382 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
383 int hw_decrypt)
384 {
385 struct iwl_rxon_cmd *rxon = &ctx->staging;
386
387 if (hw_decrypt)
388 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
389 else
390 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
391
392 }
393
394 /* validate RXON structure is valid */
395 int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
396 {
397 struct iwl_rxon_cmd *rxon = &ctx->staging;
398 u32 errors = 0;
399
400 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
401 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
402 IWL_WARN(priv, "check 2.4G: wrong narrow\n");
403 errors |= BIT(0);
404 }
405 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
406 IWL_WARN(priv, "check 2.4G: wrong radar\n");
407 errors |= BIT(1);
408 }
409 } else {
410 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
411 IWL_WARN(priv, "check 5.2G: not short slot!\n");
412 errors |= BIT(2);
413 }
414 if (rxon->flags & RXON_FLG_CCK_MSK) {
415 IWL_WARN(priv, "check 5.2G: CCK!\n");
416 errors |= BIT(3);
417 }
418 }
419 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
420 IWL_WARN(priv, "mac/bssid mcast!\n");
421 errors |= BIT(4);
422 }
423
424 /* make sure basic rates 6Mbps and 1Mbps are supported */
425 if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
426 (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
427 IWL_WARN(priv, "neither 1 nor 6 are basic\n");
428 errors |= BIT(5);
429 }
430
431 if (le16_to_cpu(rxon->assoc_id) > 2007) {
432 IWL_WARN(priv, "aid > 2007\n");
433 errors |= BIT(6);
434 }
435
436 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
437 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
438 IWL_WARN(priv, "CCK and short slot\n");
439 errors |= BIT(7);
440 }
441
442 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
443 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
444 IWL_WARN(priv, "CCK and auto detect");
445 errors |= BIT(8);
446 }
447
448 if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
449 RXON_FLG_TGG_PROTECT_MSK)) ==
450 RXON_FLG_TGG_PROTECT_MSK) {
451 IWL_WARN(priv, "TGg but no auto-detect\n");
452 errors |= BIT(9);
453 }
454
455 if (rxon->channel == 0) {
456 IWL_WARN(priv, "zero channel is invalid\n");
457 errors |= BIT(10);
458 }
459
460 WARN(errors, "Invalid RXON (%#x), channel %d",
461 errors, le16_to_cpu(rxon->channel));
462
463 return errors ? -EINVAL : 0;
464 }
465
466 /**
467 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
468 * @priv: staging_rxon is compared to active_rxon
469 *
470 * If the RXON structure is changing enough to require a new tune,
471 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
472 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
473 */
474 int iwl_full_rxon_required(struct iwl_priv *priv,
475 struct iwl_rxon_context *ctx)
476 {
477 const struct iwl_rxon_cmd *staging = &ctx->staging;
478 const struct iwl_rxon_cmd *active = &ctx->active;
479
480 #define CHK(cond) \
481 if ((cond)) { \
482 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
483 return 1; \
484 }
485
486 #define CHK_NEQ(c1, c2) \
487 if ((c1) != (c2)) { \
488 IWL_DEBUG_INFO(priv, "need full RXON - " \
489 #c1 " != " #c2 " - %d != %d\n", \
490 (c1), (c2)); \
491 return 1; \
492 }
493
494 /* These items are only settable from the full RXON command */
495 CHK(!iwl_is_associated_ctx(ctx));
496 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
497 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
498 CHK(compare_ether_addr(staging->wlap_bssid_addr,
499 active->wlap_bssid_addr));
500 CHK_NEQ(staging->dev_type, active->dev_type);
501 CHK_NEQ(staging->channel, active->channel);
502 CHK_NEQ(staging->air_propagation, active->air_propagation);
503 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
504 active->ofdm_ht_single_stream_basic_rates);
505 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
506 active->ofdm_ht_dual_stream_basic_rates);
507 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
508 active->ofdm_ht_triple_stream_basic_rates);
509 CHK_NEQ(staging->assoc_id, active->assoc_id);
510
511 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
512 * be updated with the RXON_ASSOC command -- however only some
513 * flag transitions are allowed using RXON_ASSOC */
514
515 /* Check if we are not switching bands */
516 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
517 active->flags & RXON_FLG_BAND_24G_MSK);
518
519 /* Check if we are switching association toggle */
520 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
521 active->filter_flags & RXON_FILTER_ASSOC_MSK);
522
523 #undef CHK
524 #undef CHK_NEQ
525
526 return 0;
527 }
528
529 static void _iwl_set_rxon_ht(struct iwl_priv *priv,
530 struct iwl_ht_config *ht_conf,
531 struct iwl_rxon_context *ctx)
532 {
533 struct iwl_rxon_cmd *rxon = &ctx->staging;
534
535 if (!ctx->ht.enabled) {
536 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
537 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
538 RXON_FLG_HT40_PROT_MSK |
539 RXON_FLG_HT_PROT_MSK);
540 return;
541 }
542
543 /* FIXME: if the definition of ht.protection changed, the "translation"
544 * will be needed for rxon->flags
545 */
546 rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
547
548 /* Set up channel bandwidth:
549 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
550 /* clear the HT channel mode before set the mode */
551 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
552 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
553 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
554 /* pure ht40 */
555 if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
556 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
557 /* Note: control channel is opposite of extension channel */
558 switch (ctx->ht.extension_chan_offset) {
559 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
560 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
561 break;
562 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
563 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
564 break;
565 }
566 } else {
567 /* Note: control channel is opposite of extension channel */
568 switch (ctx->ht.extension_chan_offset) {
569 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
570 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
571 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
572 break;
573 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
574 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
575 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
576 break;
577 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
578 default:
579 /* channel location only valid if in Mixed mode */
580 IWL_ERR(priv, "invalid extension channel offset\n");
581 break;
582 }
583 }
584 } else {
585 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
586 }
587
588 iwlagn_set_rxon_chain(priv, ctx);
589
590 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
591 "extension channel offset 0x%x\n",
592 le32_to_cpu(rxon->flags), ctx->ht.protection,
593 ctx->ht.extension_chan_offset);
594 }
595
596 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
597 {
598 struct iwl_rxon_context *ctx;
599
600 for_each_context(priv, ctx)
601 _iwl_set_rxon_ht(priv, ht_conf, ctx);
602 }
603
604 /* Return valid, unused, channel for a passive scan to reset the RF */
605 u8 iwl_get_single_channel_number(struct iwl_priv *priv,
606 enum ieee80211_band band)
607 {
608 const struct iwl_channel_info *ch_info;
609 int i;
610 u8 channel = 0;
611 u8 min, max;
612 struct iwl_rxon_context *ctx;
613
614 if (band == IEEE80211_BAND_5GHZ) {
615 min = 14;
616 max = priv->channel_count;
617 } else {
618 min = 0;
619 max = 14;
620 }
621
622 for (i = min; i < max; i++) {
623 bool busy = false;
624
625 for_each_context(priv, ctx) {
626 busy = priv->channel_info[i].channel ==
627 le16_to_cpu(ctx->staging.channel);
628 if (busy)
629 break;
630 }
631
632 if (busy)
633 continue;
634
635 channel = priv->channel_info[i].channel;
636 ch_info = iwl_get_channel_info(priv, band, channel);
637 if (is_channel_valid(ch_info))
638 break;
639 }
640
641 return channel;
642 }
643
644 /**
645 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
646 * @ch: requested channel as a pointer to struct ieee80211_channel
647
648 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
649 * in the staging RXON flag structure based on the ch->band
650 */
651 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
652 struct iwl_rxon_context *ctx)
653 {
654 enum ieee80211_band band = ch->band;
655 u16 channel = ch->hw_value;
656
657 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
658 (priv->band == band))
659 return 0;
660
661 ctx->staging.channel = cpu_to_le16(channel);
662 if (band == IEEE80211_BAND_5GHZ)
663 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
664 else
665 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
666
667 priv->band = band;
668
669 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
670
671 return 0;
672 }
673
674 void iwl_set_flags_for_band(struct iwl_priv *priv,
675 struct iwl_rxon_context *ctx,
676 enum ieee80211_band band,
677 struct ieee80211_vif *vif)
678 {
679 if (band == IEEE80211_BAND_5GHZ) {
680 ctx->staging.flags &=
681 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
682 | RXON_FLG_CCK_MSK);
683 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
684 } else {
685 /* Copied from iwl_post_associate() */
686 if (vif && vif->bss_conf.use_short_slot)
687 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
688 else
689 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
690
691 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
692 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
693 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
694 }
695 }
696
697 /*
698 * initialize rxon structure with default values from eeprom
699 */
700 void iwl_connection_init_rx_config(struct iwl_priv *priv,
701 struct iwl_rxon_context *ctx)
702 {
703 const struct iwl_channel_info *ch_info;
704
705 memset(&ctx->staging, 0, sizeof(ctx->staging));
706
707 if (!ctx->vif) {
708 ctx->staging.dev_type = ctx->unused_devtype;
709 } else switch (ctx->vif->type) {
710 case NL80211_IFTYPE_AP:
711 ctx->staging.dev_type = ctx->ap_devtype;
712 break;
713
714 case NL80211_IFTYPE_STATION:
715 ctx->staging.dev_type = ctx->station_devtype;
716 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
717 break;
718
719 case NL80211_IFTYPE_ADHOC:
720 ctx->staging.dev_type = ctx->ibss_devtype;
721 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
722 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
723 RXON_FILTER_ACCEPT_GRP_MSK;
724 break;
725
726 default:
727 IWL_ERR(priv, "Unsupported interface type %d\n",
728 ctx->vif->type);
729 break;
730 }
731
732 #if 0
733 /* TODO: Figure out when short_preamble would be set and cache from
734 * that */
735 if (!hw_to_local(priv->hw)->short_preamble)
736 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
737 else
738 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
739 #endif
740
741 ch_info = iwl_get_channel_info(priv, priv->band,
742 le16_to_cpu(ctx->active.channel));
743
744 if (!ch_info)
745 ch_info = &priv->channel_info[0];
746
747 ctx->staging.channel = cpu_to_le16(ch_info->channel);
748 priv->band = ch_info->band;
749
750 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
751
752 ctx->staging.ofdm_basic_rates =
753 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
754 ctx->staging.cck_basic_rates =
755 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
756
757 /* clear both MIX and PURE40 mode flag */
758 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
759 RXON_FLG_CHANNEL_MODE_PURE_40);
760 if (ctx->vif)
761 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
762
763 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
764 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
765 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
766 }
767
768 void iwl_set_rate(struct iwl_priv *priv)
769 {
770 const struct ieee80211_supported_band *hw = NULL;
771 struct ieee80211_rate *rate;
772 struct iwl_rxon_context *ctx;
773 int i;
774
775 hw = iwl_get_hw_mode(priv, priv->band);
776 if (!hw) {
777 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
778 return;
779 }
780
781 priv->active_rate = 0;
782
783 for (i = 0; i < hw->n_bitrates; i++) {
784 rate = &(hw->bitrates[i]);
785 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
786 priv->active_rate |= (1 << rate->hw_value);
787 }
788
789 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
790
791 for_each_context(priv, ctx) {
792 ctx->staging.cck_basic_rates =
793 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
794
795 ctx->staging.ofdm_basic_rates =
796 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
797 }
798 }
799
800 void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
801 {
802 /*
803 * MULTI-FIXME
804 * See iwlagn_mac_channel_switch.
805 */
806 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
807
808 if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
809 return;
810
811 if (test_and_clear_bit(STATUS_CHANNEL_SWITCH_PENDING,
812 &priv->shrd->status))
813 ieee80211_chswitch_done(ctx->vif, is_success);
814 }
815
816 #ifdef CONFIG_IWLWIFI_DEBUG
817 void iwl_print_rx_config_cmd(struct iwl_priv *priv,
818 enum iwl_rxon_context_id ctxid)
819 {
820 struct iwl_rxon_context *ctx = &priv->contexts[ctxid];
821 struct iwl_rxon_cmd *rxon = &ctx->staging;
822
823 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
824 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
825 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
826 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
827 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
828 le32_to_cpu(rxon->filter_flags));
829 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
830 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
831 rxon->ofdm_basic_rates);
832 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
833 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
834 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
835 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
836 }
837 #endif
838
839 void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
840 {
841 unsigned int reload_msec;
842 unsigned long reload_jiffies;
843
844 /* Set the FW error flag -- cleared on iwl_down */
845 set_bit(STATUS_FW_ERROR, &priv->shrd->status);
846
847 /* Cancel currently queued command. */
848 clear_bit(STATUS_HCMD_ACTIVE, &priv->shrd->status);
849
850 iwl_abort_notification_waits(priv->shrd);
851
852 /* Keep the restart process from trying to send host
853 * commands by clearing the ready bit */
854 clear_bit(STATUS_READY, &priv->shrd->status);
855
856 wake_up(&priv->shrd->wait_command_queue);
857
858 if (!ondemand) {
859 /*
860 * If firmware keep reloading, then it indicate something
861 * serious wrong and firmware having problem to recover
862 * from it. Instead of keep trying which will fill the syslog
863 * and hang the system, let's just stop it
864 */
865 reload_jiffies = jiffies;
866 reload_msec = jiffies_to_msecs((long) reload_jiffies -
867 (long) priv->reload_jiffies);
868 priv->reload_jiffies = reload_jiffies;
869 if (reload_msec <= IWL_MIN_RELOAD_DURATION) {
870 priv->reload_count++;
871 if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) {
872 IWL_ERR(priv, "BUG_ON, Stop restarting\n");
873 return;
874 }
875 } else
876 priv->reload_count = 0;
877 }
878
879 if (!test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) {
880 if (iwlagn_mod_params.restart_fw) {
881 IWL_DEBUG_FW_ERRORS(priv,
882 "Restarting adapter due to uCode error.\n");
883 queue_work(priv->shrd->workqueue, &priv->restart);
884 } else
885 IWL_DEBUG_FW_ERRORS(priv,
886 "Detected FW error, but not restarting\n");
887 }
888 }
889
890 static int iwl_apm_stop_master(struct iwl_priv *priv)
891 {
892 int ret = 0;
893
894 /* stop device's busmaster DMA activity */
895 iwl_set_bit(bus(priv), CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
896
897 ret = iwl_poll_bit(bus(priv), CSR_RESET,
898 CSR_RESET_REG_FLAG_MASTER_DISABLED,
899 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
900 if (ret)
901 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
902
903 IWL_DEBUG_INFO(priv, "stop master\n");
904
905 return ret;
906 }
907
908 void iwl_apm_stop(struct iwl_priv *priv)
909 {
910 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
911
912 clear_bit(STATUS_DEVICE_ENABLED, &priv->shrd->status);
913
914 /* Stop device's DMA activity */
915 iwl_apm_stop_master(priv);
916
917 /* Reset the entire device */
918 iwl_set_bit(bus(priv), CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
919
920 udelay(10);
921
922 /*
923 * Clear "initialization complete" bit to move adapter from
924 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
925 */
926 iwl_clear_bit(bus(priv), CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
927 }
928
929
930 /*
931 * Start up NIC's basic functionality after it has been reset
932 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
933 * NOTE: This does not load uCode nor start the embedded processor
934 */
935 int iwl_apm_init(struct iwl_priv *priv)
936 {
937 int ret = 0;
938 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
939
940 /*
941 * Use "set_bit" below rather than "write", to preserve any hardware
942 * bits already set by default after reset.
943 */
944
945 /* Disable L0S exit timer (platform NMI Work/Around) */
946 iwl_set_bit(bus(priv), CSR_GIO_CHICKEN_BITS,
947 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
948
949 /*
950 * Disable L0s without affecting L1;
951 * don't wait for ICH L0s (ICH bug W/A)
952 */
953 iwl_set_bit(bus(priv), CSR_GIO_CHICKEN_BITS,
954 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
955
956 /* Set FH wait threshold to maximum (HW error during stress W/A) */
957 iwl_set_bit(bus(priv), CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
958
959 /*
960 * Enable HAP INTA (interrupt from management bus) to
961 * wake device's PCI Express link L1a -> L0s
962 */
963 iwl_set_bit(bus(priv), CSR_HW_IF_CONFIG_REG,
964 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
965
966 bus_apm_config(bus(priv));
967
968 /* Configure analog phase-lock-loop before activating to D0A */
969 if (cfg(priv)->base_params->pll_cfg_val)
970 iwl_set_bit(bus(priv), CSR_ANA_PLL_CFG,
971 cfg(priv)->base_params->pll_cfg_val);
972
973 /*
974 * Set "initialization complete" bit to move adapter from
975 * D0U* --> D0A* (powered-up active) state.
976 */
977 iwl_set_bit(bus(priv), CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
978
979 /*
980 * Wait for clock stabilization; once stabilized, access to
981 * device-internal resources is supported, e.g. iwl_write_prph()
982 * and accesses to uCode SRAM.
983 */
984 ret = iwl_poll_bit(bus(priv), CSR_GP_CNTRL,
985 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
986 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
987 if (ret < 0) {
988 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
989 goto out;
990 }
991
992 /*
993 * Enable DMA clock and wait for it to stabilize.
994 *
995 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
996 * do not disable clocks. This preserves any hardware bits already
997 * set by default in "CLK_CTRL_REG" after reset.
998 */
999 iwl_write_prph(bus(priv), APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
1000 udelay(20);
1001
1002 /* Disable L1-Active */
1003 iwl_set_bits_prph(bus(priv), APMG_PCIDEV_STT_REG,
1004 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1005
1006 set_bit(STATUS_DEVICE_ENABLED, &priv->shrd->status);
1007
1008 out:
1009 return ret;
1010 }
1011
1012
1013 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1014 {
1015 int ret;
1016 s8 prev_tx_power;
1017 bool defer;
1018 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1019
1020 lockdep_assert_held(&priv->shrd->mutex);
1021
1022 if (priv->tx_power_user_lmt == tx_power && !force)
1023 return 0;
1024
1025 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1026 IWL_WARN(priv,
1027 "Requested user TXPOWER %d below lower limit %d.\n",
1028 tx_power,
1029 IWLAGN_TX_POWER_TARGET_POWER_MIN);
1030 return -EINVAL;
1031 }
1032
1033 if (tx_power > priv->tx_power_device_lmt) {
1034 IWL_WARN(priv,
1035 "Requested user TXPOWER %d above upper limit %d.\n",
1036 tx_power, priv->tx_power_device_lmt);
1037 return -EINVAL;
1038 }
1039
1040 if (!iwl_is_ready_rf(priv->shrd))
1041 return -EIO;
1042
1043 /* scan complete and commit_rxon use tx_power_next value,
1044 * it always need to be updated for newest request */
1045 priv->tx_power_next = tx_power;
1046
1047 /* do not set tx power when scanning or channel changing */
1048 defer = test_bit(STATUS_SCANNING, &priv->shrd->status) ||
1049 memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
1050 if (defer && !force) {
1051 IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
1052 return 0;
1053 }
1054
1055 prev_tx_power = priv->tx_power_user_lmt;
1056 priv->tx_power_user_lmt = tx_power;
1057
1058 ret = iwlagn_send_tx_power(priv);
1059
1060 /* if fail to set tx_power, restore the orig. tx power */
1061 if (ret) {
1062 priv->tx_power_user_lmt = prev_tx_power;
1063 priv->tx_power_next = prev_tx_power;
1064 }
1065 return ret;
1066 }
1067
1068 void iwl_send_bt_config(struct iwl_priv *priv)
1069 {
1070 struct iwl_bt_cmd bt_cmd = {
1071 .lead_time = BT_LEAD_TIME_DEF,
1072 .max_kill = BT_MAX_KILL_DEF,
1073 .kill_ack_mask = 0,
1074 .kill_cts_mask = 0,
1075 };
1076
1077 if (!iwlagn_mod_params.bt_coex_active)
1078 bt_cmd.flags = BT_COEX_DISABLE;
1079 else
1080 bt_cmd.flags = BT_COEX_ENABLE;
1081
1082 priv->bt_enable_flag = bt_cmd.flags;
1083 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1084 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1085
1086 if (iwl_trans_send_cmd_pdu(trans(priv), REPLY_BT_CONFIG,
1087 CMD_SYNC, sizeof(struct iwl_bt_cmd), &bt_cmd))
1088 IWL_ERR(priv, "failed to send BT Coex Config\n");
1089 }
1090
1091 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
1092 {
1093 struct iwl_statistics_cmd statistics_cmd = {
1094 .configuration_flags =
1095 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
1096 };
1097
1098 if (flags & CMD_ASYNC)
1099 return iwl_trans_send_cmd_pdu(trans(priv), REPLY_STATISTICS_CMD,
1100 CMD_ASYNC,
1101 sizeof(struct iwl_statistics_cmd),
1102 &statistics_cmd);
1103 else
1104 return iwl_trans_send_cmd_pdu(trans(priv), REPLY_STATISTICS_CMD,
1105 CMD_SYNC,
1106 sizeof(struct iwl_statistics_cmd),
1107 &statistics_cmd);
1108 }
1109
1110
1111
1112
1113 #ifdef CONFIG_IWLWIFI_DEBUGFS
1114
1115 #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
1116
1117 void iwl_reset_traffic_log(struct iwl_priv *priv)
1118 {
1119 priv->tx_traffic_idx = 0;
1120 priv->rx_traffic_idx = 0;
1121 if (priv->tx_traffic)
1122 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1123 if (priv->rx_traffic)
1124 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1125 }
1126
1127 int iwl_alloc_traffic_mem(struct iwl_priv *priv)
1128 {
1129 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
1130
1131 if (iwl_get_debug_level(priv->shrd) & IWL_DL_TX) {
1132 if (!priv->tx_traffic) {
1133 priv->tx_traffic =
1134 kzalloc(traffic_size, GFP_KERNEL);
1135 if (!priv->tx_traffic)
1136 return -ENOMEM;
1137 }
1138 }
1139 if (iwl_get_debug_level(priv->shrd) & IWL_DL_RX) {
1140 if (!priv->rx_traffic) {
1141 priv->rx_traffic =
1142 kzalloc(traffic_size, GFP_KERNEL);
1143 if (!priv->rx_traffic)
1144 return -ENOMEM;
1145 }
1146 }
1147 iwl_reset_traffic_log(priv);
1148 return 0;
1149 }
1150
1151 void iwl_free_traffic_mem(struct iwl_priv *priv)
1152 {
1153 kfree(priv->tx_traffic);
1154 priv->tx_traffic = NULL;
1155
1156 kfree(priv->rx_traffic);
1157 priv->rx_traffic = NULL;
1158 }
1159
1160 void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
1161 u16 length, struct ieee80211_hdr *header)
1162 {
1163 __le16 fc;
1164 u16 len;
1165
1166 if (likely(!(iwl_get_debug_level(priv->shrd) & IWL_DL_TX)))
1167 return;
1168
1169 if (!priv->tx_traffic)
1170 return;
1171
1172 fc = header->frame_control;
1173 if (ieee80211_is_data(fc)) {
1174 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1175 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1176 memcpy((priv->tx_traffic +
1177 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1178 header, len);
1179 priv->tx_traffic_idx =
1180 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1181 }
1182 }
1183
1184 void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
1185 u16 length, struct ieee80211_hdr *header)
1186 {
1187 __le16 fc;
1188 u16 len;
1189
1190 if (likely(!(iwl_get_debug_level(priv->shrd) & IWL_DL_RX)))
1191 return;
1192
1193 if (!priv->rx_traffic)
1194 return;
1195
1196 fc = header->frame_control;
1197 if (ieee80211_is_data(fc)) {
1198 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1199 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1200 memcpy((priv->rx_traffic +
1201 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1202 header, len);
1203 priv->rx_traffic_idx =
1204 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1205 }
1206 }
1207
1208 const char *get_mgmt_string(int cmd)
1209 {
1210 switch (cmd) {
1211 IWL_CMD(MANAGEMENT_ASSOC_REQ);
1212 IWL_CMD(MANAGEMENT_ASSOC_RESP);
1213 IWL_CMD(MANAGEMENT_REASSOC_REQ);
1214 IWL_CMD(MANAGEMENT_REASSOC_RESP);
1215 IWL_CMD(MANAGEMENT_PROBE_REQ);
1216 IWL_CMD(MANAGEMENT_PROBE_RESP);
1217 IWL_CMD(MANAGEMENT_BEACON);
1218 IWL_CMD(MANAGEMENT_ATIM);
1219 IWL_CMD(MANAGEMENT_DISASSOC);
1220 IWL_CMD(MANAGEMENT_AUTH);
1221 IWL_CMD(MANAGEMENT_DEAUTH);
1222 IWL_CMD(MANAGEMENT_ACTION);
1223 default:
1224 return "UNKNOWN";
1225
1226 }
1227 }
1228
1229 const char *get_ctrl_string(int cmd)
1230 {
1231 switch (cmd) {
1232 IWL_CMD(CONTROL_BACK_REQ);
1233 IWL_CMD(CONTROL_BACK);
1234 IWL_CMD(CONTROL_PSPOLL);
1235 IWL_CMD(CONTROL_RTS);
1236 IWL_CMD(CONTROL_CTS);
1237 IWL_CMD(CONTROL_ACK);
1238 IWL_CMD(CONTROL_CFEND);
1239 IWL_CMD(CONTROL_CFENDACK);
1240 default:
1241 return "UNKNOWN";
1242
1243 }
1244 }
1245
1246 void iwl_clear_traffic_stats(struct iwl_priv *priv)
1247 {
1248 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
1249 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
1250 }
1251
1252 /*
1253 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
1254 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
1255 * Use debugFs to display the rx/rx_statistics
1256 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
1257 * information will be recorded, but DATA pkt still will be recorded
1258 * for the reason of iwl_led.c need to control the led blinking based on
1259 * number of tx and rx data.
1260 *
1261 */
1262 void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
1263 {
1264 struct traffic_stats *stats;
1265
1266 if (is_tx)
1267 stats = &priv->tx_stats;
1268 else
1269 stats = &priv->rx_stats;
1270
1271 if (ieee80211_is_mgmt(fc)) {
1272 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1273 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1274 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
1275 break;
1276 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
1277 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
1278 break;
1279 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1280 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
1281 break;
1282 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
1283 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
1284 break;
1285 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
1286 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
1287 break;
1288 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
1289 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
1290 break;
1291 case cpu_to_le16(IEEE80211_STYPE_BEACON):
1292 stats->mgmt[MANAGEMENT_BEACON]++;
1293 break;
1294 case cpu_to_le16(IEEE80211_STYPE_ATIM):
1295 stats->mgmt[MANAGEMENT_ATIM]++;
1296 break;
1297 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
1298 stats->mgmt[MANAGEMENT_DISASSOC]++;
1299 break;
1300 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1301 stats->mgmt[MANAGEMENT_AUTH]++;
1302 break;
1303 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1304 stats->mgmt[MANAGEMENT_DEAUTH]++;
1305 break;
1306 case cpu_to_le16(IEEE80211_STYPE_ACTION):
1307 stats->mgmt[MANAGEMENT_ACTION]++;
1308 break;
1309 }
1310 } else if (ieee80211_is_ctl(fc)) {
1311 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1312 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
1313 stats->ctrl[CONTROL_BACK_REQ]++;
1314 break;
1315 case cpu_to_le16(IEEE80211_STYPE_BACK):
1316 stats->ctrl[CONTROL_BACK]++;
1317 break;
1318 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
1319 stats->ctrl[CONTROL_PSPOLL]++;
1320 break;
1321 case cpu_to_le16(IEEE80211_STYPE_RTS):
1322 stats->ctrl[CONTROL_RTS]++;
1323 break;
1324 case cpu_to_le16(IEEE80211_STYPE_CTS):
1325 stats->ctrl[CONTROL_CTS]++;
1326 break;
1327 case cpu_to_le16(IEEE80211_STYPE_ACK):
1328 stats->ctrl[CONTROL_ACK]++;
1329 break;
1330 case cpu_to_le16(IEEE80211_STYPE_CFEND):
1331 stats->ctrl[CONTROL_CFEND]++;
1332 break;
1333 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
1334 stats->ctrl[CONTROL_CFENDACK]++;
1335 break;
1336 }
1337 } else {
1338 /* data */
1339 stats->data_cnt++;
1340 stats->data_bytes += len;
1341 }
1342 }
1343 #endif
1344
1345 static void iwl_force_rf_reset(struct iwl_priv *priv)
1346 {
1347 if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
1348 return;
1349
1350 if (!iwl_is_any_associated(priv)) {
1351 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
1352 return;
1353 }
1354 /*
1355 * There is no easy and better way to force reset the radio,
1356 * the only known method is switching channel which will force to
1357 * reset and tune the radio.
1358 * Use internal short scan (single channel) operation to should
1359 * achieve this objective.
1360 * Driver should reset the radio when number of consecutive missed
1361 * beacon, or any other uCode error condition detected.
1362 */
1363 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
1364 iwl_internal_short_hw_scan(priv);
1365 }
1366
1367
1368 int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
1369 {
1370 struct iwl_force_reset *force_reset;
1371
1372 if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
1373 return -EINVAL;
1374
1375 if (mode >= IWL_MAX_FORCE_RESET) {
1376 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
1377 return -EINVAL;
1378 }
1379 force_reset = &priv->force_reset[mode];
1380 force_reset->reset_request_count++;
1381 if (!external) {
1382 if (force_reset->last_force_reset_jiffies &&
1383 time_after(force_reset->last_force_reset_jiffies +
1384 force_reset->reset_duration, jiffies)) {
1385 IWL_DEBUG_INFO(priv, "force reset rejected\n");
1386 force_reset->reset_reject_count++;
1387 return -EAGAIN;
1388 }
1389 }
1390 force_reset->reset_success_count++;
1391 force_reset->last_force_reset_jiffies = jiffies;
1392 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
1393 switch (mode) {
1394 case IWL_RF_RESET:
1395 iwl_force_rf_reset(priv);
1396 break;
1397 case IWL_FW_RESET:
1398 /*
1399 * if the request is from external(ex: debugfs),
1400 * then always perform the request in regardless the module
1401 * parameter setting
1402 * if the request is from internal (uCode error or driver
1403 * detect failure), then fw_restart module parameter
1404 * need to be check before performing firmware reload
1405 */
1406 if (!external && !iwlagn_mod_params.restart_fw) {
1407 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
1408 "module parameter setting\n");
1409 break;
1410 }
1411 IWL_ERR(priv, "On demand firmware reload\n");
1412 iwlagn_fw_error(priv, true);
1413 break;
1414 }
1415 return 0;
1416 }
1417
1418
1419 int iwl_cmd_echo_test(struct iwl_priv *priv)
1420 {
1421 int ret;
1422 struct iwl_host_cmd cmd = {
1423 .id = REPLY_ECHO,
1424 .len = { 0 },
1425 .flags = CMD_SYNC,
1426 };
1427
1428 ret = iwl_trans_send_cmd(trans(priv), &cmd);
1429 if (ret)
1430 IWL_ERR(priv, "echo testing fail: 0X%x\n", ret);
1431 else
1432 IWL_DEBUG_INFO(priv, "echo testing pass\n");
1433 return ret;
1434 }
1435
1436 static inline int iwl_check_stuck_queue(struct iwl_priv *priv, int txq)
1437 {
1438 if (iwl_trans_check_stuck_queue(trans(priv), txq)) {
1439 int ret;
1440 ret = iwl_force_reset(priv, IWL_FW_RESET, false);
1441 return (ret == -EAGAIN) ? 0 : 1;
1442 }
1443 return 0;
1444 }
1445
1446 /*
1447 * Making watchdog tick be a quarter of timeout assure we will
1448 * discover the queue hung between timeout and 1.25*timeout
1449 */
1450 #define IWL_WD_TICK(timeout) ((timeout) / 4)
1451
1452 /*
1453 * Watchdog timer callback, we check each tx queue for stuck, if if hung
1454 * we reset the firmware. If everything is fine just rearm the timer.
1455 */
1456 void iwl_bg_watchdog(unsigned long data)
1457 {
1458 struct iwl_priv *priv = (struct iwl_priv *)data;
1459 int cnt;
1460 unsigned long timeout;
1461
1462 if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
1463 return;
1464
1465 if (iwl_is_rfkill(priv->shrd))
1466 return;
1467
1468 timeout = cfg(priv)->base_params->wd_timeout;
1469 if (timeout == 0)
1470 return;
1471
1472 /* monitor and check for stuck cmd queue */
1473 if (iwl_check_stuck_queue(priv, priv->shrd->cmd_queue))
1474 return;
1475
1476 /* monitor and check for other stuck queues */
1477 if (iwl_is_any_associated(priv)) {
1478 for (cnt = 0; cnt < hw_params(priv).max_txq_num; cnt++) {
1479 /* skip as we already checked the command queue */
1480 if (cnt == priv->shrd->cmd_queue)
1481 continue;
1482 if (iwl_check_stuck_queue(priv, cnt))
1483 return;
1484 }
1485 }
1486
1487 mod_timer(&priv->watchdog, jiffies +
1488 msecs_to_jiffies(IWL_WD_TICK(timeout)));
1489 }
1490
1491 void iwl_setup_watchdog(struct iwl_priv *priv)
1492 {
1493 unsigned int timeout = cfg(priv)->base_params->wd_timeout;
1494
1495 if (!iwlagn_mod_params.wd_disable) {
1496 /* use system default */
1497 if (timeout && !cfg(priv)->base_params->wd_disable)
1498 mod_timer(&priv->watchdog,
1499 jiffies +
1500 msecs_to_jiffies(IWL_WD_TICK(timeout)));
1501 else
1502 del_timer(&priv->watchdog);
1503 } else {
1504 /* module parameter overwrite default configuration */
1505 if (timeout && iwlagn_mod_params.wd_disable == 2)
1506 mod_timer(&priv->watchdog,
1507 jiffies +
1508 msecs_to_jiffies(IWL_WD_TICK(timeout)));
1509 else
1510 del_timer(&priv->watchdog);
1511 }
1512 }
1513
1514 /**
1515 * iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time
1516 * @priv -- pointer to iwl_priv data structure
1517 * @tsf_bits -- number of bits need to shift for masking)
1518 */
1519 static inline u32 iwl_beacon_time_mask_low(struct iwl_priv *priv,
1520 u16 tsf_bits)
1521 {
1522 return (1 << tsf_bits) - 1;
1523 }
1524
1525 /**
1526 * iwl_beacon_time_mask_high - mask of higher 32 bit of beacon time
1527 * @priv -- pointer to iwl_priv data structure
1528 * @tsf_bits -- number of bits need to shift for masking)
1529 */
1530 static inline u32 iwl_beacon_time_mask_high(struct iwl_priv *priv,
1531 u16 tsf_bits)
1532 {
1533 return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
1534 }
1535
1536 /*
1537 * extended beacon time format
1538 * time in usec will be changed into a 32-bit value in extended:internal format
1539 * the extended part is the beacon counts
1540 * the internal part is the time in usec within one beacon interval
1541 */
1542 u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
1543 {
1544 u32 quot;
1545 u32 rem;
1546 u32 interval = beacon_interval * TIME_UNIT;
1547
1548 if (!interval || !usec)
1549 return 0;
1550
1551 quot = (usec / interval) &
1552 (iwl_beacon_time_mask_high(priv, IWLAGN_EXT_BEACON_TIME_POS) >>
1553 IWLAGN_EXT_BEACON_TIME_POS);
1554 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
1555 IWLAGN_EXT_BEACON_TIME_POS);
1556
1557 return (quot << IWLAGN_EXT_BEACON_TIME_POS) + rem;
1558 }
1559
1560 /* base is usually what we get from ucode with each received frame,
1561 * the same as HW timer counter counting down
1562 */
1563 __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
1564 u32 addon, u32 beacon_interval)
1565 {
1566 u32 base_low = base & iwl_beacon_time_mask_low(priv,
1567 IWLAGN_EXT_BEACON_TIME_POS);
1568 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
1569 IWLAGN_EXT_BEACON_TIME_POS);
1570 u32 interval = beacon_interval * TIME_UNIT;
1571 u32 res = (base & iwl_beacon_time_mask_high(priv,
1572 IWLAGN_EXT_BEACON_TIME_POS)) +
1573 (addon & iwl_beacon_time_mask_high(priv,
1574 IWLAGN_EXT_BEACON_TIME_POS));
1575
1576 if (base_low > addon_low)
1577 res += base_low - addon_low;
1578 else if (base_low < addon_low) {
1579 res += interval + base_low - addon_low;
1580 res += (1 << IWLAGN_EXT_BEACON_TIME_POS);
1581 } else
1582 res += (1 << IWLAGN_EXT_BEACON_TIME_POS);
1583
1584 return cpu_to_le32(res);
1585 }
1586
1587 void iwl_set_hw_rfkill_state(struct iwl_priv *priv, bool state)
1588 {
1589 wiphy_rfkill_set_hw_state(priv->hw->wiphy, state);
1590 }
1591
1592 void iwl_nic_config(struct iwl_priv *priv)
1593 {
1594 cfg(priv)->lib->nic_config(priv);
1595 }
1596
1597 void iwl_free_skb(struct iwl_priv *priv, struct sk_buff *skb)
1598 {
1599 struct ieee80211_tx_info *info;
1600
1601 info = IEEE80211_SKB_CB(skb);
1602 kmem_cache_free(priv->tx_cmd_pool, (info->driver_data[1]));
1603 dev_kfree_skb_any(skb);
1604 }
1605
1606 void iwl_stop_sw_queue(struct iwl_priv *priv, u8 ac)
1607 {
1608 ieee80211_stop_queue(priv->hw, ac);
1609 }
1610
1611 void iwl_wake_sw_queue(struct iwl_priv *priv, u8 ac)
1612 {
1613 ieee80211_wake_queue(priv->hw, ac);
1614 }
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