1 /******************************************************************************
5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <net/mac80211.h>
35 #include "iwl-eeprom.h"
36 #include "iwl-dev.h" /* FIXME: remove */
37 #include "iwl-debug.h"
40 #include "iwl-power.h"
42 #include "iwl-helpers.h"
45 MODULE_DESCRIPTION("iwl core");
46 MODULE_VERSION(IWLWIFI_VERSION
);
47 MODULE_AUTHOR(DRV_COPYRIGHT
" " DRV_AUTHOR
);
48 MODULE_LICENSE("GPL");
50 static struct iwl_wimax_coex_event_entry cu_priorities
[COEX_NUM_OF_EVENTS
] = {
51 {COEX_CU_UNASSOC_IDLE_RP
, COEX_CU_UNASSOC_IDLE_WP
,
52 0, COEX_UNASSOC_IDLE_FLAGS
},
53 {COEX_CU_UNASSOC_MANUAL_SCAN_RP
, COEX_CU_UNASSOC_MANUAL_SCAN_WP
,
54 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS
},
55 {COEX_CU_UNASSOC_AUTO_SCAN_RP
, COEX_CU_UNASSOC_AUTO_SCAN_WP
,
56 0, COEX_UNASSOC_AUTO_SCAN_FLAGS
},
57 {COEX_CU_CALIBRATION_RP
, COEX_CU_CALIBRATION_WP
,
58 0, COEX_CALIBRATION_FLAGS
},
59 {COEX_CU_PERIODIC_CALIBRATION_RP
, COEX_CU_PERIODIC_CALIBRATION_WP
,
60 0, COEX_PERIODIC_CALIBRATION_FLAGS
},
61 {COEX_CU_CONNECTION_ESTAB_RP
, COEX_CU_CONNECTION_ESTAB_WP
,
62 0, COEX_CONNECTION_ESTAB_FLAGS
},
63 {COEX_CU_ASSOCIATED_IDLE_RP
, COEX_CU_ASSOCIATED_IDLE_WP
,
64 0, COEX_ASSOCIATED_IDLE_FLAGS
},
65 {COEX_CU_ASSOC_MANUAL_SCAN_RP
, COEX_CU_ASSOC_MANUAL_SCAN_WP
,
66 0, COEX_ASSOC_MANUAL_SCAN_FLAGS
},
67 {COEX_CU_ASSOC_AUTO_SCAN_RP
, COEX_CU_ASSOC_AUTO_SCAN_WP
,
68 0, COEX_ASSOC_AUTO_SCAN_FLAGS
},
69 {COEX_CU_ASSOC_ACTIVE_LEVEL_RP
, COEX_CU_ASSOC_ACTIVE_LEVEL_WP
,
70 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS
},
71 {COEX_CU_RF_ON_RP
, COEX_CU_RF_ON_WP
, 0, COEX_CU_RF_ON_FLAGS
},
72 {COEX_CU_RF_OFF_RP
, COEX_CU_RF_OFF_WP
, 0, COEX_RF_OFF_FLAGS
},
73 {COEX_CU_STAND_ALONE_DEBUG_RP
, COEX_CU_STAND_ALONE_DEBUG_WP
,
74 0, COEX_STAND_ALONE_DEBUG_FLAGS
},
75 {COEX_CU_IPAN_ASSOC_LEVEL_RP
, COEX_CU_IPAN_ASSOC_LEVEL_WP
,
76 0, COEX_IPAN_ASSOC_LEVEL_FLAGS
},
77 {COEX_CU_RSRVD1_RP
, COEX_CU_RSRVD1_WP
, 0, COEX_RSRVD1_FLAGS
},
78 {COEX_CU_RSRVD2_RP
, COEX_CU_RSRVD2_WP
, 0, COEX_RSRVD2_FLAGS
}
81 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
82 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
83 IWL_RATE_SISO_##s##M_PLCP, \
84 IWL_RATE_MIMO2_##s##M_PLCP,\
85 IWL_RATE_MIMO3_##s##M_PLCP,\
86 IWL_RATE_##r##M_IEEE, \
87 IWL_RATE_##ip##M_INDEX, \
88 IWL_RATE_##in##M_INDEX, \
89 IWL_RATE_##rp##M_INDEX, \
90 IWL_RATE_##rn##M_INDEX, \
91 IWL_RATE_##pp##M_INDEX, \
92 IWL_RATE_##np##M_INDEX }
95 EXPORT_SYMBOL(iwl_debug_level
);
97 static irqreturn_t
iwl_isr(int irq
, void *data
);
101 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
103 * If there isn't a valid next or previous rate then INV is used which
104 * maps to IWL_RATE_INVALID
107 const struct iwl_rate_info iwl_rates
[IWL_RATE_COUNT
] = {
108 IWL_DECLARE_RATE_INFO(1, INV
, INV
, 2, INV
, 2, INV
, 2), /* 1mbps */
109 IWL_DECLARE_RATE_INFO(2, INV
, 1, 5, 1, 5, 1, 5), /* 2mbps */
110 IWL_DECLARE_RATE_INFO(5, INV
, 2, 6, 2, 11, 2, 11), /*5.5mbps */
111 IWL_DECLARE_RATE_INFO(11, INV
, 9, 12, 9, 12, 5, 18), /* 11mbps */
112 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
113 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
114 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
115 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
116 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
117 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
118 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
119 IWL_DECLARE_RATE_INFO(54, 54, 48, INV
, 48, INV
, 48, INV
),/* 54mbps */
120 IWL_DECLARE_RATE_INFO(60, 60, 48, INV
, 48, INV
, 48, INV
),/* 60mbps */
121 /* FIXME:RS: ^^ should be INV (legacy) */
123 EXPORT_SYMBOL(iwl_rates
);
126 * translate ucode response to mac80211 tx status control values
128 void iwl_hwrate_to_tx_control(struct iwl_priv
*priv
, u32 rate_n_flags
,
129 struct ieee80211_tx_info
*info
)
131 struct ieee80211_tx_rate
*r
= &info
->control
.rates
[0];
133 info
->antenna_sel_tx
=
134 ((rate_n_flags
& RATE_MCS_ANT_ABC_MSK
) >> RATE_MCS_ANT_POS
);
135 if (rate_n_flags
& RATE_MCS_HT_MSK
)
136 r
->flags
|= IEEE80211_TX_RC_MCS
;
137 if (rate_n_flags
& RATE_MCS_GF_MSK
)
138 r
->flags
|= IEEE80211_TX_RC_GREEN_FIELD
;
139 if (rate_n_flags
& RATE_MCS_HT40_MSK
)
140 r
->flags
|= IEEE80211_TX_RC_40_MHZ_WIDTH
;
141 if (rate_n_flags
& RATE_MCS_DUP_MSK
)
142 r
->flags
|= IEEE80211_TX_RC_DUP_DATA
;
143 if (rate_n_flags
& RATE_MCS_SGI_MSK
)
144 r
->flags
|= IEEE80211_TX_RC_SHORT_GI
;
145 r
->idx
= iwl_hwrate_to_mac80211_idx(rate_n_flags
, info
->band
);
147 EXPORT_SYMBOL(iwl_hwrate_to_tx_control
);
149 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags
)
154 if (rate_n_flags
& RATE_MCS_HT_MSK
) {
155 idx
= (rate_n_flags
& 0xff);
157 if (idx
>= IWL_RATE_MIMO3_6M_PLCP
)
158 idx
= idx
- IWL_RATE_MIMO3_6M_PLCP
;
159 else if (idx
>= IWL_RATE_MIMO2_6M_PLCP
)
160 idx
= idx
- IWL_RATE_MIMO2_6M_PLCP
;
162 idx
+= IWL_FIRST_OFDM_RATE
;
163 /* skip 9M not supported in ht*/
164 if (idx
>= IWL_RATE_9M_INDEX
)
166 if ((idx
>= IWL_FIRST_OFDM_RATE
) && (idx
<= IWL_LAST_OFDM_RATE
))
169 /* legacy rate format, search for match in table */
171 for (idx
= 0; idx
< ARRAY_SIZE(iwl_rates
); idx
++)
172 if (iwl_rates
[idx
].plcp
== (rate_n_flags
& 0xFF))
178 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx
);
180 int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags
, enum ieee80211_band band
)
185 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
186 if (rate_n_flags
& RATE_MCS_HT_MSK
) {
187 idx
= (rate_n_flags
& 0xff);
189 /* Legacy rate format, search for match in table */
191 if (band
== IEEE80211_BAND_5GHZ
)
192 band_offset
= IWL_FIRST_OFDM_RATE
;
193 for (idx
= band_offset
; idx
< IWL_RATE_COUNT_LEGACY
; idx
++)
194 if (iwl_rates
[idx
].plcp
== (rate_n_flags
& 0xFF))
195 return idx
- band_offset
;
201 u8
iwl_toggle_tx_ant(struct iwl_priv
*priv
, u8 ant
)
205 for (i
= 0; i
< RATE_ANT_NUM
- 1; i
++) {
206 ind
= (ind
+ 1) < RATE_ANT_NUM
? ind
+ 1 : 0;
207 if (priv
->hw_params
.valid_tx_ant
& BIT(ind
))
212 EXPORT_SYMBOL(iwl_toggle_tx_ant
);
214 const u8 iwl_bcast_addr
[ETH_ALEN
] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
215 EXPORT_SYMBOL(iwl_bcast_addr
);
218 /* This function both allocates and initializes hw and priv. */
219 struct ieee80211_hw
*iwl_alloc_all(struct iwl_cfg
*cfg
,
220 struct ieee80211_ops
*hw_ops
)
222 struct iwl_priv
*priv
;
224 /* mac80211 allocates memory for this device instance, including
225 * space for this driver's private structure */
226 struct ieee80211_hw
*hw
=
227 ieee80211_alloc_hw(sizeof(struct iwl_priv
), hw_ops
);
229 printk(KERN_ERR
"%s: Can not allocate network device\n",
240 EXPORT_SYMBOL(iwl_alloc_all
);
242 void iwl_hw_detect(struct iwl_priv
*priv
)
244 priv
->hw_rev
= _iwl_read32(priv
, CSR_HW_REV
);
245 priv
->hw_wa_rev
= _iwl_read32(priv
, CSR_HW_REV_WA_REG
);
246 pci_read_config_byte(priv
->pci_dev
, PCI_REVISION_ID
, &priv
->rev_id
);
248 EXPORT_SYMBOL(iwl_hw_detect
);
250 int iwl_hw_nic_init(struct iwl_priv
*priv
)
253 struct iwl_rx_queue
*rxq
= &priv
->rxq
;
257 spin_lock_irqsave(&priv
->lock
, flags
);
258 priv
->cfg
->ops
->lib
->apm_ops
.init(priv
);
260 /* Set interrupt coalescing calibration timer to default (512 usecs) */
261 iwl_write8(priv
, CSR_INT_COALESCING
, IWL_HOST_INT_CALIB_TIMEOUT_DEF
);
263 spin_unlock_irqrestore(&priv
->lock
, flags
);
265 ret
= priv
->cfg
->ops
->lib
->apm_ops
.set_pwr_src(priv
, IWL_PWR_SRC_VMAIN
);
267 priv
->cfg
->ops
->lib
->apm_ops
.config(priv
);
269 /* Allocate the RX queue, or reset if it is already allocated */
271 ret
= iwl_rx_queue_alloc(priv
);
273 IWL_ERR(priv
, "Unable to initialize Rx queue\n");
277 iwl_rx_queue_reset(priv
, rxq
);
279 iwl_rx_replenish(priv
);
281 iwl_rx_init(priv
, rxq
);
283 spin_lock_irqsave(&priv
->lock
, flags
);
285 rxq
->need_update
= 1;
286 iwl_rx_queue_update_write_ptr(priv
, rxq
);
288 spin_unlock_irqrestore(&priv
->lock
, flags
);
290 /* Allocate and init all Tx and Command queues */
291 ret
= iwl_txq_ctx_reset(priv
);
295 set_bit(STATUS_INIT
, &priv
->status
);
299 EXPORT_SYMBOL(iwl_hw_nic_init
);
304 void iwl_activate_qos(struct iwl_priv
*priv
, u8 force
)
306 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
309 priv
->qos_data
.def_qos_parm
.qos_flags
= 0;
311 if (priv
->qos_data
.qos_cap
.q_AP
.queue_request
&&
312 !priv
->qos_data
.qos_cap
.q_AP
.txop_request
)
313 priv
->qos_data
.def_qos_parm
.qos_flags
|=
314 QOS_PARAM_FLG_TXOP_TYPE_MSK
;
315 if (priv
->qos_data
.qos_active
)
316 priv
->qos_data
.def_qos_parm
.qos_flags
|=
317 QOS_PARAM_FLG_UPDATE_EDCA_MSK
;
319 if (priv
->current_ht_config
.is_ht
)
320 priv
->qos_data
.def_qos_parm
.qos_flags
|= QOS_PARAM_FLG_TGN_MSK
;
322 if (force
|| iwl_is_associated(priv
)) {
323 IWL_DEBUG_QOS(priv
, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
324 priv
->qos_data
.qos_active
,
325 priv
->qos_data
.def_qos_parm
.qos_flags
);
327 iwl_send_cmd_pdu_async(priv
, REPLY_QOS_PARAM
,
328 sizeof(struct iwl_qosparam_cmd
),
329 &priv
->qos_data
.def_qos_parm
, NULL
);
332 EXPORT_SYMBOL(iwl_activate_qos
);
335 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
336 * (802.11b) (802.11a/g)
337 * AC_BK 15 1023 7 0 0
338 * AC_BE 15 1023 3 0 0
339 * AC_VI 7 15 2 6.016ms 3.008ms
340 * AC_VO 3 7 2 3.264ms 1.504ms
342 void iwl_reset_qos(struct iwl_priv
*priv
)
347 bool is_legacy
= false;
351 spin_lock_irqsave(&priv
->lock
, flags
);
352 /* QoS always active in AP and ADHOC mode
353 * In STA mode wait for association
355 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
||
356 priv
->iw_mode
== NL80211_IFTYPE_AP
)
357 priv
->qos_data
.qos_active
= 1;
359 priv
->qos_data
.qos_active
= 0;
361 /* check for legacy mode */
362 if ((priv
->iw_mode
== NL80211_IFTYPE_ADHOC
&&
363 (priv
->active_rate
& IWL_OFDM_RATES_MASK
) == 0) ||
364 (priv
->iw_mode
== NL80211_IFTYPE_STATION
&&
365 (priv
->staging_rxon
.flags
& RXON_FLG_SHORT_SLOT_MSK
) == 0)) {
370 if (priv
->qos_data
.qos_active
)
374 priv
->qos_data
.def_qos_parm
.ac
[0].cw_min
= cpu_to_le16(cw_min
);
375 priv
->qos_data
.def_qos_parm
.ac
[0].cw_max
= cpu_to_le16(cw_max
);
376 priv
->qos_data
.def_qos_parm
.ac
[0].aifsn
= aifs
;
377 priv
->qos_data
.def_qos_parm
.ac
[0].edca_txop
= 0;
378 priv
->qos_data
.def_qos_parm
.ac
[0].reserved1
= 0;
380 if (priv
->qos_data
.qos_active
) {
383 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
= cpu_to_le16(cw_min
);
384 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
= cpu_to_le16(cw_max
);
385 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= 7;
386 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
= 0;
387 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
391 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
=
392 cpu_to_le16((cw_min
+ 1) / 2 - 1);
393 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
=
395 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= 2;
397 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
400 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
402 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
406 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
=
407 cpu_to_le16((cw_min
+ 1) / 4 - 1);
408 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
=
409 cpu_to_le16((cw_min
+ 1) / 2 - 1);
410 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= 2;
411 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
413 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
416 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
419 for (i
= 1; i
< 4; i
++) {
420 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
=
422 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
=
424 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= aifs
;
425 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
= 0;
426 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
429 IWL_DEBUG_QOS(priv
, "set QoS to default \n");
431 spin_unlock_irqrestore(&priv
->lock
, flags
);
433 EXPORT_SYMBOL(iwl_reset_qos
);
435 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
436 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
437 static void iwlcore_init_ht_hw_capab(const struct iwl_priv
*priv
,
438 struct ieee80211_sta_ht_cap
*ht_info
,
439 enum ieee80211_band band
)
441 u16 max_bit_rate
= 0;
442 u8 rx_chains_num
= priv
->hw_params
.rx_chains_num
;
443 u8 tx_chains_num
= priv
->hw_params
.tx_chains_num
;
446 memset(&ht_info
->mcs
, 0, sizeof(ht_info
->mcs
));
448 ht_info
->ht_supported
= true;
450 if (priv
->cfg
->ht_greenfield_support
)
451 ht_info
->cap
|= IEEE80211_HT_CAP_GRN_FLD
;
452 ht_info
->cap
|= IEEE80211_HT_CAP_SGI_20
;
453 max_bit_rate
= MAX_BIT_RATE_20_MHZ
;
454 if (priv
->hw_params
.ht40_channel
& BIT(band
)) {
455 ht_info
->cap
|= IEEE80211_HT_CAP_SUP_WIDTH_20_40
;
456 ht_info
->cap
|= IEEE80211_HT_CAP_SGI_40
;
457 ht_info
->mcs
.rx_mask
[4] = 0x01;
458 max_bit_rate
= MAX_BIT_RATE_40_MHZ
;
461 if (priv
->cfg
->mod_params
->amsdu_size_8K
)
462 ht_info
->cap
|= IEEE80211_HT_CAP_MAX_AMSDU
;
464 ht_info
->ampdu_factor
= CFG_HT_RX_AMPDU_FACTOR_DEF
;
465 ht_info
->ampdu_density
= CFG_HT_MPDU_DENSITY_DEF
;
467 ht_info
->mcs
.rx_mask
[0] = 0xFF;
468 if (rx_chains_num
>= 2)
469 ht_info
->mcs
.rx_mask
[1] = 0xFF;
470 if (rx_chains_num
>= 3)
471 ht_info
->mcs
.rx_mask
[2] = 0xFF;
473 /* Highest supported Rx data rate */
474 max_bit_rate
*= rx_chains_num
;
475 WARN_ON(max_bit_rate
& ~IEEE80211_HT_MCS_RX_HIGHEST_MASK
);
476 ht_info
->mcs
.rx_highest
= cpu_to_le16(max_bit_rate
);
478 /* Tx MCS capabilities */
479 ht_info
->mcs
.tx_params
= IEEE80211_HT_MCS_TX_DEFINED
;
480 if (tx_chains_num
!= rx_chains_num
) {
481 ht_info
->mcs
.tx_params
|= IEEE80211_HT_MCS_TX_RX_DIFF
;
482 ht_info
->mcs
.tx_params
|= ((tx_chains_num
- 1) <<
483 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT
);
488 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
490 int iwlcore_init_geos(struct iwl_priv
*priv
)
492 struct iwl_channel_info
*ch
;
493 struct ieee80211_supported_band
*sband
;
494 struct ieee80211_channel
*channels
;
495 struct ieee80211_channel
*geo_ch
;
496 struct ieee80211_rate
*rates
;
499 if (priv
->bands
[IEEE80211_BAND_2GHZ
].n_bitrates
||
500 priv
->bands
[IEEE80211_BAND_5GHZ
].n_bitrates
) {
501 IWL_DEBUG_INFO(priv
, "Geography modes already initialized.\n");
502 set_bit(STATUS_GEO_CONFIGURED
, &priv
->status
);
506 channels
= kzalloc(sizeof(struct ieee80211_channel
) *
507 priv
->channel_count
, GFP_KERNEL
);
511 rates
= kzalloc((sizeof(struct ieee80211_rate
) * IWL_RATE_COUNT_LEGACY
),
518 /* 5.2GHz channels start after the 2.4GHz channels */
519 sband
= &priv
->bands
[IEEE80211_BAND_5GHZ
];
520 sband
->channels
= &channels
[ARRAY_SIZE(iwl_eeprom_band_1
)];
522 sband
->bitrates
= &rates
[IWL_FIRST_OFDM_RATE
];
523 sband
->n_bitrates
= IWL_RATE_COUNT_LEGACY
- IWL_FIRST_OFDM_RATE
;
525 if (priv
->cfg
->sku
& IWL_SKU_N
)
526 iwlcore_init_ht_hw_capab(priv
, &sband
->ht_cap
,
527 IEEE80211_BAND_5GHZ
);
529 sband
= &priv
->bands
[IEEE80211_BAND_2GHZ
];
530 sband
->channels
= channels
;
532 sband
->bitrates
= rates
;
533 sband
->n_bitrates
= IWL_RATE_COUNT_LEGACY
;
535 if (priv
->cfg
->sku
& IWL_SKU_N
)
536 iwlcore_init_ht_hw_capab(priv
, &sband
->ht_cap
,
537 IEEE80211_BAND_2GHZ
);
539 priv
->ieee_channels
= channels
;
540 priv
->ieee_rates
= rates
;
542 for (i
= 0; i
< priv
->channel_count
; i
++) {
543 ch
= &priv
->channel_info
[i
];
545 /* FIXME: might be removed if scan is OK */
546 if (!is_channel_valid(ch
))
549 if (is_channel_a_band(ch
))
550 sband
= &priv
->bands
[IEEE80211_BAND_5GHZ
];
552 sband
= &priv
->bands
[IEEE80211_BAND_2GHZ
];
554 geo_ch
= &sband
->channels
[sband
->n_channels
++];
556 geo_ch
->center_freq
=
557 ieee80211_channel_to_frequency(ch
->channel
);
558 geo_ch
->max_power
= ch
->max_power_avg
;
559 geo_ch
->max_antenna_gain
= 0xff;
560 geo_ch
->hw_value
= ch
->channel
;
562 if (is_channel_valid(ch
)) {
563 if (!(ch
->flags
& EEPROM_CHANNEL_IBSS
))
564 geo_ch
->flags
|= IEEE80211_CHAN_NO_IBSS
;
566 if (!(ch
->flags
& EEPROM_CHANNEL_ACTIVE
))
567 geo_ch
->flags
|= IEEE80211_CHAN_PASSIVE_SCAN
;
569 if (ch
->flags
& EEPROM_CHANNEL_RADAR
)
570 geo_ch
->flags
|= IEEE80211_CHAN_RADAR
;
572 geo_ch
->flags
|= ch
->ht40_extension_channel
;
574 if (ch
->max_power_avg
> priv
->tx_power_device_lmt
)
575 priv
->tx_power_device_lmt
= ch
->max_power_avg
;
577 geo_ch
->flags
|= IEEE80211_CHAN_DISABLED
;
580 IWL_DEBUG_INFO(priv
, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
581 ch
->channel
, geo_ch
->center_freq
,
582 is_channel_a_band(ch
) ? "5.2" : "2.4",
583 geo_ch
->flags
& IEEE80211_CHAN_DISABLED
?
584 "restricted" : "valid",
588 if ((priv
->bands
[IEEE80211_BAND_5GHZ
].n_channels
== 0) &&
589 priv
->cfg
->sku
& IWL_SKU_A
) {
590 IWL_INFO(priv
, "Incorrectly detected BG card as ABG. "
591 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
592 priv
->pci_dev
->device
,
593 priv
->pci_dev
->subsystem_device
);
594 priv
->cfg
->sku
&= ~IWL_SKU_A
;
597 IWL_INFO(priv
, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
598 priv
->bands
[IEEE80211_BAND_2GHZ
].n_channels
,
599 priv
->bands
[IEEE80211_BAND_5GHZ
].n_channels
);
601 set_bit(STATUS_GEO_CONFIGURED
, &priv
->status
);
605 EXPORT_SYMBOL(iwlcore_init_geos
);
608 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
610 void iwlcore_free_geos(struct iwl_priv
*priv
)
612 kfree(priv
->ieee_channels
);
613 kfree(priv
->ieee_rates
);
614 clear_bit(STATUS_GEO_CONFIGURED
, &priv
->status
);
616 EXPORT_SYMBOL(iwlcore_free_geos
);
619 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
622 void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info
*info
,
625 if (info
->control
.rates
[0].flags
& IEEE80211_TX_RC_USE_RTS_CTS
) {
626 *tx_flags
|= TX_CMD_FLG_RTS_MSK
;
627 *tx_flags
&= ~TX_CMD_FLG_CTS_MSK
;
628 } else if (info
->control
.rates
[0].flags
& IEEE80211_TX_RC_USE_CTS_PROTECT
) {
629 *tx_flags
&= ~TX_CMD_FLG_RTS_MSK
;
630 *tx_flags
|= TX_CMD_FLG_CTS_MSK
;
633 EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag
);
635 static bool is_single_rx_stream(struct iwl_priv
*priv
)
637 return priv
->current_ht_config
.smps
== IEEE80211_SMPS_STATIC
||
638 priv
->current_ht_config
.single_chain_sufficient
;
641 static u8
iwl_is_channel_extension(struct iwl_priv
*priv
,
642 enum ieee80211_band band
,
643 u16 channel
, u8 extension_chan_offset
)
645 const struct iwl_channel_info
*ch_info
;
647 ch_info
= iwl_get_channel_info(priv
, band
, channel
);
648 if (!is_channel_valid(ch_info
))
651 if (extension_chan_offset
== IEEE80211_HT_PARAM_CHA_SEC_ABOVE
)
652 return !(ch_info
->ht40_extension_channel
&
653 IEEE80211_CHAN_NO_HT40PLUS
);
654 else if (extension_chan_offset
== IEEE80211_HT_PARAM_CHA_SEC_BELOW
)
655 return !(ch_info
->ht40_extension_channel
&
656 IEEE80211_CHAN_NO_HT40MINUS
);
661 u8
iwl_is_ht40_tx_allowed(struct iwl_priv
*priv
,
662 struct ieee80211_sta_ht_cap
*sta_ht_inf
)
664 struct iwl_ht_config
*ht_conf
= &priv
->current_ht_config
;
666 if (!ht_conf
->is_ht
|| !ht_conf
->is_40mhz
)
669 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
670 * the bit will not set if it is pure 40MHz case
673 if (!sta_ht_inf
->ht_supported
)
676 #ifdef CONFIG_IWLWIFI_DEBUG
677 if (priv
->disable_ht40
)
680 return iwl_is_channel_extension(priv
, priv
->band
,
681 le16_to_cpu(priv
->staging_rxon
.channel
),
682 ht_conf
->extension_chan_offset
);
684 EXPORT_SYMBOL(iwl_is_ht40_tx_allowed
);
686 static u16
iwl_adjust_beacon_interval(u16 beacon_val
, u16 max_beacon_val
)
689 u16 beacon_factor
= 0;
691 beacon_factor
= (beacon_val
+ max_beacon_val
) / max_beacon_val
;
692 new_val
= beacon_val
/ beacon_factor
;
695 new_val
= max_beacon_val
;
700 void iwl_setup_rxon_timing(struct iwl_priv
*priv
)
703 s32 interval_tm
, rem
;
705 struct ieee80211_conf
*conf
= NULL
;
708 conf
= ieee80211_get_hw_conf(priv
->hw
);
710 spin_lock_irqsave(&priv
->lock
, flags
);
711 priv
->rxon_timing
.timestamp
= cpu_to_le64(priv
->timestamp
);
712 priv
->rxon_timing
.listen_interval
= cpu_to_le16(conf
->listen_interval
);
714 if (priv
->iw_mode
== NL80211_IFTYPE_STATION
) {
715 beacon_int
= priv
->beacon_int
;
716 priv
->rxon_timing
.atim_window
= 0;
718 beacon_int
= priv
->vif
->bss_conf
.beacon_int
;
720 /* TODO: we need to get atim_window from upper stack
721 * for now we set to 0 */
722 priv
->rxon_timing
.atim_window
= 0;
725 beacon_int
= iwl_adjust_beacon_interval(beacon_int
,
726 priv
->hw_params
.max_beacon_itrvl
* 1024);
727 priv
->rxon_timing
.beacon_interval
= cpu_to_le16(beacon_int
);
729 tsf
= priv
->timestamp
; /* tsf is modifed by do_div: copy it */
730 interval_tm
= beacon_int
* 1024;
731 rem
= do_div(tsf
, interval_tm
);
732 priv
->rxon_timing
.beacon_init_val
= cpu_to_le32(interval_tm
- rem
);
734 spin_unlock_irqrestore(&priv
->lock
, flags
);
735 IWL_DEBUG_ASSOC(priv
,
736 "beacon interval %d beacon timer %d beacon tim %d\n",
737 le16_to_cpu(priv
->rxon_timing
.beacon_interval
),
738 le32_to_cpu(priv
->rxon_timing
.beacon_init_val
),
739 le16_to_cpu(priv
->rxon_timing
.atim_window
));
741 EXPORT_SYMBOL(iwl_setup_rxon_timing
);
743 void iwl_set_rxon_hwcrypto(struct iwl_priv
*priv
, int hw_decrypt
)
745 struct iwl_rxon_cmd
*rxon
= &priv
->staging_rxon
;
748 rxon
->filter_flags
&= ~RXON_FILTER_DIS_DECRYPT_MSK
;
750 rxon
->filter_flags
|= RXON_FILTER_DIS_DECRYPT_MSK
;
753 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto
);
756 * iwl_check_rxon_cmd - validate RXON structure is valid
758 * NOTE: This is really only useful during development and can eventually
759 * be #ifdef'd out once the driver is stable and folks aren't actively
762 int iwl_check_rxon_cmd(struct iwl_priv
*priv
)
766 struct iwl_rxon_cmd
*rxon
= &priv
->staging_rxon
;
768 if (rxon
->flags
& RXON_FLG_BAND_24G_MSK
) {
769 error
|= le32_to_cpu(rxon
->flags
&
770 (RXON_FLG_TGJ_NARROW_BAND_MSK
|
771 RXON_FLG_RADAR_DETECT_MSK
));
773 IWL_WARN(priv
, "check 24G fields %d | %d\n",
776 error
|= (rxon
->flags
& RXON_FLG_SHORT_SLOT_MSK
) ?
777 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK
);
779 IWL_WARN(priv
, "check 52 fields %d | %d\n",
781 error
|= le32_to_cpu(rxon
->flags
& RXON_FLG_CCK_MSK
);
783 IWL_WARN(priv
, "check 52 CCK %d | %d\n",
786 error
|= (rxon
->node_addr
[0] | rxon
->bssid_addr
[0]) & 0x1;
788 IWL_WARN(priv
, "check mac addr %d | %d\n", counter
++, error
);
790 /* make sure basic rates 6Mbps and 1Mbps are supported */
791 error
|= (((rxon
->ofdm_basic_rates
& IWL_RATE_6M_MASK
) == 0) &&
792 ((rxon
->cck_basic_rates
& IWL_RATE_1M_MASK
) == 0));
794 IWL_WARN(priv
, "check basic rate %d | %d\n", counter
++, error
);
796 error
|= (le16_to_cpu(rxon
->assoc_id
) > 2007);
798 IWL_WARN(priv
, "check assoc id %d | %d\n", counter
++, error
);
800 error
|= ((rxon
->flags
& (RXON_FLG_CCK_MSK
| RXON_FLG_SHORT_SLOT_MSK
))
801 == (RXON_FLG_CCK_MSK
| RXON_FLG_SHORT_SLOT_MSK
));
803 IWL_WARN(priv
, "check CCK and short slot %d | %d\n",
806 error
|= ((rxon
->flags
& (RXON_FLG_CCK_MSK
| RXON_FLG_AUTO_DETECT_MSK
))
807 == (RXON_FLG_CCK_MSK
| RXON_FLG_AUTO_DETECT_MSK
));
809 IWL_WARN(priv
, "check CCK & auto detect %d | %d\n",
812 error
|= ((rxon
->flags
& (RXON_FLG_AUTO_DETECT_MSK
|
813 RXON_FLG_TGG_PROTECT_MSK
)) == RXON_FLG_TGG_PROTECT_MSK
);
815 IWL_WARN(priv
, "check TGG and auto detect %d | %d\n",
819 IWL_WARN(priv
, "Tuning to channel %d\n",
820 le16_to_cpu(rxon
->channel
));
823 IWL_ERR(priv
, "Not a valid iwl_rxon_assoc_cmd field values\n");
828 EXPORT_SYMBOL(iwl_check_rxon_cmd
);
831 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
832 * @priv: staging_rxon is compared to active_rxon
834 * If the RXON structure is changing enough to require a new tune,
835 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
836 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
838 int iwl_full_rxon_required(struct iwl_priv
*priv
)
841 /* These items are only settable from the full RXON command */
842 if (!(iwl_is_associated(priv
)) ||
843 compare_ether_addr(priv
->staging_rxon
.bssid_addr
,
844 priv
->active_rxon
.bssid_addr
) ||
845 compare_ether_addr(priv
->staging_rxon
.node_addr
,
846 priv
->active_rxon
.node_addr
) ||
847 compare_ether_addr(priv
->staging_rxon
.wlap_bssid_addr
,
848 priv
->active_rxon
.wlap_bssid_addr
) ||
849 (priv
->staging_rxon
.dev_type
!= priv
->active_rxon
.dev_type
) ||
850 (priv
->staging_rxon
.channel
!= priv
->active_rxon
.channel
) ||
851 (priv
->staging_rxon
.air_propagation
!=
852 priv
->active_rxon
.air_propagation
) ||
853 (priv
->staging_rxon
.ofdm_ht_single_stream_basic_rates
!=
854 priv
->active_rxon
.ofdm_ht_single_stream_basic_rates
) ||
855 (priv
->staging_rxon
.ofdm_ht_dual_stream_basic_rates
!=
856 priv
->active_rxon
.ofdm_ht_dual_stream_basic_rates
) ||
857 (priv
->staging_rxon
.ofdm_ht_triple_stream_basic_rates
!=
858 priv
->active_rxon
.ofdm_ht_triple_stream_basic_rates
) ||
859 (priv
->staging_rxon
.assoc_id
!= priv
->active_rxon
.assoc_id
))
862 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
863 * be updated with the RXON_ASSOC command -- however only some
864 * flag transitions are allowed using RXON_ASSOC */
866 /* Check if we are not switching bands */
867 if ((priv
->staging_rxon
.flags
& RXON_FLG_BAND_24G_MSK
) !=
868 (priv
->active_rxon
.flags
& RXON_FLG_BAND_24G_MSK
))
871 /* Check if we are switching association toggle */
872 if ((priv
->staging_rxon
.filter_flags
& RXON_FILTER_ASSOC_MSK
) !=
873 (priv
->active_rxon
.filter_flags
& RXON_FILTER_ASSOC_MSK
))
878 EXPORT_SYMBOL(iwl_full_rxon_required
);
880 u8
iwl_rate_get_lowest_plcp(struct iwl_priv
*priv
)
886 if (priv
->staging_rxon
.flags
& RXON_FLG_BAND_24G_MSK
)
887 rate_mask
= priv
->active_rate_basic
& IWL_CCK_RATES_MASK
;
889 rate_mask
= priv
->active_rate_basic
& IWL_OFDM_RATES_MASK
;
891 /* Find lowest valid rate */
892 for (i
= IWL_RATE_1M_INDEX
; i
!= IWL_RATE_INVALID
;
893 i
= iwl_rates
[i
].next_ieee
) {
894 if (rate_mask
& (1 << i
))
895 return iwl_rates
[i
].plcp
;
898 /* No valid rate was found. Assign the lowest one */
899 if (priv
->staging_rxon
.flags
& RXON_FLG_BAND_24G_MSK
)
900 return IWL_RATE_1M_PLCP
;
902 return IWL_RATE_6M_PLCP
;
904 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp
);
906 void iwl_set_rxon_ht(struct iwl_priv
*priv
, struct iwl_ht_config
*ht_conf
)
908 struct iwl_rxon_cmd
*rxon
= &priv
->staging_rxon
;
910 if (!ht_conf
->is_ht
) {
911 rxon
->flags
&= ~(RXON_FLG_CHANNEL_MODE_MSK
|
912 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
|
913 RXON_FLG_HT40_PROT_MSK
|
914 RXON_FLG_HT_PROT_MSK
);
918 /* FIXME: if the definition of ht_protection changed, the "translation"
919 * will be needed for rxon->flags
921 rxon
->flags
|= cpu_to_le32(ht_conf
->ht_protection
<< RXON_FLG_HT_OPERATING_MODE_POS
);
923 /* Set up channel bandwidth:
924 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
925 /* clear the HT channel mode before set the mode */
926 rxon
->flags
&= ~(RXON_FLG_CHANNEL_MODE_MSK
|
927 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
);
928 if (iwl_is_ht40_tx_allowed(priv
, NULL
)) {
930 if (ht_conf
->ht_protection
== IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
) {
931 rxon
->flags
|= RXON_FLG_CHANNEL_MODE_PURE_40
;
932 /* Note: control channel is opposite of extension channel */
933 switch (ht_conf
->extension_chan_offset
) {
934 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE
:
935 rxon
->flags
&= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
;
937 case IEEE80211_HT_PARAM_CHA_SEC_BELOW
:
938 rxon
->flags
|= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
;
942 /* Note: control channel is opposite of extension channel */
943 switch (ht_conf
->extension_chan_offset
) {
944 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE
:
945 rxon
->flags
&= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
);
946 rxon
->flags
|= RXON_FLG_CHANNEL_MODE_MIXED
;
948 case IEEE80211_HT_PARAM_CHA_SEC_BELOW
:
949 rxon
->flags
|= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
;
950 rxon
->flags
|= RXON_FLG_CHANNEL_MODE_MIXED
;
952 case IEEE80211_HT_PARAM_CHA_SEC_NONE
:
954 /* channel location only valid if in Mixed mode */
955 IWL_ERR(priv
, "invalid extension channel offset\n");
960 rxon
->flags
|= RXON_FLG_CHANNEL_MODE_LEGACY
;
963 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
964 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
);
966 IWL_DEBUG_ASSOC(priv
, "rxon flags 0x%X operation mode :0x%X "
967 "extension channel offset 0x%x\n",
968 le32_to_cpu(rxon
->flags
), ht_conf
->ht_protection
,
969 ht_conf
->extension_chan_offset
);
972 EXPORT_SYMBOL(iwl_set_rxon_ht
);
974 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
975 #define IWL_NUM_RX_CHAINS_SINGLE 2
976 #define IWL_NUM_IDLE_CHAINS_DUAL 2
977 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
980 * Determine how many receiver/antenna chains to use.
982 * More provides better reception via diversity. Fewer saves power
983 * at the expense of throughput, but only when not in powersave to
986 * MIMO (dual stream) requires at least 2, but works better with 3.
987 * This does not determine *which* chains to use, just how many.
989 static int iwl_get_active_rx_chain_count(struct iwl_priv
*priv
)
991 /* # of Rx chains to use when expecting MIMO. */
992 if (is_single_rx_stream(priv
))
993 return IWL_NUM_RX_CHAINS_SINGLE
;
995 return IWL_NUM_RX_CHAINS_MULTIPLE
;
999 * When we are in power saving mode, unless device support spatial
1000 * multiplexing power save, use the active count for rx chain count.
1002 static int iwl_get_idle_rx_chain_count(struct iwl_priv
*priv
, int active_cnt
)
1004 /* # Rx chains when idling, depending on SMPS mode */
1005 switch (priv
->current_ht_config
.smps
) {
1006 case IEEE80211_SMPS_STATIC
:
1007 case IEEE80211_SMPS_DYNAMIC
:
1008 return IWL_NUM_IDLE_CHAINS_SINGLE
;
1009 case IEEE80211_SMPS_OFF
:
1012 WARN(1, "invalid SMPS mode %d",
1013 priv
->current_ht_config
.smps
);
1018 /* up to 4 chains */
1019 static u8
iwl_count_chain_bitmap(u32 chain_bitmap
)
1022 res
= (chain_bitmap
& BIT(0)) >> 0;
1023 res
+= (chain_bitmap
& BIT(1)) >> 1;
1024 res
+= (chain_bitmap
& BIT(2)) >> 2;
1025 res
+= (chain_bitmap
& BIT(3)) >> 3;
1030 * iwl_is_monitor_mode - Determine if interface in monitor mode
1032 * priv->iw_mode is set in add_interface, but add_interface is
1033 * never called for monitor mode. The only way mac80211 informs us about
1034 * monitor mode is through configuring filters (call to configure_filter).
1036 bool iwl_is_monitor_mode(struct iwl_priv
*priv
)
1038 return !!(priv
->staging_rxon
.filter_flags
& RXON_FILTER_PROMISC_MSK
);
1040 EXPORT_SYMBOL(iwl_is_monitor_mode
);
1043 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1045 * Selects how many and which Rx receivers/antennas/chains to use.
1046 * This should not be used for scan command ... it puts data in wrong place.
1048 void iwl_set_rxon_chain(struct iwl_priv
*priv
)
1050 bool is_single
= is_single_rx_stream(priv
);
1051 bool is_cam
= !test_bit(STATUS_POWER_PMI
, &priv
->status
);
1052 u8 idle_rx_cnt
, active_rx_cnt
, valid_rx_cnt
;
1056 /* Tell uCode which antennas are actually connected.
1057 * Before first association, we assume all antennas are connected.
1058 * Just after first association, iwl_chain_noise_calibration()
1059 * checks which antennas actually *are* connected. */
1060 if (priv
->chain_noise_data
.active_chains
)
1061 active_chains
= priv
->chain_noise_data
.active_chains
;
1063 active_chains
= priv
->hw_params
.valid_rx_ant
;
1065 rx_chain
= active_chains
<< RXON_RX_CHAIN_VALID_POS
;
1067 /* How many receivers should we use? */
1068 active_rx_cnt
= iwl_get_active_rx_chain_count(priv
);
1069 idle_rx_cnt
= iwl_get_idle_rx_chain_count(priv
, active_rx_cnt
);
1072 /* correct rx chain count according hw settings
1073 * and chain noise calibration
1075 valid_rx_cnt
= iwl_count_chain_bitmap(active_chains
);
1076 if (valid_rx_cnt
< active_rx_cnt
)
1077 active_rx_cnt
= valid_rx_cnt
;
1079 if (valid_rx_cnt
< idle_rx_cnt
)
1080 idle_rx_cnt
= valid_rx_cnt
;
1082 rx_chain
|= active_rx_cnt
<< RXON_RX_CHAIN_MIMO_CNT_POS
;
1083 rx_chain
|= idle_rx_cnt
<< RXON_RX_CHAIN_CNT_POS
;
1085 /* copied from 'iwl_bg_request_scan()' */
1086 /* Force use of chains B and C (0x6) for Rx for 4965
1087 * Avoid A (0x1) because of its off-channel reception on A-band.
1088 * MIMO is not used here, but value is required */
1089 if (iwl_is_monitor_mode(priv
) &&
1090 !(priv
->staging_rxon
.flags
& RXON_FLG_BAND_24G_MSK
) &&
1091 ((priv
->hw_rev
& CSR_HW_REV_TYPE_MSK
) == CSR_HW_REV_TYPE_4965
)) {
1092 rx_chain
= ANT_ABC
<< RXON_RX_CHAIN_VALID_POS
;
1093 rx_chain
|= ANT_BC
<< RXON_RX_CHAIN_FORCE_SEL_POS
;
1094 rx_chain
|= ANT_ABC
<< RXON_RX_CHAIN_FORCE_MIMO_SEL_POS
;
1095 rx_chain
|= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS
;
1098 priv
->staging_rxon
.rx_chain
= cpu_to_le16(rx_chain
);
1100 if (!is_single
&& (active_rx_cnt
>= IWL_NUM_RX_CHAINS_SINGLE
) && is_cam
)
1101 priv
->staging_rxon
.rx_chain
|= RXON_RX_CHAIN_MIMO_FORCE_MSK
;
1103 priv
->staging_rxon
.rx_chain
&= ~RXON_RX_CHAIN_MIMO_FORCE_MSK
;
1105 IWL_DEBUG_ASSOC(priv
, "rx_chain=0x%X active=%d idle=%d\n",
1106 priv
->staging_rxon
.rx_chain
,
1107 active_rx_cnt
, idle_rx_cnt
);
1109 WARN_ON(active_rx_cnt
== 0 || idle_rx_cnt
== 0 ||
1110 active_rx_cnt
< idle_rx_cnt
);
1112 EXPORT_SYMBOL(iwl_set_rxon_chain
);
1115 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1116 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1117 * @channel: Any channel valid for the requested phymode
1119 * In addition to setting the staging RXON, priv->phymode is also set.
1121 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1122 * in the staging RXON flag structure based on the phymode
1124 int iwl_set_rxon_channel(struct iwl_priv
*priv
, struct ieee80211_channel
*ch
)
1126 enum ieee80211_band band
= ch
->band
;
1127 u16 channel
= ieee80211_frequency_to_channel(ch
->center_freq
);
1129 if (!iwl_get_channel_info(priv
, band
, channel
)) {
1130 IWL_DEBUG_INFO(priv
, "Could not set channel to %d [%d]\n",
1135 if ((le16_to_cpu(priv
->staging_rxon
.channel
) == channel
) &&
1136 (priv
->band
== band
))
1139 priv
->staging_rxon
.channel
= cpu_to_le16(channel
);
1140 if (band
== IEEE80211_BAND_5GHZ
)
1141 priv
->staging_rxon
.flags
&= ~RXON_FLG_BAND_24G_MSK
;
1143 priv
->staging_rxon
.flags
|= RXON_FLG_BAND_24G_MSK
;
1147 IWL_DEBUG_INFO(priv
, "Staging channel set to %d [%d]\n", channel
, band
);
1151 EXPORT_SYMBOL(iwl_set_rxon_channel
);
1153 void iwl_set_flags_for_band(struct iwl_priv
*priv
,
1154 enum ieee80211_band band
)
1156 if (band
== IEEE80211_BAND_5GHZ
) {
1157 priv
->staging_rxon
.flags
&=
1158 ~(RXON_FLG_BAND_24G_MSK
| RXON_FLG_AUTO_DETECT_MSK
1159 | RXON_FLG_CCK_MSK
);
1160 priv
->staging_rxon
.flags
|= RXON_FLG_SHORT_SLOT_MSK
;
1162 /* Copied from iwl_post_associate() */
1163 if (priv
->assoc_capability
& WLAN_CAPABILITY_SHORT_SLOT_TIME
)
1164 priv
->staging_rxon
.flags
|= RXON_FLG_SHORT_SLOT_MSK
;
1166 priv
->staging_rxon
.flags
&= ~RXON_FLG_SHORT_SLOT_MSK
;
1168 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
)
1169 priv
->staging_rxon
.flags
&= ~RXON_FLG_SHORT_SLOT_MSK
;
1171 priv
->staging_rxon
.flags
|= RXON_FLG_BAND_24G_MSK
;
1172 priv
->staging_rxon
.flags
|= RXON_FLG_AUTO_DETECT_MSK
;
1173 priv
->staging_rxon
.flags
&= ~RXON_FLG_CCK_MSK
;
1178 * initialize rxon structure with default values from eeprom
1180 void iwl_connection_init_rx_config(struct iwl_priv
*priv
, int mode
)
1182 const struct iwl_channel_info
*ch_info
;
1184 memset(&priv
->staging_rxon
, 0, sizeof(priv
->staging_rxon
));
1187 case NL80211_IFTYPE_AP
:
1188 priv
->staging_rxon
.dev_type
= RXON_DEV_TYPE_AP
;
1191 case NL80211_IFTYPE_STATION
:
1192 priv
->staging_rxon
.dev_type
= RXON_DEV_TYPE_ESS
;
1193 priv
->staging_rxon
.filter_flags
= RXON_FILTER_ACCEPT_GRP_MSK
;
1196 case NL80211_IFTYPE_ADHOC
:
1197 priv
->staging_rxon
.dev_type
= RXON_DEV_TYPE_IBSS
;
1198 priv
->staging_rxon
.flags
= RXON_FLG_SHORT_PREAMBLE_MSK
;
1199 priv
->staging_rxon
.filter_flags
= RXON_FILTER_BCON_AWARE_MSK
|
1200 RXON_FILTER_ACCEPT_GRP_MSK
;
1204 IWL_ERR(priv
, "Unsupported interface type %d\n", mode
);
1209 /* TODO: Figure out when short_preamble would be set and cache from
1211 if (!hw_to_local(priv
->hw
)->short_preamble
)
1212 priv
->staging_rxon
.flags
&= ~RXON_FLG_SHORT_PREAMBLE_MSK
;
1214 priv
->staging_rxon
.flags
|= RXON_FLG_SHORT_PREAMBLE_MSK
;
1217 ch_info
= iwl_get_channel_info(priv
, priv
->band
,
1218 le16_to_cpu(priv
->active_rxon
.channel
));
1221 ch_info
= &priv
->channel_info
[0];
1224 * in some case A channels are all non IBSS
1225 * in this case force B/G channel
1227 if ((priv
->iw_mode
== NL80211_IFTYPE_ADHOC
) &&
1228 !(is_channel_ibss(ch_info
)))
1229 ch_info
= &priv
->channel_info
[0];
1231 priv
->staging_rxon
.channel
= cpu_to_le16(ch_info
->channel
);
1232 priv
->band
= ch_info
->band
;
1234 iwl_set_flags_for_band(priv
, priv
->band
);
1236 priv
->staging_rxon
.ofdm_basic_rates
=
1237 (IWL_OFDM_RATES_MASK
>> IWL_FIRST_OFDM_RATE
) & 0xFF;
1238 priv
->staging_rxon
.cck_basic_rates
=
1239 (IWL_CCK_RATES_MASK
>> IWL_FIRST_CCK_RATE
) & 0xF;
1241 /* clear both MIX and PURE40 mode flag */
1242 priv
->staging_rxon
.flags
&= ~(RXON_FLG_CHANNEL_MODE_MIXED
|
1243 RXON_FLG_CHANNEL_MODE_PURE_40
);
1244 memcpy(priv
->staging_rxon
.node_addr
, priv
->mac_addr
, ETH_ALEN
);
1245 memcpy(priv
->staging_rxon
.wlap_bssid_addr
, priv
->mac_addr
, ETH_ALEN
);
1246 priv
->staging_rxon
.ofdm_ht_single_stream_basic_rates
= 0xff;
1247 priv
->staging_rxon
.ofdm_ht_dual_stream_basic_rates
= 0xff;
1248 priv
->staging_rxon
.ofdm_ht_triple_stream_basic_rates
= 0xff;
1250 EXPORT_SYMBOL(iwl_connection_init_rx_config
);
1252 static void iwl_set_rate(struct iwl_priv
*priv
)
1254 const struct ieee80211_supported_band
*hw
= NULL
;
1255 struct ieee80211_rate
*rate
;
1258 hw
= iwl_get_hw_mode(priv
, priv
->band
);
1260 IWL_ERR(priv
, "Failed to set rate: unable to get hw mode\n");
1264 priv
->active_rate
= 0;
1265 priv
->active_rate_basic
= 0;
1267 for (i
= 0; i
< hw
->n_bitrates
; i
++) {
1268 rate
= &(hw
->bitrates
[i
]);
1269 if (rate
->hw_value
< IWL_RATE_COUNT_LEGACY
)
1270 priv
->active_rate
|= (1 << rate
->hw_value
);
1273 IWL_DEBUG_RATE(priv
, "Set active_rate = %0x, active_rate_basic = %0x\n",
1274 priv
->active_rate
, priv
->active_rate_basic
);
1277 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1278 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1281 if (priv
->active_rate_basic
& IWL_CCK_BASIC_RATES_MASK
)
1282 priv
->staging_rxon
.cck_basic_rates
=
1283 ((priv
->active_rate_basic
&
1284 IWL_CCK_RATES_MASK
) >> IWL_FIRST_CCK_RATE
) & 0xF;
1286 priv
->staging_rxon
.cck_basic_rates
=
1287 (IWL_CCK_BASIC_RATES_MASK
>> IWL_FIRST_CCK_RATE
) & 0xF;
1289 if (priv
->active_rate_basic
& IWL_OFDM_BASIC_RATES_MASK
)
1290 priv
->staging_rxon
.ofdm_basic_rates
=
1291 ((priv
->active_rate_basic
&
1292 (IWL_OFDM_BASIC_RATES_MASK
| IWL_RATE_6M_MASK
)) >>
1293 IWL_FIRST_OFDM_RATE
) & 0xFF;
1295 priv
->staging_rxon
.ofdm_basic_rates
=
1296 (IWL_OFDM_BASIC_RATES_MASK
>> IWL_FIRST_OFDM_RATE
) & 0xFF;
1299 void iwl_rx_csa(struct iwl_priv
*priv
, struct iwl_rx_mem_buffer
*rxb
)
1301 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
1302 struct iwl_rxon_cmd
*rxon
= (void *)&priv
->active_rxon
;
1303 struct iwl_csa_notification
*csa
= &(pkt
->u
.csa_notif
);
1305 if (priv
->switch_rxon
.switch_in_progress
) {
1306 if (!le32_to_cpu(csa
->status
) &&
1307 (csa
->channel
== priv
->switch_rxon
.channel
)) {
1308 rxon
->channel
= csa
->channel
;
1309 priv
->staging_rxon
.channel
= csa
->channel
;
1310 IWL_DEBUG_11H(priv
, "CSA notif: channel %d\n",
1311 le16_to_cpu(csa
->channel
));
1313 IWL_ERR(priv
, "CSA notif (fail) : channel %d\n",
1314 le16_to_cpu(csa
->channel
));
1316 priv
->switch_rxon
.switch_in_progress
= false;
1319 EXPORT_SYMBOL(iwl_rx_csa
);
1321 #ifdef CONFIG_IWLWIFI_DEBUG
1322 void iwl_print_rx_config_cmd(struct iwl_priv
*priv
)
1324 struct iwl_rxon_cmd
*rxon
= &priv
->staging_rxon
;
1326 IWL_DEBUG_RADIO(priv
, "RX CONFIG:\n");
1327 iwl_print_hex_dump(priv
, IWL_DL_RADIO
, (u8
*) rxon
, sizeof(*rxon
));
1328 IWL_DEBUG_RADIO(priv
, "u16 channel: 0x%x\n", le16_to_cpu(rxon
->channel
));
1329 IWL_DEBUG_RADIO(priv
, "u32 flags: 0x%08X\n", le32_to_cpu(rxon
->flags
));
1330 IWL_DEBUG_RADIO(priv
, "u32 filter_flags: 0x%08x\n",
1331 le32_to_cpu(rxon
->filter_flags
));
1332 IWL_DEBUG_RADIO(priv
, "u8 dev_type: 0x%x\n", rxon
->dev_type
);
1333 IWL_DEBUG_RADIO(priv
, "u8 ofdm_basic_rates: 0x%02x\n",
1334 rxon
->ofdm_basic_rates
);
1335 IWL_DEBUG_RADIO(priv
, "u8 cck_basic_rates: 0x%02x\n", rxon
->cck_basic_rates
);
1336 IWL_DEBUG_RADIO(priv
, "u8[6] node_addr: %pM\n", rxon
->node_addr
);
1337 IWL_DEBUG_RADIO(priv
, "u8[6] bssid_addr: %pM\n", rxon
->bssid_addr
);
1338 IWL_DEBUG_RADIO(priv
, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon
->assoc_id
));
1340 EXPORT_SYMBOL(iwl_print_rx_config_cmd
);
1343 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1345 void iwl_irq_handle_error(struct iwl_priv
*priv
)
1347 /* Set the FW error flag -- cleared on iwl_down */
1348 set_bit(STATUS_FW_ERROR
, &priv
->status
);
1350 /* Cancel currently queued command. */
1351 clear_bit(STATUS_HCMD_ACTIVE
, &priv
->status
);
1353 priv
->cfg
->ops
->lib
->dump_nic_error_log(priv
);
1354 if (priv
->cfg
->ops
->lib
->dump_csr
)
1355 priv
->cfg
->ops
->lib
->dump_csr(priv
);
1356 if (priv
->cfg
->ops
->lib
->dump_fh
)
1357 priv
->cfg
->ops
->lib
->dump_fh(priv
, NULL
, false);
1358 priv
->cfg
->ops
->lib
->dump_nic_event_log(priv
, false, NULL
, false);
1359 #ifdef CONFIG_IWLWIFI_DEBUG
1360 if (iwl_get_debug_level(priv
) & IWL_DL_FW_ERRORS
)
1361 iwl_print_rx_config_cmd(priv
);
1364 wake_up_interruptible(&priv
->wait_command_queue
);
1366 /* Keep the restart process from trying to send host
1367 * commands by clearing the INIT status bit */
1368 clear_bit(STATUS_READY
, &priv
->status
);
1370 if (!test_bit(STATUS_EXIT_PENDING
, &priv
->status
)) {
1371 IWL_DEBUG(priv
, IWL_DL_FW_ERRORS
,
1372 "Restarting adapter due to uCode error.\n");
1374 if (priv
->cfg
->mod_params
->restart_fw
)
1375 queue_work(priv
->workqueue
, &priv
->restart
);
1378 EXPORT_SYMBOL(iwl_irq_handle_error
);
1380 int iwl_apm_stop_master(struct iwl_priv
*priv
)
1384 /* stop device's busmaster DMA activity */
1385 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_STOP_MASTER
);
1387 ret
= iwl_poll_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_MASTER_DISABLED
,
1388 CSR_RESET_REG_FLAG_MASTER_DISABLED
, 100);
1390 IWL_WARN(priv
, "Master Disable Timed Out, 100 usec\n");
1392 IWL_DEBUG_INFO(priv
, "stop master\n");
1396 EXPORT_SYMBOL(iwl_apm_stop_master
);
1398 void iwl_apm_stop(struct iwl_priv
*priv
)
1400 IWL_DEBUG_INFO(priv
, "Stop card, put in low power state\n");
1402 /* Stop device's DMA activity */
1403 iwl_apm_stop_master(priv
);
1405 /* Reset the entire device */
1406 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_SW_RESET
);
1411 * Clear "initialization complete" bit to move adapter from
1412 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1414 iwl_clear_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
1416 EXPORT_SYMBOL(iwl_apm_stop
);
1420 * Start up NIC's basic functionality after it has been reset
1421 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1422 * NOTE: This does not load uCode nor start the embedded processor
1424 int iwl_apm_init(struct iwl_priv
*priv
)
1429 IWL_DEBUG_INFO(priv
, "Init card's basic functions\n");
1432 * Use "set_bit" below rather than "write", to preserve any hardware
1433 * bits already set by default after reset.
1436 /* Disable L0S exit timer (platform NMI Work/Around) */
1437 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
1438 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER
);
1441 * Disable L0s without affecting L1;
1442 * don't wait for ICH L0s (ICH bug W/A)
1444 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
1445 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX
);
1447 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1448 iwl_set_bit(priv
, CSR_DBG_HPET_MEM_REG
, CSR_DBG_HPET_MEM_REG_VAL
);
1451 * Enable HAP INTA (interrupt from management bus) to
1452 * wake device's PCI Express link L1a -> L0s
1453 * NOTE: This is no-op for 3945 (non-existant bit)
1455 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
1456 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A
);
1459 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1460 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1461 * If so (likely), disable L0S, so device moves directly L0->L1;
1462 * costs negligible amount of power savings.
1463 * If not (unlikely), enable L0S, so there is at least some
1464 * power savings, even without L1.
1466 if (priv
->cfg
->set_l0s
) {
1467 lctl
= iwl_pcie_link_ctl(priv
);
1468 if ((lctl
& PCI_CFG_LINK_CTRL_VAL_L1_EN
) ==
1469 PCI_CFG_LINK_CTRL_VAL_L1_EN
) {
1470 /* L1-ASPM enabled; disable(!) L0S */
1471 iwl_set_bit(priv
, CSR_GIO_REG
,
1472 CSR_GIO_REG_VAL_L0S_ENABLED
);
1473 IWL_DEBUG_POWER(priv
, "L1 Enabled; Disabling L0S\n");
1475 /* L1-ASPM disabled; enable(!) L0S */
1476 iwl_clear_bit(priv
, CSR_GIO_REG
,
1477 CSR_GIO_REG_VAL_L0S_ENABLED
);
1478 IWL_DEBUG_POWER(priv
, "L1 Disabled; Enabling L0S\n");
1482 /* Configure analog phase-lock-loop before activating to D0A */
1483 if (priv
->cfg
->pll_cfg_val
)
1484 iwl_set_bit(priv
, CSR_ANA_PLL_CFG
, priv
->cfg
->pll_cfg_val
);
1487 * Set "initialization complete" bit to move adapter from
1488 * D0U* --> D0A* (powered-up active) state.
1490 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
1493 * Wait for clock stabilization; once stabilized, access to
1494 * device-internal resources is supported, e.g. iwl_write_prph()
1495 * and accesses to uCode SRAM.
1497 ret
= iwl_poll_bit(priv
, CSR_GP_CNTRL
,
1498 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
,
1499 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25000);
1501 IWL_DEBUG_INFO(priv
, "Failed to init the card\n");
1506 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1507 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1508 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1509 * and don't need BSM to restore data after power-saving sleep.
1511 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1512 * do not disable clocks. This preserves any hardware bits already
1513 * set by default in "CLK_CTRL_REG" after reset.
1515 if (priv
->cfg
->use_bsm
)
1516 iwl_write_prph(priv
, APMG_CLK_EN_REG
,
1517 APMG_CLK_VAL_DMA_CLK_RQT
| APMG_CLK_VAL_BSM_CLK_RQT
);
1519 iwl_write_prph(priv
, APMG_CLK_EN_REG
,
1520 APMG_CLK_VAL_DMA_CLK_RQT
);
1523 /* Disable L1-Active */
1524 iwl_set_bits_prph(priv
, APMG_PCIDEV_STT_REG
,
1525 APMG_PCIDEV_STT_VAL_L1_ACT_DIS
);
1530 EXPORT_SYMBOL(iwl_apm_init
);
1534 void iwl_configure_filter(struct ieee80211_hw
*hw
,
1535 unsigned int changed_flags
,
1536 unsigned int *total_flags
,
1539 struct iwl_priv
*priv
= hw
->priv
;
1540 __le32
*filter_flags
= &priv
->staging_rxon
.filter_flags
;
1542 IWL_DEBUG_MAC80211(priv
, "Enter: changed: 0x%x, total: 0x%x\n",
1543 changed_flags
, *total_flags
);
1545 if (changed_flags
& (FIF_OTHER_BSS
| FIF_PROMISC_IN_BSS
)) {
1546 if (*total_flags
& (FIF_OTHER_BSS
| FIF_PROMISC_IN_BSS
))
1547 *filter_flags
|= RXON_FILTER_PROMISC_MSK
;
1549 *filter_flags
&= ~RXON_FILTER_PROMISC_MSK
;
1551 if (changed_flags
& FIF_ALLMULTI
) {
1552 if (*total_flags
& FIF_ALLMULTI
)
1553 *filter_flags
|= RXON_FILTER_ACCEPT_GRP_MSK
;
1555 *filter_flags
&= ~RXON_FILTER_ACCEPT_GRP_MSK
;
1557 if (changed_flags
& FIF_CONTROL
) {
1558 if (*total_flags
& FIF_CONTROL
)
1559 *filter_flags
|= RXON_FILTER_CTL2HOST_MSK
;
1561 *filter_flags
&= ~RXON_FILTER_CTL2HOST_MSK
;
1563 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
1564 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
)
1565 *filter_flags
|= RXON_FILTER_BCON_AWARE_MSK
;
1567 *filter_flags
&= ~RXON_FILTER_BCON_AWARE_MSK
;
1570 /* We avoid iwl_commit_rxon here to commit the new filter flags
1571 * since mac80211 will call ieee80211_hw_config immediately.
1572 * (mc_list is not supported at this time). Otherwise, we need to
1573 * queue a background iwl_commit_rxon work.
1576 *total_flags
&= FIF_OTHER_BSS
| FIF_ALLMULTI
| FIF_PROMISC_IN_BSS
|
1577 FIF_BCN_PRBRESP_PROMISC
| FIF_CONTROL
;
1579 EXPORT_SYMBOL(iwl_configure_filter
);
1581 int iwl_set_hw_params(struct iwl_priv
*priv
)
1583 priv
->hw_params
.max_rxq_size
= RX_QUEUE_SIZE
;
1584 priv
->hw_params
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
1585 if (priv
->cfg
->mod_params
->amsdu_size_8K
)
1586 priv
->hw_params
.rx_page_order
= get_order(IWL_RX_BUF_SIZE_8K
);
1588 priv
->hw_params
.rx_page_order
= get_order(IWL_RX_BUF_SIZE_4K
);
1590 priv
->hw_params
.max_beacon_itrvl
= IWL_MAX_UCODE_BEACON_INTERVAL
;
1592 if (priv
->cfg
->mod_params
->disable_11n
)
1593 priv
->cfg
->sku
&= ~IWL_SKU_N
;
1595 /* Device-specific setup */
1596 return priv
->cfg
->ops
->lib
->set_hw_params(priv
);
1598 EXPORT_SYMBOL(iwl_set_hw_params
);
1600 int iwl_set_tx_power(struct iwl_priv
*priv
, s8 tx_power
, bool force
)
1603 s8 prev_tx_power
= priv
->tx_power_user_lmt
;
1605 if (tx_power
< IWL_TX_POWER_TARGET_POWER_MIN
) {
1606 IWL_WARN(priv
, "Requested user TXPOWER %d below lower limit %d.\n",
1608 IWL_TX_POWER_TARGET_POWER_MIN
);
1612 if (tx_power
> priv
->tx_power_device_lmt
) {
1614 "Requested user TXPOWER %d above upper limit %d.\n",
1615 tx_power
, priv
->tx_power_device_lmt
);
1619 if (priv
->tx_power_user_lmt
!= tx_power
)
1622 /* if nic is not up don't send command */
1623 if (iwl_is_ready_rf(priv
)) {
1624 priv
->tx_power_user_lmt
= tx_power
;
1625 if (force
&& priv
->cfg
->ops
->lib
->send_tx_power
)
1626 ret
= priv
->cfg
->ops
->lib
->send_tx_power(priv
);
1627 else if (!priv
->cfg
->ops
->lib
->send_tx_power
)
1630 * if fail to set tx_power, restore the orig. tx power
1633 priv
->tx_power_user_lmt
= prev_tx_power
;
1637 * Even this is an async host command, the command
1638 * will always report success from uCode
1639 * So once driver can placing the command into the queue
1640 * successfully, driver can use priv->tx_power_user_lmt
1641 * to reflect the current tx power
1645 EXPORT_SYMBOL(iwl_set_tx_power
);
1647 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1649 /* Free dram table */
1650 void iwl_free_isr_ict(struct iwl_priv
*priv
)
1652 if (priv
->ict_tbl_vir
) {
1653 pci_free_consistent(priv
->pci_dev
, (sizeof(u32
) * ICT_COUNT
) +
1654 PAGE_SIZE
, priv
->ict_tbl_vir
,
1656 priv
->ict_tbl_vir
= NULL
;
1659 EXPORT_SYMBOL(iwl_free_isr_ict
);
1662 /* allocate dram shared table it is a PAGE_SIZE aligned
1663 * also reset all data related to ICT table interrupt.
1665 int iwl_alloc_isr_ict(struct iwl_priv
*priv
)
1668 if (priv
->cfg
->use_isr_legacy
)
1670 /* allocate shrared data table */
1671 priv
->ict_tbl_vir
= pci_alloc_consistent(priv
->pci_dev
, (sizeof(u32
) *
1672 ICT_COUNT
) + PAGE_SIZE
,
1673 &priv
->ict_tbl_dma
);
1674 if (!priv
->ict_tbl_vir
)
1677 /* align table to PAGE_SIZE boundry */
1678 priv
->aligned_ict_tbl_dma
= ALIGN(priv
->ict_tbl_dma
, PAGE_SIZE
);
1680 IWL_DEBUG_ISR(priv
, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1681 (unsigned long long)priv
->ict_tbl_dma
,
1682 (unsigned long long)priv
->aligned_ict_tbl_dma
,
1683 (int)(priv
->aligned_ict_tbl_dma
- priv
->ict_tbl_dma
));
1685 priv
->ict_tbl
= priv
->ict_tbl_vir
+
1686 (priv
->aligned_ict_tbl_dma
- priv
->ict_tbl_dma
);
1688 IWL_DEBUG_ISR(priv
, "ict vir addr %p vir aligned %p diff %d\n",
1689 priv
->ict_tbl
, priv
->ict_tbl_vir
,
1690 (int)(priv
->aligned_ict_tbl_dma
- priv
->ict_tbl_dma
));
1692 /* reset table and index to all 0 */
1693 memset(priv
->ict_tbl_vir
,0, (sizeof(u32
) * ICT_COUNT
) + PAGE_SIZE
);
1694 priv
->ict_index
= 0;
1696 /* add periodic RX interrupt */
1697 priv
->inta_mask
|= CSR_INT_BIT_RX_PERIODIC
;
1700 EXPORT_SYMBOL(iwl_alloc_isr_ict
);
1702 /* Device is going up inform it about using ICT interrupt table,
1703 * also we need to tell the driver to start using ICT interrupt.
1705 int iwl_reset_ict(struct iwl_priv
*priv
)
1708 unsigned long flags
;
1710 if (!priv
->ict_tbl_vir
)
1713 spin_lock_irqsave(&priv
->lock
, flags
);
1714 iwl_disable_interrupts(priv
);
1716 memset(&priv
->ict_tbl
[0], 0, sizeof(u32
) * ICT_COUNT
);
1718 val
= priv
->aligned_ict_tbl_dma
>> PAGE_SHIFT
;
1720 val
|= CSR_DRAM_INT_TBL_ENABLE
;
1721 val
|= CSR_DRAM_INIT_TBL_WRAP_CHECK
;
1723 IWL_DEBUG_ISR(priv
, "CSR_DRAM_INT_TBL_REG =0x%X "
1724 "aligned dma address %Lx\n",
1725 val
, (unsigned long long)priv
->aligned_ict_tbl_dma
);
1727 iwl_write32(priv
, CSR_DRAM_INT_TBL_REG
, val
);
1728 priv
->use_ict
= true;
1729 priv
->ict_index
= 0;
1730 iwl_write32(priv
, CSR_INT
, priv
->inta_mask
);
1731 iwl_enable_interrupts(priv
);
1732 spin_unlock_irqrestore(&priv
->lock
, flags
);
1736 EXPORT_SYMBOL(iwl_reset_ict
);
1738 /* Device is going down disable ict interrupt usage */
1739 void iwl_disable_ict(struct iwl_priv
*priv
)
1741 unsigned long flags
;
1743 spin_lock_irqsave(&priv
->lock
, flags
);
1744 priv
->use_ict
= false;
1745 spin_unlock_irqrestore(&priv
->lock
, flags
);
1747 EXPORT_SYMBOL(iwl_disable_ict
);
1749 /* interrupt handler using ict table, with this interrupt driver will
1750 * stop using INTA register to get device's interrupt, reading this register
1751 * is expensive, device will write interrupts in ICT dram table, increment
1752 * index then will fire interrupt to driver, driver will OR all ICT table
1753 * entries from current index up to table entry with 0 value. the result is
1754 * the interrupt we need to service, driver will set the entries back to 0 and
1757 irqreturn_t
iwl_isr_ict(int irq
, void *data
)
1759 struct iwl_priv
*priv
= data
;
1760 u32 inta
, inta_mask
;
1766 /* dram interrupt table not set yet,
1767 * use legacy interrupt.
1770 return iwl_isr(irq
, data
);
1772 spin_lock(&priv
->lock
);
1774 /* Disable (but don't clear!) interrupts here to avoid
1775 * back-to-back ISRs and sporadic interrupts from our NIC.
1776 * If we have something to service, the tasklet will re-enable ints.
1777 * If we *don't* have something, we'll re-enable before leaving here.
1779 inta_mask
= iwl_read32(priv
, CSR_INT_MASK
); /* just for debug */
1780 iwl_write32(priv
, CSR_INT_MASK
, 0x00000000);
1783 /* Ignore interrupt if there's nothing in NIC to service.
1784 * This may be due to IRQ shared with another device,
1785 * or due to sporadic interrupts thrown from our NIC. */
1786 if (!priv
->ict_tbl
[priv
->ict_index
]) {
1787 IWL_DEBUG_ISR(priv
, "Ignore interrupt, inta == 0\n");
1791 /* read all entries that not 0 start with ict_index */
1792 while (priv
->ict_tbl
[priv
->ict_index
]) {
1794 val
|= le32_to_cpu(priv
->ict_tbl
[priv
->ict_index
]);
1795 IWL_DEBUG_ISR(priv
, "ICT index %d value 0x%08X\n",
1797 le32_to_cpu(priv
->ict_tbl
[priv
->ict_index
]));
1798 priv
->ict_tbl
[priv
->ict_index
] = 0;
1799 priv
->ict_index
= iwl_queue_inc_wrap(priv
->ict_index
,
1804 /* We should not get this value, just ignore it. */
1805 if (val
== 0xffffffff)
1809 * this is a w/a for a h/w bug. the h/w bug may cause the Rx bit
1810 * (bit 15 before shifting it to 31) to clear when using interrupt
1811 * coalescing. fortunately, bits 18 and 19 stay set when this happens
1812 * so we use them to decide on the real state of the Rx bit.
1813 * In order words, bit 15 is set if bit 18 or bit 19 are set.
1818 inta
= (0xff & val
) | ((0xff00 & val
) << 16);
1819 IWL_DEBUG_ISR(priv
, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1820 inta
, inta_mask
, val
);
1822 inta
&= priv
->inta_mask
;
1825 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1827 tasklet_schedule(&priv
->irq_tasklet
);
1828 else if (test_bit(STATUS_INT_ENABLED
, &priv
->status
) && !priv
->inta
) {
1829 /* Allow interrupt if was disabled by this handler and
1830 * no tasklet was schedules, We should not enable interrupt,
1831 * tasklet will enable it.
1833 iwl_enable_interrupts(priv
);
1836 spin_unlock(&priv
->lock
);
1840 /* re-enable interrupts here since we don't have anything to service.
1841 * only Re-enable if disabled by irq.
1843 if (test_bit(STATUS_INT_ENABLED
, &priv
->status
) && !priv
->inta
)
1844 iwl_enable_interrupts(priv
);
1846 spin_unlock(&priv
->lock
);
1849 EXPORT_SYMBOL(iwl_isr_ict
);
1852 static irqreturn_t
iwl_isr(int irq
, void *data
)
1854 struct iwl_priv
*priv
= data
;
1855 u32 inta
, inta_mask
;
1856 #ifdef CONFIG_IWLWIFI_DEBUG
1862 spin_lock(&priv
->lock
);
1864 /* Disable (but don't clear!) interrupts here to avoid
1865 * back-to-back ISRs and sporadic interrupts from our NIC.
1866 * If we have something to service, the tasklet will re-enable ints.
1867 * If we *don't* have something, we'll re-enable before leaving here. */
1868 inta_mask
= iwl_read32(priv
, CSR_INT_MASK
); /* just for debug */
1869 iwl_write32(priv
, CSR_INT_MASK
, 0x00000000);
1871 /* Discover which interrupts are active/pending */
1872 inta
= iwl_read32(priv
, CSR_INT
);
1874 /* Ignore interrupt if there's nothing in NIC to service.
1875 * This may be due to IRQ shared with another device,
1876 * or due to sporadic interrupts thrown from our NIC. */
1878 IWL_DEBUG_ISR(priv
, "Ignore interrupt, inta == 0\n");
1882 if ((inta
== 0xFFFFFFFF) || ((inta
& 0xFFFFFFF0) == 0xa5a5a5a0)) {
1883 /* Hardware disappeared. It might have already raised
1885 IWL_WARN(priv
, "HARDWARE GONE?? INTA == 0x%08x\n", inta
);
1889 #ifdef CONFIG_IWLWIFI_DEBUG
1890 if (iwl_get_debug_level(priv
) & (IWL_DL_ISR
)) {
1891 inta_fh
= iwl_read32(priv
, CSR_FH_INT_STATUS
);
1892 IWL_DEBUG_ISR(priv
, "ISR inta 0x%08x, enabled 0x%08x, "
1893 "fh 0x%08x\n", inta
, inta_mask
, inta_fh
);
1898 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1900 tasklet_schedule(&priv
->irq_tasklet
);
1901 else if (test_bit(STATUS_INT_ENABLED
, &priv
->status
) && !priv
->inta
)
1902 iwl_enable_interrupts(priv
);
1905 spin_unlock(&priv
->lock
);
1909 /* re-enable interrupts here since we don't have anything to service. */
1910 /* only Re-enable if diabled by irq and no schedules tasklet. */
1911 if (test_bit(STATUS_INT_ENABLED
, &priv
->status
) && !priv
->inta
)
1912 iwl_enable_interrupts(priv
);
1914 spin_unlock(&priv
->lock
);
1918 irqreturn_t
iwl_isr_legacy(int irq
, void *data
)
1920 struct iwl_priv
*priv
= data
;
1921 u32 inta
, inta_mask
;
1926 spin_lock(&priv
->lock
);
1928 /* Disable (but don't clear!) interrupts here to avoid
1929 * back-to-back ISRs and sporadic interrupts from our NIC.
1930 * If we have something to service, the tasklet will re-enable ints.
1931 * If we *don't* have something, we'll re-enable before leaving here. */
1932 inta_mask
= iwl_read32(priv
, CSR_INT_MASK
); /* just for debug */
1933 iwl_write32(priv
, CSR_INT_MASK
, 0x00000000);
1935 /* Discover which interrupts are active/pending */
1936 inta
= iwl_read32(priv
, CSR_INT
);
1937 inta_fh
= iwl_read32(priv
, CSR_FH_INT_STATUS
);
1939 /* Ignore interrupt if there's nothing in NIC to service.
1940 * This may be due to IRQ shared with another device,
1941 * or due to sporadic interrupts thrown from our NIC. */
1942 if (!inta
&& !inta_fh
) {
1943 IWL_DEBUG_ISR(priv
, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1947 if ((inta
== 0xFFFFFFFF) || ((inta
& 0xFFFFFFF0) == 0xa5a5a5a0)) {
1948 /* Hardware disappeared. It might have already raised
1950 IWL_WARN(priv
, "HARDWARE GONE?? INTA == 0x%08x\n", inta
);
1954 IWL_DEBUG_ISR(priv
, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1955 inta
, inta_mask
, inta_fh
);
1957 inta
&= ~CSR_INT_BIT_SCD
;
1959 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1960 if (likely(inta
|| inta_fh
))
1961 tasklet_schedule(&priv
->irq_tasklet
);
1964 spin_unlock(&priv
->lock
);
1968 /* re-enable interrupts here since we don't have anything to service. */
1969 /* only Re-enable if diabled by irq */
1970 if (test_bit(STATUS_INT_ENABLED
, &priv
->status
))
1971 iwl_enable_interrupts(priv
);
1972 spin_unlock(&priv
->lock
);
1975 EXPORT_SYMBOL(iwl_isr_legacy
);
1977 int iwl_send_bt_config(struct iwl_priv
*priv
)
1979 struct iwl_bt_cmd bt_cmd
= {
1980 .flags
= BT_COEX_MODE_4W
,
1981 .lead_time
= BT_LEAD_TIME_DEF
,
1982 .max_kill
= BT_MAX_KILL_DEF
,
1987 return iwl_send_cmd_pdu(priv
, REPLY_BT_CONFIG
,
1988 sizeof(struct iwl_bt_cmd
), &bt_cmd
);
1990 EXPORT_SYMBOL(iwl_send_bt_config
);
1992 int iwl_send_statistics_request(struct iwl_priv
*priv
, u8 flags
, bool clear
)
1994 struct iwl_statistics_cmd statistics_cmd
= {
1995 .configuration_flags
=
1996 clear
? IWL_STATS_CONF_CLEAR_STATS
: 0,
1999 if (flags
& CMD_ASYNC
)
2000 return iwl_send_cmd_pdu_async(priv
, REPLY_STATISTICS_CMD
,
2001 sizeof(struct iwl_statistics_cmd
),
2002 &statistics_cmd
, NULL
);
2004 return iwl_send_cmd_pdu(priv
, REPLY_STATISTICS_CMD
,
2005 sizeof(struct iwl_statistics_cmd
),
2008 EXPORT_SYMBOL(iwl_send_statistics_request
);
2011 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2012 * using sample data 100 bytes apart. If these sample points are good,
2013 * it's a pretty good bet that everything between them is good, too.
2015 static int iwlcore_verify_inst_sparse(struct iwl_priv
*priv
, __le32
*image
, u32 len
)
2022 IWL_DEBUG_INFO(priv
, "ucode inst image size is %u\n", len
);
2024 for (i
= 0; i
< len
; i
+= 100, image
+= 100/sizeof(u32
)) {
2025 /* read data comes through single port, auto-incr addr */
2026 /* NOTE: Use the debugless read so we don't flood kernel log
2027 * if IWL_DL_IO is set */
2028 iwl_write_direct32(priv
, HBUS_TARG_MEM_RADDR
,
2029 i
+ IWL49_RTC_INST_LOWER_BOUND
);
2030 val
= _iwl_read_direct32(priv
, HBUS_TARG_MEM_RDAT
);
2031 if (val
!= le32_to_cpu(*image
)) {
2043 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2044 * looking at all data.
2046 static int iwl_verify_inst_full(struct iwl_priv
*priv
, __le32
*image
,
2054 IWL_DEBUG_INFO(priv
, "ucode inst image size is %u\n", len
);
2056 iwl_write_direct32(priv
, HBUS_TARG_MEM_RADDR
,
2057 IWL49_RTC_INST_LOWER_BOUND
);
2060 for (; len
> 0; len
-= sizeof(u32
), image
++) {
2061 /* read data comes through single port, auto-incr addr */
2062 /* NOTE: Use the debugless read so we don't flood kernel log
2063 * if IWL_DL_IO is set */
2064 val
= _iwl_read_direct32(priv
, HBUS_TARG_MEM_RDAT
);
2065 if (val
!= le32_to_cpu(*image
)) {
2066 IWL_ERR(priv
, "uCode INST section is invalid at "
2067 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2068 save_len
- len
, val
, le32_to_cpu(*image
));
2077 IWL_DEBUG_INFO(priv
,
2078 "ucode image in INSTRUCTION memory is good\n");
2084 * iwl_verify_ucode - determine which instruction image is in SRAM,
2085 * and verify its contents
2087 int iwl_verify_ucode(struct iwl_priv
*priv
)
2094 image
= (__le32
*)priv
->ucode_boot
.v_addr
;
2095 len
= priv
->ucode_boot
.len
;
2096 ret
= iwlcore_verify_inst_sparse(priv
, image
, len
);
2098 IWL_DEBUG_INFO(priv
, "Bootstrap uCode is good in inst SRAM\n");
2102 /* Try initialize */
2103 image
= (__le32
*)priv
->ucode_init
.v_addr
;
2104 len
= priv
->ucode_init
.len
;
2105 ret
= iwlcore_verify_inst_sparse(priv
, image
, len
);
2107 IWL_DEBUG_INFO(priv
, "Initialize uCode is good in inst SRAM\n");
2111 /* Try runtime/protocol */
2112 image
= (__le32
*)priv
->ucode_code
.v_addr
;
2113 len
= priv
->ucode_code
.len
;
2114 ret
= iwlcore_verify_inst_sparse(priv
, image
, len
);
2116 IWL_DEBUG_INFO(priv
, "Runtime uCode is good in inst SRAM\n");
2120 IWL_ERR(priv
, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2122 /* Since nothing seems to match, show first several data entries in
2123 * instruction SRAM, so maybe visual inspection will give a clue.
2124 * Selection of bootstrap image (vs. other images) is arbitrary. */
2125 image
= (__le32
*)priv
->ucode_boot
.v_addr
;
2126 len
= priv
->ucode_boot
.len
;
2127 ret
= iwl_verify_inst_full(priv
, image
, len
);
2131 EXPORT_SYMBOL(iwl_verify_ucode
);
2134 void iwl_rf_kill_ct_config(struct iwl_priv
*priv
)
2136 struct iwl_ct_kill_config cmd
;
2137 struct iwl_ct_kill_throttling_config adv_cmd
;
2138 unsigned long flags
;
2141 spin_lock_irqsave(&priv
->lock
, flags
);
2142 iwl_write32(priv
, CSR_UCODE_DRV_GP1_CLR
,
2143 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT
);
2144 spin_unlock_irqrestore(&priv
->lock
, flags
);
2145 priv
->thermal_throttle
.ct_kill_toggle
= false;
2147 if (priv
->cfg
->support_ct_kill_exit
) {
2148 adv_cmd
.critical_temperature_enter
=
2149 cpu_to_le32(priv
->hw_params
.ct_kill_threshold
);
2150 adv_cmd
.critical_temperature_exit
=
2151 cpu_to_le32(priv
->hw_params
.ct_kill_exit_threshold
);
2153 ret
= iwl_send_cmd_pdu(priv
, REPLY_CT_KILL_CONFIG_CMD
,
2154 sizeof(adv_cmd
), &adv_cmd
);
2156 IWL_ERR(priv
, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2158 IWL_DEBUG_INFO(priv
, "REPLY_CT_KILL_CONFIG_CMD "
2160 "critical temperature enter is %d,"
2162 priv
->hw_params
.ct_kill_threshold
,
2163 priv
->hw_params
.ct_kill_exit_threshold
);
2165 cmd
.critical_temperature_R
=
2166 cpu_to_le32(priv
->hw_params
.ct_kill_threshold
);
2168 ret
= iwl_send_cmd_pdu(priv
, REPLY_CT_KILL_CONFIG_CMD
,
2171 IWL_ERR(priv
, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2173 IWL_DEBUG_INFO(priv
, "REPLY_CT_KILL_CONFIG_CMD "
2175 "critical temperature is %d\n",
2176 priv
->hw_params
.ct_kill_threshold
);
2179 EXPORT_SYMBOL(iwl_rf_kill_ct_config
);
2185 * Use: Sets the device's internal card state to enable, disable, or halt
2187 * When in the 'enable' state the card operates as normal.
2188 * When in the 'disable' state, the card enters into a low power mode.
2189 * When in the 'halt' state, the card is shut down and must be fully
2190 * restarted to come back on.
2192 int iwl_send_card_state(struct iwl_priv
*priv
, u32 flags
, u8 meta_flag
)
2194 struct iwl_host_cmd cmd
= {
2195 .id
= REPLY_CARD_STATE_CMD
,
2201 return iwl_send_cmd(priv
, &cmd
);
2204 void iwl_rx_pm_sleep_notif(struct iwl_priv
*priv
,
2205 struct iwl_rx_mem_buffer
*rxb
)
2207 #ifdef CONFIG_IWLWIFI_DEBUG
2208 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
2209 struct iwl_sleep_notification
*sleep
= &(pkt
->u
.sleep_notif
);
2210 IWL_DEBUG_RX(priv
, "sleep mode: %d, src: %d\n",
2211 sleep
->pm_sleep_mode
, sleep
->pm_wakeup_src
);
2214 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif
);
2216 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv
*priv
,
2217 struct iwl_rx_mem_buffer
*rxb
)
2219 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
2220 u32 len
= le32_to_cpu(pkt
->len_n_flags
) & FH_RSCSR_FRAME_SIZE_MSK
;
2221 IWL_DEBUG_RADIO(priv
, "Dumping %d bytes of unhandled "
2222 "notification for %s:\n", len
,
2223 get_cmd_string(pkt
->hdr
.cmd
));
2224 iwl_print_hex_dump(priv
, IWL_DL_RADIO
, pkt
->u
.raw
, len
);
2226 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif
);
2228 void iwl_rx_reply_error(struct iwl_priv
*priv
,
2229 struct iwl_rx_mem_buffer
*rxb
)
2231 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
2233 IWL_ERR(priv
, "Error Reply type 0x%08X cmd %s (0x%02X) "
2234 "seq 0x%04X ser 0x%08X\n",
2235 le32_to_cpu(pkt
->u
.err_resp
.error_type
),
2236 get_cmd_string(pkt
->u
.err_resp
.cmd_id
),
2237 pkt
->u
.err_resp
.cmd_id
,
2238 le16_to_cpu(pkt
->u
.err_resp
.bad_cmd_seq_num
),
2239 le32_to_cpu(pkt
->u
.err_resp
.error_info
));
2241 EXPORT_SYMBOL(iwl_rx_reply_error
);
2243 void iwl_clear_isr_stats(struct iwl_priv
*priv
)
2245 memset(&priv
->isr_stats
, 0, sizeof(priv
->isr_stats
));
2248 int iwl_mac_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
2249 const struct ieee80211_tx_queue_params
*params
)
2251 struct iwl_priv
*priv
= hw
->priv
;
2252 unsigned long flags
;
2255 IWL_DEBUG_MAC80211(priv
, "enter\n");
2257 if (!iwl_is_ready_rf(priv
)) {
2258 IWL_DEBUG_MAC80211(priv
, "leave - RF not ready\n");
2262 if (queue
>= AC_NUM
) {
2263 IWL_DEBUG_MAC80211(priv
, "leave - queue >= AC_NUM %d\n", queue
);
2267 q
= AC_NUM
- 1 - queue
;
2269 spin_lock_irqsave(&priv
->lock
, flags
);
2271 priv
->qos_data
.def_qos_parm
.ac
[q
].cw_min
= cpu_to_le16(params
->cw_min
);
2272 priv
->qos_data
.def_qos_parm
.ac
[q
].cw_max
= cpu_to_le16(params
->cw_max
);
2273 priv
->qos_data
.def_qos_parm
.ac
[q
].aifsn
= params
->aifs
;
2274 priv
->qos_data
.def_qos_parm
.ac
[q
].edca_txop
=
2275 cpu_to_le16((params
->txop
* 32));
2277 priv
->qos_data
.def_qos_parm
.ac
[q
].reserved1
= 0;
2278 priv
->qos_data
.qos_active
= 1;
2280 if (priv
->iw_mode
== NL80211_IFTYPE_AP
)
2281 iwl_activate_qos(priv
, 1);
2282 else if (priv
->assoc_id
&& iwl_is_associated(priv
))
2283 iwl_activate_qos(priv
, 0);
2285 spin_unlock_irqrestore(&priv
->lock
, flags
);
2287 IWL_DEBUG_MAC80211(priv
, "leave\n");
2290 EXPORT_SYMBOL(iwl_mac_conf_tx
);
2292 static void iwl_ht_conf(struct iwl_priv
*priv
,
2293 struct ieee80211_bss_conf
*bss_conf
)
2295 struct iwl_ht_config
*ht_conf
= &priv
->current_ht_config
;
2296 struct ieee80211_sta
*sta
;
2298 IWL_DEBUG_MAC80211(priv
, "enter: \n");
2300 if (!ht_conf
->is_ht
)
2303 ht_conf
->ht_protection
=
2304 bss_conf
->ht_operation_mode
& IEEE80211_HT_OP_MODE_PROTECTION
;
2305 ht_conf
->non_GF_STA_present
=
2306 !!(bss_conf
->ht_operation_mode
& IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT
);
2308 ht_conf
->single_chain_sufficient
= false;
2310 switch (priv
->iw_mode
) {
2311 case NL80211_IFTYPE_STATION
:
2313 sta
= ieee80211_find_sta(priv
->vif
, priv
->bssid
);
2315 struct ieee80211_sta_ht_cap
*ht_cap
= &sta
->ht_cap
;
2318 maxstreams
= (ht_cap
->mcs
.tx_params
&
2319 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK
)
2320 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT
;
2323 if ((ht_cap
->mcs
.rx_mask
[1] == 0) &&
2324 (ht_cap
->mcs
.rx_mask
[2] == 0))
2325 ht_conf
->single_chain_sufficient
= true;
2326 if (maxstreams
<= 1)
2327 ht_conf
->single_chain_sufficient
= true;
2330 * If at all, this can only happen through a race
2331 * when the AP disconnects us while we're still
2332 * setting up the connection, in that case mac80211
2333 * will soon tell us about that.
2335 ht_conf
->single_chain_sufficient
= true;
2339 case NL80211_IFTYPE_ADHOC
:
2340 ht_conf
->single_chain_sufficient
= true;
2346 IWL_DEBUG_MAC80211(priv
, "leave\n");
2349 static inline void iwl_set_no_assoc(struct iwl_priv
*priv
)
2352 iwl_led_disassociate(priv
);
2354 * inform the ucode that there is no longer an
2355 * association and that no more packets should be
2358 priv
->staging_rxon
.filter_flags
&=
2359 ~RXON_FILTER_ASSOC_MSK
;
2360 priv
->staging_rxon
.assoc_id
= 0;
2361 iwlcore_commit_rxon(priv
);
2364 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2365 void iwl_bss_info_changed(struct ieee80211_hw
*hw
,
2366 struct ieee80211_vif
*vif
,
2367 struct ieee80211_bss_conf
*bss_conf
,
2370 struct iwl_priv
*priv
= hw
->priv
;
2373 IWL_DEBUG_MAC80211(priv
, "changes = 0x%X\n", changes
);
2375 if (!iwl_is_alive(priv
))
2378 mutex_lock(&priv
->mutex
);
2380 if (changes
& BSS_CHANGED_BEACON
&&
2381 priv
->iw_mode
== NL80211_IFTYPE_AP
) {
2382 dev_kfree_skb(priv
->ibss_beacon
);
2383 priv
->ibss_beacon
= ieee80211_beacon_get(hw
, vif
);
2386 if (changes
& BSS_CHANGED_BEACON_INT
) {
2387 priv
->beacon_int
= bss_conf
->beacon_int
;
2388 /* TODO: in AP mode, do something to make this take effect */
2391 if (changes
& BSS_CHANGED_BSSID
) {
2392 IWL_DEBUG_MAC80211(priv
, "BSSID %pM\n", bss_conf
->bssid
);
2395 * If there is currently a HW scan going on in the
2396 * background then we need to cancel it else the RXON
2397 * below/in post_associate will fail.
2399 if (iwl_scan_cancel_timeout(priv
, 100)) {
2400 IWL_WARN(priv
, "Aborted scan still in progress after 100ms\n");
2401 IWL_DEBUG_MAC80211(priv
, "leaving - scan abort failed.\n");
2402 mutex_unlock(&priv
->mutex
);
2406 /* mac80211 only sets assoc when in STATION mode */
2407 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
||
2409 memcpy(priv
->staging_rxon
.bssid_addr
,
2410 bss_conf
->bssid
, ETH_ALEN
);
2412 /* currently needed in a few places */
2413 memcpy(priv
->bssid
, bss_conf
->bssid
, ETH_ALEN
);
2415 priv
->staging_rxon
.filter_flags
&=
2416 ~RXON_FILTER_ASSOC_MSK
;
2422 * This needs to be after setting the BSSID in case
2423 * mac80211 decides to do both changes at once because
2424 * it will invoke post_associate.
2426 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
&&
2427 changes
& BSS_CHANGED_BEACON
) {
2428 struct sk_buff
*beacon
= ieee80211_beacon_get(hw
, vif
);
2431 iwl_mac_beacon_update(hw
, beacon
);
2434 if (changes
& BSS_CHANGED_ERP_PREAMBLE
) {
2435 IWL_DEBUG_MAC80211(priv
, "ERP_PREAMBLE %d\n",
2436 bss_conf
->use_short_preamble
);
2437 if (bss_conf
->use_short_preamble
)
2438 priv
->staging_rxon
.flags
|= RXON_FLG_SHORT_PREAMBLE_MSK
;
2440 priv
->staging_rxon
.flags
&= ~RXON_FLG_SHORT_PREAMBLE_MSK
;
2443 if (changes
& BSS_CHANGED_ERP_CTS_PROT
) {
2444 IWL_DEBUG_MAC80211(priv
, "ERP_CTS %d\n", bss_conf
->use_cts_prot
);
2445 if (bss_conf
->use_cts_prot
&& (priv
->band
!= IEEE80211_BAND_5GHZ
))
2446 priv
->staging_rxon
.flags
|= RXON_FLG_TGG_PROTECT_MSK
;
2448 priv
->staging_rxon
.flags
&= ~RXON_FLG_TGG_PROTECT_MSK
;
2451 if (changes
& BSS_CHANGED_BASIC_RATES
) {
2452 /* XXX use this information
2454 * To do that, remove code from iwl_set_rate() and put something
2458 priv->staging_rxon.ofdm_basic_rates =
2459 bss_conf->basic_rates;
2461 priv->staging_rxon.ofdm_basic_rates =
2462 bss_conf->basic_rates >> 4;
2463 priv->staging_rxon.cck_basic_rates =
2464 bss_conf->basic_rates & 0xF;
2468 if (changes
& BSS_CHANGED_HT
) {
2469 iwl_ht_conf(priv
, bss_conf
);
2471 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
2472 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
);
2475 if (changes
& BSS_CHANGED_ASSOC
) {
2476 IWL_DEBUG_MAC80211(priv
, "ASSOC %d\n", bss_conf
->assoc
);
2477 if (bss_conf
->assoc
) {
2478 priv
->assoc_id
= bss_conf
->aid
;
2479 priv
->beacon_int
= bss_conf
->beacon_int
;
2480 priv
->timestamp
= bss_conf
->timestamp
;
2481 priv
->assoc_capability
= bss_conf
->assoc_capability
;
2483 iwl_led_associate(priv
);
2486 * We have just associated, don't start scan too early
2487 * leave time for EAPOL exchange to complete.
2489 * XXX: do this in mac80211
2491 priv
->next_scan_jiffies
= jiffies
+
2492 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC
;
2493 if (!iwl_is_rfkill(priv
))
2494 priv
->cfg
->ops
->lib
->post_associate(priv
);
2496 iwl_set_no_assoc(priv
);
2499 if (changes
&& iwl_is_associated(priv
) && priv
->assoc_id
) {
2500 IWL_DEBUG_MAC80211(priv
, "Changes (%#x) while associated\n",
2502 ret
= iwl_send_rxon_assoc(priv
);
2504 /* Sync active_rxon with latest change. */
2505 memcpy((void *)&priv
->active_rxon
,
2506 &priv
->staging_rxon
,
2507 sizeof(struct iwl_rxon_cmd
));
2511 if (changes
& BSS_CHANGED_BEACON_ENABLED
) {
2512 if (vif
->bss_conf
.enable_beacon
) {
2513 memcpy(priv
->staging_rxon
.bssid_addr
,
2514 bss_conf
->bssid
, ETH_ALEN
);
2515 memcpy(priv
->bssid
, bss_conf
->bssid
, ETH_ALEN
);
2516 iwlcore_config_ap(priv
);
2518 iwl_set_no_assoc(priv
);
2521 mutex_unlock(&priv
->mutex
);
2523 IWL_DEBUG_MAC80211(priv
, "leave\n");
2525 EXPORT_SYMBOL(iwl_bss_info_changed
);
2527 int iwl_mac_beacon_update(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2529 struct iwl_priv
*priv
= hw
->priv
;
2530 unsigned long flags
;
2533 IWL_DEBUG_MAC80211(priv
, "enter\n");
2535 if (!iwl_is_ready_rf(priv
)) {
2536 IWL_DEBUG_MAC80211(priv
, "leave - RF not ready\n");
2540 if (priv
->iw_mode
!= NL80211_IFTYPE_ADHOC
) {
2541 IWL_DEBUG_MAC80211(priv
, "leave - not IBSS\n");
2545 spin_lock_irqsave(&priv
->lock
, flags
);
2547 if (priv
->ibss_beacon
)
2548 dev_kfree_skb(priv
->ibss_beacon
);
2550 priv
->ibss_beacon
= skb
;
2553 timestamp
= ((struct ieee80211_mgmt
*)skb
->data
)->u
.beacon
.timestamp
;
2554 priv
->timestamp
= le64_to_cpu(timestamp
);
2556 IWL_DEBUG_MAC80211(priv
, "leave\n");
2557 spin_unlock_irqrestore(&priv
->lock
, flags
);
2559 iwl_reset_qos(priv
);
2561 priv
->cfg
->ops
->lib
->post_associate(priv
);
2566 EXPORT_SYMBOL(iwl_mac_beacon_update
);
2568 int iwl_set_mode(struct iwl_priv
*priv
, int mode
)
2570 if (mode
== NL80211_IFTYPE_ADHOC
) {
2571 const struct iwl_channel_info
*ch_info
;
2573 ch_info
= iwl_get_channel_info(priv
,
2575 le16_to_cpu(priv
->staging_rxon
.channel
));
2577 if (!ch_info
|| !is_channel_ibss(ch_info
)) {
2578 IWL_ERR(priv
, "channel %d not IBSS channel\n",
2579 le16_to_cpu(priv
->staging_rxon
.channel
));
2584 iwl_connection_init_rx_config(priv
, mode
);
2586 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
2587 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
);
2589 memcpy(priv
->staging_rxon
.node_addr
, priv
->mac_addr
, ETH_ALEN
);
2591 iwl_clear_stations_table(priv
);
2593 /* dont commit rxon if rf-kill is on*/
2594 if (!iwl_is_ready_rf(priv
))
2597 iwlcore_commit_rxon(priv
);
2601 EXPORT_SYMBOL(iwl_set_mode
);
2603 int iwl_mac_add_interface(struct ieee80211_hw
*hw
,
2604 struct ieee80211_vif
*vif
)
2606 struct iwl_priv
*priv
= hw
->priv
;
2607 unsigned long flags
;
2609 IWL_DEBUG_MAC80211(priv
, "enter: type %d\n", vif
->type
);
2612 IWL_DEBUG_MAC80211(priv
, "leave - vif != NULL\n");
2616 spin_lock_irqsave(&priv
->lock
, flags
);
2618 priv
->iw_mode
= vif
->type
;
2620 spin_unlock_irqrestore(&priv
->lock
, flags
);
2622 mutex_lock(&priv
->mutex
);
2625 IWL_DEBUG_MAC80211(priv
, "Set %pM\n", vif
->addr
);
2626 memcpy(priv
->mac_addr
, vif
->addr
, ETH_ALEN
);
2629 if (iwl_set_mode(priv
, vif
->type
) == -EAGAIN
)
2630 /* we are not ready, will run again when ready */
2631 set_bit(STATUS_MODE_PENDING
, &priv
->status
);
2633 mutex_unlock(&priv
->mutex
);
2635 IWL_DEBUG_MAC80211(priv
, "leave\n");
2638 EXPORT_SYMBOL(iwl_mac_add_interface
);
2640 void iwl_mac_remove_interface(struct ieee80211_hw
*hw
,
2641 struct ieee80211_vif
*vif
)
2643 struct iwl_priv
*priv
= hw
->priv
;
2645 IWL_DEBUG_MAC80211(priv
, "enter\n");
2647 mutex_lock(&priv
->mutex
);
2649 if (iwl_is_ready_rf(priv
)) {
2650 iwl_scan_cancel_timeout(priv
, 100);
2651 priv
->staging_rxon
.filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
2652 iwlcore_commit_rxon(priv
);
2654 if (priv
->vif
== vif
) {
2656 memset(priv
->bssid
, 0, ETH_ALEN
);
2658 mutex_unlock(&priv
->mutex
);
2660 IWL_DEBUG_MAC80211(priv
, "leave\n");
2663 EXPORT_SYMBOL(iwl_mac_remove_interface
);
2666 * iwl_mac_config - mac80211 config callback
2668 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2669 * be set inappropriately and the driver currently sets the hardware up to
2670 * use it whenever needed.
2672 int iwl_mac_config(struct ieee80211_hw
*hw
, u32 changed
)
2674 struct iwl_priv
*priv
= hw
->priv
;
2675 const struct iwl_channel_info
*ch_info
;
2676 struct ieee80211_conf
*conf
= &hw
->conf
;
2677 struct iwl_ht_config
*ht_conf
= &priv
->current_ht_config
;
2678 unsigned long flags
= 0;
2681 int scan_active
= 0;
2683 mutex_lock(&priv
->mutex
);
2685 IWL_DEBUG_MAC80211(priv
, "enter to channel %d changed 0x%X\n",
2686 conf
->channel
->hw_value
, changed
);
2688 if (unlikely(!priv
->cfg
->mod_params
->disable_hw_scan
&&
2689 test_bit(STATUS_SCANNING
, &priv
->status
))) {
2691 IWL_DEBUG_MAC80211(priv
, "leave - scanning\n");
2694 if (changed
& (IEEE80211_CONF_CHANGE_SMPS
|
2695 IEEE80211_CONF_CHANGE_CHANNEL
)) {
2696 /* mac80211 uses static for non-HT which is what we want */
2697 priv
->current_ht_config
.smps
= conf
->smps_mode
;
2700 * Recalculate chain counts.
2702 * If monitor mode is enabled then mac80211 will
2703 * set up the SM PS mode to OFF if an HT channel is
2706 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
2707 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
);
2710 /* during scanning mac80211 will delay channel setting until
2711 * scan finish with changed = 0
2713 if (!changed
|| (changed
& IEEE80211_CONF_CHANGE_CHANNEL
)) {
2717 ch
= ieee80211_frequency_to_channel(conf
->channel
->center_freq
);
2718 ch_info
= iwl_get_channel_info(priv
, conf
->channel
->band
, ch
);
2719 if (!is_channel_valid(ch_info
)) {
2720 IWL_DEBUG_MAC80211(priv
, "leave - invalid channel\n");
2725 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
&&
2726 !is_channel_ibss(ch_info
)) {
2727 IWL_ERR(priv
, "channel %d in band %d not "
2729 conf
->channel
->hw_value
, conf
->channel
->band
);
2734 spin_lock_irqsave(&priv
->lock
, flags
);
2736 /* Configure HT40 channels */
2737 ht_conf
->is_ht
= conf_is_ht(conf
);
2738 if (ht_conf
->is_ht
) {
2739 if (conf_is_ht40_minus(conf
)) {
2740 ht_conf
->extension_chan_offset
=
2741 IEEE80211_HT_PARAM_CHA_SEC_BELOW
;
2742 ht_conf
->is_40mhz
= true;
2743 } else if (conf_is_ht40_plus(conf
)) {
2744 ht_conf
->extension_chan_offset
=
2745 IEEE80211_HT_PARAM_CHA_SEC_ABOVE
;
2746 ht_conf
->is_40mhz
= true;
2748 ht_conf
->extension_chan_offset
=
2749 IEEE80211_HT_PARAM_CHA_SEC_NONE
;
2750 ht_conf
->is_40mhz
= false;
2753 ht_conf
->is_40mhz
= false;
2754 /* Default to no protection. Protection mode will later be set
2755 * from BSS config in iwl_ht_conf */
2756 ht_conf
->ht_protection
= IEEE80211_HT_OP_MODE_PROTECTION_NONE
;
2758 /* if we are switching from ht to 2.4 clear flags
2759 * from any ht related info since 2.4 does not
2761 if ((le16_to_cpu(priv
->staging_rxon
.channel
) != ch
))
2762 priv
->staging_rxon
.flags
= 0;
2764 iwl_set_rxon_channel(priv
, conf
->channel
);
2766 iwl_set_flags_for_band(priv
, conf
->channel
->band
);
2767 spin_unlock_irqrestore(&priv
->lock
, flags
);
2768 if (iwl_is_associated(priv
) &&
2769 (le16_to_cpu(priv
->active_rxon
.channel
) != ch
) &&
2770 priv
->cfg
->ops
->lib
->set_channel_switch
) {
2773 * at this point, staging_rxon has the
2774 * configuration for channel switch
2776 ret
= priv
->cfg
->ops
->lib
->set_channel_switch(priv
,
2779 iwl_print_rx_config_cmd(priv
);
2782 priv
->switch_rxon
.switch_in_progress
= false;
2785 /* The list of supported rates and rate mask can be different
2786 * for each band; since the band may have changed, reset
2787 * the rate mask to what mac80211 lists */
2791 if (changed
& (IEEE80211_CONF_CHANGE_PS
|
2792 IEEE80211_CONF_CHANGE_IDLE
)) {
2793 ret
= iwl_power_update_mode(priv
, false);
2795 IWL_DEBUG_MAC80211(priv
, "Error setting sleep level\n");
2798 if (changed
& IEEE80211_CONF_CHANGE_POWER
) {
2799 IWL_DEBUG_MAC80211(priv
, "TX Power old=%d new=%d\n",
2800 priv
->tx_power_user_lmt
, conf
->power_level
);
2802 iwl_set_tx_power(priv
, conf
->power_level
, false);
2805 if (!iwl_is_ready(priv
)) {
2806 IWL_DEBUG_MAC80211(priv
, "leave - not ready\n");
2813 if (memcmp(&priv
->active_rxon
,
2814 &priv
->staging_rxon
, sizeof(priv
->staging_rxon
)))
2815 iwlcore_commit_rxon(priv
);
2817 IWL_DEBUG_INFO(priv
, "Not re-sending same RXON configuration.\n");
2821 IWL_DEBUG_MAC80211(priv
, "leave\n");
2822 mutex_unlock(&priv
->mutex
);
2825 EXPORT_SYMBOL(iwl_mac_config
);
2827 int iwl_mac_get_tx_stats(struct ieee80211_hw
*hw
,
2828 struct ieee80211_tx_queue_stats
*stats
)
2830 struct iwl_priv
*priv
= hw
->priv
;
2832 struct iwl_tx_queue
*txq
;
2833 struct iwl_queue
*q
;
2834 unsigned long flags
;
2836 IWL_DEBUG_MAC80211(priv
, "enter\n");
2838 if (!iwl_is_ready_rf(priv
)) {
2839 IWL_DEBUG_MAC80211(priv
, "leave - RF not ready\n");
2843 spin_lock_irqsave(&priv
->lock
, flags
);
2845 for (i
= 0; i
< AC_NUM
; i
++) {
2846 txq
= &priv
->txq
[i
];
2848 avail
= iwl_queue_space(q
);
2850 stats
[i
].len
= q
->n_window
- avail
;
2851 stats
[i
].limit
= q
->n_window
- q
->high_mark
;
2852 stats
[i
].count
= q
->n_window
;
2855 spin_unlock_irqrestore(&priv
->lock
, flags
);
2857 IWL_DEBUG_MAC80211(priv
, "leave\n");
2861 EXPORT_SYMBOL(iwl_mac_get_tx_stats
);
2863 void iwl_mac_reset_tsf(struct ieee80211_hw
*hw
)
2865 struct iwl_priv
*priv
= hw
->priv
;
2866 unsigned long flags
;
2868 mutex_lock(&priv
->mutex
);
2869 IWL_DEBUG_MAC80211(priv
, "enter\n");
2871 spin_lock_irqsave(&priv
->lock
, flags
);
2872 memset(&priv
->current_ht_config
, 0, sizeof(struct iwl_ht_config
));
2873 spin_unlock_irqrestore(&priv
->lock
, flags
);
2875 iwl_reset_qos(priv
);
2877 spin_lock_irqsave(&priv
->lock
, flags
);
2879 priv
->assoc_capability
= 0;
2880 priv
->assoc_station_added
= 0;
2882 /* new association get rid of ibss beacon skb */
2883 if (priv
->ibss_beacon
)
2884 dev_kfree_skb(priv
->ibss_beacon
);
2886 priv
->ibss_beacon
= NULL
;
2888 priv
->beacon_int
= priv
->vif
->bss_conf
.beacon_int
;
2889 priv
->timestamp
= 0;
2890 if ((priv
->iw_mode
== NL80211_IFTYPE_STATION
))
2891 priv
->beacon_int
= 0;
2893 spin_unlock_irqrestore(&priv
->lock
, flags
);
2895 if (!iwl_is_ready_rf(priv
)) {
2896 IWL_DEBUG_MAC80211(priv
, "leave - not ready\n");
2897 mutex_unlock(&priv
->mutex
);
2901 /* we are restarting association process
2902 * clear RXON_FILTER_ASSOC_MSK bit
2904 if (priv
->iw_mode
!= NL80211_IFTYPE_AP
) {
2905 iwl_scan_cancel_timeout(priv
, 100);
2906 priv
->staging_rxon
.filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
2907 iwlcore_commit_rxon(priv
);
2910 if (priv
->iw_mode
!= NL80211_IFTYPE_ADHOC
) {
2911 IWL_DEBUG_MAC80211(priv
, "leave - not in IBSS\n");
2912 mutex_unlock(&priv
->mutex
);
2918 mutex_unlock(&priv
->mutex
);
2920 IWL_DEBUG_MAC80211(priv
, "leave\n");
2922 EXPORT_SYMBOL(iwl_mac_reset_tsf
);
2924 int iwl_alloc_txq_mem(struct iwl_priv
*priv
)
2927 priv
->txq
= kzalloc(
2928 sizeof(struct iwl_tx_queue
) * priv
->cfg
->num_of_queues
,
2931 IWL_ERR(priv
, "Not enough memory for txq \n");
2936 EXPORT_SYMBOL(iwl_alloc_txq_mem
);
2938 void iwl_free_txq_mem(struct iwl_priv
*priv
)
2943 EXPORT_SYMBOL(iwl_free_txq_mem
);
2945 int iwl_send_wimax_coex(struct iwl_priv
*priv
)
2947 struct iwl_wimax_coex_cmd
uninitialized_var(coex_cmd
);
2949 if (priv
->cfg
->support_wimax_coexist
) {
2950 /* UnMask wake up src at associated sleep */
2951 coex_cmd
.flags
|= COEX_FLAGS_ASSOC_WA_UNMASK_MSK
;
2953 /* UnMask wake up src at unassociated sleep */
2954 coex_cmd
.flags
|= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK
;
2955 memcpy(coex_cmd
.sta_prio
, cu_priorities
,
2956 sizeof(struct iwl_wimax_coex_event_entry
) *
2957 COEX_NUM_OF_EVENTS
);
2959 /* enabling the coexistence feature */
2960 coex_cmd
.flags
|= COEX_FLAGS_COEX_ENABLE_MSK
;
2962 /* enabling the priorities tables */
2963 coex_cmd
.flags
|= COEX_FLAGS_STA_TABLE_VALID_MSK
;
2965 /* coexistence is disabled */
2966 memset(&coex_cmd
, 0, sizeof(coex_cmd
));
2968 return iwl_send_cmd_pdu(priv
, COEX_PRIORITY_TABLE_CMD
,
2969 sizeof(coex_cmd
), &coex_cmd
);
2971 EXPORT_SYMBOL(iwl_send_wimax_coex
);
2973 #ifdef CONFIG_IWLWIFI_DEBUGFS
2975 #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2977 void iwl_reset_traffic_log(struct iwl_priv
*priv
)
2979 priv
->tx_traffic_idx
= 0;
2980 priv
->rx_traffic_idx
= 0;
2981 if (priv
->tx_traffic
)
2982 memset(priv
->tx_traffic
, 0, IWL_TRAFFIC_DUMP_SIZE
);
2983 if (priv
->rx_traffic
)
2984 memset(priv
->rx_traffic
, 0, IWL_TRAFFIC_DUMP_SIZE
);
2987 int iwl_alloc_traffic_mem(struct iwl_priv
*priv
)
2989 u32 traffic_size
= IWL_TRAFFIC_DUMP_SIZE
;
2991 if (iwl_debug_level
& IWL_DL_TX
) {
2992 if (!priv
->tx_traffic
) {
2994 kzalloc(traffic_size
, GFP_KERNEL
);
2995 if (!priv
->tx_traffic
)
2999 if (iwl_debug_level
& IWL_DL_RX
) {
3000 if (!priv
->rx_traffic
) {
3002 kzalloc(traffic_size
, GFP_KERNEL
);
3003 if (!priv
->rx_traffic
)
3007 iwl_reset_traffic_log(priv
);
3010 EXPORT_SYMBOL(iwl_alloc_traffic_mem
);
3012 void iwl_free_traffic_mem(struct iwl_priv
*priv
)
3014 kfree(priv
->tx_traffic
);
3015 priv
->tx_traffic
= NULL
;
3017 kfree(priv
->rx_traffic
);
3018 priv
->rx_traffic
= NULL
;
3020 EXPORT_SYMBOL(iwl_free_traffic_mem
);
3022 void iwl_dbg_log_tx_data_frame(struct iwl_priv
*priv
,
3023 u16 length
, struct ieee80211_hdr
*header
)
3028 if (likely(!(iwl_debug_level
& IWL_DL_TX
)))
3031 if (!priv
->tx_traffic
)
3034 fc
= header
->frame_control
;
3035 if (ieee80211_is_data(fc
)) {
3036 len
= (length
> IWL_TRAFFIC_ENTRY_SIZE
)
3037 ? IWL_TRAFFIC_ENTRY_SIZE
: length
;
3038 memcpy((priv
->tx_traffic
+
3039 (priv
->tx_traffic_idx
* IWL_TRAFFIC_ENTRY_SIZE
)),
3041 priv
->tx_traffic_idx
=
3042 (priv
->tx_traffic_idx
+ 1) % IWL_TRAFFIC_ENTRIES
;
3045 EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame
);
3047 void iwl_dbg_log_rx_data_frame(struct iwl_priv
*priv
,
3048 u16 length
, struct ieee80211_hdr
*header
)
3053 if (likely(!(iwl_debug_level
& IWL_DL_RX
)))
3056 if (!priv
->rx_traffic
)
3059 fc
= header
->frame_control
;
3060 if (ieee80211_is_data(fc
)) {
3061 len
= (length
> IWL_TRAFFIC_ENTRY_SIZE
)
3062 ? IWL_TRAFFIC_ENTRY_SIZE
: length
;
3063 memcpy((priv
->rx_traffic
+
3064 (priv
->rx_traffic_idx
* IWL_TRAFFIC_ENTRY_SIZE
)),
3066 priv
->rx_traffic_idx
=
3067 (priv
->rx_traffic_idx
+ 1) % IWL_TRAFFIC_ENTRIES
;
3070 EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame
);
3072 const char *get_mgmt_string(int cmd
)
3075 IWL_CMD(MANAGEMENT_ASSOC_REQ
);
3076 IWL_CMD(MANAGEMENT_ASSOC_RESP
);
3077 IWL_CMD(MANAGEMENT_REASSOC_REQ
);
3078 IWL_CMD(MANAGEMENT_REASSOC_RESP
);
3079 IWL_CMD(MANAGEMENT_PROBE_REQ
);
3080 IWL_CMD(MANAGEMENT_PROBE_RESP
);
3081 IWL_CMD(MANAGEMENT_BEACON
);
3082 IWL_CMD(MANAGEMENT_ATIM
);
3083 IWL_CMD(MANAGEMENT_DISASSOC
);
3084 IWL_CMD(MANAGEMENT_AUTH
);
3085 IWL_CMD(MANAGEMENT_DEAUTH
);
3086 IWL_CMD(MANAGEMENT_ACTION
);
3093 const char *get_ctrl_string(int cmd
)
3096 IWL_CMD(CONTROL_BACK_REQ
);
3097 IWL_CMD(CONTROL_BACK
);
3098 IWL_CMD(CONTROL_PSPOLL
);
3099 IWL_CMD(CONTROL_RTS
);
3100 IWL_CMD(CONTROL_CTS
);
3101 IWL_CMD(CONTROL_ACK
);
3102 IWL_CMD(CONTROL_CFEND
);
3103 IWL_CMD(CONTROL_CFENDACK
);
3110 void iwl_clear_traffic_stats(struct iwl_priv
*priv
)
3112 memset(&priv
->tx_stats
, 0, sizeof(struct traffic_stats
));
3113 memset(&priv
->rx_stats
, 0, sizeof(struct traffic_stats
));
3118 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
3119 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
3120 * Use debugFs to display the rx/rx_statistics
3121 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
3122 * information will be recorded, but DATA pkt still will be recorded
3123 * for the reason of iwl_led.c need to control the led blinking based on
3124 * number of tx and rx data.
3127 void iwl_update_stats(struct iwl_priv
*priv
, bool is_tx
, __le16 fc
, u16 len
)
3129 struct traffic_stats
*stats
;
3132 stats
= &priv
->tx_stats
;
3134 stats
= &priv
->rx_stats
;
3136 if (ieee80211_is_mgmt(fc
)) {
3137 switch (fc
& cpu_to_le16(IEEE80211_FCTL_STYPE
)) {
3138 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ
):
3139 stats
->mgmt
[MANAGEMENT_ASSOC_REQ
]++;
3141 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP
):
3142 stats
->mgmt
[MANAGEMENT_ASSOC_RESP
]++;
3144 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ
):
3145 stats
->mgmt
[MANAGEMENT_REASSOC_REQ
]++;
3147 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP
):
3148 stats
->mgmt
[MANAGEMENT_REASSOC_RESP
]++;
3150 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ
):
3151 stats
->mgmt
[MANAGEMENT_PROBE_REQ
]++;
3153 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP
):
3154 stats
->mgmt
[MANAGEMENT_PROBE_RESP
]++;
3156 case cpu_to_le16(IEEE80211_STYPE_BEACON
):
3157 stats
->mgmt
[MANAGEMENT_BEACON
]++;
3159 case cpu_to_le16(IEEE80211_STYPE_ATIM
):
3160 stats
->mgmt
[MANAGEMENT_ATIM
]++;
3162 case cpu_to_le16(IEEE80211_STYPE_DISASSOC
):
3163 stats
->mgmt
[MANAGEMENT_DISASSOC
]++;
3165 case cpu_to_le16(IEEE80211_STYPE_AUTH
):
3166 stats
->mgmt
[MANAGEMENT_AUTH
]++;
3168 case cpu_to_le16(IEEE80211_STYPE_DEAUTH
):
3169 stats
->mgmt
[MANAGEMENT_DEAUTH
]++;
3171 case cpu_to_le16(IEEE80211_STYPE_ACTION
):
3172 stats
->mgmt
[MANAGEMENT_ACTION
]++;
3175 } else if (ieee80211_is_ctl(fc
)) {
3176 switch (fc
& cpu_to_le16(IEEE80211_FCTL_STYPE
)) {
3177 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ
):
3178 stats
->ctrl
[CONTROL_BACK_REQ
]++;
3180 case cpu_to_le16(IEEE80211_STYPE_BACK
):
3181 stats
->ctrl
[CONTROL_BACK
]++;
3183 case cpu_to_le16(IEEE80211_STYPE_PSPOLL
):
3184 stats
->ctrl
[CONTROL_PSPOLL
]++;
3186 case cpu_to_le16(IEEE80211_STYPE_RTS
):
3187 stats
->ctrl
[CONTROL_RTS
]++;
3189 case cpu_to_le16(IEEE80211_STYPE_CTS
):
3190 stats
->ctrl
[CONTROL_CTS
]++;
3192 case cpu_to_le16(IEEE80211_STYPE_ACK
):
3193 stats
->ctrl
[CONTROL_ACK
]++;
3195 case cpu_to_le16(IEEE80211_STYPE_CFEND
):
3196 stats
->ctrl
[CONTROL_CFEND
]++;
3198 case cpu_to_le16(IEEE80211_STYPE_CFENDACK
):
3199 stats
->ctrl
[CONTROL_CFENDACK
]++;
3205 stats
->data_bytes
+= len
;
3207 iwl_leds_background(priv
);
3209 EXPORT_SYMBOL(iwl_update_stats
);
3212 const static char *get_csr_string(int cmd
)
3215 IWL_CMD(CSR_HW_IF_CONFIG_REG
);
3216 IWL_CMD(CSR_INT_COALESCING
);
3218 IWL_CMD(CSR_INT_MASK
);
3219 IWL_CMD(CSR_FH_INT_STATUS
);
3220 IWL_CMD(CSR_GPIO_IN
);
3222 IWL_CMD(CSR_GP_CNTRL
);
3223 IWL_CMD(CSR_HW_REV
);
3224 IWL_CMD(CSR_EEPROM_REG
);
3225 IWL_CMD(CSR_EEPROM_GP
);
3226 IWL_CMD(CSR_OTP_GP_REG
);
3227 IWL_CMD(CSR_GIO_REG
);
3228 IWL_CMD(CSR_GP_UCODE_REG
);
3229 IWL_CMD(CSR_GP_DRIVER_REG
);
3230 IWL_CMD(CSR_UCODE_DRV_GP1
);
3231 IWL_CMD(CSR_UCODE_DRV_GP2
);
3232 IWL_CMD(CSR_LED_REG
);
3233 IWL_CMD(CSR_DRAM_INT_TBL_REG
);
3234 IWL_CMD(CSR_GIO_CHICKEN_BITS
);
3235 IWL_CMD(CSR_ANA_PLL_CFG
);
3236 IWL_CMD(CSR_HW_REV_WA_REG
);
3237 IWL_CMD(CSR_DBG_HPET_MEM_REG
);
3244 void iwl_dump_csr(struct iwl_priv
*priv
)
3248 CSR_HW_IF_CONFIG_REG
,
3266 CSR_DRAM_INT_TBL_REG
,
3267 CSR_GIO_CHICKEN_BITS
,
3270 CSR_DBG_HPET_MEM_REG
3272 IWL_ERR(priv
, "CSR values:\n");
3273 IWL_ERR(priv
, "(2nd byte of CSR_INT_COALESCING is "
3274 "CSR_INT_PERIODIC_REG)\n");
3275 for (i
= 0; i
< ARRAY_SIZE(csr_tbl
); i
++) {
3276 IWL_ERR(priv
, " %25s: 0X%08x\n",
3277 get_csr_string(csr_tbl
[i
]),
3278 iwl_read32(priv
, csr_tbl
[i
]));
3281 EXPORT_SYMBOL(iwl_dump_csr
);
3283 const static char *get_fh_string(int cmd
)
3286 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG
);
3287 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG
);
3288 IWL_CMD(FH_RSCSR_CHNL0_WPTR
);
3289 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG
);
3290 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG
);
3291 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG
);
3292 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV
);
3293 IWL_CMD(FH_TSSR_TX_STATUS_REG
);
3294 IWL_CMD(FH_TSSR_TX_ERROR_REG
);
3301 int iwl_dump_fh(struct iwl_priv
*priv
, char **buf
, bool display
)
3304 #ifdef CONFIG_IWLWIFI_DEBUG
3309 FH_RSCSR_CHNL0_STTS_WPTR_REG
,
3310 FH_RSCSR_CHNL0_RBDCB_BASE_REG
,
3311 FH_RSCSR_CHNL0_WPTR
,
3312 FH_MEM_RCSR_CHNL0_CONFIG_REG
,
3313 FH_MEM_RSSR_SHARED_CTRL_REG
,
3314 FH_MEM_RSSR_RX_STATUS_REG
,
3315 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV
,
3316 FH_TSSR_TX_STATUS_REG
,
3317 FH_TSSR_TX_ERROR_REG
3319 #ifdef CONFIG_IWLWIFI_DEBUG
3321 bufsz
= ARRAY_SIZE(fh_tbl
) * 48 + 40;
3322 *buf
= kmalloc(bufsz
, GFP_KERNEL
);
3325 pos
+= scnprintf(*buf
+ pos
, bufsz
- pos
,
3326 "FH register values:\n");
3327 for (i
= 0; i
< ARRAY_SIZE(fh_tbl
); i
++) {
3328 pos
+= scnprintf(*buf
+ pos
, bufsz
- pos
,
3330 get_fh_string(fh_tbl
[i
]),
3331 iwl_read_direct32(priv
, fh_tbl
[i
]));
3336 IWL_ERR(priv
, "FH register values:\n");
3337 for (i
= 0; i
< ARRAY_SIZE(fh_tbl
); i
++) {
3338 IWL_ERR(priv
, " %34s: 0X%08x\n",
3339 get_fh_string(fh_tbl
[i
]),
3340 iwl_read_direct32(priv
, fh_tbl
[i
]));
3344 EXPORT_SYMBOL(iwl_dump_fh
);
3348 int iwl_pci_suspend(struct pci_dev
*pdev
, pm_message_t state
)
3350 struct iwl_priv
*priv
= pci_get_drvdata(pdev
);
3353 * This function is called when system goes into suspend state
3354 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3355 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3356 * it will not call apm_ops.stop() to stop the DMA operation.
3357 * Calling apm_ops.stop here to make sure we stop the DMA.
3359 priv
->cfg
->ops
->lib
->apm_ops
.stop(priv
);
3361 pci_save_state(pdev
);
3362 pci_disable_device(pdev
);
3363 pci_set_power_state(pdev
, PCI_D3hot
);
3367 EXPORT_SYMBOL(iwl_pci_suspend
);
3369 int iwl_pci_resume(struct pci_dev
*pdev
)
3371 struct iwl_priv
*priv
= pci_get_drvdata(pdev
);
3374 pci_set_power_state(pdev
, PCI_D0
);
3375 ret
= pci_enable_device(pdev
);
3378 pci_restore_state(pdev
);
3379 iwl_enable_interrupts(priv
);
3383 EXPORT_SYMBOL(iwl_pci_resume
);
3385 #endif /* CONFIG_PM */