1 /******************************************************************************
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <net/mac80211.h>
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h" /* FIXME: remove */
36 #include "iwl-debug.h"
39 #include "iwl-power.h"
41 #include "iwl-helpers.h"
44 MODULE_DESCRIPTION("iwl core");
45 MODULE_VERSION(IWLWIFI_VERSION
);
46 MODULE_AUTHOR(DRV_COPYRIGHT
" " DRV_AUTHOR
);
47 MODULE_LICENSE("GPL");
49 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
63 EXPORT_SYMBOL(iwl_debug_level
);
65 static irqreturn_t
iwl_isr(int irq
, void *data
);
69 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
71 * If there isn't a valid next or previous rate then INV is used which
72 * maps to IWL_RATE_INVALID
75 const struct iwl_rate_info iwl_rates
[IWL_RATE_COUNT
] = {
76 IWL_DECLARE_RATE_INFO(1, INV
, INV
, 2, INV
, 2, INV
, 2), /* 1mbps */
77 IWL_DECLARE_RATE_INFO(2, INV
, 1, 5, 1, 5, 1, 5), /* 2mbps */
78 IWL_DECLARE_RATE_INFO(5, INV
, 2, 6, 2, 11, 2, 11), /*5.5mbps */
79 IWL_DECLARE_RATE_INFO(11, INV
, 9, 12, 9, 12, 5, 18), /* 11mbps */
80 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
81 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
82 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
83 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
84 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
85 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
86 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
87 IWL_DECLARE_RATE_INFO(54, 54, 48, INV
, 48, INV
, 48, INV
),/* 54mbps */
88 IWL_DECLARE_RATE_INFO(60, 60, 48, INV
, 48, INV
, 48, INV
),/* 60mbps */
89 /* FIXME:RS: ^^ should be INV (legacy) */
91 EXPORT_SYMBOL(iwl_rates
);
94 * translate ucode response to mac80211 tx status control values
96 void iwl_hwrate_to_tx_control(struct iwl_priv
*priv
, u32 rate_n_flags
,
97 struct ieee80211_tx_info
*info
)
100 struct ieee80211_tx_rate
*r
= &info
->control
.rates
[0];
102 info
->antenna_sel_tx
=
103 ((rate_n_flags
& RATE_MCS_ANT_ABC_MSK
) >> RATE_MCS_ANT_POS
);
104 if (rate_n_flags
& RATE_MCS_HT_MSK
)
105 r
->flags
|= IEEE80211_TX_RC_MCS
;
106 if (rate_n_flags
& RATE_MCS_GF_MSK
)
107 r
->flags
|= IEEE80211_TX_RC_GREEN_FIELD
;
108 if (rate_n_flags
& RATE_MCS_FAT_MSK
)
109 r
->flags
|= IEEE80211_TX_RC_40_MHZ_WIDTH
;
110 if (rate_n_flags
& RATE_MCS_DUP_MSK
)
111 r
->flags
|= IEEE80211_TX_RC_DUP_DATA
;
112 if (rate_n_flags
& RATE_MCS_SGI_MSK
)
113 r
->flags
|= IEEE80211_TX_RC_SHORT_GI
;
114 rate_index
= iwl_hwrate_to_plcp_idx(rate_n_flags
);
115 if (info
->band
== IEEE80211_BAND_5GHZ
)
116 rate_index
-= IWL_FIRST_OFDM_RATE
;
119 EXPORT_SYMBOL(iwl_hwrate_to_tx_control
);
121 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags
)
126 if (rate_n_flags
& RATE_MCS_HT_MSK
) {
127 idx
= (rate_n_flags
& 0xff);
129 if (idx
>= IWL_RATE_MIMO3_6M_PLCP
)
130 idx
= idx
- IWL_RATE_MIMO3_6M_PLCP
;
131 else if (idx
>= IWL_RATE_MIMO2_6M_PLCP
)
132 idx
= idx
- IWL_RATE_MIMO2_6M_PLCP
;
134 idx
+= IWL_FIRST_OFDM_RATE
;
135 /* skip 9M not supported in ht*/
136 if (idx
>= IWL_RATE_9M_INDEX
)
138 if ((idx
>= IWL_FIRST_OFDM_RATE
) && (idx
<= IWL_LAST_OFDM_RATE
))
141 /* legacy rate format, search for match in table */
143 for (idx
= 0; idx
< ARRAY_SIZE(iwl_rates
); idx
++)
144 if (iwl_rates
[idx
].plcp
== (rate_n_flags
& 0xFF))
150 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx
);
152 u8
iwl_toggle_tx_ant(struct iwl_priv
*priv
, u8 ant
)
156 for (i
= 0; i
< RATE_ANT_NUM
- 1; i
++) {
157 ind
= (ind
+ 1) < RATE_ANT_NUM
? ind
+ 1 : 0;
158 if (priv
->hw_params
.valid_tx_ant
& BIT(ind
))
164 const u8 iwl_bcast_addr
[ETH_ALEN
] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
165 EXPORT_SYMBOL(iwl_bcast_addr
);
168 /* This function both allocates and initializes hw and priv. */
169 struct ieee80211_hw
*iwl_alloc_all(struct iwl_cfg
*cfg
,
170 struct ieee80211_ops
*hw_ops
)
172 struct iwl_priv
*priv
;
174 /* mac80211 allocates memory for this device instance, including
175 * space for this driver's private structure */
176 struct ieee80211_hw
*hw
=
177 ieee80211_alloc_hw(sizeof(struct iwl_priv
), hw_ops
);
179 printk(KERN_ERR
"%s: Can not allocate network device\n",
190 EXPORT_SYMBOL(iwl_alloc_all
);
192 void iwl_hw_detect(struct iwl_priv
*priv
)
194 priv
->hw_rev
= _iwl_read32(priv
, CSR_HW_REV
);
195 priv
->hw_wa_rev
= _iwl_read32(priv
, CSR_HW_REV_WA_REG
);
196 pci_read_config_byte(priv
->pci_dev
, PCI_REVISION_ID
, &priv
->rev_id
);
198 EXPORT_SYMBOL(iwl_hw_detect
);
200 int iwl_hw_nic_init(struct iwl_priv
*priv
)
203 struct iwl_rx_queue
*rxq
= &priv
->rxq
;
207 spin_lock_irqsave(&priv
->lock
, flags
);
208 priv
->cfg
->ops
->lib
->apm_ops
.init(priv
);
209 iwl_write32(priv
, CSR_INT_COALESCING
, 512 / 32);
210 spin_unlock_irqrestore(&priv
->lock
, flags
);
212 ret
= priv
->cfg
->ops
->lib
->apm_ops
.set_pwr_src(priv
, IWL_PWR_SRC_VMAIN
);
214 priv
->cfg
->ops
->lib
->apm_ops
.config(priv
);
216 /* Allocate the RX queue, or reset if it is already allocated */
218 ret
= iwl_rx_queue_alloc(priv
);
220 IWL_ERR(priv
, "Unable to initialize Rx queue\n");
224 iwl_rx_queue_reset(priv
, rxq
);
226 iwl_rx_replenish(priv
);
228 iwl_rx_init(priv
, rxq
);
230 spin_lock_irqsave(&priv
->lock
, flags
);
232 rxq
->need_update
= 1;
233 iwl_rx_queue_update_write_ptr(priv
, rxq
);
235 spin_unlock_irqrestore(&priv
->lock
, flags
);
237 /* Allocate and init all Tx and Command queues */
238 ret
= iwl_txq_ctx_reset(priv
);
242 set_bit(STATUS_INIT
, &priv
->status
);
246 EXPORT_SYMBOL(iwl_hw_nic_init
);
251 void iwl_activate_qos(struct iwl_priv
*priv
, u8 force
)
253 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
))
256 priv
->qos_data
.def_qos_parm
.qos_flags
= 0;
258 if (priv
->qos_data
.qos_cap
.q_AP
.queue_request
&&
259 !priv
->qos_data
.qos_cap
.q_AP
.txop_request
)
260 priv
->qos_data
.def_qos_parm
.qos_flags
|=
261 QOS_PARAM_FLG_TXOP_TYPE_MSK
;
262 if (priv
->qos_data
.qos_active
)
263 priv
->qos_data
.def_qos_parm
.qos_flags
|=
264 QOS_PARAM_FLG_UPDATE_EDCA_MSK
;
266 if (priv
->current_ht_config
.is_ht
)
267 priv
->qos_data
.def_qos_parm
.qos_flags
|= QOS_PARAM_FLG_TGN_MSK
;
269 if (force
|| iwl_is_associated(priv
)) {
270 IWL_DEBUG_QOS(priv
, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
271 priv
->qos_data
.qos_active
,
272 priv
->qos_data
.def_qos_parm
.qos_flags
);
274 iwl_send_cmd_pdu_async(priv
, REPLY_QOS_PARAM
,
275 sizeof(struct iwl_qosparam_cmd
),
276 &priv
->qos_data
.def_qos_parm
, NULL
);
279 EXPORT_SYMBOL(iwl_activate_qos
);
282 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
283 * (802.11b) (802.11a/g)
284 * AC_BK 15 1023 7 0 0
285 * AC_BE 15 1023 3 0 0
286 * AC_VI 7 15 2 6.016ms 3.008ms
287 * AC_VO 3 7 2 3.264ms 1.504ms
289 void iwl_reset_qos(struct iwl_priv
*priv
)
294 bool is_legacy
= false;
298 spin_lock_irqsave(&priv
->lock
, flags
);
299 /* QoS always active in AP and ADHOC mode
300 * In STA mode wait for association
302 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
||
303 priv
->iw_mode
== NL80211_IFTYPE_AP
)
304 priv
->qos_data
.qos_active
= 1;
306 priv
->qos_data
.qos_active
= 0;
308 /* check for legacy mode */
309 if ((priv
->iw_mode
== NL80211_IFTYPE_ADHOC
&&
310 (priv
->active_rate
& IWL_OFDM_RATES_MASK
) == 0) ||
311 (priv
->iw_mode
== NL80211_IFTYPE_STATION
&&
312 (priv
->staging_rxon
.flags
& RXON_FLG_SHORT_SLOT_MSK
) == 0)) {
317 if (priv
->qos_data
.qos_active
)
321 priv
->qos_data
.def_qos_parm
.ac
[0].cw_min
= cpu_to_le16(cw_min
);
322 priv
->qos_data
.def_qos_parm
.ac
[0].cw_max
= cpu_to_le16(cw_max
);
323 priv
->qos_data
.def_qos_parm
.ac
[0].aifsn
= aifs
;
324 priv
->qos_data
.def_qos_parm
.ac
[0].edca_txop
= 0;
325 priv
->qos_data
.def_qos_parm
.ac
[0].reserved1
= 0;
327 if (priv
->qos_data
.qos_active
) {
330 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
= cpu_to_le16(cw_min
);
331 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
= cpu_to_le16(cw_max
);
332 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= 7;
333 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
= 0;
334 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
338 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
=
339 cpu_to_le16((cw_min
+ 1) / 2 - 1);
340 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
=
342 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= 2;
344 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
347 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
349 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
353 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
=
354 cpu_to_le16((cw_min
+ 1) / 4 - 1);
355 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
=
356 cpu_to_le16((cw_min
+ 1) / 2 - 1);
357 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= 2;
358 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
360 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
363 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
366 for (i
= 1; i
< 4; i
++) {
367 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
=
369 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
=
371 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= aifs
;
372 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
= 0;
373 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
376 IWL_DEBUG_QOS(priv
, "set QoS to default \n");
378 spin_unlock_irqrestore(&priv
->lock
, flags
);
380 EXPORT_SYMBOL(iwl_reset_qos
);
382 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
383 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
384 static void iwlcore_init_ht_hw_capab(const struct iwl_priv
*priv
,
385 struct ieee80211_sta_ht_cap
*ht_info
,
386 enum ieee80211_band band
)
388 u16 max_bit_rate
= 0;
389 u8 rx_chains_num
= priv
->hw_params
.rx_chains_num
;
390 u8 tx_chains_num
= priv
->hw_params
.tx_chains_num
;
393 memset(&ht_info
->mcs
, 0, sizeof(ht_info
->mcs
));
395 ht_info
->ht_supported
= true;
397 ht_info
->cap
|= IEEE80211_HT_CAP_GRN_FLD
;
398 ht_info
->cap
|= IEEE80211_HT_CAP_SGI_20
;
399 ht_info
->cap
|= (IEEE80211_HT_CAP_SM_PS
&
400 (WLAN_HT_CAP_SM_PS_DISABLED
<< 2));
402 max_bit_rate
= MAX_BIT_RATE_20_MHZ
;
403 if (priv
->hw_params
.fat_channel
& BIT(band
)) {
404 ht_info
->cap
|= IEEE80211_HT_CAP_SUP_WIDTH_20_40
;
405 ht_info
->cap
|= IEEE80211_HT_CAP_SGI_40
;
406 ht_info
->mcs
.rx_mask
[4] = 0x01;
407 max_bit_rate
= MAX_BIT_RATE_40_MHZ
;
410 if (priv
->cfg
->mod_params
->amsdu_size_8K
)
411 ht_info
->cap
|= IEEE80211_HT_CAP_MAX_AMSDU
;
413 ht_info
->ampdu_factor
= CFG_HT_RX_AMPDU_FACTOR_DEF
;
414 ht_info
->ampdu_density
= CFG_HT_MPDU_DENSITY_DEF
;
416 ht_info
->mcs
.rx_mask
[0] = 0xFF;
417 if (rx_chains_num
>= 2)
418 ht_info
->mcs
.rx_mask
[1] = 0xFF;
419 if (rx_chains_num
>= 3)
420 ht_info
->mcs
.rx_mask
[2] = 0xFF;
422 /* Highest supported Rx data rate */
423 max_bit_rate
*= rx_chains_num
;
424 WARN_ON(max_bit_rate
& ~IEEE80211_HT_MCS_RX_HIGHEST_MASK
);
425 ht_info
->mcs
.rx_highest
= cpu_to_le16(max_bit_rate
);
427 /* Tx MCS capabilities */
428 ht_info
->mcs
.tx_params
= IEEE80211_HT_MCS_TX_DEFINED
;
429 if (tx_chains_num
!= rx_chains_num
) {
430 ht_info
->mcs
.tx_params
|= IEEE80211_HT_MCS_TX_RX_DIFF
;
431 ht_info
->mcs
.tx_params
|= ((tx_chains_num
- 1) <<
432 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT
);
436 static void iwlcore_init_hw_rates(struct iwl_priv
*priv
,
437 struct ieee80211_rate
*rates
)
441 for (i
= 0; i
< IWL_RATE_COUNT
; i
++) {
442 rates
[i
].bitrate
= iwl_rates
[i
].ieee
* 5;
443 rates
[i
].hw_value
= i
; /* Rate scaling will work on indexes */
444 rates
[i
].hw_value_short
= i
;
446 if ((i
> IWL_LAST_OFDM_RATE
) || (i
< IWL_FIRST_OFDM_RATE
)) {
448 * If CCK != 1M then set short preamble rate flag.
451 (iwl_rates
[i
].plcp
== IWL_RATE_1M_PLCP
) ?
452 0 : IEEE80211_RATE_SHORT_PREAMBLE
;
459 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
461 int iwlcore_init_geos(struct iwl_priv
*priv
)
463 struct iwl_channel_info
*ch
;
464 struct ieee80211_supported_band
*sband
;
465 struct ieee80211_channel
*channels
;
466 struct ieee80211_channel
*geo_ch
;
467 struct ieee80211_rate
*rates
;
470 if (priv
->bands
[IEEE80211_BAND_2GHZ
].n_bitrates
||
471 priv
->bands
[IEEE80211_BAND_5GHZ
].n_bitrates
) {
472 IWL_DEBUG_INFO(priv
, "Geography modes already initialized.\n");
473 set_bit(STATUS_GEO_CONFIGURED
, &priv
->status
);
477 channels
= kzalloc(sizeof(struct ieee80211_channel
) *
478 priv
->channel_count
, GFP_KERNEL
);
482 rates
= kzalloc((sizeof(struct ieee80211_rate
) * (IWL_RATE_COUNT
+ 1)),
489 /* 5.2GHz channels start after the 2.4GHz channels */
490 sband
= &priv
->bands
[IEEE80211_BAND_5GHZ
];
491 sband
->channels
= &channels
[ARRAY_SIZE(iwl_eeprom_band_1
)];
493 sband
->bitrates
= &rates
[IWL_FIRST_OFDM_RATE
];
494 sband
->n_bitrates
= IWL_RATE_COUNT
- IWL_FIRST_OFDM_RATE
;
496 if (priv
->cfg
->sku
& IWL_SKU_N
)
497 iwlcore_init_ht_hw_capab(priv
, &sband
->ht_cap
,
498 IEEE80211_BAND_5GHZ
);
500 sband
= &priv
->bands
[IEEE80211_BAND_2GHZ
];
501 sband
->channels
= channels
;
503 sband
->bitrates
= rates
;
504 sband
->n_bitrates
= IWL_RATE_COUNT
;
506 if (priv
->cfg
->sku
& IWL_SKU_N
)
507 iwlcore_init_ht_hw_capab(priv
, &sband
->ht_cap
,
508 IEEE80211_BAND_2GHZ
);
510 priv
->ieee_channels
= channels
;
511 priv
->ieee_rates
= rates
;
513 for (i
= 0; i
< priv
->channel_count
; i
++) {
514 ch
= &priv
->channel_info
[i
];
516 /* FIXME: might be removed if scan is OK */
517 if (!is_channel_valid(ch
))
520 if (is_channel_a_band(ch
))
521 sband
= &priv
->bands
[IEEE80211_BAND_5GHZ
];
523 sband
= &priv
->bands
[IEEE80211_BAND_2GHZ
];
525 geo_ch
= &sband
->channels
[sband
->n_channels
++];
527 geo_ch
->center_freq
=
528 ieee80211_channel_to_frequency(ch
->channel
);
529 geo_ch
->max_power
= ch
->max_power_avg
;
530 geo_ch
->max_antenna_gain
= 0xff;
531 geo_ch
->hw_value
= ch
->channel
;
533 if (is_channel_valid(ch
)) {
534 if (!(ch
->flags
& EEPROM_CHANNEL_IBSS
))
535 geo_ch
->flags
|= IEEE80211_CHAN_NO_IBSS
;
537 if (!(ch
->flags
& EEPROM_CHANNEL_ACTIVE
))
538 geo_ch
->flags
|= IEEE80211_CHAN_PASSIVE_SCAN
;
540 if (ch
->flags
& EEPROM_CHANNEL_RADAR
)
541 geo_ch
->flags
|= IEEE80211_CHAN_RADAR
;
543 geo_ch
->flags
|= ch
->fat_extension_channel
;
545 if (ch
->max_power_avg
> priv
->tx_power_channel_lmt
)
546 priv
->tx_power_channel_lmt
= ch
->max_power_avg
;
548 geo_ch
->flags
|= IEEE80211_CHAN_DISABLED
;
551 /* Save flags for reg domain usage */
552 geo_ch
->orig_flags
= geo_ch
->flags
;
554 IWL_DEBUG_INFO(priv
, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
555 ch
->channel
, geo_ch
->center_freq
,
556 is_channel_a_band(ch
) ? "5.2" : "2.4",
557 geo_ch
->flags
& IEEE80211_CHAN_DISABLED
?
558 "restricted" : "valid",
562 if ((priv
->bands
[IEEE80211_BAND_5GHZ
].n_channels
== 0) &&
563 priv
->cfg
->sku
& IWL_SKU_A
) {
564 IWL_INFO(priv
, "Incorrectly detected BG card as ABG. "
565 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
566 priv
->pci_dev
->device
,
567 priv
->pci_dev
->subsystem_device
);
568 priv
->cfg
->sku
&= ~IWL_SKU_A
;
571 IWL_INFO(priv
, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
572 priv
->bands
[IEEE80211_BAND_2GHZ
].n_channels
,
573 priv
->bands
[IEEE80211_BAND_5GHZ
].n_channels
);
575 set_bit(STATUS_GEO_CONFIGURED
, &priv
->status
);
579 EXPORT_SYMBOL(iwlcore_init_geos
);
582 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
584 void iwlcore_free_geos(struct iwl_priv
*priv
)
586 kfree(priv
->ieee_channels
);
587 kfree(priv
->ieee_rates
);
588 clear_bit(STATUS_GEO_CONFIGURED
, &priv
->status
);
590 EXPORT_SYMBOL(iwlcore_free_geos
);
592 static bool is_single_rx_stream(struct iwl_priv
*priv
)
594 return !priv
->current_ht_config
.is_ht
||
595 ((priv
->current_ht_config
.mcs
.rx_mask
[1] == 0) &&
596 (priv
->current_ht_config
.mcs
.rx_mask
[2] == 0));
599 static u8
iwl_is_channel_extension(struct iwl_priv
*priv
,
600 enum ieee80211_band band
,
601 u16 channel
, u8 extension_chan_offset
)
603 const struct iwl_channel_info
*ch_info
;
605 ch_info
= iwl_get_channel_info(priv
, band
, channel
);
606 if (!is_channel_valid(ch_info
))
609 if (extension_chan_offset
== IEEE80211_HT_PARAM_CHA_SEC_ABOVE
)
610 return !(ch_info
->fat_extension_channel
&
611 IEEE80211_CHAN_NO_HT40PLUS
);
612 else if (extension_chan_offset
== IEEE80211_HT_PARAM_CHA_SEC_BELOW
)
613 return !(ch_info
->fat_extension_channel
&
614 IEEE80211_CHAN_NO_HT40MINUS
);
619 u8
iwl_is_fat_tx_allowed(struct iwl_priv
*priv
,
620 struct ieee80211_sta_ht_cap
*sta_ht_inf
)
622 struct iwl_ht_info
*iwl_ht_conf
= &priv
->current_ht_config
;
624 if ((!iwl_ht_conf
->is_ht
) ||
625 (iwl_ht_conf
->supported_chan_width
!= IWL_CHANNEL_WIDTH_40MHZ
))
628 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
629 * the bit will not set if it is pure 40MHz case
632 if (!sta_ht_inf
->ht_supported
)
635 return iwl_is_channel_extension(priv
, priv
->band
,
636 le16_to_cpu(priv
->staging_rxon
.channel
),
637 iwl_ht_conf
->extension_chan_offset
);
639 EXPORT_SYMBOL(iwl_is_fat_tx_allowed
);
641 static u16
iwl_adjust_beacon_interval(u16 beacon_val
, u16 max_beacon_val
)
644 u16 beacon_factor
= 0;
646 beacon_factor
= (beacon_val
+ max_beacon_val
) / max_beacon_val
;
647 new_val
= beacon_val
/ beacon_factor
;
650 new_val
= max_beacon_val
;
655 void iwl_setup_rxon_timing(struct iwl_priv
*priv
)
658 s32 interval_tm
, rem
;
660 struct ieee80211_conf
*conf
= NULL
;
663 conf
= ieee80211_get_hw_conf(priv
->hw
);
665 spin_lock_irqsave(&priv
->lock
, flags
);
666 priv
->rxon_timing
.timestamp
= cpu_to_le64(priv
->timestamp
);
667 priv
->rxon_timing
.listen_interval
= cpu_to_le16(conf
->listen_interval
);
669 if (priv
->iw_mode
== NL80211_IFTYPE_STATION
) {
670 beacon_int
= priv
->beacon_int
;
671 priv
->rxon_timing
.atim_window
= 0;
673 beacon_int
= priv
->vif
->bss_conf
.beacon_int
;
675 /* TODO: we need to get atim_window from upper stack
676 * for now we set to 0 */
677 priv
->rxon_timing
.atim_window
= 0;
680 beacon_int
= iwl_adjust_beacon_interval(beacon_int
,
681 priv
->hw_params
.max_beacon_itrvl
* 1024);
682 priv
->rxon_timing
.beacon_interval
= cpu_to_le16(beacon_int
);
684 tsf
= priv
->timestamp
; /* tsf is modifed by do_div: copy it */
685 interval_tm
= beacon_int
* 1024;
686 rem
= do_div(tsf
, interval_tm
);
687 priv
->rxon_timing
.beacon_init_val
= cpu_to_le32(interval_tm
- rem
);
689 spin_unlock_irqrestore(&priv
->lock
, flags
);
690 IWL_DEBUG_ASSOC(priv
,
691 "beacon interval %d beacon timer %d beacon tim %d\n",
692 le16_to_cpu(priv
->rxon_timing
.beacon_interval
),
693 le32_to_cpu(priv
->rxon_timing
.beacon_init_val
),
694 le16_to_cpu(priv
->rxon_timing
.atim_window
));
696 EXPORT_SYMBOL(iwl_setup_rxon_timing
);
698 void iwl_set_rxon_hwcrypto(struct iwl_priv
*priv
, int hw_decrypt
)
700 struct iwl_rxon_cmd
*rxon
= &priv
->staging_rxon
;
703 rxon
->filter_flags
&= ~RXON_FILTER_DIS_DECRYPT_MSK
;
705 rxon
->filter_flags
|= RXON_FILTER_DIS_DECRYPT_MSK
;
708 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto
);
711 * iwl_check_rxon_cmd - validate RXON structure is valid
713 * NOTE: This is really only useful during development and can eventually
714 * be #ifdef'd out once the driver is stable and folks aren't actively
717 int iwl_check_rxon_cmd(struct iwl_priv
*priv
)
721 struct iwl_rxon_cmd
*rxon
= &priv
->staging_rxon
;
723 if (rxon
->flags
& RXON_FLG_BAND_24G_MSK
) {
724 error
|= le32_to_cpu(rxon
->flags
&
725 (RXON_FLG_TGJ_NARROW_BAND_MSK
|
726 RXON_FLG_RADAR_DETECT_MSK
));
728 IWL_WARN(priv
, "check 24G fields %d | %d\n",
731 error
|= (rxon
->flags
& RXON_FLG_SHORT_SLOT_MSK
) ?
732 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK
);
734 IWL_WARN(priv
, "check 52 fields %d | %d\n",
736 error
|= le32_to_cpu(rxon
->flags
& RXON_FLG_CCK_MSK
);
738 IWL_WARN(priv
, "check 52 CCK %d | %d\n",
741 error
|= (rxon
->node_addr
[0] | rxon
->bssid_addr
[0]) & 0x1;
743 IWL_WARN(priv
, "check mac addr %d | %d\n", counter
++, error
);
745 /* make sure basic rates 6Mbps and 1Mbps are supported */
746 error
|= (((rxon
->ofdm_basic_rates
& IWL_RATE_6M_MASK
) == 0) &&
747 ((rxon
->cck_basic_rates
& IWL_RATE_1M_MASK
) == 0));
749 IWL_WARN(priv
, "check basic rate %d | %d\n", counter
++, error
);
751 error
|= (le16_to_cpu(rxon
->assoc_id
) > 2007);
753 IWL_WARN(priv
, "check assoc id %d | %d\n", counter
++, error
);
755 error
|= ((rxon
->flags
& (RXON_FLG_CCK_MSK
| RXON_FLG_SHORT_SLOT_MSK
))
756 == (RXON_FLG_CCK_MSK
| RXON_FLG_SHORT_SLOT_MSK
));
758 IWL_WARN(priv
, "check CCK and short slot %d | %d\n",
761 error
|= ((rxon
->flags
& (RXON_FLG_CCK_MSK
| RXON_FLG_AUTO_DETECT_MSK
))
762 == (RXON_FLG_CCK_MSK
| RXON_FLG_AUTO_DETECT_MSK
));
764 IWL_WARN(priv
, "check CCK & auto detect %d | %d\n",
767 error
|= ((rxon
->flags
& (RXON_FLG_AUTO_DETECT_MSK
|
768 RXON_FLG_TGG_PROTECT_MSK
)) == RXON_FLG_TGG_PROTECT_MSK
);
770 IWL_WARN(priv
, "check TGG and auto detect %d | %d\n",
774 IWL_WARN(priv
, "Tuning to channel %d\n",
775 le16_to_cpu(rxon
->channel
));
778 IWL_ERR(priv
, "Not a valid iwl_rxon_assoc_cmd field values\n");
783 EXPORT_SYMBOL(iwl_check_rxon_cmd
);
786 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
787 * @priv: staging_rxon is compared to active_rxon
789 * If the RXON structure is changing enough to require a new tune,
790 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
791 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
793 int iwl_full_rxon_required(struct iwl_priv
*priv
)
796 /* These items are only settable from the full RXON command */
797 if (!(iwl_is_associated(priv
)) ||
798 compare_ether_addr(priv
->staging_rxon
.bssid_addr
,
799 priv
->active_rxon
.bssid_addr
) ||
800 compare_ether_addr(priv
->staging_rxon
.node_addr
,
801 priv
->active_rxon
.node_addr
) ||
802 compare_ether_addr(priv
->staging_rxon
.wlap_bssid_addr
,
803 priv
->active_rxon
.wlap_bssid_addr
) ||
804 (priv
->staging_rxon
.dev_type
!= priv
->active_rxon
.dev_type
) ||
805 (priv
->staging_rxon
.channel
!= priv
->active_rxon
.channel
) ||
806 (priv
->staging_rxon
.air_propagation
!=
807 priv
->active_rxon
.air_propagation
) ||
808 (priv
->staging_rxon
.ofdm_ht_single_stream_basic_rates
!=
809 priv
->active_rxon
.ofdm_ht_single_stream_basic_rates
) ||
810 (priv
->staging_rxon
.ofdm_ht_dual_stream_basic_rates
!=
811 priv
->active_rxon
.ofdm_ht_dual_stream_basic_rates
) ||
812 (priv
->staging_rxon
.ofdm_ht_triple_stream_basic_rates
!=
813 priv
->active_rxon
.ofdm_ht_triple_stream_basic_rates
) ||
814 (priv
->staging_rxon
.assoc_id
!= priv
->active_rxon
.assoc_id
))
817 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
818 * be updated with the RXON_ASSOC command -- however only some
819 * flag transitions are allowed using RXON_ASSOC */
821 /* Check if we are not switching bands */
822 if ((priv
->staging_rxon
.flags
& RXON_FLG_BAND_24G_MSK
) !=
823 (priv
->active_rxon
.flags
& RXON_FLG_BAND_24G_MSK
))
826 /* Check if we are switching association toggle */
827 if ((priv
->staging_rxon
.filter_flags
& RXON_FILTER_ASSOC_MSK
) !=
828 (priv
->active_rxon
.filter_flags
& RXON_FILTER_ASSOC_MSK
))
833 EXPORT_SYMBOL(iwl_full_rxon_required
);
835 u8
iwl_rate_get_lowest_plcp(struct iwl_priv
*priv
)
841 if (priv
->staging_rxon
.flags
& RXON_FLG_BAND_24G_MSK
)
842 rate_mask
= priv
->active_rate_basic
& IWL_CCK_RATES_MASK
;
844 rate_mask
= priv
->active_rate_basic
& IWL_OFDM_RATES_MASK
;
846 /* Find lowest valid rate */
847 for (i
= IWL_RATE_1M_INDEX
; i
!= IWL_RATE_INVALID
;
848 i
= iwl_rates
[i
].next_ieee
) {
849 if (rate_mask
& (1 << i
))
850 return iwl_rates
[i
].plcp
;
853 /* No valid rate was found. Assign the lowest one */
854 if (priv
->staging_rxon
.flags
& RXON_FLG_BAND_24G_MSK
)
855 return IWL_RATE_1M_PLCP
;
857 return IWL_RATE_6M_PLCP
;
859 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp
);
861 void iwl_set_rxon_ht(struct iwl_priv
*priv
, struct iwl_ht_info
*ht_info
)
863 struct iwl_rxon_cmd
*rxon
= &priv
->staging_rxon
;
865 if (!ht_info
->is_ht
) {
866 rxon
->flags
&= ~(RXON_FLG_CHANNEL_MODE_MSK
|
867 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
|
868 RXON_FLG_FAT_PROT_MSK
|
869 RXON_FLG_HT_PROT_MSK
);
873 /* FIXME: if the definition of ht_protection changed, the "translation"
874 * will be needed for rxon->flags
876 rxon
->flags
|= cpu_to_le32(ht_info
->ht_protection
<< RXON_FLG_HT_OPERATING_MODE_POS
);
878 /* Set up channel bandwidth:
879 * 20 MHz only, 20/40 mixed or pure 40 if fat ok */
880 /* clear the HT channel mode before set the mode */
881 rxon
->flags
&= ~(RXON_FLG_CHANNEL_MODE_MSK
|
882 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
);
883 if (iwl_is_fat_tx_allowed(priv
, NULL
)) {
885 if (ht_info
->ht_protection
== IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
) {
886 rxon
->flags
|= RXON_FLG_CHANNEL_MODE_PURE_40
;
887 /* Note: control channel is opposite of extension channel */
888 switch (ht_info
->extension_chan_offset
) {
889 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE
:
890 rxon
->flags
&= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
;
892 case IEEE80211_HT_PARAM_CHA_SEC_BELOW
:
893 rxon
->flags
|= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
;
897 /* Note: control channel is opposite of extension channel */
898 switch (ht_info
->extension_chan_offset
) {
899 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE
:
900 rxon
->flags
&= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
);
901 rxon
->flags
|= RXON_FLG_CHANNEL_MODE_MIXED
;
903 case IEEE80211_HT_PARAM_CHA_SEC_BELOW
:
904 rxon
->flags
|= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
;
905 rxon
->flags
|= RXON_FLG_CHANNEL_MODE_MIXED
;
907 case IEEE80211_HT_PARAM_CHA_SEC_NONE
:
909 /* channel location only valid if in Mixed mode */
910 IWL_ERR(priv
, "invalid extension channel offset\n");
915 rxon
->flags
|= RXON_FLG_CHANNEL_MODE_LEGACY
;
918 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
919 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
);
921 IWL_DEBUG_ASSOC(priv
, "supported HT rate 0x%X 0x%X 0x%X "
922 "rxon flags 0x%X operation mode :0x%X "
923 "extension channel offset 0x%x\n",
924 ht_info
->mcs
.rx_mask
[0],
925 ht_info
->mcs
.rx_mask
[1],
926 ht_info
->mcs
.rx_mask
[2],
927 le32_to_cpu(rxon
->flags
), ht_info
->ht_protection
,
928 ht_info
->extension_chan_offset
);
931 EXPORT_SYMBOL(iwl_set_rxon_ht
);
933 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
934 #define IWL_NUM_RX_CHAINS_SINGLE 2
935 #define IWL_NUM_IDLE_CHAINS_DUAL 2
936 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
938 /* Determine how many receiver/antenna chains to use.
939 * More provides better reception via diversity. Fewer saves power.
940 * MIMO (dual stream) requires at least 2, but works better with 3.
941 * This does not determine *which* chains to use, just how many.
943 static int iwl_get_active_rx_chain_count(struct iwl_priv
*priv
)
945 bool is_single
= is_single_rx_stream(priv
);
946 bool is_cam
= !test_bit(STATUS_POWER_PMI
, &priv
->status
);
948 /* # of Rx chains to use when expecting MIMO. */
949 if (is_single
|| (!is_cam
&& (priv
->current_ht_config
.sm_ps
==
950 WLAN_HT_CAP_SM_PS_STATIC
)))
951 return IWL_NUM_RX_CHAINS_SINGLE
;
953 return IWL_NUM_RX_CHAINS_MULTIPLE
;
956 static int iwl_get_idle_rx_chain_count(struct iwl_priv
*priv
, int active_cnt
)
959 bool is_cam
= !test_bit(STATUS_POWER_PMI
, &priv
->status
);
960 /* # Rx chains when idling and maybe trying to save power */
961 switch (priv
->current_ht_config
.sm_ps
) {
962 case WLAN_HT_CAP_SM_PS_STATIC
:
963 case WLAN_HT_CAP_SM_PS_DYNAMIC
:
964 idle_cnt
= (is_cam
) ? IWL_NUM_IDLE_CHAINS_DUAL
:
965 IWL_NUM_IDLE_CHAINS_SINGLE
;
967 case WLAN_HT_CAP_SM_PS_DISABLED
:
968 idle_cnt
= (is_cam
) ? active_cnt
: IWL_NUM_IDLE_CHAINS_SINGLE
;
970 case WLAN_HT_CAP_SM_PS_INVALID
:
972 IWL_ERR(priv
, "invalid mimo ps mode %d\n",
973 priv
->current_ht_config
.sm_ps
);
982 static u8
iwl_count_chain_bitmap(u32 chain_bitmap
)
985 res
= (chain_bitmap
& BIT(0)) >> 0;
986 res
+= (chain_bitmap
& BIT(1)) >> 1;
987 res
+= (chain_bitmap
& BIT(2)) >> 2;
988 res
+= (chain_bitmap
& BIT(4)) >> 4;
993 * iwl_is_monitor_mode - Determine if interface in monitor mode
995 * priv->iw_mode is set in add_interface, but add_interface is
996 * never called for monitor mode. The only way mac80211 informs us about
997 * monitor mode is through configuring filters (call to configure_filter).
999 bool iwl_is_monitor_mode(struct iwl_priv
*priv
)
1001 return !!(priv
->staging_rxon
.filter_flags
& RXON_FILTER_PROMISC_MSK
);
1003 EXPORT_SYMBOL(iwl_is_monitor_mode
);
1006 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1008 * Selects how many and which Rx receivers/antennas/chains to use.
1009 * This should not be used for scan command ... it puts data in wrong place.
1011 void iwl_set_rxon_chain(struct iwl_priv
*priv
)
1013 bool is_single
= is_single_rx_stream(priv
);
1014 bool is_cam
= !test_bit(STATUS_POWER_PMI
, &priv
->status
);
1015 u8 idle_rx_cnt
, active_rx_cnt
, valid_rx_cnt
;
1019 /* Tell uCode which antennas are actually connected.
1020 * Before first association, we assume all antennas are connected.
1021 * Just after first association, iwl_chain_noise_calibration()
1022 * checks which antennas actually *are* connected. */
1023 if (priv
->chain_noise_data
.active_chains
)
1024 active_chains
= priv
->chain_noise_data
.active_chains
;
1026 active_chains
= priv
->hw_params
.valid_rx_ant
;
1028 rx_chain
= active_chains
<< RXON_RX_CHAIN_VALID_POS
;
1030 /* How many receivers should we use? */
1031 active_rx_cnt
= iwl_get_active_rx_chain_count(priv
);
1032 idle_rx_cnt
= iwl_get_idle_rx_chain_count(priv
, active_rx_cnt
);
1035 /* correct rx chain count according hw settings
1036 * and chain noise calibration
1038 valid_rx_cnt
= iwl_count_chain_bitmap(active_chains
);
1039 if (valid_rx_cnt
< active_rx_cnt
)
1040 active_rx_cnt
= valid_rx_cnt
;
1042 if (valid_rx_cnt
< idle_rx_cnt
)
1043 idle_rx_cnt
= valid_rx_cnt
;
1045 rx_chain
|= active_rx_cnt
<< RXON_RX_CHAIN_MIMO_CNT_POS
;
1046 rx_chain
|= idle_rx_cnt
<< RXON_RX_CHAIN_CNT_POS
;
1048 /* copied from 'iwl_bg_request_scan()' */
1049 /* Force use of chains B and C (0x6) for Rx for 4965
1050 * Avoid A (0x1) because of its off-channel reception on A-band.
1051 * MIMO is not used here, but value is required */
1052 if (iwl_is_monitor_mode(priv
) &&
1053 !(priv
->staging_rxon
.flags
& RXON_FLG_BAND_24G_MSK
) &&
1054 ((priv
->hw_rev
& CSR_HW_REV_TYPE_MSK
) == CSR_HW_REV_TYPE_4965
)) {
1055 rx_chain
= ANT_ABC
<< RXON_RX_CHAIN_VALID_POS
;
1056 rx_chain
|= ANT_BC
<< RXON_RX_CHAIN_FORCE_SEL_POS
;
1057 rx_chain
|= ANT_ABC
<< RXON_RX_CHAIN_FORCE_MIMO_SEL_POS
;
1058 rx_chain
|= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS
;
1061 priv
->staging_rxon
.rx_chain
= cpu_to_le16(rx_chain
);
1063 if (!is_single
&& (active_rx_cnt
>= IWL_NUM_RX_CHAINS_SINGLE
) && is_cam
)
1064 priv
->staging_rxon
.rx_chain
|= RXON_RX_CHAIN_MIMO_FORCE_MSK
;
1066 priv
->staging_rxon
.rx_chain
&= ~RXON_RX_CHAIN_MIMO_FORCE_MSK
;
1068 IWL_DEBUG_ASSOC(priv
, "rx_chain=0x%X active=%d idle=%d\n",
1069 priv
->staging_rxon
.rx_chain
,
1070 active_rx_cnt
, idle_rx_cnt
);
1072 WARN_ON(active_rx_cnt
== 0 || idle_rx_cnt
== 0 ||
1073 active_rx_cnt
< idle_rx_cnt
);
1075 EXPORT_SYMBOL(iwl_set_rxon_chain
);
1078 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1079 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1080 * @channel: Any channel valid for the requested phymode
1082 * In addition to setting the staging RXON, priv->phymode is also set.
1084 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1085 * in the staging RXON flag structure based on the phymode
1087 int iwl_set_rxon_channel(struct iwl_priv
*priv
, struct ieee80211_channel
*ch
)
1089 enum ieee80211_band band
= ch
->band
;
1090 u16 channel
= ieee80211_frequency_to_channel(ch
->center_freq
);
1092 if (!iwl_get_channel_info(priv
, band
, channel
)) {
1093 IWL_DEBUG_INFO(priv
, "Could not set channel to %d [%d]\n",
1098 if ((le16_to_cpu(priv
->staging_rxon
.channel
) == channel
) &&
1099 (priv
->band
== band
))
1102 priv
->staging_rxon
.channel
= cpu_to_le16(channel
);
1103 if (band
== IEEE80211_BAND_5GHZ
)
1104 priv
->staging_rxon
.flags
&= ~RXON_FLG_BAND_24G_MSK
;
1106 priv
->staging_rxon
.flags
|= RXON_FLG_BAND_24G_MSK
;
1110 IWL_DEBUG_INFO(priv
, "Staging channel set to %d [%d]\n", channel
, band
);
1114 EXPORT_SYMBOL(iwl_set_rxon_channel
);
1116 void iwl_set_flags_for_band(struct iwl_priv
*priv
,
1117 enum ieee80211_band band
)
1119 if (band
== IEEE80211_BAND_5GHZ
) {
1120 priv
->staging_rxon
.flags
&=
1121 ~(RXON_FLG_BAND_24G_MSK
| RXON_FLG_AUTO_DETECT_MSK
1122 | RXON_FLG_CCK_MSK
);
1123 priv
->staging_rxon
.flags
|= RXON_FLG_SHORT_SLOT_MSK
;
1125 /* Copied from iwl_post_associate() */
1126 if (priv
->assoc_capability
& WLAN_CAPABILITY_SHORT_SLOT_TIME
)
1127 priv
->staging_rxon
.flags
|= RXON_FLG_SHORT_SLOT_MSK
;
1129 priv
->staging_rxon
.flags
&= ~RXON_FLG_SHORT_SLOT_MSK
;
1131 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
)
1132 priv
->staging_rxon
.flags
&= ~RXON_FLG_SHORT_SLOT_MSK
;
1134 priv
->staging_rxon
.flags
|= RXON_FLG_BAND_24G_MSK
;
1135 priv
->staging_rxon
.flags
|= RXON_FLG_AUTO_DETECT_MSK
;
1136 priv
->staging_rxon
.flags
&= ~RXON_FLG_CCK_MSK
;
1139 EXPORT_SYMBOL(iwl_set_flags_for_band
);
1142 * initialize rxon structure with default values from eeprom
1144 void iwl_connection_init_rx_config(struct iwl_priv
*priv
, int mode
)
1146 const struct iwl_channel_info
*ch_info
;
1148 memset(&priv
->staging_rxon
, 0, sizeof(priv
->staging_rxon
));
1151 case NL80211_IFTYPE_AP
:
1152 priv
->staging_rxon
.dev_type
= RXON_DEV_TYPE_AP
;
1155 case NL80211_IFTYPE_STATION
:
1156 priv
->staging_rxon
.dev_type
= RXON_DEV_TYPE_ESS
;
1157 priv
->staging_rxon
.filter_flags
= RXON_FILTER_ACCEPT_GRP_MSK
;
1160 case NL80211_IFTYPE_ADHOC
:
1161 priv
->staging_rxon
.dev_type
= RXON_DEV_TYPE_IBSS
;
1162 priv
->staging_rxon
.flags
= RXON_FLG_SHORT_PREAMBLE_MSK
;
1163 priv
->staging_rxon
.filter_flags
= RXON_FILTER_BCON_AWARE_MSK
|
1164 RXON_FILTER_ACCEPT_GRP_MSK
;
1168 IWL_ERR(priv
, "Unsupported interface type %d\n", mode
);
1173 /* TODO: Figure out when short_preamble would be set and cache from
1175 if (!hw_to_local(priv
->hw
)->short_preamble
)
1176 priv
->staging_rxon
.flags
&= ~RXON_FLG_SHORT_PREAMBLE_MSK
;
1178 priv
->staging_rxon
.flags
|= RXON_FLG_SHORT_PREAMBLE_MSK
;
1181 ch_info
= iwl_get_channel_info(priv
, priv
->band
,
1182 le16_to_cpu(priv
->active_rxon
.channel
));
1185 ch_info
= &priv
->channel_info
[0];
1188 * in some case A channels are all non IBSS
1189 * in this case force B/G channel
1191 if ((priv
->iw_mode
== NL80211_IFTYPE_ADHOC
) &&
1192 !(is_channel_ibss(ch_info
)))
1193 ch_info
= &priv
->channel_info
[0];
1195 priv
->staging_rxon
.channel
= cpu_to_le16(ch_info
->channel
);
1196 priv
->band
= ch_info
->band
;
1198 iwl_set_flags_for_band(priv
, priv
->band
);
1200 priv
->staging_rxon
.ofdm_basic_rates
=
1201 (IWL_OFDM_RATES_MASK
>> IWL_FIRST_OFDM_RATE
) & 0xFF;
1202 priv
->staging_rxon
.cck_basic_rates
=
1203 (IWL_CCK_RATES_MASK
>> IWL_FIRST_CCK_RATE
) & 0xF;
1205 /* clear both MIX and PURE40 mode flag */
1206 priv
->staging_rxon
.flags
&= ~(RXON_FLG_CHANNEL_MODE_MIXED
|
1207 RXON_FLG_CHANNEL_MODE_PURE_40
);
1208 memcpy(priv
->staging_rxon
.node_addr
, priv
->mac_addr
, ETH_ALEN
);
1209 memcpy(priv
->staging_rxon
.wlap_bssid_addr
, priv
->mac_addr
, ETH_ALEN
);
1210 priv
->staging_rxon
.ofdm_ht_single_stream_basic_rates
= 0xff;
1211 priv
->staging_rxon
.ofdm_ht_dual_stream_basic_rates
= 0xff;
1212 priv
->staging_rxon
.ofdm_ht_triple_stream_basic_rates
= 0xff;
1214 EXPORT_SYMBOL(iwl_connection_init_rx_config
);
1216 static void iwl_set_rate(struct iwl_priv
*priv
)
1218 const struct ieee80211_supported_band
*hw
= NULL
;
1219 struct ieee80211_rate
*rate
;
1222 hw
= iwl_get_hw_mode(priv
, priv
->band
);
1224 IWL_ERR(priv
, "Failed to set rate: unable to get hw mode\n");
1228 priv
->active_rate
= 0;
1229 priv
->active_rate_basic
= 0;
1231 for (i
= 0; i
< hw
->n_bitrates
; i
++) {
1232 rate
= &(hw
->bitrates
[i
]);
1233 if (rate
->hw_value
< IWL_RATE_COUNT
)
1234 priv
->active_rate
|= (1 << rate
->hw_value
);
1237 IWL_DEBUG_RATE(priv
, "Set active_rate = %0x, active_rate_basic = %0x\n",
1238 priv
->active_rate
, priv
->active_rate_basic
);
1241 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1242 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1245 if (priv
->active_rate_basic
& IWL_CCK_BASIC_RATES_MASK
)
1246 priv
->staging_rxon
.cck_basic_rates
=
1247 ((priv
->active_rate_basic
&
1248 IWL_CCK_RATES_MASK
) >> IWL_FIRST_CCK_RATE
) & 0xF;
1250 priv
->staging_rxon
.cck_basic_rates
=
1251 (IWL_CCK_BASIC_RATES_MASK
>> IWL_FIRST_CCK_RATE
) & 0xF;
1253 if (priv
->active_rate_basic
& IWL_OFDM_BASIC_RATES_MASK
)
1254 priv
->staging_rxon
.ofdm_basic_rates
=
1255 ((priv
->active_rate_basic
&
1256 (IWL_OFDM_BASIC_RATES_MASK
| IWL_RATE_6M_MASK
)) >>
1257 IWL_FIRST_OFDM_RATE
) & 0xFF;
1259 priv
->staging_rxon
.ofdm_basic_rates
=
1260 (IWL_OFDM_BASIC_RATES_MASK
>> IWL_FIRST_OFDM_RATE
) & 0xFF;
1263 void iwl_rx_csa(struct iwl_priv
*priv
, struct iwl_rx_mem_buffer
*rxb
)
1265 struct iwl_rx_packet
*pkt
= (struct iwl_rx_packet
*)rxb
->skb
->data
;
1266 struct iwl_rxon_cmd
*rxon
= (void *)&priv
->active_rxon
;
1267 struct iwl_csa_notification
*csa
= &(pkt
->u
.csa_notif
);
1268 IWL_DEBUG_11H(priv
, "CSA notif: channel %d, status %d\n",
1269 le16_to_cpu(csa
->channel
), le32_to_cpu(csa
->status
));
1270 rxon
->channel
= csa
->channel
;
1271 priv
->staging_rxon
.channel
= csa
->channel
;
1273 EXPORT_SYMBOL(iwl_rx_csa
);
1275 #ifdef CONFIG_IWLWIFI_DEBUG
1276 static void iwl_print_rx_config_cmd(struct iwl_priv
*priv
)
1278 struct iwl_rxon_cmd
*rxon
= &priv
->staging_rxon
;
1280 IWL_DEBUG_RADIO(priv
, "RX CONFIG:\n");
1281 iwl_print_hex_dump(IWL_DL_RADIO
, (u8
*) rxon
, sizeof(*rxon
));
1282 IWL_DEBUG_RADIO(priv
, "u16 channel: 0x%x\n", le16_to_cpu(rxon
->channel
));
1283 IWL_DEBUG_RADIO(priv
, "u32 flags: 0x%08X\n", le32_to_cpu(rxon
->flags
));
1284 IWL_DEBUG_RADIO(priv
, "u32 filter_flags: 0x%08x\n",
1285 le32_to_cpu(rxon
->filter_flags
));
1286 IWL_DEBUG_RADIO(priv
, "u8 dev_type: 0x%x\n", rxon
->dev_type
);
1287 IWL_DEBUG_RADIO(priv
, "u8 ofdm_basic_rates: 0x%02x\n",
1288 rxon
->ofdm_basic_rates
);
1289 IWL_DEBUG_RADIO(priv
, "u8 cck_basic_rates: 0x%02x\n", rxon
->cck_basic_rates
);
1290 IWL_DEBUG_RADIO(priv
, "u8[6] node_addr: %pM\n", rxon
->node_addr
);
1291 IWL_DEBUG_RADIO(priv
, "u8[6] bssid_addr: %pM\n", rxon
->bssid_addr
);
1292 IWL_DEBUG_RADIO(priv
, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon
->assoc_id
));
1296 static const char *desc_lookup_text
[] = {
1301 "NMI_INTERRUPT_WDG",
1305 "HW_ERROR_TUNE_LOCK",
1306 "HW_ERROR_TEMPERATURE",
1307 "ILLEGAL_CHAN_FREQ",
1310 "NMI_INTERRUPT_HOST",
1311 "NMI_INTERRUPT_ACTION_PT",
1312 "NMI_INTERRUPT_UNKNOWN",
1313 "UCODE_VERSION_MISMATCH",
1314 "HW_ERROR_ABS_LOCK",
1315 "HW_ERROR_CAL_LOCK_FAIL",
1316 "NMI_INTERRUPT_INST_ACTION_PT",
1317 "NMI_INTERRUPT_DATA_ACTION_PT",
1319 "NMI_INTERRUPT_TRM",
1320 "NMI_INTERRUPT_BREAK_POINT"
1328 static const char *desc_lookup(int i
)
1330 int max
= ARRAY_SIZE(desc_lookup_text
) - 1;
1332 if (i
< 0 || i
> max
)
1335 return desc_lookup_text
[i
];
1338 #define ERROR_START_OFFSET (1 * sizeof(u32))
1339 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1341 static void iwl_dump_nic_error_log(struct iwl_priv
*priv
)
1344 u32 desc
, time
, count
, base
, data1
;
1345 u32 blink1
, blink2
, ilink1
, ilink2
;
1347 switch (priv
->ucode_type
) {
1349 base
= le32_to_cpu(priv
->card_alive
.error_event_table_ptr
);
1352 base
= le32_to_cpu(priv
->card_alive_init
.error_event_table_ptr
);
1355 IWL_ERR(priv
, "uCode image not available\n");
1359 if (!priv
->cfg
->ops
->lib
->is_valid_rtc_data_addr(base
)) {
1360 IWL_ERR(priv
, "Not valid error log pointer 0x%08X\n", base
);
1364 count
= iwl_read_targ_mem(priv
, base
);
1366 if (ERROR_START_OFFSET
<= count
* ERROR_ELEM_SIZE
) {
1367 IWL_ERR(priv
, "Start IWL Error Log Dump:\n");
1368 IWL_ERR(priv
, "Status: 0x%08lX, count: %d\n",
1369 priv
->status
, count
);
1372 desc
= iwl_read_targ_mem(priv
, base
+ 1 * sizeof(u32
));
1373 blink1
= iwl_read_targ_mem(priv
, base
+ 3 * sizeof(u32
));
1374 blink2
= iwl_read_targ_mem(priv
, base
+ 4 * sizeof(u32
));
1375 ilink1
= iwl_read_targ_mem(priv
, base
+ 5 * sizeof(u32
));
1376 ilink2
= iwl_read_targ_mem(priv
, base
+ 6 * sizeof(u32
));
1377 data1
= iwl_read_targ_mem(priv
, base
+ 7 * sizeof(u32
));
1378 data2
= iwl_read_targ_mem(priv
, base
+ 8 * sizeof(u32
));
1379 line
= iwl_read_targ_mem(priv
, base
+ 9 * sizeof(u32
));
1380 time
= iwl_read_targ_mem(priv
, base
+ 11 * sizeof(u32
));
1382 IWL_ERR(priv
, "Desc Time "
1383 "data1 data2 line\n");
1384 IWL_ERR(priv
, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1385 desc_lookup(desc
), desc
, time
, data1
, data2
, line
);
1386 IWL_ERR(priv
, "blink1 blink2 ilink1 ilink2\n");
1387 IWL_ERR(priv
, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1
, blink2
,
1392 #define EVENT_START_OFFSET (4 * sizeof(u32))
1395 * iwl_print_event_log - Dump error event log to syslog
1398 static void iwl_print_event_log(struct iwl_priv
*priv
, u32 start_idx
,
1399 u32 num_events
, u32 mode
)
1402 u32 base
; /* SRAM byte address of event log header */
1403 u32 event_size
; /* 2 u32s, or 3 u32s if timestamp recorded */
1404 u32 ptr
; /* SRAM byte address of log data */
1405 u32 ev
, time
, data
; /* event log data */
1407 if (num_events
== 0)
1409 switch (priv
->ucode_type
) {
1411 base
= le32_to_cpu(priv
->card_alive
.log_event_table_ptr
);
1414 base
= le32_to_cpu(priv
->card_alive_init
.log_event_table_ptr
);
1417 IWL_ERR(priv
, "uCode image not available\n");
1422 event_size
= 2 * sizeof(u32
);
1424 event_size
= 3 * sizeof(u32
);
1426 ptr
= base
+ EVENT_START_OFFSET
+ (start_idx
* event_size
);
1428 /* "time" is actually "data" for mode 0 (no timestamp).
1429 * place event id # at far right for easier visual parsing. */
1430 for (i
= 0; i
< num_events
; i
++) {
1431 ev
= iwl_read_targ_mem(priv
, ptr
);
1433 time
= iwl_read_targ_mem(priv
, ptr
);
1437 IWL_ERR(priv
, "EVT_LOG:0x%08x:%04u\n", time
, ev
);
1439 data
= iwl_read_targ_mem(priv
, ptr
);
1441 IWL_ERR(priv
, "EVT_LOGT:%010u:0x%08x:%04u\n",
1447 void iwl_dump_nic_event_log(struct iwl_priv
*priv
)
1449 u32 base
; /* SRAM byte address of event log header */
1450 u32 capacity
; /* event log capacity in # entries */
1451 u32 mode
; /* 0 - no timestamp, 1 - timestamp recorded */
1452 u32 num_wraps
; /* # times uCode wrapped to top of log */
1453 u32 next_entry
; /* index of next entry to be written by uCode */
1454 u32 size
; /* # entries that we'll print */
1456 switch (priv
->ucode_type
) {
1458 base
= le32_to_cpu(priv
->card_alive
.log_event_table_ptr
);
1461 base
= le32_to_cpu(priv
->card_alive_init
.log_event_table_ptr
);
1464 IWL_ERR(priv
, "uCode image not available\n");
1468 if (!priv
->cfg
->ops
->lib
->is_valid_rtc_data_addr(base
)) {
1469 IWL_ERR(priv
, "Invalid event log pointer 0x%08X\n", base
);
1473 /* event log header */
1474 capacity
= iwl_read_targ_mem(priv
, base
);
1475 mode
= iwl_read_targ_mem(priv
, base
+ (1 * sizeof(u32
)));
1476 num_wraps
= iwl_read_targ_mem(priv
, base
+ (2 * sizeof(u32
)));
1477 next_entry
= iwl_read_targ_mem(priv
, base
+ (3 * sizeof(u32
)));
1479 size
= num_wraps
? capacity
: next_entry
;
1481 /* bail out if nothing in log */
1483 IWL_ERR(priv
, "Start IWL Event Log Dump: nothing in log\n");
1487 IWL_ERR(priv
, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1490 /* if uCode has wrapped back to top of log, start at the oldest entry,
1491 * i.e the next one that uCode would fill. */
1493 iwl_print_event_log(priv
, next_entry
,
1494 capacity
- next_entry
, mode
);
1495 /* (then/else) start at top of log */
1496 iwl_print_event_log(priv
, 0, next_entry
, mode
);
1500 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1502 void iwl_irq_handle_error(struct iwl_priv
*priv
)
1504 /* Set the FW error flag -- cleared on iwl_down */
1505 set_bit(STATUS_FW_ERROR
, &priv
->status
);
1507 /* Cancel currently queued command. */
1508 clear_bit(STATUS_HCMD_ACTIVE
, &priv
->status
);
1510 #ifdef CONFIG_IWLWIFI_DEBUG
1511 if (iwl_debug_level
& IWL_DL_FW_ERRORS
) {
1512 iwl_dump_nic_error_log(priv
);
1513 iwl_dump_nic_event_log(priv
);
1514 iwl_print_rx_config_cmd(priv
);
1518 wake_up_interruptible(&priv
->wait_command_queue
);
1520 /* Keep the restart process from trying to send host
1521 * commands by clearing the INIT status bit */
1522 clear_bit(STATUS_READY
, &priv
->status
);
1524 if (!test_bit(STATUS_EXIT_PENDING
, &priv
->status
)) {
1525 IWL_DEBUG(priv
, IWL_DL_FW_ERRORS
,
1526 "Restarting adapter due to uCode error.\n");
1528 if (priv
->cfg
->mod_params
->restart_fw
)
1529 queue_work(priv
->workqueue
, &priv
->restart
);
1532 EXPORT_SYMBOL(iwl_irq_handle_error
);
1534 void iwl_configure_filter(struct ieee80211_hw
*hw
,
1535 unsigned int changed_flags
,
1536 unsigned int *total_flags
,
1537 int mc_count
, struct dev_addr_list
*mc_list
)
1539 struct iwl_priv
*priv
= hw
->priv
;
1540 __le32
*filter_flags
= &priv
->staging_rxon
.filter_flags
;
1542 IWL_DEBUG_MAC80211(priv
, "Enter: changed: 0x%x, total: 0x%x\n",
1543 changed_flags
, *total_flags
);
1545 if (changed_flags
& (FIF_OTHER_BSS
| FIF_PROMISC_IN_BSS
)) {
1546 if (*total_flags
& (FIF_OTHER_BSS
| FIF_PROMISC_IN_BSS
))
1547 *filter_flags
|= RXON_FILTER_PROMISC_MSK
;
1549 *filter_flags
&= ~RXON_FILTER_PROMISC_MSK
;
1551 if (changed_flags
& FIF_ALLMULTI
) {
1552 if (*total_flags
& FIF_ALLMULTI
)
1553 *filter_flags
|= RXON_FILTER_ACCEPT_GRP_MSK
;
1555 *filter_flags
&= ~RXON_FILTER_ACCEPT_GRP_MSK
;
1557 if (changed_flags
& FIF_CONTROL
) {
1558 if (*total_flags
& FIF_CONTROL
)
1559 *filter_flags
|= RXON_FILTER_CTL2HOST_MSK
;
1561 *filter_flags
&= ~RXON_FILTER_CTL2HOST_MSK
;
1563 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
1564 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
)
1565 *filter_flags
|= RXON_FILTER_BCON_AWARE_MSK
;
1567 *filter_flags
&= ~RXON_FILTER_BCON_AWARE_MSK
;
1570 /* We avoid iwl_commit_rxon here to commit the new filter flags
1571 * since mac80211 will call ieee80211_hw_config immediately.
1572 * (mc_list is not supported at this time). Otherwise, we need to
1573 * queue a background iwl_commit_rxon work.
1576 *total_flags
&= FIF_OTHER_BSS
| FIF_ALLMULTI
| FIF_PROMISC_IN_BSS
|
1577 FIF_BCN_PRBRESP_PROMISC
| FIF_CONTROL
;
1579 EXPORT_SYMBOL(iwl_configure_filter
);
1581 int iwl_setup_mac(struct iwl_priv
*priv
)
1584 struct ieee80211_hw
*hw
= priv
->hw
;
1585 hw
->rate_control_algorithm
= "iwl-agn-rs";
1587 /* Tell mac80211 our characteristics */
1588 hw
->flags
= IEEE80211_HW_SIGNAL_DBM
|
1589 IEEE80211_HW_NOISE_DBM
|
1590 IEEE80211_HW_AMPDU_AGGREGATION
|
1591 IEEE80211_HW_SPECTRUM_MGMT
|
1592 IEEE80211_HW_SUPPORTS_PS
;
1593 hw
->wiphy
->interface_modes
=
1594 BIT(NL80211_IFTYPE_STATION
) |
1595 BIT(NL80211_IFTYPE_ADHOC
);
1597 hw
->wiphy
->custom_regulatory
= true;
1599 hw
->wiphy
->max_scan_ssids
= PROBE_OPTION_MAX
;
1600 /* we create the 802.11 header and a zero-length SSID element */
1601 hw
->wiphy
->max_scan_ie_len
= IWL_MAX_PROBE_REQUEST
- 24 - 2;
1603 /* Default value; 4 EDCA QOS priorities */
1606 hw
->max_listen_interval
= IWL_CONN_MAX_LISTEN_INTERVAL
;
1608 if (priv
->bands
[IEEE80211_BAND_2GHZ
].n_channels
)
1609 priv
->hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] =
1610 &priv
->bands
[IEEE80211_BAND_2GHZ
];
1611 if (priv
->bands
[IEEE80211_BAND_5GHZ
].n_channels
)
1612 priv
->hw
->wiphy
->bands
[IEEE80211_BAND_5GHZ
] =
1613 &priv
->bands
[IEEE80211_BAND_5GHZ
];
1615 ret
= ieee80211_register_hw(priv
->hw
);
1617 IWL_ERR(priv
, "Failed to register hw (error %d)\n", ret
);
1620 priv
->mac80211_registered
= 1;
1624 EXPORT_SYMBOL(iwl_setup_mac
);
1626 int iwl_set_hw_params(struct iwl_priv
*priv
)
1628 priv
->hw_params
.max_rxq_size
= RX_QUEUE_SIZE
;
1629 priv
->hw_params
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
1630 if (priv
->cfg
->mod_params
->amsdu_size_8K
)
1631 priv
->hw_params
.rx_buf_size
= IWL_RX_BUF_SIZE_8K
;
1633 priv
->hw_params
.rx_buf_size
= IWL_RX_BUF_SIZE_4K
;
1634 priv
->hw_params
.max_pkt_size
= priv
->hw_params
.rx_buf_size
- 256;
1636 priv
->hw_params
.max_beacon_itrvl
= IWL_MAX_UCODE_BEACON_INTERVAL
;
1638 if (priv
->cfg
->mod_params
->disable_11n
)
1639 priv
->cfg
->sku
&= ~IWL_SKU_N
;
1641 /* Device-specific setup */
1642 return priv
->cfg
->ops
->lib
->set_hw_params(priv
);
1644 EXPORT_SYMBOL(iwl_set_hw_params
);
1646 int iwl_init_drv(struct iwl_priv
*priv
)
1650 priv
->ibss_beacon
= NULL
;
1652 spin_lock_init(&priv
->lock
);
1653 spin_lock_init(&priv
->sta_lock
);
1654 spin_lock_init(&priv
->hcmd_lock
);
1656 INIT_LIST_HEAD(&priv
->free_frames
);
1658 mutex_init(&priv
->mutex
);
1660 /* Clear the driver's (not device's) station table */
1661 iwl_clear_stations_table(priv
);
1663 priv
->data_retry_limit
= -1;
1664 priv
->ieee_channels
= NULL
;
1665 priv
->ieee_rates
= NULL
;
1666 priv
->band
= IEEE80211_BAND_2GHZ
;
1668 priv
->iw_mode
= NL80211_IFTYPE_STATION
;
1670 priv
->current_ht_config
.sm_ps
= WLAN_HT_CAP_SM_PS_DISABLED
;
1672 /* Choose which receivers/antennas to use */
1673 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
1674 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
);
1676 iwl_init_scan_params(priv
);
1678 iwl_reset_qos(priv
);
1680 priv
->qos_data
.qos_active
= 0;
1681 priv
->qos_data
.qos_cap
.val
= 0;
1683 priv
->rates_mask
= IWL_RATES_MASK
;
1684 /* If power management is turned on, default to CAM mode */
1685 priv
->power_mode
= IWL_POWER_MODE_CAM
;
1686 priv
->tx_power_user_lmt
= IWL_TX_POWER_TARGET_POWER_MAX
;
1688 ret
= iwl_init_channel_map(priv
);
1690 IWL_ERR(priv
, "initializing regulatory failed: %d\n", ret
);
1694 ret
= iwlcore_init_geos(priv
);
1696 IWL_ERR(priv
, "initializing geos failed: %d\n", ret
);
1697 goto err_free_channel_map
;
1699 iwlcore_init_hw_rates(priv
, priv
->ieee_rates
);
1703 err_free_channel_map
:
1704 iwl_free_channel_map(priv
);
1708 EXPORT_SYMBOL(iwl_init_drv
);
1710 int iwl_set_tx_power(struct iwl_priv
*priv
, s8 tx_power
, bool force
)
1713 if (tx_power
< IWL_TX_POWER_TARGET_POWER_MIN
) {
1714 IWL_WARN(priv
, "Requested user TXPOWER %d below lower limit %d.\n",
1716 IWL_TX_POWER_TARGET_POWER_MIN
);
1720 if (tx_power
> IWL_TX_POWER_TARGET_POWER_MAX
) {
1721 IWL_WARN(priv
, "Requested user TXPOWER %d above upper limit %d.\n",
1723 IWL_TX_POWER_TARGET_POWER_MAX
);
1727 if (priv
->tx_power_user_lmt
!= tx_power
)
1730 priv
->tx_power_user_lmt
= tx_power
;
1732 /* if nic is not up don't send command */
1733 if (!iwl_is_ready_rf(priv
))
1736 if (force
&& priv
->cfg
->ops
->lib
->send_tx_power
)
1737 ret
= priv
->cfg
->ops
->lib
->send_tx_power(priv
);
1741 EXPORT_SYMBOL(iwl_set_tx_power
);
1743 void iwl_uninit_drv(struct iwl_priv
*priv
)
1745 iwl_calib_free_results(priv
);
1746 iwlcore_free_geos(priv
);
1747 iwl_free_channel_map(priv
);
1750 EXPORT_SYMBOL(iwl_uninit_drv
);
1752 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1754 /* Free dram table */
1755 void iwl_free_isr_ict(struct iwl_priv
*priv
)
1757 if (priv
->ict_tbl_vir
) {
1758 pci_free_consistent(priv
->pci_dev
, (sizeof(u32
) * ICT_COUNT
) +
1759 PAGE_SIZE
, priv
->ict_tbl_vir
,
1761 priv
->ict_tbl_vir
= NULL
;
1764 EXPORT_SYMBOL(iwl_free_isr_ict
);
1767 /* allocate dram shared table it is a PAGE_SIZE aligned
1768 * also reset all data related to ICT table interrupt.
1770 int iwl_alloc_isr_ict(struct iwl_priv
*priv
)
1773 if (priv
->cfg
->use_isr_legacy
)
1775 /* allocate shrared data table */
1776 priv
->ict_tbl_vir
= pci_alloc_consistent(priv
->pci_dev
, (sizeof(u32
) *
1777 ICT_COUNT
) + PAGE_SIZE
,
1778 &priv
->ict_tbl_dma
);
1779 if (!priv
->ict_tbl_vir
)
1782 /* align table to PAGE_SIZE boundry */
1783 priv
->aligned_ict_tbl_dma
= ALIGN(priv
->ict_tbl_dma
, PAGE_SIZE
);
1785 IWL_DEBUG_ISR(priv
, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1786 (unsigned long long)priv
->ict_tbl_dma
,
1787 (unsigned long long)priv
->aligned_ict_tbl_dma
,
1788 (int)(priv
->aligned_ict_tbl_dma
- priv
->ict_tbl_dma
));
1790 priv
->ict_tbl
= priv
->ict_tbl_vir
+
1791 (priv
->aligned_ict_tbl_dma
- priv
->ict_tbl_dma
);
1793 IWL_DEBUG_ISR(priv
, "ict vir addr %p vir aligned %p diff %d\n",
1794 priv
->ict_tbl
, priv
->ict_tbl_vir
,
1795 (int)(priv
->aligned_ict_tbl_dma
- priv
->ict_tbl_dma
));
1797 /* reset table and index to all 0 */
1798 memset(priv
->ict_tbl_vir
,0, (sizeof(u32
) * ICT_COUNT
) + PAGE_SIZE
);
1799 priv
->ict_index
= 0;
1801 /* add periodic RX interrupt */
1802 priv
->inta_mask
|= CSR_INT_BIT_RX_PERIODIC
;
1805 EXPORT_SYMBOL(iwl_alloc_isr_ict
);
1807 /* Device is going up inform it about using ICT interrupt table,
1808 * also we need to tell the driver to start using ICT interrupt.
1810 int iwl_reset_ict(struct iwl_priv
*priv
)
1813 unsigned long flags
;
1815 if (!priv
->ict_tbl_vir
)
1818 spin_lock_irqsave(&priv
->lock
, flags
);
1819 iwl_disable_interrupts(priv
);
1821 memset(&priv
->ict_tbl
[0],0, sizeof(u32
) * ICT_COUNT
);
1823 val
= priv
->aligned_ict_tbl_dma
>> PAGE_SHIFT
;
1825 val
|= CSR_DRAM_INT_TBL_ENABLE
;
1826 val
|= CSR_DRAM_INIT_TBL_WRAP_CHECK
;
1828 IWL_DEBUG_ISR(priv
, "CSR_DRAM_INT_TBL_REG =0x%X "
1829 "aligned dma address %Lx\n",
1830 val
, (unsigned long long)priv
->aligned_ict_tbl_dma
);
1832 iwl_write32(priv
, CSR_DRAM_INT_TBL_REG
, val
);
1833 priv
->use_ict
= true;
1834 priv
->ict_index
= 0;
1835 iwl_write32(priv
, CSR_INT
, priv
->inta_mask
);
1836 iwl_enable_interrupts(priv
);
1837 spin_unlock_irqrestore(&priv
->lock
, flags
);
1841 EXPORT_SYMBOL(iwl_reset_ict
);
1843 /* Device is going down disable ict interrupt usage */
1844 void iwl_disable_ict(struct iwl_priv
*priv
)
1846 unsigned long flags
;
1848 spin_lock_irqsave(&priv
->lock
, flags
);
1849 priv
->use_ict
= false;
1850 spin_unlock_irqrestore(&priv
->lock
, flags
);
1852 EXPORT_SYMBOL(iwl_disable_ict
);
1854 /* interrupt handler using ict table, with this interrupt driver will
1855 * stop using INTA register to get device's interrupt, reading this register
1856 * is expensive, device will write interrupts in ICT dram table, increment
1857 * index then will fire interrupt to driver, driver will OR all ICT table
1858 * entries from current index up to table entry with 0 value. the result is
1859 * the interrupt we need to service, driver will set the entries back to 0 and
1862 irqreturn_t
iwl_isr_ict(int irq
, void *data
)
1864 struct iwl_priv
*priv
= data
;
1865 u32 inta
, inta_mask
;
1871 /* dram interrupt table not set yet,
1872 * use legacy interrupt.
1875 return iwl_isr(irq
, data
);
1877 spin_lock(&priv
->lock
);
1879 /* Disable (but don't clear!) interrupts here to avoid
1880 * back-to-back ISRs and sporadic interrupts from our NIC.
1881 * If we have something to service, the tasklet will re-enable ints.
1882 * If we *don't* have something, we'll re-enable before leaving here.
1884 inta_mask
= iwl_read32(priv
, CSR_INT_MASK
); /* just for debug */
1885 iwl_write32(priv
, CSR_INT_MASK
, 0x00000000);
1888 /* Ignore interrupt if there's nothing in NIC to service.
1889 * This may be due to IRQ shared with another device,
1890 * or due to sporadic interrupts thrown from our NIC. */
1891 if (!priv
->ict_tbl
[priv
->ict_index
]) {
1892 IWL_DEBUG_ISR(priv
, "Ignore interrupt, inta == 0\n");
1896 /* read all entries that not 0 start with ict_index */
1897 while (priv
->ict_tbl
[priv
->ict_index
]) {
1899 val
|= priv
->ict_tbl
[priv
->ict_index
];
1900 IWL_DEBUG_ISR(priv
, "ICT index %d value 0x%08X\n",
1902 priv
->ict_tbl
[priv
->ict_index
]);
1903 priv
->ict_tbl
[priv
->ict_index
] = 0;
1904 priv
->ict_index
= iwl_queue_inc_wrap(priv
->ict_index
,
1909 /* We should not get this value, just ignore it. */
1910 if (val
== 0xffffffff)
1913 inta
= (0xff & val
) | ((0xff00 & val
) << 16);
1914 IWL_DEBUG_ISR(priv
, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1915 inta
, inta_mask
, val
);
1917 inta
&= priv
->inta_mask
;
1920 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1922 tasklet_schedule(&priv
->irq_tasklet
);
1923 else if (test_bit(STATUS_INT_ENABLED
, &priv
->status
) && !priv
->inta
) {
1924 /* Allow interrupt if was disabled by this handler and
1925 * no tasklet was schedules, We should not enable interrupt,
1926 * tasklet will enable it.
1928 iwl_enable_interrupts(priv
);
1931 spin_unlock(&priv
->lock
);
1935 /* re-enable interrupts here since we don't have anything to service.
1936 * only Re-enable if disabled by irq.
1938 if (test_bit(STATUS_INT_ENABLED
, &priv
->status
) && !priv
->inta
)
1939 iwl_enable_interrupts(priv
);
1941 spin_unlock(&priv
->lock
);
1944 EXPORT_SYMBOL(iwl_isr_ict
);
1947 static irqreturn_t
iwl_isr(int irq
, void *data
)
1949 struct iwl_priv
*priv
= data
;
1950 u32 inta
, inta_mask
;
1951 #ifdef CONFIG_IWLWIFI_DEBUG
1957 spin_lock(&priv
->lock
);
1959 /* Disable (but don't clear!) interrupts here to avoid
1960 * back-to-back ISRs and sporadic interrupts from our NIC.
1961 * If we have something to service, the tasklet will re-enable ints.
1962 * If we *don't* have something, we'll re-enable before leaving here. */
1963 inta_mask
= iwl_read32(priv
, CSR_INT_MASK
); /* just for debug */
1964 iwl_write32(priv
, CSR_INT_MASK
, 0x00000000);
1966 /* Discover which interrupts are active/pending */
1967 inta
= iwl_read32(priv
, CSR_INT
);
1969 /* Ignore interrupt if there's nothing in NIC to service.
1970 * This may be due to IRQ shared with another device,
1971 * or due to sporadic interrupts thrown from our NIC. */
1973 IWL_DEBUG_ISR(priv
, "Ignore interrupt, inta == 0\n");
1977 if ((inta
== 0xFFFFFFFF) || ((inta
& 0xFFFFFFF0) == 0xa5a5a5a0)) {
1978 /* Hardware disappeared. It might have already raised
1980 IWL_WARN(priv
, "HARDWARE GONE?? INTA == 0x%08x\n", inta
);
1984 #ifdef CONFIG_IWLWIFI_DEBUG
1985 if (iwl_debug_level
& (IWL_DL_ISR
)) {
1986 inta_fh
= iwl_read32(priv
, CSR_FH_INT_STATUS
);
1987 IWL_DEBUG_ISR(priv
, "ISR inta 0x%08x, enabled 0x%08x, "
1988 "fh 0x%08x\n", inta
, inta_mask
, inta_fh
);
1993 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1995 tasklet_schedule(&priv
->irq_tasklet
);
1996 else if (test_bit(STATUS_INT_ENABLED
, &priv
->status
) && !priv
->inta
)
1997 iwl_enable_interrupts(priv
);
2000 spin_unlock(&priv
->lock
);
2004 /* re-enable interrupts here since we don't have anything to service. */
2005 /* only Re-enable if diabled by irq and no schedules tasklet. */
2006 if (test_bit(STATUS_INT_ENABLED
, &priv
->status
) && !priv
->inta
)
2007 iwl_enable_interrupts(priv
);
2009 spin_unlock(&priv
->lock
);
2013 irqreturn_t
iwl_isr_legacy(int irq
, void *data
)
2015 struct iwl_priv
*priv
= data
;
2016 u32 inta
, inta_mask
;
2021 spin_lock(&priv
->lock
);
2023 /* Disable (but don't clear!) interrupts here to avoid
2024 * back-to-back ISRs and sporadic interrupts from our NIC.
2025 * If we have something to service, the tasklet will re-enable ints.
2026 * If we *don't* have something, we'll re-enable before leaving here. */
2027 inta_mask
= iwl_read32(priv
, CSR_INT_MASK
); /* just for debug */
2028 iwl_write32(priv
, CSR_INT_MASK
, 0x00000000);
2030 /* Discover which interrupts are active/pending */
2031 inta
= iwl_read32(priv
, CSR_INT
);
2032 inta_fh
= iwl_read32(priv
, CSR_FH_INT_STATUS
);
2034 /* Ignore interrupt if there's nothing in NIC to service.
2035 * This may be due to IRQ shared with another device,
2036 * or due to sporadic interrupts thrown from our NIC. */
2037 if (!inta
&& !inta_fh
) {
2038 IWL_DEBUG_ISR(priv
, "Ignore interrupt, inta == 0, inta_fh == 0\n");
2042 if ((inta
== 0xFFFFFFFF) || ((inta
& 0xFFFFFFF0) == 0xa5a5a5a0)) {
2043 /* Hardware disappeared. It might have already raised
2045 IWL_WARN(priv
, "HARDWARE GONE?? INTA == 0x%08x\n", inta
);
2049 IWL_DEBUG_ISR(priv
, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
2050 inta
, inta_mask
, inta_fh
);
2052 inta
&= ~CSR_INT_BIT_SCD
;
2054 /* iwl_irq_tasklet() will service interrupts and re-enable them */
2055 if (likely(inta
|| inta_fh
))
2056 tasklet_schedule(&priv
->irq_tasklet
);
2059 spin_unlock(&priv
->lock
);
2063 /* re-enable interrupts here since we don't have anything to service. */
2064 /* only Re-enable if diabled by irq */
2065 if (test_bit(STATUS_INT_ENABLED
, &priv
->status
))
2066 iwl_enable_interrupts(priv
);
2067 spin_unlock(&priv
->lock
);
2070 EXPORT_SYMBOL(iwl_isr_legacy
);
2072 int iwl_send_bt_config(struct iwl_priv
*priv
)
2074 struct iwl_bt_cmd bt_cmd
= {
2082 return iwl_send_cmd_pdu(priv
, REPLY_BT_CONFIG
,
2083 sizeof(struct iwl_bt_cmd
), &bt_cmd
);
2085 EXPORT_SYMBOL(iwl_send_bt_config
);
2087 int iwl_send_statistics_request(struct iwl_priv
*priv
, u8 flags
)
2090 struct iwl_host_cmd cmd
= {
2091 .id
= REPLY_STATISTICS_CMD
,
2093 .len
= sizeof(stat_flags
),
2094 .data
= (u8
*) &stat_flags
,
2096 return iwl_send_cmd(priv
, &cmd
);
2098 EXPORT_SYMBOL(iwl_send_statistics_request
);
2101 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2102 * using sample data 100 bytes apart. If these sample points are good,
2103 * it's a pretty good bet that everything between them is good, too.
2105 static int iwlcore_verify_inst_sparse(struct iwl_priv
*priv
, __le32
*image
, u32 len
)
2112 IWL_DEBUG_INFO(priv
, "ucode inst image size is %u\n", len
);
2114 for (i
= 0; i
< len
; i
+= 100, image
+= 100/sizeof(u32
)) {
2115 /* read data comes through single port, auto-incr addr */
2116 /* NOTE: Use the debugless read so we don't flood kernel log
2117 * if IWL_DL_IO is set */
2118 iwl_write_direct32(priv
, HBUS_TARG_MEM_RADDR
,
2119 i
+ IWL49_RTC_INST_LOWER_BOUND
);
2120 val
= _iwl_read_direct32(priv
, HBUS_TARG_MEM_RDAT
);
2121 if (val
!= le32_to_cpu(*image
)) {
2133 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2134 * looking at all data.
2136 static int iwl_verify_inst_full(struct iwl_priv
*priv
, __le32
*image
,
2144 IWL_DEBUG_INFO(priv
, "ucode inst image size is %u\n", len
);
2146 iwl_write_direct32(priv
, HBUS_TARG_MEM_RADDR
,
2147 IWL49_RTC_INST_LOWER_BOUND
);
2150 for (; len
> 0; len
-= sizeof(u32
), image
++) {
2151 /* read data comes through single port, auto-incr addr */
2152 /* NOTE: Use the debugless read so we don't flood kernel log
2153 * if IWL_DL_IO is set */
2154 val
= _iwl_read_direct32(priv
, HBUS_TARG_MEM_RDAT
);
2155 if (val
!= le32_to_cpu(*image
)) {
2156 IWL_ERR(priv
, "uCode INST section is invalid at "
2157 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2158 save_len
- len
, val
, le32_to_cpu(*image
));
2167 IWL_DEBUG_INFO(priv
,
2168 "ucode image in INSTRUCTION memory is good\n");
2174 * iwl_verify_ucode - determine which instruction image is in SRAM,
2175 * and verify its contents
2177 int iwl_verify_ucode(struct iwl_priv
*priv
)
2184 image
= (__le32
*)priv
->ucode_boot
.v_addr
;
2185 len
= priv
->ucode_boot
.len
;
2186 ret
= iwlcore_verify_inst_sparse(priv
, image
, len
);
2188 IWL_DEBUG_INFO(priv
, "Bootstrap uCode is good in inst SRAM\n");
2192 /* Try initialize */
2193 image
= (__le32
*)priv
->ucode_init
.v_addr
;
2194 len
= priv
->ucode_init
.len
;
2195 ret
= iwlcore_verify_inst_sparse(priv
, image
, len
);
2197 IWL_DEBUG_INFO(priv
, "Initialize uCode is good in inst SRAM\n");
2201 /* Try runtime/protocol */
2202 image
= (__le32
*)priv
->ucode_code
.v_addr
;
2203 len
= priv
->ucode_code
.len
;
2204 ret
= iwlcore_verify_inst_sparse(priv
, image
, len
);
2206 IWL_DEBUG_INFO(priv
, "Runtime uCode is good in inst SRAM\n");
2210 IWL_ERR(priv
, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2212 /* Since nothing seems to match, show first several data entries in
2213 * instruction SRAM, so maybe visual inspection will give a clue.
2214 * Selection of bootstrap image (vs. other images) is arbitrary. */
2215 image
= (__le32
*)priv
->ucode_boot
.v_addr
;
2216 len
= priv
->ucode_boot
.len
;
2217 ret
= iwl_verify_inst_full(priv
, image
, len
);
2221 EXPORT_SYMBOL(iwl_verify_ucode
);
2224 void iwl_rf_kill_ct_config(struct iwl_priv
*priv
)
2226 struct iwl_ct_kill_config cmd
;
2227 struct iwl_ct_kill_throttling_config adv_cmd
;
2228 unsigned long flags
;
2231 spin_lock_irqsave(&priv
->lock
, flags
);
2232 iwl_write32(priv
, CSR_UCODE_DRV_GP1_CLR
,
2233 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT
);
2234 spin_unlock_irqrestore(&priv
->lock
, flags
);
2235 priv
->power_data
.ct_kill_toggle
= false;
2237 switch (priv
->hw_rev
& CSR_HW_REV_TYPE_MSK
) {
2238 case CSR_HW_REV_TYPE_1000
:
2239 case CSR_HW_REV_TYPE_6x00
:
2240 case CSR_HW_REV_TYPE_6x50
:
2241 adv_cmd
.critical_temperature_enter
=
2242 cpu_to_le32(priv
->hw_params
.ct_kill_threshold
);
2243 adv_cmd
.critical_temperature_exit
=
2244 cpu_to_le32(priv
->hw_params
.ct_kill_exit_threshold
);
2246 ret
= iwl_send_cmd_pdu(priv
, REPLY_CT_KILL_CONFIG_CMD
,
2247 sizeof(adv_cmd
), &adv_cmd
);
2250 cmd
.critical_temperature_R
=
2251 cpu_to_le32(priv
->hw_params
.ct_kill_threshold
);
2253 ret
= iwl_send_cmd_pdu(priv
, REPLY_CT_KILL_CONFIG_CMD
,
2257 ret
= iwl_send_cmd_pdu(priv
, REPLY_CT_KILL_CONFIG_CMD
,
2260 IWL_ERR(priv
, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2262 IWL_DEBUG_INFO(priv
, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
2263 "critical temperature is %d\n",
2264 cmd
.critical_temperature_R
);
2266 EXPORT_SYMBOL(iwl_rf_kill_ct_config
);
2272 * Use: Sets the device's internal card state to enable, disable, or halt
2274 * When in the 'enable' state the card operates as normal.
2275 * When in the 'disable' state, the card enters into a low power mode.
2276 * When in the 'halt' state, the card is shut down and must be fully
2277 * restarted to come back on.
2279 int iwl_send_card_state(struct iwl_priv
*priv
, u32 flags
, u8 meta_flag
)
2281 struct iwl_host_cmd cmd
= {
2282 .id
= REPLY_CARD_STATE_CMD
,
2288 return iwl_send_cmd(priv
, &cmd
);
2290 EXPORT_SYMBOL(iwl_send_card_state
);
2292 void iwl_rx_pm_sleep_notif(struct iwl_priv
*priv
,
2293 struct iwl_rx_mem_buffer
*rxb
)
2295 #ifdef CONFIG_IWLWIFI_DEBUG
2296 struct iwl_rx_packet
*pkt
= (struct iwl_rx_packet
*)rxb
->skb
->data
;
2297 struct iwl_sleep_notification
*sleep
= &(pkt
->u
.sleep_notif
);
2298 IWL_DEBUG_RX(priv
, "sleep mode: %d, src: %d\n",
2299 sleep
->pm_sleep_mode
, sleep
->pm_wakeup_src
);
2302 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif
);
2304 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv
*priv
,
2305 struct iwl_rx_mem_buffer
*rxb
)
2307 struct iwl_rx_packet
*pkt
= (struct iwl_rx_packet
*)rxb
->skb
->data
;
2308 IWL_DEBUG_RADIO(priv
, "Dumping %d bytes of unhandled "
2309 "notification for %s:\n",
2310 le32_to_cpu(pkt
->len
), get_cmd_string(pkt
->hdr
.cmd
));
2311 iwl_print_hex_dump(IWL_DL_RADIO
, pkt
->u
.raw
, le32_to_cpu(pkt
->len
));
2313 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif
);
2315 void iwl_rx_reply_error(struct iwl_priv
*priv
,
2316 struct iwl_rx_mem_buffer
*rxb
)
2318 struct iwl_rx_packet
*pkt
= (struct iwl_rx_packet
*)rxb
->skb
->data
;
2320 IWL_ERR(priv
, "Error Reply type 0x%08X cmd %s (0x%02X) "
2321 "seq 0x%04X ser 0x%08X\n",
2322 le32_to_cpu(pkt
->u
.err_resp
.error_type
),
2323 get_cmd_string(pkt
->u
.err_resp
.cmd_id
),
2324 pkt
->u
.err_resp
.cmd_id
,
2325 le16_to_cpu(pkt
->u
.err_resp
.bad_cmd_seq_num
),
2326 le32_to_cpu(pkt
->u
.err_resp
.error_info
));
2328 EXPORT_SYMBOL(iwl_rx_reply_error
);
2330 void iwl_clear_isr_stats(struct iwl_priv
*priv
)
2332 memset(&priv
->isr_stats
, 0, sizeof(priv
->isr_stats
));
2334 EXPORT_SYMBOL(iwl_clear_isr_stats
);
2336 int iwl_mac_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
2337 const struct ieee80211_tx_queue_params
*params
)
2339 struct iwl_priv
*priv
= hw
->priv
;
2340 unsigned long flags
;
2343 IWL_DEBUG_MAC80211(priv
, "enter\n");
2345 if (!iwl_is_ready_rf(priv
)) {
2346 IWL_DEBUG_MAC80211(priv
, "leave - RF not ready\n");
2350 if (queue
>= AC_NUM
) {
2351 IWL_DEBUG_MAC80211(priv
, "leave - queue >= AC_NUM %d\n", queue
);
2355 q
= AC_NUM
- 1 - queue
;
2357 spin_lock_irqsave(&priv
->lock
, flags
);
2359 priv
->qos_data
.def_qos_parm
.ac
[q
].cw_min
= cpu_to_le16(params
->cw_min
);
2360 priv
->qos_data
.def_qos_parm
.ac
[q
].cw_max
= cpu_to_le16(params
->cw_max
);
2361 priv
->qos_data
.def_qos_parm
.ac
[q
].aifsn
= params
->aifs
;
2362 priv
->qos_data
.def_qos_parm
.ac
[q
].edca_txop
=
2363 cpu_to_le16((params
->txop
* 32));
2365 priv
->qos_data
.def_qos_parm
.ac
[q
].reserved1
= 0;
2366 priv
->qos_data
.qos_active
= 1;
2368 if (priv
->iw_mode
== NL80211_IFTYPE_AP
)
2369 iwl_activate_qos(priv
, 1);
2370 else if (priv
->assoc_id
&& iwl_is_associated(priv
))
2371 iwl_activate_qos(priv
, 0);
2373 spin_unlock_irqrestore(&priv
->lock
, flags
);
2375 IWL_DEBUG_MAC80211(priv
, "leave\n");
2378 EXPORT_SYMBOL(iwl_mac_conf_tx
);
2380 static void iwl_ht_conf(struct iwl_priv
*priv
,
2381 struct ieee80211_bss_conf
*bss_conf
)
2383 struct ieee80211_sta_ht_cap
*ht_conf
;
2384 struct iwl_ht_info
*iwl_conf
= &priv
->current_ht_config
;
2385 struct ieee80211_sta
*sta
;
2387 IWL_DEBUG_MAC80211(priv
, "enter: \n");
2389 if (!iwl_conf
->is_ht
)
2394 * It is totally wrong to base global information on something
2395 * that is valid only when associated, alas, this driver works
2396 * that way and I don't know how to fix it.
2400 sta
= ieee80211_find_sta(priv
->hw
, priv
->bssid
);
2405 ht_conf
= &sta
->ht_cap
;
2407 if (ht_conf
->cap
& IEEE80211_HT_CAP_SGI_20
)
2408 iwl_conf
->sgf
|= HT_SHORT_GI_20MHZ
;
2409 if (ht_conf
->cap
& IEEE80211_HT_CAP_SGI_40
)
2410 iwl_conf
->sgf
|= HT_SHORT_GI_40MHZ
;
2412 iwl_conf
->is_green_field
= !!(ht_conf
->cap
& IEEE80211_HT_CAP_GRN_FLD
);
2413 iwl_conf
->max_amsdu_size
=
2414 !!(ht_conf
->cap
& IEEE80211_HT_CAP_MAX_AMSDU
);
2416 iwl_conf
->supported_chan_width
=
2417 !!(ht_conf
->cap
& IEEE80211_HT_CAP_SUP_WIDTH_20_40
);
2420 * XXX: The HT configuration needs to be moved into iwl_mac_config()
2421 * to be done there correctly.
2424 iwl_conf
->extension_chan_offset
= IEEE80211_HT_PARAM_CHA_SEC_NONE
;
2425 if (conf_is_ht40_minus(&priv
->hw
->conf
))
2426 iwl_conf
->extension_chan_offset
= IEEE80211_HT_PARAM_CHA_SEC_BELOW
;
2427 else if (conf_is_ht40_plus(&priv
->hw
->conf
))
2428 iwl_conf
->extension_chan_offset
= IEEE80211_HT_PARAM_CHA_SEC_ABOVE
;
2430 /* If no above or below channel supplied disable FAT channel */
2431 if (iwl_conf
->extension_chan_offset
!= IEEE80211_HT_PARAM_CHA_SEC_ABOVE
&&
2432 iwl_conf
->extension_chan_offset
!= IEEE80211_HT_PARAM_CHA_SEC_BELOW
)
2433 iwl_conf
->supported_chan_width
= 0;
2435 iwl_conf
->sm_ps
= (u8
)((ht_conf
->cap
& IEEE80211_HT_CAP_SM_PS
) >> 2);
2437 memcpy(&iwl_conf
->mcs
, &ht_conf
->mcs
, 16);
2439 iwl_conf
->tx_chan_width
= iwl_conf
->supported_chan_width
!= 0;
2440 iwl_conf
->ht_protection
=
2441 bss_conf
->ht_operation_mode
& IEEE80211_HT_OP_MODE_PROTECTION
;
2442 iwl_conf
->non_GF_STA_present
=
2443 !!(bss_conf
->ht_operation_mode
& IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT
);
2447 IWL_DEBUG_MAC80211(priv
, "leave\n");
2450 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2451 void iwl_bss_info_changed(struct ieee80211_hw
*hw
,
2452 struct ieee80211_vif
*vif
,
2453 struct ieee80211_bss_conf
*bss_conf
,
2456 struct iwl_priv
*priv
= hw
->priv
;
2459 IWL_DEBUG_MAC80211(priv
, "changes = 0x%X\n", changes
);
2461 if (!iwl_is_alive(priv
))
2464 mutex_lock(&priv
->mutex
);
2466 if (changes
& BSS_CHANGED_BEACON
&&
2467 priv
->iw_mode
== NL80211_IFTYPE_AP
) {
2468 dev_kfree_skb(priv
->ibss_beacon
);
2469 priv
->ibss_beacon
= ieee80211_beacon_get(hw
, vif
);
2472 if (changes
& BSS_CHANGED_BEACON_INT
) {
2473 priv
->beacon_int
= bss_conf
->beacon_int
;
2474 /* TODO: in AP mode, do something to make this take effect */
2477 if (changes
& BSS_CHANGED_BSSID
) {
2478 IWL_DEBUG_MAC80211(priv
, "BSSID %pM\n", bss_conf
->bssid
);
2481 * If there is currently a HW scan going on in the
2482 * background then we need to cancel it else the RXON
2483 * below/in post_associate will fail.
2485 if (iwl_scan_cancel_timeout(priv
, 100)) {
2486 IWL_WARN(priv
, "Aborted scan still in progress after 100ms\n");
2487 IWL_DEBUG_MAC80211(priv
, "leaving - scan abort failed.\n");
2488 mutex_unlock(&priv
->mutex
);
2492 /* mac80211 only sets assoc when in STATION mode */
2493 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
||
2495 memcpy(priv
->staging_rxon
.bssid_addr
,
2496 bss_conf
->bssid
, ETH_ALEN
);
2498 /* currently needed in a few places */
2499 memcpy(priv
->bssid
, bss_conf
->bssid
, ETH_ALEN
);
2501 priv
->staging_rxon
.filter_flags
&=
2502 ~RXON_FILTER_ASSOC_MSK
;
2508 * This needs to be after setting the BSSID in case
2509 * mac80211 decides to do both changes at once because
2510 * it will invoke post_associate.
2512 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
&&
2513 changes
& BSS_CHANGED_BEACON
) {
2514 struct sk_buff
*beacon
= ieee80211_beacon_get(hw
, vif
);
2517 iwl_mac_beacon_update(hw
, beacon
);
2520 if (changes
& BSS_CHANGED_ERP_PREAMBLE
) {
2521 IWL_DEBUG_MAC80211(priv
, "ERP_PREAMBLE %d\n",
2522 bss_conf
->use_short_preamble
);
2523 if (bss_conf
->use_short_preamble
)
2524 priv
->staging_rxon
.flags
|= RXON_FLG_SHORT_PREAMBLE_MSK
;
2526 priv
->staging_rxon
.flags
&= ~RXON_FLG_SHORT_PREAMBLE_MSK
;
2529 if (changes
& BSS_CHANGED_ERP_CTS_PROT
) {
2530 IWL_DEBUG_MAC80211(priv
, "ERP_CTS %d\n", bss_conf
->use_cts_prot
);
2531 if (bss_conf
->use_cts_prot
&& (priv
->band
!= IEEE80211_BAND_5GHZ
))
2532 priv
->staging_rxon
.flags
|= RXON_FLG_TGG_PROTECT_MSK
;
2534 priv
->staging_rxon
.flags
&= ~RXON_FLG_TGG_PROTECT_MSK
;
2537 if (changes
& BSS_CHANGED_BASIC_RATES
) {
2538 /* XXX use this information
2540 * To do that, remove code from iwl_set_rate() and put something
2544 priv->staging_rxon.ofdm_basic_rates =
2545 bss_conf->basic_rates;
2547 priv->staging_rxon.ofdm_basic_rates =
2548 bss_conf->basic_rates >> 4;
2549 priv->staging_rxon.cck_basic_rates =
2550 bss_conf->basic_rates & 0xF;
2554 if (changes
& BSS_CHANGED_HT
) {
2555 iwl_ht_conf(priv
, bss_conf
);
2557 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
2558 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
);
2561 if (changes
& BSS_CHANGED_ASSOC
) {
2562 IWL_DEBUG_MAC80211(priv
, "ASSOC %d\n", bss_conf
->assoc
);
2563 if (bss_conf
->assoc
) {
2564 priv
->assoc_id
= bss_conf
->aid
;
2565 priv
->beacon_int
= bss_conf
->beacon_int
;
2566 priv
->power_data
.dtim_period
= bss_conf
->dtim_period
;
2567 priv
->timestamp
= bss_conf
->timestamp
;
2568 priv
->assoc_capability
= bss_conf
->assoc_capability
;
2571 * We have just associated, don't start scan too early
2572 * leave time for EAPOL exchange to complete.
2574 * XXX: do this in mac80211
2576 priv
->next_scan_jiffies
= jiffies
+
2577 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC
;
2578 if (!iwl_is_rfkill(priv
))
2579 priv
->cfg
->ops
->lib
->post_associate(priv
);
2585 if (changes
&& iwl_is_associated(priv
) && priv
->assoc_id
) {
2586 IWL_DEBUG_MAC80211(priv
, "Changes (%#x) while associated\n",
2588 ret
= iwl_send_rxon_assoc(priv
);
2590 /* Sync active_rxon with latest change. */
2591 memcpy((void *)&priv
->active_rxon
,
2592 &priv
->staging_rxon
,
2593 sizeof(struct iwl_rxon_cmd
));
2597 mutex_unlock(&priv
->mutex
);
2599 IWL_DEBUG_MAC80211(priv
, "leave\n");
2601 EXPORT_SYMBOL(iwl_bss_info_changed
);
2603 int iwl_mac_beacon_update(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2605 struct iwl_priv
*priv
= hw
->priv
;
2606 unsigned long flags
;
2609 IWL_DEBUG_MAC80211(priv
, "enter\n");
2611 if (!iwl_is_ready_rf(priv
)) {
2612 IWL_DEBUG_MAC80211(priv
, "leave - RF not ready\n");
2616 if (priv
->iw_mode
!= NL80211_IFTYPE_ADHOC
) {
2617 IWL_DEBUG_MAC80211(priv
, "leave - not IBSS\n");
2621 spin_lock_irqsave(&priv
->lock
, flags
);
2623 if (priv
->ibss_beacon
)
2624 dev_kfree_skb(priv
->ibss_beacon
);
2626 priv
->ibss_beacon
= skb
;
2629 timestamp
= ((struct ieee80211_mgmt
*)skb
->data
)->u
.beacon
.timestamp
;
2630 priv
->timestamp
= le64_to_cpu(timestamp
);
2632 IWL_DEBUG_MAC80211(priv
, "leave\n");
2633 spin_unlock_irqrestore(&priv
->lock
, flags
);
2635 iwl_reset_qos(priv
);
2637 priv
->cfg
->ops
->lib
->post_associate(priv
);
2642 EXPORT_SYMBOL(iwl_mac_beacon_update
);
2644 int iwl_set_mode(struct iwl_priv
*priv
, int mode
)
2646 if (mode
== NL80211_IFTYPE_ADHOC
) {
2647 const struct iwl_channel_info
*ch_info
;
2649 ch_info
= iwl_get_channel_info(priv
,
2651 le16_to_cpu(priv
->staging_rxon
.channel
));
2653 if (!ch_info
|| !is_channel_ibss(ch_info
)) {
2654 IWL_ERR(priv
, "channel %d not IBSS channel\n",
2655 le16_to_cpu(priv
->staging_rxon
.channel
));
2660 iwl_connection_init_rx_config(priv
, mode
);
2662 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
2663 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
);
2665 memcpy(priv
->staging_rxon
.node_addr
, priv
->mac_addr
, ETH_ALEN
);
2667 iwl_clear_stations_table(priv
);
2669 /* dont commit rxon if rf-kill is on*/
2670 if (!iwl_is_ready_rf(priv
))
2673 iwlcore_commit_rxon(priv
);
2677 EXPORT_SYMBOL(iwl_set_mode
);
2679 int iwl_mac_add_interface(struct ieee80211_hw
*hw
,
2680 struct ieee80211_if_init_conf
*conf
)
2682 struct iwl_priv
*priv
= hw
->priv
;
2683 unsigned long flags
;
2685 IWL_DEBUG_MAC80211(priv
, "enter: type %d\n", conf
->type
);
2688 IWL_DEBUG_MAC80211(priv
, "leave - vif != NULL\n");
2692 spin_lock_irqsave(&priv
->lock
, flags
);
2693 priv
->vif
= conf
->vif
;
2694 priv
->iw_mode
= conf
->type
;
2696 spin_unlock_irqrestore(&priv
->lock
, flags
);
2698 mutex_lock(&priv
->mutex
);
2700 if (conf
->mac_addr
) {
2701 IWL_DEBUG_MAC80211(priv
, "Set %pM\n", conf
->mac_addr
);
2702 memcpy(priv
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
2705 if (iwl_set_mode(priv
, conf
->type
) == -EAGAIN
)
2706 /* we are not ready, will run again when ready */
2707 set_bit(STATUS_MODE_PENDING
, &priv
->status
);
2709 mutex_unlock(&priv
->mutex
);
2711 IWL_DEBUG_MAC80211(priv
, "leave\n");
2714 EXPORT_SYMBOL(iwl_mac_add_interface
);
2716 void iwl_mac_remove_interface(struct ieee80211_hw
*hw
,
2717 struct ieee80211_if_init_conf
*conf
)
2719 struct iwl_priv
*priv
= hw
->priv
;
2721 IWL_DEBUG_MAC80211(priv
, "enter\n");
2723 mutex_lock(&priv
->mutex
);
2725 if (iwl_is_ready_rf(priv
)) {
2726 iwl_scan_cancel_timeout(priv
, 100);
2727 priv
->staging_rxon
.filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
2728 iwlcore_commit_rxon(priv
);
2730 if (priv
->vif
== conf
->vif
) {
2732 memset(priv
->bssid
, 0, ETH_ALEN
);
2734 mutex_unlock(&priv
->mutex
);
2736 IWL_DEBUG_MAC80211(priv
, "leave\n");
2739 EXPORT_SYMBOL(iwl_mac_remove_interface
);
2742 * iwl_mac_config - mac80211 config callback
2744 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2745 * be set inappropriately and the driver currently sets the hardware up to
2746 * use it whenever needed.
2748 int iwl_mac_config(struct ieee80211_hw
*hw
, u32 changed
)
2750 struct iwl_priv
*priv
= hw
->priv
;
2751 const struct iwl_channel_info
*ch_info
;
2752 struct ieee80211_conf
*conf
= &hw
->conf
;
2753 unsigned long flags
= 0;
2756 int scan_active
= 0;
2758 mutex_lock(&priv
->mutex
);
2760 IWL_DEBUG_MAC80211(priv
, "enter to channel %d changed 0x%X\n",
2761 conf
->channel
->hw_value
, changed
);
2763 if (unlikely(!priv
->cfg
->mod_params
->disable_hw_scan
&&
2764 test_bit(STATUS_SCANNING
, &priv
->status
))) {
2766 IWL_DEBUG_MAC80211(priv
, "leave - scanning\n");
2770 /* during scanning mac80211 will delay channel setting until
2771 * scan finish with changed = 0
2773 if (!changed
|| (changed
& IEEE80211_CONF_CHANGE_CHANNEL
)) {
2777 ch
= ieee80211_frequency_to_channel(conf
->channel
->center_freq
);
2778 ch_info
= iwl_get_channel_info(priv
, conf
->channel
->band
, ch
);
2779 if (!is_channel_valid(ch_info
)) {
2780 IWL_DEBUG_MAC80211(priv
, "leave - invalid channel\n");
2785 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
&&
2786 !is_channel_ibss(ch_info
)) {
2787 IWL_ERR(priv
, "channel %d in band %d not "
2789 conf
->channel
->hw_value
, conf
->channel
->band
);
2794 priv
->current_ht_config
.is_ht
= conf_is_ht(conf
);
2796 spin_lock_irqsave(&priv
->lock
, flags
);
2799 /* if we are switching from ht to 2.4 clear flags
2800 * from any ht related info since 2.4 does not
2802 if ((le16_to_cpu(priv
->staging_rxon
.channel
) != ch
))
2803 priv
->staging_rxon
.flags
= 0;
2805 iwl_set_rxon_channel(priv
, conf
->channel
);
2807 iwl_set_flags_for_band(priv
, conf
->channel
->band
);
2808 spin_unlock_irqrestore(&priv
->lock
, flags
);
2810 /* The list of supported rates and rate mask can be different
2811 * for each band; since the band may have changed, reset
2812 * the rate mask to what mac80211 lists */
2816 if (changed
& IEEE80211_CONF_CHANGE_PS
&&
2817 priv
->iw_mode
== NL80211_IFTYPE_STATION
) {
2818 priv
->power_data
.power_disabled
=
2819 !(conf
->flags
& IEEE80211_CONF_PS
);
2820 ret
= iwl_power_update_mode(priv
, 0);
2822 IWL_DEBUG_MAC80211(priv
, "Error setting power level\n");
2825 if (changed
& IEEE80211_CONF_CHANGE_POWER
) {
2826 IWL_DEBUG_MAC80211(priv
, "TX Power old=%d new=%d\n",
2827 priv
->tx_power_user_lmt
, conf
->power_level
);
2829 iwl_set_tx_power(priv
, conf
->power_level
, false);
2832 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2833 if (priv
->cfg
->ops
->hcmd
->set_rxon_chain
)
2834 priv
->cfg
->ops
->hcmd
->set_rxon_chain(priv
);
2836 if (!iwl_is_ready(priv
)) {
2837 IWL_DEBUG_MAC80211(priv
, "leave - not ready\n");
2844 if (memcmp(&priv
->active_rxon
,
2845 &priv
->staging_rxon
, sizeof(priv
->staging_rxon
)))
2846 iwlcore_commit_rxon(priv
);
2848 IWL_DEBUG_INFO(priv
, "Not re-sending same RXON configuration.\n");
2852 IWL_DEBUG_MAC80211(priv
, "leave\n");
2853 mutex_unlock(&priv
->mutex
);
2856 EXPORT_SYMBOL(iwl_mac_config
);
2858 int iwl_mac_get_tx_stats(struct ieee80211_hw
*hw
,
2859 struct ieee80211_tx_queue_stats
*stats
)
2861 struct iwl_priv
*priv
= hw
->priv
;
2863 struct iwl_tx_queue
*txq
;
2864 struct iwl_queue
*q
;
2865 unsigned long flags
;
2867 IWL_DEBUG_MAC80211(priv
, "enter\n");
2869 if (!iwl_is_ready_rf(priv
)) {
2870 IWL_DEBUG_MAC80211(priv
, "leave - RF not ready\n");
2874 spin_lock_irqsave(&priv
->lock
, flags
);
2876 for (i
= 0; i
< AC_NUM
; i
++) {
2877 txq
= &priv
->txq
[i
];
2879 avail
= iwl_queue_space(q
);
2881 stats
[i
].len
= q
->n_window
- avail
;
2882 stats
[i
].limit
= q
->n_window
- q
->high_mark
;
2883 stats
[i
].count
= q
->n_window
;
2886 spin_unlock_irqrestore(&priv
->lock
, flags
);
2888 IWL_DEBUG_MAC80211(priv
, "leave\n");
2892 EXPORT_SYMBOL(iwl_mac_get_tx_stats
);
2894 void iwl_mac_reset_tsf(struct ieee80211_hw
*hw
)
2896 struct iwl_priv
*priv
= hw
->priv
;
2897 unsigned long flags
;
2899 mutex_lock(&priv
->mutex
);
2900 IWL_DEBUG_MAC80211(priv
, "enter\n");
2902 spin_lock_irqsave(&priv
->lock
, flags
);
2903 memset(&priv
->current_ht_config
, 0, sizeof(struct iwl_ht_info
));
2904 spin_unlock_irqrestore(&priv
->lock
, flags
);
2906 iwl_reset_qos(priv
);
2908 spin_lock_irqsave(&priv
->lock
, flags
);
2910 priv
->assoc_capability
= 0;
2911 priv
->assoc_station_added
= 0;
2913 /* new association get rid of ibss beacon skb */
2914 if (priv
->ibss_beacon
)
2915 dev_kfree_skb(priv
->ibss_beacon
);
2917 priv
->ibss_beacon
= NULL
;
2919 priv
->beacon_int
= priv
->vif
->bss_conf
.beacon_int
;
2920 priv
->timestamp
= 0;
2921 if ((priv
->iw_mode
== NL80211_IFTYPE_STATION
))
2922 priv
->beacon_int
= 0;
2924 spin_unlock_irqrestore(&priv
->lock
, flags
);
2926 if (!iwl_is_ready_rf(priv
)) {
2927 IWL_DEBUG_MAC80211(priv
, "leave - not ready\n");
2928 mutex_unlock(&priv
->mutex
);
2932 /* we are restarting association process
2933 * clear RXON_FILTER_ASSOC_MSK bit
2935 if (priv
->iw_mode
!= NL80211_IFTYPE_AP
) {
2936 iwl_scan_cancel_timeout(priv
, 100);
2937 priv
->staging_rxon
.filter_flags
&= ~RXON_FILTER_ASSOC_MSK
;
2938 iwlcore_commit_rxon(priv
);
2941 if (priv
->iw_mode
!= NL80211_IFTYPE_ADHOC
) {
2942 IWL_DEBUG_MAC80211(priv
, "leave - not in IBSS\n");
2943 mutex_unlock(&priv
->mutex
);
2949 mutex_unlock(&priv
->mutex
);
2951 IWL_DEBUG_MAC80211(priv
, "leave\n");
2953 EXPORT_SYMBOL(iwl_mac_reset_tsf
);
2957 int iwl_pci_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2959 struct iwl_priv
*priv
= pci_get_drvdata(pdev
);
2962 * This function is called when system goes into suspend state
2963 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2964 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2965 * it will not call apm_ops.stop() to stop the DMA operation.
2966 * Calling apm_ops.stop here to make sure we stop the DMA.
2968 priv
->cfg
->ops
->lib
->apm_ops
.stop(priv
);
2970 pci_save_state(pdev
);
2971 pci_disable_device(pdev
);
2972 pci_set_power_state(pdev
, PCI_D3hot
);
2976 EXPORT_SYMBOL(iwl_pci_suspend
);
2978 int iwl_pci_resume(struct pci_dev
*pdev
)
2980 struct iwl_priv
*priv
= pci_get_drvdata(pdev
);
2983 pci_set_power_state(pdev
, PCI_D0
);
2984 ret
= pci_enable_device(pdev
);
2987 pci_restore_state(pdev
);
2988 iwl_enable_interrupts(priv
);
2992 EXPORT_SYMBOL(iwl_pci_resume
);
2994 #endif /* CONFIG_PM */