1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #ifndef __iwl_helpers_h__
31 #define __iwl_helpers_h__
33 #include <linux/ctype.h>
34 #include <net/mac80211.h>
38 #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
41 static inline struct ieee80211_conf
*ieee80211_get_hw_conf(
42 struct ieee80211_hw
*hw
)
48 * iwl_queue_inc_wrap - increment queue index, wrap back to beginning
49 * @index -- current index
50 * @n_bd -- total number of entries in queue (must be power of 2)
52 static inline int iwl_queue_inc_wrap(int index
, int n_bd
)
54 return ++index
& (n_bd
- 1);
58 * iwl_queue_dec_wrap - decrement queue index, wrap back to end
59 * @index -- current index
60 * @n_bd -- total number of entries in queue (must be power of 2)
62 static inline int iwl_queue_dec_wrap(int index
, int n_bd
)
64 return --index
& (n_bd
- 1);
68 * we have 8 bits used like this:
72 * | | | | | | +-+-------- AC queue (0-3)
74 * | +-+-+-+-+------------ HW queue ID
76 * +---------------------- unused
78 static inline void iwl_set_swq_id(struct iwl_tx_queue
*txq
, u8 ac
, u8 hwq
)
80 BUG_ON(ac
> 3); /* only have 2 bits */
81 BUG_ON(hwq
> 31); /* only use 5 bits */
83 txq
->swq_id
= (hwq
<< 2) | ac
;
86 static inline void iwl_wake_queue(struct iwl_priv
*priv
,
87 struct iwl_tx_queue
*txq
)
89 u8 queue
= txq
->swq_id
;
91 u8 hwq
= (queue
>> 2) & 0x1f;
93 if (test_and_clear_bit(hwq
, priv
->queue_stopped
))
94 if (atomic_dec_return(&priv
->queue_stop_count
[ac
]) <= 0)
95 ieee80211_wake_queue(priv
->hw
, ac
);
98 static inline void iwl_stop_queue(struct iwl_priv
*priv
,
99 struct iwl_tx_queue
*txq
)
101 u8 queue
= txq
->swq_id
;
103 u8 hwq
= (queue
>> 2) & 0x1f;
105 if (!test_and_set_bit(hwq
, priv
->queue_stopped
))
106 if (atomic_inc_return(&priv
->queue_stop_count
[ac
]) > 0)
107 ieee80211_stop_queue(priv
->hw
, ac
);
110 static inline void iwl_wake_any_queue(struct iwl_priv
*priv
,
111 struct iwl_rxon_context
*ctx
)
115 for (ac
= 0; ac
< AC_NUM
; ac
++) {
116 IWL_DEBUG_INFO(priv
, "Queue Status: Q[%d] %s\n",
117 ac
, (atomic_read(&priv
->queue_stop_count
[ac
]) > 0)
118 ? "stopped" : "awake");
119 iwl_wake_queue(priv
, &priv
->txq
[ctx
->ac_to_queue
[ac
]]);
123 #ifdef ieee80211_stop_queue
124 #undef ieee80211_stop_queue
127 #define ieee80211_stop_queue DO_NOT_USE_ieee80211_stop_queue
129 #ifdef ieee80211_wake_queue
130 #undef ieee80211_wake_queue
133 #define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue
135 static inline void iwl_disable_interrupts(struct iwl_priv
*priv
)
137 clear_bit(STATUS_INT_ENABLED
, &priv
->status
);
139 /* disable interrupts from uCode/NIC to host */
140 iwl_write32(priv
, CSR_INT_MASK
, 0x00000000);
142 /* acknowledge/clear/reset any interrupts still pending
143 * from uCode or flow handler (Rx/Tx DMA) */
144 iwl_write32(priv
, CSR_INT
, 0xffffffff);
145 iwl_write32(priv
, CSR_FH_INT_STATUS
, 0xffffffff);
146 IWL_DEBUG_ISR(priv
, "Disabled interrupts\n");
149 static inline void iwl_enable_rfkill_int(struct iwl_priv
*priv
)
151 IWL_DEBUG_ISR(priv
, "Enabling rfkill interrupt\n");
152 iwl_write32(priv
, CSR_INT_MASK
, CSR_INT_BIT_RF_KILL
);
155 static inline void iwl_enable_interrupts(struct iwl_priv
*priv
)
157 IWL_DEBUG_ISR(priv
, "Enabling interrupts\n");
158 set_bit(STATUS_INT_ENABLED
, &priv
->status
);
159 iwl_write32(priv
, CSR_INT_MASK
, priv
->inta_mask
);
163 * iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time
164 * @priv -- pointer to iwl_priv data structure
165 * @tsf_bits -- number of bits need to shift for masking)
167 static inline u32
iwl_beacon_time_mask_low(struct iwl_priv
*priv
,
170 return (1 << tsf_bits
) - 1;
174 * iwl_beacon_time_mask_high - mask of higher 32 bit of beacon time
175 * @priv -- pointer to iwl_priv data structure
176 * @tsf_bits -- number of bits need to shift for masking)
178 static inline u32
iwl_beacon_time_mask_high(struct iwl_priv
*priv
,
181 return ((1 << (32 - tsf_bits
)) - 1) << tsf_bits
;
184 #endif /* __iwl_helpers_h__ */
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