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iwlagn: add a method to get the HW ID description as a string to iwl_bus_ops
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-pci.c
1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63 #include <linux/pci.h>
64 #include <linux/pci-aspm.h>
65
66 #include "iwl-pci.h"
67 #include "iwl-agn.h"
68 #include "iwl-core.h"
69 #include "iwl-io.h"
70
71 /* PCI registers */
72 #define PCI_CFG_RETRY_TIMEOUT 0x041
73 #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
74 #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
75
76 struct iwl_pci_bus {
77 /* basic pci-network driver stuff */
78 struct pci_dev *pci_dev;
79
80 /* pci hardware address support */
81 void __iomem *hw_base;
82 };
83
84 #define IWL_BUS_GET_PCI_BUS(_iwl_bus) \
85 ((struct iwl_pci_bus *) ((_iwl_bus)->bus_specific))
86
87 #define IWL_BUS_GET_PCI_DEV(_iwl_bus) \
88 ((IWL_BUS_GET_PCI_BUS(_iwl_bus))->pci_dev)
89
90 static u16 iwl_pciexp_link_ctrl(struct iwl_bus *bus)
91 {
92 int pos;
93 u16 pci_lnk_ctl;
94 struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
95
96 pos = pci_find_capability(pci_dev, PCI_CAP_ID_EXP);
97 pci_read_config_word(pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
98 return pci_lnk_ctl;
99 }
100
101 static bool iwl_pci_is_pm_supported(struct iwl_bus *bus)
102 {
103 u16 lctl = iwl_pciexp_link_ctrl(bus);
104
105 return !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
106 }
107
108 static void iwl_pci_apm_config(struct iwl_bus *bus)
109 {
110 /*
111 * HW bug W/A for instability in PCIe bus L0S->L1 transition.
112 * Check if BIOS (or OS) enabled L1-ASPM on this device.
113 * If so (likely), disable L0S, so device moves directly L0->L1;
114 * costs negligible amount of power savings.
115 * If not (unlikely), enable L0S, so there is at least some
116 * power savings, even without L1.
117 */
118 u16 lctl = iwl_pciexp_link_ctrl(bus);
119
120 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
121 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
122 /* L1-ASPM enabled; disable(!) L0S */
123 iwl_set_bit(bus->priv, CSR_GIO_REG,
124 CSR_GIO_REG_VAL_L0S_ENABLED);
125 IWL_DEBUG_POWER(bus->priv, "L1 Enabled; Disabling L0S\n");
126 } else {
127 /* L1-ASPM disabled; enable(!) L0S */
128 iwl_clear_bit(bus->priv, CSR_GIO_REG,
129 CSR_GIO_REG_VAL_L0S_ENABLED);
130 IWL_DEBUG_POWER(bus->priv, "L1 Disabled; Enabling L0S\n");
131 }
132 }
133
134 static void iwl_pci_set_drv_data(struct iwl_bus *bus, void *drv_priv)
135 {
136 pci_set_drvdata(IWL_BUS_GET_PCI_DEV(bus), drv_priv);
137 }
138
139 static struct device *iwl_pci_get_dev(const struct iwl_bus *bus)
140 {
141 return &(IWL_BUS_GET_PCI_DEV(bus)->dev);
142 }
143
144 static void iwl_pci_get_hw_id(struct iwl_bus *bus, char buf[],
145 int buf_len)
146 {
147 struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
148
149 snprintf(buf, buf_len, "PCI ID: 0x%04X:0x%04X", pci_dev->device,
150 pci_dev->subsystem_device);
151 }
152
153 static void iwl_pci_write8(struct iwl_bus *bus, u32 ofs, u8 val)
154 {
155 iowrite8(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
156 }
157
158 static void iwl_pci_write32(struct iwl_bus *bus, u32 ofs, u32 val)
159 {
160 iowrite32(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
161 }
162
163 static u32 iwl_pci_read32(struct iwl_bus *bus, u32 ofs)
164 {
165 u32 val = ioread32(IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
166 return val;
167 }
168
169 static struct iwl_bus_ops pci_ops = {
170 .get_pm_support = iwl_pci_is_pm_supported,
171 .apm_config = iwl_pci_apm_config,
172 .set_drv_data = iwl_pci_set_drv_data,
173 .get_dev = iwl_pci_get_dev,
174 .get_hw_id = iwl_pci_get_hw_id,
175 .write8 = iwl_pci_write8,
176 .write32 = iwl_pci_write32,
177 .read32 = iwl_pci_read32,
178 };
179
180 #define IWL_PCI_DEVICE(dev, subdev, cfg) \
181 .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
182 .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
183 .driver_data = (kernel_ulong_t)&(cfg)
184
185 /* Hardware specific file defines the PCI IDs table for that hardware module */
186 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
187 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
188 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
189 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
190 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
191 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
192 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
193 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
194 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
195 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
196 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
197 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
198 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
199 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
200 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
201 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
202 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
203 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
204 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
205 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
206 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
207 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
208 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
209 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
210 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
211
212 /* 5300 Series WiFi */
213 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
214 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
215 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
216 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
217 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
218 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
219 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
220 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
221 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
222 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
223 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
224 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
225
226 /* 5350 Series WiFi/WiMax */
227 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
228 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
229 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
230
231 /* 5150 Series Wifi/WiMax */
232 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
233 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
234 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
235 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
236 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
237 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
238
239 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
240 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
241 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
242 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
243
244 /* 6x00 Series */
245 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
246 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
247 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
248 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
249 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
250 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
251 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
252 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
253 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
254 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
255
256 /* 6x05 Series */
257 {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
258 {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
259 {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
260 {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
261 {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
262 {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
263 {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
264
265 /* 6x30 Series */
266 {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
267 {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
268 {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
269 {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
270 {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
271 {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
272 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
273 {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
274 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
275 {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
276 {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
277 {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
278 {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
279 {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
280 {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
281 {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
282
283 /* 6x50 WiFi/WiMax Series */
284 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
285 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
286 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
287 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
288 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
289 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
290
291 /* 6150 WiFi/WiMax Series */
292 {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
293 {IWL_PCI_DEVICE(0x0885, 0x1307, iwl6150_bg_cfg)},
294 {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
295 {IWL_PCI_DEVICE(0x0885, 0x1327, iwl6150_bg_cfg)},
296 {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
297 {IWL_PCI_DEVICE(0x0886, 0x1317, iwl6150_bg_cfg)},
298
299 /* 1000 Series WiFi */
300 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
301 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
302 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
303 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
304 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
305 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
306 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
307 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
308 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
309 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
310 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
311 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
312
313 /* 100 Series WiFi */
314 {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
315 {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
316 {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
317 {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
318 {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
319 {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
320
321 /* 130 Series WiFi */
322 {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
323 {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
324 {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
325 {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
326 {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
327 {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
328
329 /* 2x00 Series */
330 {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
331 {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
332 {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
333 {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
334 {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
335 {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
336
337 /* 2x30 Series */
338 {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
339 {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
340 {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
341 {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
342 {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
343 {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
344
345 /* 6x35 Series */
346 {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
347 {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
348 {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
349 {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
350 {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
351 {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
352 {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
353 {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
354 {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
355
356 /* 105 Series */
357 {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
358 {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
359 {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
360 {IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg)},
361 {IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg)},
362 {IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg)},
363
364 /* 135 Series */
365 {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
366 {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
367 {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
368 {IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg)},
369 {IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg)},
370 {IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg)},
371
372 {0}
373 };
374 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
375
376 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
377 {
378 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
379 struct iwl_pci_bus *bus;
380 u8 rev_id;
381 u16 pci_cmd;
382 int err;
383
384 bus = kzalloc(sizeof(*bus), GFP_KERNEL);
385 if (!bus) {
386 pr_err("Couldn't allocate iwl_pci_bus");
387 err = -ENOMEM;
388 goto out_no_pci;
389 }
390
391 bus->pci_dev = pdev;
392
393 /* W/A - seems to solve weird behavior. We need to remove this if we
394 * don't want to stay in L1 all the time. This wastes a lot of power */
395 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
396 PCIE_LINK_STATE_CLKPM);
397
398 if (pci_enable_device(pdev)) {
399 err = -ENODEV;
400 goto out_no_pci;
401 }
402
403 pci_set_master(pdev);
404
405 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
406 if (!err)
407 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
408 if (err) {
409 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
410 if (!err)
411 err = pci_set_consistent_dma_mask(pdev,
412 DMA_BIT_MASK(32));
413 /* both attempts failed: */
414 if (err) {
415 pr_err("No suitable DMA available.\n");
416 goto out_pci_disable_device;
417 }
418 }
419
420 err = pci_request_regions(pdev, DRV_NAME);
421 if (err) {
422 pr_err("pci_request_regions failed");
423 goto out_pci_disable_device;
424 }
425
426 bus->hw_base = pci_iomap(pdev, 0, 0);
427 if (!bus->hw_base) {
428 pr_err("pci_iomap failed");
429 err = -ENODEV;
430 goto out_pci_release_regions;
431 }
432
433 pr_info("pci_resource_len = 0x%08llx\n",
434 (unsigned long long) pci_resource_len(pdev, 0));
435 pr_info("pci_resource_base = %p\n", bus->hw_base);
436
437 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
438 pr_info("HW Revision ID = 0x%X\n", rev_id);
439
440 /* We disable the RETRY_TIMEOUT register (0x41) to keep
441 * PCI Tx retries from interfering with C3 CPU state */
442 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
443
444 err = pci_enable_msi(pdev);
445 if (err) {
446 pr_err("pci_enable_msi failed");
447 goto out_iounmap;
448 }
449
450 /* TODO: Move this away, not needed if not MSI */
451 /* enable rfkill interrupt: hw bug w/a */
452 pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
453 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
454 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
455 pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
456 }
457
458 err = iwl_probe((void *) bus, &pci_ops, cfg);
459 if (err)
460 goto out_disable_msi;
461 return 0;
462
463 out_disable_msi:
464 pci_disable_msi(pdev);
465 out_iounmap:
466 pci_iounmap(pdev, bus->hw_base);
467 out_pci_release_regions:
468 pci_set_drvdata(pdev, NULL);
469 pci_release_regions(pdev);
470 out_pci_disable_device:
471 pci_disable_device(pdev);
472 out_no_pci:
473 kfree(bus);
474 return err;
475 }
476
477 static void iwl_pci_down(void *bus)
478 {
479 struct iwl_pci_bus *pci_bus = (struct iwl_pci_bus *) bus;
480
481 pci_disable_msi(pci_bus->pci_dev);
482 pci_iounmap(pci_bus->pci_dev, pci_bus->hw_base);
483 pci_release_regions(pci_bus->pci_dev);
484 pci_disable_device(pci_bus->pci_dev);
485 pci_set_drvdata(pci_bus->pci_dev, NULL);
486
487 kfree(pci_bus);
488 }
489
490 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
491 {
492 struct iwl_priv *priv = pci_get_drvdata(pdev);
493
494 /* This can happen if probe failed */
495 if (unlikely(!priv))
496 return;
497
498 iwl_remove(priv);
499
500 iwl_pci_down(IWL_BUS_GET_PCI_BUS(&priv->bus));
501 }
502
503 #ifdef CONFIG_PM
504
505 static int iwl_pci_suspend(struct device *device)
506 {
507 struct pci_dev *pdev = to_pci_dev(device);
508 struct iwl_priv *priv = pci_get_drvdata(pdev);
509
510 return iwl_suspend(priv);
511 }
512
513 static int iwl_pci_resume(struct device *device)
514 {
515 struct pci_dev *pdev = to_pci_dev(device);
516 struct iwl_priv *priv = pci_get_drvdata(pdev);
517
518 /*
519 * We disable the RETRY_TIMEOUT register (0x41) to keep
520 * PCI Tx retries from interfering with C3 CPU state.
521 */
522 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
523
524 return iwl_resume(priv);
525 }
526
527 static const struct dev_pm_ops iwl_dev_pm_ops = {
528 .suspend = iwl_pci_suspend,
529 .resume = iwl_pci_resume,
530 .freeze = iwl_pci_suspend,
531 .thaw = iwl_pci_resume,
532 .poweroff = iwl_pci_suspend,
533 .restore = iwl_pci_resume,
534 };
535
536 #define IWL_PM_OPS (&iwl_dev_pm_ops)
537
538 #else
539
540 #define IWL_PM_OPS NULL
541
542 #endif
543
544 static struct pci_driver iwl_pci_driver = {
545 .name = DRV_NAME,
546 .id_table = iwl_hw_card_ids,
547 .probe = iwl_pci_probe,
548 .remove = __devexit_p(iwl_pci_remove),
549 .driver.pm = IWL_PM_OPS,
550 };
551
552 int __must_check iwl_pci_register_driver(void)
553 {
554 int ret;
555 ret = pci_register_driver(&iwl_pci_driver);
556 if (ret)
557 pr_err("Unable to initialize PCI module\n");
558
559 return ret;
560 }
561
562 void iwl_pci_unregister_driver(void)
563 {
564 pci_unregister_driver(&iwl_pci_driver);
565 }
Linux kernel - Deliverables
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