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drivers/net: Add module.h to drivers who were implicitly using it
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-pci.c
1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63 #include <linux/module.h>
64 #include <linux/pci.h>
65 #include <linux/pci-aspm.h>
66
67 #include "iwl-bus.h"
68 #include "iwl-io.h"
69 #include "iwl-shared.h"
70 #include "iwl-trans.h"
71 #include "iwl-csr.h"
72 #include "iwl-cfg.h"
73
74 /* PCI registers */
75 #define PCI_CFG_RETRY_TIMEOUT 0x041
76 #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
77 #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
78
79 struct iwl_pci_bus {
80 /* basic pci-network driver stuff */
81 struct pci_dev *pci_dev;
82
83 /* pci hardware address support */
84 void __iomem *hw_base;
85 };
86
87 #define IWL_BUS_GET_PCI_BUS(_iwl_bus) \
88 ((struct iwl_pci_bus *) ((_iwl_bus)->bus_specific))
89
90 #define IWL_BUS_GET_PCI_DEV(_iwl_bus) \
91 ((IWL_BUS_GET_PCI_BUS(_iwl_bus))->pci_dev)
92
93 static u16 iwl_pciexp_link_ctrl(struct iwl_bus *bus)
94 {
95 int pos;
96 u16 pci_lnk_ctl;
97
98 struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
99
100 pos = pci_pcie_cap(pci_dev);
101 pci_read_config_word(pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
102 return pci_lnk_ctl;
103 }
104
105 static bool iwl_pci_is_pm_supported(struct iwl_bus *bus)
106 {
107 u16 lctl = iwl_pciexp_link_ctrl(bus);
108
109 return !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
110 }
111
112 static void iwl_pci_apm_config(struct iwl_bus *bus)
113 {
114 /*
115 * HW bug W/A for instability in PCIe bus L0S->L1 transition.
116 * Check if BIOS (or OS) enabled L1-ASPM on this device.
117 * If so (likely), disable L0S, so device moves directly L0->L1;
118 * costs negligible amount of power savings.
119 * If not (unlikely), enable L0S, so there is at least some
120 * power savings, even without L1.
121 */
122 u16 lctl = iwl_pciexp_link_ctrl(bus);
123
124 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
125 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
126 /* L1-ASPM enabled; disable(!) L0S */
127 iwl_set_bit(bus, CSR_GIO_REG,
128 CSR_GIO_REG_VAL_L0S_ENABLED);
129 dev_printk(KERN_INFO, bus->dev, "L1 Enabled; Disabling L0S\n");
130 } else {
131 /* L1-ASPM disabled; enable(!) L0S */
132 iwl_clear_bit(bus, CSR_GIO_REG,
133 CSR_GIO_REG_VAL_L0S_ENABLED);
134 dev_printk(KERN_INFO, bus->dev, "L1 Disabled; Enabling L0S\n");
135 }
136 }
137
138 static void iwl_pci_get_hw_id(struct iwl_bus *bus, char buf[],
139 int buf_len)
140 {
141 struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
142
143 snprintf(buf, buf_len, "PCI ID: 0x%04X:0x%04X", pci_dev->device,
144 pci_dev->subsystem_device);
145 }
146
147 static void iwl_pci_write8(struct iwl_bus *bus, u32 ofs, u8 val)
148 {
149 iowrite8(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
150 }
151
152 static void iwl_pci_write32(struct iwl_bus *bus, u32 ofs, u32 val)
153 {
154 iowrite32(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
155 }
156
157 static u32 iwl_pci_read32(struct iwl_bus *bus, u32 ofs)
158 {
159 u32 val = ioread32(IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
160 return val;
161 }
162
163 static const struct iwl_bus_ops bus_ops_pci = {
164 .get_pm_support = iwl_pci_is_pm_supported,
165 .apm_config = iwl_pci_apm_config,
166 .get_hw_id = iwl_pci_get_hw_id,
167 .write8 = iwl_pci_write8,
168 .write32 = iwl_pci_write32,
169 .read32 = iwl_pci_read32,
170 };
171
172 #define IWL_PCI_DEVICE(dev, subdev, cfg) \
173 .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
174 .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
175 .driver_data = (kernel_ulong_t)&(cfg)
176
177 /* Hardware specific file defines the PCI IDs table for that hardware module */
178 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
179 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
180 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
181 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
182 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
183 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
184 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
185 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
186 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
187 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
188 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
189 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
190 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
191 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
192 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
193 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
194 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
195 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
196 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
197 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
198 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
199 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
200 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
201 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
202 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
203
204 /* 5300 Series WiFi */
205 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
206 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
207 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
208 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
209 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
210 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
211 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
212 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
213 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
214 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
215 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
216 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
217
218 /* 5350 Series WiFi/WiMax */
219 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
220 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
221 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
222
223 /* 5150 Series Wifi/WiMax */
224 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
225 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
226 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
227 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
228 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
229 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
230
231 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
232 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
233 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
234 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
235
236 /* 6x00 Series */
237 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
238 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
239 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
240 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
241 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
242 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
243 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
244 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
245 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
246 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
247
248 /* 6x05 Series */
249 {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
250 {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
251 {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
252 {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
253 {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
254 {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
255 {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
256 {IWL_PCI_DEVICE(0x0082, 0xC020, iwl6005_2agn_sff_cfg)},
257 {IWL_PCI_DEVICE(0x0085, 0xC220, iwl6005_2agn_sff_cfg)},
258 {IWL_PCI_DEVICE(0x0082, 0x1341, iwl6005_2agn_d_cfg)},
259
260 /* 6x30 Series */
261 {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
262 {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
263 {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
264 {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
265 {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
266 {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
267 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
268 {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
269 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
270 {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
271 {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
272 {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
273 {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
274 {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
275 {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
276 {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
277
278 /* 6x50 WiFi/WiMax Series */
279 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
280 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
281 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
282 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
283 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
284 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
285
286 /* 6150 WiFi/WiMax Series */
287 {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
288 {IWL_PCI_DEVICE(0x0885, 0x1307, iwl6150_bg_cfg)},
289 {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
290 {IWL_PCI_DEVICE(0x0885, 0x1327, iwl6150_bg_cfg)},
291 {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
292 {IWL_PCI_DEVICE(0x0886, 0x1317, iwl6150_bg_cfg)},
293
294 /* 1000 Series WiFi */
295 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
296 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
297 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
298 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
299 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
300 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
301 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
302 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
303 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
304 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
305 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
306 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
307
308 /* 100 Series WiFi */
309 {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
310 {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
311 {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
312 {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
313 {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
314 {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
315
316 /* 130 Series WiFi */
317 {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
318 {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
319 {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
320 {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
321 {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
322 {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
323
324 /* 2x00 Series */
325 {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
326 {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
327 {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
328 {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
329 {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
330 {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
331 {IWL_PCI_DEVICE(0x0890, 0x4822, iwl2000_2bgn_d_cfg)},
332
333 /* 2x30 Series */
334 {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
335 {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
336 {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
337 {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
338 {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
339 {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
340
341 /* 6x35 Series */
342 {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
343 {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
344 {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
345 {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
346 {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
347 {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
348 {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
349 {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
350 {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
351
352 /* 105 Series */
353 {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
354 {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
355 {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
356 {IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg)},
357 {IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg)},
358 {IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg)},
359 {IWL_PCI_DEVICE(0x0894, 0x0822, iwl105_bgn_d_cfg)},
360
361 /* 135 Series */
362 {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
363 {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
364 {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
365 {IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg)},
366 {IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg)},
367 {IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg)},
368
369 {0}
370 };
371 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
372
373 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
374 {
375 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
376 struct iwl_bus *bus;
377 struct iwl_pci_bus *pci_bus;
378 u16 pci_cmd;
379 int err;
380
381 bus = kzalloc(sizeof(*bus) + sizeof(*pci_bus), GFP_KERNEL);
382 if (!bus) {
383 dev_printk(KERN_ERR, &pdev->dev,
384 "Couldn't allocate iwl_pci_bus");
385 err = -ENOMEM;
386 goto out_no_pci;
387 }
388
389 pci_bus = IWL_BUS_GET_PCI_BUS(bus);
390 pci_bus->pci_dev = pdev;
391
392 pci_set_drvdata(pdev, bus);
393
394 /* W/A - seems to solve weird behavior. We need to remove this if we
395 * don't want to stay in L1 all the time. This wastes a lot of power */
396 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
397 PCIE_LINK_STATE_CLKPM);
398
399 if (pci_enable_device(pdev)) {
400 err = -ENODEV;
401 goto out_no_pci;
402 }
403
404 pci_set_master(pdev);
405
406 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
407 if (!err)
408 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
409 if (err) {
410 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
411 if (!err)
412 err = pci_set_consistent_dma_mask(pdev,
413 DMA_BIT_MASK(32));
414 /* both attempts failed: */
415 if (err) {
416 dev_printk(KERN_ERR, bus->dev,
417 "No suitable DMA available.\n");
418 goto out_pci_disable_device;
419 }
420 }
421
422 err = pci_request_regions(pdev, DRV_NAME);
423 if (err) {
424 dev_printk(KERN_ERR, bus->dev, "pci_request_regions failed");
425 goto out_pci_disable_device;
426 }
427
428 pci_bus->hw_base = pci_iomap(pdev, 0, 0);
429 if (!pci_bus->hw_base) {
430 dev_printk(KERN_ERR, bus->dev, "pci_iomap failed");
431 err = -ENODEV;
432 goto out_pci_release_regions;
433 }
434
435 dev_printk(KERN_INFO, &pdev->dev,
436 "pci_resource_len = 0x%08llx\n",
437 (unsigned long long) pci_resource_len(pdev, 0));
438 dev_printk(KERN_INFO, &pdev->dev,
439 "pci_resource_base = %p\n", pci_bus->hw_base);
440
441 dev_printk(KERN_INFO, &pdev->dev,
442 "HW Revision ID = 0x%X\n", pdev->revision);
443
444 /* We disable the RETRY_TIMEOUT register (0x41) to keep
445 * PCI Tx retries from interfering with C3 CPU state */
446 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
447
448 err = pci_enable_msi(pdev);
449 if (err) {
450 dev_printk(KERN_ERR, &pdev->dev, "pci_enable_msi failed");
451 goto out_iounmap;
452 }
453
454 /* TODO: Move this away, not needed if not MSI */
455 /* enable rfkill interrupt: hw bug w/a */
456 pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
457 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
458 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
459 pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
460 }
461
462 bus->dev = &pdev->dev;
463 bus->irq = pdev->irq;
464 bus->ops = &bus_ops_pci;
465
466 err = iwl_probe(bus, &trans_ops_pcie, cfg);
467 if (err)
468 goto out_disable_msi;
469 return 0;
470
471 out_disable_msi:
472 pci_disable_msi(pdev);
473 out_iounmap:
474 pci_iounmap(pdev, pci_bus->hw_base);
475 out_pci_release_regions:
476 pci_set_drvdata(pdev, NULL);
477 pci_release_regions(pdev);
478 out_pci_disable_device:
479 pci_disable_device(pdev);
480 out_no_pci:
481 kfree(bus);
482 return err;
483 }
484
485 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
486 {
487 struct iwl_bus *bus = pci_get_drvdata(pdev);
488 struct iwl_pci_bus *pci_bus = IWL_BUS_GET_PCI_BUS(bus);
489 struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
490 struct iwl_shared *shrd = bus->shrd;
491
492 iwl_remove(shrd->priv);
493
494 pci_disable_msi(pci_dev);
495 pci_iounmap(pci_dev, pci_bus->hw_base);
496 pci_release_regions(pci_dev);
497 pci_disable_device(pci_dev);
498 pci_set_drvdata(pci_dev, NULL);
499
500 kfree(bus);
501 }
502
503 #ifdef CONFIG_PM_SLEEP
504
505 static int iwl_pci_suspend(struct device *device)
506 {
507 struct pci_dev *pdev = to_pci_dev(device);
508 struct iwl_bus *bus = pci_get_drvdata(pdev);
509 struct iwl_shared *shrd = bus->shrd;
510
511 /* Before you put code here, think about WoWLAN. You cannot check here
512 * whether WoWLAN is enabled or not, and your code will run even if
513 * WoWLAN is enabled - don't kill the NIC, someone may need it in Sx.
514 */
515
516 return iwl_trans_suspend(shrd->trans);
517 }
518
519 static int iwl_pci_resume(struct device *device)
520 {
521 struct pci_dev *pdev = to_pci_dev(device);
522 struct iwl_bus *bus = pci_get_drvdata(pdev);
523 struct iwl_shared *shrd = bus->shrd;
524
525 /* Before you put code here, think about WoWLAN. You cannot check here
526 * whether WoWLAN is enabled or not, and your code will run even if
527 * WoWLAN is enabled - the NIC may be alive.
528 */
529
530 /*
531 * We disable the RETRY_TIMEOUT register (0x41) to keep
532 * PCI Tx retries from interfering with C3 CPU state.
533 */
534 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
535
536 return iwl_trans_resume(shrd->trans);
537 }
538
539 static SIMPLE_DEV_PM_OPS(iwl_dev_pm_ops, iwl_pci_suspend, iwl_pci_resume);
540
541 #define IWL_PM_OPS (&iwl_dev_pm_ops)
542
543 #else
544
545 #define IWL_PM_OPS NULL
546
547 #endif
548
549 static struct pci_driver iwl_pci_driver = {
550 .name = DRV_NAME,
551 .id_table = iwl_hw_card_ids,
552 .probe = iwl_pci_probe,
553 .remove = __devexit_p(iwl_pci_remove),
554 .driver.pm = IWL_PM_OPS,
555 };
556
557 int __must_check iwl_pci_register_driver(void)
558 {
559 int ret;
560 ret = pci_register_driver(&iwl_pci_driver);
561 if (ret)
562 pr_err("Unable to initialize PCI module\n");
563
564 return ret;
565 }
566
567 void iwl_pci_unregister_driver(void)
568 {
569 pci_unregister_driver(&iwl_pci_driver);
570 }
Linux kernel - Deliverables
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