1 /******************************************************************************
3 * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/init.h>
35 #include <net/mac80211.h>
37 #include "iwl-eeprom.h"
41 #include "iwl-commands.h"
42 #include "iwl-debug.h"
43 #include "iwl-power.h"
46 * Setting power level allows the card to go to sleep when not busy.
48 * We calculate a sleep command based on the required latency, which
49 * we get from mac80211. In order to handle thermal throttling, we can
50 * also use pre-defined power levels.
54 * For now, keep using power level 1 instead of automatically
57 bool no_sleep_autoadjust
= true;
58 module_param(no_sleep_autoadjust
, bool, S_IRUGO
);
59 MODULE_PARM_DESC(no_sleep_autoadjust
,
60 "don't automatically adjust sleep level "
61 "according to maximum network latency");
64 * This defines the old power levels. They are still used by default
65 * (level 1) and for thermal throttle (levels 3 through 5)
68 struct iwl_power_vec_entry
{
69 struct iwl_powertable_cmd cmd
;
70 u8 no_dtim
; /* number of skip dtim */
73 #define IWL_DTIM_RANGE_0_MAX 2
74 #define IWL_DTIM_RANGE_1_MAX 10
76 #define NOSLP cpu_to_le16(0), 0, 0
77 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
78 #define TU_TO_USEC 1024
79 #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
80 #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
85 /* default power management (not Tx power) table values */
86 /* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
88 static const struct iwl_power_vec_entry range_0
[IWL_POWER_NUM
] = {
89 {{SLP
, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
90 {{SLP
, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
91 {{SLP
, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
92 {{SLP
, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
93 {{SLP
, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
97 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
99 static const struct iwl_power_vec_entry range_1
[IWL_POWER_NUM
] = {
100 {{SLP
, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
101 {{SLP
, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
102 {{SLP
, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
103 {{SLP
, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
104 {{SLP
, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
107 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
109 static const struct iwl_power_vec_entry range_2
[IWL_POWER_NUM
] = {
110 {{SLP
, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
111 {{SLP
, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
112 {{SLP
, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
113 {{SLP
, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
114 {{SLP
, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
117 static void iwl_static_sleep_cmd(struct iwl_priv
*priv
,
118 struct iwl_powertable_cmd
*cmd
,
119 enum iwl_power_level lvl
, int period
)
121 const struct iwl_power_vec_entry
*table
;
122 int max_sleep
[IWL_POWER_VEC_SIZE
] = { 0 };
128 if (period
<= IWL_DTIM_RANGE_1_MAX
)
130 if (period
<= IWL_DTIM_RANGE_0_MAX
)
133 BUG_ON(lvl
< 0 || lvl
>= IWL_POWER_NUM
);
135 *cmd
= table
[lvl
].cmd
;
140 for (i
= 0; i
< IWL_POWER_VEC_SIZE
; i
++)
144 skip
= table
[lvl
].no_dtim
;
145 for (i
= 0; i
< IWL_POWER_VEC_SIZE
; i
++)
146 max_sleep
[i
] = le32_to_cpu(cmd
->sleep_interval
[i
]);
147 max_sleep
[IWL_POWER_VEC_SIZE
- 1] = skip
+ 1;
150 slp_itrvl
= le32_to_cpu(cmd
->sleep_interval
[IWL_POWER_VEC_SIZE
- 1]);
151 /* figure out the listen interval based on dtim period and skip */
152 if (slp_itrvl
== 0xFF)
153 cmd
->sleep_interval
[IWL_POWER_VEC_SIZE
- 1] =
154 cpu_to_le32(period
* (skip
+ 1));
156 slp_itrvl
= le32_to_cpu(cmd
->sleep_interval
[IWL_POWER_VEC_SIZE
- 1]);
157 if (slp_itrvl
> period
)
158 cmd
->sleep_interval
[IWL_POWER_VEC_SIZE
- 1] =
159 cpu_to_le32((slp_itrvl
/ period
) * period
);
162 cmd
->flags
|= IWL_POWER_SLEEP_OVER_DTIM_MSK
;
164 cmd
->flags
&= ~IWL_POWER_SLEEP_OVER_DTIM_MSK
;
166 slp_itrvl
= le32_to_cpu(cmd
->sleep_interval
[IWL_POWER_VEC_SIZE
- 1]);
167 if (slp_itrvl
> IWL_CONN_MAX_LISTEN_INTERVAL
)
168 cmd
->sleep_interval
[IWL_POWER_VEC_SIZE
- 1] =
169 cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL
);
171 /* enforce max sleep interval */
172 for (i
= IWL_POWER_VEC_SIZE
- 1; i
>= 0 ; i
--) {
173 if (le32_to_cpu(cmd
->sleep_interval
[i
]) >
174 (max_sleep
[i
] * period
))
175 cmd
->sleep_interval
[i
] =
176 cpu_to_le32(max_sleep
[i
] * period
);
177 if (i
!= (IWL_POWER_VEC_SIZE
- 1)) {
178 if (le32_to_cpu(cmd
->sleep_interval
[i
]) >
179 le32_to_cpu(cmd
->sleep_interval
[i
+1]))
180 cmd
->sleep_interval
[i
] =
181 cmd
->sleep_interval
[i
+1];
185 if (priv
->power_data
.pci_pm
)
186 cmd
->flags
|= IWL_POWER_PCI_PM_MSK
;
188 cmd
->flags
&= ~IWL_POWER_PCI_PM_MSK
;
190 IWL_DEBUG_POWER(priv
, "numSkipDtim = %u, dtimPeriod = %d\n",
192 IWL_DEBUG_POWER(priv
, "Sleep command for index %d\n", lvl
+ 1);
195 static void iwl_power_sleep_cam_cmd(struct iwl_priv
*priv
,
196 struct iwl_powertable_cmd
*cmd
)
198 memset(cmd
, 0, sizeof(*cmd
));
200 if (priv
->power_data
.pci_pm
)
201 cmd
->flags
|= IWL_POWER_PCI_PM_MSK
;
203 IWL_DEBUG_POWER(priv
, "Sleep command for CAM\n");
206 static void iwl_power_fill_sleep_cmd(struct iwl_priv
*priv
,
207 struct iwl_powertable_cmd
*cmd
,
208 int dynps_ms
, int wakeup_period
)
211 * These are the original power level 3 sleep successions. The
212 * device may behave better with such succession and was also
213 * only tested with that. Just like the original sleep commands,
214 * also adjust the succession here to the wakeup_period below.
215 * The ranges are the same as for the sleep commands, 0-2, 3-9
216 * and >10, which is selected based on the DTIM interval for
217 * the sleep index but here we use the wakeup period since that
218 * is what we need to do for the latency requirements.
220 static const u8 slp_succ_r0
[IWL_POWER_VEC_SIZE
] = { 2, 2, 2, 2, 2 };
221 static const u8 slp_succ_r1
[IWL_POWER_VEC_SIZE
] = { 2, 4, 6, 7, 9 };
222 static const u8 slp_succ_r2
[IWL_POWER_VEC_SIZE
] = { 2, 7, 9, 9, 0xFF };
223 const u8
*slp_succ
= slp_succ_r0
;
226 if (wakeup_period
> IWL_DTIM_RANGE_0_MAX
)
227 slp_succ
= slp_succ_r1
;
228 if (wakeup_period
> IWL_DTIM_RANGE_1_MAX
)
229 slp_succ
= slp_succ_r2
;
231 memset(cmd
, 0, sizeof(*cmd
));
233 cmd
->flags
= IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
|
234 IWL_POWER_FAST_PD
; /* no use seeing frames for others */
236 if (priv
->power_data
.pci_pm
)
237 cmd
->flags
|= IWL_POWER_PCI_PM_MSK
;
239 cmd
->rx_data_timeout
= cpu_to_le32(1000 * dynps_ms
);
240 cmd
->tx_data_timeout
= cpu_to_le32(1000 * dynps_ms
);
242 for (i
= 0; i
< IWL_POWER_VEC_SIZE
; i
++)
243 cmd
->sleep_interval
[i
] =
244 cpu_to_le32(min_t(int, slp_succ
[i
], wakeup_period
));
246 IWL_DEBUG_POWER(priv
, "Automatic sleep command\n");
249 static int iwl_set_power(struct iwl_priv
*priv
, struct iwl_powertable_cmd
*cmd
)
251 IWL_DEBUG_POWER(priv
, "Sending power/sleep command\n");
252 IWL_DEBUG_POWER(priv
, "Flags value = 0x%08X\n", cmd
->flags
);
253 IWL_DEBUG_POWER(priv
, "Tx timeout = %u\n", le32_to_cpu(cmd
->tx_data_timeout
));
254 IWL_DEBUG_POWER(priv
, "Rx timeout = %u\n", le32_to_cpu(cmd
->rx_data_timeout
));
255 IWL_DEBUG_POWER(priv
, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
256 le32_to_cpu(cmd
->sleep_interval
[0]),
257 le32_to_cpu(cmd
->sleep_interval
[1]),
258 le32_to_cpu(cmd
->sleep_interval
[2]),
259 le32_to_cpu(cmd
->sleep_interval
[3]),
260 le32_to_cpu(cmd
->sleep_interval
[4]));
262 return iwl_send_cmd_pdu(priv
, POWER_TABLE_CMD
,
263 sizeof(struct iwl_powertable_cmd
), cmd
);
266 /* priv->mutex must be held */
267 int iwl_power_update_mode(struct iwl_priv
*priv
, bool force
)
270 bool enabled
= priv
->hw
->conf
.flags
& IEEE80211_CONF_PS
;
272 struct iwl_powertable_cmd cmd
;
275 /* Don't update the RX chain when chain noise calibration is running */
276 update_chains
= priv
->chain_noise_data
.state
== IWL_CHAIN_NOISE_DONE
||
277 priv
->chain_noise_data
.state
== IWL_CHAIN_NOISE_ALIVE
;
279 dtimper
= priv
->hw
->conf
.ps_dtim_period
?: 1;
281 if (priv
->cfg
->broken_powersave
)
282 iwl_power_sleep_cam_cmd(priv
, &cmd
);
283 else if (priv
->cfg
->supports_idle
&&
284 priv
->hw
->conf
.flags
& IEEE80211_CONF_IDLE
)
285 iwl_static_sleep_cmd(priv
, &cmd
, IWL_POWER_INDEX_5
, 20);
286 else if (priv
->cfg
->ops
->lib
->tt_ops
.lower_power_detection
&&
287 priv
->cfg
->ops
->lib
->tt_ops
.tt_power_mode
) {
288 if (priv
->cfg
->ops
->lib
->tt_ops
.lower_power_detection(priv
)) {
289 /* in thermal throttling low power state */
290 iwl_static_sleep_cmd(priv
, &cmd
,
291 priv
->cfg
->ops
->lib
->tt_ops
.tt_power_mode(priv
),
295 iwl_power_sleep_cam_cmd(priv
, &cmd
);
296 else if (priv
->power_data
.debug_sleep_level_override
>= 0)
297 iwl_static_sleep_cmd(priv
, &cmd
,
298 priv
->power_data
.debug_sleep_level_override
,
300 else if (no_sleep_autoadjust
)
301 iwl_static_sleep_cmd(priv
, &cmd
, IWL_POWER_INDEX_1
, dtimper
);
303 iwl_power_fill_sleep_cmd(priv
, &cmd
,
304 priv
->hw
->conf
.dynamic_ps_timeout
,
305 priv
->hw
->conf
.max_sleep_period
);
307 if (iwl_is_ready_rf(priv
) &&
308 (memcmp(&priv
->power_data
.sleep_cmd
, &cmd
, sizeof(cmd
)) || force
)) {
309 if (cmd
.flags
& IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
)
310 set_bit(STATUS_POWER_PMI
, &priv
->status
);
312 ret
= iwl_set_power(priv
, &cmd
);
314 if (!(cmd
.flags
& IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
))
315 clear_bit(STATUS_POWER_PMI
, &priv
->status
);
317 if (priv
->cfg
->ops
->lib
->update_chain_flags
&&
319 priv
->cfg
->ops
->lib
->update_chain_flags(priv
);
320 else if (priv
->cfg
->ops
->lib
->update_chain_flags
)
321 IWL_DEBUG_POWER(priv
,
322 "Cannot update the power, chain noise "
323 "calibration running: %d\n",
324 priv
->chain_noise_data
.state
);
325 memcpy(&priv
->power_data
.sleep_cmd
, &cmd
, sizeof(cmd
));
327 IWL_ERR(priv
, "set power fail, ret = %d", ret
);
332 EXPORT_SYMBOL(iwl_power_update_mode
);
334 /* initialize to default */
335 void iwl_power_initialize(struct iwl_priv
*priv
)
337 u16 lctl
= iwl_pcie_link_ctl(priv
);
339 priv
->power_data
.pci_pm
= !(lctl
& PCI_CFG_LINK_CTRL_VAL_L0S_EN
);
341 priv
->power_data
.debug_sleep_level_override
= -1;
343 memset(&priv
->power_data
.sleep_cmd
, 0,
344 sizeof(priv
->power_data
.sleep_cmd
));
346 EXPORT_SYMBOL(iwl_power_initialize
);