drivers/net/wireless/iwlwifi/iwl-ucode.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/sched.h>
  34 #include <linux/dma-mapping.h>
  35
  36 #include "iwl-dev.h"
  37 #include "iwl-core.h"
  38 #include "iwl-io.h"
  39 #include "iwl-agn-hw.h"
  40 #include "iwl-agn.h"
  41 #include "iwl-agn-calib.h"
  42 #include "iwl-trans.h"
  43 #include "iwl-fh.h"
  44
  45 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  46         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  47          0, COEX_UNASSOC_IDLE_FLAGS},
  48         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  49          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  50         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  51          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  52         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  53          0, COEX_CALIBRATION_FLAGS},
  54         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  55          0, COEX_PERIODIC_CALIBRATION_FLAGS},
  56         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  57          0, COEX_CONNECTION_ESTAB_FLAGS},
  58         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  59          0, COEX_ASSOCIATED_IDLE_FLAGS},
  60         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  61          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  62         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  63          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  64         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  65          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  66         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  67         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  68         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  69          0, COEX_STAND_ALONE_DEBUG_FLAGS},
  70         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  71          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  72         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  73         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  74 };
  75
  76 /******************************************************************************
  77  *
  78  * uCode download functions
  79  *
  80  ******************************************************************************/
  81
  82 static void iwl_free_fw_desc(struct iwl_bus *bus, struct fw_desc *desc)
  83 {
  84         if (desc->v_addr)
  85                 dma_free_coherent(bus->dev, desc->len,
  86                                   desc->v_addr, desc->p_addr);
  87         desc->v_addr = NULL;
  88         desc->len = 0;
  89 }
  90
  91 static void iwl_free_fw_img(struct iwl_bus *bus, struct fw_img *img)
  92 {
  93         iwl_free_fw_desc(bus, &img->code);
  94         iwl_free_fw_desc(bus, &img->data);
  95 }
  96
  97 void iwl_dealloc_ucode(struct iwl_trans *trans)
  98 {
  99         iwl_free_fw_img(bus(trans), &trans->ucode_rt);
 100         iwl_free_fw_img(bus(trans), &trans->ucode_init);
 101         iwl_free_fw_img(bus(trans), &trans->ucode_wowlan);
 102 }
 103
 104 int iwl_alloc_fw_desc(struct iwl_bus *bus, struct fw_desc *desc,
 105                       const void *data, size_t len)
 106 {
 107         if (!len) {
 108                 desc->v_addr = NULL;
 109                 return -EINVAL;
 110         }
 111
 112         desc->v_addr = dma_alloc_coherent(bus->dev, len,
 113                                           &desc->p_addr, GFP_KERNEL);
 114         if (!desc->v_addr)
 115                 return -ENOMEM;
 116
 117         desc->len = len;
 118         memcpy(desc->v_addr, data, len);
 119         return 0;
 120 }
 121
 122 /*
 123  * ucode
 124  */
 125 static int iwl_load_section(struct iwl_trans *trans, const char *name,
 126                                 struct fw_desc *image, u32 dst_addr)
 127 {
 128         struct iwl_bus *bus = bus(trans);
 129         dma_addr_t phy_addr = image->p_addr;
 130         u32 byte_cnt = image->len;
 131         int ret;
 132
 133         trans->ucode_write_complete = 0;
 134
 135         iwl_write_direct32(bus,
 136                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
 137                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
 138
 139         iwl_write_direct32(bus,
 140                 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
 141
 142         iwl_write_direct32(bus,
 143                 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
 144                 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
 145
 146         iwl_write_direct32(bus,
 147                 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
 148                 (iwl_get_dma_hi_addr(phy_addr)
 149                         << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
 150
 151         iwl_write_direct32(bus,
 152                 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
 153                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
 154                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
 155                 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
 156
 157         iwl_write_direct32(bus,
 158                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
 159                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE       |
 160                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE    |
 161                 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
 162
 163         IWL_DEBUG_FW(bus, "%s uCode section being loaded...\n", name);
 164         ret = wait_event_timeout(trans->shrd->wait_command_queue,
 165                                  trans->ucode_write_complete, 5 * HZ);
 166         if (!ret) {
 167                 IWL_ERR(trans, "Could not load the %s uCode section\n",
 168                         name);
 169                 return -ETIMEDOUT;
 170         }
 171
 172         return 0;
 173 }
 174
 175 static inline struct fw_img *iwl_get_ucode_image(struct iwl_trans *trans,
 176                                         enum iwl_ucode_type ucode_type)
 177 {
 178         switch (ucode_type) {
 179         case IWL_UCODE_INIT:
 180                 return &trans->ucode_init;
 181         case IWL_UCODE_WOWLAN:
 182                 return &trans->ucode_wowlan;
 183         case IWL_UCODE_REGULAR:
 184                 return &trans->ucode_rt;
 185         case IWL_UCODE_NONE:
 186                 break;
 187         }
 188         return NULL;
 189 }
 190
 191 static int iwl_load_given_ucode(struct iwl_trans *trans,
 192                                    enum iwl_ucode_type ucode_type)
 193 {
 194         int ret = 0;
 195         struct fw_img *image = iwl_get_ucode_image(trans, ucode_type);
 196
 197
 198         if (!image) {
 199                 IWL_ERR(trans, "Invalid ucode requested (%d)\n",
 200                         ucode_type);
 201                 return -EINVAL;
 202         }
 203
 204         ret = iwl_load_section(trans, "INST", &image->code,
 205                                    IWLAGN_RTC_INST_LOWER_BOUND);
 206         if (ret)
 207                 return ret;
 208
 209         return iwl_load_section(trans, "DATA", &image->data,
 210                                     IWLAGN_RTC_DATA_LOWER_BOUND);
 211 }
 212
 213 /*
 214  *  Calibration
 215  */
 216 static int iwl_set_Xtal_calib(struct iwl_priv *priv)
 217 {
 218         struct iwl_calib_xtal_freq_cmd cmd;
 219         __le16 *xtal_calib =
 220                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL);
 221
 222         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
 223         cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
 224         cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
 225         return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd));
 226 }
 227
 228 static int iwl_set_temperature_offset_calib(struct iwl_priv *priv)
 229 {
 230         struct iwl_calib_temperature_offset_cmd cmd;
 231         __le16 *offset_calib =
 232                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
 233
 234         memset(&cmd, 0, sizeof(cmd));
 235         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 236         memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib));
 237         if (!(cmd.radio_sensor_offset))
 238                 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
 239
 240         IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
 241                         le16_to_cpu(cmd.radio_sensor_offset));
 242         return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd));
 243 }
 244
 245 static int iwl_set_temperature_offset_calib_v2(struct iwl_priv *priv)
 246 {
 247         struct iwl_calib_temperature_offset_v2_cmd cmd;
 248         __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv,
 249                                      EEPROM_KELVIN_TEMPERATURE);
 250         __le16 *offset_calib_low =
 251                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
 252         struct iwl_eeprom_calib_hdr *hdr;
 253
 254         memset(&cmd, 0, sizeof(cmd));
 255         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 256         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
 257                                                         EEPROM_CALIB_ALL);
 258         memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
 259                 sizeof(*offset_calib_high));
 260         memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
 261                 sizeof(*offset_calib_low));
 262         if (!(cmd.radio_sensor_offset_low)) {
 263                 IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n");
 264                 cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
 265                 cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
 266         }
 267         memcpy(&cmd.burntVoltageRef, &hdr->voltage,
 268                 sizeof(hdr->voltage));
 269
 270         IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n",
 271                         le16_to_cpu(cmd.radio_sensor_offset_high));
 272         IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n",
 273                         le16_to_cpu(cmd.radio_sensor_offset_low));
 274         IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n",
 275                         le16_to_cpu(cmd.burntVoltageRef));
 276
 277         return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd));
 278 }
 279
 280 static int iwl_send_calib_cfg(struct iwl_trans *trans)
 281 {
 282         struct iwl_calib_cfg_cmd calib_cfg_cmd;
 283         struct iwl_host_cmd cmd = {
 284                 .id = CALIBRATION_CFG_CMD,
 285                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
 286                 .data = { &calib_cfg_cmd, },
 287         };
 288
 289         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
 290         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
 291         calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
 292         calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
 293         calib_cfg_cmd.ucd_calib_cfg.flags =
 294                 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
 295
 296         return iwl_trans_send_cmd(trans, &cmd);
 297 }
 298
 299 int iwlagn_rx_calib_result(struct iwl_priv *priv,
 300                             struct iwl_rx_mem_buffer *rxb,
 301                             struct iwl_device_cmd *cmd)
 302 {
 303         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 304         struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
 305         int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 306
 307         /* reduce the size of the length field itself */
 308         len -= 4;
 309
 310         if (iwl_calib_set(priv, hdr, len))
 311                 IWL_ERR(priv, "Failed to record calibration data %d\n",
 312                         hdr->op_code);
 313
 314         return 0;
 315 }
 316
 317 int iwlagn_init_alive_start(struct iwl_priv *priv)
 318 {
 319         int ret;
 320
 321         if (priv->cfg->bt_params &&
 322             priv->cfg->bt_params->advanced_bt_coexist) {
 323                 /*
 324                  * Tell uCode we are ready to perform calibration
 325                  * need to perform this before any calibration
 326                  * no need to close the envlope since we are going
 327                  * to load the runtime uCode later.
 328                  */
 329                 ret = iwl_send_bt_env(trans(priv), IWL_BT_COEX_ENV_OPEN,
 330                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
 331                 if (ret)
 332                         return ret;
 333
 334         }
 335
 336         ret = iwl_send_calib_cfg(trans(priv));
 337         if (ret)
 338                 return ret;
 339
 340         /**
 341          * temperature offset calibration is only needed for runtime ucode,
 342          * so prepare the value now.
 343          */
 344         if (priv->cfg->need_temp_offset_calib) {
 345                 if (priv->cfg->temp_offset_v2)
 346                         return iwl_set_temperature_offset_calib_v2(priv);
 347                 else
 348                         return iwl_set_temperature_offset_calib(priv);
 349         }
 350
 351         return 0;
 352 }
 353
 354 static int iwl_send_wimax_coex(struct iwl_priv *priv)
 355 {
 356         struct iwl_wimax_coex_cmd coex_cmd;
 357
 358         if (priv->cfg->base_params->support_wimax_coexist) {
 359                 /* UnMask wake up src at associated sleep */
 360                 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
 361
 362                 /* UnMask wake up src at unassociated sleep */
 363                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
 364                 memcpy(coex_cmd.sta_prio, cu_priorities,
 365                         sizeof(struct iwl_wimax_coex_event_entry) *
 366                          COEX_NUM_OF_EVENTS);
 367
 368                 /* enabling the coexistence feature */
 369                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
 370
 371                 /* enabling the priorities tables */
 372                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
 373         } else {
 374                 /* coexistence is disabled */
 375                 memset(&coex_cmd, 0, sizeof(coex_cmd));
 376         }
 377         return iwl_trans_send_cmd_pdu(trans(priv),
 378                                 COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
 379                                 sizeof(coex_cmd), &coex_cmd);
 380 }
 381
 382 static const u8 iwl_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
 383         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 384                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 385         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 386                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 387         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 388                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 389         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 390                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 391         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 392                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 393         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 394                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 395         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 396                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 397         ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 398                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 399         ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 400                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 401         0, 0, 0, 0, 0, 0, 0
 402 };
 403
 404 void iwl_send_prio_tbl(struct iwl_trans *trans)
 405 {
 406         struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
 407
 408         memcpy(prio_tbl_cmd.prio_tbl, iwl_bt_prio_tbl,
 409                 sizeof(iwl_bt_prio_tbl));
 410         if (iwl_trans_send_cmd_pdu(trans,
 411                                 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
 412                                 sizeof(prio_tbl_cmd), &prio_tbl_cmd))
 413                 IWL_ERR(trans, "failed to send BT prio tbl command\n");
 414 }
 415
 416 int iwl_send_bt_env(struct iwl_trans *trans, u8 action, u8 type)
 417 {
 418         struct iwl_bt_coex_prot_env_cmd env_cmd;
 419         int ret;
 420
 421         env_cmd.action = action;
 422         env_cmd.type = type;
 423         ret = iwl_trans_send_cmd_pdu(trans,
 424                                REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
 425                                sizeof(env_cmd), &env_cmd);
 426         if (ret)
 427                 IWL_ERR(trans, "failed to send BT env command\n");
 428         return ret;
 429 }
 430
 431
 432 static int iwl_alive_notify(struct iwl_priv *priv)
 433 {
 434         struct iwl_rxon_context *ctx;
 435         int ret;
 436
 437         if (!priv->tx_cmd_pool)
 438                 priv->tx_cmd_pool =
 439                         kmem_cache_create("iwl_dev_cmd",
 440                                           sizeof(struct iwl_device_cmd),
 441                                           sizeof(void *), 0, NULL);
 442
 443         if (!priv->tx_cmd_pool)
 444                 return -ENOMEM;
 445
 446         iwl_trans_tx_start(trans(priv));
 447         for_each_context(priv, ctx)
 448                 ctx->last_tx_rejected = false;
 449
 450         ret = iwl_send_wimax_coex(priv);
 451         if (ret)
 452                 return ret;
 453
 454         if (!priv->cfg->no_xtal_calib) {
 455                 ret = iwl_set_Xtal_calib(priv);
 456                 if (ret)
 457                         return ret;
 458         }
 459
 460         return iwl_send_calib_results(priv);
 461 }
 462
 463
 464 /**
 465  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
 466  *   using sample data 100 bytes apart.  If these sample points are good,
 467  *   it's a pretty good bet that everything between them is good, too.
 468  */
 469 static int iwl_verify_inst_sparse(struct iwl_bus *bus,
 470                                       struct fw_desc *fw_desc)
 471 {
 472         __le32 *image = (__le32 *)fw_desc->v_addr;
 473         u32 len = fw_desc->len;
 474         u32 val;
 475         u32 i;
 476
 477         IWL_DEBUG_FW(bus, "ucode inst image size is %u\n", len);
 478
 479         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
 480                 /* read data comes through single port, auto-incr addr */
 481                 /* NOTE: Use the debugless read so we don't flood kernel log
 482                  * if IWL_DL_IO is set */
 483                 iwl_write_direct32(bus, HBUS_TARG_MEM_RADDR,
 484                         i + IWLAGN_RTC_INST_LOWER_BOUND);
 485                 val = iwl_read32(bus, HBUS_TARG_MEM_RDAT);
 486                 if (val != le32_to_cpu(*image))
 487                         return -EIO;
 488         }
 489
 490         return 0;
 491 }
 492
 493 static void iwl_print_mismatch_inst(struct iwl_bus *bus,
 494                                     struct fw_desc *fw_desc)
 495 {
 496         __le32 *image = (__le32 *)fw_desc->v_addr;
 497         u32 len = fw_desc->len;
 498         u32 val;
 499         u32 offs;
 500         int errors = 0;
 501
 502         IWL_DEBUG_FW(bus, "ucode inst image size is %u\n", len);
 503
 504         iwl_write_direct32(bus, HBUS_TARG_MEM_RADDR,
 505                            IWLAGN_RTC_INST_LOWER_BOUND);
 506
 507         for (offs = 0;
 508              offs < len && errors < 20;
 509              offs += sizeof(u32), image++) {
 510                 /* read data comes through single port, auto-incr addr */
 511                 val = iwl_read32(bus, HBUS_TARG_MEM_RDAT);
 512                 if (val != le32_to_cpu(*image)) {
 513                         IWL_ERR(bus, "uCode INST section at "
 514                                 "offset 0x%x, is 0x%x, s/b 0x%x\n",
 515                                 offs, val, le32_to_cpu(*image));
 516                         errors++;
 517                 }
 518         }
 519 }
 520
 521 /**
 522  * iwl_verify_ucode - determine which instruction image is in SRAM,
 523  *    and verify its contents
 524  */
 525 static int iwl_verify_ucode(struct iwl_trans *trans,
 526                             enum iwl_ucode_type ucode_type)
 527 {
 528         struct fw_img *img = iwl_get_ucode_image(trans, ucode_type);
 529
 530         if (!img) {
 531                 IWL_ERR(trans, "Invalid ucode requested (%d)\n", ucode_type);
 532                 return -EINVAL;
 533         }
 534
 535         if (!iwl_verify_inst_sparse(bus(trans), &img->code)) {
 536                 IWL_DEBUG_FW(trans, "uCode is good in inst SRAM\n");
 537                 return 0;
 538         }
 539
 540         IWL_ERR(trans, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
 541
 542         iwl_print_mismatch_inst(bus(trans), &img->code);
 543         return -EIO;
 544 }
 545
 546 struct iwlagn_alive_data {
 547         bool valid;
 548         u8 subtype;
 549 };
 550
 551 static void iwl_alive_fn(struct iwl_priv *priv,
 552                             struct iwl_rx_packet *pkt,
 553                             void *data)
 554 {
 555         struct iwlagn_alive_data *alive_data = data;
 556         struct iwl_alive_resp *palive;
 557
 558         palive = &pkt->u.alive_frame;
 559
 560         IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision "
 561                        "0x%01X 0x%01X\n",
 562                        palive->is_valid, palive->ver_type,
 563                        palive->ver_subtype);
 564
 565         priv->device_pointers.error_event_table =
 566                 le32_to_cpu(palive->error_event_table_ptr);
 567         priv->device_pointers.log_event_table =
 568                 le32_to_cpu(palive->log_event_table_ptr);
 569
 570         alive_data->subtype = palive->ver_subtype;
 571         alive_data->valid = palive->is_valid == UCODE_VALID_OK;
 572 }
 573
 574 #define UCODE_ALIVE_TIMEOUT     HZ
 575 #define UCODE_CALIB_TIMEOUT     (2*HZ)
 576
 577 int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
 578                                  enum iwl_ucode_type ucode_type)
 579 {
 580         struct iwl_notification_wait alive_wait;
 581         struct iwlagn_alive_data alive_data;
 582         int ret;
 583         enum iwl_ucode_type old_type;
 584
 585         ret = iwl_trans_start_device(trans(priv));
 586         if (ret)
 587                 return ret;
 588
 589         iwlagn_init_notification_wait(priv, &alive_wait, REPLY_ALIVE,
 590                                       iwl_alive_fn, &alive_data);
 591
 592         old_type = priv->ucode_type;
 593         priv->ucode_type = ucode_type;
 594
 595         ret = iwl_load_given_ucode(trans(priv), ucode_type);
 596         if (ret) {
 597                 priv->ucode_type = old_type;
 598                 iwlagn_remove_notification(priv, &alive_wait);
 599                 return ret;
 600         }
 601
 602         iwl_trans_kick_nic(trans(priv));
 603
 604         /*
 605          * Some things may run in the background now, but we
 606          * just wait for the ALIVE notification here.
 607          */
 608         ret = iwlagn_wait_notification(priv, &alive_wait, UCODE_ALIVE_TIMEOUT);
 609         if (ret) {
 610                 priv->ucode_type = old_type;
 611                 return ret;
 612         }
 613
 614         if (!alive_data.valid) {
 615                 IWL_ERR(priv, "Loaded ucode is not valid!\n");
 616                 priv->ucode_type = old_type;
 617                 return -EIO;
 618         }
 619
 620         /*
 621          * This step takes a long time (60-80ms!!) and
 622          * WoWLAN image should be loaded quickly, so
 623          * skip it for WoWLAN.
 624          */
 625         if (ucode_type != IWL_UCODE_WOWLAN) {
 626                 ret = iwl_verify_ucode(trans(priv), ucode_type);
 627                 if (ret) {
 628                         priv->ucode_type = old_type;
 629                         return ret;
 630                 }
 631
 632                 /* delay a bit to give rfkill time to run */
 633                 msleep(5);
 634         }
 635
 636         ret = iwl_alive_notify(priv);
 637         if (ret) {
 638                 IWL_WARN(priv,
 639                         "Could not complete ALIVE transition: %d\n", ret);
 640                 priv->ucode_type = old_type;
 641                 return ret;
 642         }
 643
 644         return 0;
 645 }
 646
 647 int iwlagn_run_init_ucode(struct iwl_priv *priv)
 648 {
 649         struct iwl_notification_wait calib_wait;
 650         int ret;
 651
 652         lockdep_assert_held(&priv->shrd->mutex);
 653
 654         /* No init ucode required? Curious, but maybe ok */
 655         if (!trans(priv)->ucode_init.code.len)
 656                 return 0;
 657
 658         if (priv->ucode_type != IWL_UCODE_NONE)
 659                 return 0;
 660
 661         iwlagn_init_notification_wait(priv, &calib_wait,
 662                                       CALIBRATION_COMPLETE_NOTIFICATION,
 663                                       NULL, NULL);
 664
 665         /* Will also start the device */
 666         ret = iwlagn_load_ucode_wait_alive(priv, IWL_UCODE_INIT);
 667         if (ret)
 668                 goto error;
 669
 670         ret = iwlagn_init_alive_start(priv);
 671         if (ret)
 672                 goto error;
 673
 674         /*
 675          * Some things may run in the background now, but we
 676          * just wait for the calibration complete notification.
 677          */
 678         ret = iwlagn_wait_notification(priv, &calib_wait, UCODE_CALIB_TIMEOUT);
 679
 680         goto out;
 681
 682  error:
 683         iwlagn_remove_notification(priv, &calib_wait);
 684  out:
 685         /* Whatever happened, stop the device */
 686         iwl_trans_stop_device(trans(priv));
 687         return ret;
 688 }