drivers/net/wireless/iwlwifi/iwl-ucode.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/sched.h>
  34 #include <linux/dma-mapping.h>
  35
  36 #include "iwl-wifi.h"
  37 #include "iwl-dev.h"
  38 #include "iwl-core.h"
  39 #include "iwl-io.h"
  40 #include "iwl-agn-hw.h"
  41 #include "iwl-agn.h"
  42 #include "iwl-agn-calib.h"
  43 #include "iwl-trans.h"
  44 #include "iwl-fh.h"
  45
  46 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  47         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  48          0, COEX_UNASSOC_IDLE_FLAGS},
  49         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  50          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  51         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  52          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  53         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  54          0, COEX_CALIBRATION_FLAGS},
  55         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  56          0, COEX_PERIODIC_CALIBRATION_FLAGS},
  57         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  58          0, COEX_CONNECTION_ESTAB_FLAGS},
  59         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  60          0, COEX_ASSOCIATED_IDLE_FLAGS},
  61         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  62          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  63         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  64          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  65         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  66          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  67         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  68         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  69         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  70          0, COEX_STAND_ALONE_DEBUG_FLAGS},
  71         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  72          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  73         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  74         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  75 };
  76
  77 /******************************************************************************
  78  *
  79  * uCode download functions
  80  *
  81  ******************************************************************************/
  82
  83 static void iwl_free_fw_desc(struct iwl_bus *bus, struct fw_desc *desc)
  84 {
  85         if (desc->v_addr)
  86                 dma_free_coherent(bus->dev, desc->len,
  87                                   desc->v_addr, desc->p_addr);
  88         desc->v_addr = NULL;
  89         desc->len = 0;
  90 }
  91
  92 static void iwl_free_fw_img(struct iwl_bus *bus, struct fw_img *img)
  93 {
  94         iwl_free_fw_desc(bus, &img->code);
  95         iwl_free_fw_desc(bus, &img->data);
  96 }
  97
  98 void iwl_dealloc_ucode(struct iwl_trans *trans)
  99 {
 100         iwl_free_fw_img(bus(trans), &trans->ucode_rt);
 101         iwl_free_fw_img(bus(trans), &trans->ucode_init);
 102         iwl_free_fw_img(bus(trans), &trans->ucode_wowlan);
 103 }
 104
 105 int iwl_alloc_fw_desc(struct iwl_bus *bus, struct fw_desc *desc,
 106                       const void *data, size_t len)
 107 {
 108         if (!len) {
 109                 desc->v_addr = NULL;
 110                 return -EINVAL;
 111         }
 112
 113         desc->v_addr = dma_alloc_coherent(bus->dev, len,
 114                                           &desc->p_addr, GFP_KERNEL);
 115         if (!desc->v_addr)
 116                 return -ENOMEM;
 117
 118         desc->len = len;
 119         memcpy(desc->v_addr, data, len);
 120         return 0;
 121 }
 122
 123 /*
 124  * ucode
 125  */
 126 static int iwl_load_section(struct iwl_trans *trans, const char *name,
 127                                 struct fw_desc *image, u32 dst_addr)
 128 {
 129         struct iwl_bus *bus = bus(trans);
 130         dma_addr_t phy_addr = image->p_addr;
 131         u32 byte_cnt = image->len;
 132         int ret;
 133
 134         trans->ucode_write_complete = 0;
 135
 136         iwl_write_direct32(bus,
 137                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
 138                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
 139
 140         iwl_write_direct32(bus,
 141                 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
 142
 143         iwl_write_direct32(bus,
 144                 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
 145                 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
 146
 147         iwl_write_direct32(bus,
 148                 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
 149                 (iwl_get_dma_hi_addr(phy_addr)
 150                         << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
 151
 152         iwl_write_direct32(bus,
 153                 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
 154                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
 155                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
 156                 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
 157
 158         iwl_write_direct32(bus,
 159                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
 160                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE       |
 161                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE    |
 162                 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
 163
 164         IWL_DEBUG_FW(bus, "%s uCode section being loaded...\n", name);
 165         ret = wait_event_timeout(trans->shrd->wait_command_queue,
 166                                  trans->ucode_write_complete, 5 * HZ);
 167         if (!ret) {
 168                 IWL_ERR(trans, "Could not load the %s uCode section\n",
 169                         name);
 170                 return -ETIMEDOUT;
 171         }
 172
 173         return 0;
 174 }
 175
 176 static inline struct fw_img *iwl_get_ucode_image(struct iwl_trans *trans,
 177                                         enum iwl_ucode_type ucode_type)
 178 {
 179         switch (ucode_type) {
 180         case IWL_UCODE_INIT:
 181                 return &trans->ucode_init;
 182         case IWL_UCODE_WOWLAN:
 183                 return &trans->ucode_wowlan;
 184         case IWL_UCODE_REGULAR:
 185                 return &trans->ucode_rt;
 186         case IWL_UCODE_NONE:
 187                 break;
 188         }
 189         return NULL;
 190 }
 191
 192 static int iwl_load_given_ucode(struct iwl_trans *trans,
 193                                    enum iwl_ucode_type ucode_type)
 194 {
 195         int ret = 0;
 196         struct fw_img *image = iwl_get_ucode_image(trans, ucode_type);
 197
 198
 199         if (!image) {
 200                 IWL_ERR(trans, "Invalid ucode requested (%d)\n",
 201                         ucode_type);
 202                 return -EINVAL;
 203         }
 204
 205         ret = iwl_load_section(trans, "INST", &image->code,
 206                                    IWLAGN_RTC_INST_LOWER_BOUND);
 207         if (ret)
 208                 return ret;
 209
 210         return iwl_load_section(trans, "DATA", &image->data,
 211                                     IWLAGN_RTC_DATA_LOWER_BOUND);
 212 }
 213
 214 /*
 215  *  Calibration
 216  */
 217 static int iwl_set_Xtal_calib(struct iwl_trans *trans)
 218 {
 219         struct iwl_calib_xtal_freq_cmd cmd;
 220         __le16 *xtal_calib =
 221                 (__le16 *)iwl_eeprom_query_addr(trans->shrd, EEPROM_XTAL);
 222
 223         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
 224         cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
 225         cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
 226         return iwl_calib_set(trans, (void *)&cmd, sizeof(cmd));
 227 }
 228
 229 static int iwl_set_temperature_offset_calib(struct iwl_trans *trans)
 230 {
 231         struct iwl_calib_temperature_offset_cmd cmd;
 232         __le16 *offset_calib =
 233                 (__le16 *)iwl_eeprom_query_addr(trans->shrd,
 234                                                 EEPROM_RAW_TEMPERATURE);
 235
 236         memset(&cmd, 0, sizeof(cmd));
 237         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 238         memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib));
 239         if (!(cmd.radio_sensor_offset))
 240                 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
 241
 242         IWL_DEBUG_CALIB(trans, "Radio sensor offset: %d\n",
 243                         le16_to_cpu(cmd.radio_sensor_offset));
 244         return iwl_calib_set(trans, (void *)&cmd, sizeof(cmd));
 245 }
 246
 247 static int iwl_set_temperature_offset_calib_v2(struct iwl_trans *trans)
 248 {
 249         struct iwl_calib_temperature_offset_v2_cmd cmd;
 250         __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(trans->shrd,
 251                                      EEPROM_KELVIN_TEMPERATURE);
 252         __le16 *offset_calib_low =
 253                 (__le16 *)iwl_eeprom_query_addr(trans->shrd,
 254                                                 EEPROM_RAW_TEMPERATURE);
 255         struct iwl_eeprom_calib_hdr *hdr;
 256
 257         memset(&cmd, 0, sizeof(cmd));
 258         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 259         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(trans->shrd,
 260                                                         EEPROM_CALIB_ALL);
 261         memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
 262                 sizeof(*offset_calib_high));
 263         memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
 264                 sizeof(*offset_calib_low));
 265         if (!(cmd.radio_sensor_offset_low)) {
 266                 IWL_DEBUG_CALIB(trans, "no info in EEPROM, use default\n");
 267                 cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
 268                 cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
 269         }
 270         memcpy(&cmd.burntVoltageRef, &hdr->voltage,
 271                 sizeof(hdr->voltage));
 272
 273         IWL_DEBUG_CALIB(trans, "Radio sensor offset high: %d\n",
 274                         le16_to_cpu(cmd.radio_sensor_offset_high));
 275         IWL_DEBUG_CALIB(trans, "Radio sensor offset low: %d\n",
 276                         le16_to_cpu(cmd.radio_sensor_offset_low));
 277         IWL_DEBUG_CALIB(trans, "Voltage Ref: %d\n",
 278                         le16_to_cpu(cmd.burntVoltageRef));
 279
 280         return iwl_calib_set(trans, (void *)&cmd, sizeof(cmd));
 281 }
 282
 283 static int iwl_send_calib_cfg(struct iwl_trans *trans)
 284 {
 285         struct iwl_calib_cfg_cmd calib_cfg_cmd;
 286         struct iwl_host_cmd cmd = {
 287                 .id = CALIBRATION_CFG_CMD,
 288                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
 289                 .data = { &calib_cfg_cmd, },
 290         };
 291
 292         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
 293         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
 294         calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
 295         calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
 296         calib_cfg_cmd.ucd_calib_cfg.flags =
 297                 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
 298
 299         return iwl_trans_send_cmd(trans, &cmd);
 300 }
 301
 302 int iwlagn_rx_calib_result(struct iwl_priv *priv,
 303                             struct iwl_rx_mem_buffer *rxb,
 304                             struct iwl_device_cmd *cmd)
 305 {
 306         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 307         struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
 308         int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 309
 310         /* reduce the size of the length field itself */
 311         len -= 4;
 312
 313         if (iwl_calib_set(trans(priv), hdr, len))
 314                 IWL_ERR(priv, "Failed to record calibration data %d\n",
 315                         hdr->op_code);
 316
 317         return 0;
 318 }
 319
 320 int iwl_init_alive_start(struct iwl_trans *trans)
 321 {
 322         int ret;
 323
 324         if (cfg(trans)->bt_params &&
 325             cfg(trans)->bt_params->advanced_bt_coexist) {
 326                 /*
 327                  * Tell uCode we are ready to perform calibration
 328                  * need to perform this before any calibration
 329                  * no need to close the envlope since we are going
 330                  * to load the runtime uCode later.
 331                  */
 332                 ret = iwl_send_bt_env(trans, IWL_BT_COEX_ENV_OPEN,
 333                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
 334                 if (ret)
 335                         return ret;
 336
 337         }
 338
 339         ret = iwl_send_calib_cfg(trans);
 340         if (ret)
 341                 return ret;
 342
 343         /**
 344          * temperature offset calibration is only needed for runtime ucode,
 345          * so prepare the value now.
 346          */
 347         if (cfg(trans)->need_temp_offset_calib) {
 348                 if (cfg(trans)->temp_offset_v2)
 349                         return iwl_set_temperature_offset_calib_v2(trans);
 350                 else
 351                         return iwl_set_temperature_offset_calib(trans);
 352         }
 353
 354         return 0;
 355 }
 356
 357 static int iwl_send_wimax_coex(struct iwl_trans *trans)
 358 {
 359         struct iwl_wimax_coex_cmd coex_cmd;
 360
 361         if (cfg(trans)->base_params->support_wimax_coexist) {
 362                 /* UnMask wake up src at associated sleep */
 363                 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
 364
 365                 /* UnMask wake up src at unassociated sleep */
 366                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
 367                 memcpy(coex_cmd.sta_prio, cu_priorities,
 368                         sizeof(struct iwl_wimax_coex_event_entry) *
 369                          COEX_NUM_OF_EVENTS);
 370
 371                 /* enabling the coexistence feature */
 372                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
 373
 374                 /* enabling the priorities tables */
 375                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
 376         } else {
 377                 /* coexistence is disabled */
 378                 memset(&coex_cmd, 0, sizeof(coex_cmd));
 379         }
 380         return iwl_trans_send_cmd_pdu(trans,
 381                                 COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
 382                                 sizeof(coex_cmd), &coex_cmd);
 383 }
 384
 385 static const u8 iwl_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
 386         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 387                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 388         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 389                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 390         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 391                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 392         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 393                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 394         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 395                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 396         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 397                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 398         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 399                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 400         ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 401                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 402         ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 403                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 404         0, 0, 0, 0, 0, 0, 0
 405 };
 406
 407 void iwl_send_prio_tbl(struct iwl_trans *trans)
 408 {
 409         struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
 410
 411         memcpy(prio_tbl_cmd.prio_tbl, iwl_bt_prio_tbl,
 412                 sizeof(iwl_bt_prio_tbl));
 413         if (iwl_trans_send_cmd_pdu(trans,
 414                                 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
 415                                 sizeof(prio_tbl_cmd), &prio_tbl_cmd))
 416                 IWL_ERR(trans, "failed to send BT prio tbl command\n");
 417 }
 418
 419 int iwl_send_bt_env(struct iwl_trans *trans, u8 action, u8 type)
 420 {
 421         struct iwl_bt_coex_prot_env_cmd env_cmd;
 422         int ret;
 423
 424         env_cmd.action = action;
 425         env_cmd.type = type;
 426         ret = iwl_trans_send_cmd_pdu(trans,
 427                                REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
 428                                sizeof(env_cmd), &env_cmd);
 429         if (ret)
 430                 IWL_ERR(trans, "failed to send BT env command\n");
 431         return ret;
 432 }
 433
 434
 435 static int iwl_alive_notify(struct iwl_trans *trans)
 436 {
 437         struct iwl_priv *priv = priv(trans);
 438         struct iwl_rxon_context *ctx;
 439         int ret;
 440
 441         if (!priv->tx_cmd_pool)
 442                 priv->tx_cmd_pool =
 443                         kmem_cache_create("iwl_dev_cmd",
 444                                           sizeof(struct iwl_device_cmd),
 445                                           sizeof(void *), 0, NULL);
 446
 447         if (!priv->tx_cmd_pool)
 448                 return -ENOMEM;
 449
 450         iwl_trans_tx_start(trans);
 451         for_each_context(priv, ctx)
 452                 ctx->last_tx_rejected = false;
 453
 454         ret = iwl_send_wimax_coex(trans);
 455         if (ret)
 456                 return ret;
 457
 458         if (!cfg(priv)->no_xtal_calib) {
 459                 ret = iwl_set_Xtal_calib(trans);
 460                 if (ret)
 461                         return ret;
 462         }
 463
 464         return iwl_send_calib_results(trans);
 465 }
 466
 467
 468 /**
 469  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
 470  *   using sample data 100 bytes apart.  If these sample points are good,
 471  *   it's a pretty good bet that everything between them is good, too.
 472  */
 473 static int iwl_verify_inst_sparse(struct iwl_bus *bus,
 474                                       struct fw_desc *fw_desc)
 475 {
 476         __le32 *image = (__le32 *)fw_desc->v_addr;
 477         u32 len = fw_desc->len;
 478         u32 val;
 479         u32 i;
 480
 481         IWL_DEBUG_FW(bus, "ucode inst image size is %u\n", len);
 482
 483         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
 484                 /* read data comes through single port, auto-incr addr */
 485                 /* NOTE: Use the debugless read so we don't flood kernel log
 486                  * if IWL_DL_IO is set */
 487                 iwl_write_direct32(bus, HBUS_TARG_MEM_RADDR,
 488                         i + IWLAGN_RTC_INST_LOWER_BOUND);
 489                 val = iwl_read32(bus, HBUS_TARG_MEM_RDAT);
 490                 if (val != le32_to_cpu(*image))
 491                         return -EIO;
 492         }
 493
 494         return 0;
 495 }
 496
 497 static void iwl_print_mismatch_inst(struct iwl_bus *bus,
 498                                     struct fw_desc *fw_desc)
 499 {
 500         __le32 *image = (__le32 *)fw_desc->v_addr;
 501         u32 len = fw_desc->len;
 502         u32 val;
 503         u32 offs;
 504         int errors = 0;
 505
 506         IWL_DEBUG_FW(bus, "ucode inst image size is %u\n", len);
 507
 508         iwl_write_direct32(bus, HBUS_TARG_MEM_RADDR,
 509                            IWLAGN_RTC_INST_LOWER_BOUND);
 510
 511         for (offs = 0;
 512              offs < len && errors < 20;
 513              offs += sizeof(u32), image++) {
 514                 /* read data comes through single port, auto-incr addr */
 515                 val = iwl_read32(bus, HBUS_TARG_MEM_RDAT);
 516                 if (val != le32_to_cpu(*image)) {
 517                         IWL_ERR(bus, "uCode INST section at "
 518                                 "offset 0x%x, is 0x%x, s/b 0x%x\n",
 519                                 offs, val, le32_to_cpu(*image));
 520                         errors++;
 521                 }
 522         }
 523 }
 524
 525 /**
 526  * iwl_verify_ucode - determine which instruction image is in SRAM,
 527  *    and verify its contents
 528  */
 529 static int iwl_verify_ucode(struct iwl_trans *trans,
 530                             enum iwl_ucode_type ucode_type)
 531 {
 532         struct fw_img *img = iwl_get_ucode_image(trans, ucode_type);
 533
 534         if (!img) {
 535                 IWL_ERR(trans, "Invalid ucode requested (%d)\n", ucode_type);
 536                 return -EINVAL;
 537         }
 538
 539         if (!iwl_verify_inst_sparse(bus(trans), &img->code)) {
 540                 IWL_DEBUG_FW(trans, "uCode is good in inst SRAM\n");
 541                 return 0;
 542         }
 543
 544         IWL_ERR(trans, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
 545
 546         iwl_print_mismatch_inst(bus(trans), &img->code);
 547         return -EIO;
 548 }
 549
 550 struct iwl_alive_data {
 551         bool valid;
 552         u8 subtype;
 553 };
 554
 555 static void iwl_alive_fn(struct iwl_trans *trans,
 556                             struct iwl_rx_packet *pkt,
 557                             void *data)
 558 {
 559         struct iwl_alive_data *alive_data = data;
 560         struct iwl_alive_resp *palive;
 561
 562         palive = &pkt->u.alive_frame;
 563
 564         IWL_DEBUG_FW(trans, "Alive ucode status 0x%08X revision "
 565                        "0x%01X 0x%01X\n",
 566                        palive->is_valid, palive->ver_type,
 567                        palive->ver_subtype);
 568
 569         trans->shrd->device_pointers.error_event_table =
 570                 le32_to_cpu(palive->error_event_table_ptr);
 571         trans->shrd->device_pointers.log_event_table =
 572                 le32_to_cpu(palive->log_event_table_ptr);
 573
 574         alive_data->subtype = palive->ver_subtype;
 575         alive_data->valid = palive->is_valid == UCODE_VALID_OK;
 576 }
 577
 578 /* notification wait support */
 579 void iwl_init_notification_wait(struct iwl_shared *shrd,
 580                                    struct iwl_notification_wait *wait_entry,
 581                                    u8 cmd,
 582                                    void (*fn)(struct iwl_trans *trans,
 583                                               struct iwl_rx_packet *pkt,
 584                                               void *data),
 585                                    void *fn_data)
 586 {
 587         wait_entry->fn = fn;
 588         wait_entry->fn_data = fn_data;
 589         wait_entry->cmd = cmd;
 590         wait_entry->triggered = false;
 591         wait_entry->aborted = false;
 592
 593         spin_lock_bh(&shrd->notif_wait_lock);
 594         list_add(&wait_entry->list, &shrd->notif_waits);
 595         spin_unlock_bh(&shrd->notif_wait_lock);
 596 }
 597
 598 int iwl_wait_notification(struct iwl_shared *shrd,
 599                              struct iwl_notification_wait *wait_entry,
 600                              unsigned long timeout)
 601 {
 602         int ret;
 603
 604         ret = wait_event_timeout(shrd->notif_waitq,
 605                                  wait_entry->triggered || wait_entry->aborted,
 606                                  timeout);
 607
 608         spin_lock_bh(&shrd->notif_wait_lock);
 609         list_del(&wait_entry->list);
 610         spin_unlock_bh(&shrd->notif_wait_lock);
 611
 612         if (wait_entry->aborted)
 613                 return -EIO;
 614
 615         /* return value is always >= 0 */
 616         if (ret <= 0)
 617                 return -ETIMEDOUT;
 618         return 0;
 619 }
 620
 621 void iwl_remove_notification(struct iwl_shared *shrd,
 622                                 struct iwl_notification_wait *wait_entry)
 623 {
 624         spin_lock_bh(&shrd->notif_wait_lock);
 625         list_del(&wait_entry->list);
 626         spin_unlock_bh(&shrd->notif_wait_lock);
 627 }
 628
 629 void iwl_abort_notification_waits(struct iwl_shared *shrd)
 630 {
 631         unsigned long flags;
 632         struct iwl_notification_wait *wait_entry;
 633
 634         spin_lock_irqsave(&shrd->notif_wait_lock, flags);
 635         list_for_each_entry(wait_entry, &shrd->notif_waits, list)
 636                 wait_entry->aborted = true;
 637         spin_unlock_irqrestore(&shrd->notif_wait_lock, flags);
 638
 639         wake_up_all(&shrd->notif_waitq);
 640 }
 641
 642 #define UCODE_ALIVE_TIMEOUT     HZ
 643 #define UCODE_CALIB_TIMEOUT     (2*HZ)
 644
 645 int iwl_load_ucode_wait_alive(struct iwl_trans *trans,
 646                                  enum iwl_ucode_type ucode_type)
 647 {
 648         struct iwl_notification_wait alive_wait;
 649         struct iwl_alive_data alive_data;
 650         int ret;
 651         enum iwl_ucode_type old_type;
 652
 653         ret = iwl_trans_start_device(trans);
 654         if (ret)
 655                 return ret;
 656
 657         iwl_init_notification_wait(trans->shrd, &alive_wait, REPLY_ALIVE,
 658                                       iwl_alive_fn, &alive_data);
 659
 660         old_type = trans->shrd->ucode_type;
 661         trans->shrd->ucode_type = ucode_type;
 662
 663         ret = iwl_load_given_ucode(trans, ucode_type);
 664         if (ret) {
 665                 trans->shrd->ucode_type = old_type;
 666                 iwl_remove_notification(trans->shrd, &alive_wait);
 667                 return ret;
 668         }
 669
 670         iwl_trans_kick_nic(trans);
 671
 672         /*
 673          * Some things may run in the background now, but we
 674          * just wait for the ALIVE notification here.
 675          */
 676         ret = iwl_wait_notification(trans->shrd, &alive_wait,
 677                                         UCODE_ALIVE_TIMEOUT);
 678         if (ret) {
 679                 trans->shrd->ucode_type = old_type;
 680                 return ret;
 681         }
 682
 683         if (!alive_data.valid) {
 684                 IWL_ERR(trans, "Loaded ucode is not valid!\n");
 685                 trans->shrd->ucode_type = old_type;
 686                 return -EIO;
 687         }
 688
 689         /*
 690          * This step takes a long time (60-80ms!!) and
 691          * WoWLAN image should be loaded quickly, so
 692          * skip it for WoWLAN.
 693          */
 694         if (ucode_type != IWL_UCODE_WOWLAN) {
 695                 ret = iwl_verify_ucode(trans, ucode_type);
 696                 if (ret) {
 697                         trans->shrd->ucode_type = old_type;
 698                         return ret;
 699                 }
 700
 701                 /* delay a bit to give rfkill time to run */
 702                 msleep(5);
 703         }
 704
 705         ret = iwl_alive_notify(trans);
 706         if (ret) {
 707                 IWL_WARN(trans,
 708                         "Could not complete ALIVE transition: %d\n", ret);
 709                 trans->shrd->ucode_type = old_type;
 710                 return ret;
 711         }
 712
 713         return 0;
 714 }
 715
 716 int iwl_run_init_ucode(struct iwl_trans *trans)
 717 {
 718         struct iwl_notification_wait calib_wait;
 719         int ret;
 720
 721         lockdep_assert_held(&trans->shrd->mutex);
 722
 723         /* No init ucode required? Curious, but maybe ok */
 724         if (!trans->ucode_init.code.len)
 725                 return 0;
 726
 727         if (trans->shrd->ucode_type != IWL_UCODE_NONE)
 728                 return 0;
 729
 730         iwl_init_notification_wait(trans->shrd, &calib_wait,
 731                                       CALIBRATION_COMPLETE_NOTIFICATION,
 732                                       NULL, NULL);
 733
 734         /* Will also start the device */
 735         ret = iwl_load_ucode_wait_alive(trans, IWL_UCODE_INIT);
 736         if (ret)
 737                 goto error;
 738
 739         ret = iwl_init_alive_start(trans);
 740         if (ret)
 741                 goto error;
 742
 743         /*
 744          * Some things may run in the background now, but we
 745          * just wait for the calibration complete notification.
 746          */
 747         ret = iwl_wait_notification(trans->shrd, &calib_wait,
 748                                         UCODE_CALIB_TIMEOUT);
 749
 750         goto out;
 751
 752  error:
 753         iwl_remove_notification(trans->shrd, &calib_wait);
 754  out:
 755         /* Whatever happened, stop the device */
 756         iwl_trans_stop_device(trans);
 757         return ret;
 758 }