drivers/net/wireless/iwlwifi/iwl-ucode.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/sched.h>
  34 #include <linux/dma-mapping.h>
  35
  36 #include "iwl-wifi.h"
  37 #include "iwl-dev.h"
  38 #include "iwl-core.h"
  39 #include "iwl-io.h"
  40 #include "iwl-agn-hw.h"
  41 #include "iwl-agn.h"
  42 #include "iwl-agn-calib.h"
  43 #include "iwl-trans.h"
  44 #include "iwl-fh.h"
  45
  46 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  47         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  48          0, COEX_UNASSOC_IDLE_FLAGS},
  49         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  50          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  51         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  52          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  53         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  54          0, COEX_CALIBRATION_FLAGS},
  55         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  56          0, COEX_PERIODIC_CALIBRATION_FLAGS},
  57         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  58          0, COEX_CONNECTION_ESTAB_FLAGS},
  59         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  60          0, COEX_ASSOCIATED_IDLE_FLAGS},
  61         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  62          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  63         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  64          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  65         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  66          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  67         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  68         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  69         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  70          0, COEX_STAND_ALONE_DEBUG_FLAGS},
  71         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  72          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  73         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  74         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  75 };
  76
  77 /******************************************************************************
  78  *
  79  * uCode download functions
  80  *
  81  ******************************************************************************/
  82
  83 static void iwl_free_fw_desc(struct iwl_trans *trans, struct fw_desc *desc)
  84 {
  85         if (desc->v_addr)
  86                 dma_free_coherent(trans->dev, desc->len,
  87                                   desc->v_addr, desc->p_addr);
  88         desc->v_addr = NULL;
  89         desc->len = 0;
  90 }
  91
  92 static void iwl_free_fw_img(struct iwl_trans *trans, struct fw_img *img)
  93 {
  94         iwl_free_fw_desc(trans, &img->code);
  95         iwl_free_fw_desc(trans, &img->data);
  96 }
  97
  98 void iwl_dealloc_ucode(struct iwl_trans *trans)
  99 {
 100         iwl_free_fw_img(trans, &trans->ucode_rt);
 101         iwl_free_fw_img(trans, &trans->ucode_init);
 102         iwl_free_fw_img(trans, &trans->ucode_wowlan);
 103 }
 104
 105 int iwl_alloc_fw_desc(struct iwl_trans *trans, struct fw_desc *desc,
 106                       const void *data, size_t len)
 107 {
 108         if (!len) {
 109                 desc->v_addr = NULL;
 110                 return -EINVAL;
 111         }
 112
 113         desc->v_addr = dma_alloc_coherent(trans->dev, len,
 114                                           &desc->p_addr, GFP_KERNEL);
 115         if (!desc->v_addr)
 116                 return -ENOMEM;
 117
 118         desc->len = len;
 119         memcpy(desc->v_addr, data, len);
 120         return 0;
 121 }
 122
 123 /*
 124  * ucode
 125  */
 126 static int iwl_load_section(struct iwl_trans *trans, const char *name,
 127                                 struct fw_desc *image, u32 dst_addr)
 128 {
 129         dma_addr_t phy_addr = image->p_addr;
 130         u32 byte_cnt = image->len;
 131         int ret;
 132
 133         trans->ucode_write_complete = 0;
 134
 135         iwl_write_direct32(trans,
 136                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
 137                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
 138
 139         iwl_write_direct32(trans,
 140                 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
 141
 142         iwl_write_direct32(trans,
 143                 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
 144                 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
 145
 146         iwl_write_direct32(trans,
 147                 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
 148                 (iwl_get_dma_hi_addr(phy_addr)
 149                         << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
 150
 151         iwl_write_direct32(trans,
 152                 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
 153                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
 154                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
 155                 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
 156
 157         iwl_write_direct32(trans,
 158                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
 159                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE       |
 160                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE    |
 161                 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
 162
 163         IWL_DEBUG_FW(trans, "%s uCode section being loaded...\n", name);
 164         ret = wait_event_timeout(trans->shrd->wait_command_queue,
 165                                  trans->ucode_write_complete, 5 * HZ);
 166         if (!ret) {
 167                 IWL_ERR(trans, "Could not load the %s uCode section\n",
 168                         name);
 169                 return -ETIMEDOUT;
 170         }
 171
 172         return 0;
 173 }
 174
 175 static inline struct fw_img *iwl_get_ucode_image(struct iwl_trans *trans,
 176                                         enum iwl_ucode_type ucode_type)
 177 {
 178         switch (ucode_type) {
 179         case IWL_UCODE_INIT:
 180                 return &trans->ucode_init;
 181         case IWL_UCODE_WOWLAN:
 182                 return &trans->ucode_wowlan;
 183         case IWL_UCODE_REGULAR:
 184                 return &trans->ucode_rt;
 185         case IWL_UCODE_NONE:
 186                 break;
 187         }
 188         return NULL;
 189 }
 190
 191 static int iwl_load_given_ucode(struct iwl_trans *trans,
 192                                    enum iwl_ucode_type ucode_type)
 193 {
 194         int ret = 0;
 195         struct fw_img *image = iwl_get_ucode_image(trans, ucode_type);
 196
 197
 198         if (!image) {
 199                 IWL_ERR(trans, "Invalid ucode requested (%d)\n",
 200                         ucode_type);
 201                 return -EINVAL;
 202         }
 203
 204         ret = iwl_load_section(trans, "INST", &image->code,
 205                                    IWLAGN_RTC_INST_LOWER_BOUND);
 206         if (ret)
 207                 return ret;
 208
 209         return iwl_load_section(trans, "DATA", &image->data,
 210                                     IWLAGN_RTC_DATA_LOWER_BOUND);
 211 }
 212
 213 /*
 214  *  Calibration
 215  */
 216 static int iwl_set_Xtal_calib(struct iwl_trans *trans)
 217 {
 218         struct iwl_calib_xtal_freq_cmd cmd;
 219         __le16 *xtal_calib =
 220                 (__le16 *)iwl_eeprom_query_addr(trans->shrd, EEPROM_XTAL);
 221
 222         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
 223         cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
 224         cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
 225         return iwl_calib_set(trans, (void *)&cmd, sizeof(cmd));
 226 }
 227
 228 static int iwl_set_temperature_offset_calib(struct iwl_trans *trans)
 229 {
 230         struct iwl_calib_temperature_offset_cmd cmd;
 231         __le16 *offset_calib =
 232                 (__le16 *)iwl_eeprom_query_addr(trans->shrd,
 233                                                 EEPROM_RAW_TEMPERATURE);
 234
 235         memset(&cmd, 0, sizeof(cmd));
 236         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 237         memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib));
 238         if (!(cmd.radio_sensor_offset))
 239                 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
 240
 241         IWL_DEBUG_CALIB(trans, "Radio sensor offset: %d\n",
 242                         le16_to_cpu(cmd.radio_sensor_offset));
 243         return iwl_calib_set(trans, (void *)&cmd, sizeof(cmd));
 244 }
 245
 246 static int iwl_set_temperature_offset_calib_v2(struct iwl_trans *trans)
 247 {
 248         struct iwl_calib_temperature_offset_v2_cmd cmd;
 249         __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(trans->shrd,
 250                                      EEPROM_KELVIN_TEMPERATURE);
 251         __le16 *offset_calib_low =
 252                 (__le16 *)iwl_eeprom_query_addr(trans->shrd,
 253                                                 EEPROM_RAW_TEMPERATURE);
 254         struct iwl_eeprom_calib_hdr *hdr;
 255
 256         memset(&cmd, 0, sizeof(cmd));
 257         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
 258         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(trans->shrd,
 259                                                         EEPROM_CALIB_ALL);
 260         memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
 261                 sizeof(*offset_calib_high));
 262         memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
 263                 sizeof(*offset_calib_low));
 264         if (!(cmd.radio_sensor_offset_low)) {
 265                 IWL_DEBUG_CALIB(trans, "no info in EEPROM, use default\n");
 266                 cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
 267                 cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
 268         }
 269         memcpy(&cmd.burntVoltageRef, &hdr->voltage,
 270                 sizeof(hdr->voltage));
 271
 272         IWL_DEBUG_CALIB(trans, "Radio sensor offset high: %d\n",
 273                         le16_to_cpu(cmd.radio_sensor_offset_high));
 274         IWL_DEBUG_CALIB(trans, "Radio sensor offset low: %d\n",
 275                         le16_to_cpu(cmd.radio_sensor_offset_low));
 276         IWL_DEBUG_CALIB(trans, "Voltage Ref: %d\n",
 277                         le16_to_cpu(cmd.burntVoltageRef));
 278
 279         return iwl_calib_set(trans, (void *)&cmd, sizeof(cmd));
 280 }
 281
 282 static int iwl_send_calib_cfg(struct iwl_trans *trans)
 283 {
 284         struct iwl_calib_cfg_cmd calib_cfg_cmd;
 285         struct iwl_host_cmd cmd = {
 286                 .id = CALIBRATION_CFG_CMD,
 287                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
 288                 .data = { &calib_cfg_cmd, },
 289         };
 290
 291         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
 292         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
 293         calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
 294         calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
 295         calib_cfg_cmd.ucd_calib_cfg.flags =
 296                 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
 297
 298         return iwl_trans_send_cmd(trans, &cmd);
 299 }
 300
 301 int iwlagn_rx_calib_result(struct iwl_priv *priv,
 302                             struct iwl_rx_mem_buffer *rxb,
 303                             struct iwl_device_cmd *cmd)
 304 {
 305         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 306         struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
 307         int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 308
 309         /* reduce the size of the length field itself */
 310         len -= 4;
 311
 312         if (iwl_calib_set(trans(priv), hdr, len))
 313                 IWL_ERR(priv, "Failed to record calibration data %d\n",
 314                         hdr->op_code);
 315
 316         return 0;
 317 }
 318
 319 int iwl_init_alive_start(struct iwl_trans *trans)
 320 {
 321         int ret;
 322
 323         if (cfg(trans)->bt_params &&
 324             cfg(trans)->bt_params->advanced_bt_coexist) {
 325                 /*
 326                  * Tell uCode we are ready to perform calibration
 327                  * need to perform this before any calibration
 328                  * no need to close the envlope since we are going
 329                  * to load the runtime uCode later.
 330                  */
 331                 ret = iwl_send_bt_env(trans, IWL_BT_COEX_ENV_OPEN,
 332                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
 333                 if (ret)
 334                         return ret;
 335
 336         }
 337
 338         ret = iwl_send_calib_cfg(trans);
 339         if (ret)
 340                 return ret;
 341
 342         /**
 343          * temperature offset calibration is only needed for runtime ucode,
 344          * so prepare the value now.
 345          */
 346         if (cfg(trans)->need_temp_offset_calib) {
 347                 if (cfg(trans)->temp_offset_v2)
 348                         return iwl_set_temperature_offset_calib_v2(trans);
 349                 else
 350                         return iwl_set_temperature_offset_calib(trans);
 351         }
 352
 353         return 0;
 354 }
 355
 356 static int iwl_send_wimax_coex(struct iwl_trans *trans)
 357 {
 358         struct iwl_wimax_coex_cmd coex_cmd;
 359
 360         if (cfg(trans)->base_params->support_wimax_coexist) {
 361                 /* UnMask wake up src at associated sleep */
 362                 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
 363
 364                 /* UnMask wake up src at unassociated sleep */
 365                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
 366                 memcpy(coex_cmd.sta_prio, cu_priorities,
 367                         sizeof(struct iwl_wimax_coex_event_entry) *
 368                          COEX_NUM_OF_EVENTS);
 369
 370                 /* enabling the coexistence feature */
 371                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
 372
 373                 /* enabling the priorities tables */
 374                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
 375         } else {
 376                 /* coexistence is disabled */
 377                 memset(&coex_cmd, 0, sizeof(coex_cmd));
 378         }
 379         return iwl_trans_send_cmd_pdu(trans,
 380                                 COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
 381                                 sizeof(coex_cmd), &coex_cmd);
 382 }
 383
 384 static const u8 iwl_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
 385         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 386                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 387         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 388                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 389         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 390                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 391         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 392                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 393         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 394                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 395         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 396                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 397         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 398                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 399         ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 400                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 401         ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
 402                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
 403         0, 0, 0, 0, 0, 0, 0
 404 };
 405
 406 void iwl_send_prio_tbl(struct iwl_trans *trans)
 407 {
 408         struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
 409
 410         memcpy(prio_tbl_cmd.prio_tbl, iwl_bt_prio_tbl,
 411                 sizeof(iwl_bt_prio_tbl));
 412         if (iwl_trans_send_cmd_pdu(trans,
 413                                 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
 414                                 sizeof(prio_tbl_cmd), &prio_tbl_cmd))
 415                 IWL_ERR(trans, "failed to send BT prio tbl command\n");
 416 }
 417
 418 int iwl_send_bt_env(struct iwl_trans *trans, u8 action, u8 type)
 419 {
 420         struct iwl_bt_coex_prot_env_cmd env_cmd;
 421         int ret;
 422
 423         env_cmd.action = action;
 424         env_cmd.type = type;
 425         ret = iwl_trans_send_cmd_pdu(trans,
 426                                REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
 427                                sizeof(env_cmd), &env_cmd);
 428         if (ret)
 429                 IWL_ERR(trans, "failed to send BT env command\n");
 430         return ret;
 431 }
 432
 433
 434 static int iwl_alive_notify(struct iwl_trans *trans)
 435 {
 436         struct iwl_priv *priv = priv(trans);
 437         struct iwl_rxon_context *ctx;
 438         int ret;
 439
 440         if (!priv->tx_cmd_pool)
 441                 priv->tx_cmd_pool =
 442                         kmem_cache_create("iwl_dev_cmd",
 443                                           sizeof(struct iwl_device_cmd),
 444                                           sizeof(void *), 0, NULL);
 445
 446         if (!priv->tx_cmd_pool)
 447                 return -ENOMEM;
 448
 449         iwl_trans_fw_alive(trans);
 450         for_each_context(priv, ctx)
 451                 ctx->last_tx_rejected = false;
 452
 453         ret = iwl_send_wimax_coex(trans);
 454         if (ret)
 455                 return ret;
 456
 457         if (!cfg(priv)->no_xtal_calib) {
 458                 ret = iwl_set_Xtal_calib(trans);
 459                 if (ret)
 460                         return ret;
 461         }
 462
 463         return iwl_send_calib_results(trans);
 464 }
 465
 466
 467 /**
 468  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
 469  *   using sample data 100 bytes apart.  If these sample points are good,
 470  *   it's a pretty good bet that everything between them is good, too.
 471  */
 472 static int iwl_verify_inst_sparse(struct iwl_trans *trans,
 473                                       struct fw_desc *fw_desc)
 474 {
 475         __le32 *image = (__le32 *)fw_desc->v_addr;
 476         u32 len = fw_desc->len;
 477         u32 val;
 478         u32 i;
 479
 480         IWL_DEBUG_FW(trans, "ucode inst image size is %u\n", len);
 481
 482         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
 483                 /* read data comes through single port, auto-incr addr */
 484                 /* NOTE: Use the debugless read so we don't flood kernel log
 485                  * if IWL_DL_IO is set */
 486                 iwl_write_direct32(trans, HBUS_TARG_MEM_RADDR,
 487                         i + IWLAGN_RTC_INST_LOWER_BOUND);
 488                 val = iwl_read32(trans, HBUS_TARG_MEM_RDAT);
 489                 if (val != le32_to_cpu(*image))
 490                         return -EIO;
 491         }
 492
 493         return 0;
 494 }
 495
 496 static void iwl_print_mismatch_inst(struct iwl_trans *trans,
 497                                     struct fw_desc *fw_desc)
 498 {
 499         __le32 *image = (__le32 *)fw_desc->v_addr;
 500         u32 len = fw_desc->len;
 501         u32 val;
 502         u32 offs;
 503         int errors = 0;
 504
 505         IWL_DEBUG_FW(trans, "ucode inst image size is %u\n", len);
 506
 507         iwl_write_direct32(trans, HBUS_TARG_MEM_RADDR,
 508                            IWLAGN_RTC_INST_LOWER_BOUND);
 509
 510         for (offs = 0;
 511              offs < len && errors < 20;
 512              offs += sizeof(u32), image++) {
 513                 /* read data comes through single port, auto-incr addr */
 514                 val = iwl_read32(trans, HBUS_TARG_MEM_RDAT);
 515                 if (val != le32_to_cpu(*image)) {
 516                         IWL_ERR(trans, "uCode INST section at "
 517                                 "offset 0x%x, is 0x%x, s/b 0x%x\n",
 518                                 offs, val, le32_to_cpu(*image));
 519                         errors++;
 520                 }
 521         }
 522 }
 523
 524 /**
 525  * iwl_verify_ucode - determine which instruction image is in SRAM,
 526  *    and verify its contents
 527  */
 528 static int iwl_verify_ucode(struct iwl_trans *trans,
 529                             enum iwl_ucode_type ucode_type)
 530 {
 531         struct fw_img *img = iwl_get_ucode_image(trans, ucode_type);
 532
 533         if (!img) {
 534                 IWL_ERR(trans, "Invalid ucode requested (%d)\n", ucode_type);
 535                 return -EINVAL;
 536         }
 537
 538         if (!iwl_verify_inst_sparse(trans, &img->code)) {
 539                 IWL_DEBUG_FW(trans, "uCode is good in inst SRAM\n");
 540                 return 0;
 541         }
 542
 543         IWL_ERR(trans, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
 544
 545         iwl_print_mismatch_inst(trans, &img->code);
 546         return -EIO;
 547 }
 548
 549 struct iwl_alive_data {
 550         bool valid;
 551         u8 subtype;
 552 };
 553
 554 static void iwl_alive_fn(struct iwl_trans *trans,
 555                             struct iwl_rx_packet *pkt,
 556                             void *data)
 557 {
 558         struct iwl_alive_data *alive_data = data;
 559         struct iwl_alive_resp *palive;
 560
 561         palive = &pkt->u.alive_frame;
 562
 563         IWL_DEBUG_FW(trans, "Alive ucode status 0x%08X revision "
 564                        "0x%01X 0x%01X\n",
 565                        palive->is_valid, palive->ver_type,
 566                        palive->ver_subtype);
 567
 568         trans->shrd->device_pointers.error_event_table =
 569                 le32_to_cpu(palive->error_event_table_ptr);
 570         trans->shrd->device_pointers.log_event_table =
 571                 le32_to_cpu(palive->log_event_table_ptr);
 572
 573         alive_data->subtype = palive->ver_subtype;
 574         alive_data->valid = palive->is_valid == UCODE_VALID_OK;
 575 }
 576
 577 /* notification wait support */
 578 void iwl_init_notification_wait(struct iwl_shared *shrd,
 579                                    struct iwl_notification_wait *wait_entry,
 580                                    u8 cmd,
 581                                    void (*fn)(struct iwl_trans *trans,
 582                                               struct iwl_rx_packet *pkt,
 583                                               void *data),
 584                                    void *fn_data)
 585 {
 586         wait_entry->fn = fn;
 587         wait_entry->fn_data = fn_data;
 588         wait_entry->cmd = cmd;
 589         wait_entry->triggered = false;
 590         wait_entry->aborted = false;
 591
 592         spin_lock_bh(&shrd->notif_wait_lock);
 593         list_add(&wait_entry->list, &shrd->notif_waits);
 594         spin_unlock_bh(&shrd->notif_wait_lock);
 595 }
 596
 597 int iwl_wait_notification(struct iwl_shared *shrd,
 598                              struct iwl_notification_wait *wait_entry,
 599                              unsigned long timeout)
 600 {
 601         int ret;
 602
 603         ret = wait_event_timeout(shrd->notif_waitq,
 604                                  wait_entry->triggered || wait_entry->aborted,
 605                                  timeout);
 606
 607         spin_lock_bh(&shrd->notif_wait_lock);
 608         list_del(&wait_entry->list);
 609         spin_unlock_bh(&shrd->notif_wait_lock);
 610
 611         if (wait_entry->aborted)
 612                 return -EIO;
 613
 614         /* return value is always >= 0 */
 615         if (ret <= 0)
 616                 return -ETIMEDOUT;
 617         return 0;
 618 }
 619
 620 void iwl_remove_notification(struct iwl_shared *shrd,
 621                                 struct iwl_notification_wait *wait_entry)
 622 {
 623         spin_lock_bh(&shrd->notif_wait_lock);
 624         list_del(&wait_entry->list);
 625         spin_unlock_bh(&shrd->notif_wait_lock);
 626 }
 627
 628 void iwl_abort_notification_waits(struct iwl_shared *shrd)
 629 {
 630         unsigned long flags;
 631         struct iwl_notification_wait *wait_entry;
 632
 633         spin_lock_irqsave(&shrd->notif_wait_lock, flags);
 634         list_for_each_entry(wait_entry, &shrd->notif_waits, list)
 635                 wait_entry->aborted = true;
 636         spin_unlock_irqrestore(&shrd->notif_wait_lock, flags);
 637
 638         wake_up_all(&shrd->notif_waitq);
 639 }
 640
 641 #define UCODE_ALIVE_TIMEOUT     HZ
 642 #define UCODE_CALIB_TIMEOUT     (2*HZ)
 643
 644 int iwl_load_ucode_wait_alive(struct iwl_trans *trans,
 645                                  enum iwl_ucode_type ucode_type)
 646 {
 647         struct iwl_notification_wait alive_wait;
 648         struct iwl_alive_data alive_data;
 649         int ret;
 650         enum iwl_ucode_type old_type;
 651
 652         ret = iwl_trans_start_device(trans);
 653         if (ret)
 654                 return ret;
 655
 656         iwl_init_notification_wait(trans->shrd, &alive_wait, REPLY_ALIVE,
 657                                       iwl_alive_fn, &alive_data);
 658
 659         old_type = trans->shrd->ucode_type;
 660         trans->shrd->ucode_type = ucode_type;
 661
 662         ret = iwl_load_given_ucode(trans, ucode_type);
 663         if (ret) {
 664                 trans->shrd->ucode_type = old_type;
 665                 iwl_remove_notification(trans->shrd, &alive_wait);
 666                 return ret;
 667         }
 668
 669         iwl_trans_kick_nic(trans);
 670
 671         /*
 672          * Some things may run in the background now, but we
 673          * just wait for the ALIVE notification here.
 674          */
 675         ret = iwl_wait_notification(trans->shrd, &alive_wait,
 676                                         UCODE_ALIVE_TIMEOUT);
 677         if (ret) {
 678                 trans->shrd->ucode_type = old_type;
 679                 return ret;
 680         }
 681
 682         if (!alive_data.valid) {
 683                 IWL_ERR(trans, "Loaded ucode is not valid!\n");
 684                 trans->shrd->ucode_type = old_type;
 685                 return -EIO;
 686         }
 687
 688         /*
 689          * This step takes a long time (60-80ms!!) and
 690          * WoWLAN image should be loaded quickly, so
 691          * skip it for WoWLAN.
 692          */
 693         if (ucode_type != IWL_UCODE_WOWLAN) {
 694                 ret = iwl_verify_ucode(trans, ucode_type);
 695                 if (ret) {
 696                         trans->shrd->ucode_type = old_type;
 697                         return ret;
 698                 }
 699
 700                 /* delay a bit to give rfkill time to run */
 701                 msleep(5);
 702         }
 703
 704         ret = iwl_alive_notify(trans);
 705         if (ret) {
 706                 IWL_WARN(trans,
 707                         "Could not complete ALIVE transition: %d\n", ret);
 708                 trans->shrd->ucode_type = old_type;
 709                 return ret;
 710         }
 711
 712         return 0;
 713 }
 714
 715 int iwl_run_init_ucode(struct iwl_trans *trans)
 716 {
 717         struct iwl_notification_wait calib_wait;
 718         int ret;
 719
 720         lockdep_assert_held(&trans->shrd->mutex);
 721
 722         /* No init ucode required? Curious, but maybe ok */
 723         if (!trans->ucode_init.code.len)
 724                 return 0;
 725
 726         if (trans->shrd->ucode_type != IWL_UCODE_NONE)
 727                 return 0;
 728
 729         iwl_init_notification_wait(trans->shrd, &calib_wait,
 730                                       CALIBRATION_COMPLETE_NOTIFICATION,
 731                                       NULL, NULL);
 732
 733         /* Will also start the device */
 734         ret = iwl_load_ucode_wait_alive(trans, IWL_UCODE_INIT);
 735         if (ret)
 736                 goto error;
 737
 738         ret = iwl_init_alive_start(trans);
 739         if (ret)
 740                 goto error;
 741
 742         /*
 743          * Some things may run in the background now, but we
 744          * just wait for the calibration complete notification.
 745          */
 746         ret = iwl_wait_notification(trans->shrd, &calib_wait,
 747                                         UCODE_CALIB_TIMEOUT);
 748
 749         goto out;
 750
 751  error:
 752         iwl_remove_notification(trans->shrd, &calib_wait);
 753  out:
 754         /* Whatever happened, stop the device */
 755         iwl_trans_stop_device(trans);
 756         return ret;
 757 }