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iwlwifi: clean up printing
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-commands.h"
52 #include "iwl-3945.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-helpers.h"
55 #include "iwl-core.h"
56 #include "iwl-dev.h"
57
58 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
59 struct iwl3945_tx_queue *txq);
60
61 /******************************************************************************
62 *
63 * module boiler plate
64 *
65 ******************************************************************************/
66
67 /* module parameters */
68 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
69 static u32 iwl3945_param_debug; /* def: 0 = minimal debug log messages */
70 static int iwl3945_param_disable; /* def: 0 = enable radio */
71 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
72 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
73 int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
74
75 /*
76 * module name, copyright, version, etc.
77 */
78
79 #define DRV_DESCRIPTION \
80 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81
82 #ifdef CONFIG_IWL3945_DEBUG
83 #define VD "d"
84 #else
85 #define VD
86 #endif
87
88 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
89 #define VS "s"
90 #else
91 #define VS
92 #endif
93
94 #define IWL39_VERSION "1.2.26k" VD VS
95 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
96 #define DRV_AUTHOR "<ilw@linux.intel.com>"
97 #define DRV_VERSION IWL39_VERSION
98
99
100 MODULE_DESCRIPTION(DRV_DESCRIPTION);
101 MODULE_VERSION(DRV_VERSION);
102 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
103 MODULE_LICENSE("GPL");
104
105 static const struct ieee80211_supported_band *iwl3945_get_band(
106 struct iwl_priv *priv, enum ieee80211_band band)
107 {
108 return priv->hw->wiphy->bands[band];
109 }
110
111 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
112 * DMA services
113 *
114 * Theory of operation
115 *
116 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
117 * of buffer descriptors, each of which points to one or more data buffers for
118 * the device to read from or fill. Driver and device exchange status of each
119 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
120 * entries in each circular buffer, to protect against confusing empty and full
121 * queue states.
122 *
123 * The device reads or writes the data in the queues via the device's several
124 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
125 *
126 * For Tx queue, there are low mark and high mark limits. If, after queuing
127 * the packet for Tx, free space become < low mark, Tx queue stopped. When
128 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
129 * Tx queue resumed.
130 *
131 * The 3945 operates with six queues: One receive queue, one transmit queue
132 * (#4) for sending commands to the device firmware, and four transmit queues
133 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
134 ***************************************************/
135
136 int iwl3945_x2_queue_used(const struct iwl_queue *q, int i)
137 {
138 return q->write_ptr > q->read_ptr ?
139 (i >= q->read_ptr && i < q->write_ptr) :
140 !(i < q->read_ptr && i >= q->write_ptr);
141 }
142
143 /**
144 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
145 */
146 static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
147 int count, int slots_num, u32 id)
148 {
149 q->n_bd = count;
150 q->n_window = slots_num;
151 q->id = id;
152
153 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
154 * and iwl_queue_dec_wrap are broken. */
155 BUG_ON(!is_power_of_2(count));
156
157 /* slots_num must be power-of-two size, otherwise
158 * get_cmd_index is broken. */
159 BUG_ON(!is_power_of_2(slots_num));
160
161 q->low_mark = q->n_window / 4;
162 if (q->low_mark < 4)
163 q->low_mark = 4;
164
165 q->high_mark = q->n_window / 8;
166 if (q->high_mark < 2)
167 q->high_mark = 2;
168
169 q->write_ptr = q->read_ptr = 0;
170
171 return 0;
172 }
173
174 /**
175 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
176 */
177 static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
178 struct iwl3945_tx_queue *txq, u32 id)
179 {
180 struct pci_dev *dev = priv->pci_dev;
181
182 /* Driver private data, only for Tx (not command) queues,
183 * not shared with device. */
184 if (id != IWL_CMD_QUEUE_NUM) {
185 txq->txb = kmalloc(sizeof(txq->txb[0]) *
186 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
187 if (!txq->txb) {
188 IWL_ERROR("kmalloc for auxiliary BD "
189 "structures failed\n");
190 goto error;
191 }
192 } else
193 txq->txb = NULL;
194
195 /* Circular buffer of transmit frame descriptors (TFDs),
196 * shared with device */
197 txq->bd = pci_alloc_consistent(dev,
198 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
199 &txq->q.dma_addr);
200
201 if (!txq->bd) {
202 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
203 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
204 goto error;
205 }
206 txq->q.id = id;
207
208 return 0;
209
210 error:
211 kfree(txq->txb);
212 txq->txb = NULL;
213
214 return -ENOMEM;
215 }
216
217 /**
218 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
219 */
220 int iwl3945_tx_queue_init(struct iwl_priv *priv,
221 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
222 {
223 struct pci_dev *dev = priv->pci_dev;
224 int len;
225 int rc = 0;
226
227 /*
228 * Alloc buffer array for commands (Tx or other types of commands).
229 * For the command queue (#4), allocate command space + one big
230 * command for scan, since scan command is very huge; the system will
231 * not have two scans at the same time, so only one is needed.
232 * For data Tx queues (all other queues), no super-size command
233 * space is needed.
234 */
235 len = sizeof(struct iwl3945_cmd) * slots_num;
236 if (txq_id == IWL_CMD_QUEUE_NUM)
237 len += IWL_MAX_SCAN_SIZE;
238 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
239 if (!txq->cmd)
240 return -ENOMEM;
241
242 /* Alloc driver data array and TFD circular buffer */
243 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
244 if (rc) {
245 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
246
247 return -ENOMEM;
248 }
249 txq->need_update = 0;
250
251 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
252 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
253 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
254
255 /* Initialize queue high/low-water, head/tail indexes */
256 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
257
258 /* Tell device where to find queue, enable DMA channel. */
259 iwl3945_hw_tx_queue_init(priv, txq);
260
261 return 0;
262 }
263
264 /**
265 * iwl3945_tx_queue_free - Deallocate DMA queue.
266 * @txq: Transmit queue to deallocate.
267 *
268 * Empty queue by removing and destroying all BD's.
269 * Free all buffers.
270 * 0-fill, but do not free "txq" descriptor structure.
271 */
272 void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl3945_tx_queue *txq)
273 {
274 struct iwl_queue *q = &txq->q;
275 struct pci_dev *dev = priv->pci_dev;
276 int len;
277
278 if (q->n_bd == 0)
279 return;
280
281 /* first, empty all BD's */
282 for (; q->write_ptr != q->read_ptr;
283 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
284 iwl3945_hw_txq_free_tfd(priv, txq);
285
286 len = sizeof(struct iwl3945_cmd) * q->n_window;
287 if (q->id == IWL_CMD_QUEUE_NUM)
288 len += IWL_MAX_SCAN_SIZE;
289
290 /* De-alloc array of command/tx buffers */
291 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
292
293 /* De-alloc circular buffer of TFDs */
294 if (txq->q.n_bd)
295 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
296 txq->q.n_bd, txq->bd, txq->q.dma_addr);
297
298 /* De-alloc array of per-TFD driver data */
299 kfree(txq->txb);
300 txq->txb = NULL;
301
302 /* 0-fill queue descriptor structure */
303 memset(txq, 0, sizeof(*txq));
304 }
305
306 /*************** STATION TABLE MANAGEMENT ****
307 * mac80211 should be examined to determine if sta_info is duplicating
308 * the functionality provided here
309 */
310
311 /**************************************************************/
312 #if 0 /* temporary disable till we add real remove station */
313 /**
314 * iwl3945_remove_station - Remove driver's knowledge of station.
315 *
316 * NOTE: This does not remove station from device's station table.
317 */
318 static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
319 {
320 int index = IWL_INVALID_STATION;
321 int i;
322 unsigned long flags;
323
324 spin_lock_irqsave(&priv->sta_lock, flags);
325
326 if (is_ap)
327 index = IWL_AP_ID;
328 else if (is_broadcast_ether_addr(addr))
329 index = priv->hw_params.bcast_sta_id;
330 else
331 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
332 if (priv->stations_39[i].used &&
333 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
334 addr)) {
335 index = i;
336 break;
337 }
338
339 if (unlikely(index == IWL_INVALID_STATION))
340 goto out;
341
342 if (priv->stations_39[index].used) {
343 priv->stations_39[index].used = 0;
344 priv->num_stations--;
345 }
346
347 BUG_ON(priv->num_stations < 0);
348
349 out:
350 spin_unlock_irqrestore(&priv->sta_lock, flags);
351 return 0;
352 }
353 #endif
354
355 /**
356 * iwl3945_clear_stations_table - Clear the driver's station table
357 *
358 * NOTE: This does not clear or otherwise alter the device's station table.
359 */
360 static void iwl3945_clear_stations_table(struct iwl_priv *priv)
361 {
362 unsigned long flags;
363
364 spin_lock_irqsave(&priv->sta_lock, flags);
365
366 priv->num_stations = 0;
367 memset(priv->stations_39, 0, sizeof(priv->stations_39));
368
369 spin_unlock_irqrestore(&priv->sta_lock, flags);
370 }
371
372 /**
373 * iwl3945_add_station - Add station to station tables in driver and device
374 */
375 u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
376 {
377 int i;
378 int index = IWL_INVALID_STATION;
379 struct iwl3945_station_entry *station;
380 unsigned long flags_spin;
381 u8 rate;
382
383 spin_lock_irqsave(&priv->sta_lock, flags_spin);
384 if (is_ap)
385 index = IWL_AP_ID;
386 else if (is_broadcast_ether_addr(addr))
387 index = priv->hw_params.bcast_sta_id;
388 else
389 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
390 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
391 addr)) {
392 index = i;
393 break;
394 }
395
396 if (!priv->stations_39[i].used &&
397 index == IWL_INVALID_STATION)
398 index = i;
399 }
400
401 /* These two conditions has the same outcome but keep them separate
402 since they have different meaning */
403 if (unlikely(index == IWL_INVALID_STATION)) {
404 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
405 return index;
406 }
407
408 if (priv->stations_39[index].used &&
409 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
410 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
411 return index;
412 }
413
414 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
415 station = &priv->stations_39[index];
416 station->used = 1;
417 priv->num_stations++;
418
419 /* Set up the REPLY_ADD_STA command to send to device */
420 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
421 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
422 station->sta.mode = 0;
423 station->sta.sta.sta_id = index;
424 station->sta.station_flags = 0;
425
426 if (priv->band == IEEE80211_BAND_5GHZ)
427 rate = IWL_RATE_6M_PLCP;
428 else
429 rate = IWL_RATE_1M_PLCP;
430
431 /* Turn on both antennas for the station... */
432 station->sta.rate_n_flags =
433 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
434
435 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
436
437 /* Add station to device's station table */
438 iwl3945_send_add_station(priv, &station->sta, flags);
439 return index;
440
441 }
442
443 /*************** DRIVER STATUS FUNCTIONS *****/
444
445 static inline int iwl3945_is_ready(struct iwl_priv *priv)
446 {
447 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
448 * set but EXIT_PENDING is not */
449 return test_bit(STATUS_READY, &priv->status) &&
450 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
451 !test_bit(STATUS_EXIT_PENDING, &priv->status);
452 }
453
454 static inline int iwl3945_is_alive(struct iwl_priv *priv)
455 {
456 return test_bit(STATUS_ALIVE, &priv->status);
457 }
458
459 static inline int iwl3945_is_init(struct iwl_priv *priv)
460 {
461 return test_bit(STATUS_INIT, &priv->status);
462 }
463
464 static inline int iwl3945_is_rfkill_sw(struct iwl_priv *priv)
465 {
466 return test_bit(STATUS_RF_KILL_SW, &priv->status);
467 }
468
469 static inline int iwl3945_is_rfkill_hw(struct iwl_priv *priv)
470 {
471 return test_bit(STATUS_RF_KILL_HW, &priv->status);
472 }
473
474 static inline int iwl3945_is_rfkill(struct iwl_priv *priv)
475 {
476 return iwl3945_is_rfkill_hw(priv) ||
477 iwl3945_is_rfkill_sw(priv);
478 }
479
480 static inline int iwl3945_is_ready_rf(struct iwl_priv *priv)
481 {
482
483 if (iwl3945_is_rfkill(priv))
484 return 0;
485
486 return iwl3945_is_ready(priv);
487 }
488
489 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
490
491 #define IWL_CMD(x) case x: return #x
492 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
493
494 /**
495 * iwl3945_enqueue_hcmd - enqueue a uCode command
496 * @priv: device private data point
497 * @cmd: a point to the ucode command structure
498 *
499 * The function returns < 0 values to indicate the operation is
500 * failed. On success, it turns the index (> 0) of command in the
501 * command queue.
502 */
503 static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl3945_host_cmd *cmd)
504 {
505 struct iwl3945_tx_queue *txq = &priv->txq39[IWL_CMD_QUEUE_NUM];
506 struct iwl_queue *q = &txq->q;
507 struct iwl3945_tfd_frame *tfd;
508 u32 *control_flags;
509 struct iwl3945_cmd *out_cmd;
510 u32 idx;
511 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
512 dma_addr_t phys_addr;
513 int pad;
514 u16 count;
515 int ret;
516 unsigned long flags;
517
518 /* If any of the command structures end up being larger than
519 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
520 * we will need to increase the size of the TFD entries */
521 BUG_ON((fix_size > TFD39_MAX_PAYLOAD_SIZE) &&
522 !(cmd->meta.flags & CMD_SIZE_HUGE));
523
524
525 if (iwl3945_is_rfkill(priv)) {
526 IWL_DEBUG_INFO("Not sending command - RF KILL");
527 return -EIO;
528 }
529
530 if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
531 IWL_ERROR("No space for Tx\n");
532 return -ENOSPC;
533 }
534
535 spin_lock_irqsave(&priv->hcmd_lock, flags);
536
537 tfd = &txq->bd[q->write_ptr];
538 memset(tfd, 0, sizeof(*tfd));
539
540 control_flags = (u32 *) tfd;
541
542 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
543 out_cmd = &txq->cmd[idx];
544
545 out_cmd->hdr.cmd = cmd->id;
546 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
547 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
548
549 /* At this point, the out_cmd now has all of the incoming cmd
550 * information */
551
552 out_cmd->hdr.flags = 0;
553 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
554 INDEX_TO_SEQ(q->write_ptr));
555 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
556 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
557
558 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
559 offsetof(struct iwl3945_cmd, hdr);
560 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
561
562 pad = U32_PAD(cmd->len);
563 count = TFD_CTL_COUNT_GET(*control_flags);
564 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
565
566 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
567 "%d bytes at %d[%d]:%d\n",
568 get_cmd_string(out_cmd->hdr.cmd),
569 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
570 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
571
572 txq->need_update = 1;
573
574 /* Increment and update queue's write index */
575 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
576 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
577
578 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
579 return ret ? ret : idx;
580 }
581
582 static int iwl3945_send_cmd_async(struct iwl_priv *priv, struct iwl3945_host_cmd *cmd)
583 {
584 int ret;
585
586 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
587
588 /* An asynchronous command can not expect an SKB to be set. */
589 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
590
591 /* An asynchronous command MUST have a callback. */
592 BUG_ON(!cmd->meta.u.callback);
593
594 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
595 return -EBUSY;
596
597 ret = iwl3945_enqueue_hcmd(priv, cmd);
598 if (ret < 0) {
599 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
600 get_cmd_string(cmd->id), ret);
601 return ret;
602 }
603 return 0;
604 }
605
606 static int iwl3945_send_cmd_sync(struct iwl_priv *priv, struct iwl3945_host_cmd *cmd)
607 {
608 int cmd_idx;
609 int ret;
610
611 BUG_ON(cmd->meta.flags & CMD_ASYNC);
612
613 /* A synchronous command can not have a callback set. */
614 BUG_ON(cmd->meta.u.callback != NULL);
615
616 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
617 IWL_ERROR("Error sending %s: Already sending a host command\n",
618 get_cmd_string(cmd->id));
619 ret = -EBUSY;
620 goto out;
621 }
622
623 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
624
625 if (cmd->meta.flags & CMD_WANT_SKB)
626 cmd->meta.source = &cmd->meta;
627
628 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
629 if (cmd_idx < 0) {
630 ret = cmd_idx;
631 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
632 get_cmd_string(cmd->id), ret);
633 goto out;
634 }
635
636 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
637 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
638 HOST_COMPLETE_TIMEOUT);
639 if (!ret) {
640 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
641 IWL_ERROR("Error sending %s: time out after %dms.\n",
642 get_cmd_string(cmd->id),
643 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
644
645 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
646 ret = -ETIMEDOUT;
647 goto cancel;
648 }
649 }
650
651 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
652 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
653 get_cmd_string(cmd->id));
654 ret = -ECANCELED;
655 goto fail;
656 }
657 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
658 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
659 get_cmd_string(cmd->id));
660 ret = -EIO;
661 goto fail;
662 }
663 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
664 IWL_ERROR("Error: Response NULL in '%s'\n",
665 get_cmd_string(cmd->id));
666 ret = -EIO;
667 goto cancel;
668 }
669
670 ret = 0;
671 goto out;
672
673 cancel:
674 if (cmd->meta.flags & CMD_WANT_SKB) {
675 struct iwl3945_cmd *qcmd;
676
677 /* Cancel the CMD_WANT_SKB flag for the cmd in the
678 * TX cmd queue. Otherwise in case the cmd comes
679 * in later, it will possibly set an invalid
680 * address (cmd->meta.source). */
681 qcmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
682 qcmd->meta.flags &= ~CMD_WANT_SKB;
683 }
684 fail:
685 if (cmd->meta.u.skb) {
686 dev_kfree_skb_any(cmd->meta.u.skb);
687 cmd->meta.u.skb = NULL;
688 }
689 out:
690 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
691 return ret;
692 }
693
694 int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl3945_host_cmd *cmd)
695 {
696 if (cmd->meta.flags & CMD_ASYNC)
697 return iwl3945_send_cmd_async(priv, cmd);
698
699 return iwl3945_send_cmd_sync(priv, cmd);
700 }
701
702 int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
703 {
704 struct iwl3945_host_cmd cmd = {
705 .id = id,
706 .len = len,
707 .data = data,
708 };
709
710 return iwl3945_send_cmd_sync(priv, &cmd);
711 }
712
713 static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
714 {
715 struct iwl3945_host_cmd cmd = {
716 .id = id,
717 .len = sizeof(val),
718 .data = &val,
719 };
720
721 return iwl3945_send_cmd_sync(priv, &cmd);
722 }
723
724 int iwl3945_send_statistics_request(struct iwl_priv *priv)
725 {
726 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
727 }
728
729 /**
730 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
731 * @band: 2.4 or 5 GHz band
732 * @channel: Any channel valid for the requested band
733
734 * In addition to setting the staging RXON, priv->band is also set.
735 *
736 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
737 * in the staging RXON flag structure based on the band
738 */
739 static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
740 enum ieee80211_band band,
741 u16 channel)
742 {
743 if (!iwl3945_get_channel_info(priv, band, channel)) {
744 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
745 channel, band);
746 return -EINVAL;
747 }
748
749 if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
750 (priv->band == band))
751 return 0;
752
753 priv->staging39_rxon.channel = cpu_to_le16(channel);
754 if (band == IEEE80211_BAND_5GHZ)
755 priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
756 else
757 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
758
759 priv->band = band;
760
761 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
762
763 return 0;
764 }
765
766 /**
767 * iwl3945_check_rxon_cmd - validate RXON structure is valid
768 *
769 * NOTE: This is really only useful during development and can eventually
770 * be #ifdef'd out once the driver is stable and folks aren't actively
771 * making changes
772 */
773 static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
774 {
775 int error = 0;
776 int counter = 1;
777 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
778
779 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
780 error |= le32_to_cpu(rxon->flags &
781 (RXON_FLG_TGJ_NARROW_BAND_MSK |
782 RXON_FLG_RADAR_DETECT_MSK));
783 if (error)
784 IWL_WARNING("check 24G fields %d | %d\n",
785 counter++, error);
786 } else {
787 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
788 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
789 if (error)
790 IWL_WARNING("check 52 fields %d | %d\n",
791 counter++, error);
792 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
793 if (error)
794 IWL_WARNING("check 52 CCK %d | %d\n",
795 counter++, error);
796 }
797 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
798 if (error)
799 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
800
801 /* make sure basic rates 6Mbps and 1Mbps are supported */
802 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
803 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
804 if (error)
805 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
806
807 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
808 if (error)
809 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
810
811 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
812 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
813 if (error)
814 IWL_WARNING("check CCK and short slot %d | %d\n",
815 counter++, error);
816
817 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
818 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
819 if (error)
820 IWL_WARNING("check CCK & auto detect %d | %d\n",
821 counter++, error);
822
823 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
824 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
825 if (error)
826 IWL_WARNING("check TGG and auto detect %d | %d\n",
827 counter++, error);
828
829 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
830 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
831 RXON_FLG_ANT_A_MSK)) == 0);
832 if (error)
833 IWL_WARNING("check antenna %d %d\n", counter++, error);
834
835 if (error)
836 IWL_WARNING("Tuning to channel %d\n",
837 le16_to_cpu(rxon->channel));
838
839 if (error) {
840 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
841 return -1;
842 }
843 return 0;
844 }
845
846 /**
847 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
848 * @priv: staging_rxon is compared to active_rxon
849 *
850 * If the RXON structure is changing enough to require a new tune,
851 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
852 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
853 */
854 static int iwl3945_full_rxon_required(struct iwl_priv *priv)
855 {
856
857 /* These items are only settable from the full RXON command */
858 if (!(iwl3945_is_associated(priv)) ||
859 compare_ether_addr(priv->staging39_rxon.bssid_addr,
860 priv->active39_rxon.bssid_addr) ||
861 compare_ether_addr(priv->staging39_rxon.node_addr,
862 priv->active39_rxon.node_addr) ||
863 compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
864 priv->active39_rxon.wlap_bssid_addr) ||
865 (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
866 (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
867 (priv->staging39_rxon.air_propagation !=
868 priv->active39_rxon.air_propagation) ||
869 (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
870 return 1;
871
872 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
873 * be updated with the RXON_ASSOC command -- however only some
874 * flag transitions are allowed using RXON_ASSOC */
875
876 /* Check if we are not switching bands */
877 if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
878 (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
879 return 1;
880
881 /* Check if we are switching association toggle */
882 if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
883 (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
884 return 1;
885
886 return 0;
887 }
888
889 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
890 {
891 int rc = 0;
892 struct iwl_rx_packet *res = NULL;
893 struct iwl3945_rxon_assoc_cmd rxon_assoc;
894 struct iwl3945_host_cmd cmd = {
895 .id = REPLY_RXON_ASSOC,
896 .len = sizeof(rxon_assoc),
897 .meta.flags = CMD_WANT_SKB,
898 .data = &rxon_assoc,
899 };
900 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
901 const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
902
903 if ((rxon1->flags == rxon2->flags) &&
904 (rxon1->filter_flags == rxon2->filter_flags) &&
905 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
906 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
907 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
908 return 0;
909 }
910
911 rxon_assoc.flags = priv->staging39_rxon.flags;
912 rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
913 rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
914 rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
915 rxon_assoc.reserved = 0;
916
917 rc = iwl3945_send_cmd_sync(priv, &cmd);
918 if (rc)
919 return rc;
920
921 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
922 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
923 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
924 rc = -EIO;
925 }
926
927 priv->alloc_rxb_skb--;
928 dev_kfree_skb_any(cmd.meta.u.skb);
929
930 return rc;
931 }
932
933 /**
934 * iwl3945_commit_rxon - commit staging_rxon to hardware
935 *
936 * The RXON command in staging_rxon is committed to the hardware and
937 * the active_rxon structure is updated with the new data. This
938 * function correctly transitions out of the RXON_ASSOC_MSK state if
939 * a HW tune is required based on the RXON structure changes.
940 */
941 static int iwl3945_commit_rxon(struct iwl_priv *priv)
942 {
943 /* cast away the const for active_rxon in this function */
944 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
945 int rc = 0;
946
947 if (!iwl3945_is_alive(priv))
948 return -1;
949
950 /* always get timestamp with Rx frame */
951 priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
952
953 /* select antenna */
954 priv->staging39_rxon.flags &=
955 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
956 priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
957
958 rc = iwl3945_check_rxon_cmd(priv);
959 if (rc) {
960 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
961 return -EINVAL;
962 }
963
964 /* If we don't need to send a full RXON, we can use
965 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
966 * and other flags for the current radio configuration. */
967 if (!iwl3945_full_rxon_required(priv)) {
968 rc = iwl3945_send_rxon_assoc(priv);
969 if (rc) {
970 IWL_ERROR("Error setting RXON_ASSOC "
971 "configuration (%d).\n", rc);
972 return rc;
973 }
974
975 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
976
977 return 0;
978 }
979
980 /* If we are currently associated and the new config requires
981 * an RXON_ASSOC and the new config wants the associated mask enabled,
982 * we must clear the associated from the active configuration
983 * before we apply the new config */
984 if (iwl3945_is_associated(priv) &&
985 (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
986 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
987 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
988
989 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
990 sizeof(struct iwl3945_rxon_cmd),
991 &priv->active39_rxon);
992
993 /* If the mask clearing failed then we set
994 * active_rxon back to what it was previously */
995 if (rc) {
996 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
997 IWL_ERROR("Error clearing ASSOC_MSK on current "
998 "configuration (%d).\n", rc);
999 return rc;
1000 }
1001 }
1002
1003 IWL_DEBUG_INFO("Sending RXON\n"
1004 "* with%s RXON_FILTER_ASSOC_MSK\n"
1005 "* channel = %d\n"
1006 "* bssid = %pM\n",
1007 ((priv->staging39_rxon.filter_flags &
1008 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1009 le16_to_cpu(priv->staging39_rxon.channel),
1010 priv->staging_rxon.bssid_addr);
1011
1012 /* Apply the new configuration */
1013 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1014 sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
1015 if (rc) {
1016 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1017 return rc;
1018 }
1019
1020 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
1021
1022 iwl3945_clear_stations_table(priv);
1023
1024 /* If we issue a new RXON command which required a tune then we must
1025 * send a new TXPOWER command or we won't be able to Tx any frames */
1026 rc = iwl3945_hw_reg_send_txpower(priv);
1027 if (rc) {
1028 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1029 return rc;
1030 }
1031
1032 /* Add the broadcast address so we can send broadcast frames */
1033 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
1034 IWL_INVALID_STATION) {
1035 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1036 return -EIO;
1037 }
1038
1039 /* If we have set the ASSOC_MSK and we are in BSS mode then
1040 * add the IWL_AP_ID to the station rate table */
1041 if (iwl3945_is_associated(priv) &&
1042 (priv->iw_mode == NL80211_IFTYPE_STATION))
1043 if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
1044 == IWL_INVALID_STATION) {
1045 IWL_ERROR("Error adding AP address for transmit.\n");
1046 return -EIO;
1047 }
1048
1049 /* Init the hardware's rate fallback order based on the band */
1050 rc = iwl3945_init_hw_rate_table(priv);
1051 if (rc) {
1052 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1053 return -EIO;
1054 }
1055
1056 return 0;
1057 }
1058
1059 static int iwl3945_send_bt_config(struct iwl_priv *priv)
1060 {
1061 struct iwl_bt_cmd bt_cmd = {
1062 .flags = 3,
1063 .lead_time = 0xAA,
1064 .max_kill = 1,
1065 .kill_ack_mask = 0,
1066 .kill_cts_mask = 0,
1067 };
1068
1069 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1070 sizeof(bt_cmd), &bt_cmd);
1071 }
1072
1073 static int iwl3945_send_scan_abort(struct iwl_priv *priv)
1074 {
1075 int rc = 0;
1076 struct iwl_rx_packet *res;
1077 struct iwl3945_host_cmd cmd = {
1078 .id = REPLY_SCAN_ABORT_CMD,
1079 .meta.flags = CMD_WANT_SKB,
1080 };
1081
1082 /* If there isn't a scan actively going on in the hardware
1083 * then we are in between scan bands and not actually
1084 * actively scanning, so don't send the abort command */
1085 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1086 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1087 return 0;
1088 }
1089
1090 rc = iwl3945_send_cmd_sync(priv, &cmd);
1091 if (rc) {
1092 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1093 return rc;
1094 }
1095
1096 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1097 if (res->u.status != CAN_ABORT_STATUS) {
1098 /* The scan abort will return 1 for success or
1099 * 2 for "failure". A failure condition can be
1100 * due to simply not being in an active scan which
1101 * can occur if we send the scan abort before we
1102 * the microcode has notified us that a scan is
1103 * completed. */
1104 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1105 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1106 clear_bit(STATUS_SCAN_HW, &priv->status);
1107 }
1108
1109 dev_kfree_skb_any(cmd.meta.u.skb);
1110
1111 return rc;
1112 }
1113
1114 static int iwl3945_card_state_sync_callback(struct iwl_priv *priv,
1115 struct iwl3945_cmd *cmd,
1116 struct sk_buff *skb)
1117 {
1118 return 1;
1119 }
1120
1121 /*
1122 * CARD_STATE_CMD
1123 *
1124 * Use: Sets the device's internal card state to enable, disable, or halt
1125 *
1126 * When in the 'enable' state the card operates as normal.
1127 * When in the 'disable' state, the card enters into a low power mode.
1128 * When in the 'halt' state, the card is shut down and must be fully
1129 * restarted to come back on.
1130 */
1131 static int iwl3945_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1132 {
1133 struct iwl3945_host_cmd cmd = {
1134 .id = REPLY_CARD_STATE_CMD,
1135 .len = sizeof(u32),
1136 .data = &flags,
1137 .meta.flags = meta_flag,
1138 };
1139
1140 if (meta_flag & CMD_ASYNC)
1141 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1142
1143 return iwl3945_send_cmd(priv, &cmd);
1144 }
1145
1146 static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
1147 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1148 {
1149 struct iwl_rx_packet *res = NULL;
1150
1151 if (!skb) {
1152 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1153 return 1;
1154 }
1155
1156 res = (struct iwl_rx_packet *)skb->data;
1157 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1158 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1159 res->hdr.flags);
1160 return 1;
1161 }
1162
1163 switch (res->u.add_sta.status) {
1164 case ADD_STA_SUCCESS_MSK:
1165 break;
1166 default:
1167 break;
1168 }
1169
1170 /* We didn't cache the SKB; let the caller free it */
1171 return 1;
1172 }
1173
1174 int iwl3945_send_add_station(struct iwl_priv *priv,
1175 struct iwl3945_addsta_cmd *sta, u8 flags)
1176 {
1177 struct iwl_rx_packet *res = NULL;
1178 int rc = 0;
1179 struct iwl3945_host_cmd cmd = {
1180 .id = REPLY_ADD_STA,
1181 .len = sizeof(struct iwl3945_addsta_cmd),
1182 .meta.flags = flags,
1183 .data = sta,
1184 };
1185
1186 if (flags & CMD_ASYNC)
1187 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1188 else
1189 cmd.meta.flags |= CMD_WANT_SKB;
1190
1191 rc = iwl3945_send_cmd(priv, &cmd);
1192
1193 if (rc || (flags & CMD_ASYNC))
1194 return rc;
1195
1196 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1197 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1198 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1199 res->hdr.flags);
1200 rc = -EIO;
1201 }
1202
1203 if (rc == 0) {
1204 switch (res->u.add_sta.status) {
1205 case ADD_STA_SUCCESS_MSK:
1206 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1207 break;
1208 default:
1209 rc = -EIO;
1210 IWL_WARNING("REPLY_ADD_STA failed\n");
1211 break;
1212 }
1213 }
1214
1215 priv->alloc_rxb_skb--;
1216 dev_kfree_skb_any(cmd.meta.u.skb);
1217
1218 return rc;
1219 }
1220
1221 static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
1222 struct ieee80211_key_conf *keyconf,
1223 u8 sta_id)
1224 {
1225 unsigned long flags;
1226 __le16 key_flags = 0;
1227
1228 switch (keyconf->alg) {
1229 case ALG_CCMP:
1230 key_flags |= STA_KEY_FLG_CCMP;
1231 key_flags |= cpu_to_le16(
1232 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1233 key_flags &= ~STA_KEY_FLG_INVALID;
1234 break;
1235 case ALG_TKIP:
1236 case ALG_WEP:
1237 default:
1238 return -EINVAL;
1239 }
1240 spin_lock_irqsave(&priv->sta_lock, flags);
1241 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
1242 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
1243 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
1244 keyconf->keylen);
1245
1246 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
1247 keyconf->keylen);
1248 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
1249 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1250 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1251
1252 spin_unlock_irqrestore(&priv->sta_lock, flags);
1253
1254 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1255 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1256 return 0;
1257 }
1258
1259 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
1260 {
1261 unsigned long flags;
1262
1263 spin_lock_irqsave(&priv->sta_lock, flags);
1264 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1265 memset(&priv->stations_39[sta_id].sta.key, 0,
1266 sizeof(struct iwl4965_keyinfo));
1267 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1268 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1269 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1270 spin_unlock_irqrestore(&priv->sta_lock, flags);
1271
1272 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1273 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1274 return 0;
1275 }
1276
1277 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
1278 {
1279 struct list_head *element;
1280
1281 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1282 priv->frames_count);
1283
1284 while (!list_empty(&priv->free_frames)) {
1285 element = priv->free_frames.next;
1286 list_del(element);
1287 kfree(list_entry(element, struct iwl3945_frame, list));
1288 priv->frames_count--;
1289 }
1290
1291 if (priv->frames_count) {
1292 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1293 priv->frames_count);
1294 priv->frames_count = 0;
1295 }
1296 }
1297
1298 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
1299 {
1300 struct iwl3945_frame *frame;
1301 struct list_head *element;
1302 if (list_empty(&priv->free_frames)) {
1303 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1304 if (!frame) {
1305 IWL_ERROR("Could not allocate frame!\n");
1306 return NULL;
1307 }
1308
1309 priv->frames_count++;
1310 return frame;
1311 }
1312
1313 element = priv->free_frames.next;
1314 list_del(element);
1315 return list_entry(element, struct iwl3945_frame, list);
1316 }
1317
1318 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
1319 {
1320 memset(frame, 0, sizeof(*frame));
1321 list_add(&frame->list, &priv->free_frames);
1322 }
1323
1324 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
1325 struct ieee80211_hdr *hdr,
1326 int left)
1327 {
1328
1329 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1330 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1331 (priv->iw_mode != NL80211_IFTYPE_AP)))
1332 return 0;
1333
1334 if (priv->ibss_beacon->len > left)
1335 return 0;
1336
1337 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1338
1339 return priv->ibss_beacon->len;
1340 }
1341
1342 static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
1343 {
1344 u8 i;
1345 int rate_mask;
1346
1347 /* Set rate mask*/
1348 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1349 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1350 else
1351 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1352
1353 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1354 i = iwl3945_rates[i].next_ieee) {
1355 if (rate_mask & (1 << i))
1356 return iwl3945_rates[i].plcp;
1357 }
1358
1359 /* No valid rate was found. Assign the lowest one */
1360 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1361 return IWL_RATE_1M_PLCP;
1362 else
1363 return IWL_RATE_6M_PLCP;
1364 }
1365
1366 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
1367 {
1368 struct iwl3945_frame *frame;
1369 unsigned int frame_size;
1370 int rc;
1371 u8 rate;
1372
1373 frame = iwl3945_get_free_frame(priv);
1374
1375 if (!frame) {
1376 IWL_ERROR("Could not obtain free frame buffer for beacon "
1377 "command.\n");
1378 return -ENOMEM;
1379 }
1380
1381 rate = iwl3945_rate_get_lowest_plcp(priv);
1382
1383 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1384
1385 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1386 &frame->u.cmd[0]);
1387
1388 iwl3945_free_frame(priv, frame);
1389
1390 return rc;
1391 }
1392
1393 /******************************************************************************
1394 *
1395 * EEPROM related functions
1396 *
1397 ******************************************************************************/
1398
1399 static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
1400 {
1401 memcpy(mac, priv->eeprom39.mac_address, 6);
1402 }
1403
1404 /*
1405 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1406 * embedded controller) as EEPROM reader; each read is a series of pulses
1407 * to/from the EEPROM chip, not a single event, so even reads could conflict
1408 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1409 * simply claims ownership, which should be safe when this function is called
1410 * (i.e. before loading uCode!).
1411 */
1412 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
1413 {
1414 _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1415 return 0;
1416 }
1417
1418 /**
1419 * iwl3945_eeprom_init - read EEPROM contents
1420 *
1421 * Load the EEPROM contents from adapter into priv->eeprom39
1422 *
1423 * NOTE: This routine uses the non-debug IO access functions.
1424 */
1425 int iwl3945_eeprom_init(struct iwl_priv *priv)
1426 {
1427 u16 *e = (u16 *)&priv->eeprom39;
1428 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
1429 int sz = sizeof(priv->eeprom39);
1430 int ret;
1431 u16 addr;
1432
1433 /* The EEPROM structure has several padding buffers within it
1434 * and when adding new EEPROM maps is subject to programmer errors
1435 * which may be very difficult to identify without explicitly
1436 * checking the resulting size of the eeprom map. */
1437 BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
1438
1439 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1440 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1441 return -ENOENT;
1442 }
1443
1444 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1445 ret = iwl3945_eeprom_acquire_semaphore(priv);
1446 if (ret < 0) {
1447 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1448 return -ENOENT;
1449 }
1450
1451 /* eeprom is an array of 16bit values */
1452 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1453 u32 r;
1454
1455 _iwl_write32(priv, CSR_EEPROM_REG,
1456 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1457 _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1458 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
1459 CSR_EEPROM_REG_READ_VALID_MSK,
1460 IWL_EEPROM_ACCESS_TIMEOUT);
1461 if (ret < 0) {
1462 IWL_ERROR("Time out reading EEPROM[%d]\n", addr);
1463 return ret;
1464 }
1465
1466 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
1467 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1468 }
1469
1470 return 0;
1471 }
1472
1473 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
1474 {
1475 if (priv->shared_virt)
1476 pci_free_consistent(priv->pci_dev,
1477 sizeof(struct iwl3945_shared),
1478 priv->shared_virt,
1479 priv->shared_phys);
1480 }
1481
1482 /**
1483 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1484 *
1485 * return : set the bit for each supported rate insert in ie
1486 */
1487 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1488 u16 basic_rate, int *left)
1489 {
1490 u16 ret_rates = 0, bit;
1491 int i;
1492 u8 *cnt = ie;
1493 u8 *rates = ie + 1;
1494
1495 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1496 if (bit & supported_rate) {
1497 ret_rates |= bit;
1498 rates[*cnt] = iwl3945_rates[i].ieee |
1499 ((bit & basic_rate) ? 0x80 : 0x00);
1500 (*cnt)++;
1501 (*left)--;
1502 if ((*left <= 0) ||
1503 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1504 break;
1505 }
1506 }
1507
1508 return ret_rates;
1509 }
1510
1511 /**
1512 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1513 */
1514 static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
1515 struct ieee80211_mgmt *frame,
1516 int left)
1517 {
1518 int len = 0;
1519 u8 *pos = NULL;
1520 u16 active_rates, ret_rates, cck_rates;
1521
1522 /* Make sure there is enough space for the probe request,
1523 * two mandatory IEs and the data */
1524 left -= 24;
1525 if (left < 0)
1526 return 0;
1527 len += 24;
1528
1529 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1530 memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
1531 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1532 memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
1533 frame->seq_ctrl = 0;
1534
1535 /* fill in our indirect SSID IE */
1536 /* ...next IE... */
1537
1538 left -= 2;
1539 if (left < 0)
1540 return 0;
1541 len += 2;
1542 pos = &(frame->u.probe_req.variable[0]);
1543 *pos++ = WLAN_EID_SSID;
1544 *pos++ = 0;
1545
1546 /* fill in supported rate */
1547 /* ...next IE... */
1548 left -= 2;
1549 if (left < 0)
1550 return 0;
1551
1552 /* ... fill it in... */
1553 *pos++ = WLAN_EID_SUPP_RATES;
1554 *pos = 0;
1555
1556 priv->active_rate = priv->rates_mask;
1557 active_rates = priv->active_rate;
1558 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1559
1560 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1561 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1562 priv->active_rate_basic, &left);
1563 active_rates &= ~ret_rates;
1564
1565 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1566 priv->active_rate_basic, &left);
1567 active_rates &= ~ret_rates;
1568
1569 len += 2 + *pos;
1570 pos += (*pos) + 1;
1571 if (active_rates == 0)
1572 goto fill_end;
1573
1574 /* fill in supported extended rate */
1575 /* ...next IE... */
1576 left -= 2;
1577 if (left < 0)
1578 return 0;
1579 /* ... fill it in... */
1580 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1581 *pos = 0;
1582 iwl3945_supported_rate_to_ie(pos, active_rates,
1583 priv->active_rate_basic, &left);
1584 if (*pos > 0)
1585 len += 2 + *pos;
1586
1587 fill_end:
1588 return (u16)len;
1589 }
1590
1591 /*
1592 * QoS support
1593 */
1594 static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
1595 struct iwl_qosparam_cmd *qos)
1596 {
1597
1598 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1599 sizeof(struct iwl_qosparam_cmd), qos);
1600 }
1601
1602 static void iwl3945_reset_qos(struct iwl_priv *priv)
1603 {
1604 u16 cw_min = 15;
1605 u16 cw_max = 1023;
1606 u8 aifs = 2;
1607 u8 is_legacy = 0;
1608 unsigned long flags;
1609 int i;
1610
1611 spin_lock_irqsave(&priv->lock, flags);
1612 priv->qos_data.qos_active = 0;
1613
1614 /* QoS always active in AP and ADHOC mode
1615 * In STA mode wait for association
1616 */
1617 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
1618 priv->iw_mode == NL80211_IFTYPE_AP)
1619 priv->qos_data.qos_active = 1;
1620 else
1621 priv->qos_data.qos_active = 0;
1622
1623
1624 /* check for legacy mode */
1625 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
1626 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
1627 (priv->iw_mode == NL80211_IFTYPE_STATION &&
1628 (priv->staging39_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
1629 cw_min = 31;
1630 is_legacy = 1;
1631 }
1632
1633 if (priv->qos_data.qos_active)
1634 aifs = 3;
1635
1636 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1637 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1638 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1639 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1640 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1641
1642 if (priv->qos_data.qos_active) {
1643 i = 1;
1644 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1645 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1646 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1647 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1648 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1649
1650 i = 2;
1651 priv->qos_data.def_qos_parm.ac[i].cw_min =
1652 cpu_to_le16((cw_min + 1) / 2 - 1);
1653 priv->qos_data.def_qos_parm.ac[i].cw_max =
1654 cpu_to_le16(cw_max);
1655 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1656 if (is_legacy)
1657 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1658 cpu_to_le16(6016);
1659 else
1660 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1661 cpu_to_le16(3008);
1662 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1663
1664 i = 3;
1665 priv->qos_data.def_qos_parm.ac[i].cw_min =
1666 cpu_to_le16((cw_min + 1) / 4 - 1);
1667 priv->qos_data.def_qos_parm.ac[i].cw_max =
1668 cpu_to_le16((cw_max + 1) / 2 - 1);
1669 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1670 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1671 if (is_legacy)
1672 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1673 cpu_to_le16(3264);
1674 else
1675 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1676 cpu_to_le16(1504);
1677 } else {
1678 for (i = 1; i < 4; i++) {
1679 priv->qos_data.def_qos_parm.ac[i].cw_min =
1680 cpu_to_le16(cw_min);
1681 priv->qos_data.def_qos_parm.ac[i].cw_max =
1682 cpu_to_le16(cw_max);
1683 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1684 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1685 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1686 }
1687 }
1688 IWL_DEBUG_QOS("set QoS to default \n");
1689
1690 spin_unlock_irqrestore(&priv->lock, flags);
1691 }
1692
1693 static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
1694 {
1695 unsigned long flags;
1696
1697 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1698 return;
1699
1700 spin_lock_irqsave(&priv->lock, flags);
1701 priv->qos_data.def_qos_parm.qos_flags = 0;
1702
1703 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1704 !priv->qos_data.qos_cap.q_AP.txop_request)
1705 priv->qos_data.def_qos_parm.qos_flags |=
1706 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1707
1708 if (priv->qos_data.qos_active)
1709 priv->qos_data.def_qos_parm.qos_flags |=
1710 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1711
1712 spin_unlock_irqrestore(&priv->lock, flags);
1713
1714 if (force || iwl3945_is_associated(priv)) {
1715 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1716 priv->qos_data.qos_active);
1717
1718 iwl3945_send_qos_params_command(priv,
1719 &(priv->qos_data.def_qos_parm));
1720 }
1721 }
1722
1723 /*
1724 * Power management (not Tx power!) functions
1725 */
1726 #define MSEC_TO_USEC 1024
1727
1728
1729 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1730 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1731 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1732 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1733 __constant_cpu_to_le32(X1), \
1734 __constant_cpu_to_le32(X2), \
1735 __constant_cpu_to_le32(X3), \
1736 __constant_cpu_to_le32(X4)}
1737
1738 /* default power management (not Tx power) table values */
1739 /* for TIM 0-10 */
1740 static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
1741 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1742 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1743 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1744 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1745 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1746 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1747 };
1748
1749 /* for TIM > 10 */
1750 static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
1751 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1752 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1753 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1754 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1755 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1756 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1757 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1758 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1759 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1760 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1761 };
1762
1763 int iwl3945_power_init_handle(struct iwl_priv *priv)
1764 {
1765 int rc = 0, i;
1766 struct iwl3945_power_mgr *pow_data;
1767 int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
1768 u16 pci_pm;
1769
1770 IWL_DEBUG_POWER("Initialize power \n");
1771
1772 pow_data = &(priv->power_data_39);
1773
1774 memset(pow_data, 0, sizeof(*pow_data));
1775
1776 pow_data->active_index = IWL_POWER_RANGE_0;
1777 pow_data->dtim_val = 0xffff;
1778
1779 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1780 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1781
1782 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1783 if (rc != 0)
1784 return 0;
1785 else {
1786 struct iwl_powertable_cmd *cmd;
1787
1788 IWL_DEBUG_POWER("adjust power command flags\n");
1789
1790 for (i = 0; i < IWL39_POWER_AC; i++) {
1791 cmd = &pow_data->pwr_range_0[i].cmd;
1792
1793 if (pci_pm & 0x1)
1794 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1795 else
1796 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1797 }
1798 }
1799 return rc;
1800 }
1801
1802 static int iwl3945_update_power_cmd(struct iwl_priv *priv,
1803 struct iwl_powertable_cmd *cmd, u32 mode)
1804 {
1805 int rc = 0, i;
1806 u8 skip;
1807 u32 max_sleep = 0;
1808 struct iwl_power_vec_entry *range;
1809 u8 period = 0;
1810 struct iwl3945_power_mgr *pow_data;
1811
1812 if (mode > IWL_POWER_INDEX_5) {
1813 IWL_DEBUG_POWER("Error invalid power mode \n");
1814 return -1;
1815 }
1816 pow_data = &(priv->power_data_39);
1817
1818 if (pow_data->active_index == IWL_POWER_RANGE_0)
1819 range = &pow_data->pwr_range_0[0];
1820 else
1821 range = &pow_data->pwr_range_1[1];
1822
1823 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1824
1825 #ifdef IWL_MAC80211_DISABLE
1826 if (priv->assoc_network != NULL) {
1827 unsigned long flags;
1828
1829 period = priv->assoc_network->tim.tim_period;
1830 }
1831 #endif /*IWL_MAC80211_DISABLE */
1832 skip = range[mode].no_dtim;
1833
1834 if (period == 0) {
1835 period = 1;
1836 skip = 0;
1837 }
1838
1839 if (skip == 0) {
1840 max_sleep = period;
1841 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1842 } else {
1843 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1844 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1845 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1846 }
1847
1848 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1849 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1850 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1851 }
1852
1853 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1854 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1855 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1856 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1857 le32_to_cpu(cmd->sleep_interval[0]),
1858 le32_to_cpu(cmd->sleep_interval[1]),
1859 le32_to_cpu(cmd->sleep_interval[2]),
1860 le32_to_cpu(cmd->sleep_interval[3]),
1861 le32_to_cpu(cmd->sleep_interval[4]));
1862
1863 return rc;
1864 }
1865
1866 static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
1867 {
1868 u32 uninitialized_var(final_mode);
1869 int rc;
1870 struct iwl_powertable_cmd cmd;
1871
1872 /* If on battery, set to 3,
1873 * if plugged into AC power, set to CAM ("continuously aware mode"),
1874 * else user level */
1875 switch (mode) {
1876 case IWL39_POWER_BATTERY:
1877 final_mode = IWL_POWER_INDEX_3;
1878 break;
1879 case IWL39_POWER_AC:
1880 final_mode = IWL_POWER_MODE_CAM;
1881 break;
1882 default:
1883 final_mode = mode;
1884 break;
1885 }
1886
1887 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1888
1889 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1890 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1891 sizeof(struct iwl3945_powertable_cmd), &cmd);
1892
1893 if (final_mode == IWL_POWER_MODE_CAM)
1894 clear_bit(STATUS_POWER_PMI, &priv->status);
1895 else
1896 set_bit(STATUS_POWER_PMI, &priv->status);
1897
1898 return rc;
1899 }
1900
1901 /**
1902 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1903 *
1904 * NOTE: priv->mutex is not required before calling this function
1905 */
1906 static int iwl3945_scan_cancel(struct iwl_priv *priv)
1907 {
1908 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1909 clear_bit(STATUS_SCANNING, &priv->status);
1910 return 0;
1911 }
1912
1913 if (test_bit(STATUS_SCANNING, &priv->status)) {
1914 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1915 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1916 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1917 queue_work(priv->workqueue, &priv->abort_scan);
1918
1919 } else
1920 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1921
1922 return test_bit(STATUS_SCANNING, &priv->status);
1923 }
1924
1925 return 0;
1926 }
1927
1928 /**
1929 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
1930 * @ms: amount of time to wait (in milliseconds) for scan to abort
1931 *
1932 * NOTE: priv->mutex must be held before calling this function
1933 */
1934 static int iwl3945_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
1935 {
1936 unsigned long now = jiffies;
1937 int ret;
1938
1939 ret = iwl3945_scan_cancel(priv);
1940 if (ret && ms) {
1941 mutex_unlock(&priv->mutex);
1942 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1943 test_bit(STATUS_SCANNING, &priv->status))
1944 msleep(1);
1945 mutex_lock(&priv->mutex);
1946
1947 return test_bit(STATUS_SCANNING, &priv->status);
1948 }
1949
1950 return ret;
1951 }
1952
1953 #define MAX_UCODE_BEACON_INTERVAL 1024
1954 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1955
1956 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
1957 {
1958 u16 new_val = 0;
1959 u16 beacon_factor = 0;
1960
1961 beacon_factor =
1962 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1963 / MAX_UCODE_BEACON_INTERVAL;
1964 new_val = beacon_val / beacon_factor;
1965
1966 return cpu_to_le16(new_val);
1967 }
1968
1969 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
1970 {
1971 u64 interval_tm_unit;
1972 u64 tsf, result;
1973 unsigned long flags;
1974 struct ieee80211_conf *conf = NULL;
1975 u16 beacon_int = 0;
1976
1977 conf = ieee80211_get_hw_conf(priv->hw);
1978
1979 spin_lock_irqsave(&priv->lock, flags);
1980 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
1981 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1982
1983 tsf = priv->timestamp;
1984
1985 beacon_int = priv->beacon_int;
1986 spin_unlock_irqrestore(&priv->lock, flags);
1987
1988 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
1989 if (beacon_int == 0) {
1990 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1991 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1992 } else {
1993 priv->rxon_timing.beacon_interval =
1994 cpu_to_le16(beacon_int);
1995 priv->rxon_timing.beacon_interval =
1996 iwl3945_adjust_beacon_interval(
1997 le16_to_cpu(priv->rxon_timing.beacon_interval));
1998 }
1999
2000 priv->rxon_timing.atim_window = 0;
2001 } else {
2002 priv->rxon_timing.beacon_interval =
2003 iwl3945_adjust_beacon_interval(conf->beacon_int);
2004 /* TODO: we need to get atim_window from upper stack
2005 * for now we set to 0 */
2006 priv->rxon_timing.atim_window = 0;
2007 }
2008
2009 interval_tm_unit =
2010 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2011 result = do_div(tsf, interval_tm_unit);
2012 priv->rxon_timing.beacon_init_val =
2013 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2014
2015 IWL_DEBUG_ASSOC
2016 ("beacon interval %d beacon timer %d beacon tim %d\n",
2017 le16_to_cpu(priv->rxon_timing.beacon_interval),
2018 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2019 le16_to_cpu(priv->rxon_timing.atim_window));
2020 }
2021
2022 static int iwl3945_scan_initiate(struct iwl_priv *priv)
2023 {
2024 if (!iwl3945_is_ready_rf(priv)) {
2025 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2026 return -EIO;
2027 }
2028
2029 if (test_bit(STATUS_SCANNING, &priv->status)) {
2030 IWL_DEBUG_SCAN("Scan already in progress.\n");
2031 return -EAGAIN;
2032 }
2033
2034 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2035 IWL_DEBUG_SCAN("Scan request while abort pending. "
2036 "Queuing.\n");
2037 return -EAGAIN;
2038 }
2039
2040 IWL_DEBUG_INFO("Starting scan...\n");
2041 if (priv->cfg->sku & IWL_SKU_G)
2042 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2043 if (priv->cfg->sku & IWL_SKU_A)
2044 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
2045 set_bit(STATUS_SCANNING, &priv->status);
2046 priv->scan_start = jiffies;
2047 priv->scan_pass_start = priv->scan_start;
2048
2049 queue_work(priv->workqueue, &priv->request_scan);
2050
2051 return 0;
2052 }
2053
2054 static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
2055 {
2056 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
2057
2058 if (hw_decrypt)
2059 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2060 else
2061 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2062
2063 return 0;
2064 }
2065
2066 static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
2067 enum ieee80211_band band)
2068 {
2069 if (band == IEEE80211_BAND_5GHZ) {
2070 priv->staging39_rxon.flags &=
2071 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2072 | RXON_FLG_CCK_MSK);
2073 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2074 } else {
2075 /* Copied from iwl3945_bg_post_associate() */
2076 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2077 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2078 else
2079 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2080
2081 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2082 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2083
2084 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2085 priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2086 priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
2087 }
2088 }
2089
2090 /*
2091 * initialize rxon structure with default values from eeprom
2092 */
2093 static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
2094 int mode)
2095 {
2096 const struct iwl_channel_info *ch_info;
2097
2098 memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
2099
2100 switch (mode) {
2101 case NL80211_IFTYPE_AP:
2102 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
2103 break;
2104
2105 case NL80211_IFTYPE_STATION:
2106 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
2107 priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2108 break;
2109
2110 case NL80211_IFTYPE_ADHOC:
2111 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2112 priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2113 priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2114 RXON_FILTER_ACCEPT_GRP_MSK;
2115 break;
2116
2117 case NL80211_IFTYPE_MONITOR:
2118 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2119 priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2120 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2121 break;
2122 default:
2123 IWL_ERROR("Unsupported interface type %d\n", mode);
2124 break;
2125 }
2126
2127 #if 0
2128 /* TODO: Figure out when short_preamble would be set and cache from
2129 * that */
2130 if (!hw_to_local(priv->hw)->short_preamble)
2131 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2132 else
2133 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2134 #endif
2135
2136 ch_info = iwl3945_get_channel_info(priv, priv->band,
2137 le16_to_cpu(priv->active39_rxon.channel));
2138
2139 if (!ch_info)
2140 ch_info = &priv->channel_info[0];
2141
2142 /*
2143 * in some case A channels are all non IBSS
2144 * in this case force B/G channel
2145 */
2146 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
2147 ch_info = &priv->channel_info[0];
2148
2149 priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
2150 if (is_channel_a_band(ch_info))
2151 priv->band = IEEE80211_BAND_5GHZ;
2152 else
2153 priv->band = IEEE80211_BAND_2GHZ;
2154
2155 iwl3945_set_flags_for_phymode(priv, priv->band);
2156
2157 priv->staging39_rxon.ofdm_basic_rates =
2158 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2159 priv->staging39_rxon.cck_basic_rates =
2160 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2161 }
2162
2163 static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
2164 {
2165 if (mode == NL80211_IFTYPE_ADHOC) {
2166 const struct iwl_channel_info *ch_info;
2167
2168 ch_info = iwl3945_get_channel_info(priv,
2169 priv->band,
2170 le16_to_cpu(priv->staging39_rxon.channel));
2171
2172 if (!ch_info || !is_channel_ibss(ch_info)) {
2173 IWL_ERROR("channel %d not IBSS channel\n",
2174 le16_to_cpu(priv->staging39_rxon.channel));
2175 return -EINVAL;
2176 }
2177 }
2178
2179 iwl3945_connection_init_rx_config(priv, mode);
2180 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2181
2182 iwl3945_clear_stations_table(priv);
2183
2184 /* don't commit rxon if rf-kill is on*/
2185 if (!iwl3945_is_ready_rf(priv))
2186 return -EAGAIN;
2187
2188 cancel_delayed_work(&priv->scan_check);
2189 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2190 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2191 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2192 return -EAGAIN;
2193 }
2194
2195 iwl3945_commit_rxon(priv);
2196
2197 return 0;
2198 }
2199
2200 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
2201 struct ieee80211_tx_info *info,
2202 struct iwl3945_cmd *cmd,
2203 struct sk_buff *skb_frag,
2204 int last_frag)
2205 {
2206 struct iwl3945_hw_key *keyinfo =
2207 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
2208
2209 switch (keyinfo->alg) {
2210 case ALG_CCMP:
2211 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2212 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2213 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2214 break;
2215
2216 case ALG_TKIP:
2217 #if 0
2218 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2219
2220 if (last_frag)
2221 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2222 8);
2223 else
2224 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2225 #endif
2226 break;
2227
2228 case ALG_WEP:
2229 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2230 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2231
2232 if (keyinfo->keylen == 13)
2233 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2234
2235 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2236
2237 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2238 "with key %d\n", info->control.hw_key->hw_key_idx);
2239 break;
2240
2241 default:
2242 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
2243 break;
2244 }
2245 }
2246
2247 /*
2248 * handle build REPLY_TX command notification.
2249 */
2250 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
2251 struct iwl3945_cmd *cmd,
2252 struct ieee80211_tx_info *info,
2253 struct ieee80211_hdr *hdr,
2254 int is_unicast, u8 std_id)
2255 {
2256 __le16 fc = hdr->frame_control;
2257 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2258 u8 rc_flags = info->control.rates[0].flags;
2259
2260 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2261 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2262 tx_flags |= TX_CMD_FLG_ACK_MSK;
2263 if (ieee80211_is_mgmt(fc))
2264 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2265 if (ieee80211_is_probe_resp(fc) &&
2266 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2267 tx_flags |= TX_CMD_FLG_TSF_MSK;
2268 } else {
2269 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2270 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2271 }
2272
2273 cmd->cmd.tx.sta_id = std_id;
2274 if (ieee80211_has_morefrags(fc))
2275 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2276
2277 if (ieee80211_is_data_qos(fc)) {
2278 u8 *qc = ieee80211_get_qos_ctl(hdr);
2279 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2280 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2281 } else {
2282 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2283 }
2284
2285 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2286 tx_flags |= TX_CMD_FLG_RTS_MSK;
2287 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2288 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2289 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2290 tx_flags |= TX_CMD_FLG_CTS_MSK;
2291 }
2292
2293 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2294 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2295
2296 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2297 if (ieee80211_is_mgmt(fc)) {
2298 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2299 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2300 else
2301 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2302 } else {
2303 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2304 #ifdef CONFIG_IWL3945_LEDS
2305 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2306 #endif
2307 }
2308
2309 cmd->cmd.tx.driver_txop = 0;
2310 cmd->cmd.tx.tx_flags = tx_flags;
2311 cmd->cmd.tx.next_frame_len = 0;
2312 }
2313
2314 /**
2315 * iwl3945_get_sta_id - Find station's index within station table
2316 */
2317 static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2318 {
2319 int sta_id;
2320 u16 fc = le16_to_cpu(hdr->frame_control);
2321
2322 /* If this frame is broadcast or management, use broadcast station id */
2323 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2324 is_multicast_ether_addr(hdr->addr1))
2325 return priv->hw_params.bcast_sta_id;
2326
2327 switch (priv->iw_mode) {
2328
2329 /* If we are a client station in a BSS network, use the special
2330 * AP station entry (that's the only station we communicate with) */
2331 case NL80211_IFTYPE_STATION:
2332 return IWL_AP_ID;
2333
2334 /* If we are an AP, then find the station, or use BCAST */
2335 case NL80211_IFTYPE_AP:
2336 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2337 if (sta_id != IWL_INVALID_STATION)
2338 return sta_id;
2339 return priv->hw_params.bcast_sta_id;
2340
2341 /* If this frame is going out to an IBSS network, find the station,
2342 * or create a new station table entry */
2343 case NL80211_IFTYPE_ADHOC: {
2344 /* Create new station table entry */
2345 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2346 if (sta_id != IWL_INVALID_STATION)
2347 return sta_id;
2348
2349 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2350
2351 if (sta_id != IWL_INVALID_STATION)
2352 return sta_id;
2353
2354 IWL_DEBUG_DROP("Station %pM not in station map. "
2355 "Defaulting to broadcast...\n",
2356 hdr->addr1);
2357 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2358 return priv->hw_params.bcast_sta_id;
2359 }
2360 /* If we are in monitor mode, use BCAST. This is required for
2361 * packet injection. */
2362 case NL80211_IFTYPE_MONITOR:
2363 return priv->hw_params.bcast_sta_id;
2364
2365 default:
2366 IWL_WARNING("Unknown mode of operation: %d\n", priv->iw_mode);
2367 return priv->hw_params.bcast_sta_id;
2368 }
2369 }
2370
2371 /*
2372 * start REPLY_TX command process
2373 */
2374 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
2375 {
2376 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2377 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2378 struct iwl3945_tfd_frame *tfd;
2379 u32 *control_flags;
2380 int txq_id = skb_get_queue_mapping(skb);
2381 struct iwl3945_tx_queue *txq = NULL;
2382 struct iwl_queue *q = NULL;
2383 dma_addr_t phys_addr;
2384 dma_addr_t txcmd_phys;
2385 struct iwl3945_cmd *out_cmd = NULL;
2386 u16 len, idx, len_org, hdr_len;
2387 u8 id;
2388 u8 unicast;
2389 u8 sta_id;
2390 u8 tid = 0;
2391 u16 seq_number = 0;
2392 __le16 fc;
2393 u8 wait_write_ptr = 0;
2394 u8 *qc = NULL;
2395 unsigned long flags;
2396 int rc;
2397
2398 spin_lock_irqsave(&priv->lock, flags);
2399 if (iwl3945_is_rfkill(priv)) {
2400 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2401 goto drop_unlock;
2402 }
2403
2404 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2405 IWL_ERROR("ERROR: No TX rate available.\n");
2406 goto drop_unlock;
2407 }
2408
2409 unicast = !is_multicast_ether_addr(hdr->addr1);
2410 id = 0;
2411
2412 fc = hdr->frame_control;
2413
2414 #ifdef CONFIG_IWL3945_DEBUG
2415 if (ieee80211_is_auth(fc))
2416 IWL_DEBUG_TX("Sending AUTH frame\n");
2417 else if (ieee80211_is_assoc_req(fc))
2418 IWL_DEBUG_TX("Sending ASSOC frame\n");
2419 else if (ieee80211_is_reassoc_req(fc))
2420 IWL_DEBUG_TX("Sending REASSOC frame\n");
2421 #endif
2422
2423 /* drop all data frame if we are not associated */
2424 if (ieee80211_is_data(fc) &&
2425 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2426 (!iwl3945_is_associated(priv) ||
2427 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2428 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2429 goto drop_unlock;
2430 }
2431
2432 spin_unlock_irqrestore(&priv->lock, flags);
2433
2434 hdr_len = ieee80211_hdrlen(fc);
2435
2436 /* Find (or create) index into station table for destination station */
2437 sta_id = iwl3945_get_sta_id(priv, hdr);
2438 if (sta_id == IWL_INVALID_STATION) {
2439 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2440 hdr->addr1);
2441 goto drop;
2442 }
2443
2444 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2445
2446 if (ieee80211_is_data_qos(fc)) {
2447 qc = ieee80211_get_qos_ctl(hdr);
2448 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2449 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
2450 IEEE80211_SCTL_SEQ;
2451 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2452 (hdr->seq_ctrl &
2453 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2454 seq_number += 0x10;
2455 }
2456
2457 /* Descriptor for chosen Tx queue */
2458 txq = &priv->txq39[txq_id];
2459 q = &txq->q;
2460
2461 spin_lock_irqsave(&priv->lock, flags);
2462
2463 /* Set up first empty TFD within this queue's circular TFD buffer */
2464 tfd = &txq->bd[q->write_ptr];
2465 memset(tfd, 0, sizeof(*tfd));
2466 control_flags = (u32 *) tfd;
2467 idx = get_cmd_index(q, q->write_ptr, 0);
2468
2469 /* Set up driver data for this TFD */
2470 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2471 txq->txb[q->write_ptr].skb[0] = skb;
2472
2473 /* Init first empty entry in queue's array of Tx/cmd buffers */
2474 out_cmd = &txq->cmd[idx];
2475 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2476 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2477
2478 /*
2479 * Set up the Tx-command (not MAC!) header.
2480 * Store the chosen Tx queue and TFD index within the sequence field;
2481 * after Tx, uCode's Tx response will return this value so driver can
2482 * locate the frame within the tx queue and do post-tx processing.
2483 */
2484 out_cmd->hdr.cmd = REPLY_TX;
2485 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2486 INDEX_TO_SEQ(q->write_ptr)));
2487
2488 /* Copy MAC header from skb into command buffer */
2489 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2490
2491 /*
2492 * Use the first empty entry in this queue's command buffer array
2493 * to contain the Tx command and MAC header concatenated together
2494 * (payload data will be in another buffer).
2495 * Size of this varies, due to varying MAC header length.
2496 * If end is not dword aligned, we'll have 2 extra bytes at the end
2497 * of the MAC header (device reads on dword boundaries).
2498 * We'll tell device about this padding later.
2499 */
2500 len = sizeof(struct iwl3945_tx_cmd) +
2501 sizeof(struct iwl_cmd_header) + hdr_len;
2502
2503 len_org = len;
2504 len = (len + 3) & ~3;
2505
2506 if (len_org != len)
2507 len_org = 1;
2508 else
2509 len_org = 0;
2510
2511 /* Physical address of this Tx command's header (not MAC header!),
2512 * within command buffer array. */
2513 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2514 offsetof(struct iwl3945_cmd, hdr);
2515
2516 /* Add buffer containing Tx command and MAC(!) header to TFD's
2517 * first entry */
2518 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2519
2520 if (info->control.hw_key)
2521 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2522
2523 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2524 * if any (802.11 null frames have no payload). */
2525 len = skb->len - hdr_len;
2526 if (len) {
2527 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2528 len, PCI_DMA_TODEVICE);
2529 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2530 }
2531
2532 if (!len)
2533 /* If there is no payload, then we use only one Tx buffer */
2534 *control_flags = TFD_CTL_COUNT_SET(1);
2535 else
2536 /* Else use 2 buffers.
2537 * Tell 3945 about any padding after MAC header */
2538 *control_flags = TFD_CTL_COUNT_SET(2) |
2539 TFD_CTL_PAD_SET(U32_PAD(len));
2540
2541 /* Total # bytes to be transmitted */
2542 len = (u16)skb->len;
2543 out_cmd->cmd.tx.len = cpu_to_le16(len);
2544
2545 /* TODO need this for burst mode later on */
2546 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2547
2548 /* set is_hcca to 0; it probably will never be implemented */
2549 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2550
2551 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2552 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2553
2554 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2555 txq->need_update = 1;
2556 if (qc)
2557 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
2558 } else {
2559 wait_write_ptr = 1;
2560 txq->need_update = 0;
2561 }
2562
2563 iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload,
2564 sizeof(out_cmd->cmd.tx));
2565
2566 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2567 ieee80211_hdrlen(fc));
2568
2569 /* Tell device the write index *just past* this latest filled TFD */
2570 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2571 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2572 spin_unlock_irqrestore(&priv->lock, flags);
2573
2574 if (rc)
2575 return rc;
2576
2577 if ((iwl_queue_space(q) < q->high_mark)
2578 && priv->mac80211_registered) {
2579 if (wait_write_ptr) {
2580 spin_lock_irqsave(&priv->lock, flags);
2581 txq->need_update = 1;
2582 iwl3945_tx_queue_update_write_ptr(priv, txq);
2583 spin_unlock_irqrestore(&priv->lock, flags);
2584 }
2585
2586 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2587 }
2588
2589 return 0;
2590
2591 drop_unlock:
2592 spin_unlock_irqrestore(&priv->lock, flags);
2593 drop:
2594 return -1;
2595 }
2596
2597 static void iwl3945_set_rate(struct iwl_priv *priv)
2598 {
2599 const struct ieee80211_supported_band *sband = NULL;
2600 struct ieee80211_rate *rate;
2601 int i;
2602
2603 sband = iwl3945_get_band(priv, priv->band);
2604 if (!sband) {
2605 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2606 return;
2607 }
2608
2609 priv->active_rate = 0;
2610 priv->active_rate_basic = 0;
2611
2612 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2613 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2614
2615 for (i = 0; i < sband->n_bitrates; i++) {
2616 rate = &sband->bitrates[i];
2617 if ((rate->hw_value < IWL_RATE_COUNT) &&
2618 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2619 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2620 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2621 priv->active_rate |= (1 << rate->hw_value);
2622 }
2623 }
2624
2625 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2626 priv->active_rate, priv->active_rate_basic);
2627
2628 /*
2629 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2630 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2631 * OFDM
2632 */
2633 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2634 priv->staging39_rxon.cck_basic_rates =
2635 ((priv->active_rate_basic &
2636 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2637 else
2638 priv->staging39_rxon.cck_basic_rates =
2639 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2640
2641 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2642 priv->staging39_rxon.ofdm_basic_rates =
2643 ((priv->active_rate_basic &
2644 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2645 IWL_FIRST_OFDM_RATE) & 0xFF;
2646 else
2647 priv->staging39_rxon.ofdm_basic_rates =
2648 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2649 }
2650
2651 static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2652 {
2653 unsigned long flags;
2654
2655 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2656 return;
2657
2658 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2659 disable_radio ? "OFF" : "ON");
2660
2661 if (disable_radio) {
2662 iwl3945_scan_cancel(priv);
2663 /* FIXME: This is a workaround for AP */
2664 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2665 spin_lock_irqsave(&priv->lock, flags);
2666 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2667 CSR_UCODE_SW_BIT_RFKILL);
2668 spin_unlock_irqrestore(&priv->lock, flags);
2669 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2670 set_bit(STATUS_RF_KILL_SW, &priv->status);
2671 }
2672 return;
2673 }
2674
2675 spin_lock_irqsave(&priv->lock, flags);
2676 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2677
2678 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2679 spin_unlock_irqrestore(&priv->lock, flags);
2680
2681 /* wake up ucode */
2682 msleep(10);
2683
2684 spin_lock_irqsave(&priv->lock, flags);
2685 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2686 if (!iwl_grab_nic_access(priv))
2687 iwl_release_nic_access(priv);
2688 spin_unlock_irqrestore(&priv->lock, flags);
2689
2690 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2691 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2692 "disabled by HW switch\n");
2693 return;
2694 }
2695
2696 if (priv->is_open)
2697 queue_work(priv->workqueue, &priv->restart);
2698 return;
2699 }
2700
2701 void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
2702 u32 decrypt_res, struct ieee80211_rx_status *stats)
2703 {
2704 u16 fc =
2705 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2706
2707 if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2708 return;
2709
2710 if (!(fc & IEEE80211_FCTL_PROTECTED))
2711 return;
2712
2713 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2714 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2715 case RX_RES_STATUS_SEC_TYPE_TKIP:
2716 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2717 RX_RES_STATUS_BAD_ICV_MIC)
2718 stats->flag |= RX_FLAG_MMIC_ERROR;
2719 case RX_RES_STATUS_SEC_TYPE_WEP:
2720 case RX_RES_STATUS_SEC_TYPE_CCMP:
2721 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2722 RX_RES_STATUS_DECRYPT_OK) {
2723 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2724 stats->flag |= RX_FLAG_DECRYPTED;
2725 }
2726 break;
2727
2728 default:
2729 break;
2730 }
2731 }
2732
2733 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2734
2735 #include "iwl-spectrum.h"
2736
2737 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2738 #define BEACON_TIME_MASK_HIGH 0xFF000000
2739 #define TIME_UNIT 1024
2740
2741 /*
2742 * extended beacon time format
2743 * time in usec will be changed into a 32-bit value in 8:24 format
2744 * the high 1 byte is the beacon counts
2745 * the lower 3 bytes is the time in usec within one beacon interval
2746 */
2747
2748 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2749 {
2750 u32 quot;
2751 u32 rem;
2752 u32 interval = beacon_interval * 1024;
2753
2754 if (!interval || !usec)
2755 return 0;
2756
2757 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2758 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2759
2760 return (quot << 24) + rem;
2761 }
2762
2763 /* base is usually what we get from ucode with each received frame,
2764 * the same as HW timer counter counting down
2765 */
2766
2767 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2768 {
2769 u32 base_low = base & BEACON_TIME_MASK_LOW;
2770 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2771 u32 interval = beacon_interval * TIME_UNIT;
2772 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2773 (addon & BEACON_TIME_MASK_HIGH);
2774
2775 if (base_low > addon_low)
2776 res += base_low - addon_low;
2777 else if (base_low < addon_low) {
2778 res += interval + base_low - addon_low;
2779 res += (1 << 24);
2780 } else
2781 res += (1 << 24);
2782
2783 return cpu_to_le32(res);
2784 }
2785
2786 static int iwl3945_get_measurement(struct iwl_priv *priv,
2787 struct ieee80211_measurement_params *params,
2788 u8 type)
2789 {
2790 struct iwl_spectrum_cmd spectrum;
2791 struct iwl_rx_packet *res;
2792 struct iwl3945_host_cmd cmd = {
2793 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2794 .data = (void *)&spectrum,
2795 .meta.flags = CMD_WANT_SKB,
2796 };
2797 u32 add_time = le64_to_cpu(params->start_time);
2798 int rc;
2799 int spectrum_resp_status;
2800 int duration = le16_to_cpu(params->duration);
2801
2802 if (iwl3945_is_associated(priv))
2803 add_time =
2804 iwl3945_usecs_to_beacons(
2805 le64_to_cpu(params->start_time) - priv->last_tsf,
2806 le16_to_cpu(priv->rxon_timing.beacon_interval));
2807
2808 memset(&spectrum, 0, sizeof(spectrum));
2809
2810 spectrum.channel_count = cpu_to_le16(1);
2811 spectrum.flags =
2812 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2813 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2814 cmd.len = sizeof(spectrum);
2815 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2816
2817 if (iwl3945_is_associated(priv))
2818 spectrum.start_time =
2819 iwl3945_add_beacon_time(priv->last_beacon_time,
2820 add_time,
2821 le16_to_cpu(priv->rxon_timing.beacon_interval));
2822 else
2823 spectrum.start_time = 0;
2824
2825 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2826 spectrum.channels[0].channel = params->channel;
2827 spectrum.channels[0].type = type;
2828 if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
2829 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2830 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2831
2832 rc = iwl3945_send_cmd_sync(priv, &cmd);
2833 if (rc)
2834 return rc;
2835
2836 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2837 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2838 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2839 rc = -EIO;
2840 }
2841
2842 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2843 switch (spectrum_resp_status) {
2844 case 0: /* Command will be handled */
2845 if (res->u.spectrum.id != 0xff) {
2846 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2847 res->u.spectrum.id);
2848 priv->measurement_status &= ~MEASUREMENT_READY;
2849 }
2850 priv->measurement_status |= MEASUREMENT_ACTIVE;
2851 rc = 0;
2852 break;
2853
2854 case 1: /* Command will not be handled */
2855 rc = -EAGAIN;
2856 break;
2857 }
2858
2859 dev_kfree_skb_any(cmd.meta.u.skb);
2860
2861 return rc;
2862 }
2863 #endif
2864
2865 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
2866 struct iwl_rx_mem_buffer *rxb)
2867 {
2868 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2869 struct iwl_alive_resp *palive;
2870 struct delayed_work *pwork;
2871
2872 palive = &pkt->u.alive_frame;
2873
2874 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2875 "0x%01X 0x%01X\n",
2876 palive->is_valid, palive->ver_type,
2877 palive->ver_subtype);
2878
2879 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2880 IWL_DEBUG_INFO("Initialization Alive received.\n");
2881 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2882 sizeof(struct iwl_alive_resp));
2883 pwork = &priv->init_alive_start;
2884 } else {
2885 IWL_DEBUG_INFO("Runtime Alive received.\n");
2886 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2887 sizeof(struct iwl_alive_resp));
2888 pwork = &priv->alive_start;
2889 iwl3945_disable_events(priv);
2890 }
2891
2892 /* We delay the ALIVE response by 5ms to
2893 * give the HW RF Kill time to activate... */
2894 if (palive->is_valid == UCODE_VALID_OK)
2895 queue_delayed_work(priv->workqueue, pwork,
2896 msecs_to_jiffies(5));
2897 else
2898 IWL_WARNING("uCode did not respond OK.\n");
2899 }
2900
2901 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
2902 struct iwl_rx_mem_buffer *rxb)
2903 {
2904 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2905
2906 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2907 return;
2908 }
2909
2910 static void iwl3945_rx_reply_error(struct iwl_priv *priv,
2911 struct iwl_rx_mem_buffer *rxb)
2912 {
2913 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2914
2915 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
2916 "seq 0x%04X ser 0x%08X\n",
2917 le32_to_cpu(pkt->u.err_resp.error_type),
2918 get_cmd_string(pkt->u.err_resp.cmd_id),
2919 pkt->u.err_resp.cmd_id,
2920 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2921 le32_to_cpu(pkt->u.err_resp.error_info));
2922 }
2923
2924 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2925
2926 static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
2927 {
2928 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2929 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
2930 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
2931 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2932 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2933 rxon->channel = csa->channel;
2934 priv->staging39_rxon.channel = csa->channel;
2935 }
2936
2937 static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
2938 struct iwl_rx_mem_buffer *rxb)
2939 {
2940 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2941 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2942 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
2943
2944 if (!report->state) {
2945 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2946 "Spectrum Measure Notification: Start\n");
2947 return;
2948 }
2949
2950 memcpy(&priv->measure_report, report, sizeof(*report));
2951 priv->measurement_status |= MEASUREMENT_READY;
2952 #endif
2953 }
2954
2955 static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
2956 struct iwl_rx_mem_buffer *rxb)
2957 {
2958 #ifdef CONFIG_IWL3945_DEBUG
2959 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2960 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2961 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2962 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2963 #endif
2964 }
2965
2966 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2967 struct iwl_rx_mem_buffer *rxb)
2968 {
2969 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2970 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2971 "notification for %s:\n",
2972 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2973 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
2974 le32_to_cpu(pkt->len));
2975 }
2976
2977 static void iwl3945_bg_beacon_update(struct work_struct *work)
2978 {
2979 struct iwl_priv *priv =
2980 container_of(work, struct iwl_priv, beacon_update);
2981 struct sk_buff *beacon;
2982
2983 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
2984 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
2985
2986 if (!beacon) {
2987 IWL_ERROR("update beacon failed\n");
2988 return;
2989 }
2990
2991 mutex_lock(&priv->mutex);
2992 /* new beacon skb is allocated every time; dispose previous.*/
2993 if (priv->ibss_beacon)
2994 dev_kfree_skb(priv->ibss_beacon);
2995
2996 priv->ibss_beacon = beacon;
2997 mutex_unlock(&priv->mutex);
2998
2999 iwl3945_send_beacon_cmd(priv);
3000 }
3001
3002 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
3003 struct iwl_rx_mem_buffer *rxb)
3004 {
3005 #ifdef CONFIG_IWL3945_DEBUG
3006 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3007 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3008 u8 rate = beacon->beacon_notify_hdr.rate;
3009
3010 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3011 "tsf %d %d rate %d\n",
3012 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3013 beacon->beacon_notify_hdr.failure_frame,
3014 le32_to_cpu(beacon->ibss_mgr_status),
3015 le32_to_cpu(beacon->high_tsf),
3016 le32_to_cpu(beacon->low_tsf), rate);
3017 #endif
3018
3019 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
3020 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3021 queue_work(priv->workqueue, &priv->beacon_update);
3022 }
3023
3024 /* Service response to REPLY_SCAN_CMD (0x80) */
3025 static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
3026 struct iwl_rx_mem_buffer *rxb)
3027 {
3028 #ifdef CONFIG_IWL3945_DEBUG
3029 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3030 struct iwl_scanreq_notification *notif =
3031 (struct iwl_scanreq_notification *)pkt->u.raw;
3032
3033 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3034 #endif
3035 }
3036
3037 /* Service SCAN_START_NOTIFICATION (0x82) */
3038 static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
3039 struct iwl_rx_mem_buffer *rxb)
3040 {
3041 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3042 struct iwl_scanstart_notification *notif =
3043 (struct iwl_scanstart_notification *)pkt->u.raw;
3044 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3045 IWL_DEBUG_SCAN("Scan start: "
3046 "%d [802.11%s] "
3047 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3048 notif->channel,
3049 notif->band ? "bg" : "a",
3050 notif->tsf_high,
3051 notif->tsf_low, notif->status, notif->beacon_timer);
3052 }
3053
3054 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3055 static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
3056 struct iwl_rx_mem_buffer *rxb)
3057 {
3058 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3059 struct iwl_scanresults_notification *notif =
3060 (struct iwl_scanresults_notification *)pkt->u.raw;
3061
3062 IWL_DEBUG_SCAN("Scan ch.res: "
3063 "%d [802.11%s] "
3064 "(TSF: 0x%08X:%08X) - %d "
3065 "elapsed=%lu usec (%dms since last)\n",
3066 notif->channel,
3067 notif->band ? "bg" : "a",
3068 le32_to_cpu(notif->tsf_high),
3069 le32_to_cpu(notif->tsf_low),
3070 le32_to_cpu(notif->statistics[0]),
3071 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3072 jiffies_to_msecs(elapsed_jiffies
3073 (priv->last_scan_jiffies, jiffies)));
3074
3075 priv->last_scan_jiffies = jiffies;
3076 priv->next_scan_jiffies = 0;
3077 }
3078
3079 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3080 static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
3081 struct iwl_rx_mem_buffer *rxb)
3082 {
3083 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3084 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3085
3086 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3087 scan_notif->scanned_channels,
3088 scan_notif->tsf_low,
3089 scan_notif->tsf_high, scan_notif->status);
3090
3091 /* The HW is no longer scanning */
3092 clear_bit(STATUS_SCAN_HW, &priv->status);
3093
3094 /* The scan completion notification came in, so kill that timer... */
3095 cancel_delayed_work(&priv->scan_check);
3096
3097 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3098 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3099 "2.4" : "5.2",
3100 jiffies_to_msecs(elapsed_jiffies
3101 (priv->scan_pass_start, jiffies)));
3102
3103 /* Remove this scanned band from the list of pending
3104 * bands to scan, band G precedes A in order of scanning
3105 * as seen in iwl3945_bg_request_scan */
3106 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3107 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3108 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3109 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
3110
3111 /* If a request to abort was given, or the scan did not succeed
3112 * then we reset the scan state machine and terminate,
3113 * re-queuing another scan if one has been requested */
3114 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3115 IWL_DEBUG_INFO("Aborted scan completed.\n");
3116 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3117 } else {
3118 /* If there are more bands on this scan pass reschedule */
3119 if (priv->scan_bands > 0)
3120 goto reschedule;
3121 }
3122
3123 priv->last_scan_jiffies = jiffies;
3124 priv->next_scan_jiffies = 0;
3125 IWL_DEBUG_INFO("Setting scan to off\n");
3126
3127 clear_bit(STATUS_SCANNING, &priv->status);
3128
3129 IWL_DEBUG_INFO("Scan took %dms\n",
3130 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3131
3132 queue_work(priv->workqueue, &priv->scan_completed);
3133
3134 return;
3135
3136 reschedule:
3137 priv->scan_pass_start = jiffies;
3138 queue_work(priv->workqueue, &priv->request_scan);
3139 }
3140
3141 /* Handle notification from uCode that card's power state is changing
3142 * due to software, hardware, or critical temperature RFKILL */
3143 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
3144 struct iwl_rx_mem_buffer *rxb)
3145 {
3146 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3147 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3148 unsigned long status = priv->status;
3149
3150 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3151 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3152 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3153
3154 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
3155 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3156
3157 if (flags & HW_CARD_DISABLED)
3158 set_bit(STATUS_RF_KILL_HW, &priv->status);
3159 else
3160 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3161
3162
3163 if (flags & SW_CARD_DISABLED)
3164 set_bit(STATUS_RF_KILL_SW, &priv->status);
3165 else
3166 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3167
3168 iwl3945_scan_cancel(priv);
3169
3170 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3171 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3172 (test_bit(STATUS_RF_KILL_SW, &status) !=
3173 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3174 queue_work(priv->workqueue, &priv->rf_kill);
3175 else
3176 wake_up_interruptible(&priv->wait_command_queue);
3177 }
3178
3179 /**
3180 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3181 *
3182 * Setup the RX handlers for each of the reply types sent from the uCode
3183 * to the host.
3184 *
3185 * This function chains into the hardware specific files for them to setup
3186 * any hardware specific handlers as well.
3187 */
3188 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
3189 {
3190 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3191 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3192 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3193 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3194 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3195 iwl3945_rx_spectrum_measure_notif;
3196 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3197 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3198 iwl3945_rx_pm_debug_statistics_notif;
3199 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3200
3201 /*
3202 * The same handler is used for both the REPLY to a discrete
3203 * statistics request from the host as well as for the periodic
3204 * statistics notifications (after received beacons) from the uCode.
3205 */
3206 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3207 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3208
3209 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3210 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3211 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3212 iwl3945_rx_scan_results_notif;
3213 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3214 iwl3945_rx_scan_complete_notif;
3215 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3216
3217 /* Set up hardware specific Rx handlers */
3218 iwl3945_hw_rx_handler_setup(priv);
3219 }
3220
3221 /**
3222 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3223 * When FW advances 'R' index, all entries between old and new 'R' index
3224 * need to be reclaimed.
3225 */
3226 static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
3227 int txq_id, int index)
3228 {
3229 struct iwl3945_tx_queue *txq = &priv->txq39[txq_id];
3230 struct iwl_queue *q = &txq->q;
3231 int nfreed = 0;
3232
3233 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3234 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3235 "is out of range [0-%d] %d %d.\n", txq_id,
3236 index, q->n_bd, q->write_ptr, q->read_ptr);
3237 return;
3238 }
3239
3240 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3241 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3242 if (nfreed > 1) {
3243 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3244 q->write_ptr, q->read_ptr);
3245 queue_work(priv->workqueue, &priv->restart);
3246 break;
3247 }
3248 nfreed++;
3249 }
3250 }
3251
3252
3253 /**
3254 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3255 * @rxb: Rx buffer to reclaim
3256 *
3257 * If an Rx buffer has an async callback associated with it the callback
3258 * will be executed. The attached skb (if present) will only be freed
3259 * if the callback returns 1
3260 */
3261 static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
3262 struct iwl_rx_mem_buffer *rxb)
3263 {
3264 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3265 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3266 int txq_id = SEQ_TO_QUEUE(sequence);
3267 int index = SEQ_TO_INDEX(sequence);
3268 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3269 int cmd_index;
3270 struct iwl3945_cmd *cmd;
3271
3272 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3273
3274 cmd_index = get_cmd_index(&priv->txq39[IWL_CMD_QUEUE_NUM].q, index, huge);
3275 cmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3276
3277 /* Input error checking is done when commands are added to queue. */
3278 if (cmd->meta.flags & CMD_WANT_SKB) {
3279 cmd->meta.source->u.skb = rxb->skb;
3280 rxb->skb = NULL;
3281 } else if (cmd->meta.u.callback &&
3282 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3283 rxb->skb = NULL;
3284
3285 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3286
3287 if (!(cmd->meta.flags & CMD_ASYNC)) {
3288 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3289 wake_up_interruptible(&priv->wait_command_queue);
3290 }
3291 }
3292
3293 /************************** RX-FUNCTIONS ****************************/
3294 /*
3295 * Rx theory of operation
3296 *
3297 * The host allocates 32 DMA target addresses and passes the host address
3298 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3299 * 0 to 31
3300 *
3301 * Rx Queue Indexes
3302 * The host/firmware share two index registers for managing the Rx buffers.
3303 *
3304 * The READ index maps to the first position that the firmware may be writing
3305 * to -- the driver can read up to (but not including) this position and get
3306 * good data.
3307 * The READ index is managed by the firmware once the card is enabled.
3308 *
3309 * The WRITE index maps to the last position the driver has read from -- the
3310 * position preceding WRITE is the last slot the firmware can place a packet.
3311 *
3312 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3313 * WRITE = READ.
3314 *
3315 * During initialization, the host sets up the READ queue position to the first
3316 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3317 *
3318 * When the firmware places a packet in a buffer, it will advance the READ index
3319 * and fire the RX interrupt. The driver can then query the READ index and
3320 * process as many packets as possible, moving the WRITE index forward as it
3321 * resets the Rx queue buffers with new memory.
3322 *
3323 * The management in the driver is as follows:
3324 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3325 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3326 * to replenish the iwl->rxq->rx_free.
3327 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3328 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3329 * 'processed' and 'read' driver indexes as well)
3330 * + A received packet is processed and handed to the kernel network stack,
3331 * detached from the iwl->rxq. The driver 'processed' index is updated.
3332 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3333 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3334 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3335 * were enough free buffers and RX_STALLED is set it is cleared.
3336 *
3337 *
3338 * Driver sequence:
3339 *
3340 * iwl3945_rx_queue_alloc() Allocates rx_free
3341 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3342 * iwl3945_rx_queue_restock
3343 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3344 * queue, updates firmware pointers, and updates
3345 * the WRITE index. If insufficient rx_free buffers
3346 * are available, schedules iwl3945_rx_replenish
3347 *
3348 * -- enable interrupts --
3349 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
3350 * READ INDEX, detaching the SKB from the pool.
3351 * Moves the packet buffer from queue to rx_used.
3352 * Calls iwl3945_rx_queue_restock to refill any empty
3353 * slots.
3354 * ...
3355 *
3356 */
3357
3358 /**
3359 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3360 */
3361 static int iwl3945_rx_queue_space(const struct iwl_rx_queue *q)
3362 {
3363 int s = q->read - q->write;
3364 if (s <= 0)
3365 s += RX_QUEUE_SIZE;
3366 /* keep some buffer to not confuse full and empty queue */
3367 s -= 2;
3368 if (s < 0)
3369 s = 0;
3370 return s;
3371 }
3372
3373 /**
3374 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3375 */
3376 int iwl3945_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
3377 {
3378 u32 reg = 0;
3379 int rc = 0;
3380 unsigned long flags;
3381
3382 spin_lock_irqsave(&q->lock, flags);
3383
3384 if (q->need_update == 0)
3385 goto exit_unlock;
3386
3387 /* If power-saving is in use, make sure device is awake */
3388 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3389 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3390
3391 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3392 iwl_set_bit(priv, CSR_GP_CNTRL,
3393 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3394 goto exit_unlock;
3395 }
3396
3397 rc = iwl_grab_nic_access(priv);
3398 if (rc)
3399 goto exit_unlock;
3400
3401 /* Device expects a multiple of 8 */
3402 iwl_write_direct32(priv, FH39_RSCSR_CHNL0_WPTR,
3403 q->write & ~0x7);
3404 iwl_release_nic_access(priv);
3405
3406 /* Else device is assumed to be awake */
3407 } else
3408 /* Device expects a multiple of 8 */
3409 iwl_write32(priv, FH39_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3410
3411
3412 q->need_update = 0;
3413
3414 exit_unlock:
3415 spin_unlock_irqrestore(&q->lock, flags);
3416 return rc;
3417 }
3418
3419 /**
3420 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3421 */
3422 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
3423 dma_addr_t dma_addr)
3424 {
3425 return cpu_to_le32((u32)dma_addr);
3426 }
3427
3428 /**
3429 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3430 *
3431 * If there are slots in the RX queue that need to be restocked,
3432 * and we have free pre-allocated buffers, fill the ranks as much
3433 * as we can, pulling from rx_free.
3434 *
3435 * This moves the 'write' index forward to catch up with 'processed', and
3436 * also updates the memory address in the firmware to reference the new
3437 * target buffer.
3438 */
3439 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
3440 {
3441 struct iwl_rx_queue *rxq = &priv->rxq;
3442 struct list_head *element;
3443 struct iwl_rx_mem_buffer *rxb;
3444 unsigned long flags;
3445 int write, rc;
3446
3447 spin_lock_irqsave(&rxq->lock, flags);
3448 write = rxq->write & ~0x7;
3449 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3450 /* Get next free Rx buffer, remove from free list */
3451 element = rxq->rx_free.next;
3452 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3453 list_del(element);
3454
3455 /* Point to Rx buffer via next RBD in circular buffer */
3456 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
3457 rxq->queue[rxq->write] = rxb;
3458 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3459 rxq->free_count--;
3460 }
3461 spin_unlock_irqrestore(&rxq->lock, flags);
3462 /* If the pre-allocated buffer pool is dropping low, schedule to
3463 * refill it */
3464 if (rxq->free_count <= RX_LOW_WATERMARK)
3465 queue_work(priv->workqueue, &priv->rx_replenish);
3466
3467
3468 /* If we've added more space for the firmware to place data, tell it.
3469 * Increment device's write pointer in multiples of 8. */
3470 if ((write != (rxq->write & ~0x7))
3471 || (abs(rxq->write - rxq->read) > 7)) {
3472 spin_lock_irqsave(&rxq->lock, flags);
3473 rxq->need_update = 1;
3474 spin_unlock_irqrestore(&rxq->lock, flags);
3475 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3476 if (rc)
3477 return rc;
3478 }
3479
3480 return 0;
3481 }
3482
3483 /**
3484 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3485 *
3486 * When moving to rx_free an SKB is allocated for the slot.
3487 *
3488 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3489 * This is called as a scheduled work item (except for during initialization)
3490 */
3491 static void iwl3945_rx_allocate(struct iwl_priv *priv)
3492 {
3493 struct iwl_rx_queue *rxq = &priv->rxq;
3494 struct list_head *element;
3495 struct iwl_rx_mem_buffer *rxb;
3496 unsigned long flags;
3497 spin_lock_irqsave(&rxq->lock, flags);
3498 while (!list_empty(&rxq->rx_used)) {
3499 element = rxq->rx_used.next;
3500 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3501
3502 /* Alloc a new receive buffer */
3503 rxb->skb =
3504 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3505 if (!rxb->skb) {
3506 if (net_ratelimit())
3507 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
3508 /* We don't reschedule replenish work here -- we will
3509 * call the restock method and if it still needs
3510 * more buffers it will schedule replenish */
3511 break;
3512 }
3513
3514 /* If radiotap head is required, reserve some headroom here.
3515 * The physical head count is a variable rx_stats->phy_count.
3516 * We reserve 4 bytes here. Plus these extra bytes, the
3517 * headroom of the physical head should be enough for the
3518 * radiotap head that iwl3945 supported. See iwl3945_rt.
3519 */
3520 skb_reserve(rxb->skb, 4);
3521
3522 priv->alloc_rxb_skb++;
3523 list_del(element);
3524
3525 /* Get physical address of RB/SKB */
3526 rxb->real_dma_addr =
3527 pci_map_single(priv->pci_dev, rxb->skb->data,
3528 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3529 list_add_tail(&rxb->list, &rxq->rx_free);
3530 rxq->free_count++;
3531 }
3532 spin_unlock_irqrestore(&rxq->lock, flags);
3533 }
3534
3535 /*
3536 * this should be called while priv->lock is locked
3537 */
3538 static void __iwl3945_rx_replenish(void *data)
3539 {
3540 struct iwl_priv *priv = data;
3541
3542 iwl3945_rx_allocate(priv);
3543 iwl3945_rx_queue_restock(priv);
3544 }
3545
3546
3547 void iwl3945_rx_replenish(void *data)
3548 {
3549 struct iwl_priv *priv = data;
3550 unsigned long flags;
3551
3552 iwl3945_rx_allocate(priv);
3553
3554 spin_lock_irqsave(&priv->lock, flags);
3555 iwl3945_rx_queue_restock(priv);
3556 spin_unlock_irqrestore(&priv->lock, flags);
3557 }
3558
3559 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3560 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3561 * This free routine walks the list of POOL entries and if SKB is set to
3562 * non NULL it is unmapped and freed
3563 */
3564 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3565 {
3566 int i;
3567 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3568 if (rxq->pool[i].skb != NULL) {
3569 pci_unmap_single(priv->pci_dev,
3570 rxq->pool[i].real_dma_addr,
3571 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3572 dev_kfree_skb(rxq->pool[i].skb);
3573 }
3574 }
3575
3576 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3577 rxq->dma_addr);
3578 rxq->bd = NULL;
3579 }
3580
3581 int iwl3945_rx_queue_alloc(struct iwl_priv *priv)
3582 {
3583 struct iwl_rx_queue *rxq = &priv->rxq;
3584 struct pci_dev *dev = priv->pci_dev;
3585 int i;
3586
3587 spin_lock_init(&rxq->lock);
3588 INIT_LIST_HEAD(&rxq->rx_free);
3589 INIT_LIST_HEAD(&rxq->rx_used);
3590
3591 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3592 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3593 if (!rxq->bd)
3594 return -ENOMEM;
3595
3596 /* Fill the rx_used queue with _all_ of the Rx buffers */
3597 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3598 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3599
3600 /* Set us so that we have processed and used all buffers, but have
3601 * not restocked the Rx queue with fresh buffers */
3602 rxq->read = rxq->write = 0;
3603 rxq->free_count = 0;
3604 rxq->need_update = 0;
3605 return 0;
3606 }
3607
3608 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3609 {
3610 unsigned long flags;
3611 int i;
3612 spin_lock_irqsave(&rxq->lock, flags);
3613 INIT_LIST_HEAD(&rxq->rx_free);
3614 INIT_LIST_HEAD(&rxq->rx_used);
3615 /* Fill the rx_used queue with _all_ of the Rx buffers */
3616 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3617 /* In the reset function, these buffers may have been allocated
3618 * to an SKB, so we need to unmap and free potential storage */
3619 if (rxq->pool[i].skb != NULL) {
3620 pci_unmap_single(priv->pci_dev,
3621 rxq->pool[i].real_dma_addr,
3622 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3623 priv->alloc_rxb_skb--;
3624 dev_kfree_skb(rxq->pool[i].skb);
3625 rxq->pool[i].skb = NULL;
3626 }
3627 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3628 }
3629
3630 /* Set us so that we have processed and used all buffers, but have
3631 * not restocked the Rx queue with fresh buffers */
3632 rxq->read = rxq->write = 0;
3633 rxq->free_count = 0;
3634 spin_unlock_irqrestore(&rxq->lock, flags);
3635 }
3636
3637 /* Convert linear signal-to-noise ratio into dB */
3638 static u8 ratio2dB[100] = {
3639 /* 0 1 2 3 4 5 6 7 8 9 */
3640 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3641 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3642 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3643 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3644 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3645 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3646 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3647 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3648 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3649 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3650 };
3651
3652 /* Calculates a relative dB value from a ratio of linear
3653 * (i.e. not dB) signal levels.
3654 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3655 int iwl3945_calc_db_from_ratio(int sig_ratio)
3656 {
3657 /* 1000:1 or higher just report as 60 dB */
3658 if (sig_ratio >= 1000)
3659 return 60;
3660
3661 /* 100:1 or higher, divide by 10 and use table,
3662 * add 20 dB to make up for divide by 10 */
3663 if (sig_ratio >= 100)
3664 return 20 + (int)ratio2dB[sig_ratio/10];
3665
3666 /* We shouldn't see this */
3667 if (sig_ratio < 1)
3668 return 0;
3669
3670 /* Use table for ratios 1:1 - 99:1 */
3671 return (int)ratio2dB[sig_ratio];
3672 }
3673
3674 #define PERFECT_RSSI (-20) /* dBm */
3675 #define WORST_RSSI (-95) /* dBm */
3676 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3677
3678 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3679 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3680 * about formulas used below. */
3681 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3682 {
3683 int sig_qual;
3684 int degradation = PERFECT_RSSI - rssi_dbm;
3685
3686 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3687 * as indicator; formula is (signal dbm - noise dbm).
3688 * SNR at or above 40 is a great signal (100%).
3689 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3690 * Weakest usable signal is usually 10 - 15 dB SNR. */
3691 if (noise_dbm) {
3692 if (rssi_dbm - noise_dbm >= 40)
3693 return 100;
3694 else if (rssi_dbm < noise_dbm)
3695 return 0;
3696 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3697
3698 /* Else use just the signal level.
3699 * This formula is a least squares fit of data points collected and
3700 * compared with a reference system that had a percentage (%) display
3701 * for signal quality. */
3702 } else
3703 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3704 (15 * RSSI_RANGE + 62 * degradation)) /
3705 (RSSI_RANGE * RSSI_RANGE);
3706
3707 if (sig_qual > 100)
3708 sig_qual = 100;
3709 else if (sig_qual < 1)
3710 sig_qual = 0;
3711
3712 return sig_qual;
3713 }
3714
3715 /**
3716 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3717 *
3718 * Uses the priv->rx_handlers callback function array to invoke
3719 * the appropriate handlers, including command responses,
3720 * frame-received notifications, and other notifications.
3721 */
3722 static void iwl3945_rx_handle(struct iwl_priv *priv)
3723 {
3724 struct iwl_rx_mem_buffer *rxb;
3725 struct iwl_rx_packet *pkt;
3726 struct iwl_rx_queue *rxq = &priv->rxq;
3727 u32 r, i;
3728 int reclaim;
3729 unsigned long flags;
3730 u8 fill_rx = 0;
3731 u32 count = 8;
3732
3733 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3734 * buffer that the driver may process (last buffer filled by ucode). */
3735 r = iwl3945_hw_get_rx_read(priv);
3736 i = rxq->read;
3737
3738 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3739 fill_rx = 1;
3740 /* Rx interrupt, but nothing sent from uCode */
3741 if (i == r)
3742 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3743
3744 while (i != r) {
3745 rxb = rxq->queue[i];
3746
3747 /* If an RXB doesn't have a Rx queue slot associated with it,
3748 * then a bug has been introduced in the queue refilling
3749 * routines -- catch it here */
3750 BUG_ON(rxb == NULL);
3751
3752 rxq->queue[i] = NULL;
3753
3754 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
3755 IWL_RX_BUF_SIZE,
3756 PCI_DMA_FROMDEVICE);
3757 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3758
3759 /* Reclaim a command buffer only if this packet is a response
3760 * to a (driver-originated) command.
3761 * If the packet (e.g. Rx frame) originated from uCode,
3762 * there is no command buffer to reclaim.
3763 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3764 * but apparently a few don't get set; catch them here. */
3765 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3766 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3767 (pkt->hdr.cmd != REPLY_TX);
3768
3769 /* Based on type of command response or notification,
3770 * handle those that need handling via function in
3771 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3772 if (priv->rx_handlers[pkt->hdr.cmd]) {
3773 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3774 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3775 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3776 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3777 } else {
3778 /* No handling needed */
3779 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3780 "r %d i %d No handler needed for %s, 0x%02x\n",
3781 r, i, get_cmd_string(pkt->hdr.cmd),
3782 pkt->hdr.cmd);
3783 }
3784
3785 if (reclaim) {
3786 /* Invoke any callbacks, transfer the skb to caller, and
3787 * fire off the (possibly) blocking iwl3945_send_cmd()
3788 * as we reclaim the driver command queue */
3789 if (rxb && rxb->skb)
3790 iwl3945_tx_cmd_complete(priv, rxb);
3791 else
3792 IWL_WARNING("Claim null rxb?\n");
3793 }
3794
3795 /* For now we just don't re-use anything. We can tweak this
3796 * later to try and re-use notification packets and SKBs that
3797 * fail to Rx correctly */
3798 if (rxb->skb != NULL) {
3799 priv->alloc_rxb_skb--;
3800 dev_kfree_skb_any(rxb->skb);
3801 rxb->skb = NULL;
3802 }
3803
3804 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
3805 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3806 spin_lock_irqsave(&rxq->lock, flags);
3807 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3808 spin_unlock_irqrestore(&rxq->lock, flags);
3809 i = (i + 1) & RX_QUEUE_MASK;
3810 /* If there are a lot of unused frames,
3811 * restock the Rx queue so ucode won't assert. */
3812 if (fill_rx) {
3813 count++;
3814 if (count >= 8) {
3815 priv->rxq.read = i;
3816 __iwl3945_rx_replenish(priv);
3817 count = 0;
3818 }
3819 }
3820 }
3821
3822 /* Backtrack one entry */
3823 priv->rxq.read = i;
3824 iwl3945_rx_queue_restock(priv);
3825 }
3826
3827 /**
3828 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3829 */
3830 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
3831 struct iwl3945_tx_queue *txq)
3832 {
3833 u32 reg = 0;
3834 int rc = 0;
3835 int txq_id = txq->q.id;
3836
3837 if (txq->need_update == 0)
3838 return rc;
3839
3840 /* if we're trying to save power */
3841 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3842 /* wake up nic if it's powered down ...
3843 * uCode will wake up, and interrupt us again, so next
3844 * time we'll skip this part. */
3845 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3846
3847 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3848 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3849 iwl_set_bit(priv, CSR_GP_CNTRL,
3850 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3851 return rc;
3852 }
3853
3854 /* restore this queue's parameters in nic hardware. */
3855 rc = iwl_grab_nic_access(priv);
3856 if (rc)
3857 return rc;
3858 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
3859 txq->q.write_ptr | (txq_id << 8));
3860 iwl_release_nic_access(priv);
3861
3862 /* else not in power-save mode, uCode will never sleep when we're
3863 * trying to tx (during RFKILL, we're not trying to tx). */
3864 } else
3865 iwl_write32(priv, HBUS_TARG_WRPTR,
3866 txq->q.write_ptr | (txq_id << 8));
3867
3868 txq->need_update = 0;
3869
3870 return rc;
3871 }
3872
3873 #ifdef CONFIG_IWL3945_DEBUG
3874 static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
3875 struct iwl3945_rxon_cmd *rxon)
3876 {
3877 IWL_DEBUG_RADIO("RX CONFIG:\n");
3878 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3879 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3880 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3881 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3882 le32_to_cpu(rxon->filter_flags));
3883 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3884 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3885 rxon->ofdm_basic_rates);
3886 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3887 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3888 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3889 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3890 }
3891 #endif
3892
3893 static void iwl3945_enable_interrupts(struct iwl_priv *priv)
3894 {
3895 IWL_DEBUG_ISR("Enabling interrupts\n");
3896 set_bit(STATUS_INT_ENABLED, &priv->status);
3897 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3898 }
3899
3900
3901 /* call this function to flush any scheduled tasklet */
3902 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3903 {
3904 /* wait to make sure we flush pending tasklet*/
3905 synchronize_irq(priv->pci_dev->irq);
3906 tasklet_kill(&priv->irq_tasklet);
3907 }
3908
3909
3910 static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
3911 {
3912 clear_bit(STATUS_INT_ENABLED, &priv->status);
3913
3914 /* disable interrupts from uCode/NIC to host */
3915 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
3916
3917 /* acknowledge/clear/reset any interrupts still pending
3918 * from uCode or flow handler (Rx/Tx DMA) */
3919 iwl_write32(priv, CSR_INT, 0xffffffff);
3920 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
3921 IWL_DEBUG_ISR("Disabled interrupts\n");
3922 }
3923
3924 static const char *desc_lookup(int i)
3925 {
3926 switch (i) {
3927 case 1:
3928 return "FAIL";
3929 case 2:
3930 return "BAD_PARAM";
3931 case 3:
3932 return "BAD_CHECKSUM";
3933 case 4:
3934 return "NMI_INTERRUPT";
3935 case 5:
3936 return "SYSASSERT";
3937 case 6:
3938 return "FATAL_ERROR";
3939 }
3940
3941 return "UNKNOWN";
3942 }
3943
3944 #define ERROR_START_OFFSET (1 * sizeof(u32))
3945 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
3946
3947 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
3948 {
3949 u32 i;
3950 u32 desc, time, count, base, data1;
3951 u32 blink1, blink2, ilink1, ilink2;
3952 int rc;
3953
3954 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3955
3956 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3957 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
3958 return;
3959 }
3960
3961 rc = iwl_grab_nic_access(priv);
3962 if (rc) {
3963 IWL_WARNING("Can not read from adapter at this time.\n");
3964 return;
3965 }
3966
3967 count = iwl_read_targ_mem(priv, base);
3968
3969 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3970 IWL_ERROR("Start IWL Error Log Dump:\n");
3971 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
3972 }
3973
3974 IWL_ERROR("Desc Time asrtPC blink2 "
3975 "ilink1 nmiPC Line\n");
3976 for (i = ERROR_START_OFFSET;
3977 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
3978 i += ERROR_ELEM_SIZE) {
3979 desc = iwl_read_targ_mem(priv, base + i);
3980 time =
3981 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
3982 blink1 =
3983 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
3984 blink2 =
3985 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
3986 ilink1 =
3987 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
3988 ilink2 =
3989 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
3990 data1 =
3991 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
3992
3993 IWL_ERROR
3994 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
3995 desc_lookup(desc), desc, time, blink1, blink2,
3996 ilink1, ilink2, data1);
3997 }
3998
3999 iwl_release_nic_access(priv);
4000
4001 }
4002
4003 #define EVENT_START_OFFSET (6 * sizeof(u32))
4004
4005 /**
4006 * iwl3945_print_event_log - Dump error event log to syslog
4007 *
4008 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
4009 */
4010 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
4011 u32 num_events, u32 mode)
4012 {
4013 u32 i;
4014 u32 base; /* SRAM byte address of event log header */
4015 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4016 u32 ptr; /* SRAM byte address of log data */
4017 u32 ev, time, data; /* event log data */
4018
4019 if (num_events == 0)
4020 return;
4021
4022 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4023
4024 if (mode == 0)
4025 event_size = 2 * sizeof(u32);
4026 else
4027 event_size = 3 * sizeof(u32);
4028
4029 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4030
4031 /* "time" is actually "data" for mode 0 (no timestamp).
4032 * place event id # at far right for easier visual parsing. */
4033 for (i = 0; i < num_events; i++) {
4034 ev = iwl_read_targ_mem(priv, ptr);
4035 ptr += sizeof(u32);
4036 time = iwl_read_targ_mem(priv, ptr);
4037 ptr += sizeof(u32);
4038 if (mode == 0)
4039 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4040 else {
4041 data = iwl_read_targ_mem(priv, ptr);
4042 ptr += sizeof(u32);
4043 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4044 }
4045 }
4046 }
4047
4048 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
4049 {
4050 int rc;
4051 u32 base; /* SRAM byte address of event log header */
4052 u32 capacity; /* event log capacity in # entries */
4053 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4054 u32 num_wraps; /* # times uCode wrapped to top of log */
4055 u32 next_entry; /* index of next entry to be written by uCode */
4056 u32 size; /* # entries that we'll print */
4057
4058 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4059 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4060 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4061 return;
4062 }
4063
4064 rc = iwl_grab_nic_access(priv);
4065 if (rc) {
4066 IWL_WARNING("Can not read from adapter at this time.\n");
4067 return;
4068 }
4069
4070 /* event log header */
4071 capacity = iwl_read_targ_mem(priv, base);
4072 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4073 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4074 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
4075
4076 size = num_wraps ? capacity : next_entry;
4077
4078 /* bail out if nothing in log */
4079 if (size == 0) {
4080 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4081 iwl_release_nic_access(priv);
4082 return;
4083 }
4084
4085 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4086 size, num_wraps);
4087
4088 /* if uCode has wrapped back to top of log, start at the oldest entry,
4089 * i.e the next one that uCode would fill. */
4090 if (num_wraps)
4091 iwl3945_print_event_log(priv, next_entry,
4092 capacity - next_entry, mode);
4093
4094 /* (then/else) start at top of log */
4095 iwl3945_print_event_log(priv, 0, next_entry, mode);
4096
4097 iwl_release_nic_access(priv);
4098 }
4099
4100 /**
4101 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4102 */
4103 static void iwl3945_irq_handle_error(struct iwl_priv *priv)
4104 {
4105 /* Set the FW error flag -- cleared on iwl3945_down */
4106 set_bit(STATUS_FW_ERROR, &priv->status);
4107
4108 /* Cancel currently queued command. */
4109 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4110
4111 #ifdef CONFIG_IWL3945_DEBUG
4112 if (priv->debug_level & IWL_DL_FW_ERRORS) {
4113 iwl3945_dump_nic_error_log(priv);
4114 iwl3945_dump_nic_event_log(priv);
4115 iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
4116 }
4117 #endif
4118
4119 wake_up_interruptible(&priv->wait_command_queue);
4120
4121 /* Keep the restart process from trying to send host
4122 * commands by clearing the INIT status bit */
4123 clear_bit(STATUS_READY, &priv->status);
4124
4125 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4126 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4127 "Restarting adapter due to uCode error.\n");
4128
4129 if (iwl3945_is_associated(priv)) {
4130 memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
4131 sizeof(priv->recovery39_rxon));
4132 priv->error_recovering = 1;
4133 }
4134 queue_work(priv->workqueue, &priv->restart);
4135 }
4136 }
4137
4138 static void iwl3945_error_recovery(struct iwl_priv *priv)
4139 {
4140 unsigned long flags;
4141
4142 memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
4143 sizeof(priv->staging39_rxon));
4144 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4145 iwl3945_commit_rxon(priv);
4146
4147 iwl3945_add_station(priv, priv->bssid, 1, 0);
4148
4149 spin_lock_irqsave(&priv->lock, flags);
4150 priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
4151 priv->error_recovering = 0;
4152 spin_unlock_irqrestore(&priv->lock, flags);
4153 }
4154
4155 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
4156 {
4157 u32 inta, handled = 0;
4158 u32 inta_fh;
4159 unsigned long flags;
4160 #ifdef CONFIG_IWL3945_DEBUG
4161 u32 inta_mask;
4162 #endif
4163
4164 spin_lock_irqsave(&priv->lock, flags);
4165
4166 /* Ack/clear/reset pending uCode interrupts.
4167 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4168 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4169 inta = iwl_read32(priv, CSR_INT);
4170 iwl_write32(priv, CSR_INT, inta);
4171
4172 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4173 * Any new interrupts that happen after this, either while we're
4174 * in this tasklet, or later, will show up in next ISR/tasklet. */
4175 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4176 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4177
4178 #ifdef CONFIG_IWL3945_DEBUG
4179 if (priv->debug_level & IWL_DL_ISR) {
4180 /* just for debug */
4181 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4182 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4183 inta, inta_mask, inta_fh);
4184 }
4185 #endif
4186
4187 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4188 * atomic, make sure that inta covers all the interrupts that
4189 * we've discovered, even if FH interrupt came in just after
4190 * reading CSR_INT. */
4191 if (inta_fh & CSR39_FH_INT_RX_MASK)
4192 inta |= CSR_INT_BIT_FH_RX;
4193 if (inta_fh & CSR39_FH_INT_TX_MASK)
4194 inta |= CSR_INT_BIT_FH_TX;
4195
4196 /* Now service all interrupt bits discovered above. */
4197 if (inta & CSR_INT_BIT_HW_ERR) {
4198 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4199
4200 /* Tell the device to stop sending interrupts */
4201 iwl3945_disable_interrupts(priv);
4202
4203 iwl3945_irq_handle_error(priv);
4204
4205 handled |= CSR_INT_BIT_HW_ERR;
4206
4207 spin_unlock_irqrestore(&priv->lock, flags);
4208
4209 return;
4210 }
4211
4212 #ifdef CONFIG_IWL3945_DEBUG
4213 if (priv->debug_level & (IWL_DL_ISR)) {
4214 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4215 if (inta & CSR_INT_BIT_SCD)
4216 IWL_DEBUG_ISR("Scheduler finished to transmit "
4217 "the frame/frames.\n");
4218
4219 /* Alive notification via Rx interrupt will do the real work */
4220 if (inta & CSR_INT_BIT_ALIVE)
4221 IWL_DEBUG_ISR("Alive interrupt\n");
4222 }
4223 #endif
4224 /* Safely ignore these bits for debug checks below */
4225 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4226
4227 /* Error detected by uCode */
4228 if (inta & CSR_INT_BIT_SW_ERR) {
4229 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4230 inta);
4231 iwl3945_irq_handle_error(priv);
4232 handled |= CSR_INT_BIT_SW_ERR;
4233 }
4234
4235 /* uCode wakes up after power-down sleep */
4236 if (inta & CSR_INT_BIT_WAKEUP) {
4237 IWL_DEBUG_ISR("Wakeup interrupt\n");
4238 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4239 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[0]);
4240 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[1]);
4241 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[2]);
4242 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[3]);
4243 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[4]);
4244 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[5]);
4245
4246 handled |= CSR_INT_BIT_WAKEUP;
4247 }
4248
4249 /* All uCode command responses, including Tx command responses,
4250 * Rx "responses" (frame-received notification), and other
4251 * notifications from uCode come through here*/
4252 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4253 iwl3945_rx_handle(priv);
4254 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4255 }
4256
4257 if (inta & CSR_INT_BIT_FH_TX) {
4258 IWL_DEBUG_ISR("Tx interrupt\n");
4259
4260 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4261 if (!iwl_grab_nic_access(priv)) {
4262 iwl_write_direct32(priv, FH39_TCSR_CREDIT
4263 (FH39_SRVC_CHNL), 0x0);
4264 iwl_release_nic_access(priv);
4265 }
4266 handled |= CSR_INT_BIT_FH_TX;
4267 }
4268
4269 if (inta & ~handled)
4270 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4271
4272 if (inta & ~CSR_INI_SET_MASK) {
4273 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4274 inta & ~CSR_INI_SET_MASK);
4275 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4276 }
4277
4278 /* Re-enable all interrupts */
4279 /* only Re-enable if disabled by irq */
4280 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4281 iwl3945_enable_interrupts(priv);
4282
4283 #ifdef CONFIG_IWL3945_DEBUG
4284 if (priv->debug_level & (IWL_DL_ISR)) {
4285 inta = iwl_read32(priv, CSR_INT);
4286 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4287 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4288 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4289 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4290 }
4291 #endif
4292 spin_unlock_irqrestore(&priv->lock, flags);
4293 }
4294
4295 static irqreturn_t iwl3945_isr(int irq, void *data)
4296 {
4297 struct iwl_priv *priv = data;
4298 u32 inta, inta_mask;
4299 u32 inta_fh;
4300 if (!priv)
4301 return IRQ_NONE;
4302
4303 spin_lock(&priv->lock);
4304
4305 /* Disable (but don't clear!) interrupts here to avoid
4306 * back-to-back ISRs and sporadic interrupts from our NIC.
4307 * If we have something to service, the tasklet will re-enable ints.
4308 * If we *don't* have something, we'll re-enable before leaving here. */
4309 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4310 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
4311
4312 /* Discover which interrupts are active/pending */
4313 inta = iwl_read32(priv, CSR_INT);
4314 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4315
4316 /* Ignore interrupt if there's nothing in NIC to service.
4317 * This may be due to IRQ shared with another device,
4318 * or due to sporadic interrupts thrown from our NIC. */
4319 if (!inta && !inta_fh) {
4320 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4321 goto none;
4322 }
4323
4324 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4325 /* Hardware disappeared */
4326 IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta);
4327 goto unplugged;
4328 }
4329
4330 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4331 inta, inta_mask, inta_fh);
4332
4333 inta &= ~CSR_INT_BIT_SCD;
4334
4335 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4336 if (likely(inta || inta_fh))
4337 tasklet_schedule(&priv->irq_tasklet);
4338 unplugged:
4339 spin_unlock(&priv->lock);
4340
4341 return IRQ_HANDLED;
4342
4343 none:
4344 /* re-enable interrupts here since we don't have anything to service. */
4345 /* only Re-enable if disabled by irq */
4346 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4347 iwl3945_enable_interrupts(priv);
4348 spin_unlock(&priv->lock);
4349 return IRQ_NONE;
4350 }
4351
4352 /************************** EEPROM BANDS ****************************
4353 *
4354 * The iwl3945_eeprom_band definitions below provide the mapping from the
4355 * EEPROM contents to the specific channel number supported for each
4356 * band.
4357 *
4358 * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
4359 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4360 * The specific geography and calibration information for that channel
4361 * is contained in the eeprom map itself.
4362 *
4363 * During init, we copy the eeprom information and channel map
4364 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4365 *
4366 * channel_map_24/52 provides the index in the channel_info array for a
4367 * given channel. We have to have two separate maps as there is channel
4368 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4369 * band_2
4370 *
4371 * A value of 0xff stored in the channel_map indicates that the channel
4372 * is not supported by the hardware at all.
4373 *
4374 * A value of 0xfe in the channel_map indicates that the channel is not
4375 * valid for Tx with the current hardware. This means that
4376 * while the system can tune and receive on a given channel, it may not
4377 * be able to associate or transmit any frames on that
4378 * channel. There is no corresponding channel information for that
4379 * entry.
4380 *
4381 *********************************************************************/
4382
4383 /* 2.4 GHz */
4384 static const u8 iwl3945_eeprom_band_1[14] = {
4385 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4386 };
4387
4388 /* 5.2 GHz bands */
4389 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4390 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4391 };
4392
4393 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4394 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4395 };
4396
4397 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4398 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4399 };
4400
4401 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4402 145, 149, 153, 157, 161, 165
4403 };
4404
4405 static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
4406 int *eeprom_ch_count,
4407 const struct iwl_eeprom_channel
4408 **eeprom_ch_info,
4409 const u8 **eeprom_ch_index)
4410 {
4411 switch (band) {
4412 case 1: /* 2.4GHz band */
4413 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4414 *eeprom_ch_info = priv->eeprom39.band_1_channels;
4415 *eeprom_ch_index = iwl3945_eeprom_band_1;
4416 break;
4417 case 2: /* 4.9GHz band */
4418 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4419 *eeprom_ch_info = priv->eeprom39.band_2_channels;
4420 *eeprom_ch_index = iwl3945_eeprom_band_2;
4421 break;
4422 case 3: /* 5.2GHz band */
4423 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4424 *eeprom_ch_info = priv->eeprom39.band_3_channels;
4425 *eeprom_ch_index = iwl3945_eeprom_band_3;
4426 break;
4427 case 4: /* 5.5GHz band */
4428 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4429 *eeprom_ch_info = priv->eeprom39.band_4_channels;
4430 *eeprom_ch_index = iwl3945_eeprom_band_4;
4431 break;
4432 case 5: /* 5.7GHz band */
4433 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4434 *eeprom_ch_info = priv->eeprom39.band_5_channels;
4435 *eeprom_ch_index = iwl3945_eeprom_band_5;
4436 break;
4437 default:
4438 BUG();
4439 return;
4440 }
4441 }
4442
4443 /**
4444 * iwl3945_get_channel_info - Find driver's private channel info
4445 *
4446 * Based on band and channel number.
4447 */
4448 const struct iwl_channel_info *
4449 iwl3945_get_channel_info(const struct iwl_priv *priv,
4450 enum ieee80211_band band, u16 channel)
4451 {
4452 int i;
4453
4454 switch (band) {
4455 case IEEE80211_BAND_5GHZ:
4456 for (i = 14; i < priv->channel_count; i++) {
4457 if (priv->channel_info[i].channel == channel)
4458 return &priv->channel_info[i];
4459 }
4460 break;
4461
4462 case IEEE80211_BAND_2GHZ:
4463 if (channel >= 1 && channel <= 14)
4464 return &priv->channel_info[channel - 1];
4465 break;
4466 case IEEE80211_NUM_BANDS:
4467 WARN_ON(1);
4468 }
4469
4470 return NULL;
4471 }
4472
4473 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4474 ? # x " " : "")
4475
4476 /**
4477 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4478 */
4479 static int iwl3945_init_channel_map(struct iwl_priv *priv)
4480 {
4481 int eeprom_ch_count = 0;
4482 const u8 *eeprom_ch_index = NULL;
4483 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
4484 int band, ch;
4485 struct iwl_channel_info *ch_info;
4486
4487 if (priv->channel_count) {
4488 IWL_DEBUG_INFO("Channel map already initialized.\n");
4489 return 0;
4490 }
4491
4492 if (priv->eeprom39.version < 0x2f) {
4493 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4494 priv->eeprom39.version);
4495 return -EINVAL;
4496 }
4497
4498 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4499
4500 priv->channel_count =
4501 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4502 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4503 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4504 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4505 ARRAY_SIZE(iwl3945_eeprom_band_5);
4506
4507 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4508
4509 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
4510 priv->channel_count, GFP_KERNEL);
4511 if (!priv->channel_info) {
4512 IWL_ERROR("Could not allocate channel_info\n");
4513 priv->channel_count = 0;
4514 return -ENOMEM;
4515 }
4516
4517 ch_info = priv->channel_info;
4518
4519 /* Loop through the 5 EEPROM bands adding them in order to the
4520 * channel map we maintain (that contains additional information than
4521 * what just in the EEPROM) */
4522 for (band = 1; band <= 5; band++) {
4523
4524 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4525 &eeprom_ch_info, &eeprom_ch_index);
4526
4527 /* Loop through each band adding each of the channels */
4528 for (ch = 0; ch < eeprom_ch_count; ch++) {
4529 ch_info->channel = eeprom_ch_index[ch];
4530 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4531 IEEE80211_BAND_5GHZ;
4532
4533 /* permanently store EEPROM's channel regulatory flags
4534 * and max power in channel info database. */
4535 ch_info->eeprom = eeprom_ch_info[ch];
4536
4537 /* Copy the run-time flags so they are there even on
4538 * invalid channels */
4539 ch_info->flags = eeprom_ch_info[ch].flags;
4540
4541 if (!(is_channel_valid(ch_info))) {
4542 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4543 "No traffic\n",
4544 ch_info->channel,
4545 ch_info->flags,
4546 is_channel_a_band(ch_info) ?
4547 "5.2" : "2.4");
4548 ch_info++;
4549 continue;
4550 }
4551
4552 /* Initialize regulatory-based run-time data */
4553 ch_info->max_power_avg = ch_info->curr_txpow =
4554 eeprom_ch_info[ch].max_power_avg;
4555 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4556 ch_info->min_power = 0;
4557
4558 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4559 " %ddBm): Ad-Hoc %ssupported\n",
4560 ch_info->channel,
4561 is_channel_a_band(ch_info) ?
4562 "5.2" : "2.4",
4563 CHECK_AND_PRINT(VALID),
4564 CHECK_AND_PRINT(IBSS),
4565 CHECK_AND_PRINT(ACTIVE),
4566 CHECK_AND_PRINT(RADAR),
4567 CHECK_AND_PRINT(WIDE),
4568 CHECK_AND_PRINT(DFS),
4569 eeprom_ch_info[ch].flags,
4570 eeprom_ch_info[ch].max_power_avg,
4571 ((eeprom_ch_info[ch].
4572 flags & EEPROM_CHANNEL_IBSS)
4573 && !(eeprom_ch_info[ch].
4574 flags & EEPROM_CHANNEL_RADAR))
4575 ? "" : "not ");
4576
4577 /* Set the user_txpower_limit to the highest power
4578 * supported by any channel */
4579 if (eeprom_ch_info[ch].max_power_avg >
4580 priv->user_txpower_limit)
4581 priv->user_txpower_limit =
4582 eeprom_ch_info[ch].max_power_avg;
4583
4584 ch_info++;
4585 }
4586 }
4587
4588 /* Set up txpower settings in driver for all channels */
4589 if (iwl3945_txpower_set_from_eeprom(priv))
4590 return -EIO;
4591
4592 return 0;
4593 }
4594
4595 /*
4596 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4597 */
4598 static void iwl3945_free_channel_map(struct iwl_priv *priv)
4599 {
4600 kfree(priv->channel_info);
4601 priv->channel_count = 0;
4602 }
4603
4604 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4605 * sending probe req. This should be set long enough to hear probe responses
4606 * from more than one AP. */
4607 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4608 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4609
4610 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4611 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4612
4613 /* For faster active scanning, scan will move to the next channel if fewer than
4614 * PLCP_QUIET_THRESH packets are heard on this channel within
4615 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4616 * time if it's a quiet channel (nothing responded to our probe, and there's
4617 * no other traffic).
4618 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4619 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4620 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4621
4622 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4623 * Must be set longer than active dwell time.
4624 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4625 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4626 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4627 #define IWL_PASSIVE_DWELL_BASE (100)
4628 #define IWL_CHANNEL_TUNE_TIME 5
4629
4630 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4631
4632 static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
4633 enum ieee80211_band band,
4634 u8 n_probes)
4635 {
4636 if (band == IEEE80211_BAND_5GHZ)
4637 return IWL_ACTIVE_DWELL_TIME_52 +
4638 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4639 else
4640 return IWL_ACTIVE_DWELL_TIME_24 +
4641 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4642 }
4643
4644 static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
4645 enum ieee80211_band band)
4646 {
4647 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4648 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4649 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4650
4651 if (iwl3945_is_associated(priv)) {
4652 /* If we're associated, we clamp the maximum passive
4653 * dwell time to be 98% of the beacon interval (minus
4654 * 2 * channel tune time) */
4655 passive = priv->beacon_int;
4656 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4657 passive = IWL_PASSIVE_DWELL_BASE;
4658 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4659 }
4660
4661 return passive;
4662 }
4663
4664 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
4665 enum ieee80211_band band,
4666 u8 is_active, u8 n_probes,
4667 struct iwl3945_scan_channel *scan_ch)
4668 {
4669 const struct ieee80211_channel *channels = NULL;
4670 const struct ieee80211_supported_band *sband;
4671 const struct iwl_channel_info *ch_info;
4672 u16 passive_dwell = 0;
4673 u16 active_dwell = 0;
4674 int added, i;
4675
4676 sband = iwl3945_get_band(priv, band);
4677 if (!sband)
4678 return 0;
4679
4680 channels = sband->channels;
4681
4682 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4683 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4684
4685 if (passive_dwell <= active_dwell)
4686 passive_dwell = active_dwell + 1;
4687
4688 for (i = 0, added = 0; i < sband->n_channels; i++) {
4689 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4690 continue;
4691
4692 scan_ch->channel = channels[i].hw_value;
4693
4694 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4695 if (!is_channel_valid(ch_info)) {
4696 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4697 scan_ch->channel);
4698 continue;
4699 }
4700
4701 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4702 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4703 /* If passive , set up for auto-switch
4704 * and use long active_dwell time.
4705 */
4706 if (!is_active || is_channel_passive(ch_info) ||
4707 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4708 scan_ch->type = 0; /* passive */
4709 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4710 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4711 } else {
4712 scan_ch->type = 1; /* active */
4713 }
4714
4715 /* Set direct probe bits. These may be used both for active
4716 * scan channels (probes gets sent right away),
4717 * or for passive channels (probes get se sent only after
4718 * hearing clear Rx packet).*/
4719 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4720 if (n_probes)
4721 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4722 } else {
4723 /* uCode v1 does not allow setting direct probe bits on
4724 * passive channel. */
4725 if ((scan_ch->type & 1) && n_probes)
4726 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4727 }
4728
4729 /* Set txpower levels to defaults */
4730 scan_ch->tpc.dsp_atten = 110;
4731 /* scan_pwr_info->tpc.dsp_atten; */
4732
4733 /*scan_pwr_info->tpc.tx_gain; */
4734 if (band == IEEE80211_BAND_5GHZ)
4735 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4736 else {
4737 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4738 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4739 * power level:
4740 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4741 */
4742 }
4743
4744 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4745 scan_ch->channel,
4746 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4747 (scan_ch->type & 1) ?
4748 active_dwell : passive_dwell);
4749
4750 scan_ch++;
4751 added++;
4752 }
4753
4754 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4755 return added;
4756 }
4757
4758 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
4759 struct ieee80211_rate *rates)
4760 {
4761 int i;
4762
4763 for (i = 0; i < IWL_RATE_COUNT; i++) {
4764 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4765 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4766 rates[i].hw_value_short = i;
4767 rates[i].flags = 0;
4768 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4769 /*
4770 * If CCK != 1M then set short preamble rate flag.
4771 */
4772 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4773 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4774 }
4775 }
4776 }
4777
4778 /**
4779 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4780 */
4781 static int iwl3945_init_geos(struct iwl_priv *priv)
4782 {
4783 struct iwl_channel_info *ch;
4784 struct ieee80211_supported_band *sband;
4785 struct ieee80211_channel *channels;
4786 struct ieee80211_channel *geo_ch;
4787 struct ieee80211_rate *rates;
4788 int i = 0;
4789
4790 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4791 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4792 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4793 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4794 return 0;
4795 }
4796
4797 channels = kzalloc(sizeof(struct ieee80211_channel) *
4798 priv->channel_count, GFP_KERNEL);
4799 if (!channels)
4800 return -ENOMEM;
4801
4802 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4803 GFP_KERNEL);
4804 if (!rates) {
4805 kfree(channels);
4806 return -ENOMEM;
4807 }
4808
4809 /* 5.2GHz channels start after the 2.4GHz channels */
4810 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4811 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4812 /* just OFDM */
4813 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4814 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4815
4816 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4817 sband->channels = channels;
4818 /* OFDM & CCK */
4819 sband->bitrates = rates;
4820 sband->n_bitrates = IWL_RATE_COUNT;
4821
4822 priv->ieee_channels = channels;
4823 priv->ieee_rates = rates;
4824
4825 iwl3945_init_hw_rates(priv, rates);
4826
4827 for (i = 0; i < priv->channel_count; i++) {
4828 ch = &priv->channel_info[i];
4829
4830 /* FIXME: might be removed if scan is OK*/
4831 if (!is_channel_valid(ch))
4832 continue;
4833
4834 if (is_channel_a_band(ch))
4835 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4836 else
4837 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4838
4839 geo_ch = &sband->channels[sband->n_channels++];
4840
4841 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4842 geo_ch->max_power = ch->max_power_avg;
4843 geo_ch->max_antenna_gain = 0xff;
4844 geo_ch->hw_value = ch->channel;
4845
4846 if (is_channel_valid(ch)) {
4847 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4848 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4849
4850 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4851 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4852
4853 if (ch->flags & EEPROM_CHANNEL_RADAR)
4854 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4855
4856 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4857 priv->max_channel_txpower_limit =
4858 ch->max_power_avg;
4859 } else {
4860 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4861 }
4862
4863 /* Save flags for reg domain usage */
4864 geo_ch->orig_flags = geo_ch->flags;
4865
4866 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4867 ch->channel, geo_ch->center_freq,
4868 is_channel_a_band(ch) ? "5.2" : "2.4",
4869 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4870 "restricted" : "valid",
4871 geo_ch->flags);
4872 }
4873
4874 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4875 priv->cfg->sku & IWL_SKU_A) {
4876 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
4877 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
4878 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4879 priv->cfg->sku &= ~IWL_SKU_A;
4880 }
4881
4882 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4883 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4884 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4885
4886 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4887 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4888 &priv->bands[IEEE80211_BAND_2GHZ];
4889 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4890 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4891 &priv->bands[IEEE80211_BAND_5GHZ];
4892
4893 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4894
4895 return 0;
4896 }
4897
4898 /*
4899 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4900 */
4901 static void iwl3945_free_geos(struct iwl_priv *priv)
4902 {
4903 kfree(priv->ieee_channels);
4904 kfree(priv->ieee_rates);
4905 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4906 }
4907
4908 /******************************************************************************
4909 *
4910 * uCode download functions
4911 *
4912 ******************************************************************************/
4913
4914 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
4915 {
4916 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4917 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4918 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4919 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4920 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4921 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
4922 }
4923
4924 /**
4925 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
4926 * looking at all data.
4927 */
4928 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
4929 {
4930 u32 val;
4931 u32 save_len = len;
4932 int rc = 0;
4933 u32 errcnt;
4934
4935 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4936
4937 rc = iwl_grab_nic_access(priv);
4938 if (rc)
4939 return rc;
4940
4941 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4942 IWL39_RTC_INST_LOWER_BOUND);
4943
4944 errcnt = 0;
4945 for (; len > 0; len -= sizeof(u32), image++) {
4946 /* read data comes through single port, auto-incr addr */
4947 /* NOTE: Use the debugless read so we don't flood kernel log
4948 * if IWL_DL_IO is set */
4949 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4950 if (val != le32_to_cpu(*image)) {
4951 IWL_ERROR("uCode INST section is invalid at "
4952 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4953 save_len - len, val, le32_to_cpu(*image));
4954 rc = -EIO;
4955 errcnt++;
4956 if (errcnt >= 20)
4957 break;
4958 }
4959 }
4960
4961 iwl_release_nic_access(priv);
4962
4963 if (!errcnt)
4964 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
4965
4966 return rc;
4967 }
4968
4969
4970 /**
4971 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
4972 * using sample data 100 bytes apart. If these sample points are good,
4973 * it's a pretty good bet that everything between them is good, too.
4974 */
4975 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
4976 {
4977 u32 val;
4978 int rc = 0;
4979 u32 errcnt = 0;
4980 u32 i;
4981
4982 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4983
4984 rc = iwl_grab_nic_access(priv);
4985 if (rc)
4986 return rc;
4987
4988 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4989 /* read data comes through single port, auto-incr addr */
4990 /* NOTE: Use the debugless read so we don't flood kernel log
4991 * if IWL_DL_IO is set */
4992 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4993 i + IWL39_RTC_INST_LOWER_BOUND);
4994 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4995 if (val != le32_to_cpu(*image)) {
4996 #if 0 /* Enable this if you want to see details */
4997 IWL_ERROR("uCode INST section is invalid at "
4998 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4999 i, val, *image);
5000 #endif
5001 rc = -EIO;
5002 errcnt++;
5003 if (errcnt >= 3)
5004 break;
5005 }
5006 }
5007
5008 iwl_release_nic_access(priv);
5009
5010 return rc;
5011 }
5012
5013
5014 /**
5015 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5016 * and verify its contents
5017 */
5018 static int iwl3945_verify_ucode(struct iwl_priv *priv)
5019 {
5020 __le32 *image;
5021 u32 len;
5022 int rc = 0;
5023
5024 /* Try bootstrap */
5025 image = (__le32 *)priv->ucode_boot.v_addr;
5026 len = priv->ucode_boot.len;
5027 rc = iwl3945_verify_inst_sparse(priv, image, len);
5028 if (rc == 0) {
5029 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5030 return 0;
5031 }
5032
5033 /* Try initialize */
5034 image = (__le32 *)priv->ucode_init.v_addr;
5035 len = priv->ucode_init.len;
5036 rc = iwl3945_verify_inst_sparse(priv, image, len);
5037 if (rc == 0) {
5038 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5039 return 0;
5040 }
5041
5042 /* Try runtime/protocol */
5043 image = (__le32 *)priv->ucode_code.v_addr;
5044 len = priv->ucode_code.len;
5045 rc = iwl3945_verify_inst_sparse(priv, image, len);
5046 if (rc == 0) {
5047 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5048 return 0;
5049 }
5050
5051 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5052
5053 /* Since nothing seems to match, show first several data entries in
5054 * instruction SRAM, so maybe visual inspection will give a clue.
5055 * Selection of bootstrap image (vs. other images) is arbitrary. */
5056 image = (__le32 *)priv->ucode_boot.v_addr;
5057 len = priv->ucode_boot.len;
5058 rc = iwl3945_verify_inst_full(priv, image, len);
5059
5060 return rc;
5061 }
5062
5063
5064 /* check contents of special bootstrap uCode SRAM */
5065 static int iwl3945_verify_bsm(struct iwl_priv *priv)
5066 {
5067 __le32 *image = priv->ucode_boot.v_addr;
5068 u32 len = priv->ucode_boot.len;
5069 u32 reg;
5070 u32 val;
5071
5072 IWL_DEBUG_INFO("Begin verify bsm\n");
5073
5074 /* verify BSM SRAM contents */
5075 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
5076 for (reg = BSM_SRAM_LOWER_BOUND;
5077 reg < BSM_SRAM_LOWER_BOUND + len;
5078 reg += sizeof(u32), image++) {
5079 val = iwl_read_prph(priv, reg);
5080 if (val != le32_to_cpu(*image)) {
5081 IWL_ERROR("BSM uCode verification failed at "
5082 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5083 BSM_SRAM_LOWER_BOUND,
5084 reg - BSM_SRAM_LOWER_BOUND, len,
5085 val, le32_to_cpu(*image));
5086 return -EIO;
5087 }
5088 }
5089
5090 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5091
5092 return 0;
5093 }
5094
5095 /**
5096 * iwl3945_load_bsm - Load bootstrap instructions
5097 *
5098 * BSM operation:
5099 *
5100 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5101 * in special SRAM that does not power down during RFKILL. When powering back
5102 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5103 * the bootstrap program into the on-board processor, and starts it.
5104 *
5105 * The bootstrap program loads (via DMA) instructions and data for a new
5106 * program from host DRAM locations indicated by the host driver in the
5107 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5108 * automatically.
5109 *
5110 * When initializing the NIC, the host driver points the BSM to the
5111 * "initialize" uCode image. This uCode sets up some internal data, then
5112 * notifies host via "initialize alive" that it is complete.
5113 *
5114 * The host then replaces the BSM_DRAM_* pointer values to point to the
5115 * normal runtime uCode instructions and a backup uCode data cache buffer
5116 * (filled initially with starting data values for the on-board processor),
5117 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5118 * which begins normal operation.
5119 *
5120 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5121 * the backup data cache in DRAM before SRAM is powered down.
5122 *
5123 * When powering back up, the BSM loads the bootstrap program. This reloads
5124 * the runtime uCode instructions and the backup data cache into SRAM,
5125 * and re-launches the runtime uCode from where it left off.
5126 */
5127 static int iwl3945_load_bsm(struct iwl_priv *priv)
5128 {
5129 __le32 *image = priv->ucode_boot.v_addr;
5130 u32 len = priv->ucode_boot.len;
5131 dma_addr_t pinst;
5132 dma_addr_t pdata;
5133 u32 inst_len;
5134 u32 data_len;
5135 int rc;
5136 int i;
5137 u32 done;
5138 u32 reg_offset;
5139
5140 IWL_DEBUG_INFO("Begin load bsm\n");
5141
5142 /* make sure bootstrap program is no larger than BSM's SRAM size */
5143 if (len > IWL39_MAX_BSM_SIZE)
5144 return -EINVAL;
5145
5146 /* Tell bootstrap uCode where to find the "Initialize" uCode
5147 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5148 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5149 * after the "initialize" uCode has run, to point to
5150 * runtime/protocol instructions and backup data cache. */
5151 pinst = priv->ucode_init.p_addr;
5152 pdata = priv->ucode_init_data.p_addr;
5153 inst_len = priv->ucode_init.len;
5154 data_len = priv->ucode_init_data.len;
5155
5156 rc = iwl_grab_nic_access(priv);
5157 if (rc)
5158 return rc;
5159
5160 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5161 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5162 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5163 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5164
5165 /* Fill BSM memory with bootstrap instructions */
5166 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5167 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5168 reg_offset += sizeof(u32), image++)
5169 _iwl_write_prph(priv, reg_offset,
5170 le32_to_cpu(*image));
5171
5172 rc = iwl3945_verify_bsm(priv);
5173 if (rc) {
5174 iwl_release_nic_access(priv);
5175 return rc;
5176 }
5177
5178 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5179 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5180 iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
5181 IWL39_RTC_INST_LOWER_BOUND);
5182 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5183
5184 /* Load bootstrap code into instruction SRAM now,
5185 * to prepare to load "initialize" uCode */
5186 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5187 BSM_WR_CTRL_REG_BIT_START);
5188
5189 /* Wait for load of bootstrap uCode to finish */
5190 for (i = 0; i < 100; i++) {
5191 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
5192 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5193 break;
5194 udelay(10);
5195 }
5196 if (i < 100)
5197 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5198 else {
5199 IWL_ERROR("BSM write did not complete!\n");
5200 return -EIO;
5201 }
5202
5203 /* Enable future boot loads whenever power management unit triggers it
5204 * (e.g. when powering back up after power-save shutdown) */
5205 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5206 BSM_WR_CTRL_REG_BIT_START_EN);
5207
5208 iwl_release_nic_access(priv);
5209
5210 return 0;
5211 }
5212
5213 static void iwl3945_nic_start(struct iwl_priv *priv)
5214 {
5215 /* Remove all resets to allow NIC to operate */
5216 iwl_write32(priv, CSR_RESET, 0);
5217 }
5218
5219 /**
5220 * iwl3945_read_ucode - Read uCode images from disk file.
5221 *
5222 * Copy into buffers for card to fetch via bus-mastering
5223 */
5224 static int iwl3945_read_ucode(struct iwl_priv *priv)
5225 {
5226 struct iwl_ucode *ucode;
5227 int ret = -EINVAL, index;
5228 const struct firmware *ucode_raw;
5229 /* firmware file name contains uCode/driver compatibility version */
5230 const char *name_pre = priv->cfg->fw_name_pre;
5231 const unsigned int api_max = priv->cfg->ucode_api_max;
5232 const unsigned int api_min = priv->cfg->ucode_api_min;
5233 char buf[25];
5234 u8 *src;
5235 size_t len;
5236 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
5237
5238 /* Ask kernel firmware_class module to get the boot firmware off disk.
5239 * request_firmware() is synchronous, file is in memory on return. */
5240 for (index = api_max; index >= api_min; index--) {
5241 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
5242 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
5243 if (ret < 0) {
5244 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5245 buf, ret);
5246 if (ret == -ENOENT)
5247 continue;
5248 else
5249 goto error;
5250 } else {
5251 if (index < api_max)
5252 IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n",
5253 buf, api_max);
5254 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5255 buf, ucode_raw->size);
5256 break;
5257 }
5258 }
5259
5260 if (ret < 0)
5261 goto error;
5262
5263 /* Make sure that we got at least our header! */
5264 if (ucode_raw->size < sizeof(*ucode)) {
5265 IWL_ERROR("File size way too small!\n");
5266 ret = -EINVAL;
5267 goto err_release;
5268 }
5269
5270 /* Data from ucode file: header followed by uCode images */
5271 ucode = (void *)ucode_raw->data;
5272
5273 priv->ucode_ver = le32_to_cpu(ucode->ver);
5274 api_ver = IWL_UCODE_API(priv->ucode_ver);
5275 inst_size = le32_to_cpu(ucode->inst_size);
5276 data_size = le32_to_cpu(ucode->data_size);
5277 init_size = le32_to_cpu(ucode->init_size);
5278 init_data_size = le32_to_cpu(ucode->init_data_size);
5279 boot_size = le32_to_cpu(ucode->boot_size);
5280
5281 /* api_ver should match the api version forming part of the
5282 * firmware filename ... but we don't check for that and only rely
5283 * on the API version read from firware header from here on forward */
5284
5285 if (api_ver < api_min || api_ver > api_max) {
5286 IWL_ERROR("Driver unable to support your firmware API. "
5287 "Driver supports v%u, firmware is v%u.\n",
5288 api_max, api_ver);
5289 priv->ucode_ver = 0;
5290 ret = -EINVAL;
5291 goto err_release;
5292 }
5293 if (api_ver != api_max)
5294 IWL_ERROR("Firmware has old API version. Expected %u, "
5295 "got %u. New firmware can be obtained "
5296 "from http://www.intellinuxwireless.org.\n",
5297 api_max, api_ver);
5298
5299 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
5300 IWL_UCODE_MAJOR(priv->ucode_ver),
5301 IWL_UCODE_MINOR(priv->ucode_ver),
5302 IWL_UCODE_API(priv->ucode_ver),
5303 IWL_UCODE_SERIAL(priv->ucode_ver));
5304
5305 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
5306 priv->ucode_ver);
5307 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5308 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5309 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5310 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5311 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5312
5313
5314 /* Verify size of file vs. image size info in file's header */
5315 if (ucode_raw->size < sizeof(*ucode) +
5316 inst_size + data_size + init_size +
5317 init_data_size + boot_size) {
5318
5319 IWL_DEBUG_INFO("uCode file size %d too small\n",
5320 (int)ucode_raw->size);
5321 ret = -EINVAL;
5322 goto err_release;
5323 }
5324
5325 /* Verify that uCode images will fit in card's SRAM */
5326 if (inst_size > IWL39_MAX_INST_SIZE) {
5327 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5328 inst_size);
5329 ret = -EINVAL;
5330 goto err_release;
5331 }
5332
5333 if (data_size > IWL39_MAX_DATA_SIZE) {
5334 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5335 data_size);
5336 ret = -EINVAL;
5337 goto err_release;
5338 }
5339 if (init_size > IWL39_MAX_INST_SIZE) {
5340 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5341 init_size);
5342 ret = -EINVAL;
5343 goto err_release;
5344 }
5345 if (init_data_size > IWL39_MAX_DATA_SIZE) {
5346 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5347 init_data_size);
5348 ret = -EINVAL;
5349 goto err_release;
5350 }
5351 if (boot_size > IWL39_MAX_BSM_SIZE) {
5352 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5353 boot_size);
5354 ret = -EINVAL;
5355 goto err_release;
5356 }
5357
5358 /* Allocate ucode buffers for card's bus-master loading ... */
5359
5360 /* Runtime instructions and 2 copies of data:
5361 * 1) unmodified from disk
5362 * 2) backup cache for save/restore during power-downs */
5363 priv->ucode_code.len = inst_size;
5364 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5365
5366 priv->ucode_data.len = data_size;
5367 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5368
5369 priv->ucode_data_backup.len = data_size;
5370 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5371
5372 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5373 !priv->ucode_data_backup.v_addr)
5374 goto err_pci_alloc;
5375
5376 /* Initialization instructions and data */
5377 if (init_size && init_data_size) {
5378 priv->ucode_init.len = init_size;
5379 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5380
5381 priv->ucode_init_data.len = init_data_size;
5382 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5383
5384 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5385 goto err_pci_alloc;
5386 }
5387
5388 /* Bootstrap (instructions only, no data) */
5389 if (boot_size) {
5390 priv->ucode_boot.len = boot_size;
5391 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5392
5393 if (!priv->ucode_boot.v_addr)
5394 goto err_pci_alloc;
5395 }
5396
5397 /* Copy images into buffers for card's bus-master reads ... */
5398
5399 /* Runtime instructions (first block of data in file) */
5400 src = &ucode->data[0];
5401 len = priv->ucode_code.len;
5402 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5403 memcpy(priv->ucode_code.v_addr, src, len);
5404 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5405 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5406
5407 /* Runtime data (2nd block)
5408 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5409 src = &ucode->data[inst_size];
5410 len = priv->ucode_data.len;
5411 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5412 memcpy(priv->ucode_data.v_addr, src, len);
5413 memcpy(priv->ucode_data_backup.v_addr, src, len);
5414
5415 /* Initialization instructions (3rd block) */
5416 if (init_size) {
5417 src = &ucode->data[inst_size + data_size];
5418 len = priv->ucode_init.len;
5419 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5420 len);
5421 memcpy(priv->ucode_init.v_addr, src, len);
5422 }
5423
5424 /* Initialization data (4th block) */
5425 if (init_data_size) {
5426 src = &ucode->data[inst_size + data_size + init_size];
5427 len = priv->ucode_init_data.len;
5428 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5429 (int)len);
5430 memcpy(priv->ucode_init_data.v_addr, src, len);
5431 }
5432
5433 /* Bootstrap instructions (5th block) */
5434 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5435 len = priv->ucode_boot.len;
5436 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5437 (int)len);
5438 memcpy(priv->ucode_boot.v_addr, src, len);
5439
5440 /* We have our copies now, allow OS release its copies */
5441 release_firmware(ucode_raw);
5442 return 0;
5443
5444 err_pci_alloc:
5445 IWL_ERROR("failed to allocate pci memory\n");
5446 ret = -ENOMEM;
5447 iwl3945_dealloc_ucode_pci(priv);
5448
5449 err_release:
5450 release_firmware(ucode_raw);
5451
5452 error:
5453 return ret;
5454 }
5455
5456
5457 /**
5458 * iwl3945_set_ucode_ptrs - Set uCode address location
5459 *
5460 * Tell initialization uCode where to find runtime uCode.
5461 *
5462 * BSM registers initially contain pointers to initialization uCode.
5463 * We need to replace them to load runtime uCode inst and data,
5464 * and to save runtime data when powering down.
5465 */
5466 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
5467 {
5468 dma_addr_t pinst;
5469 dma_addr_t pdata;
5470 int rc = 0;
5471 unsigned long flags;
5472
5473 /* bits 31:0 for 3945 */
5474 pinst = priv->ucode_code.p_addr;
5475 pdata = priv->ucode_data_backup.p_addr;
5476
5477 spin_lock_irqsave(&priv->lock, flags);
5478 rc = iwl_grab_nic_access(priv);
5479 if (rc) {
5480 spin_unlock_irqrestore(&priv->lock, flags);
5481 return rc;
5482 }
5483
5484 /* Tell bootstrap uCode where to find image to load */
5485 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5486 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5487 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5488 priv->ucode_data.len);
5489
5490 /* Inst byte count must be last to set up, bit 31 signals uCode
5491 * that all new ptr/size info is in place */
5492 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5493 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5494
5495 iwl_release_nic_access(priv);
5496
5497 spin_unlock_irqrestore(&priv->lock, flags);
5498
5499 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5500
5501 return rc;
5502 }
5503
5504 /**
5505 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5506 *
5507 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5508 *
5509 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5510 */
5511 static void iwl3945_init_alive_start(struct iwl_priv *priv)
5512 {
5513 /* Check alive response for "valid" sign from uCode */
5514 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5515 /* We had an error bringing up the hardware, so take it
5516 * all the way back down so we can try again */
5517 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5518 goto restart;
5519 }
5520
5521 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5522 * This is a paranoid check, because we would not have gotten the
5523 * "initialize" alive if code weren't properly loaded. */
5524 if (iwl3945_verify_ucode(priv)) {
5525 /* Runtime instruction load was bad;
5526 * take it all the way back down so we can try again */
5527 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5528 goto restart;
5529 }
5530
5531 /* Send pointers to protocol/runtime uCode image ... init code will
5532 * load and launch runtime uCode, which will send us another "Alive"
5533 * notification. */
5534 IWL_DEBUG_INFO("Initialization Alive received.\n");
5535 if (iwl3945_set_ucode_ptrs(priv)) {
5536 /* Runtime instruction load won't happen;
5537 * take it all the way back down so we can try again */
5538 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5539 goto restart;
5540 }
5541 return;
5542
5543 restart:
5544 queue_work(priv->workqueue, &priv->restart);
5545 }
5546
5547
5548 /* temporary */
5549 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5550 struct sk_buff *skb);
5551
5552 /**
5553 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5554 * from protocol/runtime uCode (initialization uCode's
5555 * Alive gets handled by iwl3945_init_alive_start()).
5556 */
5557 static void iwl3945_alive_start(struct iwl_priv *priv)
5558 {
5559 int rc = 0;
5560 int thermal_spin = 0;
5561 u32 rfkill;
5562
5563 IWL_DEBUG_INFO("Runtime Alive received.\n");
5564
5565 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5566 /* We had an error bringing up the hardware, so take it
5567 * all the way back down so we can try again */
5568 IWL_DEBUG_INFO("Alive failed.\n");
5569 goto restart;
5570 }
5571
5572 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5573 * This is a paranoid check, because we would not have gotten the
5574 * "runtime" alive if code weren't properly loaded. */
5575 if (iwl3945_verify_ucode(priv)) {
5576 /* Runtime instruction load was bad;
5577 * take it all the way back down so we can try again */
5578 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5579 goto restart;
5580 }
5581
5582 iwl3945_clear_stations_table(priv);
5583
5584 rc = iwl_grab_nic_access(priv);
5585 if (rc) {
5586 IWL_WARNING("Can not read RFKILL status from adapter\n");
5587 return;
5588 }
5589
5590 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
5591 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5592 iwl_release_nic_access(priv);
5593
5594 if (rfkill & 0x1) {
5595 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5596 /* if RFKILL is not on, then wait for thermal
5597 * sensor in adapter to kick in */
5598 while (iwl3945_hw_get_temperature(priv) == 0) {
5599 thermal_spin++;
5600 udelay(10);
5601 }
5602
5603 if (thermal_spin)
5604 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5605 thermal_spin * 10);
5606 } else
5607 set_bit(STATUS_RF_KILL_HW, &priv->status);
5608
5609 /* After the ALIVE response, we can send commands to 3945 uCode */
5610 set_bit(STATUS_ALIVE, &priv->status);
5611
5612 /* Clear out the uCode error bit if it is set */
5613 clear_bit(STATUS_FW_ERROR, &priv->status);
5614
5615 if (iwl3945_is_rfkill(priv))
5616 return;
5617
5618 ieee80211_wake_queues(priv->hw);
5619
5620 priv->active_rate = priv->rates_mask;
5621 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5622
5623 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5624
5625 if (iwl3945_is_associated(priv)) {
5626 struct iwl3945_rxon_cmd *active_rxon =
5627 (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
5628
5629 memcpy(&priv->staging39_rxon, &priv->active39_rxon,
5630 sizeof(priv->staging39_rxon));
5631 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5632 } else {
5633 /* Initialize our rx_config data */
5634 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5635 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5636 }
5637
5638 /* Configure Bluetooth device coexistence support */
5639 iwl3945_send_bt_config(priv);
5640
5641 /* Configure the adapter for unassociated operation */
5642 iwl3945_commit_rxon(priv);
5643
5644 iwl3945_reg_txpower_periodic(priv);
5645
5646 iwl3945_led_register(priv);
5647
5648 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5649 set_bit(STATUS_READY, &priv->status);
5650 wake_up_interruptible(&priv->wait_command_queue);
5651
5652 if (priv->error_recovering)
5653 iwl3945_error_recovery(priv);
5654
5655 /* reassociate for ADHOC mode */
5656 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5657 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5658 priv->vif);
5659 if (beacon)
5660 iwl3945_mac_beacon_update(priv->hw, beacon);
5661 }
5662
5663 return;
5664
5665 restart:
5666 queue_work(priv->workqueue, &priv->restart);
5667 }
5668
5669 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
5670
5671 static void __iwl3945_down(struct iwl_priv *priv)
5672 {
5673 unsigned long flags;
5674 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5675 struct ieee80211_conf *conf = NULL;
5676
5677 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5678
5679 conf = ieee80211_get_hw_conf(priv->hw);
5680
5681 if (!exit_pending)
5682 set_bit(STATUS_EXIT_PENDING, &priv->status);
5683
5684 iwl3945_led_unregister(priv);
5685 iwl3945_clear_stations_table(priv);
5686
5687 /* Unblock any waiting calls */
5688 wake_up_interruptible_all(&priv->wait_command_queue);
5689
5690 /* Wipe out the EXIT_PENDING status bit if we are not actually
5691 * exiting the module */
5692 if (!exit_pending)
5693 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5694
5695 /* stop and reset the on-board processor */
5696 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5697
5698 /* tell the device to stop sending interrupts */
5699 spin_lock_irqsave(&priv->lock, flags);
5700 iwl3945_disable_interrupts(priv);
5701 spin_unlock_irqrestore(&priv->lock, flags);
5702 iwl_synchronize_irq(priv);
5703
5704 if (priv->mac80211_registered)
5705 ieee80211_stop_queues(priv->hw);
5706
5707 /* If we have not previously called iwl3945_init() then
5708 * clear all bits but the RF Kill and SUSPEND bits and return */
5709 if (!iwl3945_is_init(priv)) {
5710 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5711 STATUS_RF_KILL_HW |
5712 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5713 STATUS_RF_KILL_SW |
5714 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5715 STATUS_GEO_CONFIGURED |
5716 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5717 STATUS_IN_SUSPEND |
5718 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5719 STATUS_EXIT_PENDING;
5720 goto exit;
5721 }
5722
5723 /* ...otherwise clear out all the status bits but the RF Kill and
5724 * SUSPEND bits and continue taking the NIC down. */
5725 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5726 STATUS_RF_KILL_HW |
5727 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5728 STATUS_RF_KILL_SW |
5729 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5730 STATUS_GEO_CONFIGURED |
5731 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5732 STATUS_IN_SUSPEND |
5733 test_bit(STATUS_FW_ERROR, &priv->status) <<
5734 STATUS_FW_ERROR |
5735 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5736 STATUS_EXIT_PENDING;
5737
5738 spin_lock_irqsave(&priv->lock, flags);
5739 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5740 spin_unlock_irqrestore(&priv->lock, flags);
5741
5742 iwl3945_hw_txq_ctx_stop(priv);
5743 iwl3945_hw_rxq_stop(priv);
5744
5745 spin_lock_irqsave(&priv->lock, flags);
5746 if (!iwl_grab_nic_access(priv)) {
5747 iwl_write_prph(priv, APMG_CLK_DIS_REG,
5748 APMG_CLK_VAL_DMA_CLK_RQT);
5749 iwl_release_nic_access(priv);
5750 }
5751 spin_unlock_irqrestore(&priv->lock, flags);
5752
5753 udelay(5);
5754
5755 iwl3945_hw_nic_stop_master(priv);
5756 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5757 iwl3945_hw_nic_reset(priv);
5758
5759 exit:
5760 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5761
5762 if (priv->ibss_beacon)
5763 dev_kfree_skb(priv->ibss_beacon);
5764 priv->ibss_beacon = NULL;
5765
5766 /* clear out any free frames */
5767 iwl3945_clear_free_frames(priv);
5768 }
5769
5770 static void iwl3945_down(struct iwl_priv *priv)
5771 {
5772 mutex_lock(&priv->mutex);
5773 __iwl3945_down(priv);
5774 mutex_unlock(&priv->mutex);
5775
5776 iwl3945_cancel_deferred_work(priv);
5777 }
5778
5779 #define MAX_HW_RESTARTS 5
5780
5781 static int __iwl3945_up(struct iwl_priv *priv)
5782 {
5783 int rc, i;
5784
5785 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5786 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5787 return -EIO;
5788 }
5789
5790 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5791 IWL_WARNING("Radio disabled by SW RF kill (module "
5792 "parameter)\n");
5793 return -ENODEV;
5794 }
5795
5796 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5797 IWL_ERROR("ucode not available for device bring up\n");
5798 return -EIO;
5799 }
5800
5801 /* If platform's RF_KILL switch is NOT set to KILL */
5802 if (iwl_read32(priv, CSR_GP_CNTRL) &
5803 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5804 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5805 else {
5806 set_bit(STATUS_RF_KILL_HW, &priv->status);
5807 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5808 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5809 return -ENODEV;
5810 }
5811 }
5812
5813 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5814
5815 rc = iwl3945_hw_nic_init(priv);
5816 if (rc) {
5817 IWL_ERROR("Unable to int nic\n");
5818 return rc;
5819 }
5820
5821 /* make sure rfkill handshake bits are cleared */
5822 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5823 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5824 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5825
5826 /* clear (again), then enable host interrupts */
5827 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5828 iwl3945_enable_interrupts(priv);
5829
5830 /* really make sure rfkill handshake bits are cleared */
5831 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5832 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5833
5834 /* Copy original ucode data image from disk into backup cache.
5835 * This will be used to initialize the on-board processor's
5836 * data SRAM for a clean start when the runtime program first loads. */
5837 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5838 priv->ucode_data.len);
5839
5840 /* We return success when we resume from suspend and rf_kill is on. */
5841 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5842 return 0;
5843
5844 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5845
5846 iwl3945_clear_stations_table(priv);
5847
5848 /* load bootstrap state machine,
5849 * load bootstrap program into processor's memory,
5850 * prepare to load the "initialize" uCode */
5851 rc = iwl3945_load_bsm(priv);
5852
5853 if (rc) {
5854 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
5855 continue;
5856 }
5857
5858 /* start card; "initialize" will load runtime ucode */
5859 iwl3945_nic_start(priv);
5860
5861 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5862
5863 return 0;
5864 }
5865
5866 set_bit(STATUS_EXIT_PENDING, &priv->status);
5867 __iwl3945_down(priv);
5868 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5869
5870 /* tried to restart and config the device for as long as our
5871 * patience could withstand */
5872 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5873 return -EIO;
5874 }
5875
5876
5877 /*****************************************************************************
5878 *
5879 * Workqueue callbacks
5880 *
5881 *****************************************************************************/
5882
5883 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5884 {
5885 struct iwl_priv *priv =
5886 container_of(data, struct iwl_priv, init_alive_start.work);
5887
5888 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5889 return;
5890
5891 mutex_lock(&priv->mutex);
5892 iwl3945_init_alive_start(priv);
5893 mutex_unlock(&priv->mutex);
5894 }
5895
5896 static void iwl3945_bg_alive_start(struct work_struct *data)
5897 {
5898 struct iwl_priv *priv =
5899 container_of(data, struct iwl_priv, alive_start.work);
5900
5901 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5902 return;
5903
5904 mutex_lock(&priv->mutex);
5905 iwl3945_alive_start(priv);
5906 mutex_unlock(&priv->mutex);
5907 }
5908
5909 static void iwl3945_bg_rf_kill(struct work_struct *work)
5910 {
5911 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
5912
5913 wake_up_interruptible(&priv->wait_command_queue);
5914
5915 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5916 return;
5917
5918 mutex_lock(&priv->mutex);
5919
5920 if (!iwl3945_is_rfkill(priv)) {
5921 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5922 "HW and/or SW RF Kill no longer active, restarting "
5923 "device\n");
5924 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5925 queue_work(priv->workqueue, &priv->restart);
5926 } else {
5927
5928 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5929 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5930 "disabled by SW switch\n");
5931 else
5932 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
5933 "Kill switch must be turned off for "
5934 "wireless networking to work.\n");
5935 }
5936
5937 mutex_unlock(&priv->mutex);
5938 iwl3945_rfkill_set_hw_state(priv);
5939 }
5940
5941 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5942
5943 static void iwl3945_bg_scan_check(struct work_struct *data)
5944 {
5945 struct iwl_priv *priv =
5946 container_of(data, struct iwl_priv, scan_check.work);
5947
5948 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5949 return;
5950
5951 mutex_lock(&priv->mutex);
5952 if (test_bit(STATUS_SCANNING, &priv->status) ||
5953 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5954 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5955 "Scan completion watchdog resetting adapter (%dms)\n",
5956 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
5957
5958 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5959 iwl3945_send_scan_abort(priv);
5960 }
5961 mutex_unlock(&priv->mutex);
5962 }
5963
5964 static void iwl3945_bg_request_scan(struct work_struct *data)
5965 {
5966 struct iwl_priv *priv =
5967 container_of(data, struct iwl_priv, request_scan);
5968 struct iwl3945_host_cmd cmd = {
5969 .id = REPLY_SCAN_CMD,
5970 .len = sizeof(struct iwl3945_scan_cmd),
5971 .meta.flags = CMD_SIZE_HUGE,
5972 };
5973 int rc = 0;
5974 struct iwl3945_scan_cmd *scan;
5975 struct ieee80211_conf *conf = NULL;
5976 u8 n_probes = 2;
5977 enum ieee80211_band band;
5978 DECLARE_SSID_BUF(ssid);
5979
5980 conf = ieee80211_get_hw_conf(priv->hw);
5981
5982 mutex_lock(&priv->mutex);
5983
5984 if (!iwl3945_is_ready(priv)) {
5985 IWL_WARNING("request scan called when driver not ready.\n");
5986 goto done;
5987 }
5988
5989 /* Make sure the scan wasn't canceled before this queued work
5990 * was given the chance to run... */
5991 if (!test_bit(STATUS_SCANNING, &priv->status))
5992 goto done;
5993
5994 /* This should never be called or scheduled if there is currently
5995 * a scan active in the hardware. */
5996 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5997 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5998 "Ignoring second request.\n");
5999 rc = -EIO;
6000 goto done;
6001 }
6002
6003 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6004 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6005 goto done;
6006 }
6007
6008 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6009 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6010 goto done;
6011 }
6012
6013 if (iwl3945_is_rfkill(priv)) {
6014 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6015 goto done;
6016 }
6017
6018 if (!test_bit(STATUS_READY, &priv->status)) {
6019 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6020 goto done;
6021 }
6022
6023 if (!priv->scan_bands) {
6024 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6025 goto done;
6026 }
6027
6028 if (!priv->scan39) {
6029 priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6030 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6031 if (!priv->scan39) {
6032 rc = -ENOMEM;
6033 goto done;
6034 }
6035 }
6036 scan = priv->scan39;
6037 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6038
6039 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6040 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6041
6042 if (iwl3945_is_associated(priv)) {
6043 u16 interval = 0;
6044 u32 extra;
6045 u32 suspend_time = 100;
6046 u32 scan_suspend_time = 100;
6047 unsigned long flags;
6048
6049 IWL_DEBUG_INFO("Scanning while associated...\n");
6050
6051 spin_lock_irqsave(&priv->lock, flags);
6052 interval = priv->beacon_int;
6053 spin_unlock_irqrestore(&priv->lock, flags);
6054
6055 scan->suspend_time = 0;
6056 scan->max_out_time = cpu_to_le32(200 * 1024);
6057 if (!interval)
6058 interval = suspend_time;
6059 /*
6060 * suspend time format:
6061 * 0-19: beacon interval in usec (time before exec.)
6062 * 20-23: 0
6063 * 24-31: number of beacons (suspend between channels)
6064 */
6065
6066 extra = (suspend_time / interval) << 24;
6067 scan_suspend_time = 0xFF0FFFFF &
6068 (extra | ((suspend_time % interval) * 1024));
6069
6070 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6071 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6072 scan_suspend_time, interval);
6073 }
6074
6075 /* We should add the ability for user to lock to PASSIVE ONLY */
6076 if (priv->one_direct_scan) {
6077 IWL_DEBUG_SCAN
6078 ("Kicking off one direct scan for '%s'\n",
6079 print_ssid(ssid, priv->direct_ssid,
6080 priv->direct_ssid_len));
6081 scan->direct_scan[0].id = WLAN_EID_SSID;
6082 scan->direct_scan[0].len = priv->direct_ssid_len;
6083 memcpy(scan->direct_scan[0].ssid,
6084 priv->direct_ssid, priv->direct_ssid_len);
6085 n_probes++;
6086 } else
6087 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6088
6089 /* We don't build a direct scan probe request; the uCode will do
6090 * that based on the direct_mask added to each channel entry */
6091 scan->tx_cmd.len = cpu_to_le16(
6092 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6093 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
6094 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6095 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
6096 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6097
6098 /* flags + rate selection */
6099
6100 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
6101 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6102 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6103 scan->good_CRC_th = 0;
6104 band = IEEE80211_BAND_2GHZ;
6105 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
6106 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6107 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6108 band = IEEE80211_BAND_5GHZ;
6109 } else {
6110 IWL_WARNING("Invalid scan band count\n");
6111 goto done;
6112 }
6113
6114 /* select Rx antennas */
6115 scan->flags |= iwl3945_get_antenna_flags(priv);
6116
6117 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
6118 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6119
6120 scan->channel_count =
6121 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
6122 n_probes,
6123 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6124
6125 if (scan->channel_count == 0) {
6126 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
6127 goto done;
6128 }
6129
6130 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6131 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6132 cmd.data = scan;
6133 scan->len = cpu_to_le16(cmd.len);
6134
6135 set_bit(STATUS_SCAN_HW, &priv->status);
6136 rc = iwl3945_send_cmd_sync(priv, &cmd);
6137 if (rc)
6138 goto done;
6139
6140 queue_delayed_work(priv->workqueue, &priv->scan_check,
6141 IWL_SCAN_CHECK_WATCHDOG);
6142
6143 mutex_unlock(&priv->mutex);
6144 return;
6145
6146 done:
6147 /* can not perform scan make sure we clear scanning
6148 * bits from status so next scan request can be performed.
6149 * if we dont clear scanning status bit here all next scan
6150 * will fail
6151 */
6152 clear_bit(STATUS_SCAN_HW, &priv->status);
6153 clear_bit(STATUS_SCANNING, &priv->status);
6154
6155 /* inform mac80211 scan aborted */
6156 queue_work(priv->workqueue, &priv->scan_completed);
6157 mutex_unlock(&priv->mutex);
6158 }
6159
6160 static void iwl3945_bg_up(struct work_struct *data)
6161 {
6162 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
6163
6164 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6165 return;
6166
6167 mutex_lock(&priv->mutex);
6168 __iwl3945_up(priv);
6169 mutex_unlock(&priv->mutex);
6170 iwl3945_rfkill_set_hw_state(priv);
6171 }
6172
6173 static void iwl3945_bg_restart(struct work_struct *data)
6174 {
6175 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
6176
6177 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6178 return;
6179
6180 iwl3945_down(priv);
6181 queue_work(priv->workqueue, &priv->up);
6182 }
6183
6184 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6185 {
6186 struct iwl_priv *priv =
6187 container_of(data, struct iwl_priv, rx_replenish);
6188
6189 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6190 return;
6191
6192 mutex_lock(&priv->mutex);
6193 iwl3945_rx_replenish(priv);
6194 mutex_unlock(&priv->mutex);
6195 }
6196
6197 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6198
6199 static void iwl3945_post_associate(struct iwl_priv *priv)
6200 {
6201 int rc = 0;
6202 struct ieee80211_conf *conf = NULL;
6203
6204 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6205 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
6206 return;
6207 }
6208
6209
6210 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
6211 priv->assoc_id, priv->active39_rxon.bssid_addr);
6212
6213 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6214 return;
6215
6216 if (!priv->vif || !priv->is_open)
6217 return;
6218
6219 iwl3945_scan_cancel_timeout(priv, 200);
6220
6221 conf = ieee80211_get_hw_conf(priv->hw);
6222
6223 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6224 iwl3945_commit_rxon(priv);
6225
6226 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6227 iwl3945_setup_rxon_timing(priv);
6228 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6229 sizeof(priv->rxon_timing), &priv->rxon_timing);
6230 if (rc)
6231 IWL_WARNING("REPLY_RXON_TIMING failed - "
6232 "Attempting to continue.\n");
6233
6234 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6235
6236 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6237
6238 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6239 priv->assoc_id, priv->beacon_int);
6240
6241 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6242 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6243 else
6244 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6245
6246 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6247 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6248 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6249 else
6250 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6251
6252 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6253 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6254
6255 }
6256
6257 iwl3945_commit_rxon(priv);
6258
6259 switch (priv->iw_mode) {
6260 case NL80211_IFTYPE_STATION:
6261 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6262 break;
6263
6264 case NL80211_IFTYPE_ADHOC:
6265
6266 priv->assoc_id = 1;
6267 iwl3945_add_station(priv, priv->bssid, 0, 0);
6268 iwl3945_sync_sta(priv, IWL_STA_ID,
6269 (priv->band == IEEE80211_BAND_5GHZ) ?
6270 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6271 CMD_ASYNC);
6272 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6273 iwl3945_send_beacon_cmd(priv);
6274
6275 break;
6276
6277 default:
6278 IWL_ERROR("%s Should not be called in %d mode\n",
6279 __func__, priv->iw_mode);
6280 break;
6281 }
6282
6283 iwl3945_activate_qos(priv, 0);
6284
6285 /* we have just associated, don't start scan too early */
6286 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6287 }
6288
6289 static void iwl3945_bg_abort_scan(struct work_struct *work)
6290 {
6291 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
6292
6293 if (!iwl3945_is_ready(priv))
6294 return;
6295
6296 mutex_lock(&priv->mutex);
6297
6298 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6299 iwl3945_send_scan_abort(priv);
6300
6301 mutex_unlock(&priv->mutex);
6302 }
6303
6304 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6305
6306 static void iwl3945_bg_scan_completed(struct work_struct *work)
6307 {
6308 struct iwl_priv *priv =
6309 container_of(work, struct iwl_priv, scan_completed);
6310
6311 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6312
6313 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6314 return;
6315
6316 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6317 iwl3945_mac_config(priv->hw, 0);
6318
6319 ieee80211_scan_completed(priv->hw);
6320
6321 /* Since setting the TXPOWER may have been deferred while
6322 * performing the scan, fire one off */
6323 mutex_lock(&priv->mutex);
6324 iwl3945_hw_reg_send_txpower(priv);
6325 mutex_unlock(&priv->mutex);
6326 }
6327
6328 /*****************************************************************************
6329 *
6330 * mac80211 entry point functions
6331 *
6332 *****************************************************************************/
6333
6334 #define UCODE_READY_TIMEOUT (2 * HZ)
6335
6336 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6337 {
6338 struct iwl_priv *priv = hw->priv;
6339 int ret;
6340
6341 IWL_DEBUG_MAC80211("enter\n");
6342
6343 if (pci_enable_device(priv->pci_dev)) {
6344 IWL_ERROR("Fail to pci_enable_device\n");
6345 return -ENODEV;
6346 }
6347 pci_restore_state(priv->pci_dev);
6348 pci_enable_msi(priv->pci_dev);
6349
6350 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6351 DRV_NAME, priv);
6352 if (ret) {
6353 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6354 goto out_disable_msi;
6355 }
6356
6357 /* we should be verifying the device is ready to be opened */
6358 mutex_lock(&priv->mutex);
6359
6360 memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6361 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6362 * ucode filename and max sizes are card-specific. */
6363
6364 if (!priv->ucode_code.len) {
6365 ret = iwl3945_read_ucode(priv);
6366 if (ret) {
6367 IWL_ERROR("Could not read microcode: %d\n", ret);
6368 mutex_unlock(&priv->mutex);
6369 goto out_release_irq;
6370 }
6371 }
6372
6373 ret = __iwl3945_up(priv);
6374
6375 mutex_unlock(&priv->mutex);
6376
6377 iwl3945_rfkill_set_hw_state(priv);
6378
6379 if (ret)
6380 goto out_release_irq;
6381
6382 IWL_DEBUG_INFO("Start UP work.\n");
6383
6384 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6385 return 0;
6386
6387 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6388 * mac80211 will not be run successfully. */
6389 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6390 test_bit(STATUS_READY, &priv->status),
6391 UCODE_READY_TIMEOUT);
6392 if (!ret) {
6393 if (!test_bit(STATUS_READY, &priv->status)) {
6394 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6395 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6396 ret = -ETIMEDOUT;
6397 goto out_release_irq;
6398 }
6399 }
6400
6401 priv->is_open = 1;
6402 IWL_DEBUG_MAC80211("leave\n");
6403 return 0;
6404
6405 out_release_irq:
6406 free_irq(priv->pci_dev->irq, priv);
6407 out_disable_msi:
6408 pci_disable_msi(priv->pci_dev);
6409 pci_disable_device(priv->pci_dev);
6410 priv->is_open = 0;
6411 IWL_DEBUG_MAC80211("leave - failed\n");
6412 return ret;
6413 }
6414
6415 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6416 {
6417 struct iwl_priv *priv = hw->priv;
6418
6419 IWL_DEBUG_MAC80211("enter\n");
6420
6421 if (!priv->is_open) {
6422 IWL_DEBUG_MAC80211("leave - skip\n");
6423 return;
6424 }
6425
6426 priv->is_open = 0;
6427
6428 if (iwl3945_is_ready_rf(priv)) {
6429 /* stop mac, cancel any scan request and clear
6430 * RXON_FILTER_ASSOC_MSK BIT
6431 */
6432 mutex_lock(&priv->mutex);
6433 iwl3945_scan_cancel_timeout(priv, 100);
6434 mutex_unlock(&priv->mutex);
6435 }
6436
6437 iwl3945_down(priv);
6438
6439 flush_workqueue(priv->workqueue);
6440 free_irq(priv->pci_dev->irq, priv);
6441 pci_disable_msi(priv->pci_dev);
6442 pci_save_state(priv->pci_dev);
6443 pci_disable_device(priv->pci_dev);
6444
6445 IWL_DEBUG_MAC80211("leave\n");
6446 }
6447
6448 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6449 {
6450 struct iwl_priv *priv = hw->priv;
6451
6452 IWL_DEBUG_MAC80211("enter\n");
6453
6454 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6455 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6456
6457 if (iwl3945_tx_skb(priv, skb))
6458 dev_kfree_skb_any(skb);
6459
6460 IWL_DEBUG_MAC80211("leave\n");
6461 return NETDEV_TX_OK;
6462 }
6463
6464 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6465 struct ieee80211_if_init_conf *conf)
6466 {
6467 struct iwl_priv *priv = hw->priv;
6468 unsigned long flags;
6469
6470 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6471
6472 if (priv->vif) {
6473 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6474 return -EOPNOTSUPP;
6475 }
6476
6477 spin_lock_irqsave(&priv->lock, flags);
6478 priv->vif = conf->vif;
6479 priv->iw_mode = conf->type;
6480
6481 spin_unlock_irqrestore(&priv->lock, flags);
6482
6483 mutex_lock(&priv->mutex);
6484
6485 if (conf->mac_addr) {
6486 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6487 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6488 }
6489
6490 if (iwl3945_is_ready(priv))
6491 iwl3945_set_mode(priv, conf->type);
6492
6493 mutex_unlock(&priv->mutex);
6494
6495 IWL_DEBUG_MAC80211("leave\n");
6496 return 0;
6497 }
6498
6499 /**
6500 * iwl3945_mac_config - mac80211 config callback
6501 *
6502 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6503 * be set inappropriately and the driver currently sets the hardware up to
6504 * use it whenever needed.
6505 */
6506 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6507 {
6508 struct iwl_priv *priv = hw->priv;
6509 const struct iwl_channel_info *ch_info;
6510 struct ieee80211_conf *conf = &hw->conf;
6511 unsigned long flags;
6512 int ret = 0;
6513
6514 mutex_lock(&priv->mutex);
6515 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6516
6517 if (!iwl3945_is_ready(priv)) {
6518 IWL_DEBUG_MAC80211("leave - not ready\n");
6519 ret = -EIO;
6520 goto out;
6521 }
6522
6523 if (unlikely(!iwl3945_param_disable_hw_scan &&
6524 test_bit(STATUS_SCANNING, &priv->status))) {
6525 IWL_DEBUG_MAC80211("leave - scanning\n");
6526 set_bit(STATUS_CONF_PENDING, &priv->status);
6527 mutex_unlock(&priv->mutex);
6528 return 0;
6529 }
6530
6531 spin_lock_irqsave(&priv->lock, flags);
6532
6533 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6534 conf->channel->hw_value);
6535 if (!is_channel_valid(ch_info)) {
6536 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6537 conf->channel->hw_value, conf->channel->band);
6538 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6539 spin_unlock_irqrestore(&priv->lock, flags);
6540 ret = -EINVAL;
6541 goto out;
6542 }
6543
6544 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6545
6546 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6547
6548 /* The list of supported rates and rate mask can be different
6549 * for each phymode; since the phymode may have changed, reset
6550 * the rate mask to what mac80211 lists */
6551 iwl3945_set_rate(priv);
6552
6553 spin_unlock_irqrestore(&priv->lock, flags);
6554
6555 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6556 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6557 iwl3945_hw_channel_switch(priv, conf->channel);
6558 goto out;
6559 }
6560 #endif
6561
6562 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6563
6564 if (!conf->radio_enabled) {
6565 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6566 goto out;
6567 }
6568
6569 if (iwl3945_is_rfkill(priv)) {
6570 IWL_DEBUG_MAC80211("leave - RF kill\n");
6571 ret = -EIO;
6572 goto out;
6573 }
6574
6575 iwl3945_set_rate(priv);
6576
6577 if (memcmp(&priv->active39_rxon,
6578 &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
6579 iwl3945_commit_rxon(priv);
6580 else
6581 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6582
6583 IWL_DEBUG_MAC80211("leave\n");
6584
6585 out:
6586 clear_bit(STATUS_CONF_PENDING, &priv->status);
6587 mutex_unlock(&priv->mutex);
6588 return ret;
6589 }
6590
6591 static void iwl3945_config_ap(struct iwl_priv *priv)
6592 {
6593 int rc = 0;
6594
6595 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6596 return;
6597
6598 /* The following should be done only at AP bring up */
6599 if (!(iwl3945_is_associated(priv))) {
6600
6601 /* RXON - unassoc (to set timing command) */
6602 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6603 iwl3945_commit_rxon(priv);
6604
6605 /* RXON Timing */
6606 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6607 iwl3945_setup_rxon_timing(priv);
6608 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6609 sizeof(priv->rxon_timing), &priv->rxon_timing);
6610 if (rc)
6611 IWL_WARNING("REPLY_RXON_TIMING failed - "
6612 "Attempting to continue.\n");
6613
6614 /* FIXME: what should be the assoc_id for AP? */
6615 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6616 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6617 priv->staging39_rxon.flags |=
6618 RXON_FLG_SHORT_PREAMBLE_MSK;
6619 else
6620 priv->staging39_rxon.flags &=
6621 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6622
6623 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6624 if (priv->assoc_capability &
6625 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6626 priv->staging39_rxon.flags |=
6627 RXON_FLG_SHORT_SLOT_MSK;
6628 else
6629 priv->staging39_rxon.flags &=
6630 ~RXON_FLG_SHORT_SLOT_MSK;
6631
6632 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6633 priv->staging39_rxon.flags &=
6634 ~RXON_FLG_SHORT_SLOT_MSK;
6635 }
6636 /* restore RXON assoc */
6637 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6638 iwl3945_commit_rxon(priv);
6639 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
6640 }
6641 iwl3945_send_beacon_cmd(priv);
6642
6643 /* FIXME - we need to add code here to detect a totally new
6644 * configuration, reset the AP, unassoc, rxon timing, assoc,
6645 * clear sta table, add BCAST sta... */
6646 }
6647
6648 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6649 struct ieee80211_vif *vif,
6650 struct ieee80211_if_conf *conf)
6651 {
6652 struct iwl_priv *priv = hw->priv;
6653 int rc;
6654
6655 if (conf == NULL)
6656 return -EIO;
6657
6658 if (priv->vif != vif) {
6659 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6660 return 0;
6661 }
6662
6663 /* handle this temporarily here */
6664 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6665 conf->changed & IEEE80211_IFCC_BEACON) {
6666 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6667 if (!beacon)
6668 return -ENOMEM;
6669 mutex_lock(&priv->mutex);
6670 rc = iwl3945_mac_beacon_update(hw, beacon);
6671 mutex_unlock(&priv->mutex);
6672 if (rc)
6673 return rc;
6674 }
6675
6676 if (!iwl3945_is_alive(priv))
6677 return -EAGAIN;
6678
6679 mutex_lock(&priv->mutex);
6680
6681 if (conf->bssid)
6682 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6683
6684 /*
6685 * very dubious code was here; the probe filtering flag is never set:
6686 *
6687 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6688 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6689 */
6690
6691 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6692 if (!conf->bssid) {
6693 conf->bssid = priv->mac_addr;
6694 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6695 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6696 conf->bssid);
6697 }
6698 if (priv->ibss_beacon)
6699 dev_kfree_skb(priv->ibss_beacon);
6700
6701 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6702 }
6703
6704 if (iwl3945_is_rfkill(priv))
6705 goto done;
6706
6707 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6708 !is_multicast_ether_addr(conf->bssid)) {
6709 /* If there is currently a HW scan going on in the background
6710 * then we need to cancel it else the RXON below will fail. */
6711 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6712 IWL_WARNING("Aborted scan still in progress "
6713 "after 100ms\n");
6714 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6715 mutex_unlock(&priv->mutex);
6716 return -EAGAIN;
6717 }
6718 memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6719
6720 /* TODO: Audit driver for usage of these members and see
6721 * if mac80211 deprecates them (priv->bssid looks like it
6722 * shouldn't be there, but I haven't scanned the IBSS code
6723 * to verify) - jpk */
6724 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6725
6726 if (priv->iw_mode == NL80211_IFTYPE_AP)
6727 iwl3945_config_ap(priv);
6728 else {
6729 rc = iwl3945_commit_rxon(priv);
6730 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6731 iwl3945_add_station(priv,
6732 priv->active39_rxon.bssid_addr, 1, 0);
6733 }
6734
6735 } else {
6736 iwl3945_scan_cancel_timeout(priv, 100);
6737 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6738 iwl3945_commit_rxon(priv);
6739 }
6740
6741 done:
6742 IWL_DEBUG_MAC80211("leave\n");
6743 mutex_unlock(&priv->mutex);
6744
6745 return 0;
6746 }
6747
6748 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6749 unsigned int changed_flags,
6750 unsigned int *total_flags,
6751 int mc_count, struct dev_addr_list *mc_list)
6752 {
6753 struct iwl_priv *priv = hw->priv;
6754 __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
6755
6756 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6757 changed_flags, *total_flags);
6758
6759 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6760 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6761 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6762 else
6763 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6764 }
6765 if (changed_flags & FIF_ALLMULTI) {
6766 if (*total_flags & FIF_ALLMULTI)
6767 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6768 else
6769 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6770 }
6771 if (changed_flags & FIF_CONTROL) {
6772 if (*total_flags & FIF_CONTROL)
6773 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6774 else
6775 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6776 }
6777 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6778 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6779 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6780 else
6781 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6782 }
6783
6784 /* We avoid iwl_commit_rxon here to commit the new filter flags
6785 * since mac80211 will call ieee80211_hw_config immediately.
6786 * (mc_list is not supported at this time). Otherwise, we need to
6787 * queue a background iwl_commit_rxon work.
6788 */
6789
6790 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6791 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6792 }
6793
6794 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6795 struct ieee80211_if_init_conf *conf)
6796 {
6797 struct iwl_priv *priv = hw->priv;
6798
6799 IWL_DEBUG_MAC80211("enter\n");
6800
6801 mutex_lock(&priv->mutex);
6802
6803 if (iwl3945_is_ready_rf(priv)) {
6804 iwl3945_scan_cancel_timeout(priv, 100);
6805 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6806 iwl3945_commit_rxon(priv);
6807 }
6808 if (priv->vif == conf->vif) {
6809 priv->vif = NULL;
6810 memset(priv->bssid, 0, ETH_ALEN);
6811 }
6812 mutex_unlock(&priv->mutex);
6813
6814 IWL_DEBUG_MAC80211("leave\n");
6815 }
6816
6817 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6818
6819 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6820 struct ieee80211_vif *vif,
6821 struct ieee80211_bss_conf *bss_conf,
6822 u32 changes)
6823 {
6824 struct iwl_priv *priv = hw->priv;
6825
6826 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6827
6828 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6829 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6830 bss_conf->use_short_preamble);
6831 if (bss_conf->use_short_preamble)
6832 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6833 else
6834 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6835 }
6836
6837 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6838 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6839 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6840 priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6841 else
6842 priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6843 }
6844
6845 if (changes & BSS_CHANGED_ASSOC) {
6846 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6847 /* This should never happen as this function should
6848 * never be called from interrupt context. */
6849 if (WARN_ON_ONCE(in_interrupt()))
6850 return;
6851 if (bss_conf->assoc) {
6852 priv->assoc_id = bss_conf->aid;
6853 priv->beacon_int = bss_conf->beacon_int;
6854 priv->timestamp = bss_conf->timestamp;
6855 priv->assoc_capability = bss_conf->assoc_capability;
6856 priv->next_scan_jiffies = jiffies +
6857 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6858 mutex_lock(&priv->mutex);
6859 iwl3945_post_associate(priv);
6860 mutex_unlock(&priv->mutex);
6861 } else {
6862 priv->assoc_id = 0;
6863 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6864 }
6865 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6866 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6867 iwl3945_send_rxon_assoc(priv);
6868 }
6869
6870 }
6871
6872 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6873 {
6874 int rc = 0;
6875 unsigned long flags;
6876 struct iwl_priv *priv = hw->priv;
6877 DECLARE_SSID_BUF(ssid_buf);
6878
6879 IWL_DEBUG_MAC80211("enter\n");
6880
6881 mutex_lock(&priv->mutex);
6882 spin_lock_irqsave(&priv->lock, flags);
6883
6884 if (!iwl3945_is_ready_rf(priv)) {
6885 rc = -EIO;
6886 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6887 goto out_unlock;
6888 }
6889
6890 /* we don't schedule scan within next_scan_jiffies period */
6891 if (priv->next_scan_jiffies &&
6892 time_after(priv->next_scan_jiffies, jiffies)) {
6893 rc = -EAGAIN;
6894 goto out_unlock;
6895 }
6896 /* if we just finished scan ask for delay for a broadcast scan */
6897 if ((len == 0) && priv->last_scan_jiffies &&
6898 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6899 jiffies)) {
6900 rc = -EAGAIN;
6901 goto out_unlock;
6902 }
6903 if (len) {
6904 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6905 print_ssid(ssid_buf, ssid, len), (int)len);
6906
6907 priv->one_direct_scan = 1;
6908 priv->direct_ssid_len = (u8)
6909 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6910 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6911 } else
6912 priv->one_direct_scan = 0;
6913
6914 rc = iwl3945_scan_initiate(priv);
6915
6916 IWL_DEBUG_MAC80211("leave\n");
6917
6918 out_unlock:
6919 spin_unlock_irqrestore(&priv->lock, flags);
6920 mutex_unlock(&priv->mutex);
6921
6922 return rc;
6923 }
6924
6925 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
6926 const u8 *local_addr, const u8 *addr,
6927 struct ieee80211_key_conf *key)
6928 {
6929 struct iwl_priv *priv = hw->priv;
6930 int rc = 0;
6931 u8 sta_id;
6932
6933 IWL_DEBUG_MAC80211("enter\n");
6934
6935 if (!iwl3945_param_hwcrypto) {
6936 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6937 return -EOPNOTSUPP;
6938 }
6939
6940 if (is_zero_ether_addr(addr))
6941 /* only support pairwise keys */
6942 return -EOPNOTSUPP;
6943
6944 sta_id = iwl3945_hw_find_station(priv, addr);
6945 if (sta_id == IWL_INVALID_STATION) {
6946 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
6947 addr);
6948 return -EINVAL;
6949 }
6950
6951 mutex_lock(&priv->mutex);
6952
6953 iwl3945_scan_cancel_timeout(priv, 100);
6954
6955 switch (cmd) {
6956 case SET_KEY:
6957 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
6958 if (!rc) {
6959 iwl3945_set_rxon_hwcrypto(priv, 1);
6960 iwl3945_commit_rxon(priv);
6961 key->hw_key_idx = sta_id;
6962 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
6963 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
6964 }
6965 break;
6966 case DISABLE_KEY:
6967 rc = iwl3945_clear_sta_key_info(priv, sta_id);
6968 if (!rc) {
6969 iwl3945_set_rxon_hwcrypto(priv, 0);
6970 iwl3945_commit_rxon(priv);
6971 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
6972 }
6973 break;
6974 default:
6975 rc = -EINVAL;
6976 }
6977
6978 IWL_DEBUG_MAC80211("leave\n");
6979 mutex_unlock(&priv->mutex);
6980
6981 return rc;
6982 }
6983
6984 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
6985 const struct ieee80211_tx_queue_params *params)
6986 {
6987 struct iwl_priv *priv = hw->priv;
6988 unsigned long flags;
6989 int q;
6990
6991 IWL_DEBUG_MAC80211("enter\n");
6992
6993 if (!iwl3945_is_ready_rf(priv)) {
6994 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6995 return -EIO;
6996 }
6997
6998 if (queue >= AC_NUM) {
6999 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7000 return 0;
7001 }
7002
7003 q = AC_NUM - 1 - queue;
7004
7005 spin_lock_irqsave(&priv->lock, flags);
7006
7007 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7008 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7009 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7010 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7011 cpu_to_le16((params->txop * 32));
7012
7013 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7014 priv->qos_data.qos_active = 1;
7015
7016 spin_unlock_irqrestore(&priv->lock, flags);
7017
7018 mutex_lock(&priv->mutex);
7019 if (priv->iw_mode == NL80211_IFTYPE_AP)
7020 iwl3945_activate_qos(priv, 1);
7021 else if (priv->assoc_id && iwl3945_is_associated(priv))
7022 iwl3945_activate_qos(priv, 0);
7023
7024 mutex_unlock(&priv->mutex);
7025
7026 IWL_DEBUG_MAC80211("leave\n");
7027 return 0;
7028 }
7029
7030 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7031 struct ieee80211_tx_queue_stats *stats)
7032 {
7033 struct iwl_priv *priv = hw->priv;
7034 int i, avail;
7035 struct iwl3945_tx_queue *txq;
7036 struct iwl_queue *q;
7037 unsigned long flags;
7038
7039 IWL_DEBUG_MAC80211("enter\n");
7040
7041 if (!iwl3945_is_ready_rf(priv)) {
7042 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7043 return -EIO;
7044 }
7045
7046 spin_lock_irqsave(&priv->lock, flags);
7047
7048 for (i = 0; i < AC_NUM; i++) {
7049 txq = &priv->txq39[i];
7050 q = &txq->q;
7051 avail = iwl_queue_space(q);
7052
7053 stats[i].len = q->n_window - avail;
7054 stats[i].limit = q->n_window - q->high_mark;
7055 stats[i].count = q->n_window;
7056
7057 }
7058 spin_unlock_irqrestore(&priv->lock, flags);
7059
7060 IWL_DEBUG_MAC80211("leave\n");
7061
7062 return 0;
7063 }
7064
7065 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7066 {
7067 struct iwl_priv *priv = hw->priv;
7068 unsigned long flags;
7069
7070 mutex_lock(&priv->mutex);
7071 IWL_DEBUG_MAC80211("enter\n");
7072
7073 iwl3945_reset_qos(priv);
7074
7075 spin_lock_irqsave(&priv->lock, flags);
7076 priv->assoc_id = 0;
7077 priv->assoc_capability = 0;
7078 priv->call_post_assoc_from_beacon = 0;
7079
7080 /* new association get rid of ibss beacon skb */
7081 if (priv->ibss_beacon)
7082 dev_kfree_skb(priv->ibss_beacon);
7083
7084 priv->ibss_beacon = NULL;
7085
7086 priv->beacon_int = priv->hw->conf.beacon_int;
7087 priv->timestamp = 0;
7088 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
7089 priv->beacon_int = 0;
7090
7091 spin_unlock_irqrestore(&priv->lock, flags);
7092
7093 if (!iwl3945_is_ready_rf(priv)) {
7094 IWL_DEBUG_MAC80211("leave - not ready\n");
7095 mutex_unlock(&priv->mutex);
7096 return;
7097 }
7098
7099 /* we are restarting association process
7100 * clear RXON_FILTER_ASSOC_MSK bit
7101 */
7102 if (priv->iw_mode != NL80211_IFTYPE_AP) {
7103 iwl3945_scan_cancel_timeout(priv, 100);
7104 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7105 iwl3945_commit_rxon(priv);
7106 }
7107
7108 /* Per mac80211.h: This is only used in IBSS mode... */
7109 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7110
7111 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7112 mutex_unlock(&priv->mutex);
7113 return;
7114 }
7115
7116 iwl3945_set_rate(priv);
7117
7118 mutex_unlock(&priv->mutex);
7119
7120 IWL_DEBUG_MAC80211("leave\n");
7121
7122 }
7123
7124 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
7125 {
7126 struct iwl_priv *priv = hw->priv;
7127 unsigned long flags;
7128
7129 IWL_DEBUG_MAC80211("enter\n");
7130
7131 if (!iwl3945_is_ready_rf(priv)) {
7132 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7133 return -EIO;
7134 }
7135
7136 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7137 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7138 return -EIO;
7139 }
7140
7141 spin_lock_irqsave(&priv->lock, flags);
7142
7143 if (priv->ibss_beacon)
7144 dev_kfree_skb(priv->ibss_beacon);
7145
7146 priv->ibss_beacon = skb;
7147
7148 priv->assoc_id = 0;
7149
7150 IWL_DEBUG_MAC80211("leave\n");
7151 spin_unlock_irqrestore(&priv->lock, flags);
7152
7153 iwl3945_reset_qos(priv);
7154
7155 iwl3945_post_associate(priv);
7156
7157
7158 return 0;
7159 }
7160
7161 /*****************************************************************************
7162 *
7163 * sysfs attributes
7164 *
7165 *****************************************************************************/
7166
7167 #ifdef CONFIG_IWL3945_DEBUG
7168
7169 /*
7170 * The following adds a new attribute to the sysfs representation
7171 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7172 * used for controlling the debug level.
7173 *
7174 * See the level definitions in iwl for details.
7175 */
7176 static ssize_t show_debug_level(struct device *d,
7177 struct device_attribute *attr, char *buf)
7178 {
7179 struct iwl_priv *priv = d->driver_data;
7180
7181 return sprintf(buf, "0x%08X\n", priv->debug_level);
7182 }
7183 static ssize_t store_debug_level(struct device *d,
7184 struct device_attribute *attr,
7185 const char *buf, size_t count)
7186 {
7187 struct iwl_priv *priv = d->driver_data;
7188 unsigned long val;
7189 int ret;
7190
7191 ret = strict_strtoul(buf, 0, &val);
7192 if (ret)
7193 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
7194 else
7195 priv->debug_level = val;
7196
7197 return strnlen(buf, count);
7198 }
7199
7200 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
7201 show_debug_level, store_debug_level);
7202
7203 #endif /* CONFIG_IWL3945_DEBUG */
7204
7205 static ssize_t show_temperature(struct device *d,
7206 struct device_attribute *attr, char *buf)
7207 {
7208 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7209
7210 if (!iwl3945_is_alive(priv))
7211 return -EAGAIN;
7212
7213 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7214 }
7215
7216 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7217
7218 static ssize_t show_tx_power(struct device *d,
7219 struct device_attribute *attr, char *buf)
7220 {
7221 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7222 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7223 }
7224
7225 static ssize_t store_tx_power(struct device *d,
7226 struct device_attribute *attr,
7227 const char *buf, size_t count)
7228 {
7229 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7230 char *p = (char *)buf;
7231 u32 val;
7232
7233 val = simple_strtoul(p, &p, 10);
7234 if (p == buf)
7235 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
7236 else
7237 iwl3945_hw_reg_set_txpower(priv, val);
7238
7239 return count;
7240 }
7241
7242 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7243
7244 static ssize_t show_flags(struct device *d,
7245 struct device_attribute *attr, char *buf)
7246 {
7247 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7248
7249 return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
7250 }
7251
7252 static ssize_t store_flags(struct device *d,
7253 struct device_attribute *attr,
7254 const char *buf, size_t count)
7255 {
7256 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7257 u32 flags = simple_strtoul(buf, NULL, 0);
7258
7259 mutex_lock(&priv->mutex);
7260 if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
7261 /* Cancel any currently running scans... */
7262 if (iwl3945_scan_cancel_timeout(priv, 100))
7263 IWL_WARNING("Could not cancel scan.\n");
7264 else {
7265 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7266 flags);
7267 priv->staging39_rxon.flags = cpu_to_le32(flags);
7268 iwl3945_commit_rxon(priv);
7269 }
7270 }
7271 mutex_unlock(&priv->mutex);
7272
7273 return count;
7274 }
7275
7276 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7277
7278 static ssize_t show_filter_flags(struct device *d,
7279 struct device_attribute *attr, char *buf)
7280 {
7281 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7282
7283 return sprintf(buf, "0x%04X\n",
7284 le32_to_cpu(priv->active39_rxon.filter_flags));
7285 }
7286
7287 static ssize_t store_filter_flags(struct device *d,
7288 struct device_attribute *attr,
7289 const char *buf, size_t count)
7290 {
7291 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7292 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7293
7294 mutex_lock(&priv->mutex);
7295 if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
7296 /* Cancel any currently running scans... */
7297 if (iwl3945_scan_cancel_timeout(priv, 100))
7298 IWL_WARNING("Could not cancel scan.\n");
7299 else {
7300 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7301 "0x%04X\n", filter_flags);
7302 priv->staging39_rxon.filter_flags =
7303 cpu_to_le32(filter_flags);
7304 iwl3945_commit_rxon(priv);
7305 }
7306 }
7307 mutex_unlock(&priv->mutex);
7308
7309 return count;
7310 }
7311
7312 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7313 store_filter_flags);
7314
7315 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7316
7317 static ssize_t show_measurement(struct device *d,
7318 struct device_attribute *attr, char *buf)
7319 {
7320 struct iwl_priv *priv = dev_get_drvdata(d);
7321 struct iwl_spectrum_notification measure_report;
7322 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7323 u8 *data = (u8 *)&measure_report;
7324 unsigned long flags;
7325
7326 spin_lock_irqsave(&priv->lock, flags);
7327 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7328 spin_unlock_irqrestore(&priv->lock, flags);
7329 return 0;
7330 }
7331 memcpy(&measure_report, &priv->measure_report, size);
7332 priv->measurement_status = 0;
7333 spin_unlock_irqrestore(&priv->lock, flags);
7334
7335 while (size && (PAGE_SIZE - len)) {
7336 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7337 PAGE_SIZE - len, 1);
7338 len = strlen(buf);
7339 if (PAGE_SIZE - len)
7340 buf[len++] = '\n';
7341
7342 ofs += 16;
7343 size -= min(size, 16U);
7344 }
7345
7346 return len;
7347 }
7348
7349 static ssize_t store_measurement(struct device *d,
7350 struct device_attribute *attr,
7351 const char *buf, size_t count)
7352 {
7353 struct iwl_priv *priv = dev_get_drvdata(d);
7354 struct ieee80211_measurement_params params = {
7355 .channel = le16_to_cpu(priv->active39_rxon.channel),
7356 .start_time = cpu_to_le64(priv->last_tsf),
7357 .duration = cpu_to_le16(1),
7358 };
7359 u8 type = IWL_MEASURE_BASIC;
7360 u8 buffer[32];
7361 u8 channel;
7362
7363 if (count) {
7364 char *p = buffer;
7365 strncpy(buffer, buf, min(sizeof(buffer), count));
7366 channel = simple_strtoul(p, NULL, 0);
7367 if (channel)
7368 params.channel = channel;
7369
7370 p = buffer;
7371 while (*p && *p != ' ')
7372 p++;
7373 if (*p)
7374 type = simple_strtoul(p + 1, NULL, 0);
7375 }
7376
7377 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7378 "channel %d (for '%s')\n", type, params.channel, buf);
7379 iwl3945_get_measurement(priv, &params, type);
7380
7381 return count;
7382 }
7383
7384 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7385 show_measurement, store_measurement);
7386 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7387
7388 static ssize_t store_retry_rate(struct device *d,
7389 struct device_attribute *attr,
7390 const char *buf, size_t count)
7391 {
7392 struct iwl_priv *priv = dev_get_drvdata(d);
7393
7394 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7395 if (priv->retry_rate <= 0)
7396 priv->retry_rate = 1;
7397
7398 return count;
7399 }
7400
7401 static ssize_t show_retry_rate(struct device *d,
7402 struct device_attribute *attr, char *buf)
7403 {
7404 struct iwl_priv *priv = dev_get_drvdata(d);
7405 return sprintf(buf, "%d", priv->retry_rate);
7406 }
7407
7408 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7409 store_retry_rate);
7410
7411 static ssize_t store_power_level(struct device *d,
7412 struct device_attribute *attr,
7413 const char *buf, size_t count)
7414 {
7415 struct iwl_priv *priv = dev_get_drvdata(d);
7416 int rc;
7417 int mode;
7418
7419 mode = simple_strtoul(buf, NULL, 0);
7420 mutex_lock(&priv->mutex);
7421
7422 if (!iwl3945_is_ready(priv)) {
7423 rc = -EAGAIN;
7424 goto out;
7425 }
7426
7427 if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
7428 (mode == IWL39_POWER_AC))
7429 mode = IWL39_POWER_AC;
7430 else
7431 mode |= IWL_POWER_ENABLED;
7432
7433 if (mode != priv->power_mode) {
7434 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7435 if (rc) {
7436 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7437 goto out;
7438 }
7439 priv->power_mode = mode;
7440 }
7441
7442 rc = count;
7443
7444 out:
7445 mutex_unlock(&priv->mutex);
7446 return rc;
7447 }
7448
7449 #define MAX_WX_STRING 80
7450
7451 /* Values are in microsecond */
7452 static const s32 timeout_duration[] = {
7453 350000,
7454 250000,
7455 75000,
7456 37000,
7457 25000,
7458 };
7459 static const s32 period_duration[] = {
7460 400000,
7461 700000,
7462 1000000,
7463 1000000,
7464 1000000
7465 };
7466
7467 static ssize_t show_power_level(struct device *d,
7468 struct device_attribute *attr, char *buf)
7469 {
7470 struct iwl_priv *priv = dev_get_drvdata(d);
7471 int level = IWL_POWER_LEVEL(priv->power_mode);
7472 char *p = buf;
7473
7474 p += sprintf(p, "%d ", level);
7475 switch (level) {
7476 case IWL_POWER_MODE_CAM:
7477 case IWL39_POWER_AC:
7478 p += sprintf(p, "(AC)");
7479 break;
7480 case IWL39_POWER_BATTERY:
7481 p += sprintf(p, "(BATTERY)");
7482 break;
7483 default:
7484 p += sprintf(p,
7485 "(Timeout %dms, Period %dms)",
7486 timeout_duration[level - 1] / 1000,
7487 period_duration[level - 1] / 1000);
7488 }
7489
7490 if (!(priv->power_mode & IWL_POWER_ENABLED))
7491 p += sprintf(p, " OFF\n");
7492 else
7493 p += sprintf(p, " \n");
7494
7495 return p - buf + 1;
7496
7497 }
7498
7499 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7500 store_power_level);
7501
7502 static ssize_t show_channels(struct device *d,
7503 struct device_attribute *attr, char *buf)
7504 {
7505 /* all this shit doesn't belong into sysfs anyway */
7506 return 0;
7507 }
7508
7509 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7510
7511 static ssize_t show_statistics(struct device *d,
7512 struct device_attribute *attr, char *buf)
7513 {
7514 struct iwl_priv *priv = dev_get_drvdata(d);
7515 u32 size = sizeof(struct iwl3945_notif_statistics);
7516 u32 len = 0, ofs = 0;
7517 u8 *data = (u8 *)&priv->statistics_39;
7518 int rc = 0;
7519
7520 if (!iwl3945_is_alive(priv))
7521 return -EAGAIN;
7522
7523 mutex_lock(&priv->mutex);
7524 rc = iwl3945_send_statistics_request(priv);
7525 mutex_unlock(&priv->mutex);
7526
7527 if (rc) {
7528 len = sprintf(buf,
7529 "Error sending statistics request: 0x%08X\n", rc);
7530 return len;
7531 }
7532
7533 while (size && (PAGE_SIZE - len)) {
7534 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7535 PAGE_SIZE - len, 1);
7536 len = strlen(buf);
7537 if (PAGE_SIZE - len)
7538 buf[len++] = '\n';
7539
7540 ofs += 16;
7541 size -= min(size, 16U);
7542 }
7543
7544 return len;
7545 }
7546
7547 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7548
7549 static ssize_t show_antenna(struct device *d,
7550 struct device_attribute *attr, char *buf)
7551 {
7552 struct iwl_priv *priv = dev_get_drvdata(d);
7553
7554 if (!iwl3945_is_alive(priv))
7555 return -EAGAIN;
7556
7557 return sprintf(buf, "%d\n", priv->antenna);
7558 }
7559
7560 static ssize_t store_antenna(struct device *d,
7561 struct device_attribute *attr,
7562 const char *buf, size_t count)
7563 {
7564 int ant;
7565 struct iwl_priv *priv = dev_get_drvdata(d);
7566
7567 if (count == 0)
7568 return 0;
7569
7570 if (sscanf(buf, "%1i", &ant) != 1) {
7571 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7572 return count;
7573 }
7574
7575 if ((ant >= 0) && (ant <= 2)) {
7576 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7577 priv->antenna = (enum iwl3945_antenna)ant;
7578 } else
7579 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7580
7581
7582 return count;
7583 }
7584
7585 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7586
7587 static ssize_t show_status(struct device *d,
7588 struct device_attribute *attr, char *buf)
7589 {
7590 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7591 if (!iwl3945_is_alive(priv))
7592 return -EAGAIN;
7593 return sprintf(buf, "0x%08x\n", (int)priv->status);
7594 }
7595
7596 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7597
7598 static ssize_t dump_error_log(struct device *d,
7599 struct device_attribute *attr,
7600 const char *buf, size_t count)
7601 {
7602 char *p = (char *)buf;
7603
7604 if (p[0] == '1')
7605 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
7606
7607 return strnlen(buf, count);
7608 }
7609
7610 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7611
7612 static ssize_t dump_event_log(struct device *d,
7613 struct device_attribute *attr,
7614 const char *buf, size_t count)
7615 {
7616 char *p = (char *)buf;
7617
7618 if (p[0] == '1')
7619 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
7620
7621 return strnlen(buf, count);
7622 }
7623
7624 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7625
7626 /*****************************************************************************
7627 *
7628 * driver setup and tear down
7629 *
7630 *****************************************************************************/
7631
7632 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
7633 {
7634 priv->workqueue = create_workqueue(DRV_NAME);
7635
7636 init_waitqueue_head(&priv->wait_command_queue);
7637
7638 INIT_WORK(&priv->up, iwl3945_bg_up);
7639 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7640 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7641 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7642 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7643 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7644 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7645 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7646 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7647 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7648 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7649
7650 iwl3945_hw_setup_deferred_work(priv);
7651
7652 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7653 iwl3945_irq_tasklet, (unsigned long)priv);
7654 }
7655
7656 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
7657 {
7658 iwl3945_hw_cancel_deferred_work(priv);
7659
7660 cancel_delayed_work_sync(&priv->init_alive_start);
7661 cancel_delayed_work(&priv->scan_check);
7662 cancel_delayed_work(&priv->alive_start);
7663 cancel_work_sync(&priv->beacon_update);
7664 }
7665
7666 static struct attribute *iwl3945_sysfs_entries[] = {
7667 &dev_attr_antenna.attr,
7668 &dev_attr_channels.attr,
7669 &dev_attr_dump_errors.attr,
7670 &dev_attr_dump_events.attr,
7671 &dev_attr_flags.attr,
7672 &dev_attr_filter_flags.attr,
7673 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7674 &dev_attr_measurement.attr,
7675 #endif
7676 &dev_attr_power_level.attr,
7677 &dev_attr_retry_rate.attr,
7678 &dev_attr_statistics.attr,
7679 &dev_attr_status.attr,
7680 &dev_attr_temperature.attr,
7681 &dev_attr_tx_power.attr,
7682 #ifdef CONFIG_IWL3945_DEBUG
7683 &dev_attr_debug_level.attr,
7684 #endif
7685 NULL
7686 };
7687
7688 static struct attribute_group iwl3945_attribute_group = {
7689 .name = NULL, /* put in device directory */
7690 .attrs = iwl3945_sysfs_entries,
7691 };
7692
7693 static struct ieee80211_ops iwl3945_hw_ops = {
7694 .tx = iwl3945_mac_tx,
7695 .start = iwl3945_mac_start,
7696 .stop = iwl3945_mac_stop,
7697 .add_interface = iwl3945_mac_add_interface,
7698 .remove_interface = iwl3945_mac_remove_interface,
7699 .config = iwl3945_mac_config,
7700 .config_interface = iwl3945_mac_config_interface,
7701 .configure_filter = iwl3945_configure_filter,
7702 .set_key = iwl3945_mac_set_key,
7703 .get_tx_stats = iwl3945_mac_get_tx_stats,
7704 .conf_tx = iwl3945_mac_conf_tx,
7705 .reset_tsf = iwl3945_mac_reset_tsf,
7706 .bss_info_changed = iwl3945_bss_info_changed,
7707 .hw_scan = iwl3945_mac_hw_scan
7708 };
7709
7710 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7711 {
7712 int err = 0;
7713 struct iwl_priv *priv;
7714 struct ieee80211_hw *hw;
7715 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
7716 unsigned long flags;
7717
7718 /***********************
7719 * 1. Allocating HW data
7720 * ********************/
7721
7722 /* mac80211 allocates memory for this device instance, including
7723 * space for this driver's private structure */
7724 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl3945_hw_ops);
7725 if (hw == NULL) {
7726 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
7727 err = -ENOMEM;
7728 goto out;
7729 }
7730
7731 SET_IEEE80211_DEV(hw, &pdev->dev);
7732
7733 priv = hw->priv;
7734 priv->hw = hw;
7735 priv->pci_dev = pdev;
7736 priv->cfg = cfg;
7737
7738 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
7739 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
7740 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7741 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7742 err = -EINVAL;
7743 goto out;
7744 }
7745
7746 /* Disabling hardware scan means that mac80211 will perform scans
7747 * "the hard way", rather than using device's scan. */
7748 if (iwl3945_param_disable_hw_scan) {
7749 IWL_DEBUG_INFO("Disabling hw_scan\n");
7750 iwl3945_hw_ops.hw_scan = NULL;
7751 }
7752
7753 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7754 hw->rate_control_algorithm = "iwl-3945-rs";
7755 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7756
7757 /* Select antenna (may be helpful if only one antenna is connected) */
7758 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
7759 #ifdef CONFIG_IWL3945_DEBUG
7760 priv->debug_level = iwl3945_param_debug;
7761 atomic_set(&priv->restrict_refcnt, 0);
7762 #endif
7763
7764 /* Tell mac80211 our characteristics */
7765 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7766 IEEE80211_HW_NOISE_DBM;
7767
7768 hw->wiphy->interface_modes =
7769 BIT(NL80211_IFTYPE_STATION) |
7770 BIT(NL80211_IFTYPE_ADHOC);
7771
7772 hw->wiphy->fw_handles_regulatory = true;
7773
7774 /* 4 EDCA QOS priorities */
7775 hw->queues = 4;
7776
7777 /***************************
7778 * 2. Initializing PCI bus
7779 * *************************/
7780 if (pci_enable_device(pdev)) {
7781 err = -ENODEV;
7782 goto out_ieee80211_free_hw;
7783 }
7784
7785 pci_set_master(pdev);
7786
7787 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7788 if (!err)
7789 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7790 if (err) {
7791 IWL_WARN(priv, "No suitable DMA available.\n");
7792 goto out_pci_disable_device;
7793 }
7794
7795 pci_set_drvdata(pdev, priv);
7796 err = pci_request_regions(pdev, DRV_NAME);
7797 if (err)
7798 goto out_pci_disable_device;
7799
7800 /***********************
7801 * 3. Read REV Register
7802 * ********************/
7803 priv->hw_base = pci_iomap(pdev, 0, 0);
7804 if (!priv->hw_base) {
7805 err = -ENODEV;
7806 goto out_pci_release_regions;
7807 }
7808
7809 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7810 (unsigned long long) pci_resource_len(pdev, 0));
7811 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7812
7813 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7814 * PCI Tx retries from interfering with C3 CPU state */
7815 pci_write_config_byte(pdev, 0x41, 0x00);
7816
7817 /* nic init */
7818 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
7819 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7820
7821 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7822 err = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
7823 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7824 if (err < 0) {
7825 IWL_DEBUG_INFO("Failed to init the card\n");
7826 goto out_remove_sysfs;
7827 }
7828
7829 /***********************
7830 * 4. Read EEPROM
7831 * ********************/
7832 /* Read the EEPROM */
7833 err = iwl3945_eeprom_init(priv);
7834 if (err) {
7835 IWL_ERROR("Unable to init EEPROM\n");
7836 goto out_remove_sysfs;
7837 }
7838 /* MAC Address location in EEPROM same for 3945/4965 */
7839 get_eeprom_mac(priv, priv->mac_addr);
7840 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7841 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7842
7843 /***********************
7844 * 5. Setup HW Constants
7845 * ********************/
7846 /* Device-specific setup */
7847 if (iwl3945_hw_set_hw_params(priv)) {
7848 IWL_ERROR("failed to set hw settings\n");
7849 goto out_iounmap;
7850 }
7851
7852 /***********************
7853 * 6. Setup priv
7854 * ********************/
7855 priv->retry_rate = 1;
7856 priv->ibss_beacon = NULL;
7857
7858 spin_lock_init(&priv->lock);
7859 spin_lock_init(&priv->power_data_39.lock);
7860 spin_lock_init(&priv->sta_lock);
7861 spin_lock_init(&priv->hcmd_lock);
7862
7863 INIT_LIST_HEAD(&priv->free_frames);
7864 mutex_init(&priv->mutex);
7865
7866 /* Clear the driver's (not device's) station table */
7867 iwl3945_clear_stations_table(priv);
7868
7869 priv->data_retry_limit = -1;
7870 priv->ieee_channels = NULL;
7871 priv->ieee_rates = NULL;
7872 priv->band = IEEE80211_BAND_2GHZ;
7873
7874 priv->iw_mode = NL80211_IFTYPE_STATION;
7875
7876 iwl3945_reset_qos(priv);
7877
7878 priv->qos_data.qos_active = 0;
7879 priv->qos_data.qos_cap.val = 0;
7880
7881
7882 priv->rates_mask = IWL_RATES_MASK;
7883 /* If power management is turned on, default to AC mode */
7884 priv->power_mode = IWL39_POWER_AC;
7885 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7886
7887 err = iwl3945_init_channel_map(priv);
7888 if (err) {
7889 IWL_ERROR("initializing regulatory failed: %d\n", err);
7890 goto out_release_irq;
7891 }
7892
7893 err = iwl3945_init_geos(priv);
7894 if (err) {
7895 IWL_ERROR("initializing geos failed: %d\n", err);
7896 goto out_free_channel_map;
7897 }
7898
7899 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
7900 priv->cfg->name);
7901
7902 /***********************************
7903 * 7. Initialize Module Parameters
7904 * **********************************/
7905
7906 /* Initialize module parameter values here */
7907 /* Disable radio (SW RF KILL) via parameter when loading driver */
7908 if (iwl3945_param_disable) {
7909 set_bit(STATUS_RF_KILL_SW, &priv->status);
7910 IWL_DEBUG_INFO("Radio disabled.\n");
7911 }
7912
7913
7914 /***********************
7915 * 8. Setup Services
7916 * ********************/
7917
7918 spin_lock_irqsave(&priv->lock, flags);
7919 iwl3945_disable_interrupts(priv);
7920 spin_unlock_irqrestore(&priv->lock, flags);
7921
7922 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7923 if (err) {
7924 IWL_ERROR("failed to create sysfs device attributes\n");
7925 goto out_free_geos;
7926 }
7927
7928 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7929 iwl3945_setup_deferred_work(priv);
7930 iwl3945_setup_rx_handlers(priv);
7931
7932 /***********************
7933 * 9. Conclude
7934 * ********************/
7935 pci_save_state(pdev);
7936 pci_disable_device(pdev);
7937
7938 /*********************************
7939 * 10. Setup and Register mac80211
7940 * *******************************/
7941
7942 err = ieee80211_register_hw(priv->hw);
7943 if (err) {
7944 IWL_ERROR("Failed to register network device (error %d)\n", err);
7945 goto out_remove_sysfs;
7946 }
7947
7948 priv->hw->conf.beacon_int = 100;
7949 priv->mac80211_registered = 1;
7950
7951
7952 err = iwl3945_rfkill_init(priv);
7953 if (err)
7954 IWL_ERROR("Unable to initialize RFKILL system. "
7955 "Ignoring error: %d\n", err);
7956
7957 return 0;
7958
7959 out_remove_sysfs:
7960 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7961 out_free_geos:
7962 iwl3945_free_geos(priv);
7963 out_free_channel_map:
7964 iwl3945_free_channel_map(priv);
7965
7966
7967 out_release_irq:
7968 destroy_workqueue(priv->workqueue);
7969 priv->workqueue = NULL;
7970 iwl3945_unset_hw_params(priv);
7971
7972 out_iounmap:
7973 pci_iounmap(pdev, priv->hw_base);
7974 out_pci_release_regions:
7975 pci_release_regions(pdev);
7976 out_pci_disable_device:
7977 pci_disable_device(pdev);
7978 pci_set_drvdata(pdev, NULL);
7979 out_ieee80211_free_hw:
7980 ieee80211_free_hw(priv->hw);
7981 out:
7982 return err;
7983 }
7984
7985 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
7986 {
7987 struct iwl_priv *priv = pci_get_drvdata(pdev);
7988 unsigned long flags;
7989
7990 if (!priv)
7991 return;
7992
7993 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7994
7995 set_bit(STATUS_EXIT_PENDING, &priv->status);
7996
7997 iwl3945_down(priv);
7998
7999 /* make sure we flush any pending irq or
8000 * tasklet for the driver
8001 */
8002 spin_lock_irqsave(&priv->lock, flags);
8003 iwl3945_disable_interrupts(priv);
8004 spin_unlock_irqrestore(&priv->lock, flags);
8005
8006 iwl_synchronize_irq(priv);
8007
8008 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8009
8010 iwl3945_rfkill_unregister(priv);
8011 iwl3945_dealloc_ucode_pci(priv);
8012
8013 if (priv->rxq.bd)
8014 iwl3945_rx_queue_free(priv, &priv->rxq);
8015 iwl3945_hw_txq_ctx_free(priv);
8016
8017 iwl3945_unset_hw_params(priv);
8018 iwl3945_clear_stations_table(priv);
8019
8020 if (priv->mac80211_registered)
8021 ieee80211_unregister_hw(priv->hw);
8022
8023 /*netif_stop_queue(dev); */
8024 flush_workqueue(priv->workqueue);
8025
8026 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8027 * priv->workqueue... so we can't take down the workqueue
8028 * until now... */
8029 destroy_workqueue(priv->workqueue);
8030 priv->workqueue = NULL;
8031
8032 pci_iounmap(pdev, priv->hw_base);
8033 pci_release_regions(pdev);
8034 pci_disable_device(pdev);
8035 pci_set_drvdata(pdev, NULL);
8036
8037 iwl3945_free_channel_map(priv);
8038 iwl3945_free_geos(priv);
8039 kfree(priv->scan39);
8040 if (priv->ibss_beacon)
8041 dev_kfree_skb(priv->ibss_beacon);
8042
8043 ieee80211_free_hw(priv->hw);
8044 }
8045
8046 #ifdef CONFIG_PM
8047
8048 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8049 {
8050 struct iwl_priv *priv = pci_get_drvdata(pdev);
8051
8052 if (priv->is_open) {
8053 set_bit(STATUS_IN_SUSPEND, &priv->status);
8054 iwl3945_mac_stop(priv->hw);
8055 priv->is_open = 1;
8056 }
8057
8058 pci_set_power_state(pdev, PCI_D3hot);
8059
8060 return 0;
8061 }
8062
8063 static int iwl3945_pci_resume(struct pci_dev *pdev)
8064 {
8065 struct iwl_priv *priv = pci_get_drvdata(pdev);
8066
8067 pci_set_power_state(pdev, PCI_D0);
8068
8069 if (priv->is_open)
8070 iwl3945_mac_start(priv->hw);
8071
8072 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8073 return 0;
8074 }
8075
8076 #endif /* CONFIG_PM */
8077
8078 /*************** RFKILL FUNCTIONS **********/
8079 #ifdef CONFIG_IWL3945_RFKILL
8080 /* software rf-kill from user */
8081 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
8082 {
8083 struct iwl_priv *priv = data;
8084 int err = 0;
8085
8086 if (!priv->rfkill)
8087 return 0;
8088
8089 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
8090 return 0;
8091
8092 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
8093 mutex_lock(&priv->mutex);
8094
8095 switch (state) {
8096 case RFKILL_STATE_UNBLOCKED:
8097 if (iwl3945_is_rfkill_hw(priv)) {
8098 err = -EBUSY;
8099 goto out_unlock;
8100 }
8101 iwl3945_radio_kill_sw(priv, 0);
8102 break;
8103 case RFKILL_STATE_SOFT_BLOCKED:
8104 iwl3945_radio_kill_sw(priv, 1);
8105 break;
8106 default:
8107 IWL_WARNING("we received unexpected RFKILL state %d\n", state);
8108 break;
8109 }
8110 out_unlock:
8111 mutex_unlock(&priv->mutex);
8112
8113 return err;
8114 }
8115
8116 int iwl3945_rfkill_init(struct iwl_priv *priv)
8117 {
8118 struct device *device = wiphy_dev(priv->hw->wiphy);
8119 int ret = 0;
8120
8121 BUG_ON(device == NULL);
8122
8123 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
8124 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
8125 if (!priv->rfkill) {
8126 IWL_ERROR("Unable to allocate rfkill device.\n");
8127 ret = -ENOMEM;
8128 goto error;
8129 }
8130
8131 priv->rfkill->name = priv->cfg->name;
8132 priv->rfkill->data = priv;
8133 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8134 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8135 priv->rfkill->user_claim_unsupported = 1;
8136
8137 priv->rfkill->dev.class->suspend = NULL;
8138 priv->rfkill->dev.class->resume = NULL;
8139
8140 ret = rfkill_register(priv->rfkill);
8141 if (ret) {
8142 IWL_ERROR("Unable to register rfkill: %d\n", ret);
8143 goto freed_rfkill;
8144 }
8145
8146 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8147 return ret;
8148
8149 freed_rfkill:
8150 if (priv->rfkill != NULL)
8151 rfkill_free(priv->rfkill);
8152 priv->rfkill = NULL;
8153
8154 error:
8155 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8156 return ret;
8157 }
8158
8159 void iwl3945_rfkill_unregister(struct iwl_priv *priv)
8160 {
8161 if (priv->rfkill)
8162 rfkill_unregister(priv->rfkill);
8163
8164 priv->rfkill = NULL;
8165 }
8166
8167 /* set rf-kill to the right state. */
8168 void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
8169 {
8170
8171 if (!priv->rfkill)
8172 return;
8173
8174 if (iwl3945_is_rfkill_hw(priv)) {
8175 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8176 return;
8177 }
8178
8179 if (!iwl3945_is_rfkill_sw(priv))
8180 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8181 else
8182 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8183 }
8184 #endif
8185
8186 /*****************************************************************************
8187 *
8188 * driver and module entry point
8189 *
8190 *****************************************************************************/
8191
8192 static struct pci_driver iwl3945_driver = {
8193 .name = DRV_NAME,
8194 .id_table = iwl3945_hw_card_ids,
8195 .probe = iwl3945_pci_probe,
8196 .remove = __devexit_p(iwl3945_pci_remove),
8197 #ifdef CONFIG_PM
8198 .suspend = iwl3945_pci_suspend,
8199 .resume = iwl3945_pci_resume,
8200 #endif
8201 };
8202
8203 static int __init iwl3945_init(void)
8204 {
8205
8206 int ret;
8207 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8208 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8209
8210 ret = iwl3945_rate_control_register();
8211 if (ret) {
8212 printk(KERN_ERR DRV_NAME
8213 "Unable to register rate control algorithm: %d\n", ret);
8214 return ret;
8215 }
8216
8217 ret = pci_register_driver(&iwl3945_driver);
8218 if (ret) {
8219 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
8220 goto error_register;
8221 }
8222
8223 return ret;
8224
8225 error_register:
8226 iwl3945_rate_control_unregister();
8227 return ret;
8228 }
8229
8230 static void __exit iwl3945_exit(void)
8231 {
8232 pci_unregister_driver(&iwl3945_driver);
8233 iwl3945_rate_control_unregister();
8234 }
8235
8236 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
8237
8238 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8239 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8240 module_param_named(disable, iwl3945_param_disable, int, 0444);
8241 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8242 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8243 MODULE_PARM_DESC(hwcrypto,
8244 "using hardware crypto engine (default 0 [software])\n");
8245 module_param_named(debug, iwl3945_param_debug, uint, 0444);
8246 MODULE_PARM_DESC(debug, "debug output mask");
8247 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8248 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8249
8250 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8251 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8252
8253 module_exit(iwl3945_exit);
8254 module_init(iwl3945_init);
Linux kernel - Deliverables
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