ext3: Flush disk caches on fsync when needed
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-fh.h"
52 #include "iwl-3945-fh.h"
53 #include "iwl-commands.h"
54 #include "iwl-sta.h"
55 #include "iwl-3945.h"
56 #include "iwl-helpers.h"
57 #include "iwl-core.h"
58 #include "iwl-dev.h"
59
60 /*
61 * module name, copyright, version, etc.
62 */
63
64 #define DRV_DESCRIPTION \
65 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
67 #ifdef CONFIG_IWLWIFI_DEBUG
68 #define VD "d"
69 #else
70 #define VD
71 #endif
72
73 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
74 #define VS "s"
75 #else
76 #define VS
77 #endif
78
79 #define IWL39_VERSION "1.2.26k" VD VS
80 #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
81 #define DRV_AUTHOR "<ilw@linux.intel.com>"
82 #define DRV_VERSION IWL39_VERSION
83
84
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89
90 /* module parameters */
91 struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
93 .sw_crypto = 1,
94 .restart_fw = 1,
95 /* the rest are 0 by default */
96 };
97
98 /**
99 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
100 * @priv: eeprom and antenna fields are used to determine antenna flags
101 *
102 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
103 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
104 *
105 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
106 * IWL_ANTENNA_MAIN - Force MAIN antenna
107 * IWL_ANTENNA_AUX - Force AUX antenna
108 */
109 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
110 {
111 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
112
113 switch (iwl3945_mod_params.antenna) {
114 case IWL_ANTENNA_DIVERSITY:
115 return 0;
116
117 case IWL_ANTENNA_MAIN:
118 if (eeprom->antenna_switch_type)
119 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
120 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
121
122 case IWL_ANTENNA_AUX:
123 if (eeprom->antenna_switch_type)
124 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
125 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
126 }
127
128 /* bad antenna selector value */
129 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
130 iwl3945_mod_params.antenna);
131
132 return 0; /* "diversity" is default if error */
133 }
134
135 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
136 struct ieee80211_key_conf *keyconf,
137 u8 sta_id)
138 {
139 unsigned long flags;
140 __le16 key_flags = 0;
141 int ret;
142
143 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
144 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
145
146 if (sta_id == priv->hw_params.bcast_sta_id)
147 key_flags |= STA_KEY_MULTICAST_MSK;
148
149 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
150 keyconf->hw_key_idx = keyconf->keyidx;
151 key_flags &= ~STA_KEY_FLG_INVALID;
152
153 spin_lock_irqsave(&priv->sta_lock, flags);
154 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
155 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
156 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
157 keyconf->keylen);
158
159 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
160 keyconf->keylen);
161
162 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
163 == STA_KEY_FLG_NO_ENC)
164 priv->stations[sta_id].sta.key.key_offset =
165 iwl_get_free_ucode_key_index(priv);
166 /* else, we are overriding an existing key => no need to allocated room
167 * in uCode. */
168
169 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
170 "no space for a new key");
171
172 priv->stations[sta_id].sta.key.key_flags = key_flags;
173 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
174 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
175
176 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
177
178 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
179
180 spin_unlock_irqrestore(&priv->sta_lock, flags);
181
182 return ret;
183 }
184
185 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
186 struct ieee80211_key_conf *keyconf,
187 u8 sta_id)
188 {
189 return -EOPNOTSUPP;
190 }
191
192 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
193 struct ieee80211_key_conf *keyconf,
194 u8 sta_id)
195 {
196 return -EOPNOTSUPP;
197 }
198
199 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
200 {
201 unsigned long flags;
202
203 spin_lock_irqsave(&priv->sta_lock, flags);
204 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
205 memset(&priv->stations[sta_id].sta.key, 0,
206 sizeof(struct iwl4965_keyinfo));
207 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
208 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
209 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
210 spin_unlock_irqrestore(&priv->sta_lock, flags);
211
212 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
213 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
214 return 0;
215 }
216
217 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
218 struct ieee80211_key_conf *keyconf, u8 sta_id)
219 {
220 int ret = 0;
221
222 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
223
224 switch (keyconf->alg) {
225 case ALG_CCMP:
226 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
227 break;
228 case ALG_TKIP:
229 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
230 break;
231 case ALG_WEP:
232 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
233 break;
234 default:
235 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
236 ret = -EINVAL;
237 }
238
239 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
240 keyconf->alg, keyconf->keylen, keyconf->keyidx,
241 sta_id, ret);
242
243 return ret;
244 }
245
246 static int iwl3945_remove_static_key(struct iwl_priv *priv)
247 {
248 int ret = -EOPNOTSUPP;
249
250 return ret;
251 }
252
253 static int iwl3945_set_static_key(struct iwl_priv *priv,
254 struct ieee80211_key_conf *key)
255 {
256 if (key->alg == ALG_WEP)
257 return -EOPNOTSUPP;
258
259 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
260 return -EINVAL;
261 }
262
263 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
264 {
265 struct list_head *element;
266
267 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
268 priv->frames_count);
269
270 while (!list_empty(&priv->free_frames)) {
271 element = priv->free_frames.next;
272 list_del(element);
273 kfree(list_entry(element, struct iwl3945_frame, list));
274 priv->frames_count--;
275 }
276
277 if (priv->frames_count) {
278 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
279 priv->frames_count);
280 priv->frames_count = 0;
281 }
282 }
283
284 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
285 {
286 struct iwl3945_frame *frame;
287 struct list_head *element;
288 if (list_empty(&priv->free_frames)) {
289 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
290 if (!frame) {
291 IWL_ERR(priv, "Could not allocate frame!\n");
292 return NULL;
293 }
294
295 priv->frames_count++;
296 return frame;
297 }
298
299 element = priv->free_frames.next;
300 list_del(element);
301 return list_entry(element, struct iwl3945_frame, list);
302 }
303
304 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
305 {
306 memset(frame, 0, sizeof(*frame));
307 list_add(&frame->list, &priv->free_frames);
308 }
309
310 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
311 struct ieee80211_hdr *hdr,
312 int left)
313 {
314
315 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
316 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
317 (priv->iw_mode != NL80211_IFTYPE_AP)))
318 return 0;
319
320 if (priv->ibss_beacon->len > left)
321 return 0;
322
323 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
324
325 return priv->ibss_beacon->len;
326 }
327
328 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
329 {
330 struct iwl3945_frame *frame;
331 unsigned int frame_size;
332 int rc;
333 u8 rate;
334
335 frame = iwl3945_get_free_frame(priv);
336
337 if (!frame) {
338 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
339 "command.\n");
340 return -ENOMEM;
341 }
342
343 rate = iwl_rate_get_lowest_plcp(priv);
344
345 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
346
347 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
348 &frame->u.cmd[0]);
349
350 iwl3945_free_frame(priv, frame);
351
352 return rc;
353 }
354
355 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
356 {
357 if (priv->shared_virt)
358 pci_free_consistent(priv->pci_dev,
359 sizeof(struct iwl3945_shared),
360 priv->shared_virt,
361 priv->shared_phys);
362 }
363
364 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
365 struct ieee80211_tx_info *info,
366 struct iwl_device_cmd *cmd,
367 struct sk_buff *skb_frag,
368 int sta_id)
369 {
370 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
371 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
372
373 switch (keyinfo->alg) {
374 case ALG_CCMP:
375 tx->sec_ctl = TX_CMD_SEC_CCM;
376 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
377 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
378 break;
379
380 case ALG_TKIP:
381 break;
382
383 case ALG_WEP:
384 tx->sec_ctl = TX_CMD_SEC_WEP |
385 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
386
387 if (keyinfo->keylen == 13)
388 tx->sec_ctl |= TX_CMD_SEC_KEY128;
389
390 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
391
392 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
393 "with key %d\n", info->control.hw_key->hw_key_idx);
394 break;
395
396 default:
397 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
398 break;
399 }
400 }
401
402 /*
403 * handle build REPLY_TX command notification.
404 */
405 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
406 struct iwl_device_cmd *cmd,
407 struct ieee80211_tx_info *info,
408 struct ieee80211_hdr *hdr, u8 std_id)
409 {
410 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
411 __le32 tx_flags = tx->tx_flags;
412 __le16 fc = hdr->frame_control;
413 u8 rc_flags = info->control.rates[0].flags;
414
415 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
416 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
417 tx_flags |= TX_CMD_FLG_ACK_MSK;
418 if (ieee80211_is_mgmt(fc))
419 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
420 if (ieee80211_is_probe_resp(fc) &&
421 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
422 tx_flags |= TX_CMD_FLG_TSF_MSK;
423 } else {
424 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
425 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
426 }
427
428 tx->sta_id = std_id;
429 if (ieee80211_has_morefrags(fc))
430 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
431
432 if (ieee80211_is_data_qos(fc)) {
433 u8 *qc = ieee80211_get_qos_ctl(hdr);
434 tx->tid_tspec = qc[0] & 0xf;
435 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
436 } else {
437 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
438 }
439
440 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
441 tx_flags |= TX_CMD_FLG_RTS_MSK;
442 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
443 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
444 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
445 tx_flags |= TX_CMD_FLG_CTS_MSK;
446 }
447
448 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
449 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
450
451 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
452 if (ieee80211_is_mgmt(fc)) {
453 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
454 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
455 else
456 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
457 } else {
458 tx->timeout.pm_frame_timeout = 0;
459 #ifdef CONFIG_IWLWIFI_LEDS
460 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
461 #endif
462 }
463
464 tx->driver_txop = 0;
465 tx->tx_flags = tx_flags;
466 tx->next_frame_len = 0;
467 }
468
469 /*
470 * start REPLY_TX command process
471 */
472 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
473 {
474 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
475 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
476 struct iwl3945_tx_cmd *tx;
477 struct iwl_tx_queue *txq = NULL;
478 struct iwl_queue *q = NULL;
479 struct iwl_device_cmd *out_cmd;
480 struct iwl_cmd_meta *out_meta;
481 dma_addr_t phys_addr;
482 dma_addr_t txcmd_phys;
483 int txq_id = skb_get_queue_mapping(skb);
484 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
485 u8 id;
486 u8 unicast;
487 u8 sta_id;
488 u8 tid = 0;
489 u16 seq_number = 0;
490 __le16 fc;
491 u8 wait_write_ptr = 0;
492 u8 *qc = NULL;
493 unsigned long flags;
494 int rc;
495
496 spin_lock_irqsave(&priv->lock, flags);
497 if (iwl_is_rfkill(priv)) {
498 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
499 goto drop_unlock;
500 }
501
502 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
503 IWL_ERR(priv, "ERROR: No TX rate available.\n");
504 goto drop_unlock;
505 }
506
507 unicast = !is_multicast_ether_addr(hdr->addr1);
508 id = 0;
509
510 fc = hdr->frame_control;
511
512 #ifdef CONFIG_IWLWIFI_DEBUG
513 if (ieee80211_is_auth(fc))
514 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
515 else if (ieee80211_is_assoc_req(fc))
516 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
517 else if (ieee80211_is_reassoc_req(fc))
518 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
519 #endif
520
521 /* drop all non-injected data frame if we are not associated */
522 if (ieee80211_is_data(fc) &&
523 !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
524 (!iwl_is_associated(priv) ||
525 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
526 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
527 goto drop_unlock;
528 }
529
530 spin_unlock_irqrestore(&priv->lock, flags);
531
532 hdr_len = ieee80211_hdrlen(fc);
533
534 /* Find (or create) index into station table for destination station */
535 if (info->flags & IEEE80211_TX_CTL_INJECTED)
536 sta_id = priv->hw_params.bcast_sta_id;
537 else
538 sta_id = iwl_get_sta_id(priv, hdr);
539 if (sta_id == IWL_INVALID_STATION) {
540 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
541 hdr->addr1);
542 goto drop;
543 }
544
545 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
546
547 if (ieee80211_is_data_qos(fc)) {
548 qc = ieee80211_get_qos_ctl(hdr);
549 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
550 if (unlikely(tid >= MAX_TID_COUNT))
551 goto drop;
552 seq_number = priv->stations[sta_id].tid[tid].seq_number &
553 IEEE80211_SCTL_SEQ;
554 hdr->seq_ctrl = cpu_to_le16(seq_number) |
555 (hdr->seq_ctrl &
556 cpu_to_le16(IEEE80211_SCTL_FRAG));
557 seq_number += 0x10;
558 }
559
560 /* Descriptor for chosen Tx queue */
561 txq = &priv->txq[txq_id];
562 q = &txq->q;
563
564 spin_lock_irqsave(&priv->lock, flags);
565
566 idx = get_cmd_index(q, q->write_ptr, 0);
567
568 /* Set up driver data for this TFD */
569 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
570 txq->txb[q->write_ptr].skb[0] = skb;
571
572 /* Init first empty entry in queue's array of Tx/cmd buffers */
573 out_cmd = txq->cmd[idx];
574 out_meta = &txq->meta[idx];
575 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
576 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
577 memset(tx, 0, sizeof(*tx));
578
579 /*
580 * Set up the Tx-command (not MAC!) header.
581 * Store the chosen Tx queue and TFD index within the sequence field;
582 * after Tx, uCode's Tx response will return this value so driver can
583 * locate the frame within the tx queue and do post-tx processing.
584 */
585 out_cmd->hdr.cmd = REPLY_TX;
586 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
587 INDEX_TO_SEQ(q->write_ptr)));
588
589 /* Copy MAC header from skb into command buffer */
590 memcpy(tx->hdr, hdr, hdr_len);
591
592
593 if (info->control.hw_key)
594 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
595
596 /* TODO need this for burst mode later on */
597 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
598
599 /* set is_hcca to 0; it probably will never be implemented */
600 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
601
602 /* Total # bytes to be transmitted */
603 len = (u16)skb->len;
604 tx->len = cpu_to_le16(len);
605
606 iwl_dbg_log_tx_data_frame(priv, len, hdr);
607 iwl_update_stats(priv, true, fc, len);
608 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
609 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
610
611 if (!ieee80211_has_morefrags(hdr->frame_control)) {
612 txq->need_update = 1;
613 if (qc)
614 priv->stations[sta_id].tid[tid].seq_number = seq_number;
615 } else {
616 wait_write_ptr = 1;
617 txq->need_update = 0;
618 }
619
620 IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
621 le16_to_cpu(out_cmd->hdr.sequence));
622 IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
623 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
624 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
625 ieee80211_hdrlen(fc));
626
627 /*
628 * Use the first empty entry in this queue's command buffer array
629 * to contain the Tx command and MAC header concatenated together
630 * (payload data will be in another buffer).
631 * Size of this varies, due to varying MAC header length.
632 * If end is not dword aligned, we'll have 2 extra bytes at the end
633 * of the MAC header (device reads on dword boundaries).
634 * We'll tell device about this padding later.
635 */
636 len = sizeof(struct iwl3945_tx_cmd) +
637 sizeof(struct iwl_cmd_header) + hdr_len;
638
639 len_org = len;
640 len = (len + 3) & ~3;
641
642 if (len_org != len)
643 len_org = 1;
644 else
645 len_org = 0;
646
647 /* Physical address of this Tx command's header (not MAC header!),
648 * within command buffer array. */
649 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
650 len, PCI_DMA_TODEVICE);
651 /* we do not map meta data ... so we can safely access address to
652 * provide to unmap command*/
653 pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
654 pci_unmap_len_set(out_meta, len, len);
655
656 /* Add buffer containing Tx command and MAC(!) header to TFD's
657 * first entry */
658 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
659 txcmd_phys, len, 1, 0);
660
661
662 /* Set up TFD's 2nd entry to point directly to remainder of skb,
663 * if any (802.11 null frames have no payload). */
664 len = skb->len - hdr_len;
665 if (len) {
666 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
667 len, PCI_DMA_TODEVICE);
668 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
669 phys_addr, len,
670 0, U32_PAD(len));
671 }
672
673
674 /* Tell device the write index *just past* this latest filled TFD */
675 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
676 rc = iwl_txq_update_write_ptr(priv, txq);
677 spin_unlock_irqrestore(&priv->lock, flags);
678
679 if (rc)
680 return rc;
681
682 if ((iwl_queue_space(q) < q->high_mark)
683 && priv->mac80211_registered) {
684 if (wait_write_ptr) {
685 spin_lock_irqsave(&priv->lock, flags);
686 txq->need_update = 1;
687 iwl_txq_update_write_ptr(priv, txq);
688 spin_unlock_irqrestore(&priv->lock, flags);
689 }
690
691 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
692 }
693
694 return 0;
695
696 drop_unlock:
697 spin_unlock_irqrestore(&priv->lock, flags);
698 drop:
699 return -1;
700 }
701
702 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
703
704 #include "iwl-spectrum.h"
705
706 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
707 #define BEACON_TIME_MASK_HIGH 0xFF000000
708 #define TIME_UNIT 1024
709
710 /*
711 * extended beacon time format
712 * time in usec will be changed into a 32-bit value in 8:24 format
713 * the high 1 byte is the beacon counts
714 * the lower 3 bytes is the time in usec within one beacon interval
715 */
716
717 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
718 {
719 u32 quot;
720 u32 rem;
721 u32 interval = beacon_interval * 1024;
722
723 if (!interval || !usec)
724 return 0;
725
726 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
727 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
728
729 return (quot << 24) + rem;
730 }
731
732 /* base is usually what we get from ucode with each received frame,
733 * the same as HW timer counter counting down
734 */
735
736 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
737 {
738 u32 base_low = base & BEACON_TIME_MASK_LOW;
739 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
740 u32 interval = beacon_interval * TIME_UNIT;
741 u32 res = (base & BEACON_TIME_MASK_HIGH) +
742 (addon & BEACON_TIME_MASK_HIGH);
743
744 if (base_low > addon_low)
745 res += base_low - addon_low;
746 else if (base_low < addon_low) {
747 res += interval + base_low - addon_low;
748 res += (1 << 24);
749 } else
750 res += (1 << 24);
751
752 return cpu_to_le32(res);
753 }
754
755 static int iwl3945_get_measurement(struct iwl_priv *priv,
756 struct ieee80211_measurement_params *params,
757 u8 type)
758 {
759 struct iwl_spectrum_cmd spectrum;
760 struct iwl_rx_packet *res;
761 struct iwl_host_cmd cmd = {
762 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
763 .data = (void *)&spectrum,
764 .flags = CMD_WANT_SKB,
765 };
766 u32 add_time = le64_to_cpu(params->start_time);
767 int rc;
768 int spectrum_resp_status;
769 int duration = le16_to_cpu(params->duration);
770
771 if (iwl_is_associated(priv))
772 add_time =
773 iwl3945_usecs_to_beacons(
774 le64_to_cpu(params->start_time) - priv->last_tsf,
775 le16_to_cpu(priv->rxon_timing.beacon_interval));
776
777 memset(&spectrum, 0, sizeof(spectrum));
778
779 spectrum.channel_count = cpu_to_le16(1);
780 spectrum.flags =
781 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
782 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
783 cmd.len = sizeof(spectrum);
784 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
785
786 if (iwl_is_associated(priv))
787 spectrum.start_time =
788 iwl3945_add_beacon_time(priv->last_beacon_time,
789 add_time,
790 le16_to_cpu(priv->rxon_timing.beacon_interval));
791 else
792 spectrum.start_time = 0;
793
794 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
795 spectrum.channels[0].channel = params->channel;
796 spectrum.channels[0].type = type;
797 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
798 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
799 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
800
801 rc = iwl_send_cmd_sync(priv, &cmd);
802 if (rc)
803 return rc;
804
805 res = (struct iwl_rx_packet *)cmd.reply_skb->data;
806 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
807 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
808 rc = -EIO;
809 }
810
811 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
812 switch (spectrum_resp_status) {
813 case 0: /* Command will be handled */
814 if (res->u.spectrum.id != 0xff) {
815 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
816 res->u.spectrum.id);
817 priv->measurement_status &= ~MEASUREMENT_READY;
818 }
819 priv->measurement_status |= MEASUREMENT_ACTIVE;
820 rc = 0;
821 break;
822
823 case 1: /* Command will not be handled */
824 rc = -EAGAIN;
825 break;
826 }
827
828 dev_kfree_skb_any(cmd.reply_skb);
829
830 return rc;
831 }
832 #endif
833
834 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
835 struct iwl_rx_mem_buffer *rxb)
836 {
837 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
838 struct iwl_alive_resp *palive;
839 struct delayed_work *pwork;
840
841 palive = &pkt->u.alive_frame;
842
843 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
844 "0x%01X 0x%01X\n",
845 palive->is_valid, palive->ver_type,
846 palive->ver_subtype);
847
848 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
849 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
850 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
851 sizeof(struct iwl_alive_resp));
852 pwork = &priv->init_alive_start;
853 } else {
854 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
855 memcpy(&priv->card_alive, &pkt->u.alive_frame,
856 sizeof(struct iwl_alive_resp));
857 pwork = &priv->alive_start;
858 iwl3945_disable_events(priv);
859 }
860
861 /* We delay the ALIVE response by 5ms to
862 * give the HW RF Kill time to activate... */
863 if (palive->is_valid == UCODE_VALID_OK)
864 queue_delayed_work(priv->workqueue, pwork,
865 msecs_to_jiffies(5));
866 else
867 IWL_WARN(priv, "uCode did not respond OK.\n");
868 }
869
870 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
871 struct iwl_rx_mem_buffer *rxb)
872 {
873 #ifdef CONFIG_IWLWIFI_DEBUG
874 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
875 #endif
876
877 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
878 return;
879 }
880
881 static void iwl3945_bg_beacon_update(struct work_struct *work)
882 {
883 struct iwl_priv *priv =
884 container_of(work, struct iwl_priv, beacon_update);
885 struct sk_buff *beacon;
886
887 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
888 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
889
890 if (!beacon) {
891 IWL_ERR(priv, "update beacon failed\n");
892 return;
893 }
894
895 mutex_lock(&priv->mutex);
896 /* new beacon skb is allocated every time; dispose previous.*/
897 if (priv->ibss_beacon)
898 dev_kfree_skb(priv->ibss_beacon);
899
900 priv->ibss_beacon = beacon;
901 mutex_unlock(&priv->mutex);
902
903 iwl3945_send_beacon_cmd(priv);
904 }
905
906 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
907 struct iwl_rx_mem_buffer *rxb)
908 {
909 #ifdef CONFIG_IWLWIFI_DEBUG
910 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
911 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
912 u8 rate = beacon->beacon_notify_hdr.rate;
913
914 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
915 "tsf %d %d rate %d\n",
916 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
917 beacon->beacon_notify_hdr.failure_frame,
918 le32_to_cpu(beacon->ibss_mgr_status),
919 le32_to_cpu(beacon->high_tsf),
920 le32_to_cpu(beacon->low_tsf), rate);
921 #endif
922
923 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
924 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
925 queue_work(priv->workqueue, &priv->beacon_update);
926 }
927
928 /* Handle notification from uCode that card's power state is changing
929 * due to software, hardware, or critical temperature RFKILL */
930 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
931 struct iwl_rx_mem_buffer *rxb)
932 {
933 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
934 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
935 unsigned long status = priv->status;
936
937 IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
938 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
939 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
940
941 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
942 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
943
944 if (flags & HW_CARD_DISABLED)
945 set_bit(STATUS_RF_KILL_HW, &priv->status);
946 else
947 clear_bit(STATUS_RF_KILL_HW, &priv->status);
948
949
950 iwl_scan_cancel(priv);
951
952 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
953 test_bit(STATUS_RF_KILL_HW, &priv->status)))
954 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
955 test_bit(STATUS_RF_KILL_HW, &priv->status));
956 else
957 wake_up_interruptible(&priv->wait_command_queue);
958 }
959
960 /**
961 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
962 *
963 * Setup the RX handlers for each of the reply types sent from the uCode
964 * to the host.
965 *
966 * This function chains into the hardware specific files for them to setup
967 * any hardware specific handlers as well.
968 */
969 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
970 {
971 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
972 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
973 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
974 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
975 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
976 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
977 iwl_rx_pm_debug_statistics_notif;
978 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
979
980 /*
981 * The same handler is used for both the REPLY to a discrete
982 * statistics request from the host as well as for the periodic
983 * statistics notifications (after received beacons) from the uCode.
984 */
985 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
986 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
987
988 iwl_setup_spectrum_handlers(priv);
989 iwl_setup_rx_scan_handlers(priv);
990 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
991
992 /* Set up hardware specific Rx handlers */
993 iwl3945_hw_rx_handler_setup(priv);
994 }
995
996 /************************** RX-FUNCTIONS ****************************/
997 /*
998 * Rx theory of operation
999 *
1000 * The host allocates 32 DMA target addresses and passes the host address
1001 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1002 * 0 to 31
1003 *
1004 * Rx Queue Indexes
1005 * The host/firmware share two index registers for managing the Rx buffers.
1006 *
1007 * The READ index maps to the first position that the firmware may be writing
1008 * to -- the driver can read up to (but not including) this position and get
1009 * good data.
1010 * The READ index is managed by the firmware once the card is enabled.
1011 *
1012 * The WRITE index maps to the last position the driver has read from -- the
1013 * position preceding WRITE is the last slot the firmware can place a packet.
1014 *
1015 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1016 * WRITE = READ.
1017 *
1018 * During initialization, the host sets up the READ queue position to the first
1019 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1020 *
1021 * When the firmware places a packet in a buffer, it will advance the READ index
1022 * and fire the RX interrupt. The driver can then query the READ index and
1023 * process as many packets as possible, moving the WRITE index forward as it
1024 * resets the Rx queue buffers with new memory.
1025 *
1026 * The management in the driver is as follows:
1027 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1028 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
1029 * to replenish the iwl->rxq->rx_free.
1030 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
1031 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1032 * 'processed' and 'read' driver indexes as well)
1033 * + A received packet is processed and handed to the kernel network stack,
1034 * detached from the iwl->rxq. The driver 'processed' index is updated.
1035 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1036 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1037 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1038 * were enough free buffers and RX_STALLED is set it is cleared.
1039 *
1040 *
1041 * Driver sequence:
1042 *
1043 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
1044 * iwl3945_rx_queue_restock
1045 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1046 * queue, updates firmware pointers, and updates
1047 * the WRITE index. If insufficient rx_free buffers
1048 * are available, schedules iwl3945_rx_replenish
1049 *
1050 * -- enable interrupts --
1051 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
1052 * READ INDEX, detaching the SKB from the pool.
1053 * Moves the packet buffer from queue to rx_used.
1054 * Calls iwl3945_rx_queue_restock to refill any empty
1055 * slots.
1056 * ...
1057 *
1058 */
1059
1060 /**
1061 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1062 */
1063 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1064 dma_addr_t dma_addr)
1065 {
1066 return cpu_to_le32((u32)dma_addr);
1067 }
1068
1069 /**
1070 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1071 *
1072 * If there are slots in the RX queue that need to be restocked,
1073 * and we have free pre-allocated buffers, fill the ranks as much
1074 * as we can, pulling from rx_free.
1075 *
1076 * This moves the 'write' index forward to catch up with 'processed', and
1077 * also updates the memory address in the firmware to reference the new
1078 * target buffer.
1079 */
1080 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
1081 {
1082 struct iwl_rx_queue *rxq = &priv->rxq;
1083 struct list_head *element;
1084 struct iwl_rx_mem_buffer *rxb;
1085 unsigned long flags;
1086 int write, rc;
1087
1088 spin_lock_irqsave(&rxq->lock, flags);
1089 write = rxq->write & ~0x7;
1090 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1091 /* Get next free Rx buffer, remove from free list */
1092 element = rxq->rx_free.next;
1093 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1094 list_del(element);
1095
1096 /* Point to Rx buffer via next RBD in circular buffer */
1097 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
1098 rxq->queue[rxq->write] = rxb;
1099 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1100 rxq->free_count--;
1101 }
1102 spin_unlock_irqrestore(&rxq->lock, flags);
1103 /* If the pre-allocated buffer pool is dropping low, schedule to
1104 * refill it */
1105 if (rxq->free_count <= RX_LOW_WATERMARK)
1106 queue_work(priv->workqueue, &priv->rx_replenish);
1107
1108
1109 /* If we've added more space for the firmware to place data, tell it.
1110 * Increment device's write pointer in multiples of 8. */
1111 if ((rxq->write_actual != (rxq->write & ~0x7))
1112 || (abs(rxq->write - rxq->read) > 7)) {
1113 spin_lock_irqsave(&rxq->lock, flags);
1114 rxq->need_update = 1;
1115 spin_unlock_irqrestore(&rxq->lock, flags);
1116 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
1117 if (rc)
1118 return rc;
1119 }
1120
1121 return 0;
1122 }
1123
1124 /**
1125 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1126 *
1127 * When moving to rx_free an SKB is allocated for the slot.
1128 *
1129 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1130 * This is called as a scheduled work item (except for during initialization)
1131 */
1132 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1133 {
1134 struct iwl_rx_queue *rxq = &priv->rxq;
1135 struct list_head *element;
1136 struct iwl_rx_mem_buffer *rxb;
1137 unsigned long flags;
1138
1139 while (1) {
1140 spin_lock_irqsave(&rxq->lock, flags);
1141
1142 if (list_empty(&rxq->rx_used)) {
1143 spin_unlock_irqrestore(&rxq->lock, flags);
1144 return;
1145 }
1146
1147 element = rxq->rx_used.next;
1148 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1149 list_del(element);
1150 spin_unlock_irqrestore(&rxq->lock, flags);
1151
1152 /* Alloc a new receive buffer */
1153 rxb->skb =
1154 alloc_skb(priv->hw_params.rx_buf_size,
1155 priority);
1156 if (!rxb->skb) {
1157 if (net_ratelimit())
1158 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
1159 /* We don't reschedule replenish work here -- we will
1160 * call the restock method and if it still needs
1161 * more buffers it will schedule replenish */
1162 break;
1163 }
1164
1165 /* If radiotap head is required, reserve some headroom here.
1166 * The physical head count is a variable rx_stats->phy_count.
1167 * We reserve 4 bytes here. Plus these extra bytes, the
1168 * headroom of the physical head should be enough for the
1169 * radiotap head that iwl3945 supported. See iwl3945_rt.
1170 */
1171 skb_reserve(rxb->skb, 4);
1172
1173 /* Get physical address of RB/SKB */
1174 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1175 rxb->skb->data,
1176 priv->hw_params.rx_buf_size,
1177 PCI_DMA_FROMDEVICE);
1178
1179 spin_lock_irqsave(&rxq->lock, flags);
1180 list_add_tail(&rxb->list, &rxq->rx_free);
1181 priv->alloc_rxb_skb++;
1182 rxq->free_count++;
1183 spin_unlock_irqrestore(&rxq->lock, flags);
1184 }
1185 }
1186
1187 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1188 {
1189 unsigned long flags;
1190 int i;
1191 spin_lock_irqsave(&rxq->lock, flags);
1192 INIT_LIST_HEAD(&rxq->rx_free);
1193 INIT_LIST_HEAD(&rxq->rx_used);
1194 /* Fill the rx_used queue with _all_ of the Rx buffers */
1195 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1196 /* In the reset function, these buffers may have been allocated
1197 * to an SKB, so we need to unmap and free potential storage */
1198 if (rxq->pool[i].skb != NULL) {
1199 pci_unmap_single(priv->pci_dev,
1200 rxq->pool[i].real_dma_addr,
1201 priv->hw_params.rx_buf_size,
1202 PCI_DMA_FROMDEVICE);
1203 priv->alloc_rxb_skb--;
1204 dev_kfree_skb(rxq->pool[i].skb);
1205 rxq->pool[i].skb = NULL;
1206 }
1207 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1208 }
1209
1210 /* Set us so that we have processed and used all buffers, but have
1211 * not restocked the Rx queue with fresh buffers */
1212 rxq->read = rxq->write = 0;
1213 rxq->free_count = 0;
1214 rxq->write_actual = 0;
1215 spin_unlock_irqrestore(&rxq->lock, flags);
1216 }
1217
1218 void iwl3945_rx_replenish(void *data)
1219 {
1220 struct iwl_priv *priv = data;
1221 unsigned long flags;
1222
1223 iwl3945_rx_allocate(priv, GFP_KERNEL);
1224
1225 spin_lock_irqsave(&priv->lock, flags);
1226 iwl3945_rx_queue_restock(priv);
1227 spin_unlock_irqrestore(&priv->lock, flags);
1228 }
1229
1230 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1231 {
1232 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1233
1234 iwl3945_rx_queue_restock(priv);
1235 }
1236
1237
1238 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1239 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1240 * This free routine walks the list of POOL entries and if SKB is set to
1241 * non NULL it is unmapped and freed
1242 */
1243 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1244 {
1245 int i;
1246 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1247 if (rxq->pool[i].skb != NULL) {
1248 pci_unmap_single(priv->pci_dev,
1249 rxq->pool[i].real_dma_addr,
1250 priv->hw_params.rx_buf_size,
1251 PCI_DMA_FROMDEVICE);
1252 dev_kfree_skb(rxq->pool[i].skb);
1253 }
1254 }
1255
1256 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1257 rxq->dma_addr);
1258 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
1259 rxq->rb_stts, rxq->rb_stts_dma);
1260 rxq->bd = NULL;
1261 rxq->rb_stts = NULL;
1262 }
1263
1264
1265 /* Convert linear signal-to-noise ratio into dB */
1266 static u8 ratio2dB[100] = {
1267 /* 0 1 2 3 4 5 6 7 8 9 */
1268 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1269 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1270 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1271 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1272 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1273 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1274 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1275 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1276 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1277 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1278 };
1279
1280 /* Calculates a relative dB value from a ratio of linear
1281 * (i.e. not dB) signal levels.
1282 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1283 int iwl3945_calc_db_from_ratio(int sig_ratio)
1284 {
1285 /* 1000:1 or higher just report as 60 dB */
1286 if (sig_ratio >= 1000)
1287 return 60;
1288
1289 /* 100:1 or higher, divide by 10 and use table,
1290 * add 20 dB to make up for divide by 10 */
1291 if (sig_ratio >= 100)
1292 return 20 + (int)ratio2dB[sig_ratio/10];
1293
1294 /* We shouldn't see this */
1295 if (sig_ratio < 1)
1296 return 0;
1297
1298 /* Use table for ratios 1:1 - 99:1 */
1299 return (int)ratio2dB[sig_ratio];
1300 }
1301
1302 #define PERFECT_RSSI (-20) /* dBm */
1303 #define WORST_RSSI (-95) /* dBm */
1304 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1305
1306 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
1307 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1308 * about formulas used below. */
1309 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
1310 {
1311 int sig_qual;
1312 int degradation = PERFECT_RSSI - rssi_dbm;
1313
1314 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1315 * as indicator; formula is (signal dbm - noise dbm).
1316 * SNR at or above 40 is a great signal (100%).
1317 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1318 * Weakest usable signal is usually 10 - 15 dB SNR. */
1319 if (noise_dbm) {
1320 if (rssi_dbm - noise_dbm >= 40)
1321 return 100;
1322 else if (rssi_dbm < noise_dbm)
1323 return 0;
1324 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1325
1326 /* Else use just the signal level.
1327 * This formula is a least squares fit of data points collected and
1328 * compared with a reference system that had a percentage (%) display
1329 * for signal quality. */
1330 } else
1331 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1332 (15 * RSSI_RANGE + 62 * degradation)) /
1333 (RSSI_RANGE * RSSI_RANGE);
1334
1335 if (sig_qual > 100)
1336 sig_qual = 100;
1337 else if (sig_qual < 1)
1338 sig_qual = 0;
1339
1340 return sig_qual;
1341 }
1342
1343 /**
1344 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1345 *
1346 * Uses the priv->rx_handlers callback function array to invoke
1347 * the appropriate handlers, including command responses,
1348 * frame-received notifications, and other notifications.
1349 */
1350 static void iwl3945_rx_handle(struct iwl_priv *priv)
1351 {
1352 struct iwl_rx_mem_buffer *rxb;
1353 struct iwl_rx_packet *pkt;
1354 struct iwl_rx_queue *rxq = &priv->rxq;
1355 u32 r, i;
1356 int reclaim;
1357 unsigned long flags;
1358 u8 fill_rx = 0;
1359 u32 count = 8;
1360 int total_empty = 0;
1361
1362 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1363 * buffer that the driver may process (last buffer filled by ucode). */
1364 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1365 i = rxq->read;
1366
1367 /* calculate total frames need to be restock after handling RX */
1368 total_empty = r - priv->rxq.write_actual;
1369 if (total_empty < 0)
1370 total_empty += RX_QUEUE_SIZE;
1371
1372 if (total_empty > (RX_QUEUE_SIZE / 2))
1373 fill_rx = 1;
1374 /* Rx interrupt, but nothing sent from uCode */
1375 if (i == r)
1376 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1377
1378 while (i != r) {
1379 rxb = rxq->queue[i];
1380
1381 /* If an RXB doesn't have a Rx queue slot associated with it,
1382 * then a bug has been introduced in the queue refilling
1383 * routines -- catch it here */
1384 BUG_ON(rxb == NULL);
1385
1386 rxq->queue[i] = NULL;
1387
1388 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1389 priv->hw_params.rx_buf_size,
1390 PCI_DMA_FROMDEVICE);
1391 pkt = (struct iwl_rx_packet *)rxb->skb->data;
1392
1393 /* Reclaim a command buffer only if this packet is a response
1394 * to a (driver-originated) command.
1395 * If the packet (e.g. Rx frame) originated from uCode,
1396 * there is no command buffer to reclaim.
1397 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1398 * but apparently a few don't get set; catch them here. */
1399 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1400 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1401 (pkt->hdr.cmd != REPLY_TX);
1402
1403 /* Based on type of command response or notification,
1404 * handle those that need handling via function in
1405 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1406 if (priv->rx_handlers[pkt->hdr.cmd]) {
1407 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1408 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1409 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1410 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1411 } else {
1412 /* No handling needed */
1413 IWL_DEBUG_RX(priv, "r %d i %d No handler needed for %s, 0x%02x\n",
1414 r, i, get_cmd_string(pkt->hdr.cmd),
1415 pkt->hdr.cmd);
1416 }
1417
1418 if (reclaim) {
1419 /* Invoke any callbacks, transfer the skb to caller, and
1420 * fire off the (possibly) blocking iwl_send_cmd()
1421 * as we reclaim the driver command queue */
1422 if (rxb && rxb->skb)
1423 iwl_tx_cmd_complete(priv, rxb);
1424 else
1425 IWL_WARN(priv, "Claim null rxb?\n");
1426 }
1427
1428 /* For now we just don't re-use anything. We can tweak this
1429 * later to try and re-use notification packets and SKBs that
1430 * fail to Rx correctly */
1431 if (rxb->skb != NULL) {
1432 priv->alloc_rxb_skb--;
1433 dev_kfree_skb_any(rxb->skb);
1434 rxb->skb = NULL;
1435 }
1436
1437 spin_lock_irqsave(&rxq->lock, flags);
1438 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1439 spin_unlock_irqrestore(&rxq->lock, flags);
1440 i = (i + 1) & RX_QUEUE_MASK;
1441 /* If there are a lot of unused frames,
1442 * restock the Rx queue so ucode won't assert. */
1443 if (fill_rx) {
1444 count++;
1445 if (count >= 8) {
1446 priv->rxq.read = i;
1447 iwl3945_rx_replenish_now(priv);
1448 count = 0;
1449 }
1450 }
1451 }
1452
1453 /* Backtrack one entry */
1454 priv->rxq.read = i;
1455 if (fill_rx)
1456 iwl3945_rx_replenish_now(priv);
1457 else
1458 iwl3945_rx_queue_restock(priv);
1459 }
1460
1461 /* call this function to flush any scheduled tasklet */
1462 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1463 {
1464 /* wait to make sure we flush pending tasklet*/
1465 synchronize_irq(priv->pci_dev->irq);
1466 tasklet_kill(&priv->irq_tasklet);
1467 }
1468
1469 static const char *desc_lookup(int i)
1470 {
1471 switch (i) {
1472 case 1:
1473 return "FAIL";
1474 case 2:
1475 return "BAD_PARAM";
1476 case 3:
1477 return "BAD_CHECKSUM";
1478 case 4:
1479 return "NMI_INTERRUPT";
1480 case 5:
1481 return "SYSASSERT";
1482 case 6:
1483 return "FATAL_ERROR";
1484 }
1485
1486 return "UNKNOWN";
1487 }
1488
1489 #define ERROR_START_OFFSET (1 * sizeof(u32))
1490 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1491
1492 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1493 {
1494 u32 i;
1495 u32 desc, time, count, base, data1;
1496 u32 blink1, blink2, ilink1, ilink2;
1497
1498 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1499
1500 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1501 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1502 return;
1503 }
1504
1505
1506 count = iwl_read_targ_mem(priv, base);
1507
1508 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1509 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1510 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1511 priv->status, count);
1512 }
1513
1514 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1515 "ilink1 nmiPC Line\n");
1516 for (i = ERROR_START_OFFSET;
1517 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1518 i += ERROR_ELEM_SIZE) {
1519 desc = iwl_read_targ_mem(priv, base + i);
1520 time =
1521 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1522 blink1 =
1523 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1524 blink2 =
1525 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1526 ilink1 =
1527 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1528 ilink2 =
1529 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1530 data1 =
1531 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1532
1533 IWL_ERR(priv,
1534 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1535 desc_lookup(desc), desc, time, blink1, blink2,
1536 ilink1, ilink2, data1);
1537 }
1538
1539 }
1540
1541 #define EVENT_START_OFFSET (6 * sizeof(u32))
1542
1543 /**
1544 * iwl3945_print_event_log - Dump error event log to syslog
1545 *
1546 */
1547 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1548 u32 num_events, u32 mode)
1549 {
1550 u32 i;
1551 u32 base; /* SRAM byte address of event log header */
1552 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1553 u32 ptr; /* SRAM byte address of log data */
1554 u32 ev, time, data; /* event log data */
1555
1556 if (num_events == 0)
1557 return;
1558
1559 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1560
1561 if (mode == 0)
1562 event_size = 2 * sizeof(u32);
1563 else
1564 event_size = 3 * sizeof(u32);
1565
1566 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1567
1568 /* "time" is actually "data" for mode 0 (no timestamp).
1569 * place event id # at far right for easier visual parsing. */
1570 for (i = 0; i < num_events; i++) {
1571 ev = iwl_read_targ_mem(priv, ptr);
1572 ptr += sizeof(u32);
1573 time = iwl_read_targ_mem(priv, ptr);
1574 ptr += sizeof(u32);
1575 if (mode == 0) {
1576 /* data, ev */
1577 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1578 } else {
1579 data = iwl_read_targ_mem(priv, ptr);
1580 ptr += sizeof(u32);
1581 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
1582 }
1583 }
1584 }
1585
1586 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1587 {
1588 u32 base; /* SRAM byte address of event log header */
1589 u32 capacity; /* event log capacity in # entries */
1590 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1591 u32 num_wraps; /* # times uCode wrapped to top of log */
1592 u32 next_entry; /* index of next entry to be written by uCode */
1593 u32 size; /* # entries that we'll print */
1594
1595 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1596 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1597 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1598 return;
1599 }
1600
1601 /* event log header */
1602 capacity = iwl_read_targ_mem(priv, base);
1603 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1604 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1605 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1606
1607 size = num_wraps ? capacity : next_entry;
1608
1609 /* bail out if nothing in log */
1610 if (size == 0) {
1611 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1612 return;
1613 }
1614
1615 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1616 size, num_wraps);
1617
1618 /* if uCode has wrapped back to top of log, start at the oldest entry,
1619 * i.e the next one that uCode would fill. */
1620 if (num_wraps)
1621 iwl3945_print_event_log(priv, next_entry,
1622 capacity - next_entry, mode);
1623
1624 /* (then/else) start at top of log */
1625 iwl3945_print_event_log(priv, 0, next_entry, mode);
1626
1627 }
1628
1629 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1630 {
1631 u32 inta, handled = 0;
1632 u32 inta_fh;
1633 unsigned long flags;
1634 #ifdef CONFIG_IWLWIFI_DEBUG
1635 u32 inta_mask;
1636 #endif
1637
1638 spin_lock_irqsave(&priv->lock, flags);
1639
1640 /* Ack/clear/reset pending uCode interrupts.
1641 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1642 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1643 inta = iwl_read32(priv, CSR_INT);
1644 iwl_write32(priv, CSR_INT, inta);
1645
1646 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1647 * Any new interrupts that happen after this, either while we're
1648 * in this tasklet, or later, will show up in next ISR/tasklet. */
1649 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1650 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1651
1652 #ifdef CONFIG_IWLWIFI_DEBUG
1653 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1654 /* just for debug */
1655 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1656 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1657 inta, inta_mask, inta_fh);
1658 }
1659 #endif
1660
1661 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1662 * atomic, make sure that inta covers all the interrupts that
1663 * we've discovered, even if FH interrupt came in just after
1664 * reading CSR_INT. */
1665 if (inta_fh & CSR39_FH_INT_RX_MASK)
1666 inta |= CSR_INT_BIT_FH_RX;
1667 if (inta_fh & CSR39_FH_INT_TX_MASK)
1668 inta |= CSR_INT_BIT_FH_TX;
1669
1670 /* Now service all interrupt bits discovered above. */
1671 if (inta & CSR_INT_BIT_HW_ERR) {
1672 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1673
1674 /* Tell the device to stop sending interrupts */
1675 iwl_disable_interrupts(priv);
1676
1677 priv->isr_stats.hw++;
1678 iwl_irq_handle_error(priv);
1679
1680 handled |= CSR_INT_BIT_HW_ERR;
1681
1682 spin_unlock_irqrestore(&priv->lock, flags);
1683
1684 return;
1685 }
1686
1687 #ifdef CONFIG_IWLWIFI_DEBUG
1688 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1689 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1690 if (inta & CSR_INT_BIT_SCD) {
1691 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1692 "the frame/frames.\n");
1693 priv->isr_stats.sch++;
1694 }
1695
1696 /* Alive notification via Rx interrupt will do the real work */
1697 if (inta & CSR_INT_BIT_ALIVE) {
1698 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1699 priv->isr_stats.alive++;
1700 }
1701 }
1702 #endif
1703 /* Safely ignore these bits for debug checks below */
1704 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1705
1706 /* Error detected by uCode */
1707 if (inta & CSR_INT_BIT_SW_ERR) {
1708 IWL_ERR(priv, "Microcode SW error detected. "
1709 "Restarting 0x%X.\n", inta);
1710 priv->isr_stats.sw++;
1711 priv->isr_stats.sw_err = inta;
1712 iwl_irq_handle_error(priv);
1713 handled |= CSR_INT_BIT_SW_ERR;
1714 }
1715
1716 /* uCode wakes up after power-down sleep */
1717 if (inta & CSR_INT_BIT_WAKEUP) {
1718 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1719 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1720 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1721 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1722 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1723 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1724 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1725 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1726
1727 priv->isr_stats.wakeup++;
1728 handled |= CSR_INT_BIT_WAKEUP;
1729 }
1730
1731 /* All uCode command responses, including Tx command responses,
1732 * Rx "responses" (frame-received notification), and other
1733 * notifications from uCode come through here*/
1734 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1735 iwl3945_rx_handle(priv);
1736 priv->isr_stats.rx++;
1737 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1738 }
1739
1740 if (inta & CSR_INT_BIT_FH_TX) {
1741 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1742 priv->isr_stats.tx++;
1743
1744 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1745 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1746 (FH39_SRVC_CHNL), 0x0);
1747 handled |= CSR_INT_BIT_FH_TX;
1748 }
1749
1750 if (inta & ~handled) {
1751 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1752 priv->isr_stats.unhandled++;
1753 }
1754
1755 if (inta & ~priv->inta_mask) {
1756 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1757 inta & ~priv->inta_mask);
1758 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1759 }
1760
1761 /* Re-enable all interrupts */
1762 /* only Re-enable if disabled by irq */
1763 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1764 iwl_enable_interrupts(priv);
1765
1766 #ifdef CONFIG_IWLWIFI_DEBUG
1767 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1768 inta = iwl_read32(priv, CSR_INT);
1769 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1770 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1771 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1772 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1773 }
1774 #endif
1775 spin_unlock_irqrestore(&priv->lock, flags);
1776 }
1777
1778 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1779 enum ieee80211_band band,
1780 u8 is_active, u8 n_probes,
1781 struct iwl3945_scan_channel *scan_ch)
1782 {
1783 struct ieee80211_channel *chan;
1784 const struct ieee80211_supported_band *sband;
1785 const struct iwl_channel_info *ch_info;
1786 u16 passive_dwell = 0;
1787 u16 active_dwell = 0;
1788 int added, i;
1789
1790 sband = iwl_get_hw_mode(priv, band);
1791 if (!sband)
1792 return 0;
1793
1794 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1795 passive_dwell = iwl_get_passive_dwell_time(priv, band);
1796
1797 if (passive_dwell <= active_dwell)
1798 passive_dwell = active_dwell + 1;
1799
1800 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1801 chan = priv->scan_request->channels[i];
1802
1803 if (chan->band != band)
1804 continue;
1805
1806 scan_ch->channel = chan->hw_value;
1807
1808 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1809 if (!is_channel_valid(ch_info)) {
1810 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1811 scan_ch->channel);
1812 continue;
1813 }
1814
1815 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1816 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1817 /* If passive , set up for auto-switch
1818 * and use long active_dwell time.
1819 */
1820 if (!is_active || is_channel_passive(ch_info) ||
1821 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1822 scan_ch->type = 0; /* passive */
1823 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1824 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1825 } else {
1826 scan_ch->type = 1; /* active */
1827 }
1828
1829 /* Set direct probe bits. These may be used both for active
1830 * scan channels (probes gets sent right away),
1831 * or for passive channels (probes get se sent only after
1832 * hearing clear Rx packet).*/
1833 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1834 if (n_probes)
1835 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1836 } else {
1837 /* uCode v1 does not allow setting direct probe bits on
1838 * passive channel. */
1839 if ((scan_ch->type & 1) && n_probes)
1840 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1841 }
1842
1843 /* Set txpower levels to defaults */
1844 scan_ch->tpc.dsp_atten = 110;
1845 /* scan_pwr_info->tpc.dsp_atten; */
1846
1847 /*scan_pwr_info->tpc.tx_gain; */
1848 if (band == IEEE80211_BAND_5GHZ)
1849 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1850 else {
1851 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1852 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1853 * power level:
1854 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1855 */
1856 }
1857
1858 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1859 scan_ch->channel,
1860 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1861 (scan_ch->type & 1) ?
1862 active_dwell : passive_dwell);
1863
1864 scan_ch++;
1865 added++;
1866 }
1867
1868 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
1869 return added;
1870 }
1871
1872 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1873 struct ieee80211_rate *rates)
1874 {
1875 int i;
1876
1877 for (i = 0; i < IWL_RATE_COUNT; i++) {
1878 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1879 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1880 rates[i].hw_value_short = i;
1881 rates[i].flags = 0;
1882 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1883 /*
1884 * If CCK != 1M then set short preamble rate flag.
1885 */
1886 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1887 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1888 }
1889 }
1890 }
1891
1892 /******************************************************************************
1893 *
1894 * uCode download functions
1895 *
1896 ******************************************************************************/
1897
1898 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1899 {
1900 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1901 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1902 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1903 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1904 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1905 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1906 }
1907
1908 /**
1909 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1910 * looking at all data.
1911 */
1912 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1913 {
1914 u32 val;
1915 u32 save_len = len;
1916 int rc = 0;
1917 u32 errcnt;
1918
1919 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1920
1921 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1922 IWL39_RTC_INST_LOWER_BOUND);
1923
1924 errcnt = 0;
1925 for (; len > 0; len -= sizeof(u32), image++) {
1926 /* read data comes through single port, auto-incr addr */
1927 /* NOTE: Use the debugless read so we don't flood kernel log
1928 * if IWL_DL_IO is set */
1929 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1930 if (val != le32_to_cpu(*image)) {
1931 IWL_ERR(priv, "uCode INST section is invalid at "
1932 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1933 save_len - len, val, le32_to_cpu(*image));
1934 rc = -EIO;
1935 errcnt++;
1936 if (errcnt >= 20)
1937 break;
1938 }
1939 }
1940
1941
1942 if (!errcnt)
1943 IWL_DEBUG_INFO(priv,
1944 "ucode image in INSTRUCTION memory is good\n");
1945
1946 return rc;
1947 }
1948
1949
1950 /**
1951 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1952 * using sample data 100 bytes apart. If these sample points are good,
1953 * it's a pretty good bet that everything between them is good, too.
1954 */
1955 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1956 {
1957 u32 val;
1958 int rc = 0;
1959 u32 errcnt = 0;
1960 u32 i;
1961
1962 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1963
1964 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1965 /* read data comes through single port, auto-incr addr */
1966 /* NOTE: Use the debugless read so we don't flood kernel log
1967 * if IWL_DL_IO is set */
1968 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1969 i + IWL39_RTC_INST_LOWER_BOUND);
1970 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1971 if (val != le32_to_cpu(*image)) {
1972 #if 0 /* Enable this if you want to see details */
1973 IWL_ERR(priv, "uCode INST section is invalid at "
1974 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1975 i, val, *image);
1976 #endif
1977 rc = -EIO;
1978 errcnt++;
1979 if (errcnt >= 3)
1980 break;
1981 }
1982 }
1983
1984 return rc;
1985 }
1986
1987
1988 /**
1989 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
1990 * and verify its contents
1991 */
1992 static int iwl3945_verify_ucode(struct iwl_priv *priv)
1993 {
1994 __le32 *image;
1995 u32 len;
1996 int rc = 0;
1997
1998 /* Try bootstrap */
1999 image = (__le32 *)priv->ucode_boot.v_addr;
2000 len = priv->ucode_boot.len;
2001 rc = iwl3945_verify_inst_sparse(priv, image, len);
2002 if (rc == 0) {
2003 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2004 return 0;
2005 }
2006
2007 /* Try initialize */
2008 image = (__le32 *)priv->ucode_init.v_addr;
2009 len = priv->ucode_init.len;
2010 rc = iwl3945_verify_inst_sparse(priv, image, len);
2011 if (rc == 0) {
2012 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2013 return 0;
2014 }
2015
2016 /* Try runtime/protocol */
2017 image = (__le32 *)priv->ucode_code.v_addr;
2018 len = priv->ucode_code.len;
2019 rc = iwl3945_verify_inst_sparse(priv, image, len);
2020 if (rc == 0) {
2021 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2022 return 0;
2023 }
2024
2025 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2026
2027 /* Since nothing seems to match, show first several data entries in
2028 * instruction SRAM, so maybe visual inspection will give a clue.
2029 * Selection of bootstrap image (vs. other images) is arbitrary. */
2030 image = (__le32 *)priv->ucode_boot.v_addr;
2031 len = priv->ucode_boot.len;
2032 rc = iwl3945_verify_inst_full(priv, image, len);
2033
2034 return rc;
2035 }
2036
2037 static void iwl3945_nic_start(struct iwl_priv *priv)
2038 {
2039 /* Remove all resets to allow NIC to operate */
2040 iwl_write32(priv, CSR_RESET, 0);
2041 }
2042
2043 /**
2044 * iwl3945_read_ucode - Read uCode images from disk file.
2045 *
2046 * Copy into buffers for card to fetch via bus-mastering
2047 */
2048 static int iwl3945_read_ucode(struct iwl_priv *priv)
2049 {
2050 const struct iwl_ucode_header *ucode;
2051 int ret = -EINVAL, index;
2052 const struct firmware *ucode_raw;
2053 /* firmware file name contains uCode/driver compatibility version */
2054 const char *name_pre = priv->cfg->fw_name_pre;
2055 const unsigned int api_max = priv->cfg->ucode_api_max;
2056 const unsigned int api_min = priv->cfg->ucode_api_min;
2057 char buf[25];
2058 u8 *src;
2059 size_t len;
2060 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2061
2062 /* Ask kernel firmware_class module to get the boot firmware off disk.
2063 * request_firmware() is synchronous, file is in memory on return. */
2064 for (index = api_max; index >= api_min; index--) {
2065 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2066 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2067 if (ret < 0) {
2068 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2069 buf, ret);
2070 if (ret == -ENOENT)
2071 continue;
2072 else
2073 goto error;
2074 } else {
2075 if (index < api_max)
2076 IWL_ERR(priv, "Loaded firmware %s, "
2077 "which is deprecated. "
2078 " Please use API v%u instead.\n",
2079 buf, api_max);
2080 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2081 "(%zd bytes) from disk\n",
2082 buf, ucode_raw->size);
2083 break;
2084 }
2085 }
2086
2087 if (ret < 0)
2088 goto error;
2089
2090 /* Make sure that we got at least our header! */
2091 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
2092 IWL_ERR(priv, "File size way too small!\n");
2093 ret = -EINVAL;
2094 goto err_release;
2095 }
2096
2097 /* Data from ucode file: header followed by uCode images */
2098 ucode = (struct iwl_ucode_header *)ucode_raw->data;
2099
2100 priv->ucode_ver = le32_to_cpu(ucode->ver);
2101 api_ver = IWL_UCODE_API(priv->ucode_ver);
2102 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
2103 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
2104 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
2105 init_data_size =
2106 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
2107 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
2108 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
2109
2110 /* api_ver should match the api version forming part of the
2111 * firmware filename ... but we don't check for that and only rely
2112 * on the API version read from firmware header from here on forward */
2113
2114 if (api_ver < api_min || api_ver > api_max) {
2115 IWL_ERR(priv, "Driver unable to support your firmware API. "
2116 "Driver supports v%u, firmware is v%u.\n",
2117 api_max, api_ver);
2118 priv->ucode_ver = 0;
2119 ret = -EINVAL;
2120 goto err_release;
2121 }
2122 if (api_ver != api_max)
2123 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2124 "got %u. New firmware can be obtained "
2125 "from http://www.intellinuxwireless.org.\n",
2126 api_max, api_ver);
2127
2128 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2129 IWL_UCODE_MAJOR(priv->ucode_ver),
2130 IWL_UCODE_MINOR(priv->ucode_ver),
2131 IWL_UCODE_API(priv->ucode_ver),
2132 IWL_UCODE_SERIAL(priv->ucode_ver));
2133
2134 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2135 priv->ucode_ver);
2136 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2137 inst_size);
2138 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2139 data_size);
2140 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2141 init_size);
2142 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2143 init_data_size);
2144 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2145 boot_size);
2146
2147
2148 /* Verify size of file vs. image size info in file's header */
2149 if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
2150 inst_size + data_size + init_size +
2151 init_data_size + boot_size) {
2152
2153 IWL_DEBUG_INFO(priv,
2154 "uCode file size %zd does not match expected size\n",
2155 ucode_raw->size);
2156 ret = -EINVAL;
2157 goto err_release;
2158 }
2159
2160 /* Verify that uCode images will fit in card's SRAM */
2161 if (inst_size > IWL39_MAX_INST_SIZE) {
2162 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2163 inst_size);
2164 ret = -EINVAL;
2165 goto err_release;
2166 }
2167
2168 if (data_size > IWL39_MAX_DATA_SIZE) {
2169 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2170 data_size);
2171 ret = -EINVAL;
2172 goto err_release;
2173 }
2174 if (init_size > IWL39_MAX_INST_SIZE) {
2175 IWL_DEBUG_INFO(priv,
2176 "uCode init instr len %d too large to fit in\n",
2177 init_size);
2178 ret = -EINVAL;
2179 goto err_release;
2180 }
2181 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2182 IWL_DEBUG_INFO(priv,
2183 "uCode init data len %d too large to fit in\n",
2184 init_data_size);
2185 ret = -EINVAL;
2186 goto err_release;
2187 }
2188 if (boot_size > IWL39_MAX_BSM_SIZE) {
2189 IWL_DEBUG_INFO(priv,
2190 "uCode boot instr len %d too large to fit in\n",
2191 boot_size);
2192 ret = -EINVAL;
2193 goto err_release;
2194 }
2195
2196 /* Allocate ucode buffers for card's bus-master loading ... */
2197
2198 /* Runtime instructions and 2 copies of data:
2199 * 1) unmodified from disk
2200 * 2) backup cache for save/restore during power-downs */
2201 priv->ucode_code.len = inst_size;
2202 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2203
2204 priv->ucode_data.len = data_size;
2205 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2206
2207 priv->ucode_data_backup.len = data_size;
2208 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2209
2210 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2211 !priv->ucode_data_backup.v_addr)
2212 goto err_pci_alloc;
2213
2214 /* Initialization instructions and data */
2215 if (init_size && init_data_size) {
2216 priv->ucode_init.len = init_size;
2217 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2218
2219 priv->ucode_init_data.len = init_data_size;
2220 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2221
2222 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2223 goto err_pci_alloc;
2224 }
2225
2226 /* Bootstrap (instructions only, no data) */
2227 if (boot_size) {
2228 priv->ucode_boot.len = boot_size;
2229 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2230
2231 if (!priv->ucode_boot.v_addr)
2232 goto err_pci_alloc;
2233 }
2234
2235 /* Copy images into buffers for card's bus-master reads ... */
2236
2237 /* Runtime instructions (first block of data in file) */
2238 len = inst_size;
2239 IWL_DEBUG_INFO(priv,
2240 "Copying (but not loading) uCode instr len %zd\n", len);
2241 memcpy(priv->ucode_code.v_addr, src, len);
2242 src += len;
2243
2244 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2245 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2246
2247 /* Runtime data (2nd block)
2248 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2249 len = data_size;
2250 IWL_DEBUG_INFO(priv,
2251 "Copying (but not loading) uCode data len %zd\n", len);
2252 memcpy(priv->ucode_data.v_addr, src, len);
2253 memcpy(priv->ucode_data_backup.v_addr, src, len);
2254 src += len;
2255
2256 /* Initialization instructions (3rd block) */
2257 if (init_size) {
2258 len = init_size;
2259 IWL_DEBUG_INFO(priv,
2260 "Copying (but not loading) init instr len %zd\n", len);
2261 memcpy(priv->ucode_init.v_addr, src, len);
2262 src += len;
2263 }
2264
2265 /* Initialization data (4th block) */
2266 if (init_data_size) {
2267 len = init_data_size;
2268 IWL_DEBUG_INFO(priv,
2269 "Copying (but not loading) init data len %zd\n", len);
2270 memcpy(priv->ucode_init_data.v_addr, src, len);
2271 src += len;
2272 }
2273
2274 /* Bootstrap instructions (5th block) */
2275 len = boot_size;
2276 IWL_DEBUG_INFO(priv,
2277 "Copying (but not loading) boot instr len %zd\n", len);
2278 memcpy(priv->ucode_boot.v_addr, src, len);
2279
2280 /* We have our copies now, allow OS release its copies */
2281 release_firmware(ucode_raw);
2282 return 0;
2283
2284 err_pci_alloc:
2285 IWL_ERR(priv, "failed to allocate pci memory\n");
2286 ret = -ENOMEM;
2287 iwl3945_dealloc_ucode_pci(priv);
2288
2289 err_release:
2290 release_firmware(ucode_raw);
2291
2292 error:
2293 return ret;
2294 }
2295
2296
2297 /**
2298 * iwl3945_set_ucode_ptrs - Set uCode address location
2299 *
2300 * Tell initialization uCode where to find runtime uCode.
2301 *
2302 * BSM registers initially contain pointers to initialization uCode.
2303 * We need to replace them to load runtime uCode inst and data,
2304 * and to save runtime data when powering down.
2305 */
2306 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2307 {
2308 dma_addr_t pinst;
2309 dma_addr_t pdata;
2310
2311 /* bits 31:0 for 3945 */
2312 pinst = priv->ucode_code.p_addr;
2313 pdata = priv->ucode_data_backup.p_addr;
2314
2315 /* Tell bootstrap uCode where to find image to load */
2316 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2317 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2318 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2319 priv->ucode_data.len);
2320
2321 /* Inst byte count must be last to set up, bit 31 signals uCode
2322 * that all new ptr/size info is in place */
2323 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2324 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2325
2326 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2327
2328 return 0;
2329 }
2330
2331 /**
2332 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2333 *
2334 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2335 *
2336 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2337 */
2338 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2339 {
2340 /* Check alive response for "valid" sign from uCode */
2341 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2342 /* We had an error bringing up the hardware, so take it
2343 * all the way back down so we can try again */
2344 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2345 goto restart;
2346 }
2347
2348 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2349 * This is a paranoid check, because we would not have gotten the
2350 * "initialize" alive if code weren't properly loaded. */
2351 if (iwl3945_verify_ucode(priv)) {
2352 /* Runtime instruction load was bad;
2353 * take it all the way back down so we can try again */
2354 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2355 goto restart;
2356 }
2357
2358 /* Send pointers to protocol/runtime uCode image ... init code will
2359 * load and launch runtime uCode, which will send us another "Alive"
2360 * notification. */
2361 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2362 if (iwl3945_set_ucode_ptrs(priv)) {
2363 /* Runtime instruction load won't happen;
2364 * take it all the way back down so we can try again */
2365 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2366 goto restart;
2367 }
2368 return;
2369
2370 restart:
2371 queue_work(priv->workqueue, &priv->restart);
2372 }
2373
2374 /**
2375 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2376 * from protocol/runtime uCode (initialization uCode's
2377 * Alive gets handled by iwl3945_init_alive_start()).
2378 */
2379 static void iwl3945_alive_start(struct iwl_priv *priv)
2380 {
2381 int thermal_spin = 0;
2382 u32 rfkill;
2383
2384 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2385
2386 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2387 /* We had an error bringing up the hardware, so take it
2388 * all the way back down so we can try again */
2389 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2390 goto restart;
2391 }
2392
2393 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2394 * This is a paranoid check, because we would not have gotten the
2395 * "runtime" alive if code weren't properly loaded. */
2396 if (iwl3945_verify_ucode(priv)) {
2397 /* Runtime instruction load was bad;
2398 * take it all the way back down so we can try again */
2399 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2400 goto restart;
2401 }
2402
2403 iwl_clear_stations_table(priv);
2404
2405 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2406 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2407
2408 if (rfkill & 0x1) {
2409 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2410 /* if RFKILL is not on, then wait for thermal
2411 * sensor in adapter to kick in */
2412 while (iwl3945_hw_get_temperature(priv) == 0) {
2413 thermal_spin++;
2414 udelay(10);
2415 }
2416
2417 if (thermal_spin)
2418 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2419 thermal_spin * 10);
2420 } else
2421 set_bit(STATUS_RF_KILL_HW, &priv->status);
2422
2423 /* After the ALIVE response, we can send commands to 3945 uCode */
2424 set_bit(STATUS_ALIVE, &priv->status);
2425
2426 if (iwl_is_rfkill(priv))
2427 return;
2428
2429 ieee80211_wake_queues(priv->hw);
2430
2431 priv->active_rate = priv->rates_mask;
2432 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2433
2434 iwl_power_update_mode(priv, false);
2435
2436 if (iwl_is_associated(priv)) {
2437 struct iwl3945_rxon_cmd *active_rxon =
2438 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2439
2440 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2441 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2442 } else {
2443 /* Initialize our rx_config data */
2444 iwl_connection_init_rx_config(priv, priv->iw_mode);
2445 }
2446
2447 /* Configure Bluetooth device coexistence support */
2448 iwl_send_bt_config(priv);
2449
2450 /* Configure the adapter for unassociated operation */
2451 iwlcore_commit_rxon(priv);
2452
2453 iwl3945_reg_txpower_periodic(priv);
2454
2455 iwl3945_led_register(priv);
2456
2457 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2458 set_bit(STATUS_READY, &priv->status);
2459 wake_up_interruptible(&priv->wait_command_queue);
2460
2461 /* reassociate for ADHOC mode */
2462 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2463 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2464 priv->vif);
2465 if (beacon)
2466 iwl_mac_beacon_update(priv->hw, beacon);
2467 }
2468
2469 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2470 iwl_set_mode(priv, priv->iw_mode);
2471
2472 return;
2473
2474 restart:
2475 queue_work(priv->workqueue, &priv->restart);
2476 }
2477
2478 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2479
2480 static void __iwl3945_down(struct iwl_priv *priv)
2481 {
2482 unsigned long flags;
2483 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2484 struct ieee80211_conf *conf = NULL;
2485
2486 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2487
2488 conf = ieee80211_get_hw_conf(priv->hw);
2489
2490 if (!exit_pending)
2491 set_bit(STATUS_EXIT_PENDING, &priv->status);
2492
2493 iwl3945_led_unregister(priv);
2494 iwl_clear_stations_table(priv);
2495
2496 /* Unblock any waiting calls */
2497 wake_up_interruptible_all(&priv->wait_command_queue);
2498
2499 /* Wipe out the EXIT_PENDING status bit if we are not actually
2500 * exiting the module */
2501 if (!exit_pending)
2502 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2503
2504 /* stop and reset the on-board processor */
2505 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2506
2507 /* tell the device to stop sending interrupts */
2508 spin_lock_irqsave(&priv->lock, flags);
2509 iwl_disable_interrupts(priv);
2510 spin_unlock_irqrestore(&priv->lock, flags);
2511 iwl_synchronize_irq(priv);
2512
2513 if (priv->mac80211_registered)
2514 ieee80211_stop_queues(priv->hw);
2515
2516 /* If we have not previously called iwl3945_init() then
2517 * clear all bits but the RF Kill bits and return */
2518 if (!iwl_is_init(priv)) {
2519 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2520 STATUS_RF_KILL_HW |
2521 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2522 STATUS_GEO_CONFIGURED |
2523 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2524 STATUS_EXIT_PENDING;
2525 goto exit;
2526 }
2527
2528 /* ...otherwise clear out all the status bits but the RF Kill
2529 * bit and continue taking the NIC down. */
2530 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2531 STATUS_RF_KILL_HW |
2532 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2533 STATUS_GEO_CONFIGURED |
2534 test_bit(STATUS_FW_ERROR, &priv->status) <<
2535 STATUS_FW_ERROR |
2536 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2537 STATUS_EXIT_PENDING;
2538
2539 priv->cfg->ops->lib->apm_ops.reset(priv);
2540 spin_lock_irqsave(&priv->lock, flags);
2541 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2542 spin_unlock_irqrestore(&priv->lock, flags);
2543
2544 iwl3945_hw_txq_ctx_stop(priv);
2545 iwl3945_hw_rxq_stop(priv);
2546
2547 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2548 APMG_CLK_VAL_DMA_CLK_RQT);
2549
2550 udelay(5);
2551
2552 if (exit_pending)
2553 priv->cfg->ops->lib->apm_ops.stop(priv);
2554 else
2555 priv->cfg->ops->lib->apm_ops.reset(priv);
2556
2557 exit:
2558 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2559
2560 if (priv->ibss_beacon)
2561 dev_kfree_skb(priv->ibss_beacon);
2562 priv->ibss_beacon = NULL;
2563
2564 /* clear out any free frames */
2565 iwl3945_clear_free_frames(priv);
2566 }
2567
2568 static void iwl3945_down(struct iwl_priv *priv)
2569 {
2570 mutex_lock(&priv->mutex);
2571 __iwl3945_down(priv);
2572 mutex_unlock(&priv->mutex);
2573
2574 iwl3945_cancel_deferred_work(priv);
2575 }
2576
2577 #define MAX_HW_RESTARTS 5
2578
2579 static int __iwl3945_up(struct iwl_priv *priv)
2580 {
2581 int rc, i;
2582
2583 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2584 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2585 return -EIO;
2586 }
2587
2588 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2589 IWL_ERR(priv, "ucode not available for device bring up\n");
2590 return -EIO;
2591 }
2592
2593 /* If platform's RF_KILL switch is NOT set to KILL */
2594 if (iwl_read32(priv, CSR_GP_CNTRL) &
2595 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2596 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2597 else {
2598 set_bit(STATUS_RF_KILL_HW, &priv->status);
2599 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2600 return -ENODEV;
2601 }
2602
2603 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2604
2605 rc = iwl3945_hw_nic_init(priv);
2606 if (rc) {
2607 IWL_ERR(priv, "Unable to int nic\n");
2608 return rc;
2609 }
2610
2611 /* make sure rfkill handshake bits are cleared */
2612 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2613 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2614 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2615
2616 /* clear (again), then enable host interrupts */
2617 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2618 iwl_enable_interrupts(priv);
2619
2620 /* really make sure rfkill handshake bits are cleared */
2621 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2622 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2623
2624 /* Copy original ucode data image from disk into backup cache.
2625 * This will be used to initialize the on-board processor's
2626 * data SRAM for a clean start when the runtime program first loads. */
2627 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2628 priv->ucode_data.len);
2629
2630 /* We return success when we resume from suspend and rf_kill is on. */
2631 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2632 return 0;
2633
2634 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2635
2636 iwl_clear_stations_table(priv);
2637
2638 /* load bootstrap state machine,
2639 * load bootstrap program into processor's memory,
2640 * prepare to load the "initialize" uCode */
2641 priv->cfg->ops->lib->load_ucode(priv);
2642
2643 if (rc) {
2644 IWL_ERR(priv,
2645 "Unable to set up bootstrap uCode: %d\n", rc);
2646 continue;
2647 }
2648
2649 /* start card; "initialize" will load runtime ucode */
2650 iwl3945_nic_start(priv);
2651
2652 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2653
2654 return 0;
2655 }
2656
2657 set_bit(STATUS_EXIT_PENDING, &priv->status);
2658 __iwl3945_down(priv);
2659 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2660
2661 /* tried to restart and config the device for as long as our
2662 * patience could withstand */
2663 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2664 return -EIO;
2665 }
2666
2667
2668 /*****************************************************************************
2669 *
2670 * Workqueue callbacks
2671 *
2672 *****************************************************************************/
2673
2674 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2675 {
2676 struct iwl_priv *priv =
2677 container_of(data, struct iwl_priv, init_alive_start.work);
2678
2679 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2680 return;
2681
2682 mutex_lock(&priv->mutex);
2683 iwl3945_init_alive_start(priv);
2684 mutex_unlock(&priv->mutex);
2685 }
2686
2687 static void iwl3945_bg_alive_start(struct work_struct *data)
2688 {
2689 struct iwl_priv *priv =
2690 container_of(data, struct iwl_priv, alive_start.work);
2691
2692 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2693 return;
2694
2695 mutex_lock(&priv->mutex);
2696 iwl3945_alive_start(priv);
2697 mutex_unlock(&priv->mutex);
2698 }
2699
2700 static void iwl3945_rfkill_poll(struct work_struct *data)
2701 {
2702 struct iwl_priv *priv =
2703 container_of(data, struct iwl_priv, rfkill_poll.work);
2704
2705 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2706 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2707 else
2708 set_bit(STATUS_RF_KILL_HW, &priv->status);
2709
2710 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
2711 test_bit(STATUS_RF_KILL_HW, &priv->status));
2712
2713 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
2714 round_jiffies_relative(2 * HZ));
2715
2716 }
2717
2718 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
2719 static void iwl3945_bg_request_scan(struct work_struct *data)
2720 {
2721 struct iwl_priv *priv =
2722 container_of(data, struct iwl_priv, request_scan);
2723 struct iwl_host_cmd cmd = {
2724 .id = REPLY_SCAN_CMD,
2725 .len = sizeof(struct iwl3945_scan_cmd),
2726 .flags = CMD_SIZE_HUGE,
2727 };
2728 int rc = 0;
2729 struct iwl3945_scan_cmd *scan;
2730 struct ieee80211_conf *conf = NULL;
2731 u8 n_probes = 0;
2732 enum ieee80211_band band;
2733 bool is_active = false;
2734
2735 conf = ieee80211_get_hw_conf(priv->hw);
2736
2737 mutex_lock(&priv->mutex);
2738
2739 cancel_delayed_work(&priv->scan_check);
2740
2741 if (!iwl_is_ready(priv)) {
2742 IWL_WARN(priv, "request scan called when driver not ready.\n");
2743 goto done;
2744 }
2745
2746 /* Make sure the scan wasn't canceled before this queued work
2747 * was given the chance to run... */
2748 if (!test_bit(STATUS_SCANNING, &priv->status))
2749 goto done;
2750
2751 /* This should never be called or scheduled if there is currently
2752 * a scan active in the hardware. */
2753 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2754 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2755 "Ignoring second request.\n");
2756 rc = -EIO;
2757 goto done;
2758 }
2759
2760 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2761 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2762 goto done;
2763 }
2764
2765 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2766 IWL_DEBUG_HC(priv,
2767 "Scan request while abort pending. Queuing.\n");
2768 goto done;
2769 }
2770
2771 if (iwl_is_rfkill(priv)) {
2772 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2773 goto done;
2774 }
2775
2776 if (!test_bit(STATUS_READY, &priv->status)) {
2777 IWL_DEBUG_HC(priv,
2778 "Scan request while uninitialized. Queuing.\n");
2779 goto done;
2780 }
2781
2782 if (!priv->scan_bands) {
2783 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
2784 goto done;
2785 }
2786
2787 if (!priv->scan) {
2788 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2789 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2790 if (!priv->scan) {
2791 rc = -ENOMEM;
2792 goto done;
2793 }
2794 }
2795 scan = priv->scan;
2796 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2797
2798 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2799 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2800
2801 if (iwl_is_associated(priv)) {
2802 u16 interval = 0;
2803 u32 extra;
2804 u32 suspend_time = 100;
2805 u32 scan_suspend_time = 100;
2806 unsigned long flags;
2807
2808 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2809
2810 spin_lock_irqsave(&priv->lock, flags);
2811 interval = priv->beacon_int;
2812 spin_unlock_irqrestore(&priv->lock, flags);
2813
2814 scan->suspend_time = 0;
2815 scan->max_out_time = cpu_to_le32(200 * 1024);
2816 if (!interval)
2817 interval = suspend_time;
2818 /*
2819 * suspend time format:
2820 * 0-19: beacon interval in usec (time before exec.)
2821 * 20-23: 0
2822 * 24-31: number of beacons (suspend between channels)
2823 */
2824
2825 extra = (suspend_time / interval) << 24;
2826 scan_suspend_time = 0xFF0FFFFF &
2827 (extra | ((suspend_time % interval) * 1024));
2828
2829 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2830 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2831 scan_suspend_time, interval);
2832 }
2833
2834 if (priv->scan_request->n_ssids) {
2835 int i, p = 0;
2836 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2837 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2838 /* always does wildcard anyway */
2839 if (!priv->scan_request->ssids[i].ssid_len)
2840 continue;
2841 scan->direct_scan[p].id = WLAN_EID_SSID;
2842 scan->direct_scan[p].len =
2843 priv->scan_request->ssids[i].ssid_len;
2844 memcpy(scan->direct_scan[p].ssid,
2845 priv->scan_request->ssids[i].ssid,
2846 priv->scan_request->ssids[i].ssid_len);
2847 n_probes++;
2848 p++;
2849 }
2850 is_active = true;
2851 } else
2852 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2853
2854 /* We don't build a direct scan probe request; the uCode will do
2855 * that based on the direct_mask added to each channel entry */
2856 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2857 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
2858 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2859
2860 /* flags + rate selection */
2861
2862 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
2863 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2864 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2865 scan->good_CRC_th = 0;
2866 band = IEEE80211_BAND_2GHZ;
2867 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
2868 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2869 /*
2870 * If active scaning is requested but a certain channel
2871 * is marked passive, we can do active scanning if we
2872 * detect transmissions.
2873 */
2874 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
2875 band = IEEE80211_BAND_5GHZ;
2876 } else {
2877 IWL_WARN(priv, "Invalid scan band count\n");
2878 goto done;
2879 }
2880
2881 scan->tx_cmd.len = cpu_to_le16(
2882 iwl_fill_probe_req(priv,
2883 (struct ieee80211_mgmt *)scan->data,
2884 priv->scan_request->ie,
2885 priv->scan_request->ie_len,
2886 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2887
2888 /* select Rx antennas */
2889 scan->flags |= iwl3945_get_antenna_flags(priv);
2890
2891 if (iwl_is_monitor_mode(priv))
2892 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
2893
2894 scan->channel_count =
2895 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2896 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
2897
2898 if (scan->channel_count == 0) {
2899 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2900 goto done;
2901 }
2902
2903 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2904 scan->channel_count * sizeof(struct iwl3945_scan_channel);
2905 cmd.data = scan;
2906 scan->len = cpu_to_le16(cmd.len);
2907
2908 set_bit(STATUS_SCAN_HW, &priv->status);
2909 rc = iwl_send_cmd_sync(priv, &cmd);
2910 if (rc)
2911 goto done;
2912
2913 queue_delayed_work(priv->workqueue, &priv->scan_check,
2914 IWL_SCAN_CHECK_WATCHDOG);
2915
2916 mutex_unlock(&priv->mutex);
2917 return;
2918
2919 done:
2920 /* can not perform scan make sure we clear scanning
2921 * bits from status so next scan request can be performed.
2922 * if we dont clear scanning status bit here all next scan
2923 * will fail
2924 */
2925 clear_bit(STATUS_SCAN_HW, &priv->status);
2926 clear_bit(STATUS_SCANNING, &priv->status);
2927
2928 /* inform mac80211 scan aborted */
2929 queue_work(priv->workqueue, &priv->scan_completed);
2930 mutex_unlock(&priv->mutex);
2931 }
2932
2933 static void iwl3945_bg_up(struct work_struct *data)
2934 {
2935 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2936
2937 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2938 return;
2939
2940 mutex_lock(&priv->mutex);
2941 __iwl3945_up(priv);
2942 mutex_unlock(&priv->mutex);
2943 }
2944
2945 static void iwl3945_bg_restart(struct work_struct *data)
2946 {
2947 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2948
2949 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2950 return;
2951
2952 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2953 mutex_lock(&priv->mutex);
2954 priv->vif = NULL;
2955 priv->is_open = 0;
2956 mutex_unlock(&priv->mutex);
2957 iwl3945_down(priv);
2958 ieee80211_restart_hw(priv->hw);
2959 } else {
2960 iwl3945_down(priv);
2961 queue_work(priv->workqueue, &priv->up);
2962 }
2963 }
2964
2965 static void iwl3945_bg_rx_replenish(struct work_struct *data)
2966 {
2967 struct iwl_priv *priv =
2968 container_of(data, struct iwl_priv, rx_replenish);
2969
2970 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2971 return;
2972
2973 mutex_lock(&priv->mutex);
2974 iwl3945_rx_replenish(priv);
2975 mutex_unlock(&priv->mutex);
2976 }
2977
2978 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2979
2980 void iwl3945_post_associate(struct iwl_priv *priv)
2981 {
2982 int rc = 0;
2983 struct ieee80211_conf *conf = NULL;
2984
2985 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2986 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2987 return;
2988 }
2989
2990
2991 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2992 priv->assoc_id, priv->active_rxon.bssid_addr);
2993
2994 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2995 return;
2996
2997 if (!priv->vif || !priv->is_open)
2998 return;
2999
3000 iwl_scan_cancel_timeout(priv, 200);
3001
3002 conf = ieee80211_get_hw_conf(priv->hw);
3003
3004 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3005 iwlcore_commit_rxon(priv);
3006
3007 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3008 iwl_setup_rxon_timing(priv);
3009 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3010 sizeof(priv->rxon_timing), &priv->rxon_timing);
3011 if (rc)
3012 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3013 "Attempting to continue.\n");
3014
3015 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3016
3017 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3018
3019 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3020 priv->assoc_id, priv->beacon_int);
3021
3022 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3023 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3024 else
3025 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3026
3027 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3028 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
3029 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3030 else
3031 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3032
3033 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3034 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3035
3036 }
3037
3038 iwlcore_commit_rxon(priv);
3039
3040 switch (priv->iw_mode) {
3041 case NL80211_IFTYPE_STATION:
3042 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3043 break;
3044
3045 case NL80211_IFTYPE_ADHOC:
3046
3047 priv->assoc_id = 1;
3048 iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
3049 iwl3945_sync_sta(priv, IWL_STA_ID,
3050 (priv->band == IEEE80211_BAND_5GHZ) ?
3051 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3052 CMD_ASYNC);
3053 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3054 iwl3945_send_beacon_cmd(priv);
3055
3056 break;
3057
3058 default:
3059 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3060 __func__, priv->iw_mode);
3061 break;
3062 }
3063
3064 iwl_activate_qos(priv, 0);
3065
3066 /* we have just associated, don't start scan too early */
3067 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
3068 }
3069
3070 /*****************************************************************************
3071 *
3072 * mac80211 entry point functions
3073 *
3074 *****************************************************************************/
3075
3076 #define UCODE_READY_TIMEOUT (2 * HZ)
3077
3078 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3079 {
3080 struct iwl_priv *priv = hw->priv;
3081 int ret;
3082
3083 IWL_DEBUG_MAC80211(priv, "enter\n");
3084
3085 /* we should be verifying the device is ready to be opened */
3086 mutex_lock(&priv->mutex);
3087
3088 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3089 * ucode filename and max sizes are card-specific. */
3090
3091 if (!priv->ucode_code.len) {
3092 ret = iwl3945_read_ucode(priv);
3093 if (ret) {
3094 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3095 mutex_unlock(&priv->mutex);
3096 goto out_release_irq;
3097 }
3098 }
3099
3100 ret = __iwl3945_up(priv);
3101
3102 mutex_unlock(&priv->mutex);
3103
3104 if (ret)
3105 goto out_release_irq;
3106
3107 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3108
3109 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3110 * mac80211 will not be run successfully. */
3111 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3112 test_bit(STATUS_READY, &priv->status),
3113 UCODE_READY_TIMEOUT);
3114 if (!ret) {
3115 if (!test_bit(STATUS_READY, &priv->status)) {
3116 IWL_ERR(priv,
3117 "Wait for START_ALIVE timeout after %dms.\n",
3118 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3119 ret = -ETIMEDOUT;
3120 goto out_release_irq;
3121 }
3122 }
3123
3124 /* ucode is running and will send rfkill notifications,
3125 * no need to poll the killswitch state anymore */
3126 cancel_delayed_work(&priv->rfkill_poll);
3127
3128 priv->is_open = 1;
3129 IWL_DEBUG_MAC80211(priv, "leave\n");
3130 return 0;
3131
3132 out_release_irq:
3133 priv->is_open = 0;
3134 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3135 return ret;
3136 }
3137
3138 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3139 {
3140 struct iwl_priv *priv = hw->priv;
3141
3142 IWL_DEBUG_MAC80211(priv, "enter\n");
3143
3144 if (!priv->is_open) {
3145 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3146 return;
3147 }
3148
3149 priv->is_open = 0;
3150
3151 if (iwl_is_ready_rf(priv)) {
3152 /* stop mac, cancel any scan request and clear
3153 * RXON_FILTER_ASSOC_MSK BIT
3154 */
3155 mutex_lock(&priv->mutex);
3156 iwl_scan_cancel_timeout(priv, 100);
3157 mutex_unlock(&priv->mutex);
3158 }
3159
3160 iwl3945_down(priv);
3161
3162 flush_workqueue(priv->workqueue);
3163
3164 /* start polling the killswitch state again */
3165 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3166 round_jiffies_relative(2 * HZ));
3167
3168 IWL_DEBUG_MAC80211(priv, "leave\n");
3169 }
3170
3171 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3172 {
3173 struct iwl_priv *priv = hw->priv;
3174
3175 IWL_DEBUG_MAC80211(priv, "enter\n");
3176
3177 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3178 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3179
3180 if (iwl3945_tx_skb(priv, skb))
3181 dev_kfree_skb_any(skb);
3182
3183 IWL_DEBUG_MAC80211(priv, "leave\n");
3184 return NETDEV_TX_OK;
3185 }
3186
3187 void iwl3945_config_ap(struct iwl_priv *priv)
3188 {
3189 int rc = 0;
3190
3191 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3192 return;
3193
3194 /* The following should be done only at AP bring up */
3195 if (!(iwl_is_associated(priv))) {
3196
3197 /* RXON - unassoc (to set timing command) */
3198 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3199 iwlcore_commit_rxon(priv);
3200
3201 /* RXON Timing */
3202 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3203 iwl_setup_rxon_timing(priv);
3204 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3205 sizeof(priv->rxon_timing),
3206 &priv->rxon_timing);
3207 if (rc)
3208 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3209 "Attempting to continue.\n");
3210
3211 /* FIXME: what should be the assoc_id for AP? */
3212 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3213 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3214 priv->staging_rxon.flags |=
3215 RXON_FLG_SHORT_PREAMBLE_MSK;
3216 else
3217 priv->staging_rxon.flags &=
3218 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3219
3220 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3221 if (priv->assoc_capability &
3222 WLAN_CAPABILITY_SHORT_SLOT_TIME)
3223 priv->staging_rxon.flags |=
3224 RXON_FLG_SHORT_SLOT_MSK;
3225 else
3226 priv->staging_rxon.flags &=
3227 ~RXON_FLG_SHORT_SLOT_MSK;
3228
3229 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3230 priv->staging_rxon.flags &=
3231 ~RXON_FLG_SHORT_SLOT_MSK;
3232 }
3233 /* restore RXON assoc */
3234 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3235 iwlcore_commit_rxon(priv);
3236 iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
3237 }
3238 iwl3945_send_beacon_cmd(priv);
3239
3240 /* FIXME - we need to add code here to detect a totally new
3241 * configuration, reset the AP, unassoc, rxon timing, assoc,
3242 * clear sta table, add BCAST sta... */
3243 }
3244
3245 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3246 struct ieee80211_vif *vif,
3247 struct ieee80211_sta *sta,
3248 struct ieee80211_key_conf *key)
3249 {
3250 struct iwl_priv *priv = hw->priv;
3251 const u8 *addr;
3252 int ret = 0;
3253 u8 sta_id = IWL_INVALID_STATION;
3254 u8 static_key;
3255
3256 IWL_DEBUG_MAC80211(priv, "enter\n");
3257
3258 if (iwl3945_mod_params.sw_crypto) {
3259 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3260 return -EOPNOTSUPP;
3261 }
3262
3263 addr = sta ? sta->addr : iwl_bcast_addr;
3264 static_key = !iwl_is_associated(priv);
3265
3266 if (!static_key) {
3267 sta_id = iwl_find_station(priv, addr);
3268 if (sta_id == IWL_INVALID_STATION) {
3269 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
3270 addr);
3271 return -EINVAL;
3272 }
3273 }
3274
3275 mutex_lock(&priv->mutex);
3276 iwl_scan_cancel_timeout(priv, 100);
3277 mutex_unlock(&priv->mutex);
3278
3279 switch (cmd) {
3280 case SET_KEY:
3281 if (static_key)
3282 ret = iwl3945_set_static_key(priv, key);
3283 else
3284 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3285 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3286 break;
3287 case DISABLE_KEY:
3288 if (static_key)
3289 ret = iwl3945_remove_static_key(priv);
3290 else
3291 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3292 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3293 break;
3294 default:
3295 ret = -EINVAL;
3296 }
3297
3298 IWL_DEBUG_MAC80211(priv, "leave\n");
3299
3300 return ret;
3301 }
3302
3303 /*****************************************************************************
3304 *
3305 * sysfs attributes
3306 *
3307 *****************************************************************************/
3308
3309 #ifdef CONFIG_IWLWIFI_DEBUG
3310
3311 /*
3312 * The following adds a new attribute to the sysfs representation
3313 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3314 * used for controlling the debug level.
3315 *
3316 * See the level definitions in iwl for details.
3317 *
3318 * The debug_level being managed using sysfs below is a per device debug
3319 * level that is used instead of the global debug level if it (the per
3320 * device debug level) is set.
3321 */
3322 static ssize_t show_debug_level(struct device *d,
3323 struct device_attribute *attr, char *buf)
3324 {
3325 struct iwl_priv *priv = dev_get_drvdata(d);
3326 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3327 }
3328 static ssize_t store_debug_level(struct device *d,
3329 struct device_attribute *attr,
3330 const char *buf, size_t count)
3331 {
3332 struct iwl_priv *priv = dev_get_drvdata(d);
3333 unsigned long val;
3334 int ret;
3335
3336 ret = strict_strtoul(buf, 0, &val);
3337 if (ret)
3338 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3339 else {
3340 priv->debug_level = val;
3341 if (iwl_alloc_traffic_mem(priv))
3342 IWL_ERR(priv,
3343 "Not enough memory to generate traffic log\n");
3344 }
3345 return strnlen(buf, count);
3346 }
3347
3348 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3349 show_debug_level, store_debug_level);
3350
3351 #endif /* CONFIG_IWLWIFI_DEBUG */
3352
3353 static ssize_t show_temperature(struct device *d,
3354 struct device_attribute *attr, char *buf)
3355 {
3356 struct iwl_priv *priv = dev_get_drvdata(d);
3357
3358 if (!iwl_is_alive(priv))
3359 return -EAGAIN;
3360
3361 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3362 }
3363
3364 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3365
3366 static ssize_t show_tx_power(struct device *d,
3367 struct device_attribute *attr, char *buf)
3368 {
3369 struct iwl_priv *priv = dev_get_drvdata(d);
3370 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3371 }
3372
3373 static ssize_t store_tx_power(struct device *d,
3374 struct device_attribute *attr,
3375 const char *buf, size_t count)
3376 {
3377 struct iwl_priv *priv = dev_get_drvdata(d);
3378 char *p = (char *)buf;
3379 u32 val;
3380
3381 val = simple_strtoul(p, &p, 10);
3382 if (p == buf)
3383 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3384 else
3385 iwl3945_hw_reg_set_txpower(priv, val);
3386
3387 return count;
3388 }
3389
3390 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3391
3392 static ssize_t show_flags(struct device *d,
3393 struct device_attribute *attr, char *buf)
3394 {
3395 struct iwl_priv *priv = dev_get_drvdata(d);
3396
3397 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3398 }
3399
3400 static ssize_t store_flags(struct device *d,
3401 struct device_attribute *attr,
3402 const char *buf, size_t count)
3403 {
3404 struct iwl_priv *priv = dev_get_drvdata(d);
3405 u32 flags = simple_strtoul(buf, NULL, 0);
3406
3407 mutex_lock(&priv->mutex);
3408 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3409 /* Cancel any currently running scans... */
3410 if (iwl_scan_cancel_timeout(priv, 100))
3411 IWL_WARN(priv, "Could not cancel scan.\n");
3412 else {
3413 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3414 flags);
3415 priv->staging_rxon.flags = cpu_to_le32(flags);
3416 iwlcore_commit_rxon(priv);
3417 }
3418 }
3419 mutex_unlock(&priv->mutex);
3420
3421 return count;
3422 }
3423
3424 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3425
3426 static ssize_t show_filter_flags(struct device *d,
3427 struct device_attribute *attr, char *buf)
3428 {
3429 struct iwl_priv *priv = dev_get_drvdata(d);
3430
3431 return sprintf(buf, "0x%04X\n",
3432 le32_to_cpu(priv->active_rxon.filter_flags));
3433 }
3434
3435 static ssize_t store_filter_flags(struct device *d,
3436 struct device_attribute *attr,
3437 const char *buf, size_t count)
3438 {
3439 struct iwl_priv *priv = dev_get_drvdata(d);
3440 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3441
3442 mutex_lock(&priv->mutex);
3443 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3444 /* Cancel any currently running scans... */
3445 if (iwl_scan_cancel_timeout(priv, 100))
3446 IWL_WARN(priv, "Could not cancel scan.\n");
3447 else {
3448 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3449 "0x%04X\n", filter_flags);
3450 priv->staging_rxon.filter_flags =
3451 cpu_to_le32(filter_flags);
3452 iwlcore_commit_rxon(priv);
3453 }
3454 }
3455 mutex_unlock(&priv->mutex);
3456
3457 return count;
3458 }
3459
3460 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3461 store_filter_flags);
3462
3463 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3464
3465 static ssize_t show_measurement(struct device *d,
3466 struct device_attribute *attr, char *buf)
3467 {
3468 struct iwl_priv *priv = dev_get_drvdata(d);
3469 struct iwl_spectrum_notification measure_report;
3470 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3471 u8 *data = (u8 *)&measure_report;
3472 unsigned long flags;
3473
3474 spin_lock_irqsave(&priv->lock, flags);
3475 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3476 spin_unlock_irqrestore(&priv->lock, flags);
3477 return 0;
3478 }
3479 memcpy(&measure_report, &priv->measure_report, size);
3480 priv->measurement_status = 0;
3481 spin_unlock_irqrestore(&priv->lock, flags);
3482
3483 while (size && (PAGE_SIZE - len)) {
3484 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3485 PAGE_SIZE - len, 1);
3486 len = strlen(buf);
3487 if (PAGE_SIZE - len)
3488 buf[len++] = '\n';
3489
3490 ofs += 16;
3491 size -= min(size, 16U);
3492 }
3493
3494 return len;
3495 }
3496
3497 static ssize_t store_measurement(struct device *d,
3498 struct device_attribute *attr,
3499 const char *buf, size_t count)
3500 {
3501 struct iwl_priv *priv = dev_get_drvdata(d);
3502 struct ieee80211_measurement_params params = {
3503 .channel = le16_to_cpu(priv->active_rxon.channel),
3504 .start_time = cpu_to_le64(priv->last_tsf),
3505 .duration = cpu_to_le16(1),
3506 };
3507 u8 type = IWL_MEASURE_BASIC;
3508 u8 buffer[32];
3509 u8 channel;
3510
3511 if (count) {
3512 char *p = buffer;
3513 strncpy(buffer, buf, min(sizeof(buffer), count));
3514 channel = simple_strtoul(p, NULL, 0);
3515 if (channel)
3516 params.channel = channel;
3517
3518 p = buffer;
3519 while (*p && *p != ' ')
3520 p++;
3521 if (*p)
3522 type = simple_strtoul(p + 1, NULL, 0);
3523 }
3524
3525 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3526 "channel %d (for '%s')\n", type, params.channel, buf);
3527 iwl3945_get_measurement(priv, &params, type);
3528
3529 return count;
3530 }
3531
3532 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3533 show_measurement, store_measurement);
3534 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
3535
3536 static ssize_t store_retry_rate(struct device *d,
3537 struct device_attribute *attr,
3538 const char *buf, size_t count)
3539 {
3540 struct iwl_priv *priv = dev_get_drvdata(d);
3541
3542 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3543 if (priv->retry_rate <= 0)
3544 priv->retry_rate = 1;
3545
3546 return count;
3547 }
3548
3549 static ssize_t show_retry_rate(struct device *d,
3550 struct device_attribute *attr, char *buf)
3551 {
3552 struct iwl_priv *priv = dev_get_drvdata(d);
3553 return sprintf(buf, "%d", priv->retry_rate);
3554 }
3555
3556 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3557 store_retry_rate);
3558
3559
3560 static ssize_t show_channels(struct device *d,
3561 struct device_attribute *attr, char *buf)
3562 {
3563 /* all this shit doesn't belong into sysfs anyway */
3564 return 0;
3565 }
3566
3567 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3568
3569 static ssize_t show_statistics(struct device *d,
3570 struct device_attribute *attr, char *buf)
3571 {
3572 struct iwl_priv *priv = dev_get_drvdata(d);
3573 u32 size = sizeof(struct iwl3945_notif_statistics);
3574 u32 len = 0, ofs = 0;
3575 u8 *data = (u8 *)&priv->statistics_39;
3576 int rc = 0;
3577
3578 if (!iwl_is_alive(priv))
3579 return -EAGAIN;
3580
3581 mutex_lock(&priv->mutex);
3582 rc = iwl_send_statistics_request(priv, 0);
3583 mutex_unlock(&priv->mutex);
3584
3585 if (rc) {
3586 len = sprintf(buf,
3587 "Error sending statistics request: 0x%08X\n", rc);
3588 return len;
3589 }
3590
3591 while (size && (PAGE_SIZE - len)) {
3592 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3593 PAGE_SIZE - len, 1);
3594 len = strlen(buf);
3595 if (PAGE_SIZE - len)
3596 buf[len++] = '\n';
3597
3598 ofs += 16;
3599 size -= min(size, 16U);
3600 }
3601
3602 return len;
3603 }
3604
3605 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3606
3607 static ssize_t show_antenna(struct device *d,
3608 struct device_attribute *attr, char *buf)
3609 {
3610 struct iwl_priv *priv = dev_get_drvdata(d);
3611
3612 if (!iwl_is_alive(priv))
3613 return -EAGAIN;
3614
3615 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3616 }
3617
3618 static ssize_t store_antenna(struct device *d,
3619 struct device_attribute *attr,
3620 const char *buf, size_t count)
3621 {
3622 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3623 int ant;
3624
3625 if (count == 0)
3626 return 0;
3627
3628 if (sscanf(buf, "%1i", &ant) != 1) {
3629 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3630 return count;
3631 }
3632
3633 if ((ant >= 0) && (ant <= 2)) {
3634 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3635 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3636 } else
3637 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3638
3639
3640 return count;
3641 }
3642
3643 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3644
3645 static ssize_t show_status(struct device *d,
3646 struct device_attribute *attr, char *buf)
3647 {
3648 struct iwl_priv *priv = dev_get_drvdata(d);
3649 if (!iwl_is_alive(priv))
3650 return -EAGAIN;
3651 return sprintf(buf, "0x%08x\n", (int)priv->status);
3652 }
3653
3654 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3655
3656 static ssize_t dump_error_log(struct device *d,
3657 struct device_attribute *attr,
3658 const char *buf, size_t count)
3659 {
3660 struct iwl_priv *priv = dev_get_drvdata(d);
3661 char *p = (char *)buf;
3662
3663 if (p[0] == '1')
3664 iwl3945_dump_nic_error_log(priv);
3665
3666 return strnlen(buf, count);
3667 }
3668
3669 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3670
3671 static ssize_t dump_event_log(struct device *d,
3672 struct device_attribute *attr,
3673 const char *buf, size_t count)
3674 {
3675 struct iwl_priv *priv = dev_get_drvdata(d);
3676 char *p = (char *)buf;
3677
3678 if (p[0] == '1')
3679 iwl3945_dump_nic_event_log(priv);
3680
3681 return strnlen(buf, count);
3682 }
3683
3684 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
3685
3686 /*****************************************************************************
3687 *
3688 * driver setup and tear down
3689 *
3690 *****************************************************************************/
3691
3692 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3693 {
3694 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3695
3696 init_waitqueue_head(&priv->wait_command_queue);
3697
3698 INIT_WORK(&priv->up, iwl3945_bg_up);
3699 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3700 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3701 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
3702 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3703 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3704 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
3705 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3706 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
3707 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3708 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
3709
3710 iwl3945_hw_setup_deferred_work(priv);
3711
3712 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3713 iwl3945_irq_tasklet, (unsigned long)priv);
3714 }
3715
3716 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3717 {
3718 iwl3945_hw_cancel_deferred_work(priv);
3719
3720 cancel_delayed_work_sync(&priv->init_alive_start);
3721 cancel_delayed_work(&priv->scan_check);
3722 cancel_delayed_work(&priv->alive_start);
3723 cancel_work_sync(&priv->beacon_update);
3724 }
3725
3726 static struct attribute *iwl3945_sysfs_entries[] = {
3727 &dev_attr_antenna.attr,
3728 &dev_attr_channels.attr,
3729 &dev_attr_dump_errors.attr,
3730 &dev_attr_dump_events.attr,
3731 &dev_attr_flags.attr,
3732 &dev_attr_filter_flags.attr,
3733 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3734 &dev_attr_measurement.attr,
3735 #endif
3736 &dev_attr_retry_rate.attr,
3737 &dev_attr_statistics.attr,
3738 &dev_attr_status.attr,
3739 &dev_attr_temperature.attr,
3740 &dev_attr_tx_power.attr,
3741 #ifdef CONFIG_IWLWIFI_DEBUG
3742 &dev_attr_debug_level.attr,
3743 #endif
3744 NULL
3745 };
3746
3747 static struct attribute_group iwl3945_attribute_group = {
3748 .name = NULL, /* put in device directory */
3749 .attrs = iwl3945_sysfs_entries,
3750 };
3751
3752 static struct ieee80211_ops iwl3945_hw_ops = {
3753 .tx = iwl3945_mac_tx,
3754 .start = iwl3945_mac_start,
3755 .stop = iwl3945_mac_stop,
3756 .add_interface = iwl_mac_add_interface,
3757 .remove_interface = iwl_mac_remove_interface,
3758 .config = iwl_mac_config,
3759 .configure_filter = iwl_configure_filter,
3760 .set_key = iwl3945_mac_set_key,
3761 .get_tx_stats = iwl_mac_get_tx_stats,
3762 .conf_tx = iwl_mac_conf_tx,
3763 .reset_tsf = iwl_mac_reset_tsf,
3764 .bss_info_changed = iwl_bss_info_changed,
3765 .hw_scan = iwl_mac_hw_scan
3766 };
3767
3768 static int iwl3945_init_drv(struct iwl_priv *priv)
3769 {
3770 int ret;
3771 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3772
3773 priv->retry_rate = 1;
3774 priv->ibss_beacon = NULL;
3775
3776 spin_lock_init(&priv->lock);
3777 spin_lock_init(&priv->sta_lock);
3778 spin_lock_init(&priv->hcmd_lock);
3779
3780 INIT_LIST_HEAD(&priv->free_frames);
3781
3782 mutex_init(&priv->mutex);
3783
3784 /* Clear the driver's (not device's) station table */
3785 iwl_clear_stations_table(priv);
3786
3787 priv->data_retry_limit = -1;
3788 priv->ieee_channels = NULL;
3789 priv->ieee_rates = NULL;
3790 priv->band = IEEE80211_BAND_2GHZ;
3791
3792 priv->iw_mode = NL80211_IFTYPE_STATION;
3793
3794 iwl_reset_qos(priv);
3795
3796 priv->qos_data.qos_active = 0;
3797 priv->qos_data.qos_cap.val = 0;
3798
3799 priv->rates_mask = IWL_RATES_MASK;
3800 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
3801
3802 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3803 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3804 eeprom->version);
3805 ret = -EINVAL;
3806 goto err;
3807 }
3808 ret = iwl_init_channel_map(priv);
3809 if (ret) {
3810 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3811 goto err;
3812 }
3813
3814 /* Set up txpower settings in driver for all channels */
3815 if (iwl3945_txpower_set_from_eeprom(priv)) {
3816 ret = -EIO;
3817 goto err_free_channel_map;
3818 }
3819
3820 ret = iwlcore_init_geos(priv);
3821 if (ret) {
3822 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3823 goto err_free_channel_map;
3824 }
3825 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3826
3827 return 0;
3828
3829 err_free_channel_map:
3830 iwl_free_channel_map(priv);
3831 err:
3832 return ret;
3833 }
3834
3835 static int iwl3945_setup_mac(struct iwl_priv *priv)
3836 {
3837 int ret;
3838 struct ieee80211_hw *hw = priv->hw;
3839
3840 hw->rate_control_algorithm = "iwl-3945-rs";
3841 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3842
3843 /* Tell mac80211 our characteristics */
3844 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3845 IEEE80211_HW_NOISE_DBM |
3846 IEEE80211_HW_SPECTRUM_MGMT |
3847 IEEE80211_HW_SUPPORTS_PS |
3848 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3849
3850 hw->wiphy->interface_modes =
3851 BIT(NL80211_IFTYPE_STATION) |
3852 BIT(NL80211_IFTYPE_ADHOC);
3853
3854 hw->wiphy->custom_regulatory = true;
3855
3856 /* Firmware does not support this */
3857 hw->wiphy->disable_beacon_hints = true;
3858
3859 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3860 /* we create the 802.11 header and a zero-length SSID element */
3861 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
3862
3863 /* Default value; 4 EDCA QOS priorities */
3864 hw->queues = 4;
3865
3866 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3867 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3868 &priv->bands[IEEE80211_BAND_2GHZ];
3869
3870 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3871 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3872 &priv->bands[IEEE80211_BAND_5GHZ];
3873
3874 ret = ieee80211_register_hw(priv->hw);
3875 if (ret) {
3876 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3877 return ret;
3878 }
3879 priv->mac80211_registered = 1;
3880
3881 return 0;
3882 }
3883
3884 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3885 {
3886 int err = 0;
3887 struct iwl_priv *priv;
3888 struct ieee80211_hw *hw;
3889 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3890 struct iwl3945_eeprom *eeprom;
3891 unsigned long flags;
3892
3893 /***********************
3894 * 1. Allocating HW data
3895 * ********************/
3896
3897 /* mac80211 allocates memory for this device instance, including
3898 * space for this driver's private structure */
3899 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
3900 if (hw == NULL) {
3901 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
3902 err = -ENOMEM;
3903 goto out;
3904 }
3905 priv = hw->priv;
3906 SET_IEEE80211_DEV(hw, &pdev->dev);
3907
3908 /*
3909 * Disabling hardware scan means that mac80211 will perform scans
3910 * "the hard way", rather than using device's scan.
3911 */
3912 if (iwl3945_mod_params.disable_hw_scan) {
3913 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
3914 iwl3945_hw_ops.hw_scan = NULL;
3915 }
3916
3917
3918 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3919 priv->cfg = cfg;
3920 priv->pci_dev = pdev;
3921 priv->inta_mask = CSR_INI_SET_MASK;
3922
3923 #ifdef CONFIG_IWLWIFI_DEBUG
3924 atomic_set(&priv->restrict_refcnt, 0);
3925 #endif
3926 if (iwl_alloc_traffic_mem(priv))
3927 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3928
3929 /***************************
3930 * 2. Initializing PCI bus
3931 * *************************/
3932 if (pci_enable_device(pdev)) {
3933 err = -ENODEV;
3934 goto out_ieee80211_free_hw;
3935 }
3936
3937 pci_set_master(pdev);
3938
3939 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3940 if (!err)
3941 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3942 if (err) {
3943 IWL_WARN(priv, "No suitable DMA available.\n");
3944 goto out_pci_disable_device;
3945 }
3946
3947 pci_set_drvdata(pdev, priv);
3948 err = pci_request_regions(pdev, DRV_NAME);
3949 if (err)
3950 goto out_pci_disable_device;
3951
3952 /***********************
3953 * 3. Read REV Register
3954 * ********************/
3955 priv->hw_base = pci_iomap(pdev, 0, 0);
3956 if (!priv->hw_base) {
3957 err = -ENODEV;
3958 goto out_pci_release_regions;
3959 }
3960
3961 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3962 (unsigned long long) pci_resource_len(pdev, 0));
3963 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3964
3965 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3966 * PCI Tx retries from interfering with C3 CPU state */
3967 pci_write_config_byte(pdev, 0x41, 0x00);
3968
3969 /* this spin lock will be used in apm_ops.init and EEPROM access
3970 * we should init now
3971 */
3972 spin_lock_init(&priv->reg_lock);
3973
3974 /* amp init */
3975 err = priv->cfg->ops->lib->apm_ops.init(priv);
3976 if (err < 0) {
3977 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
3978 goto out_iounmap;
3979 }
3980
3981 /***********************
3982 * 4. Read EEPROM
3983 * ********************/
3984
3985 /* Read the EEPROM */
3986 err = iwl_eeprom_init(priv);
3987 if (err) {
3988 IWL_ERR(priv, "Unable to init EEPROM\n");
3989 goto out_iounmap;
3990 }
3991 /* MAC Address location in EEPROM same for 3945/4965 */
3992 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3993 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
3994 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3995 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3996
3997 /***********************
3998 * 5. Setup HW Constants
3999 * ********************/
4000 /* Device-specific setup */
4001 if (iwl3945_hw_set_hw_params(priv)) {
4002 IWL_ERR(priv, "failed to set hw settings\n");
4003 goto out_eeprom_free;
4004 }
4005
4006 /***********************
4007 * 6. Setup priv
4008 * ********************/
4009
4010 err = iwl3945_init_drv(priv);
4011 if (err) {
4012 IWL_ERR(priv, "initializing driver failed\n");
4013 goto out_unset_hw_params;
4014 }
4015
4016 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4017 priv->cfg->name);
4018
4019 /***********************
4020 * 7. Setup Services
4021 * ********************/
4022
4023 spin_lock_irqsave(&priv->lock, flags);
4024 iwl_disable_interrupts(priv);
4025 spin_unlock_irqrestore(&priv->lock, flags);
4026
4027 pci_enable_msi(priv->pci_dev);
4028
4029 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4030 IRQF_SHARED, DRV_NAME, priv);
4031 if (err) {
4032 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4033 goto out_disable_msi;
4034 }
4035
4036 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4037 if (err) {
4038 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4039 goto out_release_irq;
4040 }
4041
4042 iwl_set_rxon_channel(priv,
4043 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4044 iwl3945_setup_deferred_work(priv);
4045 iwl3945_setup_rx_handlers(priv);
4046
4047 /*********************************
4048 * 8. Setup and Register mac80211
4049 * *******************************/
4050
4051 iwl_enable_interrupts(priv);
4052
4053 err = iwl3945_setup_mac(priv);
4054 if (err)
4055 goto out_remove_sysfs;
4056
4057 err = iwl_dbgfs_register(priv, DRV_NAME);
4058 if (err)
4059 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4060
4061 /* Start monitoring the killswitch */
4062 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4063 2 * HZ);
4064
4065 return 0;
4066
4067 out_remove_sysfs:
4068 destroy_workqueue(priv->workqueue);
4069 priv->workqueue = NULL;
4070 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4071 out_release_irq:
4072 free_irq(priv->pci_dev->irq, priv);
4073 out_disable_msi:
4074 pci_disable_msi(priv->pci_dev);
4075 iwlcore_free_geos(priv);
4076 iwl_free_channel_map(priv);
4077 out_unset_hw_params:
4078 iwl3945_unset_hw_params(priv);
4079 out_eeprom_free:
4080 iwl_eeprom_free(priv);
4081 out_iounmap:
4082 pci_iounmap(pdev, priv->hw_base);
4083 out_pci_release_regions:
4084 pci_release_regions(pdev);
4085 out_pci_disable_device:
4086 pci_set_drvdata(pdev, NULL);
4087 pci_disable_device(pdev);
4088 out_ieee80211_free_hw:
4089 ieee80211_free_hw(priv->hw);
4090 iwl_free_traffic_mem(priv);
4091 out:
4092 return err;
4093 }
4094
4095 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4096 {
4097 struct iwl_priv *priv = pci_get_drvdata(pdev);
4098 unsigned long flags;
4099
4100 if (!priv)
4101 return;
4102
4103 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4104
4105 iwl_dbgfs_unregister(priv);
4106
4107 set_bit(STATUS_EXIT_PENDING, &priv->status);
4108
4109 if (priv->mac80211_registered) {
4110 ieee80211_unregister_hw(priv->hw);
4111 priv->mac80211_registered = 0;
4112 } else {
4113 iwl3945_down(priv);
4114 }
4115
4116 /* make sure we flush any pending irq or
4117 * tasklet for the driver
4118 */
4119 spin_lock_irqsave(&priv->lock, flags);
4120 iwl_disable_interrupts(priv);
4121 spin_unlock_irqrestore(&priv->lock, flags);
4122
4123 iwl_synchronize_irq(priv);
4124
4125 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4126
4127 cancel_delayed_work_sync(&priv->rfkill_poll);
4128
4129 iwl3945_dealloc_ucode_pci(priv);
4130
4131 if (priv->rxq.bd)
4132 iwl3945_rx_queue_free(priv, &priv->rxq);
4133 iwl3945_hw_txq_ctx_free(priv);
4134
4135 iwl3945_unset_hw_params(priv);
4136 iwl_clear_stations_table(priv);
4137
4138 /*netif_stop_queue(dev); */
4139 flush_workqueue(priv->workqueue);
4140
4141 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4142 * priv->workqueue... so we can't take down the workqueue
4143 * until now... */
4144 destroy_workqueue(priv->workqueue);
4145 priv->workqueue = NULL;
4146 iwl_free_traffic_mem(priv);
4147
4148 free_irq(pdev->irq, priv);
4149 pci_disable_msi(pdev);
4150
4151 pci_iounmap(pdev, priv->hw_base);
4152 pci_release_regions(pdev);
4153 pci_disable_device(pdev);
4154 pci_set_drvdata(pdev, NULL);
4155
4156 iwl_free_channel_map(priv);
4157 iwlcore_free_geos(priv);
4158 kfree(priv->scan);
4159 if (priv->ibss_beacon)
4160 dev_kfree_skb(priv->ibss_beacon);
4161
4162 ieee80211_free_hw(priv->hw);
4163 }
4164
4165
4166 /*****************************************************************************
4167 *
4168 * driver and module entry point
4169 *
4170 *****************************************************************************/
4171
4172 static struct pci_driver iwl3945_driver = {
4173 .name = DRV_NAME,
4174 .id_table = iwl3945_hw_card_ids,
4175 .probe = iwl3945_pci_probe,
4176 .remove = __devexit_p(iwl3945_pci_remove),
4177 #ifdef CONFIG_PM
4178 .suspend = iwl_pci_suspend,
4179 .resume = iwl_pci_resume,
4180 #endif
4181 };
4182
4183 static int __init iwl3945_init(void)
4184 {
4185
4186 int ret;
4187 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4188 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4189
4190 ret = iwl3945_rate_control_register();
4191 if (ret) {
4192 printk(KERN_ERR DRV_NAME
4193 "Unable to register rate control algorithm: %d\n", ret);
4194 return ret;
4195 }
4196
4197 ret = pci_register_driver(&iwl3945_driver);
4198 if (ret) {
4199 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4200 goto error_register;
4201 }
4202
4203 return ret;
4204
4205 error_register:
4206 iwl3945_rate_control_unregister();
4207 return ret;
4208 }
4209
4210 static void __exit iwl3945_exit(void)
4211 {
4212 pci_unregister_driver(&iwl3945_driver);
4213 iwl3945_rate_control_unregister();
4214 }
4215
4216 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4217
4218 module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
4219 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4220 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
4221 MODULE_PARM_DESC(swcrypto,
4222 "using software crypto (default 1 [software])\n");
4223 #ifdef CONFIG_IWLWIFI_DEBUG
4224 module_param_named(debug, iwl_debug_level, uint, 0644);
4225 MODULE_PARM_DESC(debug, "debug output mask");
4226 #endif
4227 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
4228 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4229 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
4230 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4231
4232 module_exit(iwl3945_exit);
4233 module_init(iwl3945_init);
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