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iwlwifi: unify iwl_setup_rxon_timing
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-fh.h"
52 #include "iwl-3945-fh.h"
53 #include "iwl-commands.h"
54 #include "iwl-sta.h"
55 #include "iwl-3945.h"
56 #include "iwl-helpers.h"
57 #include "iwl-core.h"
58 #include "iwl-dev.h"
59
60 /*
61 * module name, copyright, version, etc.
62 */
63
64 #define DRV_DESCRIPTION \
65 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
67 #ifdef CONFIG_IWLWIFI_DEBUG
68 #define VD "d"
69 #else
70 #define VD
71 #endif
72
73 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
74 #define VS "s"
75 #else
76 #define VS
77 #endif
78
79 #define IWL39_VERSION "1.2.26k" VD VS
80 #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
81 #define DRV_AUTHOR "<ilw@linux.intel.com>"
82 #define DRV_VERSION IWL39_VERSION
83
84
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89
90 /* module parameters */
91 struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_MAX_NUM_QUEUES,
93 .sw_crypto = 1,
94 .restart_fw = 1,
95 /* the rest are 0 by default */
96 };
97
98 /**
99 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
100 * @priv: eeprom and antenna fields are used to determine antenna flags
101 *
102 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
103 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
104 *
105 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
106 * IWL_ANTENNA_MAIN - Force MAIN antenna
107 * IWL_ANTENNA_AUX - Force AUX antenna
108 */
109 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
110 {
111 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
112
113 switch (iwl3945_mod_params.antenna) {
114 case IWL_ANTENNA_DIVERSITY:
115 return 0;
116
117 case IWL_ANTENNA_MAIN:
118 if (eeprom->antenna_switch_type)
119 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
120 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
121
122 case IWL_ANTENNA_AUX:
123 if (eeprom->antenna_switch_type)
124 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
125 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
126 }
127
128 /* bad antenna selector value */
129 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
130 iwl3945_mod_params.antenna);
131
132 return 0; /* "diversity" is default if error */
133 }
134
135 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
136 struct ieee80211_key_conf *keyconf,
137 u8 sta_id)
138 {
139 unsigned long flags;
140 __le16 key_flags = 0;
141 int ret;
142
143 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
144 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
145
146 if (sta_id == priv->hw_params.bcast_sta_id)
147 key_flags |= STA_KEY_MULTICAST_MSK;
148
149 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
150 keyconf->hw_key_idx = keyconf->keyidx;
151 key_flags &= ~STA_KEY_FLG_INVALID;
152
153 spin_lock_irqsave(&priv->sta_lock, flags);
154 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
155 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
156 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
157 keyconf->keylen);
158
159 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
160 keyconf->keylen);
161
162 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
163 == STA_KEY_FLG_NO_ENC)
164 priv->stations[sta_id].sta.key.key_offset =
165 iwl_get_free_ucode_key_index(priv);
166 /* else, we are overriding an existing key => no need to allocated room
167 * in uCode. */
168
169 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
170 "no space for a new key");
171
172 priv->stations[sta_id].sta.key.key_flags = key_flags;
173 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
174 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
175
176 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
177
178 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
179
180 spin_unlock_irqrestore(&priv->sta_lock, flags);
181
182 return ret;
183 }
184
185 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
186 struct ieee80211_key_conf *keyconf,
187 u8 sta_id)
188 {
189 return -EOPNOTSUPP;
190 }
191
192 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
193 struct ieee80211_key_conf *keyconf,
194 u8 sta_id)
195 {
196 return -EOPNOTSUPP;
197 }
198
199 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
200 {
201 unsigned long flags;
202
203 spin_lock_irqsave(&priv->sta_lock, flags);
204 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
205 memset(&priv->stations[sta_id].sta.key, 0,
206 sizeof(struct iwl4965_keyinfo));
207 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
208 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
209 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
210 spin_unlock_irqrestore(&priv->sta_lock, flags);
211
212 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
213 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
214 return 0;
215 }
216
217 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
218 struct ieee80211_key_conf *keyconf, u8 sta_id)
219 {
220 int ret = 0;
221
222 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
223
224 switch (keyconf->alg) {
225 case ALG_CCMP:
226 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
227 break;
228 case ALG_TKIP:
229 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
230 break;
231 case ALG_WEP:
232 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
233 break;
234 default:
235 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
236 ret = -EINVAL;
237 }
238
239 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
240 keyconf->alg, keyconf->keylen, keyconf->keyidx,
241 sta_id, ret);
242
243 return ret;
244 }
245
246 static int iwl3945_remove_static_key(struct iwl_priv *priv)
247 {
248 int ret = -EOPNOTSUPP;
249
250 return ret;
251 }
252
253 static int iwl3945_set_static_key(struct iwl_priv *priv,
254 struct ieee80211_key_conf *key)
255 {
256 if (key->alg == ALG_WEP)
257 return -EOPNOTSUPP;
258
259 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
260 return -EINVAL;
261 }
262
263 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
264 {
265 struct list_head *element;
266
267 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
268 priv->frames_count);
269
270 while (!list_empty(&priv->free_frames)) {
271 element = priv->free_frames.next;
272 list_del(element);
273 kfree(list_entry(element, struct iwl3945_frame, list));
274 priv->frames_count--;
275 }
276
277 if (priv->frames_count) {
278 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
279 priv->frames_count);
280 priv->frames_count = 0;
281 }
282 }
283
284 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
285 {
286 struct iwl3945_frame *frame;
287 struct list_head *element;
288 if (list_empty(&priv->free_frames)) {
289 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
290 if (!frame) {
291 IWL_ERR(priv, "Could not allocate frame!\n");
292 return NULL;
293 }
294
295 priv->frames_count++;
296 return frame;
297 }
298
299 element = priv->free_frames.next;
300 list_del(element);
301 return list_entry(element, struct iwl3945_frame, list);
302 }
303
304 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
305 {
306 memset(frame, 0, sizeof(*frame));
307 list_add(&frame->list, &priv->free_frames);
308 }
309
310 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
311 struct ieee80211_hdr *hdr,
312 int left)
313 {
314
315 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
316 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
317 (priv->iw_mode != NL80211_IFTYPE_AP)))
318 return 0;
319
320 if (priv->ibss_beacon->len > left)
321 return 0;
322
323 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
324
325 return priv->ibss_beacon->len;
326 }
327
328 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
329 {
330 struct iwl3945_frame *frame;
331 unsigned int frame_size;
332 int rc;
333 u8 rate;
334
335 frame = iwl3945_get_free_frame(priv);
336
337 if (!frame) {
338 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
339 "command.\n");
340 return -ENOMEM;
341 }
342
343 rate = iwl_rate_get_lowest_plcp(priv);
344
345 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
346
347 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
348 &frame->u.cmd[0]);
349
350 iwl3945_free_frame(priv, frame);
351
352 return rc;
353 }
354
355 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
356 {
357 if (priv->shared_virt)
358 pci_free_consistent(priv->pci_dev,
359 sizeof(struct iwl3945_shared),
360 priv->shared_virt,
361 priv->shared_phys);
362 }
363
364 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
365 struct ieee80211_tx_info *info,
366 struct iwl_cmd *cmd,
367 struct sk_buff *skb_frag,
368 int sta_id)
369 {
370 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
371 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
372
373 switch (keyinfo->alg) {
374 case ALG_CCMP:
375 tx->sec_ctl = TX_CMD_SEC_CCM;
376 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
377 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
378 break;
379
380 case ALG_TKIP:
381 break;
382
383 case ALG_WEP:
384 tx->sec_ctl = TX_CMD_SEC_WEP |
385 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
386
387 if (keyinfo->keylen == 13)
388 tx->sec_ctl |= TX_CMD_SEC_KEY128;
389
390 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
391
392 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
393 "with key %d\n", info->control.hw_key->hw_key_idx);
394 break;
395
396 default:
397 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
398 break;
399 }
400 }
401
402 /*
403 * handle build REPLY_TX command notification.
404 */
405 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
406 struct iwl_cmd *cmd,
407 struct ieee80211_tx_info *info,
408 struct ieee80211_hdr *hdr, u8 std_id)
409 {
410 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
411 __le32 tx_flags = tx->tx_flags;
412 __le16 fc = hdr->frame_control;
413 u8 rc_flags = info->control.rates[0].flags;
414
415 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
416 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
417 tx_flags |= TX_CMD_FLG_ACK_MSK;
418 if (ieee80211_is_mgmt(fc))
419 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
420 if (ieee80211_is_probe_resp(fc) &&
421 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
422 tx_flags |= TX_CMD_FLG_TSF_MSK;
423 } else {
424 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
425 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
426 }
427
428 tx->sta_id = std_id;
429 if (ieee80211_has_morefrags(fc))
430 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
431
432 if (ieee80211_is_data_qos(fc)) {
433 u8 *qc = ieee80211_get_qos_ctl(hdr);
434 tx->tid_tspec = qc[0] & 0xf;
435 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
436 } else {
437 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
438 }
439
440 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
441 tx_flags |= TX_CMD_FLG_RTS_MSK;
442 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
443 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
444 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
445 tx_flags |= TX_CMD_FLG_CTS_MSK;
446 }
447
448 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
449 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
450
451 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
452 if (ieee80211_is_mgmt(fc)) {
453 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
454 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
455 else
456 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
457 } else {
458 tx->timeout.pm_frame_timeout = 0;
459 #ifdef CONFIG_IWLWIFI_LEDS
460 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
461 #endif
462 }
463
464 tx->driver_txop = 0;
465 tx->tx_flags = tx_flags;
466 tx->next_frame_len = 0;
467 }
468
469 /*
470 * start REPLY_TX command process
471 */
472 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
473 {
474 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
475 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
476 struct iwl3945_tx_cmd *tx;
477 struct iwl_tx_queue *txq = NULL;
478 struct iwl_queue *q = NULL;
479 struct iwl_cmd *out_cmd = NULL;
480 dma_addr_t phys_addr;
481 dma_addr_t txcmd_phys;
482 int txq_id = skb_get_queue_mapping(skb);
483 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
484 u8 id;
485 u8 unicast;
486 u8 sta_id;
487 u8 tid = 0;
488 u16 seq_number = 0;
489 __le16 fc;
490 u8 wait_write_ptr = 0;
491 u8 *qc = NULL;
492 unsigned long flags;
493 int rc;
494
495 spin_lock_irqsave(&priv->lock, flags);
496 if (iwl_is_rfkill(priv)) {
497 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
498 goto drop_unlock;
499 }
500
501 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
502 IWL_ERR(priv, "ERROR: No TX rate available.\n");
503 goto drop_unlock;
504 }
505
506 unicast = !is_multicast_ether_addr(hdr->addr1);
507 id = 0;
508
509 fc = hdr->frame_control;
510
511 #ifdef CONFIG_IWLWIFI_DEBUG
512 if (ieee80211_is_auth(fc))
513 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
514 else if (ieee80211_is_assoc_req(fc))
515 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
516 else if (ieee80211_is_reassoc_req(fc))
517 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
518 #endif
519
520 /* drop all data frame if we are not associated */
521 if (ieee80211_is_data(fc) &&
522 (!iwl_is_monitor_mode(priv)) && /* packet injection */
523 (!iwl_is_associated(priv) ||
524 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
525 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
526 goto drop_unlock;
527 }
528
529 spin_unlock_irqrestore(&priv->lock, flags);
530
531 hdr_len = ieee80211_hdrlen(fc);
532
533 /* Find (or create) index into station table for destination station */
534 sta_id = iwl_get_sta_id(priv, hdr);
535 if (sta_id == IWL_INVALID_STATION) {
536 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
537 hdr->addr1);
538 goto drop;
539 }
540
541 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
542
543 if (ieee80211_is_data_qos(fc)) {
544 qc = ieee80211_get_qos_ctl(hdr);
545 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
546 seq_number = priv->stations[sta_id].tid[tid].seq_number &
547 IEEE80211_SCTL_SEQ;
548 hdr->seq_ctrl = cpu_to_le16(seq_number) |
549 (hdr->seq_ctrl &
550 cpu_to_le16(IEEE80211_SCTL_FRAG));
551 seq_number += 0x10;
552 }
553
554 /* Descriptor for chosen Tx queue */
555 txq = &priv->txq[txq_id];
556 q = &txq->q;
557
558 spin_lock_irqsave(&priv->lock, flags);
559
560 idx = get_cmd_index(q, q->write_ptr, 0);
561
562 /* Set up driver data for this TFD */
563 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
564 txq->txb[q->write_ptr].skb[0] = skb;
565
566 /* Init first empty entry in queue's array of Tx/cmd buffers */
567 out_cmd = txq->cmd[idx];
568 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
569 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
570 memset(tx, 0, sizeof(*tx));
571
572 /*
573 * Set up the Tx-command (not MAC!) header.
574 * Store the chosen Tx queue and TFD index within the sequence field;
575 * after Tx, uCode's Tx response will return this value so driver can
576 * locate the frame within the tx queue and do post-tx processing.
577 */
578 out_cmd->hdr.cmd = REPLY_TX;
579 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
580 INDEX_TO_SEQ(q->write_ptr)));
581
582 /* Copy MAC header from skb into command buffer */
583 memcpy(tx->hdr, hdr, hdr_len);
584
585
586 if (info->control.hw_key)
587 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
588
589 /* TODO need this for burst mode later on */
590 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
591
592 /* set is_hcca to 0; it probably will never be implemented */
593 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
594
595 /* Total # bytes to be transmitted */
596 len = (u16)skb->len;
597 tx->len = cpu_to_le16(len);
598
599
600 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
601 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
602
603 if (!ieee80211_has_morefrags(hdr->frame_control)) {
604 txq->need_update = 1;
605 if (qc)
606 priv->stations[sta_id].tid[tid].seq_number = seq_number;
607 } else {
608 wait_write_ptr = 1;
609 txq->need_update = 0;
610 }
611
612 IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
613 le16_to_cpu(out_cmd->hdr.sequence));
614 IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
615 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
616 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
617 ieee80211_hdrlen(fc));
618
619 /*
620 * Use the first empty entry in this queue's command buffer array
621 * to contain the Tx command and MAC header concatenated together
622 * (payload data will be in another buffer).
623 * Size of this varies, due to varying MAC header length.
624 * If end is not dword aligned, we'll have 2 extra bytes at the end
625 * of the MAC header (device reads on dword boundaries).
626 * We'll tell device about this padding later.
627 */
628 len = sizeof(struct iwl3945_tx_cmd) +
629 sizeof(struct iwl_cmd_header) + hdr_len;
630
631 len_org = len;
632 len = (len + 3) & ~3;
633
634 if (len_org != len)
635 len_org = 1;
636 else
637 len_org = 0;
638
639 /* Physical address of this Tx command's header (not MAC header!),
640 * within command buffer array. */
641 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
642 len, PCI_DMA_TODEVICE);
643 /* we do not map meta data ... so we can safely access address to
644 * provide to unmap command*/
645 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
646 pci_unmap_len_set(&out_cmd->meta, len, len);
647
648 /* Add buffer containing Tx command and MAC(!) header to TFD's
649 * first entry */
650 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
651 txcmd_phys, len, 1, 0);
652
653
654 /* Set up TFD's 2nd entry to point directly to remainder of skb,
655 * if any (802.11 null frames have no payload). */
656 len = skb->len - hdr_len;
657 if (len) {
658 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
659 len, PCI_DMA_TODEVICE);
660 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
661 phys_addr, len,
662 0, U32_PAD(len));
663 }
664
665
666 /* Tell device the write index *just past* this latest filled TFD */
667 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
668 rc = iwl_txq_update_write_ptr(priv, txq);
669 spin_unlock_irqrestore(&priv->lock, flags);
670
671 if (rc)
672 return rc;
673
674 if ((iwl_queue_space(q) < q->high_mark)
675 && priv->mac80211_registered) {
676 if (wait_write_ptr) {
677 spin_lock_irqsave(&priv->lock, flags);
678 txq->need_update = 1;
679 iwl_txq_update_write_ptr(priv, txq);
680 spin_unlock_irqrestore(&priv->lock, flags);
681 }
682
683 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
684 }
685
686 return 0;
687
688 drop_unlock:
689 spin_unlock_irqrestore(&priv->lock, flags);
690 drop:
691 return -1;
692 }
693
694 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
695
696 #include "iwl-spectrum.h"
697
698 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
699 #define BEACON_TIME_MASK_HIGH 0xFF000000
700 #define TIME_UNIT 1024
701
702 /*
703 * extended beacon time format
704 * time in usec will be changed into a 32-bit value in 8:24 format
705 * the high 1 byte is the beacon counts
706 * the lower 3 bytes is the time in usec within one beacon interval
707 */
708
709 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
710 {
711 u32 quot;
712 u32 rem;
713 u32 interval = beacon_interval * 1024;
714
715 if (!interval || !usec)
716 return 0;
717
718 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
719 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
720
721 return (quot << 24) + rem;
722 }
723
724 /* base is usually what we get from ucode with each received frame,
725 * the same as HW timer counter counting down
726 */
727
728 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
729 {
730 u32 base_low = base & BEACON_TIME_MASK_LOW;
731 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
732 u32 interval = beacon_interval * TIME_UNIT;
733 u32 res = (base & BEACON_TIME_MASK_HIGH) +
734 (addon & BEACON_TIME_MASK_HIGH);
735
736 if (base_low > addon_low)
737 res += base_low - addon_low;
738 else if (base_low < addon_low) {
739 res += interval + base_low - addon_low;
740 res += (1 << 24);
741 } else
742 res += (1 << 24);
743
744 return cpu_to_le32(res);
745 }
746
747 static int iwl3945_get_measurement(struct iwl_priv *priv,
748 struct ieee80211_measurement_params *params,
749 u8 type)
750 {
751 struct iwl_spectrum_cmd spectrum;
752 struct iwl_rx_packet *res;
753 struct iwl_host_cmd cmd = {
754 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
755 .data = (void *)&spectrum,
756 .meta.flags = CMD_WANT_SKB,
757 };
758 u32 add_time = le64_to_cpu(params->start_time);
759 int rc;
760 int spectrum_resp_status;
761 int duration = le16_to_cpu(params->duration);
762
763 if (iwl_is_associated(priv))
764 add_time =
765 iwl3945_usecs_to_beacons(
766 le64_to_cpu(params->start_time) - priv->last_tsf,
767 le16_to_cpu(priv->rxon_timing.beacon_interval));
768
769 memset(&spectrum, 0, sizeof(spectrum));
770
771 spectrum.channel_count = cpu_to_le16(1);
772 spectrum.flags =
773 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
774 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
775 cmd.len = sizeof(spectrum);
776 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
777
778 if (iwl_is_associated(priv))
779 spectrum.start_time =
780 iwl3945_add_beacon_time(priv->last_beacon_time,
781 add_time,
782 le16_to_cpu(priv->rxon_timing.beacon_interval));
783 else
784 spectrum.start_time = 0;
785
786 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
787 spectrum.channels[0].channel = params->channel;
788 spectrum.channels[0].type = type;
789 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
790 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
791 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
792
793 rc = iwl_send_cmd_sync(priv, &cmd);
794 if (rc)
795 return rc;
796
797 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
798 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
799 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
800 rc = -EIO;
801 }
802
803 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
804 switch (spectrum_resp_status) {
805 case 0: /* Command will be handled */
806 if (res->u.spectrum.id != 0xff) {
807 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
808 res->u.spectrum.id);
809 priv->measurement_status &= ~MEASUREMENT_READY;
810 }
811 priv->measurement_status |= MEASUREMENT_ACTIVE;
812 rc = 0;
813 break;
814
815 case 1: /* Command will not be handled */
816 rc = -EAGAIN;
817 break;
818 }
819
820 dev_kfree_skb_any(cmd.meta.u.skb);
821
822 return rc;
823 }
824 #endif
825
826 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
827 struct iwl_rx_mem_buffer *rxb)
828 {
829 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
830 struct iwl_alive_resp *palive;
831 struct delayed_work *pwork;
832
833 palive = &pkt->u.alive_frame;
834
835 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
836 "0x%01X 0x%01X\n",
837 palive->is_valid, palive->ver_type,
838 palive->ver_subtype);
839
840 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
841 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
842 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
843 sizeof(struct iwl_alive_resp));
844 pwork = &priv->init_alive_start;
845 } else {
846 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
847 memcpy(&priv->card_alive, &pkt->u.alive_frame,
848 sizeof(struct iwl_alive_resp));
849 pwork = &priv->alive_start;
850 iwl3945_disable_events(priv);
851 }
852
853 /* We delay the ALIVE response by 5ms to
854 * give the HW RF Kill time to activate... */
855 if (palive->is_valid == UCODE_VALID_OK)
856 queue_delayed_work(priv->workqueue, pwork,
857 msecs_to_jiffies(5));
858 else
859 IWL_WARN(priv, "uCode did not respond OK.\n");
860 }
861
862 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
863 struct iwl_rx_mem_buffer *rxb)
864 {
865 #ifdef CONFIG_IWLWIFI_DEBUG
866 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
867 #endif
868
869 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
870 return;
871 }
872
873 static void iwl3945_bg_beacon_update(struct work_struct *work)
874 {
875 struct iwl_priv *priv =
876 container_of(work, struct iwl_priv, beacon_update);
877 struct sk_buff *beacon;
878
879 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
880 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
881
882 if (!beacon) {
883 IWL_ERR(priv, "update beacon failed\n");
884 return;
885 }
886
887 mutex_lock(&priv->mutex);
888 /* new beacon skb is allocated every time; dispose previous.*/
889 if (priv->ibss_beacon)
890 dev_kfree_skb(priv->ibss_beacon);
891
892 priv->ibss_beacon = beacon;
893 mutex_unlock(&priv->mutex);
894
895 iwl3945_send_beacon_cmd(priv);
896 }
897
898 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
899 struct iwl_rx_mem_buffer *rxb)
900 {
901 #ifdef CONFIG_IWLWIFI_DEBUG
902 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
903 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
904 u8 rate = beacon->beacon_notify_hdr.rate;
905
906 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
907 "tsf %d %d rate %d\n",
908 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
909 beacon->beacon_notify_hdr.failure_frame,
910 le32_to_cpu(beacon->ibss_mgr_status),
911 le32_to_cpu(beacon->high_tsf),
912 le32_to_cpu(beacon->low_tsf), rate);
913 #endif
914
915 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
916 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
917 queue_work(priv->workqueue, &priv->beacon_update);
918 }
919
920 /* Handle notification from uCode that card's power state is changing
921 * due to software, hardware, or critical temperature RFKILL */
922 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
923 struct iwl_rx_mem_buffer *rxb)
924 {
925 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
926 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
927 unsigned long status = priv->status;
928
929 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
930 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
931 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
932
933 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
934 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
935
936 if (flags & HW_CARD_DISABLED)
937 set_bit(STATUS_RF_KILL_HW, &priv->status);
938 else
939 clear_bit(STATUS_RF_KILL_HW, &priv->status);
940
941
942 iwl_scan_cancel(priv);
943
944 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
945 test_bit(STATUS_RF_KILL_HW, &priv->status)))
946 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
947 test_bit(STATUS_RF_KILL_HW, &priv->status));
948 else
949 wake_up_interruptible(&priv->wait_command_queue);
950 }
951
952 /**
953 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
954 *
955 * Setup the RX handlers for each of the reply types sent from the uCode
956 * to the host.
957 *
958 * This function chains into the hardware specific files for them to setup
959 * any hardware specific handlers as well.
960 */
961 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
962 {
963 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
964 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
965 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
966 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
967 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
968 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
969 iwl_rx_pm_debug_statistics_notif;
970 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
971
972 /*
973 * The same handler is used for both the REPLY to a discrete
974 * statistics request from the host as well as for the periodic
975 * statistics notifications (after received beacons) from the uCode.
976 */
977 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
978 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
979
980 iwl_setup_spectrum_handlers(priv);
981 iwl_setup_rx_scan_handlers(priv);
982 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
983
984 /* Set up hardware specific Rx handlers */
985 iwl3945_hw_rx_handler_setup(priv);
986 }
987
988 /************************** RX-FUNCTIONS ****************************/
989 /*
990 * Rx theory of operation
991 *
992 * The host allocates 32 DMA target addresses and passes the host address
993 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
994 * 0 to 31
995 *
996 * Rx Queue Indexes
997 * The host/firmware share two index registers for managing the Rx buffers.
998 *
999 * The READ index maps to the first position that the firmware may be writing
1000 * to -- the driver can read up to (but not including) this position and get
1001 * good data.
1002 * The READ index is managed by the firmware once the card is enabled.
1003 *
1004 * The WRITE index maps to the last position the driver has read from -- the
1005 * position preceding WRITE is the last slot the firmware can place a packet.
1006 *
1007 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1008 * WRITE = READ.
1009 *
1010 * During initialization, the host sets up the READ queue position to the first
1011 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1012 *
1013 * When the firmware places a packet in a buffer, it will advance the READ index
1014 * and fire the RX interrupt. The driver can then query the READ index and
1015 * process as many packets as possible, moving the WRITE index forward as it
1016 * resets the Rx queue buffers with new memory.
1017 *
1018 * The management in the driver is as follows:
1019 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1020 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
1021 * to replenish the iwl->rxq->rx_free.
1022 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
1023 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1024 * 'processed' and 'read' driver indexes as well)
1025 * + A received packet is processed and handed to the kernel network stack,
1026 * detached from the iwl->rxq. The driver 'processed' index is updated.
1027 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1028 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1029 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1030 * were enough free buffers and RX_STALLED is set it is cleared.
1031 *
1032 *
1033 * Driver sequence:
1034 *
1035 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
1036 * iwl3945_rx_queue_restock
1037 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1038 * queue, updates firmware pointers, and updates
1039 * the WRITE index. If insufficient rx_free buffers
1040 * are available, schedules iwl3945_rx_replenish
1041 *
1042 * -- enable interrupts --
1043 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
1044 * READ INDEX, detaching the SKB from the pool.
1045 * Moves the packet buffer from queue to rx_used.
1046 * Calls iwl3945_rx_queue_restock to refill any empty
1047 * slots.
1048 * ...
1049 *
1050 */
1051
1052 /**
1053 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1054 */
1055 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1056 dma_addr_t dma_addr)
1057 {
1058 return cpu_to_le32((u32)dma_addr);
1059 }
1060
1061 /**
1062 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1063 *
1064 * If there are slots in the RX queue that need to be restocked,
1065 * and we have free pre-allocated buffers, fill the ranks as much
1066 * as we can, pulling from rx_free.
1067 *
1068 * This moves the 'write' index forward to catch up with 'processed', and
1069 * also updates the memory address in the firmware to reference the new
1070 * target buffer.
1071 */
1072 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
1073 {
1074 struct iwl_rx_queue *rxq = &priv->rxq;
1075 struct list_head *element;
1076 struct iwl_rx_mem_buffer *rxb;
1077 unsigned long flags;
1078 int write, rc;
1079
1080 spin_lock_irqsave(&rxq->lock, flags);
1081 write = rxq->write & ~0x7;
1082 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1083 /* Get next free Rx buffer, remove from free list */
1084 element = rxq->rx_free.next;
1085 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1086 list_del(element);
1087
1088 /* Point to Rx buffer via next RBD in circular buffer */
1089 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
1090 rxq->queue[rxq->write] = rxb;
1091 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1092 rxq->free_count--;
1093 }
1094 spin_unlock_irqrestore(&rxq->lock, flags);
1095 /* If the pre-allocated buffer pool is dropping low, schedule to
1096 * refill it */
1097 if (rxq->free_count <= RX_LOW_WATERMARK)
1098 queue_work(priv->workqueue, &priv->rx_replenish);
1099
1100
1101 /* If we've added more space for the firmware to place data, tell it.
1102 * Increment device's write pointer in multiples of 8. */
1103 if ((rxq->write_actual != (rxq->write & ~0x7))
1104 || (abs(rxq->write - rxq->read) > 7)) {
1105 spin_lock_irqsave(&rxq->lock, flags);
1106 rxq->need_update = 1;
1107 spin_unlock_irqrestore(&rxq->lock, flags);
1108 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
1109 if (rc)
1110 return rc;
1111 }
1112
1113 return 0;
1114 }
1115
1116 /**
1117 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1118 *
1119 * When moving to rx_free an SKB is allocated for the slot.
1120 *
1121 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1122 * This is called as a scheduled work item (except for during initialization)
1123 */
1124 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1125 {
1126 struct iwl_rx_queue *rxq = &priv->rxq;
1127 struct list_head *element;
1128 struct iwl_rx_mem_buffer *rxb;
1129 unsigned long flags;
1130
1131 while (1) {
1132 spin_lock_irqsave(&rxq->lock, flags);
1133
1134 if (list_empty(&rxq->rx_used)) {
1135 spin_unlock_irqrestore(&rxq->lock, flags);
1136 return;
1137 }
1138
1139 element = rxq->rx_used.next;
1140 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1141 list_del(element);
1142 spin_unlock_irqrestore(&rxq->lock, flags);
1143
1144 /* Alloc a new receive buffer */
1145 rxb->skb =
1146 alloc_skb(priv->hw_params.rx_buf_size,
1147 priority);
1148 if (!rxb->skb) {
1149 if (net_ratelimit())
1150 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
1151 /* We don't reschedule replenish work here -- we will
1152 * call the restock method and if it still needs
1153 * more buffers it will schedule replenish */
1154 break;
1155 }
1156
1157 /* If radiotap head is required, reserve some headroom here.
1158 * The physical head count is a variable rx_stats->phy_count.
1159 * We reserve 4 bytes here. Plus these extra bytes, the
1160 * headroom of the physical head should be enough for the
1161 * radiotap head that iwl3945 supported. See iwl3945_rt.
1162 */
1163 skb_reserve(rxb->skb, 4);
1164
1165 /* Get physical address of RB/SKB */
1166 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1167 rxb->skb->data,
1168 priv->hw_params.rx_buf_size,
1169 PCI_DMA_FROMDEVICE);
1170
1171 spin_lock_irqsave(&rxq->lock, flags);
1172 list_add_tail(&rxb->list, &rxq->rx_free);
1173 priv->alloc_rxb_skb++;
1174 rxq->free_count++;
1175 spin_unlock_irqrestore(&rxq->lock, flags);
1176 }
1177 }
1178
1179 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1180 {
1181 unsigned long flags;
1182 int i;
1183 spin_lock_irqsave(&rxq->lock, flags);
1184 INIT_LIST_HEAD(&rxq->rx_free);
1185 INIT_LIST_HEAD(&rxq->rx_used);
1186 /* Fill the rx_used queue with _all_ of the Rx buffers */
1187 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1188 /* In the reset function, these buffers may have been allocated
1189 * to an SKB, so we need to unmap and free potential storage */
1190 if (rxq->pool[i].skb != NULL) {
1191 pci_unmap_single(priv->pci_dev,
1192 rxq->pool[i].real_dma_addr,
1193 priv->hw_params.rx_buf_size,
1194 PCI_DMA_FROMDEVICE);
1195 priv->alloc_rxb_skb--;
1196 dev_kfree_skb(rxq->pool[i].skb);
1197 rxq->pool[i].skb = NULL;
1198 }
1199 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1200 }
1201
1202 /* Set us so that we have processed and used all buffers, but have
1203 * not restocked the Rx queue with fresh buffers */
1204 rxq->read = rxq->write = 0;
1205 rxq->free_count = 0;
1206 rxq->write_actual = 0;
1207 spin_unlock_irqrestore(&rxq->lock, flags);
1208 }
1209
1210 void iwl3945_rx_replenish(void *data)
1211 {
1212 struct iwl_priv *priv = data;
1213 unsigned long flags;
1214
1215 iwl3945_rx_allocate(priv, GFP_KERNEL);
1216
1217 spin_lock_irqsave(&priv->lock, flags);
1218 iwl3945_rx_queue_restock(priv);
1219 spin_unlock_irqrestore(&priv->lock, flags);
1220 }
1221
1222 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1223 {
1224 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1225
1226 iwl3945_rx_queue_restock(priv);
1227 }
1228
1229
1230 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1231 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1232 * This free routine walks the list of POOL entries and if SKB is set to
1233 * non NULL it is unmapped and freed
1234 */
1235 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1236 {
1237 int i;
1238 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1239 if (rxq->pool[i].skb != NULL) {
1240 pci_unmap_single(priv->pci_dev,
1241 rxq->pool[i].real_dma_addr,
1242 priv->hw_params.rx_buf_size,
1243 PCI_DMA_FROMDEVICE);
1244 dev_kfree_skb(rxq->pool[i].skb);
1245 }
1246 }
1247
1248 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1249 rxq->dma_addr);
1250 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
1251 rxq->rb_stts, rxq->rb_stts_dma);
1252 rxq->bd = NULL;
1253 rxq->rb_stts = NULL;
1254 }
1255
1256
1257 /* Convert linear signal-to-noise ratio into dB */
1258 static u8 ratio2dB[100] = {
1259 /* 0 1 2 3 4 5 6 7 8 9 */
1260 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1261 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1262 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1263 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1264 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1265 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1266 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1267 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1268 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1269 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1270 };
1271
1272 /* Calculates a relative dB value from a ratio of linear
1273 * (i.e. not dB) signal levels.
1274 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1275 int iwl3945_calc_db_from_ratio(int sig_ratio)
1276 {
1277 /* 1000:1 or higher just report as 60 dB */
1278 if (sig_ratio >= 1000)
1279 return 60;
1280
1281 /* 100:1 or higher, divide by 10 and use table,
1282 * add 20 dB to make up for divide by 10 */
1283 if (sig_ratio >= 100)
1284 return 20 + (int)ratio2dB[sig_ratio/10];
1285
1286 /* We shouldn't see this */
1287 if (sig_ratio < 1)
1288 return 0;
1289
1290 /* Use table for ratios 1:1 - 99:1 */
1291 return (int)ratio2dB[sig_ratio];
1292 }
1293
1294 #define PERFECT_RSSI (-20) /* dBm */
1295 #define WORST_RSSI (-95) /* dBm */
1296 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1297
1298 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
1299 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1300 * about formulas used below. */
1301 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
1302 {
1303 int sig_qual;
1304 int degradation = PERFECT_RSSI - rssi_dbm;
1305
1306 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1307 * as indicator; formula is (signal dbm - noise dbm).
1308 * SNR at or above 40 is a great signal (100%).
1309 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1310 * Weakest usable signal is usually 10 - 15 dB SNR. */
1311 if (noise_dbm) {
1312 if (rssi_dbm - noise_dbm >= 40)
1313 return 100;
1314 else if (rssi_dbm < noise_dbm)
1315 return 0;
1316 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1317
1318 /* Else use just the signal level.
1319 * This formula is a least squares fit of data points collected and
1320 * compared with a reference system that had a percentage (%) display
1321 * for signal quality. */
1322 } else
1323 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1324 (15 * RSSI_RANGE + 62 * degradation)) /
1325 (RSSI_RANGE * RSSI_RANGE);
1326
1327 if (sig_qual > 100)
1328 sig_qual = 100;
1329 else if (sig_qual < 1)
1330 sig_qual = 0;
1331
1332 return sig_qual;
1333 }
1334
1335 /**
1336 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1337 *
1338 * Uses the priv->rx_handlers callback function array to invoke
1339 * the appropriate handlers, including command responses,
1340 * frame-received notifications, and other notifications.
1341 */
1342 static void iwl3945_rx_handle(struct iwl_priv *priv)
1343 {
1344 struct iwl_rx_mem_buffer *rxb;
1345 struct iwl_rx_packet *pkt;
1346 struct iwl_rx_queue *rxq = &priv->rxq;
1347 u32 r, i;
1348 int reclaim;
1349 unsigned long flags;
1350 u8 fill_rx = 0;
1351 u32 count = 8;
1352 int total_empty = 0;
1353
1354 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1355 * buffer that the driver may process (last buffer filled by ucode). */
1356 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1357 i = rxq->read;
1358
1359 /* calculate total frames need to be restock after handling RX */
1360 total_empty = r - priv->rxq.write_actual;
1361 if (total_empty < 0)
1362 total_empty += RX_QUEUE_SIZE;
1363
1364 if (total_empty > (RX_QUEUE_SIZE / 2))
1365 fill_rx = 1;
1366 /* Rx interrupt, but nothing sent from uCode */
1367 if (i == r)
1368 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
1369
1370 while (i != r) {
1371 rxb = rxq->queue[i];
1372
1373 /* If an RXB doesn't have a Rx queue slot associated with it,
1374 * then a bug has been introduced in the queue refilling
1375 * routines -- catch it here */
1376 BUG_ON(rxb == NULL);
1377
1378 rxq->queue[i] = NULL;
1379
1380 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1381 priv->hw_params.rx_buf_size,
1382 PCI_DMA_FROMDEVICE);
1383 pkt = (struct iwl_rx_packet *)rxb->skb->data;
1384
1385 /* Reclaim a command buffer only if this packet is a response
1386 * to a (driver-originated) command.
1387 * If the packet (e.g. Rx frame) originated from uCode,
1388 * there is no command buffer to reclaim.
1389 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1390 * but apparently a few don't get set; catch them here. */
1391 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1392 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1393 (pkt->hdr.cmd != REPLY_TX);
1394
1395 /* Based on type of command response or notification,
1396 * handle those that need handling via function in
1397 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1398 if (priv->rx_handlers[pkt->hdr.cmd]) {
1399 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
1400 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1401 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1402 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1403 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1404 } else {
1405 /* No handling needed */
1406 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
1407 "r %d i %d No handler needed for %s, 0x%02x\n",
1408 r, i, get_cmd_string(pkt->hdr.cmd),
1409 pkt->hdr.cmd);
1410 }
1411
1412 if (reclaim) {
1413 /* Invoke any callbacks, transfer the skb to caller, and
1414 * fire off the (possibly) blocking iwl_send_cmd()
1415 * as we reclaim the driver command queue */
1416 if (rxb && rxb->skb)
1417 iwl_tx_cmd_complete(priv, rxb);
1418 else
1419 IWL_WARN(priv, "Claim null rxb?\n");
1420 }
1421
1422 /* For now we just don't re-use anything. We can tweak this
1423 * later to try and re-use notification packets and SKBs that
1424 * fail to Rx correctly */
1425 if (rxb->skb != NULL) {
1426 priv->alloc_rxb_skb--;
1427 dev_kfree_skb_any(rxb->skb);
1428 rxb->skb = NULL;
1429 }
1430
1431 spin_lock_irqsave(&rxq->lock, flags);
1432 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1433 spin_unlock_irqrestore(&rxq->lock, flags);
1434 i = (i + 1) & RX_QUEUE_MASK;
1435 /* If there are a lot of unused frames,
1436 * restock the Rx queue so ucode won't assert. */
1437 if (fill_rx) {
1438 count++;
1439 if (count >= 8) {
1440 priv->rxq.read = i;
1441 iwl3945_rx_replenish_now(priv);
1442 count = 0;
1443 }
1444 }
1445 }
1446
1447 /* Backtrack one entry */
1448 priv->rxq.read = i;
1449 if (fill_rx)
1450 iwl3945_rx_replenish_now(priv);
1451 else
1452 iwl3945_rx_queue_restock(priv);
1453 }
1454
1455 /* call this function to flush any scheduled tasklet */
1456 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1457 {
1458 /* wait to make sure we flush pending tasklet*/
1459 synchronize_irq(priv->pci_dev->irq);
1460 tasklet_kill(&priv->irq_tasklet);
1461 }
1462
1463 static const char *desc_lookup(int i)
1464 {
1465 switch (i) {
1466 case 1:
1467 return "FAIL";
1468 case 2:
1469 return "BAD_PARAM";
1470 case 3:
1471 return "BAD_CHECKSUM";
1472 case 4:
1473 return "NMI_INTERRUPT";
1474 case 5:
1475 return "SYSASSERT";
1476 case 6:
1477 return "FATAL_ERROR";
1478 }
1479
1480 return "UNKNOWN";
1481 }
1482
1483 #define ERROR_START_OFFSET (1 * sizeof(u32))
1484 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1485
1486 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1487 {
1488 u32 i;
1489 u32 desc, time, count, base, data1;
1490 u32 blink1, blink2, ilink1, ilink2;
1491
1492 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1493
1494 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1495 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1496 return;
1497 }
1498
1499
1500 count = iwl_read_targ_mem(priv, base);
1501
1502 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1503 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1504 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1505 priv->status, count);
1506 }
1507
1508 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1509 "ilink1 nmiPC Line\n");
1510 for (i = ERROR_START_OFFSET;
1511 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1512 i += ERROR_ELEM_SIZE) {
1513 desc = iwl_read_targ_mem(priv, base + i);
1514 time =
1515 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1516 blink1 =
1517 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1518 blink2 =
1519 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1520 ilink1 =
1521 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1522 ilink2 =
1523 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1524 data1 =
1525 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1526
1527 IWL_ERR(priv,
1528 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1529 desc_lookup(desc), desc, time, blink1, blink2,
1530 ilink1, ilink2, data1);
1531 }
1532
1533 }
1534
1535 #define EVENT_START_OFFSET (6 * sizeof(u32))
1536
1537 /**
1538 * iwl3945_print_event_log - Dump error event log to syslog
1539 *
1540 */
1541 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1542 u32 num_events, u32 mode)
1543 {
1544 u32 i;
1545 u32 base; /* SRAM byte address of event log header */
1546 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1547 u32 ptr; /* SRAM byte address of log data */
1548 u32 ev, time, data; /* event log data */
1549
1550 if (num_events == 0)
1551 return;
1552
1553 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1554
1555 if (mode == 0)
1556 event_size = 2 * sizeof(u32);
1557 else
1558 event_size = 3 * sizeof(u32);
1559
1560 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1561
1562 /* "time" is actually "data" for mode 0 (no timestamp).
1563 * place event id # at far right for easier visual parsing. */
1564 for (i = 0; i < num_events; i++) {
1565 ev = iwl_read_targ_mem(priv, ptr);
1566 ptr += sizeof(u32);
1567 time = iwl_read_targ_mem(priv, ptr);
1568 ptr += sizeof(u32);
1569 if (mode == 0) {
1570 /* data, ev */
1571 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1572 } else {
1573 data = iwl_read_targ_mem(priv, ptr);
1574 ptr += sizeof(u32);
1575 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
1576 }
1577 }
1578 }
1579
1580 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1581 {
1582 u32 base; /* SRAM byte address of event log header */
1583 u32 capacity; /* event log capacity in # entries */
1584 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1585 u32 num_wraps; /* # times uCode wrapped to top of log */
1586 u32 next_entry; /* index of next entry to be written by uCode */
1587 u32 size; /* # entries that we'll print */
1588
1589 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1590 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1591 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1592 return;
1593 }
1594
1595 /* event log header */
1596 capacity = iwl_read_targ_mem(priv, base);
1597 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1598 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1599 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1600
1601 size = num_wraps ? capacity : next_entry;
1602
1603 /* bail out if nothing in log */
1604 if (size == 0) {
1605 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1606 return;
1607 }
1608
1609 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1610 size, num_wraps);
1611
1612 /* if uCode has wrapped back to top of log, start at the oldest entry,
1613 * i.e the next one that uCode would fill. */
1614 if (num_wraps)
1615 iwl3945_print_event_log(priv, next_entry,
1616 capacity - next_entry, mode);
1617
1618 /* (then/else) start at top of log */
1619 iwl3945_print_event_log(priv, 0, next_entry, mode);
1620
1621 }
1622
1623 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1624 {
1625 u32 inta, handled = 0;
1626 u32 inta_fh;
1627 unsigned long flags;
1628 #ifdef CONFIG_IWLWIFI_DEBUG
1629 u32 inta_mask;
1630 #endif
1631
1632 spin_lock_irqsave(&priv->lock, flags);
1633
1634 /* Ack/clear/reset pending uCode interrupts.
1635 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1636 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1637 inta = iwl_read32(priv, CSR_INT);
1638 iwl_write32(priv, CSR_INT, inta);
1639
1640 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1641 * Any new interrupts that happen after this, either while we're
1642 * in this tasklet, or later, will show up in next ISR/tasklet. */
1643 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1644 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1645
1646 #ifdef CONFIG_IWLWIFI_DEBUG
1647 if (priv->debug_level & IWL_DL_ISR) {
1648 /* just for debug */
1649 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1650 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1651 inta, inta_mask, inta_fh);
1652 }
1653 #endif
1654
1655 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1656 * atomic, make sure that inta covers all the interrupts that
1657 * we've discovered, even if FH interrupt came in just after
1658 * reading CSR_INT. */
1659 if (inta_fh & CSR39_FH_INT_RX_MASK)
1660 inta |= CSR_INT_BIT_FH_RX;
1661 if (inta_fh & CSR39_FH_INT_TX_MASK)
1662 inta |= CSR_INT_BIT_FH_TX;
1663
1664 /* Now service all interrupt bits discovered above. */
1665 if (inta & CSR_INT_BIT_HW_ERR) {
1666 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
1667
1668 /* Tell the device to stop sending interrupts */
1669 iwl_disable_interrupts(priv);
1670
1671 priv->isr_stats.hw++;
1672 iwl_irq_handle_error(priv);
1673
1674 handled |= CSR_INT_BIT_HW_ERR;
1675
1676 spin_unlock_irqrestore(&priv->lock, flags);
1677
1678 return;
1679 }
1680
1681 #ifdef CONFIG_IWLWIFI_DEBUG
1682 if (priv->debug_level & (IWL_DL_ISR)) {
1683 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1684 if (inta & CSR_INT_BIT_SCD) {
1685 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1686 "the frame/frames.\n");
1687 priv->isr_stats.sch++;
1688 }
1689
1690 /* Alive notification via Rx interrupt will do the real work */
1691 if (inta & CSR_INT_BIT_ALIVE) {
1692 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1693 priv->isr_stats.alive++;
1694 }
1695 }
1696 #endif
1697 /* Safely ignore these bits for debug checks below */
1698 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1699
1700 /* Error detected by uCode */
1701 if (inta & CSR_INT_BIT_SW_ERR) {
1702 IWL_ERR(priv, "Microcode SW error detected. "
1703 "Restarting 0x%X.\n", inta);
1704 priv->isr_stats.sw++;
1705 priv->isr_stats.sw_err = inta;
1706 iwl_irq_handle_error(priv);
1707 handled |= CSR_INT_BIT_SW_ERR;
1708 }
1709
1710 /* uCode wakes up after power-down sleep */
1711 if (inta & CSR_INT_BIT_WAKEUP) {
1712 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1713 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1714 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1715 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1716 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1717 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1718 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1719 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1720
1721 priv->isr_stats.wakeup++;
1722 handled |= CSR_INT_BIT_WAKEUP;
1723 }
1724
1725 /* All uCode command responses, including Tx command responses,
1726 * Rx "responses" (frame-received notification), and other
1727 * notifications from uCode come through here*/
1728 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1729 iwl3945_rx_handle(priv);
1730 priv->isr_stats.rx++;
1731 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1732 }
1733
1734 if (inta & CSR_INT_BIT_FH_TX) {
1735 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1736 priv->isr_stats.tx++;
1737
1738 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1739 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1740 (FH39_SRVC_CHNL), 0x0);
1741 handled |= CSR_INT_BIT_FH_TX;
1742 }
1743
1744 if (inta & ~handled) {
1745 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1746 priv->isr_stats.unhandled++;
1747 }
1748
1749 if (inta & ~priv->inta_mask) {
1750 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1751 inta & ~priv->inta_mask);
1752 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1753 }
1754
1755 /* Re-enable all interrupts */
1756 /* only Re-enable if disabled by irq */
1757 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1758 iwl_enable_interrupts(priv);
1759
1760 #ifdef CONFIG_IWLWIFI_DEBUG
1761 if (priv->debug_level & (IWL_DL_ISR)) {
1762 inta = iwl_read32(priv, CSR_INT);
1763 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1764 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1765 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1766 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1767 }
1768 #endif
1769 spin_unlock_irqrestore(&priv->lock, flags);
1770 }
1771
1772 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1773 enum ieee80211_band band,
1774 u8 is_active, u8 n_probes,
1775 struct iwl3945_scan_channel *scan_ch)
1776 {
1777 struct ieee80211_channel *chan;
1778 const struct ieee80211_supported_band *sband;
1779 const struct iwl_channel_info *ch_info;
1780 u16 passive_dwell = 0;
1781 u16 active_dwell = 0;
1782 int added, i;
1783
1784 sband = iwl_get_hw_mode(priv, band);
1785 if (!sband)
1786 return 0;
1787
1788 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1789 passive_dwell = iwl_get_passive_dwell_time(priv, band);
1790
1791 if (passive_dwell <= active_dwell)
1792 passive_dwell = active_dwell + 1;
1793
1794 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1795 chan = priv->scan_request->channels[i];
1796
1797 if (chan->band != band)
1798 continue;
1799
1800 scan_ch->channel = chan->hw_value;
1801
1802 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1803 if (!is_channel_valid(ch_info)) {
1804 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1805 scan_ch->channel);
1806 continue;
1807 }
1808
1809 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1810 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1811 /* If passive , set up for auto-switch
1812 * and use long active_dwell time.
1813 */
1814 if (!is_active || is_channel_passive(ch_info) ||
1815 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1816 scan_ch->type = 0; /* passive */
1817 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1818 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1819 } else {
1820 scan_ch->type = 1; /* active */
1821 }
1822
1823 /* Set direct probe bits. These may be used both for active
1824 * scan channels (probes gets sent right away),
1825 * or for passive channels (probes get se sent only after
1826 * hearing clear Rx packet).*/
1827 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1828 if (n_probes)
1829 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1830 } else {
1831 /* uCode v1 does not allow setting direct probe bits on
1832 * passive channel. */
1833 if ((scan_ch->type & 1) && n_probes)
1834 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1835 }
1836
1837 /* Set txpower levels to defaults */
1838 scan_ch->tpc.dsp_atten = 110;
1839 /* scan_pwr_info->tpc.dsp_atten; */
1840
1841 /*scan_pwr_info->tpc.tx_gain; */
1842 if (band == IEEE80211_BAND_5GHZ)
1843 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1844 else {
1845 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1846 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1847 * power level:
1848 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1849 */
1850 }
1851
1852 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1853 scan_ch->channel,
1854 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1855 (scan_ch->type & 1) ?
1856 active_dwell : passive_dwell);
1857
1858 scan_ch++;
1859 added++;
1860 }
1861
1862 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
1863 return added;
1864 }
1865
1866 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1867 struct ieee80211_rate *rates)
1868 {
1869 int i;
1870
1871 for (i = 0; i < IWL_RATE_COUNT; i++) {
1872 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1873 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1874 rates[i].hw_value_short = i;
1875 rates[i].flags = 0;
1876 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1877 /*
1878 * If CCK != 1M then set short preamble rate flag.
1879 */
1880 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1881 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1882 }
1883 }
1884 }
1885
1886 /******************************************************************************
1887 *
1888 * uCode download functions
1889 *
1890 ******************************************************************************/
1891
1892 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1893 {
1894 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1895 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1896 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1897 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1898 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1899 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1900 }
1901
1902 /**
1903 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1904 * looking at all data.
1905 */
1906 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1907 {
1908 u32 val;
1909 u32 save_len = len;
1910 int rc = 0;
1911 u32 errcnt;
1912
1913 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1914
1915 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1916 IWL39_RTC_INST_LOWER_BOUND);
1917
1918 errcnt = 0;
1919 for (; len > 0; len -= sizeof(u32), image++) {
1920 /* read data comes through single port, auto-incr addr */
1921 /* NOTE: Use the debugless read so we don't flood kernel log
1922 * if IWL_DL_IO is set */
1923 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1924 if (val != le32_to_cpu(*image)) {
1925 IWL_ERR(priv, "uCode INST section is invalid at "
1926 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1927 save_len - len, val, le32_to_cpu(*image));
1928 rc = -EIO;
1929 errcnt++;
1930 if (errcnt >= 20)
1931 break;
1932 }
1933 }
1934
1935
1936 if (!errcnt)
1937 IWL_DEBUG_INFO(priv,
1938 "ucode image in INSTRUCTION memory is good\n");
1939
1940 return rc;
1941 }
1942
1943
1944 /**
1945 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1946 * using sample data 100 bytes apart. If these sample points are good,
1947 * it's a pretty good bet that everything between them is good, too.
1948 */
1949 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1950 {
1951 u32 val;
1952 int rc = 0;
1953 u32 errcnt = 0;
1954 u32 i;
1955
1956 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1957
1958 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1959 /* read data comes through single port, auto-incr addr */
1960 /* NOTE: Use the debugless read so we don't flood kernel log
1961 * if IWL_DL_IO is set */
1962 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1963 i + IWL39_RTC_INST_LOWER_BOUND);
1964 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1965 if (val != le32_to_cpu(*image)) {
1966 #if 0 /* Enable this if you want to see details */
1967 IWL_ERR(priv, "uCode INST section is invalid at "
1968 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1969 i, val, *image);
1970 #endif
1971 rc = -EIO;
1972 errcnt++;
1973 if (errcnt >= 3)
1974 break;
1975 }
1976 }
1977
1978 return rc;
1979 }
1980
1981
1982 /**
1983 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
1984 * and verify its contents
1985 */
1986 static int iwl3945_verify_ucode(struct iwl_priv *priv)
1987 {
1988 __le32 *image;
1989 u32 len;
1990 int rc = 0;
1991
1992 /* Try bootstrap */
1993 image = (__le32 *)priv->ucode_boot.v_addr;
1994 len = priv->ucode_boot.len;
1995 rc = iwl3945_verify_inst_sparse(priv, image, len);
1996 if (rc == 0) {
1997 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
1998 return 0;
1999 }
2000
2001 /* Try initialize */
2002 image = (__le32 *)priv->ucode_init.v_addr;
2003 len = priv->ucode_init.len;
2004 rc = iwl3945_verify_inst_sparse(priv, image, len);
2005 if (rc == 0) {
2006 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2007 return 0;
2008 }
2009
2010 /* Try runtime/protocol */
2011 image = (__le32 *)priv->ucode_code.v_addr;
2012 len = priv->ucode_code.len;
2013 rc = iwl3945_verify_inst_sparse(priv, image, len);
2014 if (rc == 0) {
2015 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2016 return 0;
2017 }
2018
2019 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2020
2021 /* Since nothing seems to match, show first several data entries in
2022 * instruction SRAM, so maybe visual inspection will give a clue.
2023 * Selection of bootstrap image (vs. other images) is arbitrary. */
2024 image = (__le32 *)priv->ucode_boot.v_addr;
2025 len = priv->ucode_boot.len;
2026 rc = iwl3945_verify_inst_full(priv, image, len);
2027
2028 return rc;
2029 }
2030
2031 static void iwl3945_nic_start(struct iwl_priv *priv)
2032 {
2033 /* Remove all resets to allow NIC to operate */
2034 iwl_write32(priv, CSR_RESET, 0);
2035 }
2036
2037 /**
2038 * iwl3945_read_ucode - Read uCode images from disk file.
2039 *
2040 * Copy into buffers for card to fetch via bus-mastering
2041 */
2042 static int iwl3945_read_ucode(struct iwl_priv *priv)
2043 {
2044 struct iwl_ucode *ucode;
2045 int ret = -EINVAL, index;
2046 const struct firmware *ucode_raw;
2047 /* firmware file name contains uCode/driver compatibility version */
2048 const char *name_pre = priv->cfg->fw_name_pre;
2049 const unsigned int api_max = priv->cfg->ucode_api_max;
2050 const unsigned int api_min = priv->cfg->ucode_api_min;
2051 char buf[25];
2052 u8 *src;
2053 size_t len;
2054 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2055
2056 /* Ask kernel firmware_class module to get the boot firmware off disk.
2057 * request_firmware() is synchronous, file is in memory on return. */
2058 for (index = api_max; index >= api_min; index--) {
2059 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2060 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2061 if (ret < 0) {
2062 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2063 buf, ret);
2064 if (ret == -ENOENT)
2065 continue;
2066 else
2067 goto error;
2068 } else {
2069 if (index < api_max)
2070 IWL_ERR(priv, "Loaded firmware %s, "
2071 "which is deprecated. "
2072 " Please use API v%u instead.\n",
2073 buf, api_max);
2074 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2075 "(%zd bytes) from disk\n",
2076 buf, ucode_raw->size);
2077 break;
2078 }
2079 }
2080
2081 if (ret < 0)
2082 goto error;
2083
2084 /* Make sure that we got at least our header! */
2085 if (ucode_raw->size < sizeof(*ucode)) {
2086 IWL_ERR(priv, "File size way too small!\n");
2087 ret = -EINVAL;
2088 goto err_release;
2089 }
2090
2091 /* Data from ucode file: header followed by uCode images */
2092 ucode = (void *)ucode_raw->data;
2093
2094 priv->ucode_ver = le32_to_cpu(ucode->ver);
2095 api_ver = IWL_UCODE_API(priv->ucode_ver);
2096 inst_size = le32_to_cpu(ucode->inst_size);
2097 data_size = le32_to_cpu(ucode->data_size);
2098 init_size = le32_to_cpu(ucode->init_size);
2099 init_data_size = le32_to_cpu(ucode->init_data_size);
2100 boot_size = le32_to_cpu(ucode->boot_size);
2101
2102 /* api_ver should match the api version forming part of the
2103 * firmware filename ... but we don't check for that and only rely
2104 * on the API version read from firmware header from here on forward */
2105
2106 if (api_ver < api_min || api_ver > api_max) {
2107 IWL_ERR(priv, "Driver unable to support your firmware API. "
2108 "Driver supports v%u, firmware is v%u.\n",
2109 api_max, api_ver);
2110 priv->ucode_ver = 0;
2111 ret = -EINVAL;
2112 goto err_release;
2113 }
2114 if (api_ver != api_max)
2115 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2116 "got %u. New firmware can be obtained "
2117 "from http://www.intellinuxwireless.org.\n",
2118 api_max, api_ver);
2119
2120 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2121 IWL_UCODE_MAJOR(priv->ucode_ver),
2122 IWL_UCODE_MINOR(priv->ucode_ver),
2123 IWL_UCODE_API(priv->ucode_ver),
2124 IWL_UCODE_SERIAL(priv->ucode_ver));
2125
2126 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2127 priv->ucode_ver);
2128 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2129 inst_size);
2130 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2131 data_size);
2132 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2133 init_size);
2134 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2135 init_data_size);
2136 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2137 boot_size);
2138
2139
2140 /* Verify size of file vs. image size info in file's header */
2141 if (ucode_raw->size < sizeof(*ucode) +
2142 inst_size + data_size + init_size +
2143 init_data_size + boot_size) {
2144
2145 IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
2146 ucode_raw->size);
2147 ret = -EINVAL;
2148 goto err_release;
2149 }
2150
2151 /* Verify that uCode images will fit in card's SRAM */
2152 if (inst_size > IWL39_MAX_INST_SIZE) {
2153 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2154 inst_size);
2155 ret = -EINVAL;
2156 goto err_release;
2157 }
2158
2159 if (data_size > IWL39_MAX_DATA_SIZE) {
2160 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2161 data_size);
2162 ret = -EINVAL;
2163 goto err_release;
2164 }
2165 if (init_size > IWL39_MAX_INST_SIZE) {
2166 IWL_DEBUG_INFO(priv,
2167 "uCode init instr len %d too large to fit in\n",
2168 init_size);
2169 ret = -EINVAL;
2170 goto err_release;
2171 }
2172 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2173 IWL_DEBUG_INFO(priv,
2174 "uCode init data len %d too large to fit in\n",
2175 init_data_size);
2176 ret = -EINVAL;
2177 goto err_release;
2178 }
2179 if (boot_size > IWL39_MAX_BSM_SIZE) {
2180 IWL_DEBUG_INFO(priv,
2181 "uCode boot instr len %d too large to fit in\n",
2182 boot_size);
2183 ret = -EINVAL;
2184 goto err_release;
2185 }
2186
2187 /* Allocate ucode buffers for card's bus-master loading ... */
2188
2189 /* Runtime instructions and 2 copies of data:
2190 * 1) unmodified from disk
2191 * 2) backup cache for save/restore during power-downs */
2192 priv->ucode_code.len = inst_size;
2193 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2194
2195 priv->ucode_data.len = data_size;
2196 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2197
2198 priv->ucode_data_backup.len = data_size;
2199 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2200
2201 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2202 !priv->ucode_data_backup.v_addr)
2203 goto err_pci_alloc;
2204
2205 /* Initialization instructions and data */
2206 if (init_size && init_data_size) {
2207 priv->ucode_init.len = init_size;
2208 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2209
2210 priv->ucode_init_data.len = init_data_size;
2211 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2212
2213 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2214 goto err_pci_alloc;
2215 }
2216
2217 /* Bootstrap (instructions only, no data) */
2218 if (boot_size) {
2219 priv->ucode_boot.len = boot_size;
2220 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2221
2222 if (!priv->ucode_boot.v_addr)
2223 goto err_pci_alloc;
2224 }
2225
2226 /* Copy images into buffers for card's bus-master reads ... */
2227
2228 /* Runtime instructions (first block of data in file) */
2229 src = &ucode->data[0];
2230 len = priv->ucode_code.len;
2231 IWL_DEBUG_INFO(priv,
2232 "Copying (but not loading) uCode instr len %zd\n", len);
2233 memcpy(priv->ucode_code.v_addr, src, len);
2234 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2235 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2236
2237 /* Runtime data (2nd block)
2238 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2239 src = &ucode->data[inst_size];
2240 len = priv->ucode_data.len;
2241 IWL_DEBUG_INFO(priv,
2242 "Copying (but not loading) uCode data len %zd\n", len);
2243 memcpy(priv->ucode_data.v_addr, src, len);
2244 memcpy(priv->ucode_data_backup.v_addr, src, len);
2245
2246 /* Initialization instructions (3rd block) */
2247 if (init_size) {
2248 src = &ucode->data[inst_size + data_size];
2249 len = priv->ucode_init.len;
2250 IWL_DEBUG_INFO(priv,
2251 "Copying (but not loading) init instr len %zd\n", len);
2252 memcpy(priv->ucode_init.v_addr, src, len);
2253 }
2254
2255 /* Initialization data (4th block) */
2256 if (init_data_size) {
2257 src = &ucode->data[inst_size + data_size + init_size];
2258 len = priv->ucode_init_data.len;
2259 IWL_DEBUG_INFO(priv,
2260 "Copying (but not loading) init data len %zd\n", len);
2261 memcpy(priv->ucode_init_data.v_addr, src, len);
2262 }
2263
2264 /* Bootstrap instructions (5th block) */
2265 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
2266 len = priv->ucode_boot.len;
2267 IWL_DEBUG_INFO(priv,
2268 "Copying (but not loading) boot instr len %zd\n", len);
2269 memcpy(priv->ucode_boot.v_addr, src, len);
2270
2271 /* We have our copies now, allow OS release its copies */
2272 release_firmware(ucode_raw);
2273 return 0;
2274
2275 err_pci_alloc:
2276 IWL_ERR(priv, "failed to allocate pci memory\n");
2277 ret = -ENOMEM;
2278 iwl3945_dealloc_ucode_pci(priv);
2279
2280 err_release:
2281 release_firmware(ucode_raw);
2282
2283 error:
2284 return ret;
2285 }
2286
2287
2288 /**
2289 * iwl3945_set_ucode_ptrs - Set uCode address location
2290 *
2291 * Tell initialization uCode where to find runtime uCode.
2292 *
2293 * BSM registers initially contain pointers to initialization uCode.
2294 * We need to replace them to load runtime uCode inst and data,
2295 * and to save runtime data when powering down.
2296 */
2297 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2298 {
2299 dma_addr_t pinst;
2300 dma_addr_t pdata;
2301
2302 /* bits 31:0 for 3945 */
2303 pinst = priv->ucode_code.p_addr;
2304 pdata = priv->ucode_data_backup.p_addr;
2305
2306 /* Tell bootstrap uCode where to find image to load */
2307 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2308 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2309 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2310 priv->ucode_data.len);
2311
2312 /* Inst byte count must be last to set up, bit 31 signals uCode
2313 * that all new ptr/size info is in place */
2314 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2315 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2316
2317 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2318
2319 return 0;
2320 }
2321
2322 /**
2323 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2324 *
2325 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2326 *
2327 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2328 */
2329 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2330 {
2331 /* Check alive response for "valid" sign from uCode */
2332 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2333 /* We had an error bringing up the hardware, so take it
2334 * all the way back down so we can try again */
2335 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2336 goto restart;
2337 }
2338
2339 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2340 * This is a paranoid check, because we would not have gotten the
2341 * "initialize" alive if code weren't properly loaded. */
2342 if (iwl3945_verify_ucode(priv)) {
2343 /* Runtime instruction load was bad;
2344 * take it all the way back down so we can try again */
2345 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2346 goto restart;
2347 }
2348
2349 /* Send pointers to protocol/runtime uCode image ... init code will
2350 * load and launch runtime uCode, which will send us another "Alive"
2351 * notification. */
2352 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2353 if (iwl3945_set_ucode_ptrs(priv)) {
2354 /* Runtime instruction load won't happen;
2355 * take it all the way back down so we can try again */
2356 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2357 goto restart;
2358 }
2359 return;
2360
2361 restart:
2362 queue_work(priv->workqueue, &priv->restart);
2363 }
2364
2365 /**
2366 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2367 * from protocol/runtime uCode (initialization uCode's
2368 * Alive gets handled by iwl3945_init_alive_start()).
2369 */
2370 static void iwl3945_alive_start(struct iwl_priv *priv)
2371 {
2372 int thermal_spin = 0;
2373 u32 rfkill;
2374
2375 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2376
2377 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2378 /* We had an error bringing up the hardware, so take it
2379 * all the way back down so we can try again */
2380 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2381 goto restart;
2382 }
2383
2384 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2385 * This is a paranoid check, because we would not have gotten the
2386 * "runtime" alive if code weren't properly loaded. */
2387 if (iwl3945_verify_ucode(priv)) {
2388 /* Runtime instruction load was bad;
2389 * take it all the way back down so we can try again */
2390 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2391 goto restart;
2392 }
2393
2394 iwl_clear_stations_table(priv);
2395
2396 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2397 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2398
2399 if (rfkill & 0x1) {
2400 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2401 /* if RFKILL is not on, then wait for thermal
2402 * sensor in adapter to kick in */
2403 while (iwl3945_hw_get_temperature(priv) == 0) {
2404 thermal_spin++;
2405 udelay(10);
2406 }
2407
2408 if (thermal_spin)
2409 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2410 thermal_spin * 10);
2411 } else
2412 set_bit(STATUS_RF_KILL_HW, &priv->status);
2413
2414 /* After the ALIVE response, we can send commands to 3945 uCode */
2415 set_bit(STATUS_ALIVE, &priv->status);
2416
2417 if (iwl_is_rfkill(priv))
2418 return;
2419
2420 ieee80211_wake_queues(priv->hw);
2421
2422 priv->active_rate = priv->rates_mask;
2423 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2424
2425 iwl_power_update_mode(priv, false);
2426
2427 if (iwl_is_associated(priv)) {
2428 struct iwl3945_rxon_cmd *active_rxon =
2429 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2430
2431 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2432 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2433 } else {
2434 /* Initialize our rx_config data */
2435 iwl_connection_init_rx_config(priv, priv->iw_mode);
2436 }
2437
2438 /* Configure Bluetooth device coexistence support */
2439 iwl_send_bt_config(priv);
2440
2441 /* Configure the adapter for unassociated operation */
2442 iwlcore_commit_rxon(priv);
2443
2444 iwl3945_reg_txpower_periodic(priv);
2445
2446 iwl3945_led_register(priv);
2447
2448 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2449 set_bit(STATUS_READY, &priv->status);
2450 wake_up_interruptible(&priv->wait_command_queue);
2451
2452 /* reassociate for ADHOC mode */
2453 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2454 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2455 priv->vif);
2456 if (beacon)
2457 iwl_mac_beacon_update(priv->hw, beacon);
2458 }
2459
2460 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2461 iwl_set_mode(priv, priv->iw_mode);
2462
2463 return;
2464
2465 restart:
2466 queue_work(priv->workqueue, &priv->restart);
2467 }
2468
2469 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2470
2471 static void __iwl3945_down(struct iwl_priv *priv)
2472 {
2473 unsigned long flags;
2474 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2475 struct ieee80211_conf *conf = NULL;
2476
2477 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2478
2479 conf = ieee80211_get_hw_conf(priv->hw);
2480
2481 if (!exit_pending)
2482 set_bit(STATUS_EXIT_PENDING, &priv->status);
2483
2484 iwl3945_led_unregister(priv);
2485 iwl_clear_stations_table(priv);
2486
2487 /* Unblock any waiting calls */
2488 wake_up_interruptible_all(&priv->wait_command_queue);
2489
2490 /* Wipe out the EXIT_PENDING status bit if we are not actually
2491 * exiting the module */
2492 if (!exit_pending)
2493 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2494
2495 /* stop and reset the on-board processor */
2496 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2497
2498 /* tell the device to stop sending interrupts */
2499 spin_lock_irqsave(&priv->lock, flags);
2500 iwl_disable_interrupts(priv);
2501 spin_unlock_irqrestore(&priv->lock, flags);
2502 iwl_synchronize_irq(priv);
2503
2504 if (priv->mac80211_registered)
2505 ieee80211_stop_queues(priv->hw);
2506
2507 /* If we have not previously called iwl3945_init() then
2508 * clear all bits but the RF Kill bits and return */
2509 if (!iwl_is_init(priv)) {
2510 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2511 STATUS_RF_KILL_HW |
2512 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2513 STATUS_GEO_CONFIGURED |
2514 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2515 STATUS_EXIT_PENDING;
2516 goto exit;
2517 }
2518
2519 /* ...otherwise clear out all the status bits but the RF Kill
2520 * bit and continue taking the NIC down. */
2521 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2522 STATUS_RF_KILL_HW |
2523 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2524 STATUS_GEO_CONFIGURED |
2525 test_bit(STATUS_FW_ERROR, &priv->status) <<
2526 STATUS_FW_ERROR |
2527 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2528 STATUS_EXIT_PENDING;
2529
2530 priv->cfg->ops->lib->apm_ops.reset(priv);
2531 spin_lock_irqsave(&priv->lock, flags);
2532 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2533 spin_unlock_irqrestore(&priv->lock, flags);
2534
2535 iwl3945_hw_txq_ctx_stop(priv);
2536 iwl3945_hw_rxq_stop(priv);
2537
2538 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2539 APMG_CLK_VAL_DMA_CLK_RQT);
2540
2541 udelay(5);
2542
2543 if (exit_pending)
2544 priv->cfg->ops->lib->apm_ops.stop(priv);
2545 else
2546 priv->cfg->ops->lib->apm_ops.reset(priv);
2547
2548 exit:
2549 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2550
2551 if (priv->ibss_beacon)
2552 dev_kfree_skb(priv->ibss_beacon);
2553 priv->ibss_beacon = NULL;
2554
2555 /* clear out any free frames */
2556 iwl3945_clear_free_frames(priv);
2557 }
2558
2559 static void iwl3945_down(struct iwl_priv *priv)
2560 {
2561 mutex_lock(&priv->mutex);
2562 __iwl3945_down(priv);
2563 mutex_unlock(&priv->mutex);
2564
2565 iwl3945_cancel_deferred_work(priv);
2566 }
2567
2568 #define MAX_HW_RESTARTS 5
2569
2570 static int __iwl3945_up(struct iwl_priv *priv)
2571 {
2572 int rc, i;
2573
2574 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2575 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2576 return -EIO;
2577 }
2578
2579 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2580 IWL_ERR(priv, "ucode not available for device bring up\n");
2581 return -EIO;
2582 }
2583
2584 /* If platform's RF_KILL switch is NOT set to KILL */
2585 if (iwl_read32(priv, CSR_GP_CNTRL) &
2586 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2587 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2588 else {
2589 set_bit(STATUS_RF_KILL_HW, &priv->status);
2590 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2591 return -ENODEV;
2592 }
2593
2594 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2595
2596 rc = iwl3945_hw_nic_init(priv);
2597 if (rc) {
2598 IWL_ERR(priv, "Unable to int nic\n");
2599 return rc;
2600 }
2601
2602 /* make sure rfkill handshake bits are cleared */
2603 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2604 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2605 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2606
2607 /* clear (again), then enable host interrupts */
2608 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2609 iwl_enable_interrupts(priv);
2610
2611 /* really make sure rfkill handshake bits are cleared */
2612 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2613 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2614
2615 /* Copy original ucode data image from disk into backup cache.
2616 * This will be used to initialize the on-board processor's
2617 * data SRAM for a clean start when the runtime program first loads. */
2618 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2619 priv->ucode_data.len);
2620
2621 /* We return success when we resume from suspend and rf_kill is on. */
2622 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2623 return 0;
2624
2625 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2626
2627 iwl_clear_stations_table(priv);
2628
2629 /* load bootstrap state machine,
2630 * load bootstrap program into processor's memory,
2631 * prepare to load the "initialize" uCode */
2632 priv->cfg->ops->lib->load_ucode(priv);
2633
2634 if (rc) {
2635 IWL_ERR(priv,
2636 "Unable to set up bootstrap uCode: %d\n", rc);
2637 continue;
2638 }
2639
2640 /* start card; "initialize" will load runtime ucode */
2641 iwl3945_nic_start(priv);
2642
2643 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2644
2645 return 0;
2646 }
2647
2648 set_bit(STATUS_EXIT_PENDING, &priv->status);
2649 __iwl3945_down(priv);
2650 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2651
2652 /* tried to restart and config the device for as long as our
2653 * patience could withstand */
2654 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2655 return -EIO;
2656 }
2657
2658
2659 /*****************************************************************************
2660 *
2661 * Workqueue callbacks
2662 *
2663 *****************************************************************************/
2664
2665 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2666 {
2667 struct iwl_priv *priv =
2668 container_of(data, struct iwl_priv, init_alive_start.work);
2669
2670 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2671 return;
2672
2673 mutex_lock(&priv->mutex);
2674 iwl3945_init_alive_start(priv);
2675 mutex_unlock(&priv->mutex);
2676 }
2677
2678 static void iwl3945_bg_alive_start(struct work_struct *data)
2679 {
2680 struct iwl_priv *priv =
2681 container_of(data, struct iwl_priv, alive_start.work);
2682
2683 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2684 return;
2685
2686 mutex_lock(&priv->mutex);
2687 iwl3945_alive_start(priv);
2688 mutex_unlock(&priv->mutex);
2689 }
2690
2691 static void iwl3945_rfkill_poll(struct work_struct *data)
2692 {
2693 struct iwl_priv *priv =
2694 container_of(data, struct iwl_priv, rfkill_poll.work);
2695
2696 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2697 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2698 else
2699 set_bit(STATUS_RF_KILL_HW, &priv->status);
2700
2701 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
2702 test_bit(STATUS_RF_KILL_HW, &priv->status));
2703
2704 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
2705 round_jiffies_relative(2 * HZ));
2706
2707 }
2708
2709 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
2710 static void iwl3945_bg_request_scan(struct work_struct *data)
2711 {
2712 struct iwl_priv *priv =
2713 container_of(data, struct iwl_priv, request_scan);
2714 struct iwl_host_cmd cmd = {
2715 .id = REPLY_SCAN_CMD,
2716 .len = sizeof(struct iwl3945_scan_cmd),
2717 .meta.flags = CMD_SIZE_HUGE,
2718 };
2719 int rc = 0;
2720 struct iwl3945_scan_cmd *scan;
2721 struct ieee80211_conf *conf = NULL;
2722 u8 n_probes = 0;
2723 enum ieee80211_band band;
2724 bool is_active = false;
2725
2726 conf = ieee80211_get_hw_conf(priv->hw);
2727
2728 mutex_lock(&priv->mutex);
2729
2730 cancel_delayed_work(&priv->scan_check);
2731
2732 if (!iwl_is_ready(priv)) {
2733 IWL_WARN(priv, "request scan called when driver not ready.\n");
2734 goto done;
2735 }
2736
2737 /* Make sure the scan wasn't canceled before this queued work
2738 * was given the chance to run... */
2739 if (!test_bit(STATUS_SCANNING, &priv->status))
2740 goto done;
2741
2742 /* This should never be called or scheduled if there is currently
2743 * a scan active in the hardware. */
2744 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2745 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2746 "Ignoring second request.\n");
2747 rc = -EIO;
2748 goto done;
2749 }
2750
2751 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2752 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2753 goto done;
2754 }
2755
2756 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2757 IWL_DEBUG_HC(priv,
2758 "Scan request while abort pending. Queuing.\n");
2759 goto done;
2760 }
2761
2762 if (iwl_is_rfkill(priv)) {
2763 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2764 goto done;
2765 }
2766
2767 if (!test_bit(STATUS_READY, &priv->status)) {
2768 IWL_DEBUG_HC(priv,
2769 "Scan request while uninitialized. Queuing.\n");
2770 goto done;
2771 }
2772
2773 if (!priv->scan_bands) {
2774 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
2775 goto done;
2776 }
2777
2778 if (!priv->scan) {
2779 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2780 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2781 if (!priv->scan) {
2782 rc = -ENOMEM;
2783 goto done;
2784 }
2785 }
2786 scan = priv->scan;
2787 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2788
2789 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2790 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2791
2792 if (iwl_is_associated(priv)) {
2793 u16 interval = 0;
2794 u32 extra;
2795 u32 suspend_time = 100;
2796 u32 scan_suspend_time = 100;
2797 unsigned long flags;
2798
2799 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2800
2801 spin_lock_irqsave(&priv->lock, flags);
2802 interval = priv->beacon_int;
2803 spin_unlock_irqrestore(&priv->lock, flags);
2804
2805 scan->suspend_time = 0;
2806 scan->max_out_time = cpu_to_le32(200 * 1024);
2807 if (!interval)
2808 interval = suspend_time;
2809 /*
2810 * suspend time format:
2811 * 0-19: beacon interval in usec (time before exec.)
2812 * 20-23: 0
2813 * 24-31: number of beacons (suspend between channels)
2814 */
2815
2816 extra = (suspend_time / interval) << 24;
2817 scan_suspend_time = 0xFF0FFFFF &
2818 (extra | ((suspend_time % interval) * 1024));
2819
2820 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2821 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2822 scan_suspend_time, interval);
2823 }
2824
2825 if (priv->scan_request->n_ssids) {
2826 int i, p = 0;
2827 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2828 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2829 /* always does wildcard anyway */
2830 if (!priv->scan_request->ssids[i].ssid_len)
2831 continue;
2832 scan->direct_scan[p].id = WLAN_EID_SSID;
2833 scan->direct_scan[p].len =
2834 priv->scan_request->ssids[i].ssid_len;
2835 memcpy(scan->direct_scan[p].ssid,
2836 priv->scan_request->ssids[i].ssid,
2837 priv->scan_request->ssids[i].ssid_len);
2838 n_probes++;
2839 p++;
2840 }
2841 is_active = true;
2842 } else
2843 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2844
2845 /* We don't build a direct scan probe request; the uCode will do
2846 * that based on the direct_mask added to each channel entry */
2847 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2848 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
2849 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2850
2851 /* flags + rate selection */
2852
2853 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
2854 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2855 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2856 scan->good_CRC_th = 0;
2857 band = IEEE80211_BAND_2GHZ;
2858 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
2859 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2860 /*
2861 * If active scaning is requested but a certain channel
2862 * is marked passive, we can do active scanning if we
2863 * detect transmissions.
2864 */
2865 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
2866 band = IEEE80211_BAND_5GHZ;
2867 } else {
2868 IWL_WARN(priv, "Invalid scan band count\n");
2869 goto done;
2870 }
2871
2872 scan->tx_cmd.len = cpu_to_le16(
2873 iwl_fill_probe_req(priv,
2874 (struct ieee80211_mgmt *)scan->data,
2875 priv->scan_request->ie,
2876 priv->scan_request->ie_len,
2877 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2878
2879 /* select Rx antennas */
2880 scan->flags |= iwl3945_get_antenna_flags(priv);
2881
2882 if (iwl_is_monitor_mode(priv))
2883 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
2884
2885 scan->channel_count =
2886 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2887 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
2888
2889 if (scan->channel_count == 0) {
2890 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2891 goto done;
2892 }
2893
2894 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2895 scan->channel_count * sizeof(struct iwl3945_scan_channel);
2896 cmd.data = scan;
2897 scan->len = cpu_to_le16(cmd.len);
2898
2899 set_bit(STATUS_SCAN_HW, &priv->status);
2900 rc = iwl_send_cmd_sync(priv, &cmd);
2901 if (rc)
2902 goto done;
2903
2904 queue_delayed_work(priv->workqueue, &priv->scan_check,
2905 IWL_SCAN_CHECK_WATCHDOG);
2906
2907 mutex_unlock(&priv->mutex);
2908 return;
2909
2910 done:
2911 /* can not perform scan make sure we clear scanning
2912 * bits from status so next scan request can be performed.
2913 * if we dont clear scanning status bit here all next scan
2914 * will fail
2915 */
2916 clear_bit(STATUS_SCAN_HW, &priv->status);
2917 clear_bit(STATUS_SCANNING, &priv->status);
2918
2919 /* inform mac80211 scan aborted */
2920 queue_work(priv->workqueue, &priv->scan_completed);
2921 mutex_unlock(&priv->mutex);
2922 }
2923
2924 static void iwl3945_bg_up(struct work_struct *data)
2925 {
2926 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2927
2928 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2929 return;
2930
2931 mutex_lock(&priv->mutex);
2932 __iwl3945_up(priv);
2933 mutex_unlock(&priv->mutex);
2934 }
2935
2936 static void iwl3945_bg_restart(struct work_struct *data)
2937 {
2938 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2939
2940 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2941 return;
2942
2943 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2944 mutex_lock(&priv->mutex);
2945 priv->vif = NULL;
2946 priv->is_open = 0;
2947 mutex_unlock(&priv->mutex);
2948 iwl3945_down(priv);
2949 ieee80211_restart_hw(priv->hw);
2950 } else {
2951 iwl3945_down(priv);
2952 queue_work(priv->workqueue, &priv->up);
2953 }
2954 }
2955
2956 static void iwl3945_bg_rx_replenish(struct work_struct *data)
2957 {
2958 struct iwl_priv *priv =
2959 container_of(data, struct iwl_priv, rx_replenish);
2960
2961 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2962 return;
2963
2964 mutex_lock(&priv->mutex);
2965 iwl3945_rx_replenish(priv);
2966 mutex_unlock(&priv->mutex);
2967 }
2968
2969 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2970
2971 void iwl3945_post_associate(struct iwl_priv *priv)
2972 {
2973 int rc = 0;
2974 struct ieee80211_conf *conf = NULL;
2975
2976 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2977 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2978 return;
2979 }
2980
2981
2982 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2983 priv->assoc_id, priv->active_rxon.bssid_addr);
2984
2985 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2986 return;
2987
2988 if (!priv->vif || !priv->is_open)
2989 return;
2990
2991 iwl_scan_cancel_timeout(priv, 200);
2992
2993 conf = ieee80211_get_hw_conf(priv->hw);
2994
2995 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2996 iwlcore_commit_rxon(priv);
2997
2998 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
2999 iwl_setup_rxon_timing(priv);
3000 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3001 sizeof(priv->rxon_timing), &priv->rxon_timing);
3002 if (rc)
3003 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3004 "Attempting to continue.\n");
3005
3006 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3007
3008 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3009
3010 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3011 priv->assoc_id, priv->beacon_int);
3012
3013 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3014 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3015 else
3016 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3017
3018 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3019 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
3020 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3021 else
3022 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3023
3024 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3025 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3026
3027 }
3028
3029 iwlcore_commit_rxon(priv);
3030
3031 switch (priv->iw_mode) {
3032 case NL80211_IFTYPE_STATION:
3033 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3034 break;
3035
3036 case NL80211_IFTYPE_ADHOC:
3037
3038 priv->assoc_id = 1;
3039 iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
3040 iwl3945_sync_sta(priv, IWL_STA_ID,
3041 (priv->band == IEEE80211_BAND_5GHZ) ?
3042 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3043 CMD_ASYNC);
3044 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3045 iwl3945_send_beacon_cmd(priv);
3046
3047 break;
3048
3049 default:
3050 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3051 __func__, priv->iw_mode);
3052 break;
3053 }
3054
3055 iwl_activate_qos(priv, 0);
3056
3057 /* we have just associated, don't start scan too early */
3058 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
3059 }
3060
3061 /*****************************************************************************
3062 *
3063 * mac80211 entry point functions
3064 *
3065 *****************************************************************************/
3066
3067 #define UCODE_READY_TIMEOUT (2 * HZ)
3068
3069 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3070 {
3071 struct iwl_priv *priv = hw->priv;
3072 int ret;
3073
3074 IWL_DEBUG_MAC80211(priv, "enter\n");
3075
3076 /* we should be verifying the device is ready to be opened */
3077 mutex_lock(&priv->mutex);
3078
3079 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3080 * ucode filename and max sizes are card-specific. */
3081
3082 if (!priv->ucode_code.len) {
3083 ret = iwl3945_read_ucode(priv);
3084 if (ret) {
3085 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3086 mutex_unlock(&priv->mutex);
3087 goto out_release_irq;
3088 }
3089 }
3090
3091 ret = __iwl3945_up(priv);
3092
3093 mutex_unlock(&priv->mutex);
3094
3095 if (ret)
3096 goto out_release_irq;
3097
3098 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3099
3100 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3101 * mac80211 will not be run successfully. */
3102 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3103 test_bit(STATUS_READY, &priv->status),
3104 UCODE_READY_TIMEOUT);
3105 if (!ret) {
3106 if (!test_bit(STATUS_READY, &priv->status)) {
3107 IWL_ERR(priv,
3108 "Wait for START_ALIVE timeout after %dms.\n",
3109 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3110 ret = -ETIMEDOUT;
3111 goto out_release_irq;
3112 }
3113 }
3114
3115 /* ucode is running and will send rfkill notifications,
3116 * no need to poll the killswitch state anymore */
3117 cancel_delayed_work(&priv->rfkill_poll);
3118
3119 priv->is_open = 1;
3120 IWL_DEBUG_MAC80211(priv, "leave\n");
3121 return 0;
3122
3123 out_release_irq:
3124 priv->is_open = 0;
3125 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3126 return ret;
3127 }
3128
3129 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3130 {
3131 struct iwl_priv *priv = hw->priv;
3132
3133 IWL_DEBUG_MAC80211(priv, "enter\n");
3134
3135 if (!priv->is_open) {
3136 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3137 return;
3138 }
3139
3140 priv->is_open = 0;
3141
3142 if (iwl_is_ready_rf(priv)) {
3143 /* stop mac, cancel any scan request and clear
3144 * RXON_FILTER_ASSOC_MSK BIT
3145 */
3146 mutex_lock(&priv->mutex);
3147 iwl_scan_cancel_timeout(priv, 100);
3148 mutex_unlock(&priv->mutex);
3149 }
3150
3151 iwl3945_down(priv);
3152
3153 flush_workqueue(priv->workqueue);
3154
3155 /* start polling the killswitch state again */
3156 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3157 round_jiffies_relative(2 * HZ));
3158
3159 IWL_DEBUG_MAC80211(priv, "leave\n");
3160 }
3161
3162 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3163 {
3164 struct iwl_priv *priv = hw->priv;
3165
3166 IWL_DEBUG_MAC80211(priv, "enter\n");
3167
3168 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3169 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3170
3171 if (iwl3945_tx_skb(priv, skb))
3172 dev_kfree_skb_any(skb);
3173
3174 IWL_DEBUG_MAC80211(priv, "leave\n");
3175 return NETDEV_TX_OK;
3176 }
3177
3178 void iwl3945_config_ap(struct iwl_priv *priv)
3179 {
3180 int rc = 0;
3181
3182 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3183 return;
3184
3185 /* The following should be done only at AP bring up */
3186 if (!(iwl_is_associated(priv))) {
3187
3188 /* RXON - unassoc (to set timing command) */
3189 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3190 iwlcore_commit_rxon(priv);
3191
3192 /* RXON Timing */
3193 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3194 iwl_setup_rxon_timing(priv);
3195 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3196 sizeof(priv->rxon_timing),
3197 &priv->rxon_timing);
3198 if (rc)
3199 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3200 "Attempting to continue.\n");
3201
3202 /* FIXME: what should be the assoc_id for AP? */
3203 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3204 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3205 priv->staging_rxon.flags |=
3206 RXON_FLG_SHORT_PREAMBLE_MSK;
3207 else
3208 priv->staging_rxon.flags &=
3209 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3210
3211 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3212 if (priv->assoc_capability &
3213 WLAN_CAPABILITY_SHORT_SLOT_TIME)
3214 priv->staging_rxon.flags |=
3215 RXON_FLG_SHORT_SLOT_MSK;
3216 else
3217 priv->staging_rxon.flags &=
3218 ~RXON_FLG_SHORT_SLOT_MSK;
3219
3220 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3221 priv->staging_rxon.flags &=
3222 ~RXON_FLG_SHORT_SLOT_MSK;
3223 }
3224 /* restore RXON assoc */
3225 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3226 iwlcore_commit_rxon(priv);
3227 iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
3228 }
3229 iwl3945_send_beacon_cmd(priv);
3230
3231 /* FIXME - we need to add code here to detect a totally new
3232 * configuration, reset the AP, unassoc, rxon timing, assoc,
3233 * clear sta table, add BCAST sta... */
3234 }
3235
3236 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3237 struct ieee80211_vif *vif,
3238 struct ieee80211_sta *sta,
3239 struct ieee80211_key_conf *key)
3240 {
3241 struct iwl_priv *priv = hw->priv;
3242 const u8 *addr;
3243 int ret = 0;
3244 u8 sta_id = IWL_INVALID_STATION;
3245 u8 static_key;
3246
3247 IWL_DEBUG_MAC80211(priv, "enter\n");
3248
3249 if (iwl3945_mod_params.sw_crypto) {
3250 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3251 return -EOPNOTSUPP;
3252 }
3253
3254 addr = sta ? sta->addr : iwl_bcast_addr;
3255 static_key = !iwl_is_associated(priv);
3256
3257 if (!static_key) {
3258 sta_id = iwl_find_station(priv, addr);
3259 if (sta_id == IWL_INVALID_STATION) {
3260 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
3261 addr);
3262 return -EINVAL;
3263 }
3264 }
3265
3266 mutex_lock(&priv->mutex);
3267 iwl_scan_cancel_timeout(priv, 100);
3268 mutex_unlock(&priv->mutex);
3269
3270 switch (cmd) {
3271 case SET_KEY:
3272 if (static_key)
3273 ret = iwl3945_set_static_key(priv, key);
3274 else
3275 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3276 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3277 break;
3278 case DISABLE_KEY:
3279 if (static_key)
3280 ret = iwl3945_remove_static_key(priv);
3281 else
3282 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3283 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3284 break;
3285 default:
3286 ret = -EINVAL;
3287 }
3288
3289 IWL_DEBUG_MAC80211(priv, "leave\n");
3290
3291 return ret;
3292 }
3293
3294 /*****************************************************************************
3295 *
3296 * sysfs attributes
3297 *
3298 *****************************************************************************/
3299
3300 #ifdef CONFIG_IWLWIFI_DEBUG
3301
3302 /*
3303 * The following adds a new attribute to the sysfs representation
3304 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3305 * used for controlling the debug level.
3306 *
3307 * See the level definitions in iwl for details.
3308 */
3309 static ssize_t show_debug_level(struct device *d,
3310 struct device_attribute *attr, char *buf)
3311 {
3312 struct iwl_priv *priv = dev_get_drvdata(d);
3313
3314 return sprintf(buf, "0x%08X\n", priv->debug_level);
3315 }
3316 static ssize_t store_debug_level(struct device *d,
3317 struct device_attribute *attr,
3318 const char *buf, size_t count)
3319 {
3320 struct iwl_priv *priv = dev_get_drvdata(d);
3321 unsigned long val;
3322 int ret;
3323
3324 ret = strict_strtoul(buf, 0, &val);
3325 if (ret)
3326 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3327 else
3328 priv->debug_level = val;
3329
3330 return strnlen(buf, count);
3331 }
3332
3333 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3334 show_debug_level, store_debug_level);
3335
3336 #endif /* CONFIG_IWLWIFI_DEBUG */
3337
3338 static ssize_t show_temperature(struct device *d,
3339 struct device_attribute *attr, char *buf)
3340 {
3341 struct iwl_priv *priv = dev_get_drvdata(d);
3342
3343 if (!iwl_is_alive(priv))
3344 return -EAGAIN;
3345
3346 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3347 }
3348
3349 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3350
3351 static ssize_t show_tx_power(struct device *d,
3352 struct device_attribute *attr, char *buf)
3353 {
3354 struct iwl_priv *priv = dev_get_drvdata(d);
3355 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3356 }
3357
3358 static ssize_t store_tx_power(struct device *d,
3359 struct device_attribute *attr,
3360 const char *buf, size_t count)
3361 {
3362 struct iwl_priv *priv = dev_get_drvdata(d);
3363 char *p = (char *)buf;
3364 u32 val;
3365
3366 val = simple_strtoul(p, &p, 10);
3367 if (p == buf)
3368 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3369 else
3370 iwl3945_hw_reg_set_txpower(priv, val);
3371
3372 return count;
3373 }
3374
3375 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3376
3377 static ssize_t show_flags(struct device *d,
3378 struct device_attribute *attr, char *buf)
3379 {
3380 struct iwl_priv *priv = dev_get_drvdata(d);
3381
3382 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3383 }
3384
3385 static ssize_t store_flags(struct device *d,
3386 struct device_attribute *attr,
3387 const char *buf, size_t count)
3388 {
3389 struct iwl_priv *priv = dev_get_drvdata(d);
3390 u32 flags = simple_strtoul(buf, NULL, 0);
3391
3392 mutex_lock(&priv->mutex);
3393 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3394 /* Cancel any currently running scans... */
3395 if (iwl_scan_cancel_timeout(priv, 100))
3396 IWL_WARN(priv, "Could not cancel scan.\n");
3397 else {
3398 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3399 flags);
3400 priv->staging_rxon.flags = cpu_to_le32(flags);
3401 iwlcore_commit_rxon(priv);
3402 }
3403 }
3404 mutex_unlock(&priv->mutex);
3405
3406 return count;
3407 }
3408
3409 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3410
3411 static ssize_t show_filter_flags(struct device *d,
3412 struct device_attribute *attr, char *buf)
3413 {
3414 struct iwl_priv *priv = dev_get_drvdata(d);
3415
3416 return sprintf(buf, "0x%04X\n",
3417 le32_to_cpu(priv->active_rxon.filter_flags));
3418 }
3419
3420 static ssize_t store_filter_flags(struct device *d,
3421 struct device_attribute *attr,
3422 const char *buf, size_t count)
3423 {
3424 struct iwl_priv *priv = dev_get_drvdata(d);
3425 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3426
3427 mutex_lock(&priv->mutex);
3428 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3429 /* Cancel any currently running scans... */
3430 if (iwl_scan_cancel_timeout(priv, 100))
3431 IWL_WARN(priv, "Could not cancel scan.\n");
3432 else {
3433 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3434 "0x%04X\n", filter_flags);
3435 priv->staging_rxon.filter_flags =
3436 cpu_to_le32(filter_flags);
3437 iwlcore_commit_rxon(priv);
3438 }
3439 }
3440 mutex_unlock(&priv->mutex);
3441
3442 return count;
3443 }
3444
3445 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3446 store_filter_flags);
3447
3448 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3449
3450 static ssize_t show_measurement(struct device *d,
3451 struct device_attribute *attr, char *buf)
3452 {
3453 struct iwl_priv *priv = dev_get_drvdata(d);
3454 struct iwl_spectrum_notification measure_report;
3455 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3456 u8 *data = (u8 *)&measure_report;
3457 unsigned long flags;
3458
3459 spin_lock_irqsave(&priv->lock, flags);
3460 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3461 spin_unlock_irqrestore(&priv->lock, flags);
3462 return 0;
3463 }
3464 memcpy(&measure_report, &priv->measure_report, size);
3465 priv->measurement_status = 0;
3466 spin_unlock_irqrestore(&priv->lock, flags);
3467
3468 while (size && (PAGE_SIZE - len)) {
3469 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3470 PAGE_SIZE - len, 1);
3471 len = strlen(buf);
3472 if (PAGE_SIZE - len)
3473 buf[len++] = '\n';
3474
3475 ofs += 16;
3476 size -= min(size, 16U);
3477 }
3478
3479 return len;
3480 }
3481
3482 static ssize_t store_measurement(struct device *d,
3483 struct device_attribute *attr,
3484 const char *buf, size_t count)
3485 {
3486 struct iwl_priv *priv = dev_get_drvdata(d);
3487 struct ieee80211_measurement_params params = {
3488 .channel = le16_to_cpu(priv->active_rxon.channel),
3489 .start_time = cpu_to_le64(priv->last_tsf),
3490 .duration = cpu_to_le16(1),
3491 };
3492 u8 type = IWL_MEASURE_BASIC;
3493 u8 buffer[32];
3494 u8 channel;
3495
3496 if (count) {
3497 char *p = buffer;
3498 strncpy(buffer, buf, min(sizeof(buffer), count));
3499 channel = simple_strtoul(p, NULL, 0);
3500 if (channel)
3501 params.channel = channel;
3502
3503 p = buffer;
3504 while (*p && *p != ' ')
3505 p++;
3506 if (*p)
3507 type = simple_strtoul(p + 1, NULL, 0);
3508 }
3509
3510 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3511 "channel %d (for '%s')\n", type, params.channel, buf);
3512 iwl3945_get_measurement(priv, &params, type);
3513
3514 return count;
3515 }
3516
3517 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3518 show_measurement, store_measurement);
3519 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
3520
3521 static ssize_t store_retry_rate(struct device *d,
3522 struct device_attribute *attr,
3523 const char *buf, size_t count)
3524 {
3525 struct iwl_priv *priv = dev_get_drvdata(d);
3526
3527 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3528 if (priv->retry_rate <= 0)
3529 priv->retry_rate = 1;
3530
3531 return count;
3532 }
3533
3534 static ssize_t show_retry_rate(struct device *d,
3535 struct device_attribute *attr, char *buf)
3536 {
3537 struct iwl_priv *priv = dev_get_drvdata(d);
3538 return sprintf(buf, "%d", priv->retry_rate);
3539 }
3540
3541 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3542 store_retry_rate);
3543
3544
3545 static ssize_t store_power_level(struct device *d,
3546 struct device_attribute *attr,
3547 const char *buf, size_t count)
3548 {
3549 struct iwl_priv *priv = dev_get_drvdata(d);
3550 int ret;
3551 unsigned long mode;
3552
3553
3554 mutex_lock(&priv->mutex);
3555
3556 ret = strict_strtoul(buf, 10, &mode);
3557 if (ret)
3558 goto out;
3559
3560 ret = iwl_power_set_user_mode(priv, mode);
3561 if (ret) {
3562 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
3563 goto out;
3564 }
3565 ret = count;
3566
3567 out:
3568 mutex_unlock(&priv->mutex);
3569 return ret;
3570 }
3571
3572 static ssize_t show_power_level(struct device *d,
3573 struct device_attribute *attr, char *buf)
3574 {
3575 struct iwl_priv *priv = dev_get_drvdata(d);
3576 int mode = priv->power_data.user_power_setting;
3577 int level = priv->power_data.power_mode;
3578 char *p = buf;
3579
3580 p += sprintf(p, "INDEX:%d\t", level);
3581 p += sprintf(p, "USER:%d\n", mode);
3582 return p - buf + 1;
3583 }
3584
3585 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
3586 show_power_level, store_power_level);
3587
3588 #define MAX_WX_STRING 80
3589
3590 /* Values are in microsecond */
3591 static const s32 timeout_duration[] = {
3592 350000,
3593 250000,
3594 75000,
3595 37000,
3596 25000,
3597 };
3598 static const s32 period_duration[] = {
3599 400000,
3600 700000,
3601 1000000,
3602 1000000,
3603 1000000
3604 };
3605
3606 static ssize_t show_channels(struct device *d,
3607 struct device_attribute *attr, char *buf)
3608 {
3609 /* all this shit doesn't belong into sysfs anyway */
3610 return 0;
3611 }
3612
3613 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3614
3615 static ssize_t show_statistics(struct device *d,
3616 struct device_attribute *attr, char *buf)
3617 {
3618 struct iwl_priv *priv = dev_get_drvdata(d);
3619 u32 size = sizeof(struct iwl3945_notif_statistics);
3620 u32 len = 0, ofs = 0;
3621 u8 *data = (u8 *)&priv->statistics_39;
3622 int rc = 0;
3623
3624 if (!iwl_is_alive(priv))
3625 return -EAGAIN;
3626
3627 mutex_lock(&priv->mutex);
3628 rc = iwl_send_statistics_request(priv, 0);
3629 mutex_unlock(&priv->mutex);
3630
3631 if (rc) {
3632 len = sprintf(buf,
3633 "Error sending statistics request: 0x%08X\n", rc);
3634 return len;
3635 }
3636
3637 while (size && (PAGE_SIZE - len)) {
3638 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3639 PAGE_SIZE - len, 1);
3640 len = strlen(buf);
3641 if (PAGE_SIZE - len)
3642 buf[len++] = '\n';
3643
3644 ofs += 16;
3645 size -= min(size, 16U);
3646 }
3647
3648 return len;
3649 }
3650
3651 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3652
3653 static ssize_t show_antenna(struct device *d,
3654 struct device_attribute *attr, char *buf)
3655 {
3656 struct iwl_priv *priv = dev_get_drvdata(d);
3657
3658 if (!iwl_is_alive(priv))
3659 return -EAGAIN;
3660
3661 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3662 }
3663
3664 static ssize_t store_antenna(struct device *d,
3665 struct device_attribute *attr,
3666 const char *buf, size_t count)
3667 {
3668 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3669 int ant;
3670
3671 if (count == 0)
3672 return 0;
3673
3674 if (sscanf(buf, "%1i", &ant) != 1) {
3675 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3676 return count;
3677 }
3678
3679 if ((ant >= 0) && (ant <= 2)) {
3680 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3681 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3682 } else
3683 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3684
3685
3686 return count;
3687 }
3688
3689 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3690
3691 static ssize_t show_status(struct device *d,
3692 struct device_attribute *attr, char *buf)
3693 {
3694 struct iwl_priv *priv = dev_get_drvdata(d);
3695 if (!iwl_is_alive(priv))
3696 return -EAGAIN;
3697 return sprintf(buf, "0x%08x\n", (int)priv->status);
3698 }
3699
3700 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3701
3702 static ssize_t dump_error_log(struct device *d,
3703 struct device_attribute *attr,
3704 const char *buf, size_t count)
3705 {
3706 struct iwl_priv *priv = dev_get_drvdata(d);
3707 char *p = (char *)buf;
3708
3709 if (p[0] == '1')
3710 iwl3945_dump_nic_error_log(priv);
3711
3712 return strnlen(buf, count);
3713 }
3714
3715 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3716
3717 static ssize_t dump_event_log(struct device *d,
3718 struct device_attribute *attr,
3719 const char *buf, size_t count)
3720 {
3721 struct iwl_priv *priv = dev_get_drvdata(d);
3722 char *p = (char *)buf;
3723
3724 if (p[0] == '1')
3725 iwl3945_dump_nic_event_log(priv);
3726
3727 return strnlen(buf, count);
3728 }
3729
3730 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
3731
3732 /*****************************************************************************
3733 *
3734 * driver setup and tear down
3735 *
3736 *****************************************************************************/
3737
3738 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3739 {
3740 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3741
3742 init_waitqueue_head(&priv->wait_command_queue);
3743
3744 INIT_WORK(&priv->up, iwl3945_bg_up);
3745 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3746 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3747 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
3748 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3749 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3750 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
3751 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3752 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
3753 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3754 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
3755
3756 iwl3945_hw_setup_deferred_work(priv);
3757
3758 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3759 iwl3945_irq_tasklet, (unsigned long)priv);
3760 }
3761
3762 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3763 {
3764 iwl3945_hw_cancel_deferred_work(priv);
3765
3766 cancel_delayed_work_sync(&priv->init_alive_start);
3767 cancel_delayed_work(&priv->scan_check);
3768 cancel_delayed_work(&priv->alive_start);
3769 cancel_work_sync(&priv->beacon_update);
3770 }
3771
3772 static struct attribute *iwl3945_sysfs_entries[] = {
3773 &dev_attr_antenna.attr,
3774 &dev_attr_channels.attr,
3775 &dev_attr_dump_errors.attr,
3776 &dev_attr_dump_events.attr,
3777 &dev_attr_flags.attr,
3778 &dev_attr_filter_flags.attr,
3779 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3780 &dev_attr_measurement.attr,
3781 #endif
3782 &dev_attr_power_level.attr,
3783 &dev_attr_retry_rate.attr,
3784 &dev_attr_statistics.attr,
3785 &dev_attr_status.attr,
3786 &dev_attr_temperature.attr,
3787 &dev_attr_tx_power.attr,
3788 #ifdef CONFIG_IWLWIFI_DEBUG
3789 &dev_attr_debug_level.attr,
3790 #endif
3791 NULL
3792 };
3793
3794 static struct attribute_group iwl3945_attribute_group = {
3795 .name = NULL, /* put in device directory */
3796 .attrs = iwl3945_sysfs_entries,
3797 };
3798
3799 static struct ieee80211_ops iwl3945_hw_ops = {
3800 .tx = iwl3945_mac_tx,
3801 .start = iwl3945_mac_start,
3802 .stop = iwl3945_mac_stop,
3803 .add_interface = iwl_mac_add_interface,
3804 .remove_interface = iwl_mac_remove_interface,
3805 .config = iwl_mac_config,
3806 .configure_filter = iwl_configure_filter,
3807 .set_key = iwl3945_mac_set_key,
3808 .get_tx_stats = iwl_mac_get_tx_stats,
3809 .conf_tx = iwl_mac_conf_tx,
3810 .reset_tsf = iwl_mac_reset_tsf,
3811 .bss_info_changed = iwl_bss_info_changed,
3812 .hw_scan = iwl_mac_hw_scan
3813 };
3814
3815 static int iwl3945_init_drv(struct iwl_priv *priv)
3816 {
3817 int ret;
3818 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3819
3820 priv->retry_rate = 1;
3821 priv->ibss_beacon = NULL;
3822
3823 spin_lock_init(&priv->lock);
3824 spin_lock_init(&priv->sta_lock);
3825 spin_lock_init(&priv->hcmd_lock);
3826
3827 INIT_LIST_HEAD(&priv->free_frames);
3828
3829 mutex_init(&priv->mutex);
3830
3831 /* Clear the driver's (not device's) station table */
3832 iwl_clear_stations_table(priv);
3833
3834 priv->data_retry_limit = -1;
3835 priv->ieee_channels = NULL;
3836 priv->ieee_rates = NULL;
3837 priv->band = IEEE80211_BAND_2GHZ;
3838
3839 priv->iw_mode = NL80211_IFTYPE_STATION;
3840
3841 iwl_reset_qos(priv);
3842
3843 priv->qos_data.qos_active = 0;
3844 priv->qos_data.qos_cap.val = 0;
3845
3846 priv->rates_mask = IWL_RATES_MASK;
3847 /* If power management is turned on, default to CAM mode */
3848 priv->power_mode = IWL_POWER_MODE_CAM;
3849 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
3850
3851 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3852 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3853 eeprom->version);
3854 ret = -EINVAL;
3855 goto err;
3856 }
3857 ret = iwl_init_channel_map(priv);
3858 if (ret) {
3859 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3860 goto err;
3861 }
3862
3863 /* Set up txpower settings in driver for all channels */
3864 if (iwl3945_txpower_set_from_eeprom(priv)) {
3865 ret = -EIO;
3866 goto err_free_channel_map;
3867 }
3868
3869 ret = iwlcore_init_geos(priv);
3870 if (ret) {
3871 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3872 goto err_free_channel_map;
3873 }
3874 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3875
3876 return 0;
3877
3878 err_free_channel_map:
3879 iwl_free_channel_map(priv);
3880 err:
3881 return ret;
3882 }
3883
3884 static int iwl3945_setup_mac(struct iwl_priv *priv)
3885 {
3886 int ret;
3887 struct ieee80211_hw *hw = priv->hw;
3888
3889 hw->rate_control_algorithm = "iwl-3945-rs";
3890 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3891
3892 /* Tell mac80211 our characteristics */
3893 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3894 IEEE80211_HW_NOISE_DBM |
3895 IEEE80211_HW_SPECTRUM_MGMT;
3896
3897 hw->wiphy->interface_modes =
3898 BIT(NL80211_IFTYPE_STATION) |
3899 BIT(NL80211_IFTYPE_ADHOC);
3900
3901 hw->wiphy->custom_regulatory = true;
3902
3903 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3904 /* we create the 802.11 header and a zero-length SSID element */
3905 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
3906
3907 /* Default value; 4 EDCA QOS priorities */
3908 hw->queues = 4;
3909
3910 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3911 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3912 &priv->bands[IEEE80211_BAND_2GHZ];
3913
3914 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3915 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3916 &priv->bands[IEEE80211_BAND_5GHZ];
3917
3918 ret = ieee80211_register_hw(priv->hw);
3919 if (ret) {
3920 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3921 return ret;
3922 }
3923 priv->mac80211_registered = 1;
3924
3925 return 0;
3926 }
3927
3928 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3929 {
3930 int err = 0;
3931 struct iwl_priv *priv;
3932 struct ieee80211_hw *hw;
3933 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3934 struct iwl3945_eeprom *eeprom;
3935 unsigned long flags;
3936
3937 /***********************
3938 * 1. Allocating HW data
3939 * ********************/
3940
3941 /* mac80211 allocates memory for this device instance, including
3942 * space for this driver's private structure */
3943 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
3944 if (hw == NULL) {
3945 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
3946 err = -ENOMEM;
3947 goto out;
3948 }
3949 priv = hw->priv;
3950 SET_IEEE80211_DEV(hw, &pdev->dev);
3951
3952 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
3953 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
3954 IWL_ERR(priv,
3955 "invalid queues_num, should be between %d and %d\n",
3956 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
3957 err = -EINVAL;
3958 goto out_ieee80211_free_hw;
3959 }
3960
3961 /*
3962 * Disabling hardware scan means that mac80211 will perform scans
3963 * "the hard way", rather than using device's scan.
3964 */
3965 if (iwl3945_mod_params.disable_hw_scan) {
3966 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
3967 iwl3945_hw_ops.hw_scan = NULL;
3968 }
3969
3970
3971 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3972 priv->cfg = cfg;
3973 priv->pci_dev = pdev;
3974 priv->inta_mask = CSR_INI_SET_MASK;
3975
3976 #ifdef CONFIG_IWLWIFI_DEBUG
3977 priv->debug_level = iwl3945_mod_params.debug;
3978 atomic_set(&priv->restrict_refcnt, 0);
3979 #endif
3980
3981 /***************************
3982 * 2. Initializing PCI bus
3983 * *************************/
3984 if (pci_enable_device(pdev)) {
3985 err = -ENODEV;
3986 goto out_ieee80211_free_hw;
3987 }
3988
3989 pci_set_master(pdev);
3990
3991 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3992 if (!err)
3993 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3994 if (err) {
3995 IWL_WARN(priv, "No suitable DMA available.\n");
3996 goto out_pci_disable_device;
3997 }
3998
3999 pci_set_drvdata(pdev, priv);
4000 err = pci_request_regions(pdev, DRV_NAME);
4001 if (err)
4002 goto out_pci_disable_device;
4003
4004 /***********************
4005 * 3. Read REV Register
4006 * ********************/
4007 priv->hw_base = pci_iomap(pdev, 0, 0);
4008 if (!priv->hw_base) {
4009 err = -ENODEV;
4010 goto out_pci_release_regions;
4011 }
4012
4013 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4014 (unsigned long long) pci_resource_len(pdev, 0));
4015 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4016
4017 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4018 * PCI Tx retries from interfering with C3 CPU state */
4019 pci_write_config_byte(pdev, 0x41, 0x00);
4020
4021 /* this spin lock will be used in apm_ops.init and EEPROM access
4022 * we should init now
4023 */
4024 spin_lock_init(&priv->reg_lock);
4025
4026 /* amp init */
4027 err = priv->cfg->ops->lib->apm_ops.init(priv);
4028 if (err < 0) {
4029 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
4030 goto out_iounmap;
4031 }
4032
4033 /***********************
4034 * 4. Read EEPROM
4035 * ********************/
4036
4037 /* Read the EEPROM */
4038 err = iwl_eeprom_init(priv);
4039 if (err) {
4040 IWL_ERR(priv, "Unable to init EEPROM\n");
4041 goto out_iounmap;
4042 }
4043 /* MAC Address location in EEPROM same for 3945/4965 */
4044 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4045 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
4046 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
4047 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4048
4049 /***********************
4050 * 5. Setup HW Constants
4051 * ********************/
4052 /* Device-specific setup */
4053 if (iwl3945_hw_set_hw_params(priv)) {
4054 IWL_ERR(priv, "failed to set hw settings\n");
4055 goto out_eeprom_free;
4056 }
4057
4058 /***********************
4059 * 6. Setup priv
4060 * ********************/
4061
4062 err = iwl3945_init_drv(priv);
4063 if (err) {
4064 IWL_ERR(priv, "initializing driver failed\n");
4065 goto out_unset_hw_params;
4066 }
4067
4068 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4069 priv->cfg->name);
4070
4071 /***********************
4072 * 7. Setup Services
4073 * ********************/
4074
4075 spin_lock_irqsave(&priv->lock, flags);
4076 iwl_disable_interrupts(priv);
4077 spin_unlock_irqrestore(&priv->lock, flags);
4078
4079 pci_enable_msi(priv->pci_dev);
4080
4081 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4082 IRQF_SHARED, DRV_NAME, priv);
4083 if (err) {
4084 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4085 goto out_disable_msi;
4086 }
4087
4088 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4089 if (err) {
4090 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4091 goto out_release_irq;
4092 }
4093
4094 iwl_set_rxon_channel(priv,
4095 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4096 iwl3945_setup_deferred_work(priv);
4097 iwl3945_setup_rx_handlers(priv);
4098
4099 /*********************************
4100 * 8. Setup and Register mac80211
4101 * *******************************/
4102
4103 iwl_enable_interrupts(priv);
4104
4105 err = iwl3945_setup_mac(priv);
4106 if (err)
4107 goto out_remove_sysfs;
4108
4109 err = iwl_dbgfs_register(priv, DRV_NAME);
4110 if (err)
4111 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4112
4113 /* Start monitoring the killswitch */
4114 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4115 2 * HZ);
4116
4117 return 0;
4118
4119 out_remove_sysfs:
4120 destroy_workqueue(priv->workqueue);
4121 priv->workqueue = NULL;
4122 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4123 out_release_irq:
4124 free_irq(priv->pci_dev->irq, priv);
4125 out_disable_msi:
4126 pci_disable_msi(priv->pci_dev);
4127 iwlcore_free_geos(priv);
4128 iwl_free_channel_map(priv);
4129 out_unset_hw_params:
4130 iwl3945_unset_hw_params(priv);
4131 out_eeprom_free:
4132 iwl_eeprom_free(priv);
4133 out_iounmap:
4134 pci_iounmap(pdev, priv->hw_base);
4135 out_pci_release_regions:
4136 pci_release_regions(pdev);
4137 out_pci_disable_device:
4138 pci_set_drvdata(pdev, NULL);
4139 pci_disable_device(pdev);
4140 out_ieee80211_free_hw:
4141 ieee80211_free_hw(priv->hw);
4142 out:
4143 return err;
4144 }
4145
4146 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4147 {
4148 struct iwl_priv *priv = pci_get_drvdata(pdev);
4149 unsigned long flags;
4150
4151 if (!priv)
4152 return;
4153
4154 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4155
4156 iwl_dbgfs_unregister(priv);
4157
4158 set_bit(STATUS_EXIT_PENDING, &priv->status);
4159
4160 if (priv->mac80211_registered) {
4161 ieee80211_unregister_hw(priv->hw);
4162 priv->mac80211_registered = 0;
4163 } else {
4164 iwl3945_down(priv);
4165 }
4166
4167 /* make sure we flush any pending irq or
4168 * tasklet for the driver
4169 */
4170 spin_lock_irqsave(&priv->lock, flags);
4171 iwl_disable_interrupts(priv);
4172 spin_unlock_irqrestore(&priv->lock, flags);
4173
4174 iwl_synchronize_irq(priv);
4175
4176 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4177
4178 cancel_delayed_work_sync(&priv->rfkill_poll);
4179
4180 iwl3945_dealloc_ucode_pci(priv);
4181
4182 if (priv->rxq.bd)
4183 iwl3945_rx_queue_free(priv, &priv->rxq);
4184 iwl3945_hw_txq_ctx_free(priv);
4185
4186 iwl3945_unset_hw_params(priv);
4187 iwl_clear_stations_table(priv);
4188
4189 /*netif_stop_queue(dev); */
4190 flush_workqueue(priv->workqueue);
4191
4192 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4193 * priv->workqueue... so we can't take down the workqueue
4194 * until now... */
4195 destroy_workqueue(priv->workqueue);
4196 priv->workqueue = NULL;
4197
4198 free_irq(pdev->irq, priv);
4199 pci_disable_msi(pdev);
4200
4201 pci_iounmap(pdev, priv->hw_base);
4202 pci_release_regions(pdev);
4203 pci_disable_device(pdev);
4204 pci_set_drvdata(pdev, NULL);
4205
4206 iwl_free_channel_map(priv);
4207 iwlcore_free_geos(priv);
4208 kfree(priv->scan);
4209 if (priv->ibss_beacon)
4210 dev_kfree_skb(priv->ibss_beacon);
4211
4212 ieee80211_free_hw(priv->hw);
4213 }
4214
4215
4216 /*****************************************************************************
4217 *
4218 * driver and module entry point
4219 *
4220 *****************************************************************************/
4221
4222 static struct pci_driver iwl3945_driver = {
4223 .name = DRV_NAME,
4224 .id_table = iwl3945_hw_card_ids,
4225 .probe = iwl3945_pci_probe,
4226 .remove = __devexit_p(iwl3945_pci_remove),
4227 #ifdef CONFIG_PM
4228 .suspend = iwl_pci_suspend,
4229 .resume = iwl_pci_resume,
4230 #endif
4231 };
4232
4233 static int __init iwl3945_init(void)
4234 {
4235
4236 int ret;
4237 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4238 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4239
4240 ret = iwl3945_rate_control_register();
4241 if (ret) {
4242 printk(KERN_ERR DRV_NAME
4243 "Unable to register rate control algorithm: %d\n", ret);
4244 return ret;
4245 }
4246
4247 ret = pci_register_driver(&iwl3945_driver);
4248 if (ret) {
4249 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4250 goto error_register;
4251 }
4252
4253 return ret;
4254
4255 error_register:
4256 iwl3945_rate_control_unregister();
4257 return ret;
4258 }
4259
4260 static void __exit iwl3945_exit(void)
4261 {
4262 pci_unregister_driver(&iwl3945_driver);
4263 iwl3945_rate_control_unregister();
4264 }
4265
4266 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4267
4268 module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
4269 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4270 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
4271 MODULE_PARM_DESC(swcrypto,
4272 "using software crypto (default 1 [software])\n");
4273 module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
4274 MODULE_PARM_DESC(debug, "debug output mask");
4275 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
4276 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4277
4278 module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
4279 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4280
4281 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
4282 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4283
4284 module_exit(iwl3945_exit);
4285 module_init(iwl3945_init);
Linux kernel - Deliverables
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