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iwlwifi: disable aspm by default
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/ieee80211_radiotap.h>
49 #include <net/mac80211.h>
50
51 #include <asm/div64.h>
52
53 #define DRV_NAME "iwl3945"
54
55 #include "iwl-fh.h"
56 #include "iwl-3945-fh.h"
57 #include "iwl-commands.h"
58 #include "iwl-sta.h"
59 #include "iwl-3945.h"
60 #include "iwl-core.h"
61 #include "iwl-helpers.h"
62 #include "iwl-dev.h"
63 #include "iwl-spectrum.h"
64
65 /*
66 * module name, copyright, version, etc.
67 */
68
69 #define DRV_DESCRIPTION \
70 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
71
72 #ifdef CONFIG_IWLWIFI_DEBUG
73 #define VD "d"
74 #else
75 #define VD
76 #endif
77
78 /*
79 * add "s" to indicate spectrum measurement included.
80 * we add it here to be consistent with previous releases in which
81 * this was configurable.
82 */
83 #define DRV_VERSION IWLWIFI_VERSION VD "s"
84 #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
85 #define DRV_AUTHOR "<ilw@linux.intel.com>"
86
87 MODULE_DESCRIPTION(DRV_DESCRIPTION);
88 MODULE_VERSION(DRV_VERSION);
89 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
90 MODULE_LICENSE("GPL");
91
92 /* module parameters */
93 struct iwl_mod_params iwl3945_mod_params = {
94 .sw_crypto = 1,
95 .restart_fw = 1,
96 /* the rest are 0 by default */
97 };
98
99 /**
100 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
101 * @priv: eeprom and antenna fields are used to determine antenna flags
102 *
103 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
104 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
105 *
106 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
107 * IWL_ANTENNA_MAIN - Force MAIN antenna
108 * IWL_ANTENNA_AUX - Force AUX antenna
109 */
110 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
111 {
112 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
113
114 switch (iwl3945_mod_params.antenna) {
115 case IWL_ANTENNA_DIVERSITY:
116 return 0;
117
118 case IWL_ANTENNA_MAIN:
119 if (eeprom->antenna_switch_type)
120 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
121 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
122
123 case IWL_ANTENNA_AUX:
124 if (eeprom->antenna_switch_type)
125 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
126 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
127 }
128
129 /* bad antenna selector value */
130 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
131 iwl3945_mod_params.antenna);
132
133 return 0; /* "diversity" is default if error */
134 }
135
136 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
137 struct ieee80211_key_conf *keyconf,
138 u8 sta_id)
139 {
140 unsigned long flags;
141 __le16 key_flags = 0;
142 int ret;
143
144 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
145 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
146
147 if (sta_id == priv->hw_params.bcast_sta_id)
148 key_flags |= STA_KEY_MULTICAST_MSK;
149
150 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
151 keyconf->hw_key_idx = keyconf->keyidx;
152 key_flags &= ~STA_KEY_FLG_INVALID;
153
154 spin_lock_irqsave(&priv->sta_lock, flags);
155 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
156 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
157 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
158 keyconf->keylen);
159
160 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
161 keyconf->keylen);
162
163 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
164 == STA_KEY_FLG_NO_ENC)
165 priv->stations[sta_id].sta.key.key_offset =
166 iwl_get_free_ucode_key_index(priv);
167 /* else, we are overriding an existing key => no need to allocated room
168 * in uCode. */
169
170 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
171 "no space for a new key");
172
173 priv->stations[sta_id].sta.key.key_flags = key_flags;
174 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
175 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
176
177 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
178
179 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
180
181 spin_unlock_irqrestore(&priv->sta_lock, flags);
182
183 return ret;
184 }
185
186 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
187 struct ieee80211_key_conf *keyconf,
188 u8 sta_id)
189 {
190 return -EOPNOTSUPP;
191 }
192
193 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
194 struct ieee80211_key_conf *keyconf,
195 u8 sta_id)
196 {
197 return -EOPNOTSUPP;
198 }
199
200 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
201 {
202 unsigned long flags;
203 struct iwl_addsta_cmd sta_cmd;
204
205 spin_lock_irqsave(&priv->sta_lock, flags);
206 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
207 memset(&priv->stations[sta_id].sta.key, 0,
208 sizeof(struct iwl4965_keyinfo));
209 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
210 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
211 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
212 memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd));
213 spin_unlock_irqrestore(&priv->sta_lock, flags);
214
215 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
216 return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC);
217 }
218
219 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
220 struct ieee80211_key_conf *keyconf, u8 sta_id)
221 {
222 int ret = 0;
223
224 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
225
226 switch (keyconf->alg) {
227 case ALG_CCMP:
228 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
229 break;
230 case ALG_TKIP:
231 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
232 break;
233 case ALG_WEP:
234 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
235 break;
236 default:
237 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
238 ret = -EINVAL;
239 }
240
241 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
242 keyconf->alg, keyconf->keylen, keyconf->keyidx,
243 sta_id, ret);
244
245 return ret;
246 }
247
248 static int iwl3945_remove_static_key(struct iwl_priv *priv)
249 {
250 int ret = -EOPNOTSUPP;
251
252 return ret;
253 }
254
255 static int iwl3945_set_static_key(struct iwl_priv *priv,
256 struct ieee80211_key_conf *key)
257 {
258 if (key->alg == ALG_WEP)
259 return -EOPNOTSUPP;
260
261 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
262 return -EINVAL;
263 }
264
265 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
266 {
267 struct list_head *element;
268
269 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
270 priv->frames_count);
271
272 while (!list_empty(&priv->free_frames)) {
273 element = priv->free_frames.next;
274 list_del(element);
275 kfree(list_entry(element, struct iwl3945_frame, list));
276 priv->frames_count--;
277 }
278
279 if (priv->frames_count) {
280 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
281 priv->frames_count);
282 priv->frames_count = 0;
283 }
284 }
285
286 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
287 {
288 struct iwl3945_frame *frame;
289 struct list_head *element;
290 if (list_empty(&priv->free_frames)) {
291 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
292 if (!frame) {
293 IWL_ERR(priv, "Could not allocate frame!\n");
294 return NULL;
295 }
296
297 priv->frames_count++;
298 return frame;
299 }
300
301 element = priv->free_frames.next;
302 list_del(element);
303 return list_entry(element, struct iwl3945_frame, list);
304 }
305
306 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
307 {
308 memset(frame, 0, sizeof(*frame));
309 list_add(&frame->list, &priv->free_frames);
310 }
311
312 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
313 struct ieee80211_hdr *hdr,
314 int left)
315 {
316
317 if (!iwl_is_associated(priv) || !priv->ibss_beacon)
318 return 0;
319
320 if (priv->ibss_beacon->len > left)
321 return 0;
322
323 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
324
325 return priv->ibss_beacon->len;
326 }
327
328 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
329 {
330 struct iwl3945_frame *frame;
331 unsigned int frame_size;
332 int rc;
333 u8 rate;
334
335 frame = iwl3945_get_free_frame(priv);
336
337 if (!frame) {
338 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
339 "command.\n");
340 return -ENOMEM;
341 }
342
343 rate = iwl_rate_get_lowest_plcp(priv);
344
345 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
346
347 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
348 &frame->u.cmd[0]);
349
350 iwl3945_free_frame(priv, frame);
351
352 return rc;
353 }
354
355 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
356 {
357 if (priv->_3945.shared_virt)
358 dma_free_coherent(&priv->pci_dev->dev,
359 sizeof(struct iwl3945_shared),
360 priv->_3945.shared_virt,
361 priv->_3945.shared_phys);
362 }
363
364 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
365 struct ieee80211_tx_info *info,
366 struct iwl_device_cmd *cmd,
367 struct sk_buff *skb_frag,
368 int sta_id)
369 {
370 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
371 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
372
373 switch (keyinfo->alg) {
374 case ALG_CCMP:
375 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
376 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
377 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
378 break;
379
380 case ALG_TKIP:
381 break;
382
383 case ALG_WEP:
384 tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
385 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
386
387 if (keyinfo->keylen == 13)
388 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
389
390 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
391
392 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
393 "with key %d\n", info->control.hw_key->hw_key_idx);
394 break;
395
396 default:
397 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
398 break;
399 }
400 }
401
402 /*
403 * handle build REPLY_TX command notification.
404 */
405 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
406 struct iwl_device_cmd *cmd,
407 struct ieee80211_tx_info *info,
408 struct ieee80211_hdr *hdr, u8 std_id)
409 {
410 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
411 __le32 tx_flags = tx_cmd->tx_flags;
412 __le16 fc = hdr->frame_control;
413
414 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
415 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
416 tx_flags |= TX_CMD_FLG_ACK_MSK;
417 if (ieee80211_is_mgmt(fc))
418 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
419 if (ieee80211_is_probe_resp(fc) &&
420 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
421 tx_flags |= TX_CMD_FLG_TSF_MSK;
422 } else {
423 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
424 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
425 }
426
427 tx_cmd->sta_id = std_id;
428 if (ieee80211_has_morefrags(fc))
429 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
430
431 if (ieee80211_is_data_qos(fc)) {
432 u8 *qc = ieee80211_get_qos_ctl(hdr);
433 tx_cmd->tid_tspec = qc[0] & 0xf;
434 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
435 } else {
436 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
437 }
438
439 priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
440
441 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
442 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
443
444 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
445 if (ieee80211_is_mgmt(fc)) {
446 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
447 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
448 else
449 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
450 } else {
451 tx_cmd->timeout.pm_frame_timeout = 0;
452 }
453
454 tx_cmd->driver_txop = 0;
455 tx_cmd->tx_flags = tx_flags;
456 tx_cmd->next_frame_len = 0;
457 }
458
459 /*
460 * start REPLY_TX command process
461 */
462 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
463 {
464 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
465 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
466 struct iwl3945_tx_cmd *tx_cmd;
467 struct iwl_tx_queue *txq = NULL;
468 struct iwl_queue *q = NULL;
469 struct iwl_device_cmd *out_cmd;
470 struct iwl_cmd_meta *out_meta;
471 dma_addr_t phys_addr;
472 dma_addr_t txcmd_phys;
473 int txq_id = skb_get_queue_mapping(skb);
474 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
475 u8 id;
476 u8 unicast;
477 u8 sta_id;
478 u8 tid = 0;
479 __le16 fc;
480 u8 wait_write_ptr = 0;
481 unsigned long flags;
482
483 spin_lock_irqsave(&priv->lock, flags);
484 if (iwl_is_rfkill(priv)) {
485 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
486 goto drop_unlock;
487 }
488
489 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
490 IWL_ERR(priv, "ERROR: No TX rate available.\n");
491 goto drop_unlock;
492 }
493
494 unicast = !is_multicast_ether_addr(hdr->addr1);
495 id = 0;
496
497 fc = hdr->frame_control;
498
499 #ifdef CONFIG_IWLWIFI_DEBUG
500 if (ieee80211_is_auth(fc))
501 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
502 else if (ieee80211_is_assoc_req(fc))
503 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
504 else if (ieee80211_is_reassoc_req(fc))
505 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
506 #endif
507
508 spin_unlock_irqrestore(&priv->lock, flags);
509
510 hdr_len = ieee80211_hdrlen(fc);
511
512 /* Find index into station table for destination station */
513 sta_id = iwl_sta_id_or_broadcast(priv, info->control.sta);
514 if (sta_id == IWL_INVALID_STATION) {
515 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
516 hdr->addr1);
517 goto drop;
518 }
519
520 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
521
522 if (ieee80211_is_data_qos(fc)) {
523 u8 *qc = ieee80211_get_qos_ctl(hdr);
524 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
525 if (unlikely(tid >= MAX_TID_COUNT))
526 goto drop;
527 }
528
529 /* Descriptor for chosen Tx queue */
530 txq = &priv->txq[txq_id];
531 q = &txq->q;
532
533 if ((iwl_queue_space(q) < q->high_mark))
534 goto drop;
535
536 spin_lock_irqsave(&priv->lock, flags);
537
538 idx = get_cmd_index(q, q->write_ptr, 0);
539
540 /* Set up driver data for this TFD */
541 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
542 txq->txb[q->write_ptr].skb = skb;
543
544 /* Init first empty entry in queue's array of Tx/cmd buffers */
545 out_cmd = txq->cmd[idx];
546 out_meta = &txq->meta[idx];
547 tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
548 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
549 memset(tx_cmd, 0, sizeof(*tx_cmd));
550
551 /*
552 * Set up the Tx-command (not MAC!) header.
553 * Store the chosen Tx queue and TFD index within the sequence field;
554 * after Tx, uCode's Tx response will return this value so driver can
555 * locate the frame within the tx queue and do post-tx processing.
556 */
557 out_cmd->hdr.cmd = REPLY_TX;
558 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
559 INDEX_TO_SEQ(q->write_ptr)));
560
561 /* Copy MAC header from skb into command buffer */
562 memcpy(tx_cmd->hdr, hdr, hdr_len);
563
564
565 if (info->control.hw_key)
566 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
567
568 /* TODO need this for burst mode later on */
569 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
570
571 /* set is_hcca to 0; it probably will never be implemented */
572 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
573
574 /* Total # bytes to be transmitted */
575 len = (u16)skb->len;
576 tx_cmd->len = cpu_to_le16(len);
577
578 iwl_dbg_log_tx_data_frame(priv, len, hdr);
579 iwl_update_stats(priv, true, fc, len);
580 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
581 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
582
583 if (!ieee80211_has_morefrags(hdr->frame_control)) {
584 txq->need_update = 1;
585 } else {
586 wait_write_ptr = 1;
587 txq->need_update = 0;
588 }
589
590 IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
591 le16_to_cpu(out_cmd->hdr.sequence));
592 IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
593 iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
594 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
595 ieee80211_hdrlen(fc));
596
597 /*
598 * Use the first empty entry in this queue's command buffer array
599 * to contain the Tx command and MAC header concatenated together
600 * (payload data will be in another buffer).
601 * Size of this varies, due to varying MAC header length.
602 * If end is not dword aligned, we'll have 2 extra bytes at the end
603 * of the MAC header (device reads on dword boundaries).
604 * We'll tell device about this padding later.
605 */
606 len = sizeof(struct iwl3945_tx_cmd) +
607 sizeof(struct iwl_cmd_header) + hdr_len;
608
609 len_org = len;
610 len = (len + 3) & ~3;
611
612 if (len_org != len)
613 len_org = 1;
614 else
615 len_org = 0;
616
617 /* Physical address of this Tx command's header (not MAC header!),
618 * within command buffer array. */
619 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
620 len, PCI_DMA_TODEVICE);
621 /* we do not map meta data ... so we can safely access address to
622 * provide to unmap command*/
623 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
624 dma_unmap_len_set(out_meta, len, len);
625
626 /* Add buffer containing Tx command and MAC(!) header to TFD's
627 * first entry */
628 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
629 txcmd_phys, len, 1, 0);
630
631
632 /* Set up TFD's 2nd entry to point directly to remainder of skb,
633 * if any (802.11 null frames have no payload). */
634 len = skb->len - hdr_len;
635 if (len) {
636 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
637 len, PCI_DMA_TODEVICE);
638 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
639 phys_addr, len,
640 0, U32_PAD(len));
641 }
642
643
644 /* Tell device the write index *just past* this latest filled TFD */
645 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
646 iwl_txq_update_write_ptr(priv, txq);
647 spin_unlock_irqrestore(&priv->lock, flags);
648
649 if ((iwl_queue_space(q) < q->high_mark)
650 && priv->mac80211_registered) {
651 if (wait_write_ptr) {
652 spin_lock_irqsave(&priv->lock, flags);
653 txq->need_update = 1;
654 iwl_txq_update_write_ptr(priv, txq);
655 spin_unlock_irqrestore(&priv->lock, flags);
656 }
657
658 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
659 }
660
661 return 0;
662
663 drop_unlock:
664 spin_unlock_irqrestore(&priv->lock, flags);
665 drop:
666 return -1;
667 }
668
669 static int iwl3945_get_measurement(struct iwl_priv *priv,
670 struct ieee80211_measurement_params *params,
671 u8 type)
672 {
673 struct iwl_spectrum_cmd spectrum;
674 struct iwl_rx_packet *pkt;
675 struct iwl_host_cmd cmd = {
676 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
677 .data = (void *)&spectrum,
678 .flags = CMD_WANT_SKB,
679 };
680 u32 add_time = le64_to_cpu(params->start_time);
681 int rc;
682 int spectrum_resp_status;
683 int duration = le16_to_cpu(params->duration);
684
685 if (iwl_is_associated(priv))
686 add_time = iwl_usecs_to_beacons(priv,
687 le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
688 le16_to_cpu(priv->rxon_timing.beacon_interval));
689
690 memset(&spectrum, 0, sizeof(spectrum));
691
692 spectrum.channel_count = cpu_to_le16(1);
693 spectrum.flags =
694 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
695 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
696 cmd.len = sizeof(spectrum);
697 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
698
699 if (iwl_is_associated(priv))
700 spectrum.start_time =
701 iwl_add_beacon_time(priv,
702 priv->_3945.last_beacon_time, add_time,
703 le16_to_cpu(priv->rxon_timing.beacon_interval));
704 else
705 spectrum.start_time = 0;
706
707 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
708 spectrum.channels[0].channel = params->channel;
709 spectrum.channels[0].type = type;
710 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
711 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
712 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
713
714 rc = iwl_send_cmd_sync(priv, &cmd);
715 if (rc)
716 return rc;
717
718 pkt = (struct iwl_rx_packet *)cmd.reply_page;
719 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
720 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
721 rc = -EIO;
722 }
723
724 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
725 switch (spectrum_resp_status) {
726 case 0: /* Command will be handled */
727 if (pkt->u.spectrum.id != 0xff) {
728 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
729 pkt->u.spectrum.id);
730 priv->measurement_status &= ~MEASUREMENT_READY;
731 }
732 priv->measurement_status |= MEASUREMENT_ACTIVE;
733 rc = 0;
734 break;
735
736 case 1: /* Command will not be handled */
737 rc = -EAGAIN;
738 break;
739 }
740
741 iwl_free_pages(priv, cmd.reply_page);
742
743 return rc;
744 }
745
746 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
747 struct iwl_rx_mem_buffer *rxb)
748 {
749 struct iwl_rx_packet *pkt = rxb_addr(rxb);
750 struct iwl_alive_resp *palive;
751 struct delayed_work *pwork;
752
753 palive = &pkt->u.alive_frame;
754
755 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
756 "0x%01X 0x%01X\n",
757 palive->is_valid, palive->ver_type,
758 palive->ver_subtype);
759
760 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
761 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
762 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
763 sizeof(struct iwl_alive_resp));
764 pwork = &priv->init_alive_start;
765 } else {
766 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
767 memcpy(&priv->card_alive, &pkt->u.alive_frame,
768 sizeof(struct iwl_alive_resp));
769 pwork = &priv->alive_start;
770 iwl3945_disable_events(priv);
771 }
772
773 /* We delay the ALIVE response by 5ms to
774 * give the HW RF Kill time to activate... */
775 if (palive->is_valid == UCODE_VALID_OK)
776 queue_delayed_work(priv->workqueue, pwork,
777 msecs_to_jiffies(5));
778 else
779 IWL_WARN(priv, "uCode did not respond OK.\n");
780 }
781
782 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
783 struct iwl_rx_mem_buffer *rxb)
784 {
785 #ifdef CONFIG_IWLWIFI_DEBUG
786 struct iwl_rx_packet *pkt = rxb_addr(rxb);
787 #endif
788
789 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
790 }
791
792 static void iwl3945_bg_beacon_update(struct work_struct *work)
793 {
794 struct iwl_priv *priv =
795 container_of(work, struct iwl_priv, beacon_update);
796 struct sk_buff *beacon;
797
798 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
799 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
800
801 if (!beacon) {
802 IWL_ERR(priv, "update beacon failed\n");
803 return;
804 }
805
806 mutex_lock(&priv->mutex);
807 /* new beacon skb is allocated every time; dispose previous.*/
808 if (priv->ibss_beacon)
809 dev_kfree_skb(priv->ibss_beacon);
810
811 priv->ibss_beacon = beacon;
812 mutex_unlock(&priv->mutex);
813
814 iwl3945_send_beacon_cmd(priv);
815 }
816
817 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
818 struct iwl_rx_mem_buffer *rxb)
819 {
820 #ifdef CONFIG_IWLWIFI_DEBUG
821 struct iwl_rx_packet *pkt = rxb_addr(rxb);
822 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
823 u8 rate = beacon->beacon_notify_hdr.rate;
824
825 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
826 "tsf %d %d rate %d\n",
827 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
828 beacon->beacon_notify_hdr.failure_frame,
829 le32_to_cpu(beacon->ibss_mgr_status),
830 le32_to_cpu(beacon->high_tsf),
831 le32_to_cpu(beacon->low_tsf), rate);
832 #endif
833
834 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
835 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
836 queue_work(priv->workqueue, &priv->beacon_update);
837 }
838
839 /* Handle notification from uCode that card's power state is changing
840 * due to software, hardware, or critical temperature RFKILL */
841 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
842 struct iwl_rx_mem_buffer *rxb)
843 {
844 struct iwl_rx_packet *pkt = rxb_addr(rxb);
845 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
846 unsigned long status = priv->status;
847
848 IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
849 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
850 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
851
852 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
853 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
854
855 if (flags & HW_CARD_DISABLED)
856 set_bit(STATUS_RF_KILL_HW, &priv->status);
857 else
858 clear_bit(STATUS_RF_KILL_HW, &priv->status);
859
860
861 iwl_scan_cancel(priv);
862
863 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
864 test_bit(STATUS_RF_KILL_HW, &priv->status)))
865 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
866 test_bit(STATUS_RF_KILL_HW, &priv->status));
867 else
868 wake_up_interruptible(&priv->wait_command_queue);
869 }
870
871 /**
872 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
873 *
874 * Setup the RX handlers for each of the reply types sent from the uCode
875 * to the host.
876 *
877 * This function chains into the hardware specific files for them to setup
878 * any hardware specific handlers as well.
879 */
880 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
881 {
882 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
883 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
884 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
885 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
886 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
887 iwl_rx_spectrum_measure_notif;
888 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
889 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
890 iwl_rx_pm_debug_statistics_notif;
891 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
892
893 /*
894 * The same handler is used for both the REPLY to a discrete
895 * statistics request from the host as well as for the periodic
896 * statistics notifications (after received beacons) from the uCode.
897 */
898 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
899 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
900
901 iwl_setup_rx_scan_handlers(priv);
902 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
903
904 /* Set up hardware specific Rx handlers */
905 iwl3945_hw_rx_handler_setup(priv);
906 }
907
908 /************************** RX-FUNCTIONS ****************************/
909 /*
910 * Rx theory of operation
911 *
912 * The host allocates 32 DMA target addresses and passes the host address
913 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
914 * 0 to 31
915 *
916 * Rx Queue Indexes
917 * The host/firmware share two index registers for managing the Rx buffers.
918 *
919 * The READ index maps to the first position that the firmware may be writing
920 * to -- the driver can read up to (but not including) this position and get
921 * good data.
922 * The READ index is managed by the firmware once the card is enabled.
923 *
924 * The WRITE index maps to the last position the driver has read from -- the
925 * position preceding WRITE is the last slot the firmware can place a packet.
926 *
927 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
928 * WRITE = READ.
929 *
930 * During initialization, the host sets up the READ queue position to the first
931 * INDEX position, and WRITE to the last (READ - 1 wrapped)
932 *
933 * When the firmware places a packet in a buffer, it will advance the READ index
934 * and fire the RX interrupt. The driver can then query the READ index and
935 * process as many packets as possible, moving the WRITE index forward as it
936 * resets the Rx queue buffers with new memory.
937 *
938 * The management in the driver is as follows:
939 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
940 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
941 * to replenish the iwl->rxq->rx_free.
942 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
943 * iwl->rxq is replenished and the READ INDEX is updated (updating the
944 * 'processed' and 'read' driver indexes as well)
945 * + A received packet is processed and handed to the kernel network stack,
946 * detached from the iwl->rxq. The driver 'processed' index is updated.
947 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
948 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
949 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
950 * were enough free buffers and RX_STALLED is set it is cleared.
951 *
952 *
953 * Driver sequence:
954 *
955 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
956 * iwl3945_rx_queue_restock
957 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
958 * queue, updates firmware pointers, and updates
959 * the WRITE index. If insufficient rx_free buffers
960 * are available, schedules iwl3945_rx_replenish
961 *
962 * -- enable interrupts --
963 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
964 * READ INDEX, detaching the SKB from the pool.
965 * Moves the packet buffer from queue to rx_used.
966 * Calls iwl3945_rx_queue_restock to refill any empty
967 * slots.
968 * ...
969 *
970 */
971
972 /**
973 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
974 */
975 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
976 dma_addr_t dma_addr)
977 {
978 return cpu_to_le32((u32)dma_addr);
979 }
980
981 /**
982 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
983 *
984 * If there are slots in the RX queue that need to be restocked,
985 * and we have free pre-allocated buffers, fill the ranks as much
986 * as we can, pulling from rx_free.
987 *
988 * This moves the 'write' index forward to catch up with 'processed', and
989 * also updates the memory address in the firmware to reference the new
990 * target buffer.
991 */
992 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
993 {
994 struct iwl_rx_queue *rxq = &priv->rxq;
995 struct list_head *element;
996 struct iwl_rx_mem_buffer *rxb;
997 unsigned long flags;
998 int write;
999
1000 spin_lock_irqsave(&rxq->lock, flags);
1001 write = rxq->write & ~0x7;
1002 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1003 /* Get next free Rx buffer, remove from free list */
1004 element = rxq->rx_free.next;
1005 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1006 list_del(element);
1007
1008 /* Point to Rx buffer via next RBD in circular buffer */
1009 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
1010 rxq->queue[rxq->write] = rxb;
1011 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1012 rxq->free_count--;
1013 }
1014 spin_unlock_irqrestore(&rxq->lock, flags);
1015 /* If the pre-allocated buffer pool is dropping low, schedule to
1016 * refill it */
1017 if (rxq->free_count <= RX_LOW_WATERMARK)
1018 queue_work(priv->workqueue, &priv->rx_replenish);
1019
1020
1021 /* If we've added more space for the firmware to place data, tell it.
1022 * Increment device's write pointer in multiples of 8. */
1023 if ((rxq->write_actual != (rxq->write & ~0x7))
1024 || (abs(rxq->write - rxq->read) > 7)) {
1025 spin_lock_irqsave(&rxq->lock, flags);
1026 rxq->need_update = 1;
1027 spin_unlock_irqrestore(&rxq->lock, flags);
1028 iwl_rx_queue_update_write_ptr(priv, rxq);
1029 }
1030 }
1031
1032 /**
1033 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1034 *
1035 * When moving to rx_free an SKB is allocated for the slot.
1036 *
1037 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1038 * This is called as a scheduled work item (except for during initialization)
1039 */
1040 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1041 {
1042 struct iwl_rx_queue *rxq = &priv->rxq;
1043 struct list_head *element;
1044 struct iwl_rx_mem_buffer *rxb;
1045 struct page *page;
1046 unsigned long flags;
1047 gfp_t gfp_mask = priority;
1048
1049 while (1) {
1050 spin_lock_irqsave(&rxq->lock, flags);
1051
1052 if (list_empty(&rxq->rx_used)) {
1053 spin_unlock_irqrestore(&rxq->lock, flags);
1054 return;
1055 }
1056 spin_unlock_irqrestore(&rxq->lock, flags);
1057
1058 if (rxq->free_count > RX_LOW_WATERMARK)
1059 gfp_mask |= __GFP_NOWARN;
1060
1061 if (priv->hw_params.rx_page_order > 0)
1062 gfp_mask |= __GFP_COMP;
1063
1064 /* Alloc a new receive buffer */
1065 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1066 if (!page) {
1067 if (net_ratelimit())
1068 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1069 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1070 net_ratelimit())
1071 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1072 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
1073 rxq->free_count);
1074 /* We don't reschedule replenish work here -- we will
1075 * call the restock method and if it still needs
1076 * more buffers it will schedule replenish */
1077 break;
1078 }
1079
1080 spin_lock_irqsave(&rxq->lock, flags);
1081 if (list_empty(&rxq->rx_used)) {
1082 spin_unlock_irqrestore(&rxq->lock, flags);
1083 __free_pages(page, priv->hw_params.rx_page_order);
1084 return;
1085 }
1086 element = rxq->rx_used.next;
1087 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1088 list_del(element);
1089 spin_unlock_irqrestore(&rxq->lock, flags);
1090
1091 rxb->page = page;
1092 /* Get physical address of RB/SKB */
1093 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1094 PAGE_SIZE << priv->hw_params.rx_page_order,
1095 PCI_DMA_FROMDEVICE);
1096
1097 spin_lock_irqsave(&rxq->lock, flags);
1098
1099 list_add_tail(&rxb->list, &rxq->rx_free);
1100 rxq->free_count++;
1101 priv->alloc_rxb_page++;
1102
1103 spin_unlock_irqrestore(&rxq->lock, flags);
1104 }
1105 }
1106
1107 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1108 {
1109 unsigned long flags;
1110 int i;
1111 spin_lock_irqsave(&rxq->lock, flags);
1112 INIT_LIST_HEAD(&rxq->rx_free);
1113 INIT_LIST_HEAD(&rxq->rx_used);
1114 /* Fill the rx_used queue with _all_ of the Rx buffers */
1115 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1116 /* In the reset function, these buffers may have been allocated
1117 * to an SKB, so we need to unmap and free potential storage */
1118 if (rxq->pool[i].page != NULL) {
1119 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1120 PAGE_SIZE << priv->hw_params.rx_page_order,
1121 PCI_DMA_FROMDEVICE);
1122 __iwl_free_pages(priv, rxq->pool[i].page);
1123 rxq->pool[i].page = NULL;
1124 }
1125 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1126 }
1127
1128 /* Set us so that we have processed and used all buffers, but have
1129 * not restocked the Rx queue with fresh buffers */
1130 rxq->read = rxq->write = 0;
1131 rxq->write_actual = 0;
1132 rxq->free_count = 0;
1133 spin_unlock_irqrestore(&rxq->lock, flags);
1134 }
1135
1136 void iwl3945_rx_replenish(void *data)
1137 {
1138 struct iwl_priv *priv = data;
1139 unsigned long flags;
1140
1141 iwl3945_rx_allocate(priv, GFP_KERNEL);
1142
1143 spin_lock_irqsave(&priv->lock, flags);
1144 iwl3945_rx_queue_restock(priv);
1145 spin_unlock_irqrestore(&priv->lock, flags);
1146 }
1147
1148 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1149 {
1150 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1151
1152 iwl3945_rx_queue_restock(priv);
1153 }
1154
1155
1156 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1157 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1158 * This free routine walks the list of POOL entries and if SKB is set to
1159 * non NULL it is unmapped and freed
1160 */
1161 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1162 {
1163 int i;
1164 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1165 if (rxq->pool[i].page != NULL) {
1166 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1167 PAGE_SIZE << priv->hw_params.rx_page_order,
1168 PCI_DMA_FROMDEVICE);
1169 __iwl_free_pages(priv, rxq->pool[i].page);
1170 rxq->pool[i].page = NULL;
1171 }
1172 }
1173
1174 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1175 rxq->bd_dma);
1176 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1177 rxq->rb_stts, rxq->rb_stts_dma);
1178 rxq->bd = NULL;
1179 rxq->rb_stts = NULL;
1180 }
1181
1182
1183 /* Convert linear signal-to-noise ratio into dB */
1184 static u8 ratio2dB[100] = {
1185 /* 0 1 2 3 4 5 6 7 8 9 */
1186 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1187 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1188 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1189 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1190 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1191 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1192 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1193 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1194 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1195 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1196 };
1197
1198 /* Calculates a relative dB value from a ratio of linear
1199 * (i.e. not dB) signal levels.
1200 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1201 int iwl3945_calc_db_from_ratio(int sig_ratio)
1202 {
1203 /* 1000:1 or higher just report as 60 dB */
1204 if (sig_ratio >= 1000)
1205 return 60;
1206
1207 /* 100:1 or higher, divide by 10 and use table,
1208 * add 20 dB to make up for divide by 10 */
1209 if (sig_ratio >= 100)
1210 return 20 + (int)ratio2dB[sig_ratio/10];
1211
1212 /* We shouldn't see this */
1213 if (sig_ratio < 1)
1214 return 0;
1215
1216 /* Use table for ratios 1:1 - 99:1 */
1217 return (int)ratio2dB[sig_ratio];
1218 }
1219
1220 /**
1221 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1222 *
1223 * Uses the priv->rx_handlers callback function array to invoke
1224 * the appropriate handlers, including command responses,
1225 * frame-received notifications, and other notifications.
1226 */
1227 static void iwl3945_rx_handle(struct iwl_priv *priv)
1228 {
1229 struct iwl_rx_mem_buffer *rxb;
1230 struct iwl_rx_packet *pkt;
1231 struct iwl_rx_queue *rxq = &priv->rxq;
1232 u32 r, i;
1233 int reclaim;
1234 unsigned long flags;
1235 u8 fill_rx = 0;
1236 u32 count = 8;
1237 int total_empty = 0;
1238
1239 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1240 * buffer that the driver may process (last buffer filled by ucode). */
1241 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1242 i = rxq->read;
1243
1244 /* calculate total frames need to be restock after handling RX */
1245 total_empty = r - rxq->write_actual;
1246 if (total_empty < 0)
1247 total_empty += RX_QUEUE_SIZE;
1248
1249 if (total_empty > (RX_QUEUE_SIZE / 2))
1250 fill_rx = 1;
1251 /* Rx interrupt, but nothing sent from uCode */
1252 if (i == r)
1253 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1254
1255 while (i != r) {
1256 int len;
1257
1258 rxb = rxq->queue[i];
1259
1260 /* If an RXB doesn't have a Rx queue slot associated with it,
1261 * then a bug has been introduced in the queue refilling
1262 * routines -- catch it here */
1263 BUG_ON(rxb == NULL);
1264
1265 rxq->queue[i] = NULL;
1266
1267 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1268 PAGE_SIZE << priv->hw_params.rx_page_order,
1269 PCI_DMA_FROMDEVICE);
1270 pkt = rxb_addr(rxb);
1271
1272 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1273 len += sizeof(u32); /* account for status word */
1274 trace_iwlwifi_dev_rx(priv, pkt, len);
1275
1276 /* Reclaim a command buffer only if this packet is a response
1277 * to a (driver-originated) command.
1278 * If the packet (e.g. Rx frame) originated from uCode,
1279 * there is no command buffer to reclaim.
1280 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1281 * but apparently a few don't get set; catch them here. */
1282 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1283 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1284 (pkt->hdr.cmd != REPLY_TX);
1285
1286 /* Based on type of command response or notification,
1287 * handle those that need handling via function in
1288 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1289 if (priv->rx_handlers[pkt->hdr.cmd]) {
1290 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1291 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1292 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1293 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1294 } else {
1295 /* No handling needed */
1296 IWL_DEBUG_RX(priv,
1297 "r %d i %d No handler needed for %s, 0x%02x\n",
1298 r, i, get_cmd_string(pkt->hdr.cmd),
1299 pkt->hdr.cmd);
1300 }
1301
1302 /*
1303 * XXX: After here, we should always check rxb->page
1304 * against NULL before touching it or its virtual
1305 * memory (pkt). Because some rx_handler might have
1306 * already taken or freed the pages.
1307 */
1308
1309 if (reclaim) {
1310 /* Invoke any callbacks, transfer the buffer to caller,
1311 * and fire off the (possibly) blocking iwl_send_cmd()
1312 * as we reclaim the driver command queue */
1313 if (rxb->page)
1314 iwl_tx_cmd_complete(priv, rxb);
1315 else
1316 IWL_WARN(priv, "Claim null rxb?\n");
1317 }
1318
1319 /* Reuse the page if possible. For notification packets and
1320 * SKBs that fail to Rx correctly, add them back into the
1321 * rx_free list for reuse later. */
1322 spin_lock_irqsave(&rxq->lock, flags);
1323 if (rxb->page != NULL) {
1324 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1325 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1326 PCI_DMA_FROMDEVICE);
1327 list_add_tail(&rxb->list, &rxq->rx_free);
1328 rxq->free_count++;
1329 } else
1330 list_add_tail(&rxb->list, &rxq->rx_used);
1331
1332 spin_unlock_irqrestore(&rxq->lock, flags);
1333
1334 i = (i + 1) & RX_QUEUE_MASK;
1335 /* If there are a lot of unused frames,
1336 * restock the Rx queue so ucode won't assert. */
1337 if (fill_rx) {
1338 count++;
1339 if (count >= 8) {
1340 rxq->read = i;
1341 iwl3945_rx_replenish_now(priv);
1342 count = 0;
1343 }
1344 }
1345 }
1346
1347 /* Backtrack one entry */
1348 rxq->read = i;
1349 if (fill_rx)
1350 iwl3945_rx_replenish_now(priv);
1351 else
1352 iwl3945_rx_queue_restock(priv);
1353 }
1354
1355 /* call this function to flush any scheduled tasklet */
1356 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1357 {
1358 /* wait to make sure we flush pending tasklet*/
1359 synchronize_irq(priv->pci_dev->irq);
1360 tasklet_kill(&priv->irq_tasklet);
1361 }
1362
1363 static const char *desc_lookup(int i)
1364 {
1365 switch (i) {
1366 case 1:
1367 return "FAIL";
1368 case 2:
1369 return "BAD_PARAM";
1370 case 3:
1371 return "BAD_CHECKSUM";
1372 case 4:
1373 return "NMI_INTERRUPT";
1374 case 5:
1375 return "SYSASSERT";
1376 case 6:
1377 return "FATAL_ERROR";
1378 }
1379
1380 return "UNKNOWN";
1381 }
1382
1383 #define ERROR_START_OFFSET (1 * sizeof(u32))
1384 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1385
1386 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1387 {
1388 u32 i;
1389 u32 desc, time, count, base, data1;
1390 u32 blink1, blink2, ilink1, ilink2;
1391
1392 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1393
1394 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1395 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1396 return;
1397 }
1398
1399
1400 count = iwl_read_targ_mem(priv, base);
1401
1402 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1403 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1404 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1405 priv->status, count);
1406 }
1407
1408 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1409 "ilink1 nmiPC Line\n");
1410 for (i = ERROR_START_OFFSET;
1411 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1412 i += ERROR_ELEM_SIZE) {
1413 desc = iwl_read_targ_mem(priv, base + i);
1414 time =
1415 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1416 blink1 =
1417 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1418 blink2 =
1419 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1420 ilink1 =
1421 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1422 ilink2 =
1423 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1424 data1 =
1425 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1426
1427 IWL_ERR(priv,
1428 "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1429 desc_lookup(desc), desc, time, blink1, blink2,
1430 ilink1, ilink2, data1);
1431 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
1432 0, blink1, blink2, ilink1, ilink2);
1433 }
1434 }
1435
1436 #define EVENT_START_OFFSET (6 * sizeof(u32))
1437
1438 /**
1439 * iwl3945_print_event_log - Dump error event log to syslog
1440 *
1441 */
1442 static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1443 u32 num_events, u32 mode,
1444 int pos, char **buf, size_t bufsz)
1445 {
1446 u32 i;
1447 u32 base; /* SRAM byte address of event log header */
1448 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1449 u32 ptr; /* SRAM byte address of log data */
1450 u32 ev, time, data; /* event log data */
1451 unsigned long reg_flags;
1452
1453 if (num_events == 0)
1454 return pos;
1455
1456 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1457
1458 if (mode == 0)
1459 event_size = 2 * sizeof(u32);
1460 else
1461 event_size = 3 * sizeof(u32);
1462
1463 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1464
1465 /* Make sure device is powered up for SRAM reads */
1466 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1467 iwl_grab_nic_access(priv);
1468
1469 /* Set starting address; reads will auto-increment */
1470 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1471 rmb();
1472
1473 /* "time" is actually "data" for mode 0 (no timestamp).
1474 * place event id # at far right for easier visual parsing. */
1475 for (i = 0; i < num_events; i++) {
1476 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1477 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1478 if (mode == 0) {
1479 /* data, ev */
1480 if (bufsz) {
1481 pos += scnprintf(*buf + pos, bufsz - pos,
1482 "0x%08x:%04u\n",
1483 time, ev);
1484 } else {
1485 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1486 trace_iwlwifi_dev_ucode_event(priv, 0,
1487 time, ev);
1488 }
1489 } else {
1490 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1491 if (bufsz) {
1492 pos += scnprintf(*buf + pos, bufsz - pos,
1493 "%010u:0x%08x:%04u\n",
1494 time, data, ev);
1495 } else {
1496 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1497 time, data, ev);
1498 trace_iwlwifi_dev_ucode_event(priv, time,
1499 data, ev);
1500 }
1501 }
1502 }
1503
1504 /* Allow device to power down */
1505 iwl_release_nic_access(priv);
1506 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1507 return pos;
1508 }
1509
1510 /**
1511 * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1512 */
1513 static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1514 u32 num_wraps, u32 next_entry,
1515 u32 size, u32 mode,
1516 int pos, char **buf, size_t bufsz)
1517 {
1518 /*
1519 * display the newest DEFAULT_LOG_ENTRIES entries
1520 * i.e the entries just before the next ont that uCode would fill.
1521 */
1522 if (num_wraps) {
1523 if (next_entry < size) {
1524 pos = iwl3945_print_event_log(priv,
1525 capacity - (size - next_entry),
1526 size - next_entry, mode,
1527 pos, buf, bufsz);
1528 pos = iwl3945_print_event_log(priv, 0,
1529 next_entry, mode,
1530 pos, buf, bufsz);
1531 } else
1532 pos = iwl3945_print_event_log(priv, next_entry - size,
1533 size, mode,
1534 pos, buf, bufsz);
1535 } else {
1536 if (next_entry < size)
1537 pos = iwl3945_print_event_log(priv, 0,
1538 next_entry, mode,
1539 pos, buf, bufsz);
1540 else
1541 pos = iwl3945_print_event_log(priv, next_entry - size,
1542 size, mode,
1543 pos, buf, bufsz);
1544 }
1545 return pos;
1546 }
1547
1548 #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1549
1550 int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1551 char **buf, bool display)
1552 {
1553 u32 base; /* SRAM byte address of event log header */
1554 u32 capacity; /* event log capacity in # entries */
1555 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1556 u32 num_wraps; /* # times uCode wrapped to top of log */
1557 u32 next_entry; /* index of next entry to be written by uCode */
1558 u32 size; /* # entries that we'll print */
1559 int pos = 0;
1560 size_t bufsz = 0;
1561
1562 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1563 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1564 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1565 return -EINVAL;
1566 }
1567
1568 /* event log header */
1569 capacity = iwl_read_targ_mem(priv, base);
1570 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1571 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1572 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1573
1574 if (capacity > priv->cfg->max_event_log_size) {
1575 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1576 capacity, priv->cfg->max_event_log_size);
1577 capacity = priv->cfg->max_event_log_size;
1578 }
1579
1580 if (next_entry > priv->cfg->max_event_log_size) {
1581 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1582 next_entry, priv->cfg->max_event_log_size);
1583 next_entry = priv->cfg->max_event_log_size;
1584 }
1585
1586 size = num_wraps ? capacity : next_entry;
1587
1588 /* bail out if nothing in log */
1589 if (size == 0) {
1590 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1591 return pos;
1592 }
1593
1594 #ifdef CONFIG_IWLWIFI_DEBUG
1595 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1596 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1597 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1598 #else
1599 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1600 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1601 #endif
1602
1603 IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1604 size);
1605
1606 #ifdef CONFIG_IWLWIFI_DEBUG
1607 if (display) {
1608 if (full_log)
1609 bufsz = capacity * 48;
1610 else
1611 bufsz = size * 48;
1612 *buf = kmalloc(bufsz, GFP_KERNEL);
1613 if (!*buf)
1614 return -ENOMEM;
1615 }
1616 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1617 /* if uCode has wrapped back to top of log,
1618 * start at the oldest entry,
1619 * i.e the next one that uCode would fill.
1620 */
1621 if (num_wraps)
1622 pos = iwl3945_print_event_log(priv, next_entry,
1623 capacity - next_entry, mode,
1624 pos, buf, bufsz);
1625
1626 /* (then/else) start at top of log */
1627 pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1628 pos, buf, bufsz);
1629 } else
1630 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1631 next_entry, size, mode,
1632 pos, buf, bufsz);
1633 #else
1634 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1635 next_entry, size, mode,
1636 pos, buf, bufsz);
1637 #endif
1638 return pos;
1639 }
1640
1641 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1642 {
1643 u32 inta, handled = 0;
1644 u32 inta_fh;
1645 unsigned long flags;
1646 #ifdef CONFIG_IWLWIFI_DEBUG
1647 u32 inta_mask;
1648 #endif
1649
1650 spin_lock_irqsave(&priv->lock, flags);
1651
1652 /* Ack/clear/reset pending uCode interrupts.
1653 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1654 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1655 inta = iwl_read32(priv, CSR_INT);
1656 iwl_write32(priv, CSR_INT, inta);
1657
1658 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1659 * Any new interrupts that happen after this, either while we're
1660 * in this tasklet, or later, will show up in next ISR/tasklet. */
1661 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1662 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1663
1664 #ifdef CONFIG_IWLWIFI_DEBUG
1665 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1666 /* just for debug */
1667 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1668 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1669 inta, inta_mask, inta_fh);
1670 }
1671 #endif
1672
1673 spin_unlock_irqrestore(&priv->lock, flags);
1674
1675 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1676 * atomic, make sure that inta covers all the interrupts that
1677 * we've discovered, even if FH interrupt came in just after
1678 * reading CSR_INT. */
1679 if (inta_fh & CSR39_FH_INT_RX_MASK)
1680 inta |= CSR_INT_BIT_FH_RX;
1681 if (inta_fh & CSR39_FH_INT_TX_MASK)
1682 inta |= CSR_INT_BIT_FH_TX;
1683
1684 /* Now service all interrupt bits discovered above. */
1685 if (inta & CSR_INT_BIT_HW_ERR) {
1686 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1687
1688 /* Tell the device to stop sending interrupts */
1689 iwl_disable_interrupts(priv);
1690
1691 priv->isr_stats.hw++;
1692 iwl_irq_handle_error(priv);
1693
1694 handled |= CSR_INT_BIT_HW_ERR;
1695
1696 return;
1697 }
1698
1699 #ifdef CONFIG_IWLWIFI_DEBUG
1700 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1701 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1702 if (inta & CSR_INT_BIT_SCD) {
1703 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1704 "the frame/frames.\n");
1705 priv->isr_stats.sch++;
1706 }
1707
1708 /* Alive notification via Rx interrupt will do the real work */
1709 if (inta & CSR_INT_BIT_ALIVE) {
1710 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1711 priv->isr_stats.alive++;
1712 }
1713 }
1714 #endif
1715 /* Safely ignore these bits for debug checks below */
1716 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1717
1718 /* Error detected by uCode */
1719 if (inta & CSR_INT_BIT_SW_ERR) {
1720 IWL_ERR(priv, "Microcode SW error detected. "
1721 "Restarting 0x%X.\n", inta);
1722 priv->isr_stats.sw++;
1723 priv->isr_stats.sw_err = inta;
1724 iwl_irq_handle_error(priv);
1725 handled |= CSR_INT_BIT_SW_ERR;
1726 }
1727
1728 /* uCode wakes up after power-down sleep */
1729 if (inta & CSR_INT_BIT_WAKEUP) {
1730 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1731 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1732 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1733 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1734 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1735 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1736 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1737 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1738
1739 priv->isr_stats.wakeup++;
1740 handled |= CSR_INT_BIT_WAKEUP;
1741 }
1742
1743 /* All uCode command responses, including Tx command responses,
1744 * Rx "responses" (frame-received notification), and other
1745 * notifications from uCode come through here*/
1746 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1747 iwl3945_rx_handle(priv);
1748 priv->isr_stats.rx++;
1749 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1750 }
1751
1752 if (inta & CSR_INT_BIT_FH_TX) {
1753 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1754 priv->isr_stats.tx++;
1755
1756 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1757 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1758 (FH39_SRVC_CHNL), 0x0);
1759 handled |= CSR_INT_BIT_FH_TX;
1760 }
1761
1762 if (inta & ~handled) {
1763 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1764 priv->isr_stats.unhandled++;
1765 }
1766
1767 if (inta & ~priv->inta_mask) {
1768 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1769 inta & ~priv->inta_mask);
1770 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1771 }
1772
1773 /* Re-enable all interrupts */
1774 /* only Re-enable if disabled by irq */
1775 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1776 iwl_enable_interrupts(priv);
1777
1778 #ifdef CONFIG_IWLWIFI_DEBUG
1779 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1780 inta = iwl_read32(priv, CSR_INT);
1781 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1782 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1783 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1784 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1785 }
1786 #endif
1787 }
1788
1789 static int iwl3945_get_single_channel_for_scan(struct iwl_priv *priv,
1790 struct ieee80211_vif *vif,
1791 enum ieee80211_band band,
1792 struct iwl3945_scan_channel *scan_ch)
1793 {
1794 const struct ieee80211_supported_band *sband;
1795 u16 passive_dwell = 0;
1796 u16 active_dwell = 0;
1797 int added = 0;
1798 u8 channel = 0;
1799
1800 sband = iwl_get_hw_mode(priv, band);
1801 if (!sband) {
1802 IWL_ERR(priv, "invalid band\n");
1803 return added;
1804 }
1805
1806 active_dwell = iwl_get_active_dwell_time(priv, band, 0);
1807 passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1808
1809 if (passive_dwell <= active_dwell)
1810 passive_dwell = active_dwell + 1;
1811
1812
1813 channel = iwl_get_single_channel_number(priv, band);
1814
1815 if (channel) {
1816 scan_ch->channel = channel;
1817 scan_ch->type = 0; /* passive */
1818 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1819 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1820 /* Set txpower levels to defaults */
1821 scan_ch->tpc.dsp_atten = 110;
1822 if (band == IEEE80211_BAND_5GHZ)
1823 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1824 else
1825 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1826 added++;
1827 } else
1828 IWL_ERR(priv, "no valid channel found\n");
1829 return added;
1830 }
1831
1832 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1833 enum ieee80211_band band,
1834 u8 is_active, u8 n_probes,
1835 struct iwl3945_scan_channel *scan_ch,
1836 struct ieee80211_vif *vif)
1837 {
1838 struct ieee80211_channel *chan;
1839 const struct ieee80211_supported_band *sband;
1840 const struct iwl_channel_info *ch_info;
1841 u16 passive_dwell = 0;
1842 u16 active_dwell = 0;
1843 int added, i;
1844
1845 sband = iwl_get_hw_mode(priv, band);
1846 if (!sband)
1847 return 0;
1848
1849 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1850 passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1851
1852 if (passive_dwell <= active_dwell)
1853 passive_dwell = active_dwell + 1;
1854
1855 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1856 chan = priv->scan_request->channels[i];
1857
1858 if (chan->band != band)
1859 continue;
1860
1861 scan_ch->channel = chan->hw_value;
1862
1863 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1864 if (!is_channel_valid(ch_info)) {
1865 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1866 scan_ch->channel);
1867 continue;
1868 }
1869
1870 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1871 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1872 /* If passive , set up for auto-switch
1873 * and use long active_dwell time.
1874 */
1875 if (!is_active || is_channel_passive(ch_info) ||
1876 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1877 scan_ch->type = 0; /* passive */
1878 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1879 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1880 } else {
1881 scan_ch->type = 1; /* active */
1882 }
1883
1884 /* Set direct probe bits. These may be used both for active
1885 * scan channels (probes gets sent right away),
1886 * or for passive channels (probes get se sent only after
1887 * hearing clear Rx packet).*/
1888 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1889 if (n_probes)
1890 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1891 } else {
1892 /* uCode v1 does not allow setting direct probe bits on
1893 * passive channel. */
1894 if ((scan_ch->type & 1) && n_probes)
1895 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1896 }
1897
1898 /* Set txpower levels to defaults */
1899 scan_ch->tpc.dsp_atten = 110;
1900 /* scan_pwr_info->tpc.dsp_atten; */
1901
1902 /*scan_pwr_info->tpc.tx_gain; */
1903 if (band == IEEE80211_BAND_5GHZ)
1904 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1905 else {
1906 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1907 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1908 * power level:
1909 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1910 */
1911 }
1912
1913 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1914 scan_ch->channel,
1915 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1916 (scan_ch->type & 1) ?
1917 active_dwell : passive_dwell);
1918
1919 scan_ch++;
1920 added++;
1921 }
1922
1923 IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1924 return added;
1925 }
1926
1927 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1928 struct ieee80211_rate *rates)
1929 {
1930 int i;
1931
1932 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1933 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1934 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1935 rates[i].hw_value_short = i;
1936 rates[i].flags = 0;
1937 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1938 /*
1939 * If CCK != 1M then set short preamble rate flag.
1940 */
1941 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1942 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1943 }
1944 }
1945 }
1946
1947 /******************************************************************************
1948 *
1949 * uCode download functions
1950 *
1951 ******************************************************************************/
1952
1953 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1954 {
1955 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1956 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1957 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1958 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1959 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1960 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1961 }
1962
1963 /**
1964 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1965 * looking at all data.
1966 */
1967 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1968 {
1969 u32 val;
1970 u32 save_len = len;
1971 int rc = 0;
1972 u32 errcnt;
1973
1974 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1975
1976 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1977 IWL39_RTC_INST_LOWER_BOUND);
1978
1979 errcnt = 0;
1980 for (; len > 0; len -= sizeof(u32), image++) {
1981 /* read data comes through single port, auto-incr addr */
1982 /* NOTE: Use the debugless read so we don't flood kernel log
1983 * if IWL_DL_IO is set */
1984 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1985 if (val != le32_to_cpu(*image)) {
1986 IWL_ERR(priv, "uCode INST section is invalid at "
1987 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1988 save_len - len, val, le32_to_cpu(*image));
1989 rc = -EIO;
1990 errcnt++;
1991 if (errcnt >= 20)
1992 break;
1993 }
1994 }
1995
1996
1997 if (!errcnt)
1998 IWL_DEBUG_INFO(priv,
1999 "ucode image in INSTRUCTION memory is good\n");
2000
2001 return rc;
2002 }
2003
2004
2005 /**
2006 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2007 * using sample data 100 bytes apart. If these sample points are good,
2008 * it's a pretty good bet that everything between them is good, too.
2009 */
2010 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2011 {
2012 u32 val;
2013 int rc = 0;
2014 u32 errcnt = 0;
2015 u32 i;
2016
2017 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2018
2019 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2020 /* read data comes through single port, auto-incr addr */
2021 /* NOTE: Use the debugless read so we don't flood kernel log
2022 * if IWL_DL_IO is set */
2023 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2024 i + IWL39_RTC_INST_LOWER_BOUND);
2025 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2026 if (val != le32_to_cpu(*image)) {
2027 #if 0 /* Enable this if you want to see details */
2028 IWL_ERR(priv, "uCode INST section is invalid at "
2029 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2030 i, val, *image);
2031 #endif
2032 rc = -EIO;
2033 errcnt++;
2034 if (errcnt >= 3)
2035 break;
2036 }
2037 }
2038
2039 return rc;
2040 }
2041
2042
2043 /**
2044 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2045 * and verify its contents
2046 */
2047 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2048 {
2049 __le32 *image;
2050 u32 len;
2051 int rc = 0;
2052
2053 /* Try bootstrap */
2054 image = (__le32 *)priv->ucode_boot.v_addr;
2055 len = priv->ucode_boot.len;
2056 rc = iwl3945_verify_inst_sparse(priv, image, len);
2057 if (rc == 0) {
2058 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2059 return 0;
2060 }
2061
2062 /* Try initialize */
2063 image = (__le32 *)priv->ucode_init.v_addr;
2064 len = priv->ucode_init.len;
2065 rc = iwl3945_verify_inst_sparse(priv, image, len);
2066 if (rc == 0) {
2067 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2068 return 0;
2069 }
2070
2071 /* Try runtime/protocol */
2072 image = (__le32 *)priv->ucode_code.v_addr;
2073 len = priv->ucode_code.len;
2074 rc = iwl3945_verify_inst_sparse(priv, image, len);
2075 if (rc == 0) {
2076 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2077 return 0;
2078 }
2079
2080 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2081
2082 /* Since nothing seems to match, show first several data entries in
2083 * instruction SRAM, so maybe visual inspection will give a clue.
2084 * Selection of bootstrap image (vs. other images) is arbitrary. */
2085 image = (__le32 *)priv->ucode_boot.v_addr;
2086 len = priv->ucode_boot.len;
2087 rc = iwl3945_verify_inst_full(priv, image, len);
2088
2089 return rc;
2090 }
2091
2092 static void iwl3945_nic_start(struct iwl_priv *priv)
2093 {
2094 /* Remove all resets to allow NIC to operate */
2095 iwl_write32(priv, CSR_RESET, 0);
2096 }
2097
2098 #define IWL3945_UCODE_GET(item) \
2099 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
2100 { \
2101 return le32_to_cpu(ucode->u.v1.item); \
2102 }
2103
2104 static u32 iwl3945_ucode_get_header_size(u32 api_ver)
2105 {
2106 return 24;
2107 }
2108
2109 static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
2110 {
2111 return (u8 *) ucode->u.v1.data;
2112 }
2113
2114 IWL3945_UCODE_GET(inst_size);
2115 IWL3945_UCODE_GET(data_size);
2116 IWL3945_UCODE_GET(init_size);
2117 IWL3945_UCODE_GET(init_data_size);
2118 IWL3945_UCODE_GET(boot_size);
2119
2120 /**
2121 * iwl3945_read_ucode - Read uCode images from disk file.
2122 *
2123 * Copy into buffers for card to fetch via bus-mastering
2124 */
2125 static int iwl3945_read_ucode(struct iwl_priv *priv)
2126 {
2127 const struct iwl_ucode_header *ucode;
2128 int ret = -EINVAL, index;
2129 const struct firmware *ucode_raw;
2130 /* firmware file name contains uCode/driver compatibility version */
2131 const char *name_pre = priv->cfg->fw_name_pre;
2132 const unsigned int api_max = priv->cfg->ucode_api_max;
2133 const unsigned int api_min = priv->cfg->ucode_api_min;
2134 char buf[25];
2135 u8 *src;
2136 size_t len;
2137 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2138
2139 /* Ask kernel firmware_class module to get the boot firmware off disk.
2140 * request_firmware() is synchronous, file is in memory on return. */
2141 for (index = api_max; index >= api_min; index--) {
2142 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2143 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2144 if (ret < 0) {
2145 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2146 buf, ret);
2147 if (ret == -ENOENT)
2148 continue;
2149 else
2150 goto error;
2151 } else {
2152 if (index < api_max)
2153 IWL_ERR(priv, "Loaded firmware %s, "
2154 "which is deprecated. "
2155 " Please use API v%u instead.\n",
2156 buf, api_max);
2157 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2158 "(%zd bytes) from disk\n",
2159 buf, ucode_raw->size);
2160 break;
2161 }
2162 }
2163
2164 if (ret < 0)
2165 goto error;
2166
2167 /* Make sure that we got at least our header! */
2168 if (ucode_raw->size < iwl3945_ucode_get_header_size(1)) {
2169 IWL_ERR(priv, "File size way too small!\n");
2170 ret = -EINVAL;
2171 goto err_release;
2172 }
2173
2174 /* Data from ucode file: header followed by uCode images */
2175 ucode = (struct iwl_ucode_header *)ucode_raw->data;
2176
2177 priv->ucode_ver = le32_to_cpu(ucode->ver);
2178 api_ver = IWL_UCODE_API(priv->ucode_ver);
2179 inst_size = iwl3945_ucode_get_inst_size(ucode);
2180 data_size = iwl3945_ucode_get_data_size(ucode);
2181 init_size = iwl3945_ucode_get_init_size(ucode);
2182 init_data_size = iwl3945_ucode_get_init_data_size(ucode);
2183 boot_size = iwl3945_ucode_get_boot_size(ucode);
2184 src = iwl3945_ucode_get_data(ucode);
2185
2186 /* api_ver should match the api version forming part of the
2187 * firmware filename ... but we don't check for that and only rely
2188 * on the API version read from firmware header from here on forward */
2189
2190 if (api_ver < api_min || api_ver > api_max) {
2191 IWL_ERR(priv, "Driver unable to support your firmware API. "
2192 "Driver supports v%u, firmware is v%u.\n",
2193 api_max, api_ver);
2194 priv->ucode_ver = 0;
2195 ret = -EINVAL;
2196 goto err_release;
2197 }
2198 if (api_ver != api_max)
2199 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2200 "got %u. New firmware can be obtained "
2201 "from http://www.intellinuxwireless.org.\n",
2202 api_max, api_ver);
2203
2204 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2205 IWL_UCODE_MAJOR(priv->ucode_ver),
2206 IWL_UCODE_MINOR(priv->ucode_ver),
2207 IWL_UCODE_API(priv->ucode_ver),
2208 IWL_UCODE_SERIAL(priv->ucode_ver));
2209
2210 snprintf(priv->hw->wiphy->fw_version,
2211 sizeof(priv->hw->wiphy->fw_version),
2212 "%u.%u.%u.%u",
2213 IWL_UCODE_MAJOR(priv->ucode_ver),
2214 IWL_UCODE_MINOR(priv->ucode_ver),
2215 IWL_UCODE_API(priv->ucode_ver),
2216 IWL_UCODE_SERIAL(priv->ucode_ver));
2217
2218 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2219 priv->ucode_ver);
2220 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2221 inst_size);
2222 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2223 data_size);
2224 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2225 init_size);
2226 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2227 init_data_size);
2228 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2229 boot_size);
2230
2231
2232 /* Verify size of file vs. image size info in file's header */
2233 if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
2234 inst_size + data_size + init_size +
2235 init_data_size + boot_size) {
2236
2237 IWL_DEBUG_INFO(priv,
2238 "uCode file size %zd does not match expected size\n",
2239 ucode_raw->size);
2240 ret = -EINVAL;
2241 goto err_release;
2242 }
2243
2244 /* Verify that uCode images will fit in card's SRAM */
2245 if (inst_size > IWL39_MAX_INST_SIZE) {
2246 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2247 inst_size);
2248 ret = -EINVAL;
2249 goto err_release;
2250 }
2251
2252 if (data_size > IWL39_MAX_DATA_SIZE) {
2253 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2254 data_size);
2255 ret = -EINVAL;
2256 goto err_release;
2257 }
2258 if (init_size > IWL39_MAX_INST_SIZE) {
2259 IWL_DEBUG_INFO(priv,
2260 "uCode init instr len %d too large to fit in\n",
2261 init_size);
2262 ret = -EINVAL;
2263 goto err_release;
2264 }
2265 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2266 IWL_DEBUG_INFO(priv,
2267 "uCode init data len %d too large to fit in\n",
2268 init_data_size);
2269 ret = -EINVAL;
2270 goto err_release;
2271 }
2272 if (boot_size > IWL39_MAX_BSM_SIZE) {
2273 IWL_DEBUG_INFO(priv,
2274 "uCode boot instr len %d too large to fit in\n",
2275 boot_size);
2276 ret = -EINVAL;
2277 goto err_release;
2278 }
2279
2280 /* Allocate ucode buffers for card's bus-master loading ... */
2281
2282 /* Runtime instructions and 2 copies of data:
2283 * 1) unmodified from disk
2284 * 2) backup cache for save/restore during power-downs */
2285 priv->ucode_code.len = inst_size;
2286 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2287
2288 priv->ucode_data.len = data_size;
2289 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2290
2291 priv->ucode_data_backup.len = data_size;
2292 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2293
2294 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2295 !priv->ucode_data_backup.v_addr)
2296 goto err_pci_alloc;
2297
2298 /* Initialization instructions and data */
2299 if (init_size && init_data_size) {
2300 priv->ucode_init.len = init_size;
2301 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2302
2303 priv->ucode_init_data.len = init_data_size;
2304 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2305
2306 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2307 goto err_pci_alloc;
2308 }
2309
2310 /* Bootstrap (instructions only, no data) */
2311 if (boot_size) {
2312 priv->ucode_boot.len = boot_size;
2313 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2314
2315 if (!priv->ucode_boot.v_addr)
2316 goto err_pci_alloc;
2317 }
2318
2319 /* Copy images into buffers for card's bus-master reads ... */
2320
2321 /* Runtime instructions (first block of data in file) */
2322 len = inst_size;
2323 IWL_DEBUG_INFO(priv,
2324 "Copying (but not loading) uCode instr len %zd\n", len);
2325 memcpy(priv->ucode_code.v_addr, src, len);
2326 src += len;
2327
2328 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2329 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2330
2331 /* Runtime data (2nd block)
2332 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2333 len = data_size;
2334 IWL_DEBUG_INFO(priv,
2335 "Copying (but not loading) uCode data len %zd\n", len);
2336 memcpy(priv->ucode_data.v_addr, src, len);
2337 memcpy(priv->ucode_data_backup.v_addr, src, len);
2338 src += len;
2339
2340 /* Initialization instructions (3rd block) */
2341 if (init_size) {
2342 len = init_size;
2343 IWL_DEBUG_INFO(priv,
2344 "Copying (but not loading) init instr len %zd\n", len);
2345 memcpy(priv->ucode_init.v_addr, src, len);
2346 src += len;
2347 }
2348
2349 /* Initialization data (4th block) */
2350 if (init_data_size) {
2351 len = init_data_size;
2352 IWL_DEBUG_INFO(priv,
2353 "Copying (but not loading) init data len %zd\n", len);
2354 memcpy(priv->ucode_init_data.v_addr, src, len);
2355 src += len;
2356 }
2357
2358 /* Bootstrap instructions (5th block) */
2359 len = boot_size;
2360 IWL_DEBUG_INFO(priv,
2361 "Copying (but not loading) boot instr len %zd\n", len);
2362 memcpy(priv->ucode_boot.v_addr, src, len);
2363
2364 /* We have our copies now, allow OS release its copies */
2365 release_firmware(ucode_raw);
2366 return 0;
2367
2368 err_pci_alloc:
2369 IWL_ERR(priv, "failed to allocate pci memory\n");
2370 ret = -ENOMEM;
2371 iwl3945_dealloc_ucode_pci(priv);
2372
2373 err_release:
2374 release_firmware(ucode_raw);
2375
2376 error:
2377 return ret;
2378 }
2379
2380
2381 /**
2382 * iwl3945_set_ucode_ptrs - Set uCode address location
2383 *
2384 * Tell initialization uCode where to find runtime uCode.
2385 *
2386 * BSM registers initially contain pointers to initialization uCode.
2387 * We need to replace them to load runtime uCode inst and data,
2388 * and to save runtime data when powering down.
2389 */
2390 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2391 {
2392 dma_addr_t pinst;
2393 dma_addr_t pdata;
2394
2395 /* bits 31:0 for 3945 */
2396 pinst = priv->ucode_code.p_addr;
2397 pdata = priv->ucode_data_backup.p_addr;
2398
2399 /* Tell bootstrap uCode where to find image to load */
2400 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2401 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2402 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2403 priv->ucode_data.len);
2404
2405 /* Inst byte count must be last to set up, bit 31 signals uCode
2406 * that all new ptr/size info is in place */
2407 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2408 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2409
2410 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2411
2412 return 0;
2413 }
2414
2415 /**
2416 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2417 *
2418 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2419 *
2420 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2421 */
2422 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2423 {
2424 /* Check alive response for "valid" sign from uCode */
2425 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2426 /* We had an error bringing up the hardware, so take it
2427 * all the way back down so we can try again */
2428 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2429 goto restart;
2430 }
2431
2432 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2433 * This is a paranoid check, because we would not have gotten the
2434 * "initialize" alive if code weren't properly loaded. */
2435 if (iwl3945_verify_ucode(priv)) {
2436 /* Runtime instruction load was bad;
2437 * take it all the way back down so we can try again */
2438 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2439 goto restart;
2440 }
2441
2442 /* Send pointers to protocol/runtime uCode image ... init code will
2443 * load and launch runtime uCode, which will send us another "Alive"
2444 * notification. */
2445 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2446 if (iwl3945_set_ucode_ptrs(priv)) {
2447 /* Runtime instruction load won't happen;
2448 * take it all the way back down so we can try again */
2449 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2450 goto restart;
2451 }
2452 return;
2453
2454 restart:
2455 queue_work(priv->workqueue, &priv->restart);
2456 }
2457
2458 /**
2459 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2460 * from protocol/runtime uCode (initialization uCode's
2461 * Alive gets handled by iwl3945_init_alive_start()).
2462 */
2463 static void iwl3945_alive_start(struct iwl_priv *priv)
2464 {
2465 int thermal_spin = 0;
2466 u32 rfkill;
2467
2468 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2469
2470 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2471 /* We had an error bringing up the hardware, so take it
2472 * all the way back down so we can try again */
2473 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2474 goto restart;
2475 }
2476
2477 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2478 * This is a paranoid check, because we would not have gotten the
2479 * "runtime" alive if code weren't properly loaded. */
2480 if (iwl3945_verify_ucode(priv)) {
2481 /* Runtime instruction load was bad;
2482 * take it all the way back down so we can try again */
2483 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2484 goto restart;
2485 }
2486
2487 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2488 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2489
2490 if (rfkill & 0x1) {
2491 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2492 /* if RFKILL is not on, then wait for thermal
2493 * sensor in adapter to kick in */
2494 while (iwl3945_hw_get_temperature(priv) == 0) {
2495 thermal_spin++;
2496 udelay(10);
2497 }
2498
2499 if (thermal_spin)
2500 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2501 thermal_spin * 10);
2502 } else
2503 set_bit(STATUS_RF_KILL_HW, &priv->status);
2504
2505 /* After the ALIVE response, we can send commands to 3945 uCode */
2506 set_bit(STATUS_ALIVE, &priv->status);
2507
2508 if (priv->cfg->ops->lib->recover_from_tx_stall) {
2509 /* Enable timer to monitor the driver queues */
2510 mod_timer(&priv->monitor_recover,
2511 jiffies +
2512 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2513 }
2514
2515 if (iwl_is_rfkill(priv))
2516 return;
2517
2518 ieee80211_wake_queues(priv->hw);
2519
2520 priv->active_rate = IWL_RATES_MASK;
2521
2522 iwl_power_update_mode(priv, true);
2523
2524 if (iwl_is_associated(priv)) {
2525 struct iwl3945_rxon_cmd *active_rxon =
2526 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2527
2528 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2529 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2530 } else {
2531 /* Initialize our rx_config data */
2532 iwl_connection_init_rx_config(priv, NULL);
2533 }
2534
2535 /* Configure Bluetooth device coexistence support */
2536 priv->cfg->ops->hcmd->send_bt_config(priv);
2537
2538 /* Configure the adapter for unassociated operation */
2539 iwlcore_commit_rxon(priv);
2540
2541 iwl3945_reg_txpower_periodic(priv);
2542
2543 iwl_leds_init(priv);
2544
2545 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2546 set_bit(STATUS_READY, &priv->status);
2547 wake_up_interruptible(&priv->wait_command_queue);
2548
2549 return;
2550
2551 restart:
2552 queue_work(priv->workqueue, &priv->restart);
2553 }
2554
2555 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2556
2557 static void __iwl3945_down(struct iwl_priv *priv)
2558 {
2559 unsigned long flags;
2560 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2561 struct ieee80211_conf *conf = NULL;
2562
2563 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2564
2565 conf = ieee80211_get_hw_conf(priv->hw);
2566
2567 if (!exit_pending)
2568 set_bit(STATUS_EXIT_PENDING, &priv->status);
2569
2570 /* Station information will now be cleared in device */
2571 iwl_clear_ucode_stations(priv);
2572 iwl_dealloc_bcast_station(priv);
2573 iwl_clear_driver_stations(priv);
2574
2575 /* Unblock any waiting calls */
2576 wake_up_interruptible_all(&priv->wait_command_queue);
2577
2578 /* Wipe out the EXIT_PENDING status bit if we are not actually
2579 * exiting the module */
2580 if (!exit_pending)
2581 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2582
2583 /* stop and reset the on-board processor */
2584 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2585
2586 /* tell the device to stop sending interrupts */
2587 spin_lock_irqsave(&priv->lock, flags);
2588 iwl_disable_interrupts(priv);
2589 spin_unlock_irqrestore(&priv->lock, flags);
2590 iwl_synchronize_irq(priv);
2591
2592 if (priv->mac80211_registered)
2593 ieee80211_stop_queues(priv->hw);
2594
2595 /* If we have not previously called iwl3945_init() then
2596 * clear all bits but the RF Kill bits and return */
2597 if (!iwl_is_init(priv)) {
2598 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2599 STATUS_RF_KILL_HW |
2600 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2601 STATUS_GEO_CONFIGURED |
2602 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2603 STATUS_EXIT_PENDING;
2604 goto exit;
2605 }
2606
2607 /* ...otherwise clear out all the status bits but the RF Kill
2608 * bit and continue taking the NIC down. */
2609 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2610 STATUS_RF_KILL_HW |
2611 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2612 STATUS_GEO_CONFIGURED |
2613 test_bit(STATUS_FW_ERROR, &priv->status) <<
2614 STATUS_FW_ERROR |
2615 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2616 STATUS_EXIT_PENDING;
2617
2618 iwl3945_hw_txq_ctx_stop(priv);
2619 iwl3945_hw_rxq_stop(priv);
2620
2621 /* Power-down device's busmaster DMA clocks */
2622 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2623 udelay(5);
2624
2625 /* Stop the device, and put it in low power state */
2626 priv->cfg->ops->lib->apm_ops.stop(priv);
2627
2628 exit:
2629 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2630
2631 if (priv->ibss_beacon)
2632 dev_kfree_skb(priv->ibss_beacon);
2633 priv->ibss_beacon = NULL;
2634
2635 /* clear out any free frames */
2636 iwl3945_clear_free_frames(priv);
2637 }
2638
2639 static void iwl3945_down(struct iwl_priv *priv)
2640 {
2641 mutex_lock(&priv->mutex);
2642 __iwl3945_down(priv);
2643 mutex_unlock(&priv->mutex);
2644
2645 iwl3945_cancel_deferred_work(priv);
2646 }
2647
2648 #define MAX_HW_RESTARTS 5
2649
2650 static int __iwl3945_up(struct iwl_priv *priv)
2651 {
2652 int rc, i;
2653
2654 rc = iwl_alloc_bcast_station(priv, false);
2655 if (rc)
2656 return rc;
2657
2658 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2659 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2660 return -EIO;
2661 }
2662
2663 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2664 IWL_ERR(priv, "ucode not available for device bring up\n");
2665 return -EIO;
2666 }
2667
2668 /* If platform's RF_KILL switch is NOT set to KILL */
2669 if (iwl_read32(priv, CSR_GP_CNTRL) &
2670 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2671 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2672 else {
2673 set_bit(STATUS_RF_KILL_HW, &priv->status);
2674 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2675 return -ENODEV;
2676 }
2677
2678 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2679
2680 rc = iwl3945_hw_nic_init(priv);
2681 if (rc) {
2682 IWL_ERR(priv, "Unable to int nic\n");
2683 return rc;
2684 }
2685
2686 /* make sure rfkill handshake bits are cleared */
2687 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2688 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2689 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2690
2691 /* clear (again), then enable host interrupts */
2692 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2693 iwl_enable_interrupts(priv);
2694
2695 /* really make sure rfkill handshake bits are cleared */
2696 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2697 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2698
2699 /* Copy original ucode data image from disk into backup cache.
2700 * This will be used to initialize the on-board processor's
2701 * data SRAM for a clean start when the runtime program first loads. */
2702 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2703 priv->ucode_data.len);
2704
2705 /* We return success when we resume from suspend and rf_kill is on. */
2706 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2707 return 0;
2708
2709 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2710
2711 /* load bootstrap state machine,
2712 * load bootstrap program into processor's memory,
2713 * prepare to load the "initialize" uCode */
2714 rc = priv->cfg->ops->lib->load_ucode(priv);
2715
2716 if (rc) {
2717 IWL_ERR(priv,
2718 "Unable to set up bootstrap uCode: %d\n", rc);
2719 continue;
2720 }
2721
2722 /* start card; "initialize" will load runtime ucode */
2723 iwl3945_nic_start(priv);
2724
2725 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2726
2727 return 0;
2728 }
2729
2730 set_bit(STATUS_EXIT_PENDING, &priv->status);
2731 __iwl3945_down(priv);
2732 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2733
2734 /* tried to restart and config the device for as long as our
2735 * patience could withstand */
2736 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2737 return -EIO;
2738 }
2739
2740
2741 /*****************************************************************************
2742 *
2743 * Workqueue callbacks
2744 *
2745 *****************************************************************************/
2746
2747 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2748 {
2749 struct iwl_priv *priv =
2750 container_of(data, struct iwl_priv, init_alive_start.work);
2751
2752 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2753 return;
2754
2755 mutex_lock(&priv->mutex);
2756 iwl3945_init_alive_start(priv);
2757 mutex_unlock(&priv->mutex);
2758 }
2759
2760 static void iwl3945_bg_alive_start(struct work_struct *data)
2761 {
2762 struct iwl_priv *priv =
2763 container_of(data, struct iwl_priv, alive_start.work);
2764
2765 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2766 return;
2767
2768 mutex_lock(&priv->mutex);
2769 iwl3945_alive_start(priv);
2770 mutex_unlock(&priv->mutex);
2771 }
2772
2773 /*
2774 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2775 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2776 * *is* readable even when device has been SW_RESET into low power mode
2777 * (e.g. during RF KILL).
2778 */
2779 static void iwl3945_rfkill_poll(struct work_struct *data)
2780 {
2781 struct iwl_priv *priv =
2782 container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
2783 bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2784 bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2785 & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2786
2787 if (new_rfkill != old_rfkill) {
2788 if (new_rfkill)
2789 set_bit(STATUS_RF_KILL_HW, &priv->status);
2790 else
2791 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2792
2793 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2794
2795 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2796 new_rfkill ? "disable radio" : "enable radio");
2797 }
2798
2799 /* Keep this running, even if radio now enabled. This will be
2800 * cancelled in mac_start() if system decides to start again */
2801 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2802 round_jiffies_relative(2 * HZ));
2803
2804 }
2805
2806 void iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
2807 {
2808 struct iwl_host_cmd cmd = {
2809 .id = REPLY_SCAN_CMD,
2810 .len = sizeof(struct iwl3945_scan_cmd),
2811 .flags = CMD_SIZE_HUGE,
2812 };
2813 struct iwl3945_scan_cmd *scan;
2814 struct ieee80211_conf *conf = NULL;
2815 u8 n_probes = 0;
2816 enum ieee80211_band band;
2817 bool is_active = false;
2818
2819 conf = ieee80211_get_hw_conf(priv->hw);
2820
2821 cancel_delayed_work(&priv->scan_check);
2822
2823 if (!iwl_is_ready(priv)) {
2824 IWL_WARN(priv, "request scan called when driver not ready.\n");
2825 goto done;
2826 }
2827
2828 /* Make sure the scan wasn't canceled before this queued work
2829 * was given the chance to run... */
2830 if (!test_bit(STATUS_SCANNING, &priv->status))
2831 goto done;
2832
2833 /* This should never be called or scheduled if there is currently
2834 * a scan active in the hardware. */
2835 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2836 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2837 "Ignoring second request.\n");
2838 goto done;
2839 }
2840
2841 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2842 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2843 goto done;
2844 }
2845
2846 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2847 IWL_DEBUG_HC(priv,
2848 "Scan request while abort pending. Queuing.\n");
2849 goto done;
2850 }
2851
2852 if (iwl_is_rfkill(priv)) {
2853 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2854 goto done;
2855 }
2856
2857 if (!test_bit(STATUS_READY, &priv->status)) {
2858 IWL_DEBUG_HC(priv,
2859 "Scan request while uninitialized. Queuing.\n");
2860 goto done;
2861 }
2862
2863 if (!priv->scan_cmd) {
2864 priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2865 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2866 if (!priv->scan_cmd) {
2867 IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
2868 goto done;
2869 }
2870 }
2871 scan = priv->scan_cmd;
2872 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2873
2874 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2875 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2876
2877 if (iwl_is_associated(priv)) {
2878 u16 interval = 0;
2879 u32 extra;
2880 u32 suspend_time = 100;
2881 u32 scan_suspend_time = 100;
2882 unsigned long flags;
2883
2884 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2885
2886 spin_lock_irqsave(&priv->lock, flags);
2887 if (priv->is_internal_short_scan)
2888 interval = 0;
2889 else
2890 interval = vif->bss_conf.beacon_int;
2891 spin_unlock_irqrestore(&priv->lock, flags);
2892
2893 scan->suspend_time = 0;
2894 scan->max_out_time = cpu_to_le32(200 * 1024);
2895 if (!interval)
2896 interval = suspend_time;
2897 /*
2898 * suspend time format:
2899 * 0-19: beacon interval in usec (time before exec.)
2900 * 20-23: 0
2901 * 24-31: number of beacons (suspend between channels)
2902 */
2903
2904 extra = (suspend_time / interval) << 24;
2905 scan_suspend_time = 0xFF0FFFFF &
2906 (extra | ((suspend_time % interval) * 1024));
2907
2908 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2909 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2910 scan_suspend_time, interval);
2911 }
2912
2913 if (priv->is_internal_short_scan) {
2914 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
2915 } else if (priv->scan_request->n_ssids) {
2916 int i, p = 0;
2917 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2918 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2919 /* always does wildcard anyway */
2920 if (!priv->scan_request->ssids[i].ssid_len)
2921 continue;
2922 scan->direct_scan[p].id = WLAN_EID_SSID;
2923 scan->direct_scan[p].len =
2924 priv->scan_request->ssids[i].ssid_len;
2925 memcpy(scan->direct_scan[p].ssid,
2926 priv->scan_request->ssids[i].ssid,
2927 priv->scan_request->ssids[i].ssid_len);
2928 n_probes++;
2929 p++;
2930 }
2931 is_active = true;
2932 } else
2933 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2934
2935 /* We don't build a direct scan probe request; the uCode will do
2936 * that based on the direct_mask added to each channel entry */
2937 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2938 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
2939 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2940
2941 /* flags + rate selection */
2942
2943 switch (priv->scan_band) {
2944 case IEEE80211_BAND_2GHZ:
2945 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2946 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2947 scan->good_CRC_th = 0;
2948 band = IEEE80211_BAND_2GHZ;
2949 break;
2950 case IEEE80211_BAND_5GHZ:
2951 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2952 /*
2953 * If active scaning is requested but a certain channel
2954 * is marked passive, we can do active scanning if we
2955 * detect transmissions.
2956 */
2957 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
2958 IWL_GOOD_CRC_TH_DISABLED;
2959 band = IEEE80211_BAND_5GHZ;
2960 break;
2961 default:
2962 IWL_WARN(priv, "Invalid scan band\n");
2963 goto done;
2964 }
2965
2966 if (!priv->is_internal_short_scan) {
2967 scan->tx_cmd.len = cpu_to_le16(
2968 iwl_fill_probe_req(priv,
2969 (struct ieee80211_mgmt *)scan->data,
2970 vif->addr,
2971 priv->scan_request->ie,
2972 priv->scan_request->ie_len,
2973 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2974 } else {
2975 /* use bcast addr, will not be transmitted but must be valid */
2976 scan->tx_cmd.len = cpu_to_le16(
2977 iwl_fill_probe_req(priv,
2978 (struct ieee80211_mgmt *)scan->data,
2979 iwl_bcast_addr, NULL, 0,
2980 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2981 }
2982 /* select Rx antennas */
2983 scan->flags |= iwl3945_get_antenna_flags(priv);
2984
2985 if (priv->is_internal_short_scan) {
2986 scan->channel_count =
2987 iwl3945_get_single_channel_for_scan(priv, vif, band,
2988 (void *)&scan->data[le16_to_cpu(
2989 scan->tx_cmd.len)]);
2990 } else {
2991 scan->channel_count =
2992 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2993 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
2994 }
2995
2996 if (scan->channel_count == 0) {
2997 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2998 goto done;
2999 }
3000
3001 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
3002 scan->channel_count * sizeof(struct iwl3945_scan_channel);
3003 cmd.data = scan;
3004 scan->len = cpu_to_le16(cmd.len);
3005
3006 set_bit(STATUS_SCAN_HW, &priv->status);
3007 if (iwl_send_cmd_sync(priv, &cmd))
3008 goto done;
3009
3010 queue_delayed_work(priv->workqueue, &priv->scan_check,
3011 IWL_SCAN_CHECK_WATCHDOG);
3012
3013 return;
3014
3015 done:
3016 /* can not perform scan make sure we clear scanning
3017 * bits from status so next scan request can be performed.
3018 * if we dont clear scanning status bit here all next scan
3019 * will fail
3020 */
3021 clear_bit(STATUS_SCAN_HW, &priv->status);
3022 clear_bit(STATUS_SCANNING, &priv->status);
3023
3024 /* inform mac80211 scan aborted */
3025 queue_work(priv->workqueue, &priv->scan_completed);
3026 }
3027
3028 static void iwl3945_bg_restart(struct work_struct *data)
3029 {
3030 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3031
3032 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3033 return;
3034
3035 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3036 mutex_lock(&priv->mutex);
3037 priv->vif = NULL;
3038 priv->is_open = 0;
3039 mutex_unlock(&priv->mutex);
3040 iwl3945_down(priv);
3041 ieee80211_restart_hw(priv->hw);
3042 } else {
3043 iwl3945_down(priv);
3044
3045 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3046 return;
3047
3048 mutex_lock(&priv->mutex);
3049 __iwl3945_up(priv);
3050 mutex_unlock(&priv->mutex);
3051 }
3052 }
3053
3054 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3055 {
3056 struct iwl_priv *priv =
3057 container_of(data, struct iwl_priv, rx_replenish);
3058
3059 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3060 return;
3061
3062 mutex_lock(&priv->mutex);
3063 iwl3945_rx_replenish(priv);
3064 mutex_unlock(&priv->mutex);
3065 }
3066
3067 void iwl3945_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3068 {
3069 int rc = 0;
3070 struct ieee80211_conf *conf = NULL;
3071
3072 if (!vif || !priv->is_open)
3073 return;
3074
3075 if (vif->type == NL80211_IFTYPE_AP) {
3076 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3077 return;
3078 }
3079
3080 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3081 vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3082
3083 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3084 return;
3085
3086 iwl_scan_cancel_timeout(priv, 200);
3087
3088 conf = ieee80211_get_hw_conf(priv->hw);
3089
3090 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3091 iwlcore_commit_rxon(priv);
3092
3093 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3094 iwl_setup_rxon_timing(priv, vif);
3095 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3096 sizeof(priv->rxon_timing), &priv->rxon_timing);
3097 if (rc)
3098 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3099 "Attempting to continue.\n");
3100
3101 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3102
3103 priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3104
3105 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3106 vif->bss_conf.aid, vif->bss_conf.beacon_int);
3107
3108 if (vif->bss_conf.use_short_preamble)
3109 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3110 else
3111 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3112
3113 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3114 if (vif->bss_conf.use_short_slot)
3115 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3116 else
3117 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3118 }
3119
3120 iwlcore_commit_rxon(priv);
3121
3122 switch (vif->type) {
3123 case NL80211_IFTYPE_STATION:
3124 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3125 break;
3126 case NL80211_IFTYPE_ADHOC:
3127 iwl3945_send_beacon_cmd(priv);
3128 break;
3129 default:
3130 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3131 __func__, vif->type);
3132 break;
3133 }
3134 }
3135
3136 /*****************************************************************************
3137 *
3138 * mac80211 entry point functions
3139 *
3140 *****************************************************************************/
3141
3142 #define UCODE_READY_TIMEOUT (2 * HZ)
3143
3144 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3145 {
3146 struct iwl_priv *priv = hw->priv;
3147 int ret;
3148
3149 IWL_DEBUG_MAC80211(priv, "enter\n");
3150
3151 /* we should be verifying the device is ready to be opened */
3152 mutex_lock(&priv->mutex);
3153
3154 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3155 * ucode filename and max sizes are card-specific. */
3156
3157 if (!priv->ucode_code.len) {
3158 ret = iwl3945_read_ucode(priv);
3159 if (ret) {
3160 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3161 mutex_unlock(&priv->mutex);
3162 goto out_release_irq;
3163 }
3164 }
3165
3166 ret = __iwl3945_up(priv);
3167
3168 mutex_unlock(&priv->mutex);
3169
3170 if (ret)
3171 goto out_release_irq;
3172
3173 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3174
3175 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3176 * mac80211 will not be run successfully. */
3177 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3178 test_bit(STATUS_READY, &priv->status),
3179 UCODE_READY_TIMEOUT);
3180 if (!ret) {
3181 if (!test_bit(STATUS_READY, &priv->status)) {
3182 IWL_ERR(priv,
3183 "Wait for START_ALIVE timeout after %dms.\n",
3184 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3185 ret = -ETIMEDOUT;
3186 goto out_release_irq;
3187 }
3188 }
3189
3190 /* ucode is running and will send rfkill notifications,
3191 * no need to poll the killswitch state anymore */
3192 cancel_delayed_work(&priv->_3945.rfkill_poll);
3193
3194 iwl_led_start(priv);
3195
3196 priv->is_open = 1;
3197 IWL_DEBUG_MAC80211(priv, "leave\n");
3198 return 0;
3199
3200 out_release_irq:
3201 priv->is_open = 0;
3202 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3203 return ret;
3204 }
3205
3206 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3207 {
3208 struct iwl_priv *priv = hw->priv;
3209
3210 IWL_DEBUG_MAC80211(priv, "enter\n");
3211
3212 if (!priv->is_open) {
3213 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3214 return;
3215 }
3216
3217 priv->is_open = 0;
3218
3219 if (iwl_is_ready_rf(priv)) {
3220 /* stop mac, cancel any scan request and clear
3221 * RXON_FILTER_ASSOC_MSK BIT
3222 */
3223 mutex_lock(&priv->mutex);
3224 iwl_scan_cancel_timeout(priv, 100);
3225 mutex_unlock(&priv->mutex);
3226 }
3227
3228 iwl3945_down(priv);
3229
3230 flush_workqueue(priv->workqueue);
3231
3232 /* start polling the killswitch state again */
3233 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
3234 round_jiffies_relative(2 * HZ));
3235
3236 IWL_DEBUG_MAC80211(priv, "leave\n");
3237 }
3238
3239 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3240 {
3241 struct iwl_priv *priv = hw->priv;
3242
3243 IWL_DEBUG_MAC80211(priv, "enter\n");
3244
3245 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3246 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3247
3248 if (iwl3945_tx_skb(priv, skb))
3249 dev_kfree_skb_any(skb);
3250
3251 IWL_DEBUG_MAC80211(priv, "leave\n");
3252 return NETDEV_TX_OK;
3253 }
3254
3255 void iwl3945_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3256 {
3257 int rc = 0;
3258
3259 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3260 return;
3261
3262 /* The following should be done only at AP bring up */
3263 if (!(iwl_is_associated(priv))) {
3264
3265 /* RXON - unassoc (to set timing command) */
3266 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3267 iwlcore_commit_rxon(priv);
3268
3269 /* RXON Timing */
3270 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3271 iwl_setup_rxon_timing(priv, vif);
3272 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3273 sizeof(priv->rxon_timing),
3274 &priv->rxon_timing);
3275 if (rc)
3276 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3277 "Attempting to continue.\n");
3278
3279 priv->staging_rxon.assoc_id = 0;
3280
3281 if (vif->bss_conf.use_short_preamble)
3282 priv->staging_rxon.flags |=
3283 RXON_FLG_SHORT_PREAMBLE_MSK;
3284 else
3285 priv->staging_rxon.flags &=
3286 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3287
3288 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3289 if (vif->bss_conf.use_short_slot)
3290 priv->staging_rxon.flags |=
3291 RXON_FLG_SHORT_SLOT_MSK;
3292 else
3293 priv->staging_rxon.flags &=
3294 ~RXON_FLG_SHORT_SLOT_MSK;
3295 }
3296 /* restore RXON assoc */
3297 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3298 iwlcore_commit_rxon(priv);
3299 }
3300 iwl3945_send_beacon_cmd(priv);
3301
3302 /* FIXME - we need to add code here to detect a totally new
3303 * configuration, reset the AP, unassoc, rxon timing, assoc,
3304 * clear sta table, add BCAST sta... */
3305 }
3306
3307 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3308 struct ieee80211_vif *vif,
3309 struct ieee80211_sta *sta,
3310 struct ieee80211_key_conf *key)
3311 {
3312 struct iwl_priv *priv = hw->priv;
3313 int ret = 0;
3314 u8 sta_id = IWL_INVALID_STATION;
3315 u8 static_key;
3316
3317 IWL_DEBUG_MAC80211(priv, "enter\n");
3318
3319 if (iwl3945_mod_params.sw_crypto) {
3320 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3321 return -EOPNOTSUPP;
3322 }
3323
3324 static_key = !iwl_is_associated(priv);
3325
3326 if (!static_key) {
3327 sta_id = iwl_sta_id_or_broadcast(priv, sta);
3328 if (sta_id == IWL_INVALID_STATION)
3329 return -EINVAL;
3330 }
3331
3332 mutex_lock(&priv->mutex);
3333 iwl_scan_cancel_timeout(priv, 100);
3334
3335 switch (cmd) {
3336 case SET_KEY:
3337 if (static_key)
3338 ret = iwl3945_set_static_key(priv, key);
3339 else
3340 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3341 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3342 break;
3343 case DISABLE_KEY:
3344 if (static_key)
3345 ret = iwl3945_remove_static_key(priv);
3346 else
3347 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3348 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3349 break;
3350 default:
3351 ret = -EINVAL;
3352 }
3353
3354 mutex_unlock(&priv->mutex);
3355 IWL_DEBUG_MAC80211(priv, "leave\n");
3356
3357 return ret;
3358 }
3359
3360 static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
3361 struct ieee80211_vif *vif,
3362 struct ieee80211_sta *sta)
3363 {
3364 struct iwl_priv *priv = hw->priv;
3365 struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv;
3366 int ret;
3367 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3368 u8 sta_id;
3369
3370 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3371 sta->addr);
3372 mutex_lock(&priv->mutex);
3373 IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3374 sta->addr);
3375 sta_priv->common.sta_id = IWL_INVALID_STATION;
3376
3377
3378 ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3379 &sta_id);
3380 if (ret) {
3381 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3382 sta->addr, ret);
3383 /* Should we return success if return code is EEXIST ? */
3384 mutex_unlock(&priv->mutex);
3385 return ret;
3386 }
3387
3388 sta_priv->common.sta_id = sta_id;
3389
3390 /* Initialize rate scaling */
3391 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3392 sta->addr);
3393 iwl3945_rs_rate_init(priv, sta, sta_id);
3394 mutex_unlock(&priv->mutex);
3395
3396 return 0;
3397 }
3398 /*****************************************************************************
3399 *
3400 * sysfs attributes
3401 *
3402 *****************************************************************************/
3403
3404 #ifdef CONFIG_IWLWIFI_DEBUG
3405
3406 /*
3407 * The following adds a new attribute to the sysfs representation
3408 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3409 * used for controlling the debug level.
3410 *
3411 * See the level definitions in iwl for details.
3412 *
3413 * The debug_level being managed using sysfs below is a per device debug
3414 * level that is used instead of the global debug level if it (the per
3415 * device debug level) is set.
3416 */
3417 static ssize_t show_debug_level(struct device *d,
3418 struct device_attribute *attr, char *buf)
3419 {
3420 struct iwl_priv *priv = dev_get_drvdata(d);
3421 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3422 }
3423 static ssize_t store_debug_level(struct device *d,
3424 struct device_attribute *attr,
3425 const char *buf, size_t count)
3426 {
3427 struct iwl_priv *priv = dev_get_drvdata(d);
3428 unsigned long val;
3429 int ret;
3430
3431 ret = strict_strtoul(buf, 0, &val);
3432 if (ret)
3433 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3434 else {
3435 priv->debug_level = val;
3436 if (iwl_alloc_traffic_mem(priv))
3437 IWL_ERR(priv,
3438 "Not enough memory to generate traffic log\n");
3439 }
3440 return strnlen(buf, count);
3441 }
3442
3443 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3444 show_debug_level, store_debug_level);
3445
3446 #endif /* CONFIG_IWLWIFI_DEBUG */
3447
3448 static ssize_t show_temperature(struct device *d,
3449 struct device_attribute *attr, char *buf)
3450 {
3451 struct iwl_priv *priv = dev_get_drvdata(d);
3452
3453 if (!iwl_is_alive(priv))
3454 return -EAGAIN;
3455
3456 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3457 }
3458
3459 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3460
3461 static ssize_t show_tx_power(struct device *d,
3462 struct device_attribute *attr, char *buf)
3463 {
3464 struct iwl_priv *priv = dev_get_drvdata(d);
3465 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3466 }
3467
3468 static ssize_t store_tx_power(struct device *d,
3469 struct device_attribute *attr,
3470 const char *buf, size_t count)
3471 {
3472 struct iwl_priv *priv = dev_get_drvdata(d);
3473 char *p = (char *)buf;
3474 u32 val;
3475
3476 val = simple_strtoul(p, &p, 10);
3477 if (p == buf)
3478 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3479 else
3480 iwl3945_hw_reg_set_txpower(priv, val);
3481
3482 return count;
3483 }
3484
3485 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3486
3487 static ssize_t show_flags(struct device *d,
3488 struct device_attribute *attr, char *buf)
3489 {
3490 struct iwl_priv *priv = dev_get_drvdata(d);
3491
3492 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3493 }
3494
3495 static ssize_t store_flags(struct device *d,
3496 struct device_attribute *attr,
3497 const char *buf, size_t count)
3498 {
3499 struct iwl_priv *priv = dev_get_drvdata(d);
3500 u32 flags = simple_strtoul(buf, NULL, 0);
3501
3502 mutex_lock(&priv->mutex);
3503 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3504 /* Cancel any currently running scans... */
3505 if (iwl_scan_cancel_timeout(priv, 100))
3506 IWL_WARN(priv, "Could not cancel scan.\n");
3507 else {
3508 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3509 flags);
3510 priv->staging_rxon.flags = cpu_to_le32(flags);
3511 iwlcore_commit_rxon(priv);
3512 }
3513 }
3514 mutex_unlock(&priv->mutex);
3515
3516 return count;
3517 }
3518
3519 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3520
3521 static ssize_t show_filter_flags(struct device *d,
3522 struct device_attribute *attr, char *buf)
3523 {
3524 struct iwl_priv *priv = dev_get_drvdata(d);
3525
3526 return sprintf(buf, "0x%04X\n",
3527 le32_to_cpu(priv->active_rxon.filter_flags));
3528 }
3529
3530 static ssize_t store_filter_flags(struct device *d,
3531 struct device_attribute *attr,
3532 const char *buf, size_t count)
3533 {
3534 struct iwl_priv *priv = dev_get_drvdata(d);
3535 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3536
3537 mutex_lock(&priv->mutex);
3538 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3539 /* Cancel any currently running scans... */
3540 if (iwl_scan_cancel_timeout(priv, 100))
3541 IWL_WARN(priv, "Could not cancel scan.\n");
3542 else {
3543 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3544 "0x%04X\n", filter_flags);
3545 priv->staging_rxon.filter_flags =
3546 cpu_to_le32(filter_flags);
3547 iwlcore_commit_rxon(priv);
3548 }
3549 }
3550 mutex_unlock(&priv->mutex);
3551
3552 return count;
3553 }
3554
3555 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3556 store_filter_flags);
3557
3558 static ssize_t show_measurement(struct device *d,
3559 struct device_attribute *attr, char *buf)
3560 {
3561 struct iwl_priv *priv = dev_get_drvdata(d);
3562 struct iwl_spectrum_notification measure_report;
3563 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3564 u8 *data = (u8 *)&measure_report;
3565 unsigned long flags;
3566
3567 spin_lock_irqsave(&priv->lock, flags);
3568 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3569 spin_unlock_irqrestore(&priv->lock, flags);
3570 return 0;
3571 }
3572 memcpy(&measure_report, &priv->measure_report, size);
3573 priv->measurement_status = 0;
3574 spin_unlock_irqrestore(&priv->lock, flags);
3575
3576 while (size && (PAGE_SIZE - len)) {
3577 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3578 PAGE_SIZE - len, 1);
3579 len = strlen(buf);
3580 if (PAGE_SIZE - len)
3581 buf[len++] = '\n';
3582
3583 ofs += 16;
3584 size -= min(size, 16U);
3585 }
3586
3587 return len;
3588 }
3589
3590 static ssize_t store_measurement(struct device *d,
3591 struct device_attribute *attr,
3592 const char *buf, size_t count)
3593 {
3594 struct iwl_priv *priv = dev_get_drvdata(d);
3595 struct ieee80211_measurement_params params = {
3596 .channel = le16_to_cpu(priv->active_rxon.channel),
3597 .start_time = cpu_to_le64(priv->_3945.last_tsf),
3598 .duration = cpu_to_le16(1),
3599 };
3600 u8 type = IWL_MEASURE_BASIC;
3601 u8 buffer[32];
3602 u8 channel;
3603
3604 if (count) {
3605 char *p = buffer;
3606 strncpy(buffer, buf, min(sizeof(buffer), count));
3607 channel = simple_strtoul(p, NULL, 0);
3608 if (channel)
3609 params.channel = channel;
3610
3611 p = buffer;
3612 while (*p && *p != ' ')
3613 p++;
3614 if (*p)
3615 type = simple_strtoul(p + 1, NULL, 0);
3616 }
3617
3618 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3619 "channel %d (for '%s')\n", type, params.channel, buf);
3620 iwl3945_get_measurement(priv, &params, type);
3621
3622 return count;
3623 }
3624
3625 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3626 show_measurement, store_measurement);
3627
3628 static ssize_t store_retry_rate(struct device *d,
3629 struct device_attribute *attr,
3630 const char *buf, size_t count)
3631 {
3632 struct iwl_priv *priv = dev_get_drvdata(d);
3633
3634 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3635 if (priv->retry_rate <= 0)
3636 priv->retry_rate = 1;
3637
3638 return count;
3639 }
3640
3641 static ssize_t show_retry_rate(struct device *d,
3642 struct device_attribute *attr, char *buf)
3643 {
3644 struct iwl_priv *priv = dev_get_drvdata(d);
3645 return sprintf(buf, "%d", priv->retry_rate);
3646 }
3647
3648 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3649 store_retry_rate);
3650
3651
3652 static ssize_t show_channels(struct device *d,
3653 struct device_attribute *attr, char *buf)
3654 {
3655 /* all this shit doesn't belong into sysfs anyway */
3656 return 0;
3657 }
3658
3659 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3660
3661 static ssize_t show_antenna(struct device *d,
3662 struct device_attribute *attr, char *buf)
3663 {
3664 struct iwl_priv *priv = dev_get_drvdata(d);
3665
3666 if (!iwl_is_alive(priv))
3667 return -EAGAIN;
3668
3669 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3670 }
3671
3672 static ssize_t store_antenna(struct device *d,
3673 struct device_attribute *attr,
3674 const char *buf, size_t count)
3675 {
3676 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3677 int ant;
3678
3679 if (count == 0)
3680 return 0;
3681
3682 if (sscanf(buf, "%1i", &ant) != 1) {
3683 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3684 return count;
3685 }
3686
3687 if ((ant >= 0) && (ant <= 2)) {
3688 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3689 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3690 } else
3691 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3692
3693
3694 return count;
3695 }
3696
3697 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3698
3699 static ssize_t show_status(struct device *d,
3700 struct device_attribute *attr, char *buf)
3701 {
3702 struct iwl_priv *priv = dev_get_drvdata(d);
3703 if (!iwl_is_alive(priv))
3704 return -EAGAIN;
3705 return sprintf(buf, "0x%08x\n", (int)priv->status);
3706 }
3707
3708 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3709
3710 static ssize_t dump_error_log(struct device *d,
3711 struct device_attribute *attr,
3712 const char *buf, size_t count)
3713 {
3714 struct iwl_priv *priv = dev_get_drvdata(d);
3715 char *p = (char *)buf;
3716
3717 if (p[0] == '1')
3718 iwl3945_dump_nic_error_log(priv);
3719
3720 return strnlen(buf, count);
3721 }
3722
3723 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3724
3725 /*****************************************************************************
3726 *
3727 * driver setup and tear down
3728 *
3729 *****************************************************************************/
3730
3731 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3732 {
3733 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3734
3735 init_waitqueue_head(&priv->wait_command_queue);
3736
3737 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3738 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3739 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
3740 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3741 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3742 INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
3743 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3744 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3745 INIT_WORK(&priv->start_internal_scan, iwl_bg_start_internal_scan);
3746 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
3747
3748 iwl3945_hw_setup_deferred_work(priv);
3749
3750 if (priv->cfg->ops->lib->recover_from_tx_stall) {
3751 init_timer(&priv->monitor_recover);
3752 priv->monitor_recover.data = (unsigned long)priv;
3753 priv->monitor_recover.function =
3754 priv->cfg->ops->lib->recover_from_tx_stall;
3755 }
3756
3757 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3758 iwl3945_irq_tasklet, (unsigned long)priv);
3759 }
3760
3761 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3762 {
3763 iwl3945_hw_cancel_deferred_work(priv);
3764
3765 cancel_delayed_work_sync(&priv->init_alive_start);
3766 cancel_delayed_work(&priv->scan_check);
3767 cancel_delayed_work(&priv->alive_start);
3768 cancel_work_sync(&priv->start_internal_scan);
3769 cancel_work_sync(&priv->beacon_update);
3770 if (priv->cfg->ops->lib->recover_from_tx_stall)
3771 del_timer_sync(&priv->monitor_recover);
3772 }
3773
3774 static struct attribute *iwl3945_sysfs_entries[] = {
3775 &dev_attr_antenna.attr,
3776 &dev_attr_channels.attr,
3777 &dev_attr_dump_errors.attr,
3778 &dev_attr_flags.attr,
3779 &dev_attr_filter_flags.attr,
3780 &dev_attr_measurement.attr,
3781 &dev_attr_retry_rate.attr,
3782 &dev_attr_status.attr,
3783 &dev_attr_temperature.attr,
3784 &dev_attr_tx_power.attr,
3785 #ifdef CONFIG_IWLWIFI_DEBUG
3786 &dev_attr_debug_level.attr,
3787 #endif
3788 NULL
3789 };
3790
3791 static struct attribute_group iwl3945_attribute_group = {
3792 .name = NULL, /* put in device directory */
3793 .attrs = iwl3945_sysfs_entries,
3794 };
3795
3796 static struct ieee80211_ops iwl3945_hw_ops = {
3797 .tx = iwl3945_mac_tx,
3798 .start = iwl3945_mac_start,
3799 .stop = iwl3945_mac_stop,
3800 .add_interface = iwl_mac_add_interface,
3801 .remove_interface = iwl_mac_remove_interface,
3802 .config = iwl_mac_config,
3803 .configure_filter = iwl_configure_filter,
3804 .set_key = iwl3945_mac_set_key,
3805 .conf_tx = iwl_mac_conf_tx,
3806 .reset_tsf = iwl_mac_reset_tsf,
3807 .bss_info_changed = iwl_bss_info_changed,
3808 .hw_scan = iwl_mac_hw_scan,
3809 .sta_add = iwl3945_mac_sta_add,
3810 .sta_remove = iwl_mac_sta_remove,
3811 };
3812
3813 static int iwl3945_init_drv(struct iwl_priv *priv)
3814 {
3815 int ret;
3816 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3817
3818 priv->retry_rate = 1;
3819 priv->ibss_beacon = NULL;
3820
3821 spin_lock_init(&priv->sta_lock);
3822 spin_lock_init(&priv->hcmd_lock);
3823
3824 INIT_LIST_HEAD(&priv->free_frames);
3825
3826 mutex_init(&priv->mutex);
3827 mutex_init(&priv->sync_cmd_mutex);
3828
3829 priv->ieee_channels = NULL;
3830 priv->ieee_rates = NULL;
3831 priv->band = IEEE80211_BAND_2GHZ;
3832
3833 priv->iw_mode = NL80211_IFTYPE_STATION;
3834 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3835
3836 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
3837
3838 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3839 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3840 eeprom->version);
3841 ret = -EINVAL;
3842 goto err;
3843 }
3844 ret = iwl_init_channel_map(priv);
3845 if (ret) {
3846 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3847 goto err;
3848 }
3849
3850 /* Set up txpower settings in driver for all channels */
3851 if (iwl3945_txpower_set_from_eeprom(priv)) {
3852 ret = -EIO;
3853 goto err_free_channel_map;
3854 }
3855
3856 ret = iwlcore_init_geos(priv);
3857 if (ret) {
3858 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3859 goto err_free_channel_map;
3860 }
3861 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3862
3863 return 0;
3864
3865 err_free_channel_map:
3866 iwl_free_channel_map(priv);
3867 err:
3868 return ret;
3869 }
3870
3871 #define IWL3945_MAX_PROBE_REQUEST 200
3872
3873 static int iwl3945_setup_mac(struct iwl_priv *priv)
3874 {
3875 int ret;
3876 struct ieee80211_hw *hw = priv->hw;
3877
3878 hw->rate_control_algorithm = "iwl-3945-rs";
3879 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3880 hw->vif_data_size = sizeof(struct iwl_vif_priv);
3881
3882 /* Tell mac80211 our characteristics */
3883 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3884 IEEE80211_HW_SPECTRUM_MGMT;
3885
3886 if (!priv->cfg->broken_powersave)
3887 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3888 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3889
3890 hw->wiphy->interface_modes =
3891 BIT(NL80211_IFTYPE_STATION) |
3892 BIT(NL80211_IFTYPE_ADHOC);
3893
3894 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3895 WIPHY_FLAG_DISABLE_BEACON_HINTS;
3896
3897 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3898 /* we create the 802.11 header and a zero-length SSID element */
3899 hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2;
3900
3901 /* Default value; 4 EDCA QOS priorities */
3902 hw->queues = 4;
3903
3904 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3905 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3906 &priv->bands[IEEE80211_BAND_2GHZ];
3907
3908 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3909 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3910 &priv->bands[IEEE80211_BAND_5GHZ];
3911
3912 ret = ieee80211_register_hw(priv->hw);
3913 if (ret) {
3914 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3915 return ret;
3916 }
3917 priv->mac80211_registered = 1;
3918
3919 return 0;
3920 }
3921
3922 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3923 {
3924 int err = 0;
3925 struct iwl_priv *priv;
3926 struct ieee80211_hw *hw;
3927 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3928 struct iwl3945_eeprom *eeprom;
3929 unsigned long flags;
3930
3931 /***********************
3932 * 1. Allocating HW data
3933 * ********************/
3934
3935 /* mac80211 allocates memory for this device instance, including
3936 * space for this driver's private structure */
3937 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
3938 if (hw == NULL) {
3939 pr_err("Can not allocate network device\n");
3940 err = -ENOMEM;
3941 goto out;
3942 }
3943 priv = hw->priv;
3944 SET_IEEE80211_DEV(hw, &pdev->dev);
3945
3946 /*
3947 * Disabling hardware scan means that mac80211 will perform scans
3948 * "the hard way", rather than using device's scan.
3949 */
3950 if (iwl3945_mod_params.disable_hw_scan) {
3951 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
3952 iwl3945_hw_ops.hw_scan = NULL;
3953 }
3954
3955
3956 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3957 priv->cfg = cfg;
3958 priv->pci_dev = pdev;
3959 priv->inta_mask = CSR_INI_SET_MASK;
3960
3961 if (iwl_alloc_traffic_mem(priv))
3962 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3963
3964 /***************************
3965 * 2. Initializing PCI bus
3966 * *************************/
3967 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3968 PCIE_LINK_STATE_CLKPM);
3969
3970 if (pci_enable_device(pdev)) {
3971 err = -ENODEV;
3972 goto out_ieee80211_free_hw;
3973 }
3974
3975 pci_set_master(pdev);
3976
3977 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3978 if (!err)
3979 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3980 if (err) {
3981 IWL_WARN(priv, "No suitable DMA available.\n");
3982 goto out_pci_disable_device;
3983 }
3984
3985 pci_set_drvdata(pdev, priv);
3986 err = pci_request_regions(pdev, DRV_NAME);
3987 if (err)
3988 goto out_pci_disable_device;
3989
3990 /***********************
3991 * 3. Read REV Register
3992 * ********************/
3993 priv->hw_base = pci_iomap(pdev, 0, 0);
3994 if (!priv->hw_base) {
3995 err = -ENODEV;
3996 goto out_pci_release_regions;
3997 }
3998
3999 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4000 (unsigned long long) pci_resource_len(pdev, 0));
4001 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4002
4003 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4004 * PCI Tx retries from interfering with C3 CPU state */
4005 pci_write_config_byte(pdev, 0x41, 0x00);
4006
4007 /* these spin locks will be used in apm_ops.init and EEPROM access
4008 * we should init now
4009 */
4010 spin_lock_init(&priv->reg_lock);
4011 spin_lock_init(&priv->lock);
4012
4013 /*
4014 * stop and reset the on-board processor just in case it is in a
4015 * strange state ... like being left stranded by a primary kernel
4016 * and this is now the kdump kernel trying to start up
4017 */
4018 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4019
4020 /***********************
4021 * 4. Read EEPROM
4022 * ********************/
4023
4024 /* Read the EEPROM */
4025 err = iwl_eeprom_init(priv);
4026 if (err) {
4027 IWL_ERR(priv, "Unable to init EEPROM\n");
4028 goto out_iounmap;
4029 }
4030 /* MAC Address location in EEPROM same for 3945/4965 */
4031 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4032 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", eeprom->mac_address);
4033 SET_IEEE80211_PERM_ADDR(priv->hw, eeprom->mac_address);
4034
4035 /***********************
4036 * 5. Setup HW Constants
4037 * ********************/
4038 /* Device-specific setup */
4039 if (iwl3945_hw_set_hw_params(priv)) {
4040 IWL_ERR(priv, "failed to set hw settings\n");
4041 goto out_eeprom_free;
4042 }
4043
4044 /***********************
4045 * 6. Setup priv
4046 * ********************/
4047
4048 err = iwl3945_init_drv(priv);
4049 if (err) {
4050 IWL_ERR(priv, "initializing driver failed\n");
4051 goto out_unset_hw_params;
4052 }
4053
4054 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4055 priv->cfg->name);
4056
4057 /***********************
4058 * 7. Setup Services
4059 * ********************/
4060
4061 spin_lock_irqsave(&priv->lock, flags);
4062 iwl_disable_interrupts(priv);
4063 spin_unlock_irqrestore(&priv->lock, flags);
4064
4065 pci_enable_msi(priv->pci_dev);
4066
4067 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4068 IRQF_SHARED, DRV_NAME, priv);
4069 if (err) {
4070 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4071 goto out_disable_msi;
4072 }
4073
4074 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4075 if (err) {
4076 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4077 goto out_release_irq;
4078 }
4079
4080 iwl_set_rxon_channel(priv,
4081 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4082 iwl3945_setup_deferred_work(priv);
4083 iwl3945_setup_rx_handlers(priv);
4084 iwl_power_initialize(priv);
4085
4086 /*********************************
4087 * 8. Setup and Register mac80211
4088 * *******************************/
4089
4090 iwl_enable_interrupts(priv);
4091
4092 err = iwl3945_setup_mac(priv);
4093 if (err)
4094 goto out_remove_sysfs;
4095
4096 err = iwl_dbgfs_register(priv, DRV_NAME);
4097 if (err)
4098 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4099
4100 /* Start monitoring the killswitch */
4101 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
4102 2 * HZ);
4103
4104 return 0;
4105
4106 out_remove_sysfs:
4107 destroy_workqueue(priv->workqueue);
4108 priv->workqueue = NULL;
4109 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4110 out_release_irq:
4111 free_irq(priv->pci_dev->irq, priv);
4112 out_disable_msi:
4113 pci_disable_msi(priv->pci_dev);
4114 iwlcore_free_geos(priv);
4115 iwl_free_channel_map(priv);
4116 out_unset_hw_params:
4117 iwl3945_unset_hw_params(priv);
4118 out_eeprom_free:
4119 iwl_eeprom_free(priv);
4120 out_iounmap:
4121 pci_iounmap(pdev, priv->hw_base);
4122 out_pci_release_regions:
4123 pci_release_regions(pdev);
4124 out_pci_disable_device:
4125 pci_set_drvdata(pdev, NULL);
4126 pci_disable_device(pdev);
4127 out_ieee80211_free_hw:
4128 iwl_free_traffic_mem(priv);
4129 ieee80211_free_hw(priv->hw);
4130 out:
4131 return err;
4132 }
4133
4134 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4135 {
4136 struct iwl_priv *priv = pci_get_drvdata(pdev);
4137 unsigned long flags;
4138
4139 if (!priv)
4140 return;
4141
4142 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4143
4144 iwl_dbgfs_unregister(priv);
4145
4146 set_bit(STATUS_EXIT_PENDING, &priv->status);
4147
4148 if (priv->mac80211_registered) {
4149 ieee80211_unregister_hw(priv->hw);
4150 priv->mac80211_registered = 0;
4151 } else {
4152 iwl3945_down(priv);
4153 }
4154
4155 /*
4156 * Make sure device is reset to low power before unloading driver.
4157 * This may be redundant with iwl_down(), but there are paths to
4158 * run iwl_down() without calling apm_ops.stop(), and there are
4159 * paths to avoid running iwl_down() at all before leaving driver.
4160 * This (inexpensive) call *makes sure* device is reset.
4161 */
4162 priv->cfg->ops->lib->apm_ops.stop(priv);
4163
4164 /* make sure we flush any pending irq or
4165 * tasklet for the driver
4166 */
4167 spin_lock_irqsave(&priv->lock, flags);
4168 iwl_disable_interrupts(priv);
4169 spin_unlock_irqrestore(&priv->lock, flags);
4170
4171 iwl_synchronize_irq(priv);
4172
4173 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4174
4175 cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
4176
4177 iwl3945_dealloc_ucode_pci(priv);
4178
4179 if (priv->rxq.bd)
4180 iwl3945_rx_queue_free(priv, &priv->rxq);
4181 iwl3945_hw_txq_ctx_free(priv);
4182
4183 iwl3945_unset_hw_params(priv);
4184
4185 /*netif_stop_queue(dev); */
4186 flush_workqueue(priv->workqueue);
4187
4188 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4189 * priv->workqueue... so we can't take down the workqueue
4190 * until now... */
4191 destroy_workqueue(priv->workqueue);
4192 priv->workqueue = NULL;
4193 iwl_free_traffic_mem(priv);
4194
4195 free_irq(pdev->irq, priv);
4196 pci_disable_msi(pdev);
4197
4198 pci_iounmap(pdev, priv->hw_base);
4199 pci_release_regions(pdev);
4200 pci_disable_device(pdev);
4201 pci_set_drvdata(pdev, NULL);
4202
4203 iwl_free_channel_map(priv);
4204 iwlcore_free_geos(priv);
4205 kfree(priv->scan_cmd);
4206 if (priv->ibss_beacon)
4207 dev_kfree_skb(priv->ibss_beacon);
4208
4209 ieee80211_free_hw(priv->hw);
4210 }
4211
4212
4213 /*****************************************************************************
4214 *
4215 * driver and module entry point
4216 *
4217 *****************************************************************************/
4218
4219 static struct pci_driver iwl3945_driver = {
4220 .name = DRV_NAME,
4221 .id_table = iwl3945_hw_card_ids,
4222 .probe = iwl3945_pci_probe,
4223 .remove = __devexit_p(iwl3945_pci_remove),
4224 #ifdef CONFIG_PM
4225 .suspend = iwl_pci_suspend,
4226 .resume = iwl_pci_resume,
4227 #endif
4228 };
4229
4230 static int __init iwl3945_init(void)
4231 {
4232
4233 int ret;
4234 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4235 pr_info(DRV_COPYRIGHT "\n");
4236
4237 ret = iwl3945_rate_control_register();
4238 if (ret) {
4239 pr_err("Unable to register rate control algorithm: %d\n", ret);
4240 return ret;
4241 }
4242
4243 ret = pci_register_driver(&iwl3945_driver);
4244 if (ret) {
4245 pr_err("Unable to initialize PCI module\n");
4246 goto error_register;
4247 }
4248
4249 return ret;
4250
4251 error_register:
4252 iwl3945_rate_control_unregister();
4253 return ret;
4254 }
4255
4256 static void __exit iwl3945_exit(void)
4257 {
4258 pci_unregister_driver(&iwl3945_driver);
4259 iwl3945_rate_control_unregister();
4260 }
4261
4262 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4263
4264 module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
4265 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4266 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
4267 MODULE_PARM_DESC(swcrypto,
4268 "using software crypto (default 1 [software])\n");
4269 #ifdef CONFIG_IWLWIFI_DEBUG
4270 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4271 MODULE_PARM_DESC(debug, "debug output mask");
4272 #endif
4273 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
4274 int, S_IRUGO);
4275 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4276 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
4277 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4278
4279 module_exit(iwl3945_exit);
4280 module_init(iwl3945_init);
Linux kernel - Deliverables
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