Merge branches 'release' and 'dmi' into release
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #include "iwl-4965.h"
49 #include "iwl-helpers.h"
50
51 #ifdef CONFIG_IWL4965_DEBUG
52 u32 iwl4965_debug_level;
53 #endif
54
55 static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
56 struct iwl4965_tx_queue *txq);
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /* module parameters */
65 static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
66 static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
67 static int iwl4965_param_disable; /* def: enable radio */
68 static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
69 int iwl4965_param_hwcrypto; /* def: using software encryption */
70 static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
71 int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
72 int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
73
74 /*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
80
81 #ifdef CONFIG_IWL4965_DEBUG
82 #define VD "d"
83 #else
84 #define VD
85 #endif
86
87 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
88 #define VS "s"
89 #else
90 #define VS
91 #endif
92
93 #define IWLWIFI_VERSION "1.2.23k" VD VS
94 #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
95 #define DRV_VERSION IWLWIFI_VERSION
96
97 /* Change firmware file name, using "-" and incrementing number,
98 * *only* when uCode interface or architecture changes so that it
99 * is not compatible with earlier drivers.
100 * This number will also appear in << 8 position of 1st dword of uCode file */
101 #define IWL4965_UCODE_API "-1"
102
103 MODULE_DESCRIPTION(DRV_DESCRIPTION);
104 MODULE_VERSION(DRV_VERSION);
105 MODULE_AUTHOR(DRV_COPYRIGHT);
106 MODULE_LICENSE("GPL");
107
108 __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
109 {
110 u16 fc = le16_to_cpu(hdr->frame_control);
111 int hdr_len = ieee80211_get_hdrlen(fc);
112
113 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
114 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
115 return NULL;
116 }
117
118 static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
119 struct iwl4965_priv *priv, int mode)
120 {
121 int i;
122
123 for (i = 0; i < 3; i++)
124 if (priv->modes[i].mode == mode)
125 return &priv->modes[i];
126
127 return NULL;
128 }
129
130 static int iwl4965_is_empty_essid(const char *essid, int essid_len)
131 {
132 /* Single white space is for Linksys APs */
133 if (essid_len == 1 && essid[0] == ' ')
134 return 1;
135
136 /* Otherwise, if the entire essid is 0, we assume it is hidden */
137 while (essid_len) {
138 essid_len--;
139 if (essid[essid_len] != '\0')
140 return 0;
141 }
142
143 return 1;
144 }
145
146 static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
147 {
148 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
149 const char *s = essid;
150 char *d = escaped;
151
152 if (iwl4965_is_empty_essid(essid, essid_len)) {
153 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
154 return escaped;
155 }
156
157 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
158 while (essid_len--) {
159 if (*s == '\0') {
160 *d++ = '\\';
161 *d++ = '0';
162 s++;
163 } else
164 *d++ = *s++;
165 }
166 *d = '\0';
167 return escaped;
168 }
169
170 static void iwl4965_print_hex_dump(int level, void *p, u32 len)
171 {
172 #ifdef CONFIG_IWL4965_DEBUG
173 if (!(iwl4965_debug_level & level))
174 return;
175
176 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
177 p, len, 1);
178 #endif
179 }
180
181 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
182 * DMA services
183 *
184 * Theory of operation
185 *
186 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
187 * of buffer descriptors, each of which points to one or more data buffers for
188 * the device to read from or fill. Driver and device exchange status of each
189 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
190 * entries in each circular buffer, to protect against confusing empty and full
191 * queue states.
192 *
193 * The device reads or writes the data in the queues via the device's several
194 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
195 *
196 * For Tx queue, there are low mark and high mark limits. If, after queuing
197 * the packet for Tx, free space become < low mark, Tx queue stopped. When
198 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
199 * Tx queue resumed.
200 *
201 * The 4965 operates with up to 17 queues: One receive queue, one transmit
202 * queue (#4) for sending commands to the device firmware, and 15 other
203 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
204 *
205 * See more detailed info in iwl-4965-hw.h.
206 ***************************************************/
207
208 static int iwl4965_queue_space(const struct iwl4965_queue *q)
209 {
210 int s = q->read_ptr - q->write_ptr;
211
212 if (q->read_ptr > q->write_ptr)
213 s -= q->n_bd;
214
215 if (s <= 0)
216 s += q->n_window;
217 /* keep some reserve to not confuse empty and full situations */
218 s -= 2;
219 if (s < 0)
220 s = 0;
221 return s;
222 }
223
224 /**
225 * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
226 * @index -- current index
227 * @n_bd -- total number of entries in queue (must be power of 2)
228 */
229 static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
230 {
231 return ++index & (n_bd - 1);
232 }
233
234 /**
235 * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
236 * @index -- current index
237 * @n_bd -- total number of entries in queue (must be power of 2)
238 */
239 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
240 {
241 return --index & (n_bd - 1);
242 }
243
244 static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
245 {
246 return q->write_ptr > q->read_ptr ?
247 (i >= q->read_ptr && i < q->write_ptr) :
248 !(i < q->read_ptr && i >= q->write_ptr);
249 }
250
251 static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
252 {
253 /* This is for scan command, the big buffer at end of command array */
254 if (is_huge)
255 return q->n_window; /* must be power of 2 */
256
257 /* Otherwise, use normal size buffers */
258 return index & (q->n_window - 1);
259 }
260
261 /**
262 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
263 */
264 static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
265 int count, int slots_num, u32 id)
266 {
267 q->n_bd = count;
268 q->n_window = slots_num;
269 q->id = id;
270
271 /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
272 * and iwl4965_queue_dec_wrap are broken. */
273 BUG_ON(!is_power_of_2(count));
274
275 /* slots_num must be power-of-two size, otherwise
276 * get_cmd_index is broken. */
277 BUG_ON(!is_power_of_2(slots_num));
278
279 q->low_mark = q->n_window / 4;
280 if (q->low_mark < 4)
281 q->low_mark = 4;
282
283 q->high_mark = q->n_window / 8;
284 if (q->high_mark < 2)
285 q->high_mark = 2;
286
287 q->write_ptr = q->read_ptr = 0;
288
289 return 0;
290 }
291
292 /**
293 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
294 */
295 static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
296 struct iwl4965_tx_queue *txq, u32 id)
297 {
298 struct pci_dev *dev = priv->pci_dev;
299
300 /* Driver private data, only for Tx (not command) queues,
301 * not shared with device. */
302 if (id != IWL_CMD_QUEUE_NUM) {
303 txq->txb = kmalloc(sizeof(txq->txb[0]) *
304 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
305 if (!txq->txb) {
306 IWL_ERROR("kmalloc for auxiliary BD "
307 "structures failed\n");
308 goto error;
309 }
310 } else
311 txq->txb = NULL;
312
313 /* Circular buffer of transmit frame descriptors (TFDs),
314 * shared with device */
315 txq->bd = pci_alloc_consistent(dev,
316 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
317 &txq->q.dma_addr);
318
319 if (!txq->bd) {
320 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
321 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
322 goto error;
323 }
324 txq->q.id = id;
325
326 return 0;
327
328 error:
329 if (txq->txb) {
330 kfree(txq->txb);
331 txq->txb = NULL;
332 }
333
334 return -ENOMEM;
335 }
336
337 /**
338 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
339 */
340 int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
341 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
342 {
343 struct pci_dev *dev = priv->pci_dev;
344 int len;
345 int rc = 0;
346
347 /*
348 * Alloc buffer array for commands (Tx or other types of commands).
349 * For the command queue (#4), allocate command space + one big
350 * command for scan, since scan command is very huge; the system will
351 * not have two scans at the same time, so only one is needed.
352 * For normal Tx queues (all other queues), no super-size command
353 * space is needed.
354 */
355 len = sizeof(struct iwl4965_cmd) * slots_num;
356 if (txq_id == IWL_CMD_QUEUE_NUM)
357 len += IWL_MAX_SCAN_SIZE;
358 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
359 if (!txq->cmd)
360 return -ENOMEM;
361
362 /* Alloc driver data array and TFD circular buffer */
363 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
364 if (rc) {
365 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
366
367 return -ENOMEM;
368 }
369 txq->need_update = 0;
370
371 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
372 * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
373 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
374
375 /* Initialize queue's high/low-water marks, and head/tail indexes */
376 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
377
378 /* Tell device where to find queue */
379 iwl4965_hw_tx_queue_init(priv, txq);
380
381 return 0;
382 }
383
384 /**
385 * iwl4965_tx_queue_free - Deallocate DMA queue.
386 * @txq: Transmit queue to deallocate.
387 *
388 * Empty queue by removing and destroying all BD's.
389 * Free all buffers.
390 * 0-fill, but do not free "txq" descriptor structure.
391 */
392 void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
393 {
394 struct iwl4965_queue *q = &txq->q;
395 struct pci_dev *dev = priv->pci_dev;
396 int len;
397
398 if (q->n_bd == 0)
399 return;
400
401 /* first, empty all BD's */
402 for (; q->write_ptr != q->read_ptr;
403 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
404 iwl4965_hw_txq_free_tfd(priv, txq);
405
406 len = sizeof(struct iwl4965_cmd) * q->n_window;
407 if (q->id == IWL_CMD_QUEUE_NUM)
408 len += IWL_MAX_SCAN_SIZE;
409
410 /* De-alloc array of command/tx buffers */
411 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
412
413 /* De-alloc circular buffer of TFDs */
414 if (txq->q.n_bd)
415 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
416 txq->q.n_bd, txq->bd, txq->q.dma_addr);
417
418 /* De-alloc array of per-TFD driver data */
419 if (txq->txb) {
420 kfree(txq->txb);
421 txq->txb = NULL;
422 }
423
424 /* 0-fill queue descriptor structure */
425 memset(txq, 0, sizeof(*txq));
426 }
427
428 const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
429
430 /*************** STATION TABLE MANAGEMENT ****
431 * mac80211 should be examined to determine if sta_info is duplicating
432 * the functionality provided here
433 */
434
435 /**************************************************************/
436
437 #if 0 /* temporary disable till we add real remove station */
438 /**
439 * iwl4965_remove_station - Remove driver's knowledge of station.
440 *
441 * NOTE: This does not remove station from device's station table.
442 */
443 static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
444 {
445 int index = IWL_INVALID_STATION;
446 int i;
447 unsigned long flags;
448
449 spin_lock_irqsave(&priv->sta_lock, flags);
450
451 if (is_ap)
452 index = IWL_AP_ID;
453 else if (is_broadcast_ether_addr(addr))
454 index = priv->hw_setting.bcast_sta_id;
455 else
456 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
457 if (priv->stations[i].used &&
458 !compare_ether_addr(priv->stations[i].sta.sta.addr,
459 addr)) {
460 index = i;
461 break;
462 }
463
464 if (unlikely(index == IWL_INVALID_STATION))
465 goto out;
466
467 if (priv->stations[index].used) {
468 priv->stations[index].used = 0;
469 priv->num_stations--;
470 }
471
472 BUG_ON(priv->num_stations < 0);
473
474 out:
475 spin_unlock_irqrestore(&priv->sta_lock, flags);
476 return 0;
477 }
478 #endif
479
480 /**
481 * iwl4965_clear_stations_table - Clear the driver's station table
482 *
483 * NOTE: This does not clear or otherwise alter the device's station table.
484 */
485 static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
486 {
487 unsigned long flags;
488
489 spin_lock_irqsave(&priv->sta_lock, flags);
490
491 priv->num_stations = 0;
492 memset(priv->stations, 0, sizeof(priv->stations));
493
494 spin_unlock_irqrestore(&priv->sta_lock, flags);
495 }
496
497 /**
498 * iwl4965_add_station_flags - Add station to tables in driver and device
499 */
500 u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
501 int is_ap, u8 flags, void *ht_data)
502 {
503 int i;
504 int index = IWL_INVALID_STATION;
505 struct iwl4965_station_entry *station;
506 unsigned long flags_spin;
507 DECLARE_MAC_BUF(mac);
508
509 spin_lock_irqsave(&priv->sta_lock, flags_spin);
510 if (is_ap)
511 index = IWL_AP_ID;
512 else if (is_broadcast_ether_addr(addr))
513 index = priv->hw_setting.bcast_sta_id;
514 else
515 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
516 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
517 addr)) {
518 index = i;
519 break;
520 }
521
522 if (!priv->stations[i].used &&
523 index == IWL_INVALID_STATION)
524 index = i;
525 }
526
527
528 /* These two conditions have the same outcome, but keep them separate
529 since they have different meanings */
530 if (unlikely(index == IWL_INVALID_STATION)) {
531 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
532 return index;
533 }
534
535 if (priv->stations[index].used &&
536 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
537 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
538 return index;
539 }
540
541
542 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
543 station = &priv->stations[index];
544 station->used = 1;
545 priv->num_stations++;
546
547 /* Set up the REPLY_ADD_STA command to send to device */
548 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
549 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
550 station->sta.mode = 0;
551 station->sta.sta.sta_id = index;
552 station->sta.station_flags = 0;
553
554 #ifdef CONFIG_IWL4965_HT
555 /* BCAST station and IBSS stations do not work in HT mode */
556 if (index != priv->hw_setting.bcast_sta_id &&
557 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
558 iwl4965_set_ht_add_station(priv, index,
559 (struct ieee80211_ht_info *) ht_data);
560 #endif /*CONFIG_IWL4965_HT*/
561
562 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
563
564 /* Add station to device's station table */
565 iwl4965_send_add_station(priv, &station->sta, flags);
566 return index;
567
568 }
569
570 /*************** DRIVER STATUS FUNCTIONS *****/
571
572 static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
573 {
574 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
575 * set but EXIT_PENDING is not */
576 return test_bit(STATUS_READY, &priv->status) &&
577 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
578 !test_bit(STATUS_EXIT_PENDING, &priv->status);
579 }
580
581 static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
582 {
583 return test_bit(STATUS_ALIVE, &priv->status);
584 }
585
586 static inline int iwl4965_is_init(struct iwl4965_priv *priv)
587 {
588 return test_bit(STATUS_INIT, &priv->status);
589 }
590
591 static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
592 {
593 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
594 test_bit(STATUS_RF_KILL_SW, &priv->status);
595 }
596
597 static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
598 {
599
600 if (iwl4965_is_rfkill(priv))
601 return 0;
602
603 return iwl4965_is_ready(priv);
604 }
605
606 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
607
608 #define IWL_CMD(x) case x : return #x
609
610 static const char *get_cmd_string(u8 cmd)
611 {
612 switch (cmd) {
613 IWL_CMD(REPLY_ALIVE);
614 IWL_CMD(REPLY_ERROR);
615 IWL_CMD(REPLY_RXON);
616 IWL_CMD(REPLY_RXON_ASSOC);
617 IWL_CMD(REPLY_QOS_PARAM);
618 IWL_CMD(REPLY_RXON_TIMING);
619 IWL_CMD(REPLY_ADD_STA);
620 IWL_CMD(REPLY_REMOVE_STA);
621 IWL_CMD(REPLY_REMOVE_ALL_STA);
622 IWL_CMD(REPLY_TX);
623 IWL_CMD(REPLY_RATE_SCALE);
624 IWL_CMD(REPLY_LEDS_CMD);
625 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
626 IWL_CMD(RADAR_NOTIFICATION);
627 IWL_CMD(REPLY_QUIET_CMD);
628 IWL_CMD(REPLY_CHANNEL_SWITCH);
629 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
630 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
631 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
632 IWL_CMD(POWER_TABLE_CMD);
633 IWL_CMD(PM_SLEEP_NOTIFICATION);
634 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
635 IWL_CMD(REPLY_SCAN_CMD);
636 IWL_CMD(REPLY_SCAN_ABORT_CMD);
637 IWL_CMD(SCAN_START_NOTIFICATION);
638 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
639 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
640 IWL_CMD(BEACON_NOTIFICATION);
641 IWL_CMD(REPLY_TX_BEACON);
642 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
643 IWL_CMD(QUIET_NOTIFICATION);
644 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
645 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
646 IWL_CMD(REPLY_BT_CONFIG);
647 IWL_CMD(REPLY_STATISTICS_CMD);
648 IWL_CMD(STATISTICS_NOTIFICATION);
649 IWL_CMD(REPLY_CARD_STATE_CMD);
650 IWL_CMD(CARD_STATE_NOTIFICATION);
651 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
652 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
653 IWL_CMD(SENSITIVITY_CMD);
654 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
655 IWL_CMD(REPLY_RX_PHY_CMD);
656 IWL_CMD(REPLY_RX_MPDU_CMD);
657 IWL_CMD(REPLY_4965_RX);
658 IWL_CMD(REPLY_COMPRESSED_BA);
659 default:
660 return "UNKNOWN";
661
662 }
663 }
664
665 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
666
667 /**
668 * iwl4965_enqueue_hcmd - enqueue a uCode command
669 * @priv: device private data point
670 * @cmd: a point to the ucode command structure
671 *
672 * The function returns < 0 values to indicate the operation is
673 * failed. On success, it turns the index (> 0) of command in the
674 * command queue.
675 */
676 static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
677 {
678 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
679 struct iwl4965_queue *q = &txq->q;
680 struct iwl4965_tfd_frame *tfd;
681 u32 *control_flags;
682 struct iwl4965_cmd *out_cmd;
683 u32 idx;
684 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
685 dma_addr_t phys_addr;
686 int ret;
687 unsigned long flags;
688
689 /* If any of the command structures end up being larger than
690 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
691 * we will need to increase the size of the TFD entries */
692 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
693 !(cmd->meta.flags & CMD_SIZE_HUGE));
694
695 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
696 IWL_ERROR("No space for Tx\n");
697 return -ENOSPC;
698 }
699
700 spin_lock_irqsave(&priv->hcmd_lock, flags);
701
702 tfd = &txq->bd[q->write_ptr];
703 memset(tfd, 0, sizeof(*tfd));
704
705 control_flags = (u32 *) tfd;
706
707 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
708 out_cmd = &txq->cmd[idx];
709
710 out_cmd->hdr.cmd = cmd->id;
711 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
712 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
713
714 /* At this point, the out_cmd now has all of the incoming cmd
715 * information */
716
717 out_cmd->hdr.flags = 0;
718 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
719 INDEX_TO_SEQ(q->write_ptr));
720 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
721 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
722
723 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
724 offsetof(struct iwl4965_cmd, hdr);
725 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
726
727 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
728 "%d bytes at %d[%d]:%d\n",
729 get_cmd_string(out_cmd->hdr.cmd),
730 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
731 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
732
733 txq->need_update = 1;
734
735 /* Set up entry in queue's byte count circular buffer */
736 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
737
738 /* Increment and update queue's write index */
739 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
740 iwl4965_tx_queue_update_write_ptr(priv, txq);
741
742 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
743 return ret ? ret : idx;
744 }
745
746 static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
747 {
748 int ret;
749
750 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
751
752 /* An asynchronous command can not expect an SKB to be set. */
753 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
754
755 /* An asynchronous command MUST have a callback. */
756 BUG_ON(!cmd->meta.u.callback);
757
758 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
759 return -EBUSY;
760
761 ret = iwl4965_enqueue_hcmd(priv, cmd);
762 if (ret < 0) {
763 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
764 get_cmd_string(cmd->id), ret);
765 return ret;
766 }
767 return 0;
768 }
769
770 static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
771 {
772 int cmd_idx;
773 int ret;
774 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
775
776 BUG_ON(cmd->meta.flags & CMD_ASYNC);
777
778 /* A synchronous command can not have a callback set. */
779 BUG_ON(cmd->meta.u.callback != NULL);
780
781 if (atomic_xchg(&entry, 1)) {
782 IWL_ERROR("Error sending %s: Already sending a host command\n",
783 get_cmd_string(cmd->id));
784 return -EBUSY;
785 }
786
787 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
788
789 if (cmd->meta.flags & CMD_WANT_SKB)
790 cmd->meta.source = &cmd->meta;
791
792 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
793 if (cmd_idx < 0) {
794 ret = cmd_idx;
795 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
796 get_cmd_string(cmd->id), ret);
797 goto out;
798 }
799
800 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
801 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
802 HOST_COMPLETE_TIMEOUT);
803 if (!ret) {
804 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
805 IWL_ERROR("Error sending %s: time out after %dms.\n",
806 get_cmd_string(cmd->id),
807 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
808
809 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
810 ret = -ETIMEDOUT;
811 goto cancel;
812 }
813 }
814
815 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
816 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
817 get_cmd_string(cmd->id));
818 ret = -ECANCELED;
819 goto fail;
820 }
821 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
822 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
823 get_cmd_string(cmd->id));
824 ret = -EIO;
825 goto fail;
826 }
827 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
828 IWL_ERROR("Error: Response NULL in '%s'\n",
829 get_cmd_string(cmd->id));
830 ret = -EIO;
831 goto out;
832 }
833
834 ret = 0;
835 goto out;
836
837 cancel:
838 if (cmd->meta.flags & CMD_WANT_SKB) {
839 struct iwl4965_cmd *qcmd;
840
841 /* Cancel the CMD_WANT_SKB flag for the cmd in the
842 * TX cmd queue. Otherwise in case the cmd comes
843 * in later, it will possibly set an invalid
844 * address (cmd->meta.source). */
845 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
846 qcmd->meta.flags &= ~CMD_WANT_SKB;
847 }
848 fail:
849 if (cmd->meta.u.skb) {
850 dev_kfree_skb_any(cmd->meta.u.skb);
851 cmd->meta.u.skb = NULL;
852 }
853 out:
854 atomic_set(&entry, 0);
855 return ret;
856 }
857
858 int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
859 {
860 if (cmd->meta.flags & CMD_ASYNC)
861 return iwl4965_send_cmd_async(priv, cmd);
862
863 return iwl4965_send_cmd_sync(priv, cmd);
864 }
865
866 int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
867 {
868 struct iwl4965_host_cmd cmd = {
869 .id = id,
870 .len = len,
871 .data = data,
872 };
873
874 return iwl4965_send_cmd_sync(priv, &cmd);
875 }
876
877 static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
878 {
879 struct iwl4965_host_cmd cmd = {
880 .id = id,
881 .len = sizeof(val),
882 .data = &val,
883 };
884
885 return iwl4965_send_cmd_sync(priv, &cmd);
886 }
887
888 int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
889 {
890 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
891 }
892
893 /**
894 * iwl4965_rxon_add_station - add station into station table.
895 *
896 * there is only one AP station with id= IWL_AP_ID
897 * NOTE: mutex must be held before calling this fnction
898 */
899 static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
900 const u8 *addr, int is_ap)
901 {
902 u8 sta_id;
903
904 /* Add station to device's station table */
905 #ifdef CONFIG_IWL4965_HT
906 struct ieee80211_conf *conf = &priv->hw->conf;
907 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
908
909 if ((is_ap) &&
910 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
911 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
912 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
913 0, cur_ht_config);
914 else
915 #endif /* CONFIG_IWL4965_HT */
916 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
917 0, NULL);
918
919 /* Set up default rate scaling table in device's station table */
920 iwl4965_add_station(priv, addr, is_ap);
921
922 return sta_id;
923 }
924
925 /**
926 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
927 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
928 * @channel: Any channel valid for the requested phymode
929
930 * In addition to setting the staging RXON, priv->phymode is also set.
931 *
932 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
933 * in the staging RXON flag structure based on the phymode
934 */
935 static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
936 u16 channel)
937 {
938 if (!iwl4965_get_channel_info(priv, phymode, channel)) {
939 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
940 channel, phymode);
941 return -EINVAL;
942 }
943
944 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
945 (priv->phymode == phymode))
946 return 0;
947
948 priv->staging_rxon.channel = cpu_to_le16(channel);
949 if (phymode == MODE_IEEE80211A)
950 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
951 else
952 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
953
954 priv->phymode = phymode;
955
956 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
957
958 return 0;
959 }
960
961 /**
962 * iwl4965_check_rxon_cmd - validate RXON structure is valid
963 *
964 * NOTE: This is really only useful during development and can eventually
965 * be #ifdef'd out once the driver is stable and folks aren't actively
966 * making changes
967 */
968 static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
969 {
970 int error = 0;
971 int counter = 1;
972
973 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
974 error |= le32_to_cpu(rxon->flags &
975 (RXON_FLG_TGJ_NARROW_BAND_MSK |
976 RXON_FLG_RADAR_DETECT_MSK));
977 if (error)
978 IWL_WARNING("check 24G fields %d | %d\n",
979 counter++, error);
980 } else {
981 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
982 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
983 if (error)
984 IWL_WARNING("check 52 fields %d | %d\n",
985 counter++, error);
986 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
987 if (error)
988 IWL_WARNING("check 52 CCK %d | %d\n",
989 counter++, error);
990 }
991 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
992 if (error)
993 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
994
995 /* make sure basic rates 6Mbps and 1Mbps are supported */
996 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
997 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
998 if (error)
999 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
1000
1001 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
1002 if (error)
1003 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
1004
1005 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
1006 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
1007 if (error)
1008 IWL_WARNING("check CCK and short slot %d | %d\n",
1009 counter++, error);
1010
1011 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
1012 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
1013 if (error)
1014 IWL_WARNING("check CCK & auto detect %d | %d\n",
1015 counter++, error);
1016
1017 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
1018 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
1019 if (error)
1020 IWL_WARNING("check TGG and auto detect %d | %d\n",
1021 counter++, error);
1022
1023 if (error)
1024 IWL_WARNING("Tuning to channel %d\n",
1025 le16_to_cpu(rxon->channel));
1026
1027 if (error) {
1028 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
1029 return -1;
1030 }
1031 return 0;
1032 }
1033
1034 /**
1035 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
1036 * @priv: staging_rxon is compared to active_rxon
1037 *
1038 * If the RXON structure is changing enough to require a new tune,
1039 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1040 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
1041 */
1042 static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
1043 {
1044
1045 /* These items are only settable from the full RXON command */
1046 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1047 compare_ether_addr(priv->staging_rxon.bssid_addr,
1048 priv->active_rxon.bssid_addr) ||
1049 compare_ether_addr(priv->staging_rxon.node_addr,
1050 priv->active_rxon.node_addr) ||
1051 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1052 priv->active_rxon.wlap_bssid_addr) ||
1053 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1054 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1055 (priv->staging_rxon.air_propagation !=
1056 priv->active_rxon.air_propagation) ||
1057 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1058 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1059 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1060 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1061 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1062 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1063 return 1;
1064
1065 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1066 * be updated with the RXON_ASSOC command -- however only some
1067 * flag transitions are allowed using RXON_ASSOC */
1068
1069 /* Check if we are not switching bands */
1070 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1071 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1072 return 1;
1073
1074 /* Check if we are switching association toggle */
1075 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1076 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1077 return 1;
1078
1079 return 0;
1080 }
1081
1082 static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
1083 {
1084 int rc = 0;
1085 struct iwl4965_rx_packet *res = NULL;
1086 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1087 struct iwl4965_host_cmd cmd = {
1088 .id = REPLY_RXON_ASSOC,
1089 .len = sizeof(rxon_assoc),
1090 .meta.flags = CMD_WANT_SKB,
1091 .data = &rxon_assoc,
1092 };
1093 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1094 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
1095
1096 if ((rxon1->flags == rxon2->flags) &&
1097 (rxon1->filter_flags == rxon2->filter_flags) &&
1098 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1099 (rxon1->ofdm_ht_single_stream_basic_rates ==
1100 rxon2->ofdm_ht_single_stream_basic_rates) &&
1101 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1102 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1103 (rxon1->rx_chain == rxon2->rx_chain) &&
1104 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1105 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1106 return 0;
1107 }
1108
1109 rxon_assoc.flags = priv->staging_rxon.flags;
1110 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1111 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1112 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1113 rxon_assoc.reserved = 0;
1114 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1115 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1116 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1117 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1118 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1119
1120 rc = iwl4965_send_cmd_sync(priv, &cmd);
1121 if (rc)
1122 return rc;
1123
1124 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1125 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1126 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1127 rc = -EIO;
1128 }
1129
1130 priv->alloc_rxb_skb--;
1131 dev_kfree_skb_any(cmd.meta.u.skb);
1132
1133 return rc;
1134 }
1135
1136 /**
1137 * iwl4965_commit_rxon - commit staging_rxon to hardware
1138 *
1139 * The RXON command in staging_rxon is committed to the hardware and
1140 * the active_rxon structure is updated with the new data. This
1141 * function correctly transitions out of the RXON_ASSOC_MSK state if
1142 * a HW tune is required based on the RXON structure changes.
1143 */
1144 static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
1145 {
1146 /* cast away the const for active_rxon in this function */
1147 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1148 DECLARE_MAC_BUF(mac);
1149 int rc = 0;
1150
1151 if (!iwl4965_is_alive(priv))
1152 return -1;
1153
1154 /* always get timestamp with Rx frame */
1155 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1156
1157 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
1158 if (rc) {
1159 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1160 return -EINVAL;
1161 }
1162
1163 /* If we don't need to send a full RXON, we can use
1164 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
1165 * and other flags for the current radio configuration. */
1166 if (!iwl4965_full_rxon_required(priv)) {
1167 rc = iwl4965_send_rxon_assoc(priv);
1168 if (rc) {
1169 IWL_ERROR("Error setting RXON_ASSOC "
1170 "configuration (%d).\n", rc);
1171 return rc;
1172 }
1173
1174 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1175
1176 return 0;
1177 }
1178
1179 /* station table will be cleared */
1180 priv->assoc_station_added = 0;
1181
1182 #ifdef CONFIG_IWL4965_SENSITIVITY
1183 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1184 if (!priv->error_recovering)
1185 priv->start_calib = 0;
1186
1187 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
1188 #endif /* CONFIG_IWL4965_SENSITIVITY */
1189
1190 /* If we are currently associated and the new config requires
1191 * an RXON_ASSOC and the new config wants the associated mask enabled,
1192 * we must clear the associated from the active configuration
1193 * before we apply the new config */
1194 if (iwl4965_is_associated(priv) &&
1195 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1196 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1197 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1198
1199 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1200 sizeof(struct iwl4965_rxon_cmd),
1201 &priv->active_rxon);
1202
1203 /* If the mask clearing failed then we set
1204 * active_rxon back to what it was previously */
1205 if (rc) {
1206 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1207 IWL_ERROR("Error clearing ASSOC_MSK on current "
1208 "configuration (%d).\n", rc);
1209 return rc;
1210 }
1211 }
1212
1213 IWL_DEBUG_INFO("Sending RXON\n"
1214 "* with%s RXON_FILTER_ASSOC_MSK\n"
1215 "* channel = %d\n"
1216 "* bssid = %s\n",
1217 ((priv->staging_rxon.filter_flags &
1218 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1219 le16_to_cpu(priv->staging_rxon.channel),
1220 print_mac(mac, priv->staging_rxon.bssid_addr));
1221
1222 /* Apply the new configuration */
1223 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1224 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
1225 if (rc) {
1226 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1227 return rc;
1228 }
1229
1230 iwl4965_clear_stations_table(priv);
1231
1232 #ifdef CONFIG_IWL4965_SENSITIVITY
1233 if (!priv->error_recovering)
1234 priv->start_calib = 0;
1235
1236 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1237 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
1238 #endif /* CONFIG_IWL4965_SENSITIVITY */
1239
1240 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1241
1242 /* If we issue a new RXON command which required a tune then we must
1243 * send a new TXPOWER command or we won't be able to Tx any frames */
1244 rc = iwl4965_hw_reg_send_txpower(priv);
1245 if (rc) {
1246 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1247 return rc;
1248 }
1249
1250 /* Add the broadcast address so we can send broadcast frames */
1251 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
1252 IWL_INVALID_STATION) {
1253 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1254 return -EIO;
1255 }
1256
1257 /* If we have set the ASSOC_MSK and we are in BSS mode then
1258 * add the IWL_AP_ID to the station rate table */
1259 if (iwl4965_is_associated(priv) &&
1260 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
1261 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
1262 == IWL_INVALID_STATION) {
1263 IWL_ERROR("Error adding AP address for transmit.\n");
1264 return -EIO;
1265 }
1266 priv->assoc_station_added = 1;
1267 }
1268
1269 return 0;
1270 }
1271
1272 static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
1273 {
1274 struct iwl4965_bt_cmd bt_cmd = {
1275 .flags = 3,
1276 .lead_time = 0xAA,
1277 .max_kill = 1,
1278 .kill_ack_mask = 0,
1279 .kill_cts_mask = 0,
1280 };
1281
1282 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1283 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
1284 }
1285
1286 static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
1287 {
1288 int rc = 0;
1289 struct iwl4965_rx_packet *res;
1290 struct iwl4965_host_cmd cmd = {
1291 .id = REPLY_SCAN_ABORT_CMD,
1292 .meta.flags = CMD_WANT_SKB,
1293 };
1294
1295 /* If there isn't a scan actively going on in the hardware
1296 * then we are in between scan bands and not actually
1297 * actively scanning, so don't send the abort command */
1298 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1299 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1300 return 0;
1301 }
1302
1303 rc = iwl4965_send_cmd_sync(priv, &cmd);
1304 if (rc) {
1305 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1306 return rc;
1307 }
1308
1309 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1310 if (res->u.status != CAN_ABORT_STATUS) {
1311 /* The scan abort will return 1 for success or
1312 * 2 for "failure". A failure condition can be
1313 * due to simply not being in an active scan which
1314 * can occur if we send the scan abort before we
1315 * the microcode has notified us that a scan is
1316 * completed. */
1317 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1318 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1319 clear_bit(STATUS_SCAN_HW, &priv->status);
1320 }
1321
1322 dev_kfree_skb_any(cmd.meta.u.skb);
1323
1324 return rc;
1325 }
1326
1327 static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
1328 struct iwl4965_cmd *cmd,
1329 struct sk_buff *skb)
1330 {
1331 return 1;
1332 }
1333
1334 /*
1335 * CARD_STATE_CMD
1336 *
1337 * Use: Sets the device's internal card state to enable, disable, or halt
1338 *
1339 * When in the 'enable' state the card operates as normal.
1340 * When in the 'disable' state, the card enters into a low power mode.
1341 * When in the 'halt' state, the card is shut down and must be fully
1342 * restarted to come back on.
1343 */
1344 static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
1345 {
1346 struct iwl4965_host_cmd cmd = {
1347 .id = REPLY_CARD_STATE_CMD,
1348 .len = sizeof(u32),
1349 .data = &flags,
1350 .meta.flags = meta_flag,
1351 };
1352
1353 if (meta_flag & CMD_ASYNC)
1354 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
1355
1356 return iwl4965_send_cmd(priv, &cmd);
1357 }
1358
1359 static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
1360 struct iwl4965_cmd *cmd, struct sk_buff *skb)
1361 {
1362 struct iwl4965_rx_packet *res = NULL;
1363
1364 if (!skb) {
1365 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1366 return 1;
1367 }
1368
1369 res = (struct iwl4965_rx_packet *)skb->data;
1370 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1371 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1372 res->hdr.flags);
1373 return 1;
1374 }
1375
1376 switch (res->u.add_sta.status) {
1377 case ADD_STA_SUCCESS_MSK:
1378 break;
1379 default:
1380 break;
1381 }
1382
1383 /* We didn't cache the SKB; let the caller free it */
1384 return 1;
1385 }
1386
1387 int iwl4965_send_add_station(struct iwl4965_priv *priv,
1388 struct iwl4965_addsta_cmd *sta, u8 flags)
1389 {
1390 struct iwl4965_rx_packet *res = NULL;
1391 int rc = 0;
1392 struct iwl4965_host_cmd cmd = {
1393 .id = REPLY_ADD_STA,
1394 .len = sizeof(struct iwl4965_addsta_cmd),
1395 .meta.flags = flags,
1396 .data = sta,
1397 };
1398
1399 if (flags & CMD_ASYNC)
1400 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
1401 else
1402 cmd.meta.flags |= CMD_WANT_SKB;
1403
1404 rc = iwl4965_send_cmd(priv, &cmd);
1405
1406 if (rc || (flags & CMD_ASYNC))
1407 return rc;
1408
1409 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1410 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1411 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1412 res->hdr.flags);
1413 rc = -EIO;
1414 }
1415
1416 if (rc == 0) {
1417 switch (res->u.add_sta.status) {
1418 case ADD_STA_SUCCESS_MSK:
1419 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1420 break;
1421 default:
1422 rc = -EIO;
1423 IWL_WARNING("REPLY_ADD_STA failed\n");
1424 break;
1425 }
1426 }
1427
1428 priv->alloc_rxb_skb--;
1429 dev_kfree_skb_any(cmd.meta.u.skb);
1430
1431 return rc;
1432 }
1433
1434 static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
1435 struct ieee80211_key_conf *keyconf,
1436 u8 sta_id)
1437 {
1438 unsigned long flags;
1439 __le16 key_flags = 0;
1440
1441 switch (keyconf->alg) {
1442 case ALG_CCMP:
1443 key_flags |= STA_KEY_FLG_CCMP;
1444 key_flags |= cpu_to_le16(
1445 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1446 key_flags &= ~STA_KEY_FLG_INVALID;
1447 break;
1448 case ALG_TKIP:
1449 case ALG_WEP:
1450 default:
1451 return -EINVAL;
1452 }
1453 spin_lock_irqsave(&priv->sta_lock, flags);
1454 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1455 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1456 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1457 keyconf->keylen);
1458
1459 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1460 keyconf->keylen);
1461 priv->stations[sta_id].sta.key.key_flags = key_flags;
1462 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1463 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1464
1465 spin_unlock_irqrestore(&priv->sta_lock, flags);
1466
1467 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1468 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1469 return 0;
1470 }
1471
1472 static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
1473 {
1474 unsigned long flags;
1475
1476 spin_lock_irqsave(&priv->sta_lock, flags);
1477 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1478 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
1479 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1480 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1481 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1482 spin_unlock_irqrestore(&priv->sta_lock, flags);
1483
1484 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1485 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1486 return 0;
1487 }
1488
1489 static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
1490 {
1491 struct list_head *element;
1492
1493 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1494 priv->frames_count);
1495
1496 while (!list_empty(&priv->free_frames)) {
1497 element = priv->free_frames.next;
1498 list_del(element);
1499 kfree(list_entry(element, struct iwl4965_frame, list));
1500 priv->frames_count--;
1501 }
1502
1503 if (priv->frames_count) {
1504 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1505 priv->frames_count);
1506 priv->frames_count = 0;
1507 }
1508 }
1509
1510 static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
1511 {
1512 struct iwl4965_frame *frame;
1513 struct list_head *element;
1514 if (list_empty(&priv->free_frames)) {
1515 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1516 if (!frame) {
1517 IWL_ERROR("Could not allocate frame!\n");
1518 return NULL;
1519 }
1520
1521 priv->frames_count++;
1522 return frame;
1523 }
1524
1525 element = priv->free_frames.next;
1526 list_del(element);
1527 return list_entry(element, struct iwl4965_frame, list);
1528 }
1529
1530 static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
1531 {
1532 memset(frame, 0, sizeof(*frame));
1533 list_add(&frame->list, &priv->free_frames);
1534 }
1535
1536 unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
1537 struct ieee80211_hdr *hdr,
1538 const u8 *dest, int left)
1539 {
1540
1541 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
1542 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1543 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1544 return 0;
1545
1546 if (priv->ibss_beacon->len > left)
1547 return 0;
1548
1549 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1550
1551 return priv->ibss_beacon->len;
1552 }
1553
1554 int iwl4965_rate_index_from_plcp(int plcp)
1555 {
1556 int i = 0;
1557
1558 /* 4965 HT rate format */
1559 if (plcp & RATE_MCS_HT_MSK) {
1560 i = (plcp & 0xff);
1561
1562 if (i >= IWL_RATE_MIMO_6M_PLCP)
1563 i = i - IWL_RATE_MIMO_6M_PLCP;
1564
1565 i += IWL_FIRST_OFDM_RATE;
1566 /* skip 9M not supported in ht*/
1567 if (i >= IWL_RATE_9M_INDEX)
1568 i += 1;
1569 if ((i >= IWL_FIRST_OFDM_RATE) &&
1570 (i <= IWL_LAST_OFDM_RATE))
1571 return i;
1572
1573 /* 4965 legacy rate format, search for match in table */
1574 } else {
1575 for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
1576 if (iwl4965_rates[i].plcp == (plcp &0xFF))
1577 return i;
1578 }
1579 return -1;
1580 }
1581
1582 static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
1583 {
1584 u8 i;
1585
1586 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1587 i = iwl4965_rates[i].next_ieee) {
1588 if (rate_mask & (1 << i))
1589 return iwl4965_rates[i].plcp;
1590 }
1591
1592 return IWL_RATE_INVALID;
1593 }
1594
1595 static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
1596 {
1597 struct iwl4965_frame *frame;
1598 unsigned int frame_size;
1599 int rc;
1600 u8 rate;
1601
1602 frame = iwl4965_get_free_frame(priv);
1603
1604 if (!frame) {
1605 IWL_ERROR("Could not obtain free frame buffer for beacon "
1606 "command.\n");
1607 return -ENOMEM;
1608 }
1609
1610 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1611 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
1612 0xFF0);
1613 if (rate == IWL_INVALID_RATE)
1614 rate = IWL_RATE_6M_PLCP;
1615 } else {
1616 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1617 if (rate == IWL_INVALID_RATE)
1618 rate = IWL_RATE_1M_PLCP;
1619 }
1620
1621 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
1622
1623 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1624 &frame->u.cmd[0]);
1625
1626 iwl4965_free_frame(priv, frame);
1627
1628 return rc;
1629 }
1630
1631 /******************************************************************************
1632 *
1633 * EEPROM related functions
1634 *
1635 ******************************************************************************/
1636
1637 static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
1638 {
1639 memcpy(mac, priv->eeprom.mac_address, 6);
1640 }
1641
1642 static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
1643 {
1644 iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1645 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
1646 }
1647
1648 /**
1649 * iwl4965_eeprom_init - read EEPROM contents
1650 *
1651 * Load the EEPROM contents from adapter into priv->eeprom
1652 *
1653 * NOTE: This routine uses the non-debug IO access functions.
1654 */
1655 int iwl4965_eeprom_init(struct iwl4965_priv *priv)
1656 {
1657 __le16 *e = (__le16 *)&priv->eeprom;
1658 u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
1659 u32 r;
1660 int sz = sizeof(priv->eeprom);
1661 int rc;
1662 int i;
1663 u16 addr;
1664
1665 /* The EEPROM structure has several padding buffers within it
1666 * and when adding new EEPROM maps is subject to programmer errors
1667 * which may be very difficult to identify without explicitly
1668 * checking the resulting size of the eeprom map. */
1669 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1670
1671 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1672 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1673 return -ENOENT;
1674 }
1675
1676 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1677 rc = iwl4965_eeprom_acquire_semaphore(priv);
1678 if (rc < 0) {
1679 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1680 return -ENOENT;
1681 }
1682
1683 /* eeprom is an array of 16bit values */
1684 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1685 _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
1686 _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1687
1688 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1689 i += IWL_EEPROM_ACCESS_DELAY) {
1690 r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
1691 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1692 break;
1693 udelay(IWL_EEPROM_ACCESS_DELAY);
1694 }
1695
1696 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1697 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1698 rc = -ETIMEDOUT;
1699 goto done;
1700 }
1701 e[addr / 2] = cpu_to_le16(r >> 16);
1702 }
1703 rc = 0;
1704
1705 done:
1706 iwl4965_eeprom_release_semaphore(priv);
1707 return rc;
1708 }
1709
1710 /******************************************************************************
1711 *
1712 * Misc. internal state and helper functions
1713 *
1714 ******************************************************************************/
1715 #ifdef CONFIG_IWL4965_DEBUG
1716
1717 /**
1718 * iwl4965_report_frame - dump frame to syslog during debug sessions
1719 *
1720 * You may hack this function to show different aspects of received frames,
1721 * including selective frame dumps.
1722 * group100 parameter selects whether to show 1 out of 100 good frames.
1723 *
1724 * TODO: This was originally written for 3945, need to audit for
1725 * proper operation with 4965.
1726 */
1727 void iwl4965_report_frame(struct iwl4965_priv *priv,
1728 struct iwl4965_rx_packet *pkt,
1729 struct ieee80211_hdr *header, int group100)
1730 {
1731 u32 to_us;
1732 u32 print_summary = 0;
1733 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1734 u32 hundred = 0;
1735 u32 dataframe = 0;
1736 u16 fc;
1737 u16 seq_ctl;
1738 u16 channel;
1739 u16 phy_flags;
1740 int rate_sym;
1741 u16 length;
1742 u16 status;
1743 u16 bcn_tmr;
1744 u32 tsf_low;
1745 u64 tsf;
1746 u8 rssi;
1747 u8 agc;
1748 u16 sig_avg;
1749 u16 noise_diff;
1750 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1751 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1752 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
1753 u8 *data = IWL_RX_DATA(pkt);
1754
1755 /* MAC header */
1756 fc = le16_to_cpu(header->frame_control);
1757 seq_ctl = le16_to_cpu(header->seq_ctrl);
1758
1759 /* metadata */
1760 channel = le16_to_cpu(rx_hdr->channel);
1761 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1762 rate_sym = rx_hdr->rate;
1763 length = le16_to_cpu(rx_hdr->len);
1764
1765 /* end-of-frame status and timestamp */
1766 status = le32_to_cpu(rx_end->status);
1767 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1768 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1769 tsf = le64_to_cpu(rx_end->timestamp);
1770
1771 /* signal statistics */
1772 rssi = rx_stats->rssi;
1773 agc = rx_stats->agc;
1774 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1775 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1776
1777 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1778
1779 /* if data frame is to us and all is good,
1780 * (optionally) print summary for only 1 out of every 100 */
1781 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1782 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1783 dataframe = 1;
1784 if (!group100)
1785 print_summary = 1; /* print each frame */
1786 else if (priv->framecnt_to_us < 100) {
1787 priv->framecnt_to_us++;
1788 print_summary = 0;
1789 } else {
1790 priv->framecnt_to_us = 0;
1791 print_summary = 1;
1792 hundred = 1;
1793 }
1794 } else {
1795 /* print summary for all other frames */
1796 print_summary = 1;
1797 }
1798
1799 if (print_summary) {
1800 char *title;
1801 u32 rate;
1802
1803 if (hundred)
1804 title = "100Frames";
1805 else if (fc & IEEE80211_FCTL_RETRY)
1806 title = "Retry";
1807 else if (ieee80211_is_assoc_response(fc))
1808 title = "AscRsp";
1809 else if (ieee80211_is_reassoc_response(fc))
1810 title = "RasRsp";
1811 else if (ieee80211_is_probe_response(fc)) {
1812 title = "PrbRsp";
1813 print_dump = 1; /* dump frame contents */
1814 } else if (ieee80211_is_beacon(fc)) {
1815 title = "Beacon";
1816 print_dump = 1; /* dump frame contents */
1817 } else if (ieee80211_is_atim(fc))
1818 title = "ATIM";
1819 else if (ieee80211_is_auth(fc))
1820 title = "Auth";
1821 else if (ieee80211_is_deauth(fc))
1822 title = "DeAuth";
1823 else if (ieee80211_is_disassoc(fc))
1824 title = "DisAssoc";
1825 else
1826 title = "Frame";
1827
1828 rate = iwl4965_rate_index_from_plcp(rate_sym);
1829 if (rate == -1)
1830 rate = 0;
1831 else
1832 rate = iwl4965_rates[rate].ieee / 2;
1833
1834 /* print frame summary.
1835 * MAC addresses show just the last byte (for brevity),
1836 * but you can hack it to show more, if you'd like to. */
1837 if (dataframe)
1838 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1839 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1840 title, fc, header->addr1[5],
1841 length, rssi, channel, rate);
1842 else {
1843 /* src/dst addresses assume managed mode */
1844 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1845 "src=0x%02x, rssi=%u, tim=%lu usec, "
1846 "phy=0x%02x, chnl=%d\n",
1847 title, fc, header->addr1[5],
1848 header->addr3[5], rssi,
1849 tsf_low - priv->scan_start_tsf,
1850 phy_flags, channel);
1851 }
1852 }
1853 if (print_dump)
1854 iwl4965_print_hex_dump(IWL_DL_RX, data, length);
1855 }
1856 #endif
1857
1858 static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
1859 {
1860 if (priv->hw_setting.shared_virt)
1861 pci_free_consistent(priv->pci_dev,
1862 sizeof(struct iwl4965_shared),
1863 priv->hw_setting.shared_virt,
1864 priv->hw_setting.shared_phys);
1865 }
1866
1867 /**
1868 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
1869 *
1870 * return : set the bit for each supported rate insert in ie
1871 */
1872 static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1873 u16 basic_rate, int *left)
1874 {
1875 u16 ret_rates = 0, bit;
1876 int i;
1877 u8 *cnt = ie;
1878 u8 *rates = ie + 1;
1879
1880 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1881 if (bit & supported_rate) {
1882 ret_rates |= bit;
1883 rates[*cnt] = iwl4965_rates[i].ieee |
1884 ((bit & basic_rate) ? 0x80 : 0x00);
1885 (*cnt)++;
1886 (*left)--;
1887 if ((*left <= 0) ||
1888 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1889 break;
1890 }
1891 }
1892
1893 return ret_rates;
1894 }
1895
1896 #ifdef CONFIG_IWL4965_HT
1897 void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
1898 struct ieee80211_ht_cap *ht_cap,
1899 u8 use_current_config);
1900 #endif
1901
1902 /**
1903 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
1904 */
1905 static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
1906 struct ieee80211_mgmt *frame,
1907 int left, int is_direct)
1908 {
1909 int len = 0;
1910 u8 *pos = NULL;
1911 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
1912 #ifdef CONFIG_IWL4965_HT
1913 struct ieee80211_hw_mode *mode;
1914 #endif /* CONFIG_IWL4965_HT */
1915
1916 /* Make sure there is enough space for the probe request,
1917 * two mandatory IEs and the data */
1918 left -= 24;
1919 if (left < 0)
1920 return 0;
1921 len += 24;
1922
1923 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1924 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
1925 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1926 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
1927 frame->seq_ctrl = 0;
1928
1929 /* fill in our indirect SSID IE */
1930 /* ...next IE... */
1931
1932 left -= 2;
1933 if (left < 0)
1934 return 0;
1935 len += 2;
1936 pos = &(frame->u.probe_req.variable[0]);
1937 *pos++ = WLAN_EID_SSID;
1938 *pos++ = 0;
1939
1940 /* fill in our direct SSID IE... */
1941 if (is_direct) {
1942 /* ...next IE... */
1943 left -= 2 + priv->essid_len;
1944 if (left < 0)
1945 return 0;
1946 /* ... fill it in... */
1947 *pos++ = WLAN_EID_SSID;
1948 *pos++ = priv->essid_len;
1949 memcpy(pos, priv->essid, priv->essid_len);
1950 pos += priv->essid_len;
1951 len += 2 + priv->essid_len;
1952 }
1953
1954 /* fill in supported rate */
1955 /* ...next IE... */
1956 left -= 2;
1957 if (left < 0)
1958 return 0;
1959
1960 /* ... fill it in... */
1961 *pos++ = WLAN_EID_SUPP_RATES;
1962 *pos = 0;
1963
1964 /* exclude 60M rate */
1965 active_rates = priv->rates_mask;
1966 active_rates &= ~IWL_RATE_60M_MASK;
1967
1968 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
1969
1970 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1971 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
1972 active_rate_basic, &left);
1973 active_rates &= ~ret_rates;
1974
1975 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
1976 active_rate_basic, &left);
1977 active_rates &= ~ret_rates;
1978
1979 len += 2 + *pos;
1980 pos += (*pos) + 1;
1981 if (active_rates == 0)
1982 goto fill_end;
1983
1984 /* fill in supported extended rate */
1985 /* ...next IE... */
1986 left -= 2;
1987 if (left < 0)
1988 return 0;
1989 /* ... fill it in... */
1990 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1991 *pos = 0;
1992 iwl4965_supported_rate_to_ie(pos, active_rates,
1993 active_rate_basic, &left);
1994 if (*pos > 0)
1995 len += 2 + *pos;
1996
1997 #ifdef CONFIG_IWL4965_HT
1998 mode = priv->hw->conf.mode;
1999 if (mode->ht_info.ht_supported) {
2000 pos += (*pos) + 1;
2001 *pos++ = WLAN_EID_HT_CAPABILITY;
2002 *pos++ = sizeof(struct ieee80211_ht_cap);
2003 iwl4965_set_ht_capab(priv->hw,
2004 (struct ieee80211_ht_cap *)pos, 0);
2005 len += 2 + sizeof(struct ieee80211_ht_cap);
2006 }
2007 #endif /*CONFIG_IWL4965_HT */
2008
2009 fill_end:
2010 return (u16)len;
2011 }
2012
2013 /*
2014 * QoS support
2015 */
2016 #ifdef CONFIG_IWL4965_QOS
2017 static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
2018 struct iwl4965_qosparam_cmd *qos)
2019 {
2020
2021 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
2022 sizeof(struct iwl4965_qosparam_cmd), qos);
2023 }
2024
2025 static void iwl4965_reset_qos(struct iwl4965_priv *priv)
2026 {
2027 u16 cw_min = 15;
2028 u16 cw_max = 1023;
2029 u8 aifs = 2;
2030 u8 is_legacy = 0;
2031 unsigned long flags;
2032 int i;
2033
2034 spin_lock_irqsave(&priv->lock, flags);
2035 priv->qos_data.qos_active = 0;
2036
2037 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
2038 if (priv->qos_data.qos_enable)
2039 priv->qos_data.qos_active = 1;
2040 if (!(priv->active_rate & 0xfff0)) {
2041 cw_min = 31;
2042 is_legacy = 1;
2043 }
2044 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2045 if (priv->qos_data.qos_enable)
2046 priv->qos_data.qos_active = 1;
2047 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
2048 cw_min = 31;
2049 is_legacy = 1;
2050 }
2051
2052 if (priv->qos_data.qos_active)
2053 aifs = 3;
2054
2055 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
2056 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
2057 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
2058 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
2059 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
2060
2061 if (priv->qos_data.qos_active) {
2062 i = 1;
2063 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
2064 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
2065 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
2066 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2067 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2068
2069 i = 2;
2070 priv->qos_data.def_qos_parm.ac[i].cw_min =
2071 cpu_to_le16((cw_min + 1) / 2 - 1);
2072 priv->qos_data.def_qos_parm.ac[i].cw_max =
2073 cpu_to_le16(cw_max);
2074 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2075 if (is_legacy)
2076 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2077 cpu_to_le16(6016);
2078 else
2079 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2080 cpu_to_le16(3008);
2081 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2082
2083 i = 3;
2084 priv->qos_data.def_qos_parm.ac[i].cw_min =
2085 cpu_to_le16((cw_min + 1) / 4 - 1);
2086 priv->qos_data.def_qos_parm.ac[i].cw_max =
2087 cpu_to_le16((cw_max + 1) / 2 - 1);
2088 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2089 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2090 if (is_legacy)
2091 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2092 cpu_to_le16(3264);
2093 else
2094 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2095 cpu_to_le16(1504);
2096 } else {
2097 for (i = 1; i < 4; i++) {
2098 priv->qos_data.def_qos_parm.ac[i].cw_min =
2099 cpu_to_le16(cw_min);
2100 priv->qos_data.def_qos_parm.ac[i].cw_max =
2101 cpu_to_le16(cw_max);
2102 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2103 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2104 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2105 }
2106 }
2107 IWL_DEBUG_QOS("set QoS to default \n");
2108
2109 spin_unlock_irqrestore(&priv->lock, flags);
2110 }
2111
2112 static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
2113 {
2114 unsigned long flags;
2115
2116 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2117 return;
2118
2119 if (!priv->qos_data.qos_enable)
2120 return;
2121
2122 spin_lock_irqsave(&priv->lock, flags);
2123 priv->qos_data.def_qos_parm.qos_flags = 0;
2124
2125 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2126 !priv->qos_data.qos_cap.q_AP.txop_request)
2127 priv->qos_data.def_qos_parm.qos_flags |=
2128 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2129 if (priv->qos_data.qos_active)
2130 priv->qos_data.def_qos_parm.qos_flags |=
2131 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2132
2133 #ifdef CONFIG_IWL4965_HT
2134 if (priv->current_ht_config.is_ht)
2135 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
2136 #endif /* CONFIG_IWL4965_HT */
2137
2138 spin_unlock_irqrestore(&priv->lock, flags);
2139
2140 if (force || iwl4965_is_associated(priv)) {
2141 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
2142 priv->qos_data.qos_active,
2143 priv->qos_data.def_qos_parm.qos_flags);
2144
2145 iwl4965_send_qos_params_command(priv,
2146 &(priv->qos_data.def_qos_parm));
2147 }
2148 }
2149
2150 #endif /* CONFIG_IWL4965_QOS */
2151 /*
2152 * Power management (not Tx power!) functions
2153 */
2154 #define MSEC_TO_USEC 1024
2155
2156 #define NOSLP __constant_cpu_to_le16(0), 0, 0
2157 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
2158 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2159 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2160 __constant_cpu_to_le32(X1), \
2161 __constant_cpu_to_le32(X2), \
2162 __constant_cpu_to_le32(X3), \
2163 __constant_cpu_to_le32(X4)}
2164
2165
2166 /* default power management (not Tx power) table values */
2167 /* for tim 0-10 */
2168 static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
2169 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2170 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2171 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2172 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2173 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2174 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2175 };
2176
2177 /* for tim > 10 */
2178 static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
2179 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2180 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2181 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2182 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2183 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2184 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2185 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2186 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2187 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2188 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2189 };
2190
2191 int iwl4965_power_init_handle(struct iwl4965_priv *priv)
2192 {
2193 int rc = 0, i;
2194 struct iwl4965_power_mgr *pow_data;
2195 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
2196 u16 pci_pm;
2197
2198 IWL_DEBUG_POWER("Initialize power \n");
2199
2200 pow_data = &(priv->power_data);
2201
2202 memset(pow_data, 0, sizeof(*pow_data));
2203
2204 pow_data->active_index = IWL_POWER_RANGE_0;
2205 pow_data->dtim_val = 0xffff;
2206
2207 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2208 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2209
2210 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2211 if (rc != 0)
2212 return 0;
2213 else {
2214 struct iwl4965_powertable_cmd *cmd;
2215
2216 IWL_DEBUG_POWER("adjust power command flags\n");
2217
2218 for (i = 0; i < IWL_POWER_AC; i++) {
2219 cmd = &pow_data->pwr_range_0[i].cmd;
2220
2221 if (pci_pm & 0x1)
2222 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2223 else
2224 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2225 }
2226 }
2227 return rc;
2228 }
2229
2230 static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
2231 struct iwl4965_powertable_cmd *cmd, u32 mode)
2232 {
2233 int rc = 0, i;
2234 u8 skip;
2235 u32 max_sleep = 0;
2236 struct iwl4965_power_vec_entry *range;
2237 u8 period = 0;
2238 struct iwl4965_power_mgr *pow_data;
2239
2240 if (mode > IWL_POWER_INDEX_5) {
2241 IWL_DEBUG_POWER("Error invalid power mode \n");
2242 return -1;
2243 }
2244 pow_data = &(priv->power_data);
2245
2246 if (pow_data->active_index == IWL_POWER_RANGE_0)
2247 range = &pow_data->pwr_range_0[0];
2248 else
2249 range = &pow_data->pwr_range_1[1];
2250
2251 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
2252
2253 #ifdef IWL_MAC80211_DISABLE
2254 if (priv->assoc_network != NULL) {
2255 unsigned long flags;
2256
2257 period = priv->assoc_network->tim.tim_period;
2258 }
2259 #endif /*IWL_MAC80211_DISABLE */
2260 skip = range[mode].no_dtim;
2261
2262 if (period == 0) {
2263 period = 1;
2264 skip = 0;
2265 }
2266
2267 if (skip == 0) {
2268 max_sleep = period;
2269 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2270 } else {
2271 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2272 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2273 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2274 }
2275
2276 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2277 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2278 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2279 }
2280
2281 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2282 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2283 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2284 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2285 le32_to_cpu(cmd->sleep_interval[0]),
2286 le32_to_cpu(cmd->sleep_interval[1]),
2287 le32_to_cpu(cmd->sleep_interval[2]),
2288 le32_to_cpu(cmd->sleep_interval[3]),
2289 le32_to_cpu(cmd->sleep_interval[4]));
2290
2291 return rc;
2292 }
2293
2294 static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
2295 {
2296 u32 uninitialized_var(final_mode);
2297 int rc;
2298 struct iwl4965_powertable_cmd cmd;
2299
2300 /* If on battery, set to 3,
2301 * if plugged into AC power, set to CAM ("continuously aware mode"),
2302 * else user level */
2303 switch (mode) {
2304 case IWL_POWER_BATTERY:
2305 final_mode = IWL_POWER_INDEX_3;
2306 break;
2307 case IWL_POWER_AC:
2308 final_mode = IWL_POWER_MODE_CAM;
2309 break;
2310 default:
2311 final_mode = mode;
2312 break;
2313 }
2314
2315 cmd.keep_alive_beacons = 0;
2316
2317 iwl4965_update_power_cmd(priv, &cmd, final_mode);
2318
2319 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2320
2321 if (final_mode == IWL_POWER_MODE_CAM)
2322 clear_bit(STATUS_POWER_PMI, &priv->status);
2323 else
2324 set_bit(STATUS_POWER_PMI, &priv->status);
2325
2326 return rc;
2327 }
2328
2329 int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
2330 {
2331 /* Filter incoming packets to determine if they are targeted toward
2332 * this network, discarding packets coming from ourselves */
2333 switch (priv->iw_mode) {
2334 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2335 /* packets from our adapter are dropped (echo) */
2336 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2337 return 0;
2338 /* {broad,multi}cast packets to our IBSS go through */
2339 if (is_multicast_ether_addr(header->addr1))
2340 return !compare_ether_addr(header->addr3, priv->bssid);
2341 /* packets to our adapter go through */
2342 return !compare_ether_addr(header->addr1, priv->mac_addr);
2343 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2344 /* packets from our adapter are dropped (echo) */
2345 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2346 return 0;
2347 /* {broad,multi}cast packets to our BSS go through */
2348 if (is_multicast_ether_addr(header->addr1))
2349 return !compare_ether_addr(header->addr2, priv->bssid);
2350 /* packets to our adapter go through */
2351 return !compare_ether_addr(header->addr1, priv->mac_addr);
2352 }
2353
2354 return 1;
2355 }
2356
2357 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2358
2359 static const char *iwl4965_get_tx_fail_reason(u32 status)
2360 {
2361 switch (status & TX_STATUS_MSK) {
2362 case TX_STATUS_SUCCESS:
2363 return "SUCCESS";
2364 TX_STATUS_ENTRY(SHORT_LIMIT);
2365 TX_STATUS_ENTRY(LONG_LIMIT);
2366 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2367 TX_STATUS_ENTRY(MGMNT_ABORT);
2368 TX_STATUS_ENTRY(NEXT_FRAG);
2369 TX_STATUS_ENTRY(LIFE_EXPIRE);
2370 TX_STATUS_ENTRY(DEST_PS);
2371 TX_STATUS_ENTRY(ABORTED);
2372 TX_STATUS_ENTRY(BT_RETRY);
2373 TX_STATUS_ENTRY(STA_INVALID);
2374 TX_STATUS_ENTRY(FRAG_DROPPED);
2375 TX_STATUS_ENTRY(TID_DISABLE);
2376 TX_STATUS_ENTRY(FRAME_FLUSHED);
2377 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2378 TX_STATUS_ENTRY(TX_LOCKED);
2379 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2380 }
2381
2382 return "UNKNOWN";
2383 }
2384
2385 /**
2386 * iwl4965_scan_cancel - Cancel any currently executing HW scan
2387 *
2388 * NOTE: priv->mutex is not required before calling this function
2389 */
2390 static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
2391 {
2392 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2393 clear_bit(STATUS_SCANNING, &priv->status);
2394 return 0;
2395 }
2396
2397 if (test_bit(STATUS_SCANNING, &priv->status)) {
2398 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2399 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2400 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2401 queue_work(priv->workqueue, &priv->abort_scan);
2402
2403 } else
2404 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2405
2406 return test_bit(STATUS_SCANNING, &priv->status);
2407 }
2408
2409 return 0;
2410 }
2411
2412 /**
2413 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
2414 * @ms: amount of time to wait (in milliseconds) for scan to abort
2415 *
2416 * NOTE: priv->mutex must be held before calling this function
2417 */
2418 static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
2419 {
2420 unsigned long now = jiffies;
2421 int ret;
2422
2423 ret = iwl4965_scan_cancel(priv);
2424 if (ret && ms) {
2425 mutex_unlock(&priv->mutex);
2426 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2427 test_bit(STATUS_SCANNING, &priv->status))
2428 msleep(1);
2429 mutex_lock(&priv->mutex);
2430
2431 return test_bit(STATUS_SCANNING, &priv->status);
2432 }
2433
2434 return ret;
2435 }
2436
2437 static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
2438 {
2439 /* Reset ieee stats */
2440
2441 /* We don't reset the net_device_stats (ieee->stats) on
2442 * re-association */
2443
2444 priv->last_seq_num = -1;
2445 priv->last_frag_num = -1;
2446 priv->last_packet_time = 0;
2447
2448 iwl4965_scan_cancel(priv);
2449 }
2450
2451 #define MAX_UCODE_BEACON_INTERVAL 4096
2452 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2453
2454 static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
2455 {
2456 u16 new_val = 0;
2457 u16 beacon_factor = 0;
2458
2459 beacon_factor =
2460 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2461 / MAX_UCODE_BEACON_INTERVAL;
2462 new_val = beacon_val / beacon_factor;
2463
2464 return cpu_to_le16(new_val);
2465 }
2466
2467 static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
2468 {
2469 u64 interval_tm_unit;
2470 u64 tsf, result;
2471 unsigned long flags;
2472 struct ieee80211_conf *conf = NULL;
2473 u16 beacon_int = 0;
2474
2475 conf = ieee80211_get_hw_conf(priv->hw);
2476
2477 spin_lock_irqsave(&priv->lock, flags);
2478 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2479 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2480
2481 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2482
2483 tsf = priv->timestamp1;
2484 tsf = ((tsf << 32) | priv->timestamp0);
2485
2486 beacon_int = priv->beacon_int;
2487 spin_unlock_irqrestore(&priv->lock, flags);
2488
2489 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2490 if (beacon_int == 0) {
2491 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2492 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2493 } else {
2494 priv->rxon_timing.beacon_interval =
2495 cpu_to_le16(beacon_int);
2496 priv->rxon_timing.beacon_interval =
2497 iwl4965_adjust_beacon_interval(
2498 le16_to_cpu(priv->rxon_timing.beacon_interval));
2499 }
2500
2501 priv->rxon_timing.atim_window = 0;
2502 } else {
2503 priv->rxon_timing.beacon_interval =
2504 iwl4965_adjust_beacon_interval(conf->beacon_int);
2505 /* TODO: we need to get atim_window from upper stack
2506 * for now we set to 0 */
2507 priv->rxon_timing.atim_window = 0;
2508 }
2509
2510 interval_tm_unit =
2511 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2512 result = do_div(tsf, interval_tm_unit);
2513 priv->rxon_timing.beacon_init_val =
2514 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2515
2516 IWL_DEBUG_ASSOC
2517 ("beacon interval %d beacon timer %d beacon tim %d\n",
2518 le16_to_cpu(priv->rxon_timing.beacon_interval),
2519 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2520 le16_to_cpu(priv->rxon_timing.atim_window));
2521 }
2522
2523 static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
2524 {
2525 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2526 IWL_ERROR("APs don't scan.\n");
2527 return 0;
2528 }
2529
2530 if (!iwl4965_is_ready_rf(priv)) {
2531 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2532 return -EIO;
2533 }
2534
2535 if (test_bit(STATUS_SCANNING, &priv->status)) {
2536 IWL_DEBUG_SCAN("Scan already in progress.\n");
2537 return -EAGAIN;
2538 }
2539
2540 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2541 IWL_DEBUG_SCAN("Scan request while abort pending. "
2542 "Queuing.\n");
2543 return -EAGAIN;
2544 }
2545
2546 IWL_DEBUG_INFO("Starting scan...\n");
2547 priv->scan_bands = 2;
2548 set_bit(STATUS_SCANNING, &priv->status);
2549 priv->scan_start = jiffies;
2550 priv->scan_pass_start = priv->scan_start;
2551
2552 queue_work(priv->workqueue, &priv->request_scan);
2553
2554 return 0;
2555 }
2556
2557 static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
2558 {
2559 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
2560
2561 if (hw_decrypt)
2562 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2563 else
2564 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2565
2566 return 0;
2567 }
2568
2569 static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
2570 {
2571 if (phymode == MODE_IEEE80211A) {
2572 priv->staging_rxon.flags &=
2573 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2574 | RXON_FLG_CCK_MSK);
2575 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2576 } else {
2577 /* Copied from iwl4965_bg_post_associate() */
2578 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2579 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2580 else
2581 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2582
2583 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2584 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2585
2586 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2587 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2588 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2589 }
2590 }
2591
2592 /*
2593 * initialize rxon structure with default values from eeprom
2594 */
2595 static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
2596 {
2597 const struct iwl4965_channel_info *ch_info;
2598
2599 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2600
2601 switch (priv->iw_mode) {
2602 case IEEE80211_IF_TYPE_AP:
2603 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2604 break;
2605
2606 case IEEE80211_IF_TYPE_STA:
2607 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2608 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2609 break;
2610
2611 case IEEE80211_IF_TYPE_IBSS:
2612 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2613 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2614 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2615 RXON_FILTER_ACCEPT_GRP_MSK;
2616 break;
2617
2618 case IEEE80211_IF_TYPE_MNTR:
2619 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2620 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2621 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2622 break;
2623 }
2624
2625 #if 0
2626 /* TODO: Figure out when short_preamble would be set and cache from
2627 * that */
2628 if (!hw_to_local(priv->hw)->short_preamble)
2629 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2630 else
2631 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2632 #endif
2633
2634 ch_info = iwl4965_get_channel_info(priv, priv->phymode,
2635 le16_to_cpu(priv->staging_rxon.channel));
2636
2637 if (!ch_info)
2638 ch_info = &priv->channel_info[0];
2639
2640 /*
2641 * in some case A channels are all non IBSS
2642 * in this case force B/G channel
2643 */
2644 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2645 !(is_channel_ibss(ch_info)))
2646 ch_info = &priv->channel_info[0];
2647
2648 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2649 if (is_channel_a_band(ch_info))
2650 priv->phymode = MODE_IEEE80211A;
2651 else
2652 priv->phymode = MODE_IEEE80211G;
2653
2654 iwl4965_set_flags_for_phymode(priv, priv->phymode);
2655
2656 priv->staging_rxon.ofdm_basic_rates =
2657 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2658 priv->staging_rxon.cck_basic_rates =
2659 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2660
2661 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2662 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2663 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2664 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2665 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2666 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2667 iwl4965_set_rxon_chain(priv);
2668 }
2669
2670 static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
2671 {
2672 if (mode == IEEE80211_IF_TYPE_IBSS) {
2673 const struct iwl4965_channel_info *ch_info;
2674
2675 ch_info = iwl4965_get_channel_info(priv,
2676 priv->phymode,
2677 le16_to_cpu(priv->staging_rxon.channel));
2678
2679 if (!ch_info || !is_channel_ibss(ch_info)) {
2680 IWL_ERROR("channel %d not IBSS channel\n",
2681 le16_to_cpu(priv->staging_rxon.channel));
2682 return -EINVAL;
2683 }
2684 }
2685
2686 priv->iw_mode = mode;
2687
2688 iwl4965_connection_init_rx_config(priv);
2689 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2690
2691 iwl4965_clear_stations_table(priv);
2692
2693 /* dont commit rxon if rf-kill is on*/
2694 if (!iwl4965_is_ready_rf(priv))
2695 return -EAGAIN;
2696
2697 cancel_delayed_work(&priv->scan_check);
2698 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2699 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2700 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2701 return -EAGAIN;
2702 }
2703
2704 iwl4965_commit_rxon(priv);
2705
2706 return 0;
2707 }
2708
2709 static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
2710 struct ieee80211_tx_control *ctl,
2711 struct iwl4965_cmd *cmd,
2712 struct sk_buff *skb_frag,
2713 int last_frag)
2714 {
2715 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2716
2717 switch (keyinfo->alg) {
2718 case ALG_CCMP:
2719 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2720 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2721 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2722 break;
2723
2724 case ALG_TKIP:
2725 #if 0
2726 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2727
2728 if (last_frag)
2729 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2730 8);
2731 else
2732 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2733 #endif
2734 break;
2735
2736 case ALG_WEP:
2737 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2738 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2739
2740 if (keyinfo->keylen == 13)
2741 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2742
2743 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2744
2745 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2746 "with key %d\n", ctl->key_idx);
2747 break;
2748
2749 default:
2750 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2751 break;
2752 }
2753 }
2754
2755 /*
2756 * handle build REPLY_TX command notification.
2757 */
2758 static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
2759 struct iwl4965_cmd *cmd,
2760 struct ieee80211_tx_control *ctrl,
2761 struct ieee80211_hdr *hdr,
2762 int is_unicast, u8 std_id)
2763 {
2764 __le16 *qc;
2765 u16 fc = le16_to_cpu(hdr->frame_control);
2766 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2767
2768 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2769 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2770 tx_flags |= TX_CMD_FLG_ACK_MSK;
2771 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2772 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2773 if (ieee80211_is_probe_response(fc) &&
2774 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2775 tx_flags |= TX_CMD_FLG_TSF_MSK;
2776 } else {
2777 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2778 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2779 }
2780
2781 if (ieee80211_is_back_request(fc))
2782 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2783
2784
2785 cmd->cmd.tx.sta_id = std_id;
2786 if (ieee80211_get_morefrag(hdr))
2787 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2788
2789 qc = ieee80211_get_qos_ctrl(hdr);
2790 if (qc) {
2791 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2792 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2793 } else
2794 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2795
2796 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2797 tx_flags |= TX_CMD_FLG_RTS_MSK;
2798 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2799 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2800 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2801 tx_flags |= TX_CMD_FLG_CTS_MSK;
2802 }
2803
2804 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2805 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2806
2807 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2808 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2809 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2810 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2811 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2812 else
2813 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2814 } else
2815 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2816
2817 cmd->cmd.tx.driver_txop = 0;
2818 cmd->cmd.tx.tx_flags = tx_flags;
2819 cmd->cmd.tx.next_frame_len = 0;
2820 }
2821
2822 /**
2823 * iwl4965_get_sta_id - Find station's index within station table
2824 *
2825 * If new IBSS station, create new entry in station table
2826 */
2827 static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
2828 struct ieee80211_hdr *hdr)
2829 {
2830 int sta_id;
2831 u16 fc = le16_to_cpu(hdr->frame_control);
2832 DECLARE_MAC_BUF(mac);
2833
2834 /* If this frame is broadcast or management, use broadcast station id */
2835 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2836 is_multicast_ether_addr(hdr->addr1))
2837 return priv->hw_setting.bcast_sta_id;
2838
2839 switch (priv->iw_mode) {
2840
2841 /* If we are a client station in a BSS network, use the special
2842 * AP station entry (that's the only station we communicate with) */
2843 case IEEE80211_IF_TYPE_STA:
2844 return IWL_AP_ID;
2845
2846 /* If we are an AP, then find the station, or use BCAST */
2847 case IEEE80211_IF_TYPE_AP:
2848 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
2849 if (sta_id != IWL_INVALID_STATION)
2850 return sta_id;
2851 return priv->hw_setting.bcast_sta_id;
2852
2853 /* If this frame is going out to an IBSS network, find the station,
2854 * or create a new station table entry */
2855 case IEEE80211_IF_TYPE_IBSS:
2856 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
2857 if (sta_id != IWL_INVALID_STATION)
2858 return sta_id;
2859
2860 /* Create new station table entry */
2861 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2862 0, CMD_ASYNC, NULL);
2863
2864 if (sta_id != IWL_INVALID_STATION)
2865 return sta_id;
2866
2867 IWL_DEBUG_DROP("Station %s not in station map. "
2868 "Defaulting to broadcast...\n",
2869 print_mac(mac, hdr->addr1));
2870 iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2871 return priv->hw_setting.bcast_sta_id;
2872
2873 default:
2874 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2875 return priv->hw_setting.bcast_sta_id;
2876 }
2877 }
2878
2879 /*
2880 * start REPLY_TX command process
2881 */
2882 static int iwl4965_tx_skb(struct iwl4965_priv *priv,
2883 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2884 {
2885 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2886 struct iwl4965_tfd_frame *tfd;
2887 u32 *control_flags;
2888 int txq_id = ctl->queue;
2889 struct iwl4965_tx_queue *txq = NULL;
2890 struct iwl4965_queue *q = NULL;
2891 dma_addr_t phys_addr;
2892 dma_addr_t txcmd_phys;
2893 dma_addr_t scratch_phys;
2894 struct iwl4965_cmd *out_cmd = NULL;
2895 u16 len, idx, len_org;
2896 u8 id, hdr_len, unicast;
2897 u8 sta_id;
2898 u16 seq_number = 0;
2899 u16 fc;
2900 __le16 *qc;
2901 u8 wait_write_ptr = 0;
2902 unsigned long flags;
2903 int rc;
2904
2905 spin_lock_irqsave(&priv->lock, flags);
2906 if (iwl4965_is_rfkill(priv)) {
2907 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2908 goto drop_unlock;
2909 }
2910
2911 if (!priv->vif) {
2912 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
2913 goto drop_unlock;
2914 }
2915
2916 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2917 IWL_ERROR("ERROR: No TX rate available.\n");
2918 goto drop_unlock;
2919 }
2920
2921 unicast = !is_multicast_ether_addr(hdr->addr1);
2922 id = 0;
2923
2924 fc = le16_to_cpu(hdr->frame_control);
2925
2926 #ifdef CONFIG_IWL4965_DEBUG
2927 if (ieee80211_is_auth(fc))
2928 IWL_DEBUG_TX("Sending AUTH frame\n");
2929 else if (ieee80211_is_assoc_request(fc))
2930 IWL_DEBUG_TX("Sending ASSOC frame\n");
2931 else if (ieee80211_is_reassoc_request(fc))
2932 IWL_DEBUG_TX("Sending REASSOC frame\n");
2933 #endif
2934
2935 /* drop all data frame if we are not associated */
2936 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
2937 (!iwl4965_is_associated(priv) ||
2938 !priv->assoc_id ||
2939 !priv->assoc_station_added)) {
2940 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
2941 goto drop_unlock;
2942 }
2943
2944 spin_unlock_irqrestore(&priv->lock, flags);
2945
2946 hdr_len = ieee80211_get_hdrlen(fc);
2947
2948 /* Find (or create) index into station table for destination station */
2949 sta_id = iwl4965_get_sta_id(priv, hdr);
2950 if (sta_id == IWL_INVALID_STATION) {
2951 DECLARE_MAC_BUF(mac);
2952
2953 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2954 print_mac(mac, hdr->addr1));
2955 goto drop;
2956 }
2957
2958 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2959
2960 qc = ieee80211_get_qos_ctrl(hdr);
2961 if (qc) {
2962 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2963 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2964 IEEE80211_SCTL_SEQ;
2965 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2966 (hdr->seq_ctrl &
2967 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2968 seq_number += 0x10;
2969 #ifdef CONFIG_IWL4965_HT
2970 #ifdef CONFIG_IWL4965_HT_AGG
2971 /* aggregation is on for this <sta,tid> */
2972 if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
2973 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
2974 #endif /* CONFIG_IWL4965_HT_AGG */
2975 #endif /* CONFIG_IWL4965_HT */
2976 }
2977
2978 /* Descriptor for chosen Tx queue */
2979 txq = &priv->txq[txq_id];
2980 q = &txq->q;
2981
2982 spin_lock_irqsave(&priv->lock, flags);
2983
2984 /* Set up first empty TFD within this queue's circular TFD buffer */
2985 tfd = &txq->bd[q->write_ptr];
2986 memset(tfd, 0, sizeof(*tfd));
2987 control_flags = (u32 *) tfd;
2988 idx = get_cmd_index(q, q->write_ptr, 0);
2989
2990 /* Set up driver data for this TFD */
2991 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
2992 txq->txb[q->write_ptr].skb[0] = skb;
2993 memcpy(&(txq->txb[q->write_ptr].status.control),
2994 ctl, sizeof(struct ieee80211_tx_control));
2995
2996 /* Set up first empty entry in queue's array of Tx/cmd buffers */
2997 out_cmd = &txq->cmd[idx];
2998 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2999 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
3000
3001 /*
3002 * Set up the Tx-command (not MAC!) header.
3003 * Store the chosen Tx queue and TFD index within the sequence field;
3004 * after Tx, uCode's Tx response will return this value so driver can
3005 * locate the frame within the tx queue and do post-tx processing.
3006 */
3007 out_cmd->hdr.cmd = REPLY_TX;
3008 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
3009 INDEX_TO_SEQ(q->write_ptr)));
3010
3011 /* Copy MAC header from skb into command buffer */
3012 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
3013
3014 /*
3015 * Use the first empty entry in this queue's command buffer array
3016 * to contain the Tx command and MAC header concatenated together
3017 * (payload data will be in another buffer).
3018 * Size of this varies, due to varying MAC header length.
3019 * If end is not dword aligned, we'll have 2 extra bytes at the end
3020 * of the MAC header (device reads on dword boundaries).
3021 * We'll tell device about this padding later.
3022 */
3023 len = priv->hw_setting.tx_cmd_len +
3024 sizeof(struct iwl4965_cmd_header) + hdr_len;
3025
3026 len_org = len;
3027 len = (len + 3) & ~3;
3028
3029 if (len_org != len)
3030 len_org = 1;
3031 else
3032 len_org = 0;
3033
3034 /* Physical address of this Tx command's header (not MAC header!),
3035 * within command buffer array. */
3036 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
3037 offsetof(struct iwl4965_cmd, hdr);
3038
3039 /* Add buffer containing Tx command and MAC(!) header to TFD's
3040 * first entry */
3041 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
3042
3043 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
3044 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
3045
3046 /* Set up TFD's 2nd entry to point directly to remainder of skb,
3047 * if any (802.11 null frames have no payload). */
3048 len = skb->len - hdr_len;
3049 if (len) {
3050 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
3051 len, PCI_DMA_TODEVICE);
3052 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
3053 }
3054
3055 /* Tell 4965 about any 2-byte padding after MAC header */
3056 if (len_org)
3057 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
3058
3059 /* Total # bytes to be transmitted */
3060 len = (u16)skb->len;
3061 out_cmd->cmd.tx.len = cpu_to_le16(len);
3062
3063 /* TODO need this for burst mode later on */
3064 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
3065
3066 /* set is_hcca to 0; it probably will never be implemented */
3067 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
3068
3069 scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
3070 offsetof(struct iwl4965_tx_cmd, scratch);
3071 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
3072 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
3073
3074 #ifdef CONFIG_IWL4965_HT_AGG
3075 #ifdef CONFIG_IWL4965_HT
3076 /* TODO: move this functionality to rate scaling */
3077 iwl4965_tl_get_stats(priv, hdr);
3078 #endif /* CONFIG_IWL4965_HT_AGG */
3079 #endif /*CONFIG_IWL4965_HT */
3080
3081
3082 if (!ieee80211_get_morefrag(hdr)) {
3083 txq->need_update = 1;
3084 if (qc) {
3085 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
3086 priv->stations[sta_id].tid[tid].seq_number = seq_number;
3087 }
3088 } else {
3089 wait_write_ptr = 1;
3090 txq->need_update = 0;
3091 }
3092
3093 iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
3094 sizeof(out_cmd->cmd.tx));
3095
3096 iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
3097 ieee80211_get_hdrlen(fc));
3098
3099 /* Set up entry for this TFD in Tx byte-count array */
3100 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
3101
3102 /* Tell device the write index *just past* this latest filled TFD */
3103 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
3104 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
3105 spin_unlock_irqrestore(&priv->lock, flags);
3106
3107 if (rc)
3108 return rc;
3109
3110 if ((iwl4965_queue_space(q) < q->high_mark)
3111 && priv->mac80211_registered) {
3112 if (wait_write_ptr) {
3113 spin_lock_irqsave(&priv->lock, flags);
3114 txq->need_update = 1;
3115 iwl4965_tx_queue_update_write_ptr(priv, txq);
3116 spin_unlock_irqrestore(&priv->lock, flags);
3117 }
3118
3119 ieee80211_stop_queue(priv->hw, ctl->queue);
3120 }
3121
3122 return 0;
3123
3124 drop_unlock:
3125 spin_unlock_irqrestore(&priv->lock, flags);
3126 drop:
3127 return -1;
3128 }
3129
3130 static void iwl4965_set_rate(struct iwl4965_priv *priv)
3131 {
3132 const struct ieee80211_hw_mode *hw = NULL;
3133 struct ieee80211_rate *rate;
3134 int i;
3135
3136 hw = iwl4965_get_hw_mode(priv, priv->phymode);
3137 if (!hw) {
3138 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3139 return;
3140 }
3141
3142 priv->active_rate = 0;
3143 priv->active_rate_basic = 0;
3144
3145 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
3146 hw->mode == MODE_IEEE80211A ?
3147 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
3148
3149 for (i = 0; i < hw->num_rates; i++) {
3150 rate = &(hw->rates[i]);
3151 if ((rate->val < IWL_RATE_COUNT) &&
3152 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
3153 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
3154 rate->val, iwl4965_rates[rate->val].plcp,
3155 (rate->flags & IEEE80211_RATE_BASIC) ?
3156 "*" : "");
3157 priv->active_rate |= (1 << rate->val);
3158 if (rate->flags & IEEE80211_RATE_BASIC)
3159 priv->active_rate_basic |= (1 << rate->val);
3160 } else
3161 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
3162 rate->val, iwl4965_rates[rate->val].plcp);
3163 }
3164
3165 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3166 priv->active_rate, priv->active_rate_basic);
3167
3168 /*
3169 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3170 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3171 * OFDM
3172 */
3173 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3174 priv->staging_rxon.cck_basic_rates =
3175 ((priv->active_rate_basic &
3176 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3177 else
3178 priv->staging_rxon.cck_basic_rates =
3179 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3180
3181 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3182 priv->staging_rxon.ofdm_basic_rates =
3183 ((priv->active_rate_basic &
3184 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3185 IWL_FIRST_OFDM_RATE) & 0xFF;
3186 else
3187 priv->staging_rxon.ofdm_basic_rates =
3188 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3189 }
3190
3191 static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
3192 {
3193 unsigned long flags;
3194
3195 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3196 return;
3197
3198 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3199 disable_radio ? "OFF" : "ON");
3200
3201 if (disable_radio) {
3202 iwl4965_scan_cancel(priv);
3203 /* FIXME: This is a workaround for AP */
3204 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3205 spin_lock_irqsave(&priv->lock, flags);
3206 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
3207 CSR_UCODE_SW_BIT_RFKILL);
3208 spin_unlock_irqrestore(&priv->lock, flags);
3209 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
3210 set_bit(STATUS_RF_KILL_SW, &priv->status);
3211 }
3212 return;
3213 }
3214
3215 spin_lock_irqsave(&priv->lock, flags);
3216 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3217
3218 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3219 spin_unlock_irqrestore(&priv->lock, flags);
3220
3221 /* wake up ucode */
3222 msleep(10);
3223
3224 spin_lock_irqsave(&priv->lock, flags);
3225 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3226 if (!iwl4965_grab_nic_access(priv))
3227 iwl4965_release_nic_access(priv);
3228 spin_unlock_irqrestore(&priv->lock, flags);
3229
3230 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3231 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3232 "disabled by HW switch\n");
3233 return;
3234 }
3235
3236 queue_work(priv->workqueue, &priv->restart);
3237 return;
3238 }
3239
3240 void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
3241 u32 decrypt_res, struct ieee80211_rx_status *stats)
3242 {
3243 u16 fc =
3244 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3245
3246 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3247 return;
3248
3249 if (!(fc & IEEE80211_FCTL_PROTECTED))
3250 return;
3251
3252 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3253 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3254 case RX_RES_STATUS_SEC_TYPE_TKIP:
3255 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3256 RX_RES_STATUS_BAD_ICV_MIC)
3257 stats->flag |= RX_FLAG_MMIC_ERROR;
3258 case RX_RES_STATUS_SEC_TYPE_WEP:
3259 case RX_RES_STATUS_SEC_TYPE_CCMP:
3260 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3261 RX_RES_STATUS_DECRYPT_OK) {
3262 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3263 stats->flag |= RX_FLAG_DECRYPTED;
3264 }
3265 break;
3266
3267 default:
3268 break;
3269 }
3270 }
3271
3272
3273 #define IWL_PACKET_RETRY_TIME HZ
3274
3275 int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
3276 {
3277 u16 sc = le16_to_cpu(header->seq_ctrl);
3278 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3279 u16 frag = sc & IEEE80211_SCTL_FRAG;
3280 u16 *last_seq, *last_frag;
3281 unsigned long *last_time;
3282
3283 switch (priv->iw_mode) {
3284 case IEEE80211_IF_TYPE_IBSS:{
3285 struct list_head *p;
3286 struct iwl4965_ibss_seq *entry = NULL;
3287 u8 *mac = header->addr2;
3288 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3289
3290 __list_for_each(p, &priv->ibss_mac_hash[index]) {
3291 entry = list_entry(p, struct iwl4965_ibss_seq, list);
3292 if (!compare_ether_addr(entry->mac, mac))
3293 break;
3294 }
3295 if (p == &priv->ibss_mac_hash[index]) {
3296 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3297 if (!entry) {
3298 IWL_ERROR("Cannot malloc new mac entry\n");
3299 return 0;
3300 }
3301 memcpy(entry->mac, mac, ETH_ALEN);
3302 entry->seq_num = seq;
3303 entry->frag_num = frag;
3304 entry->packet_time = jiffies;
3305 list_add(&entry->list, &priv->ibss_mac_hash[index]);
3306 return 0;
3307 }
3308 last_seq = &entry->seq_num;
3309 last_frag = &entry->frag_num;
3310 last_time = &entry->packet_time;
3311 break;
3312 }
3313 case IEEE80211_IF_TYPE_STA:
3314 last_seq = &priv->last_seq_num;
3315 last_frag = &priv->last_frag_num;
3316 last_time = &priv->last_packet_time;
3317 break;
3318 default:
3319 return 0;
3320 }
3321 if ((*last_seq == seq) &&
3322 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3323 if (*last_frag == frag)
3324 goto drop;
3325 if (*last_frag + 1 != frag)
3326 /* out-of-order fragment */
3327 goto drop;
3328 } else
3329 *last_seq = seq;
3330
3331 *last_frag = frag;
3332 *last_time = jiffies;
3333 return 0;
3334
3335 drop:
3336 return 1;
3337 }
3338
3339 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
3340
3341 #include "iwl-spectrum.h"
3342
3343 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
3344 #define BEACON_TIME_MASK_HIGH 0xFF000000
3345 #define TIME_UNIT 1024
3346
3347 /*
3348 * extended beacon time format
3349 * time in usec will be changed into a 32-bit value in 8:24 format
3350 * the high 1 byte is the beacon counts
3351 * the lower 3 bytes is the time in usec within one beacon interval
3352 */
3353
3354 static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
3355 {
3356 u32 quot;
3357 u32 rem;
3358 u32 interval = beacon_interval * 1024;
3359
3360 if (!interval || !usec)
3361 return 0;
3362
3363 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3364 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3365
3366 return (quot << 24) + rem;
3367 }
3368
3369 /* base is usually what we get from ucode with each received frame,
3370 * the same as HW timer counter counting down
3371 */
3372
3373 static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3374 {
3375 u32 base_low = base & BEACON_TIME_MASK_LOW;
3376 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3377 u32 interval = beacon_interval * TIME_UNIT;
3378 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3379 (addon & BEACON_TIME_MASK_HIGH);
3380
3381 if (base_low > addon_low)
3382 res += base_low - addon_low;
3383 else if (base_low < addon_low) {
3384 res += interval + base_low - addon_low;
3385 res += (1 << 24);
3386 } else
3387 res += (1 << 24);
3388
3389 return cpu_to_le32(res);
3390 }
3391
3392 static int iwl4965_get_measurement(struct iwl4965_priv *priv,
3393 struct ieee80211_measurement_params *params,
3394 u8 type)
3395 {
3396 struct iwl4965_spectrum_cmd spectrum;
3397 struct iwl4965_rx_packet *res;
3398 struct iwl4965_host_cmd cmd = {
3399 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3400 .data = (void *)&spectrum,
3401 .meta.flags = CMD_WANT_SKB,
3402 };
3403 u32 add_time = le64_to_cpu(params->start_time);
3404 int rc;
3405 int spectrum_resp_status;
3406 int duration = le16_to_cpu(params->duration);
3407
3408 if (iwl4965_is_associated(priv))
3409 add_time =
3410 iwl4965_usecs_to_beacons(
3411 le64_to_cpu(params->start_time) - priv->last_tsf,
3412 le16_to_cpu(priv->rxon_timing.beacon_interval));
3413
3414 memset(&spectrum, 0, sizeof(spectrum));
3415
3416 spectrum.channel_count = cpu_to_le16(1);
3417 spectrum.flags =
3418 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3419 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3420 cmd.len = sizeof(spectrum);
3421 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3422
3423 if (iwl4965_is_associated(priv))
3424 spectrum.start_time =
3425 iwl4965_add_beacon_time(priv->last_beacon_time,
3426 add_time,
3427 le16_to_cpu(priv->rxon_timing.beacon_interval));
3428 else
3429 spectrum.start_time = 0;
3430
3431 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3432 spectrum.channels[0].channel = params->channel;
3433 spectrum.channels[0].type = type;
3434 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3435 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3436 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3437
3438 rc = iwl4965_send_cmd_sync(priv, &cmd);
3439 if (rc)
3440 return rc;
3441
3442 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
3443 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3444 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3445 rc = -EIO;
3446 }
3447
3448 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3449 switch (spectrum_resp_status) {
3450 case 0: /* Command will be handled */
3451 if (res->u.spectrum.id != 0xff) {
3452 IWL_DEBUG_INFO
3453 ("Replaced existing measurement: %d\n",
3454 res->u.spectrum.id);
3455 priv->measurement_status &= ~MEASUREMENT_READY;
3456 }
3457 priv->measurement_status |= MEASUREMENT_ACTIVE;
3458 rc = 0;
3459 break;
3460
3461 case 1: /* Command will not be handled */
3462 rc = -EAGAIN;
3463 break;
3464 }
3465
3466 dev_kfree_skb_any(cmd.meta.u.skb);
3467
3468 return rc;
3469 }
3470 #endif
3471
3472 static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
3473 struct iwl4965_tx_info *tx_sta)
3474 {
3475
3476 tx_sta->status.ack_signal = 0;
3477 tx_sta->status.excessive_retries = 0;
3478 tx_sta->status.queue_length = 0;
3479 tx_sta->status.queue_number = 0;
3480
3481 if (in_interrupt())
3482 ieee80211_tx_status_irqsafe(priv->hw,
3483 tx_sta->skb[0], &(tx_sta->status));
3484 else
3485 ieee80211_tx_status(priv->hw,
3486 tx_sta->skb[0], &(tx_sta->status));
3487
3488 tx_sta->skb[0] = NULL;
3489 }
3490
3491 /**
3492 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
3493 *
3494 * When FW advances 'R' index, all entries between old and new 'R' index
3495 * need to be reclaimed. As result, some free space forms. If there is
3496 * enough free space (> low mark), wake the stack that feeds us.
3497 */
3498 int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
3499 {
3500 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3501 struct iwl4965_queue *q = &txq->q;
3502 int nfreed = 0;
3503
3504 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3505 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3506 "is out of range [0-%d] %d %d.\n", txq_id,
3507 index, q->n_bd, q->write_ptr, q->read_ptr);
3508 return 0;
3509 }
3510
3511 for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
3512 q->read_ptr != index;
3513 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3514 if (txq_id != IWL_CMD_QUEUE_NUM) {
3515 iwl4965_txstatus_to_ieee(priv,
3516 &(txq->txb[txq->q.read_ptr]));
3517 iwl4965_hw_txq_free_tfd(priv, txq);
3518 } else if (nfreed > 1) {
3519 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3520 q->write_ptr, q->read_ptr);
3521 queue_work(priv->workqueue, &priv->restart);
3522 }
3523 nfreed++;
3524 }
3525
3526 if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3527 (txq_id != IWL_CMD_QUEUE_NUM) &&
3528 priv->mac80211_registered)
3529 ieee80211_wake_queue(priv->hw, txq_id);
3530
3531
3532 return nfreed;
3533 }
3534
3535 static int iwl4965_is_tx_success(u32 status)
3536 {
3537 status &= TX_STATUS_MSK;
3538 return (status == TX_STATUS_SUCCESS)
3539 || (status == TX_STATUS_DIRECT_DONE);
3540 }
3541
3542 /******************************************************************************
3543 *
3544 * Generic RX handler implementations
3545 *
3546 ******************************************************************************/
3547 #ifdef CONFIG_IWL4965_HT
3548 #ifdef CONFIG_IWL4965_HT_AGG
3549
3550 static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
3551 struct ieee80211_hdr *hdr)
3552 {
3553 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3554 return IWL_AP_ID;
3555 else {
3556 u8 *da = ieee80211_get_DA(hdr);
3557 return iwl4965_hw_find_station(priv, da);
3558 }
3559 }
3560
3561 static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
3562 struct iwl4965_priv *priv, int txq_id, int idx)
3563 {
3564 if (priv->txq[txq_id].txb[idx].skb[0])
3565 return (struct ieee80211_hdr *)priv->txq[txq_id].
3566 txb[idx].skb[0]->data;
3567 return NULL;
3568 }
3569
3570 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
3571 {
3572 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3573 tx_resp->frame_count);
3574 return le32_to_cpu(*scd_ssn) & MAX_SN;
3575
3576 }
3577
3578 /**
3579 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3580 */
3581 static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
3582 struct iwl4965_ht_agg *agg,
3583 struct iwl4965_tx_resp *tx_resp,
3584 u16 start_idx)
3585 {
3586 u32 status;
3587 __le32 *frame_status = &tx_resp->status;
3588 struct ieee80211_tx_status *tx_status = NULL;
3589 struct ieee80211_hdr *hdr = NULL;
3590 int i, sh;
3591 int txq_id, idx;
3592 u16 seq;
3593
3594 if (agg->wait_for_ba)
3595 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
3596
3597 agg->frame_count = tx_resp->frame_count;
3598 agg->start_idx = start_idx;
3599 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3600 agg->bitmap0 = agg->bitmap1 = 0;
3601
3602 /* # frames attempted by Tx command */
3603 if (agg->frame_count == 1) {
3604 /* Only one frame was attempted; no block-ack will arrive */
3605 struct iwl4965_tx_queue *txq ;
3606 status = le32_to_cpu(frame_status[0]);
3607
3608 txq_id = agg->txq_id;
3609 txq = &priv->txq[txq_id];
3610 /* FIXME: code repetition */
3611 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
3612 agg->frame_count, agg->start_idx);
3613
3614 tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
3615 tx_status->retry_count = tx_resp->failure_frame;
3616 tx_status->queue_number = status & 0xff;
3617 tx_status->queue_length = tx_resp->bt_kill_count;
3618 tx_status->queue_length |= tx_resp->failure_rts;
3619
3620 tx_status->flags = iwl4965_is_tx_success(status)?
3621 IEEE80211_TX_STATUS_ACK : 0;
3622 tx_status->control.tx_rate =
3623 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
3624 /* FIXME: code repetition end */
3625
3626 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3627 status & 0xff, tx_resp->failure_frame);
3628 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
3629 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
3630
3631 agg->wait_for_ba = 0;
3632 } else {
3633 /* Two or more frames were attempted; expect block-ack */
3634 u64 bitmap = 0;
3635 int start = agg->start_idx;
3636
3637 /* Construct bit-map of pending frames within Tx window */
3638 for (i = 0; i < agg->frame_count; i++) {
3639 u16 sc;
3640 status = le32_to_cpu(frame_status[i]);
3641 seq = status >> 16;
3642 idx = SEQ_TO_INDEX(seq);
3643 txq_id = SEQ_TO_QUEUE(seq);
3644
3645 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3646 AGG_TX_STATE_ABORT_MSK))
3647 continue;
3648
3649 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3650 agg->frame_count, txq_id, idx);
3651
3652 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
3653
3654 sc = le16_to_cpu(hdr->seq_ctrl);
3655 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3656 IWL_ERROR("BUG_ON idx doesn't match seq control"
3657 " idx=%d, seq_idx=%d, seq=%d\n",
3658 idx, SEQ_TO_SN(sc),
3659 hdr->seq_ctrl);
3660 return -1;
3661 }
3662
3663 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3664 i, idx, SEQ_TO_SN(sc));
3665
3666 sh = idx - start;
3667 if (sh > 64) {
3668 sh = (start - idx) + 0xff;
3669 bitmap = bitmap << sh;
3670 sh = 0;
3671 start = idx;
3672 } else if (sh < -64)
3673 sh = 0xff - (start - idx);
3674 else if (sh < 0) {
3675 sh = start - idx;
3676 start = idx;
3677 bitmap = bitmap << sh;
3678 sh = 0;
3679 }
3680 bitmap |= (1 << sh);
3681 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3682 start, (u32)(bitmap & 0xFFFFFFFF));
3683 }
3684
3685 agg->bitmap0 = bitmap & 0xFFFFFFFF;
3686 agg->bitmap1 = bitmap >> 32;
3687 agg->start_idx = start;
3688 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3689 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
3690 agg->frame_count, agg->start_idx,
3691 agg->bitmap0);
3692
3693 if (bitmap)
3694 agg->wait_for_ba = 1;
3695 }
3696 return 0;
3697 }
3698 #endif
3699 #endif
3700
3701 /**
3702 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3703 */
3704 static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
3705 struct iwl4965_rx_mem_buffer *rxb)
3706 {
3707 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3708 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3709 int txq_id = SEQ_TO_QUEUE(sequence);
3710 int index = SEQ_TO_INDEX(sequence);
3711 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3712 struct ieee80211_tx_status *tx_status;
3713 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3714 u32 status = le32_to_cpu(tx_resp->status);
3715 #ifdef CONFIG_IWL4965_HT
3716 #ifdef CONFIG_IWL4965_HT_AGG
3717 int tid, sta_id;
3718 #endif
3719 #endif
3720
3721 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3722 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3723 "is out of range [0-%d] %d %d\n", txq_id,
3724 index, txq->q.n_bd, txq->q.write_ptr,
3725 txq->q.read_ptr);
3726 return;
3727 }
3728
3729 #ifdef CONFIG_IWL4965_HT
3730 #ifdef CONFIG_IWL4965_HT_AGG
3731 if (txq->sched_retry) {
3732 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
3733 struct ieee80211_hdr *hdr =
3734 iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3735 struct iwl4965_ht_agg *agg = NULL;
3736 __le16 *qc = ieee80211_get_qos_ctrl(hdr);
3737
3738 if (qc == NULL) {
3739 IWL_ERROR("BUG_ON qc is null!!!!\n");
3740 return;
3741 }
3742
3743 tid = le16_to_cpu(*qc) & 0xf;
3744
3745 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
3746 if (unlikely(sta_id == IWL_INVALID_STATION)) {
3747 IWL_ERROR("Station not known for\n");
3748 return;
3749 }
3750
3751 agg = &priv->stations[sta_id].tid[tid].agg;
3752
3753 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
3754
3755 if ((tx_resp->frame_count == 1) &&
3756 !iwl4965_is_tx_success(status)) {
3757 /* TODO: send BAR */
3758 }
3759
3760 if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
3761 index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
3762 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3763 "%d index %d\n", scd_ssn , index);
3764 iwl4965_tx_queue_reclaim(priv, txq_id, index);
3765 }
3766 } else {
3767 #endif /* CONFIG_IWL4965_HT_AGG */
3768 #endif /* CONFIG_IWL4965_HT */
3769 tx_status = &(txq->txb[txq->q.read_ptr].status);
3770
3771 tx_status->retry_count = tx_resp->failure_frame;
3772 tx_status->queue_number = status;
3773 tx_status->queue_length = tx_resp->bt_kill_count;
3774 tx_status->queue_length |= tx_resp->failure_rts;
3775
3776 tx_status->flags =
3777 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3778
3779 tx_status->control.tx_rate =
3780 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
3781
3782 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
3783 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
3784 status, le32_to_cpu(tx_resp->rate_n_flags),
3785 tx_resp->failure_frame);
3786
3787 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3788 if (index != -1)
3789 iwl4965_tx_queue_reclaim(priv, txq_id, index);
3790 #ifdef CONFIG_IWL4965_HT
3791 #ifdef CONFIG_IWL4965_HT_AGG
3792 }
3793 #endif /* CONFIG_IWL4965_HT_AGG */
3794 #endif /* CONFIG_IWL4965_HT */
3795
3796 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3797 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3798 }
3799
3800
3801 static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
3802 struct iwl4965_rx_mem_buffer *rxb)
3803 {
3804 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3805 struct iwl4965_alive_resp *palive;
3806 struct delayed_work *pwork;
3807
3808 palive = &pkt->u.alive_frame;
3809
3810 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3811 "0x%01X 0x%01X\n",
3812 palive->is_valid, palive->ver_type,
3813 palive->ver_subtype);
3814
3815 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3816 IWL_DEBUG_INFO("Initialization Alive received.\n");
3817 memcpy(&priv->card_alive_init,
3818 &pkt->u.alive_frame,
3819 sizeof(struct iwl4965_init_alive_resp));
3820 pwork = &priv->init_alive_start;
3821 } else {
3822 IWL_DEBUG_INFO("Runtime Alive received.\n");
3823 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3824 sizeof(struct iwl4965_alive_resp));
3825 pwork = &priv->alive_start;
3826 }
3827
3828 /* We delay the ALIVE response by 5ms to
3829 * give the HW RF Kill time to activate... */
3830 if (palive->is_valid == UCODE_VALID_OK)
3831 queue_delayed_work(priv->workqueue, pwork,
3832 msecs_to_jiffies(5));
3833 else
3834 IWL_WARNING("uCode did not respond OK.\n");
3835 }
3836
3837 static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
3838 struct iwl4965_rx_mem_buffer *rxb)
3839 {
3840 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3841
3842 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3843 return;
3844 }
3845
3846 static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
3847 struct iwl4965_rx_mem_buffer *rxb)
3848 {
3849 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3850
3851 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3852 "seq 0x%04X ser 0x%08X\n",
3853 le32_to_cpu(pkt->u.err_resp.error_type),
3854 get_cmd_string(pkt->u.err_resp.cmd_id),
3855 pkt->u.err_resp.cmd_id,
3856 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3857 le32_to_cpu(pkt->u.err_resp.error_info));
3858 }
3859
3860 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3861
3862 static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
3863 {
3864 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3865 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3866 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
3867 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3868 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3869 rxon->channel = csa->channel;
3870 priv->staging_rxon.channel = csa->channel;
3871 }
3872
3873 static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
3874 struct iwl4965_rx_mem_buffer *rxb)
3875 {
3876 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
3877 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3878 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
3879
3880 if (!report->state) {
3881 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3882 "Spectrum Measure Notification: Start\n");
3883 return;
3884 }
3885
3886 memcpy(&priv->measure_report, report, sizeof(*report));
3887 priv->measurement_status |= MEASUREMENT_READY;
3888 #endif
3889 }
3890
3891 static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
3892 struct iwl4965_rx_mem_buffer *rxb)
3893 {
3894 #ifdef CONFIG_IWL4965_DEBUG
3895 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3896 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
3897 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3898 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3899 #endif
3900 }
3901
3902 static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
3903 struct iwl4965_rx_mem_buffer *rxb)
3904 {
3905 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3906 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3907 "notification for %s:\n",
3908 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3909 iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3910 }
3911
3912 static void iwl4965_bg_beacon_update(struct work_struct *work)
3913 {
3914 struct iwl4965_priv *priv =
3915 container_of(work, struct iwl4965_priv, beacon_update);
3916 struct sk_buff *beacon;
3917
3918 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3919 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
3920
3921 if (!beacon) {
3922 IWL_ERROR("update beacon failed\n");
3923 return;
3924 }
3925
3926 mutex_lock(&priv->mutex);
3927 /* new beacon skb is allocated every time; dispose previous.*/
3928 if (priv->ibss_beacon)
3929 dev_kfree_skb(priv->ibss_beacon);
3930
3931 priv->ibss_beacon = beacon;
3932 mutex_unlock(&priv->mutex);
3933
3934 iwl4965_send_beacon_cmd(priv);
3935 }
3936
3937 static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
3938 struct iwl4965_rx_mem_buffer *rxb)
3939 {
3940 #ifdef CONFIG_IWL4965_DEBUG
3941 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3942 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3943 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
3944
3945 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3946 "tsf %d %d rate %d\n",
3947 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3948 beacon->beacon_notify_hdr.failure_frame,
3949 le32_to_cpu(beacon->ibss_mgr_status),
3950 le32_to_cpu(beacon->high_tsf),
3951 le32_to_cpu(beacon->low_tsf), rate);
3952 #endif
3953
3954 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3955 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3956 queue_work(priv->workqueue, &priv->beacon_update);
3957 }
3958
3959 /* Service response to REPLY_SCAN_CMD (0x80) */
3960 static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
3961 struct iwl4965_rx_mem_buffer *rxb)
3962 {
3963 #ifdef CONFIG_IWL4965_DEBUG
3964 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3965 struct iwl4965_scanreq_notification *notif =
3966 (struct iwl4965_scanreq_notification *)pkt->u.raw;
3967
3968 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3969 #endif
3970 }
3971
3972 /* Service SCAN_START_NOTIFICATION (0x82) */
3973 static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
3974 struct iwl4965_rx_mem_buffer *rxb)
3975 {
3976 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3977 struct iwl4965_scanstart_notification *notif =
3978 (struct iwl4965_scanstart_notification *)pkt->u.raw;
3979 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3980 IWL_DEBUG_SCAN("Scan start: "
3981 "%d [802.11%s] "
3982 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3983 notif->channel,
3984 notif->band ? "bg" : "a",
3985 notif->tsf_high,
3986 notif->tsf_low, notif->status, notif->beacon_timer);
3987 }
3988
3989 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3990 static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
3991 struct iwl4965_rx_mem_buffer *rxb)
3992 {
3993 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3994 struct iwl4965_scanresults_notification *notif =
3995 (struct iwl4965_scanresults_notification *)pkt->u.raw;
3996
3997 IWL_DEBUG_SCAN("Scan ch.res: "
3998 "%d [802.11%s] "
3999 "(TSF: 0x%08X:%08X) - %d "
4000 "elapsed=%lu usec (%dms since last)\n",
4001 notif->channel,
4002 notif->band ? "bg" : "a",
4003 le32_to_cpu(notif->tsf_high),
4004 le32_to_cpu(notif->tsf_low),
4005 le32_to_cpu(notif->statistics[0]),
4006 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
4007 jiffies_to_msecs(elapsed_jiffies
4008 (priv->last_scan_jiffies, jiffies)));
4009
4010 priv->last_scan_jiffies = jiffies;
4011 priv->next_scan_jiffies = 0;
4012 }
4013
4014 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
4015 static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
4016 struct iwl4965_rx_mem_buffer *rxb)
4017 {
4018 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4019 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
4020
4021 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
4022 scan_notif->scanned_channels,
4023 scan_notif->tsf_low,
4024 scan_notif->tsf_high, scan_notif->status);
4025
4026 /* The HW is no longer scanning */
4027 clear_bit(STATUS_SCAN_HW, &priv->status);
4028
4029 /* The scan completion notification came in, so kill that timer... */
4030 cancel_delayed_work(&priv->scan_check);
4031
4032 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
4033 (priv->scan_bands == 2) ? "2.4" : "5.2",
4034 jiffies_to_msecs(elapsed_jiffies
4035 (priv->scan_pass_start, jiffies)));
4036
4037 /* Remove this scanned band from the list
4038 * of pending bands to scan */
4039 priv->scan_bands--;
4040
4041 /* If a request to abort was given, or the scan did not succeed
4042 * then we reset the scan state machine and terminate,
4043 * re-queuing another scan if one has been requested */
4044 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
4045 IWL_DEBUG_INFO("Aborted scan completed.\n");
4046 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
4047 } else {
4048 /* If there are more bands on this scan pass reschedule */
4049 if (priv->scan_bands > 0)
4050 goto reschedule;
4051 }
4052
4053 priv->last_scan_jiffies = jiffies;
4054 priv->next_scan_jiffies = 0;
4055 IWL_DEBUG_INFO("Setting scan to off\n");
4056
4057 clear_bit(STATUS_SCANNING, &priv->status);
4058
4059 IWL_DEBUG_INFO("Scan took %dms\n",
4060 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
4061
4062 queue_work(priv->workqueue, &priv->scan_completed);
4063
4064 return;
4065
4066 reschedule:
4067 priv->scan_pass_start = jiffies;
4068 queue_work(priv->workqueue, &priv->request_scan);
4069 }
4070
4071 /* Handle notification from uCode that card's power state is changing
4072 * due to software, hardware, or critical temperature RFKILL */
4073 static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
4074 struct iwl4965_rx_mem_buffer *rxb)
4075 {
4076 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4077 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4078 unsigned long status = priv->status;
4079
4080 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
4081 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4082 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
4083
4084 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
4085 RF_CARD_DISABLED)) {
4086
4087 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
4088 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4089
4090 if (!iwl4965_grab_nic_access(priv)) {
4091 iwl4965_write_direct32(
4092 priv, HBUS_TARG_MBX_C,
4093 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4094
4095 iwl4965_release_nic_access(priv);
4096 }
4097
4098 if (!(flags & RXON_CARD_DISABLED)) {
4099 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
4100 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4101 if (!iwl4965_grab_nic_access(priv)) {
4102 iwl4965_write_direct32(
4103 priv, HBUS_TARG_MBX_C,
4104 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4105
4106 iwl4965_release_nic_access(priv);
4107 }
4108 }
4109
4110 if (flags & RF_CARD_DISABLED) {
4111 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
4112 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
4113 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4114 if (!iwl4965_grab_nic_access(priv))
4115 iwl4965_release_nic_access(priv);
4116 }
4117 }
4118
4119 if (flags & HW_CARD_DISABLED)
4120 set_bit(STATUS_RF_KILL_HW, &priv->status);
4121 else
4122 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4123
4124
4125 if (flags & SW_CARD_DISABLED)
4126 set_bit(STATUS_RF_KILL_SW, &priv->status);
4127 else
4128 clear_bit(STATUS_RF_KILL_SW, &priv->status);
4129
4130 if (!(flags & RXON_CARD_DISABLED))
4131 iwl4965_scan_cancel(priv);
4132
4133 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
4134 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
4135 (test_bit(STATUS_RF_KILL_SW, &status) !=
4136 test_bit(STATUS_RF_KILL_SW, &priv->status)))
4137 queue_work(priv->workqueue, &priv->rf_kill);
4138 else
4139 wake_up_interruptible(&priv->wait_command_queue);
4140 }
4141
4142 /**
4143 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
4144 *
4145 * Setup the RX handlers for each of the reply types sent from the uCode
4146 * to the host.
4147 *
4148 * This function chains into the hardware specific files for them to setup
4149 * any hardware specific handlers as well.
4150 */
4151 static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
4152 {
4153 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
4154 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
4155 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
4156 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
4157 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
4158 iwl4965_rx_spectrum_measure_notif;
4159 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
4160 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
4161 iwl4965_rx_pm_debug_statistics_notif;
4162 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
4163
4164 /*
4165 * The same handler is used for both the REPLY to a discrete
4166 * statistics request from the host as well as for the periodic
4167 * statistics notifications (after received beacons) from the uCode.
4168 */
4169 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
4170 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
4171
4172 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
4173 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
4174 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
4175 iwl4965_rx_scan_results_notif;
4176 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
4177 iwl4965_rx_scan_complete_notif;
4178 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
4179 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
4180
4181 /* Set up hardware specific Rx handlers */
4182 iwl4965_hw_rx_handler_setup(priv);
4183 }
4184
4185 /**
4186 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
4187 * @rxb: Rx buffer to reclaim
4188 *
4189 * If an Rx buffer has an async callback associated with it the callback
4190 * will be executed. The attached skb (if present) will only be freed
4191 * if the callback returns 1
4192 */
4193 static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
4194 struct iwl4965_rx_mem_buffer *rxb)
4195 {
4196 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
4197 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
4198 int txq_id = SEQ_TO_QUEUE(sequence);
4199 int index = SEQ_TO_INDEX(sequence);
4200 int huge = sequence & SEQ_HUGE_FRAME;
4201 int cmd_index;
4202 struct iwl4965_cmd *cmd;
4203
4204 /* If a Tx command is being handled and it isn't in the actual
4205 * command queue then there a command routing bug has been introduced
4206 * in the queue management code. */
4207 if (txq_id != IWL_CMD_QUEUE_NUM)
4208 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
4209 txq_id, pkt->hdr.cmd);
4210 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
4211
4212 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
4213 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
4214
4215 /* Input error checking is done when commands are added to queue. */
4216 if (cmd->meta.flags & CMD_WANT_SKB) {
4217 cmd->meta.source->u.skb = rxb->skb;
4218 rxb->skb = NULL;
4219 } else if (cmd->meta.u.callback &&
4220 !cmd->meta.u.callback(priv, cmd, rxb->skb))
4221 rxb->skb = NULL;
4222
4223 iwl4965_tx_queue_reclaim(priv, txq_id, index);
4224
4225 if (!(cmd->meta.flags & CMD_ASYNC)) {
4226 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4227 wake_up_interruptible(&priv->wait_command_queue);
4228 }
4229 }
4230
4231 /************************** RX-FUNCTIONS ****************************/
4232 /*
4233 * Rx theory of operation
4234 *
4235 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
4236 * each of which point to Receive Buffers to be filled by 4965. These get
4237 * used not only for Rx frames, but for any command response or notification
4238 * from the 4965. The driver and 4965 manage the Rx buffers by means
4239 * of indexes into the circular buffer.
4240 *
4241 * Rx Queue Indexes
4242 * The host/firmware share two index registers for managing the Rx buffers.
4243 *
4244 * The READ index maps to the first position that the firmware may be writing
4245 * to -- the driver can read up to (but not including) this position and get
4246 * good data.
4247 * The READ index is managed by the firmware once the card is enabled.
4248 *
4249 * The WRITE index maps to the last position the driver has read from -- the
4250 * position preceding WRITE is the last slot the firmware can place a packet.
4251 *
4252 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
4253 * WRITE = READ.
4254 *
4255 * During initialization, the host sets up the READ queue position to the first
4256 * INDEX position, and WRITE to the last (READ - 1 wrapped)
4257 *
4258 * When the firmware places a packet in a buffer, it will advance the READ index
4259 * and fire the RX interrupt. The driver can then query the READ index and
4260 * process as many packets as possible, moving the WRITE index forward as it
4261 * resets the Rx queue buffers with new memory.
4262 *
4263 * The management in the driver is as follows:
4264 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
4265 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
4266 * to replenish the iwl->rxq->rx_free.
4267 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
4268 * iwl->rxq is replenished and the READ INDEX is updated (updating the
4269 * 'processed' and 'read' driver indexes as well)
4270 * + A received packet is processed and handed to the kernel network stack,
4271 * detached from the iwl->rxq. The driver 'processed' index is updated.
4272 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
4273 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
4274 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
4275 * were enough free buffers and RX_STALLED is set it is cleared.
4276 *
4277 *
4278 * Driver sequence:
4279 *
4280 * iwl4965_rx_queue_alloc() Allocates rx_free
4281 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
4282 * iwl4965_rx_queue_restock
4283 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
4284 * queue, updates firmware pointers, and updates
4285 * the WRITE index. If insufficient rx_free buffers
4286 * are available, schedules iwl4965_rx_replenish
4287 *
4288 * -- enable interrupts --
4289 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
4290 * READ INDEX, detaching the SKB from the pool.
4291 * Moves the packet buffer from queue to rx_used.
4292 * Calls iwl4965_rx_queue_restock to refill any empty
4293 * slots.
4294 * ...
4295 *
4296 */
4297
4298 /**
4299 * iwl4965_rx_queue_space - Return number of free slots available in queue.
4300 */
4301 static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
4302 {
4303 int s = q->read - q->write;
4304 if (s <= 0)
4305 s += RX_QUEUE_SIZE;
4306 /* keep some buffer to not confuse full and empty queue */
4307 s -= 2;
4308 if (s < 0)
4309 s = 0;
4310 return s;
4311 }
4312
4313 /**
4314 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
4315 */
4316 int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
4317 {
4318 u32 reg = 0;
4319 int rc = 0;
4320 unsigned long flags;
4321
4322 spin_lock_irqsave(&q->lock, flags);
4323
4324 if (q->need_update == 0)
4325 goto exit_unlock;
4326
4327 /* If power-saving is in use, make sure device is awake */
4328 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4329 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4330
4331 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4332 iwl4965_set_bit(priv, CSR_GP_CNTRL,
4333 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4334 goto exit_unlock;
4335 }
4336
4337 rc = iwl4965_grab_nic_access(priv);
4338 if (rc)
4339 goto exit_unlock;
4340
4341 /* Device expects a multiple of 8 */
4342 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
4343 q->write & ~0x7);
4344 iwl4965_release_nic_access(priv);
4345
4346 /* Else device is assumed to be awake */
4347 } else
4348 /* Device expects a multiple of 8 */
4349 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
4350
4351
4352 q->need_update = 0;
4353
4354 exit_unlock:
4355 spin_unlock_irqrestore(&q->lock, flags);
4356 return rc;
4357 }
4358
4359 /**
4360 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
4361 */
4362 static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
4363 dma_addr_t dma_addr)
4364 {
4365 return cpu_to_le32((u32)(dma_addr >> 8));
4366 }
4367
4368
4369 /**
4370 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
4371 *
4372 * If there are slots in the RX queue that need to be restocked,
4373 * and we have free pre-allocated buffers, fill the ranks as much
4374 * as we can, pulling from rx_free.
4375 *
4376 * This moves the 'write' index forward to catch up with 'processed', and
4377 * also updates the memory address in the firmware to reference the new
4378 * target buffer.
4379 */
4380 static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
4381 {
4382 struct iwl4965_rx_queue *rxq = &priv->rxq;
4383 struct list_head *element;
4384 struct iwl4965_rx_mem_buffer *rxb;
4385 unsigned long flags;
4386 int write, rc;
4387
4388 spin_lock_irqsave(&rxq->lock, flags);
4389 write = rxq->write & ~0x7;
4390 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
4391 /* Get next free Rx buffer, remove from free list */
4392 element = rxq->rx_free.next;
4393 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
4394 list_del(element);
4395
4396 /* Point to Rx buffer via next RBD in circular buffer */
4397 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
4398 rxq->queue[rxq->write] = rxb;
4399 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4400 rxq->free_count--;
4401 }
4402 spin_unlock_irqrestore(&rxq->lock, flags);
4403 /* If the pre-allocated buffer pool is dropping low, schedule to
4404 * refill it */
4405 if (rxq->free_count <= RX_LOW_WATERMARK)
4406 queue_work(priv->workqueue, &priv->rx_replenish);
4407
4408
4409 /* If we've added more space for the firmware to place data, tell it.
4410 * Increment device's write pointer in multiples of 8. */
4411 if ((write != (rxq->write & ~0x7))
4412 || (abs(rxq->write - rxq->read) > 7)) {
4413 spin_lock_irqsave(&rxq->lock, flags);
4414 rxq->need_update = 1;
4415 spin_unlock_irqrestore(&rxq->lock, flags);
4416 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
4417 if (rc)
4418 return rc;
4419 }
4420
4421 return 0;
4422 }
4423
4424 /**
4425 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
4426 *
4427 * When moving to rx_free an SKB is allocated for the slot.
4428 *
4429 * Also restock the Rx queue via iwl4965_rx_queue_restock.
4430 * This is called as a scheduled work item (except for during initialization)
4431 */
4432 static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
4433 {
4434 struct iwl4965_rx_queue *rxq = &priv->rxq;
4435 struct list_head *element;
4436 struct iwl4965_rx_mem_buffer *rxb;
4437 unsigned long flags;
4438 spin_lock_irqsave(&rxq->lock, flags);
4439 while (!list_empty(&rxq->rx_used)) {
4440 element = rxq->rx_used.next;
4441 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
4442
4443 /* Alloc a new receive buffer */
4444 rxb->skb =
4445 alloc_skb(priv->hw_setting.rx_buf_size,
4446 __GFP_NOWARN | GFP_ATOMIC);
4447 if (!rxb->skb) {
4448 if (net_ratelimit())
4449 printk(KERN_CRIT DRV_NAME
4450 ": Can not allocate SKB buffers\n");
4451 /* We don't reschedule replenish work here -- we will
4452 * call the restock method and if it still needs
4453 * more buffers it will schedule replenish */
4454 break;
4455 }
4456 priv->alloc_rxb_skb++;
4457 list_del(element);
4458
4459 /* Get physical address of RB/SKB */
4460 rxb->dma_addr =
4461 pci_map_single(priv->pci_dev, rxb->skb->data,
4462 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
4463 list_add_tail(&rxb->list, &rxq->rx_free);
4464 rxq->free_count++;
4465 }
4466 spin_unlock_irqrestore(&rxq->lock, flags);
4467 }
4468
4469 /*
4470 * this should be called while priv->lock is locked
4471 */
4472 static void __iwl4965_rx_replenish(void *data)
4473 {
4474 struct iwl4965_priv *priv = data;
4475
4476 iwl4965_rx_allocate(priv);
4477 iwl4965_rx_queue_restock(priv);
4478 }
4479
4480
4481 void iwl4965_rx_replenish(void *data)
4482 {
4483 struct iwl4965_priv *priv = data;
4484 unsigned long flags;
4485
4486 iwl4965_rx_allocate(priv);
4487
4488 spin_lock_irqsave(&priv->lock, flags);
4489 iwl4965_rx_queue_restock(priv);
4490 spin_unlock_irqrestore(&priv->lock, flags);
4491 }
4492
4493 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
4494 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
4495 * This free routine walks the list of POOL entries and if SKB is set to
4496 * non NULL it is unmapped and freed
4497 */
4498 static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
4499 {
4500 int i;
4501 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4502 if (rxq->pool[i].skb != NULL) {
4503 pci_unmap_single(priv->pci_dev,
4504 rxq->pool[i].dma_addr,
4505 priv->hw_setting.rx_buf_size,
4506 PCI_DMA_FROMDEVICE);
4507 dev_kfree_skb(rxq->pool[i].skb);
4508 }
4509 }
4510
4511 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4512 rxq->dma_addr);
4513 rxq->bd = NULL;
4514 }
4515
4516 int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
4517 {
4518 struct iwl4965_rx_queue *rxq = &priv->rxq;
4519 struct pci_dev *dev = priv->pci_dev;
4520 int i;
4521
4522 spin_lock_init(&rxq->lock);
4523 INIT_LIST_HEAD(&rxq->rx_free);
4524 INIT_LIST_HEAD(&rxq->rx_used);
4525
4526 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
4527 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4528 if (!rxq->bd)
4529 return -ENOMEM;
4530
4531 /* Fill the rx_used queue with _all_ of the Rx buffers */
4532 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4533 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4534
4535 /* Set us so that we have processed and used all buffers, but have
4536 * not restocked the Rx queue with fresh buffers */
4537 rxq->read = rxq->write = 0;
4538 rxq->free_count = 0;
4539 rxq->need_update = 0;
4540 return 0;
4541 }
4542
4543 void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
4544 {
4545 unsigned long flags;
4546 int i;
4547 spin_lock_irqsave(&rxq->lock, flags);
4548 INIT_LIST_HEAD(&rxq->rx_free);
4549 INIT_LIST_HEAD(&rxq->rx_used);
4550 /* Fill the rx_used queue with _all_ of the Rx buffers */
4551 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4552 /* In the reset function, these buffers may have been allocated
4553 * to an SKB, so we need to unmap and free potential storage */
4554 if (rxq->pool[i].skb != NULL) {
4555 pci_unmap_single(priv->pci_dev,
4556 rxq->pool[i].dma_addr,
4557 priv->hw_setting.rx_buf_size,
4558 PCI_DMA_FROMDEVICE);
4559 priv->alloc_rxb_skb--;
4560 dev_kfree_skb(rxq->pool[i].skb);
4561 rxq->pool[i].skb = NULL;
4562 }
4563 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4564 }
4565
4566 /* Set us so that we have processed and used all buffers, but have
4567 * not restocked the Rx queue with fresh buffers */
4568 rxq->read = rxq->write = 0;
4569 rxq->free_count = 0;
4570 spin_unlock_irqrestore(&rxq->lock, flags);
4571 }
4572
4573 /* Convert linear signal-to-noise ratio into dB */
4574 static u8 ratio2dB[100] = {
4575 /* 0 1 2 3 4 5 6 7 8 9 */
4576 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4577 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4578 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4579 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4580 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4581 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4582 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4583 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4584 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4585 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4586 };
4587
4588 /* Calculates a relative dB value from a ratio of linear
4589 * (i.e. not dB) signal levels.
4590 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4591 int iwl4965_calc_db_from_ratio(int sig_ratio)
4592 {
4593 /* 1000:1 or higher just report as 60 dB */
4594 if (sig_ratio >= 1000)
4595 return 60;
4596
4597 /* 100:1 or higher, divide by 10 and use table,
4598 * add 20 dB to make up for divide by 10 */
4599 if (sig_ratio >= 100)
4600 return (20 + (int)ratio2dB[sig_ratio/10]);
4601
4602 /* We shouldn't see this */
4603 if (sig_ratio < 1)
4604 return 0;
4605
4606 /* Use table for ratios 1:1 - 99:1 */
4607 return (int)ratio2dB[sig_ratio];
4608 }
4609
4610 #define PERFECT_RSSI (-20) /* dBm */
4611 #define WORST_RSSI (-95) /* dBm */
4612 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4613
4614 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
4615 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4616 * about formulas used below. */
4617 int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
4618 {
4619 int sig_qual;
4620 int degradation = PERFECT_RSSI - rssi_dbm;
4621
4622 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4623 * as indicator; formula is (signal dbm - noise dbm).
4624 * SNR at or above 40 is a great signal (100%).
4625 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4626 * Weakest usable signal is usually 10 - 15 dB SNR. */
4627 if (noise_dbm) {
4628 if (rssi_dbm - noise_dbm >= 40)
4629 return 100;
4630 else if (rssi_dbm < noise_dbm)
4631 return 0;
4632 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4633
4634 /* Else use just the signal level.
4635 * This formula is a least squares fit of data points collected and
4636 * compared with a reference system that had a percentage (%) display
4637 * for signal quality. */
4638 } else
4639 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4640 (15 * RSSI_RANGE + 62 * degradation)) /
4641 (RSSI_RANGE * RSSI_RANGE);
4642
4643 if (sig_qual > 100)
4644 sig_qual = 100;
4645 else if (sig_qual < 1)
4646 sig_qual = 0;
4647
4648 return sig_qual;
4649 }
4650
4651 /**
4652 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
4653 *
4654 * Uses the priv->rx_handlers callback function array to invoke
4655 * the appropriate handlers, including command responses,
4656 * frame-received notifications, and other notifications.
4657 */
4658 static void iwl4965_rx_handle(struct iwl4965_priv *priv)
4659 {
4660 struct iwl4965_rx_mem_buffer *rxb;
4661 struct iwl4965_rx_packet *pkt;
4662 struct iwl4965_rx_queue *rxq = &priv->rxq;
4663 u32 r, i;
4664 int reclaim;
4665 unsigned long flags;
4666 u8 fill_rx = 0;
4667 u32 count = 0;
4668
4669 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4670 * buffer that the driver may process (last buffer filled by ucode). */
4671 r = iwl4965_hw_get_rx_read(priv);
4672 i = rxq->read;
4673
4674 /* Rx interrupt, but nothing sent from uCode */
4675 if (i == r)
4676 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4677
4678 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4679 fill_rx = 1;
4680
4681 while (i != r) {
4682 rxb = rxq->queue[i];
4683
4684 /* If an RXB doesn't have a Rx queue slot associated with it,
4685 * then a bug has been introduced in the queue refilling
4686 * routines -- catch it here */
4687 BUG_ON(rxb == NULL);
4688
4689 rxq->queue[i] = NULL;
4690
4691 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4692 priv->hw_setting.rx_buf_size,
4693 PCI_DMA_FROMDEVICE);
4694 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
4695
4696 /* Reclaim a command buffer only if this packet is a response
4697 * to a (driver-originated) command.
4698 * If the packet (e.g. Rx frame) originated from uCode,
4699 * there is no command buffer to reclaim.
4700 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4701 * but apparently a few don't get set; catch them here. */
4702 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4703 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4704 (pkt->hdr.cmd != REPLY_4965_RX) &&
4705 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
4706 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4707 (pkt->hdr.cmd != REPLY_TX);
4708
4709 /* Based on type of command response or notification,
4710 * handle those that need handling via function in
4711 * rx_handlers table. See iwl4965_setup_rx_handlers() */
4712 if (priv->rx_handlers[pkt->hdr.cmd]) {
4713 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4714 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4715 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4716 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4717 } else {
4718 /* No handling needed */
4719 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4720 "r %d i %d No handler needed for %s, 0x%02x\n",
4721 r, i, get_cmd_string(pkt->hdr.cmd),
4722 pkt->hdr.cmd);
4723 }
4724
4725 if (reclaim) {
4726 /* Invoke any callbacks, transfer the skb to caller, and
4727 * fire off the (possibly) blocking iwl4965_send_cmd()
4728 * as we reclaim the driver command queue */
4729 if (rxb && rxb->skb)
4730 iwl4965_tx_cmd_complete(priv, rxb);
4731 else
4732 IWL_WARNING("Claim null rxb?\n");
4733 }
4734
4735 /* For now we just don't re-use anything. We can tweak this
4736 * later to try and re-use notification packets and SKBs that
4737 * fail to Rx correctly */
4738 if (rxb->skb != NULL) {
4739 priv->alloc_rxb_skb--;
4740 dev_kfree_skb_any(rxb->skb);
4741 rxb->skb = NULL;
4742 }
4743
4744 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4745 priv->hw_setting.rx_buf_size,
4746 PCI_DMA_FROMDEVICE);
4747 spin_lock_irqsave(&rxq->lock, flags);
4748 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4749 spin_unlock_irqrestore(&rxq->lock, flags);
4750 i = (i + 1) & RX_QUEUE_MASK;
4751 /* If there are a lot of unused frames,
4752 * restock the Rx queue so ucode wont assert. */
4753 if (fill_rx) {
4754 count++;
4755 if (count >= 8) {
4756 priv->rxq.read = i;
4757 __iwl4965_rx_replenish(priv);
4758 count = 0;
4759 }
4760 }
4761 }
4762
4763 /* Backtrack one entry */
4764 priv->rxq.read = i;
4765 iwl4965_rx_queue_restock(priv);
4766 }
4767
4768 /**
4769 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4770 */
4771 static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
4772 struct iwl4965_tx_queue *txq)
4773 {
4774 u32 reg = 0;
4775 int rc = 0;
4776 int txq_id = txq->q.id;
4777
4778 if (txq->need_update == 0)
4779 return rc;
4780
4781 /* if we're trying to save power */
4782 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4783 /* wake up nic if it's powered down ...
4784 * uCode will wake up, and interrupt us again, so next
4785 * time we'll skip this part. */
4786 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4787
4788 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4789 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4790 iwl4965_set_bit(priv, CSR_GP_CNTRL,
4791 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4792 return rc;
4793 }
4794
4795 /* restore this queue's parameters in nic hardware. */
4796 rc = iwl4965_grab_nic_access(priv);
4797 if (rc)
4798 return rc;
4799 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
4800 txq->q.write_ptr | (txq_id << 8));
4801 iwl4965_release_nic_access(priv);
4802
4803 /* else not in power-save mode, uCode will never sleep when we're
4804 * trying to tx (during RFKILL, we're not trying to tx). */
4805 } else
4806 iwl4965_write32(priv, HBUS_TARG_WRPTR,
4807 txq->q.write_ptr | (txq_id << 8));
4808
4809 txq->need_update = 0;
4810
4811 return rc;
4812 }
4813
4814 #ifdef CONFIG_IWL4965_DEBUG
4815 static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
4816 {
4817 DECLARE_MAC_BUF(mac);
4818
4819 IWL_DEBUG_RADIO("RX CONFIG:\n");
4820 iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4821 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4822 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4823 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4824 le32_to_cpu(rxon->filter_flags));
4825 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4826 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4827 rxon->ofdm_basic_rates);
4828 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4829 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4830 print_mac(mac, rxon->node_addr));
4831 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4832 print_mac(mac, rxon->bssid_addr));
4833 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4834 }
4835 #endif
4836
4837 static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
4838 {
4839 IWL_DEBUG_ISR("Enabling interrupts\n");
4840 set_bit(STATUS_INT_ENABLED, &priv->status);
4841 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4842 }
4843
4844 static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
4845 {
4846 clear_bit(STATUS_INT_ENABLED, &priv->status);
4847
4848 /* disable interrupts from uCode/NIC to host */
4849 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
4850
4851 /* acknowledge/clear/reset any interrupts still pending
4852 * from uCode or flow handler (Rx/Tx DMA) */
4853 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4854 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4855 IWL_DEBUG_ISR("Disabled interrupts\n");
4856 }
4857
4858 static const char *desc_lookup(int i)
4859 {
4860 switch (i) {
4861 case 1:
4862 return "FAIL";
4863 case 2:
4864 return "BAD_PARAM";
4865 case 3:
4866 return "BAD_CHECKSUM";
4867 case 4:
4868 return "NMI_INTERRUPT";
4869 case 5:
4870 return "SYSASSERT";
4871 case 6:
4872 return "FATAL_ERROR";
4873 }
4874
4875 return "UNKNOWN";
4876 }
4877
4878 #define ERROR_START_OFFSET (1 * sizeof(u32))
4879 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4880
4881 static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
4882 {
4883 u32 data2, line;
4884 u32 desc, time, count, base, data1;
4885 u32 blink1, blink2, ilink1, ilink2;
4886 int rc;
4887
4888 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4889
4890 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
4891 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4892 return;
4893 }
4894
4895 rc = iwl4965_grab_nic_access(priv);
4896 if (rc) {
4897 IWL_WARNING("Can not read from adapter at this time.\n");
4898 return;
4899 }
4900
4901 count = iwl4965_read_targ_mem(priv, base);
4902
4903 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4904 IWL_ERROR("Start IWL Error Log Dump:\n");
4905 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4906 priv->status, priv->config, count);
4907 }
4908
4909 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4910 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4911 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4912 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4913 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4914 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4915 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4916 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4917 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
4918
4919 IWL_ERROR("Desc Time "
4920 "data1 data2 line\n");
4921 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4922 desc_lookup(desc), desc, time, data1, data2, line);
4923 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4924 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4925 ilink1, ilink2);
4926
4927 iwl4965_release_nic_access(priv);
4928 }
4929
4930 #define EVENT_START_OFFSET (4 * sizeof(u32))
4931
4932 /**
4933 * iwl4965_print_event_log - Dump error event log to syslog
4934 *
4935 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
4936 */
4937 static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
4938 u32 num_events, u32 mode)
4939 {
4940 u32 i;
4941 u32 base; /* SRAM byte address of event log header */
4942 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4943 u32 ptr; /* SRAM byte address of log data */
4944 u32 ev, time, data; /* event log data */
4945
4946 if (num_events == 0)
4947 return;
4948
4949 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4950
4951 if (mode == 0)
4952 event_size = 2 * sizeof(u32);
4953 else
4954 event_size = 3 * sizeof(u32);
4955
4956 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4957
4958 /* "time" is actually "data" for mode 0 (no timestamp).
4959 * place event id # at far right for easier visual parsing. */
4960 for (i = 0; i < num_events; i++) {
4961 ev = iwl4965_read_targ_mem(priv, ptr);
4962 ptr += sizeof(u32);
4963 time = iwl4965_read_targ_mem(priv, ptr);
4964 ptr += sizeof(u32);
4965 if (mode == 0)
4966 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4967 else {
4968 data = iwl4965_read_targ_mem(priv, ptr);
4969 ptr += sizeof(u32);
4970 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4971 }
4972 }
4973 }
4974
4975 static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
4976 {
4977 int rc;
4978 u32 base; /* SRAM byte address of event log header */
4979 u32 capacity; /* event log capacity in # entries */
4980 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4981 u32 num_wraps; /* # times uCode wrapped to top of log */
4982 u32 next_entry; /* index of next entry to be written by uCode */
4983 u32 size; /* # entries that we'll print */
4984
4985 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4986 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
4987 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4988 return;
4989 }
4990
4991 rc = iwl4965_grab_nic_access(priv);
4992 if (rc) {
4993 IWL_WARNING("Can not read from adapter at this time.\n");
4994 return;
4995 }
4996
4997 /* event log header */
4998 capacity = iwl4965_read_targ_mem(priv, base);
4999 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
5000 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
5001 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
5002
5003 size = num_wraps ? capacity : next_entry;
5004
5005 /* bail out if nothing in log */
5006 if (size == 0) {
5007 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
5008 iwl4965_release_nic_access(priv);
5009 return;
5010 }
5011
5012 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
5013 size, num_wraps);
5014
5015 /* if uCode has wrapped back to top of log, start at the oldest entry,
5016 * i.e the next one that uCode would fill. */
5017 if (num_wraps)
5018 iwl4965_print_event_log(priv, next_entry,
5019 capacity - next_entry, mode);
5020
5021 /* (then/else) start at top of log */
5022 iwl4965_print_event_log(priv, 0, next_entry, mode);
5023
5024 iwl4965_release_nic_access(priv);
5025 }
5026
5027 /**
5028 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
5029 */
5030 static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
5031 {
5032 /* Set the FW error flag -- cleared on iwl4965_down */
5033 set_bit(STATUS_FW_ERROR, &priv->status);
5034
5035 /* Cancel currently queued command. */
5036 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
5037
5038 #ifdef CONFIG_IWL4965_DEBUG
5039 if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
5040 iwl4965_dump_nic_error_log(priv);
5041 iwl4965_dump_nic_event_log(priv);
5042 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
5043 }
5044 #endif
5045
5046 wake_up_interruptible(&priv->wait_command_queue);
5047
5048 /* Keep the restart process from trying to send host
5049 * commands by clearing the INIT status bit */
5050 clear_bit(STATUS_READY, &priv->status);
5051
5052 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5053 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
5054 "Restarting adapter due to uCode error.\n");
5055
5056 if (iwl4965_is_associated(priv)) {
5057 memcpy(&priv->recovery_rxon, &priv->active_rxon,
5058 sizeof(priv->recovery_rxon));
5059 priv->error_recovering = 1;
5060 }
5061 queue_work(priv->workqueue, &priv->restart);
5062 }
5063 }
5064
5065 static void iwl4965_error_recovery(struct iwl4965_priv *priv)
5066 {
5067 unsigned long flags;
5068
5069 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
5070 sizeof(priv->staging_rxon));
5071 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5072 iwl4965_commit_rxon(priv);
5073
5074 iwl4965_rxon_add_station(priv, priv->bssid, 1);
5075
5076 spin_lock_irqsave(&priv->lock, flags);
5077 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
5078 priv->error_recovering = 0;
5079 spin_unlock_irqrestore(&priv->lock, flags);
5080 }
5081
5082 static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
5083 {
5084 u32 inta, handled = 0;
5085 u32 inta_fh;
5086 unsigned long flags;
5087 #ifdef CONFIG_IWL4965_DEBUG
5088 u32 inta_mask;
5089 #endif
5090
5091 spin_lock_irqsave(&priv->lock, flags);
5092
5093 /* Ack/clear/reset pending uCode interrupts.
5094 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
5095 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5096 inta = iwl4965_read32(priv, CSR_INT);
5097 iwl4965_write32(priv, CSR_INT, inta);
5098
5099 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
5100 * Any new interrupts that happen after this, either while we're
5101 * in this tasklet, or later, will show up in next ISR/tasklet. */
5102 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5103 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
5104
5105 #ifdef CONFIG_IWL4965_DEBUG
5106 if (iwl4965_debug_level & IWL_DL_ISR) {
5107 /* just for debug */
5108 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5109 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5110 inta, inta_mask, inta_fh);
5111 }
5112 #endif
5113
5114 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
5115 * atomic, make sure that inta covers all the interrupts that
5116 * we've discovered, even if FH interrupt came in just after
5117 * reading CSR_INT. */
5118 if (inta_fh & CSR_FH_INT_RX_MASK)
5119 inta |= CSR_INT_BIT_FH_RX;
5120 if (inta_fh & CSR_FH_INT_TX_MASK)
5121 inta |= CSR_INT_BIT_FH_TX;
5122
5123 /* Now service all interrupt bits discovered above. */
5124 if (inta & CSR_INT_BIT_HW_ERR) {
5125 IWL_ERROR("Microcode HW error detected. Restarting.\n");
5126
5127 /* Tell the device to stop sending interrupts */
5128 iwl4965_disable_interrupts(priv);
5129
5130 iwl4965_irq_handle_error(priv);
5131
5132 handled |= CSR_INT_BIT_HW_ERR;
5133
5134 spin_unlock_irqrestore(&priv->lock, flags);
5135
5136 return;
5137 }
5138
5139 #ifdef CONFIG_IWL4965_DEBUG
5140 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5141 /* NIC fires this, but we don't use it, redundant with WAKEUP */
5142 if (inta & CSR_INT_BIT_SCD)
5143 IWL_DEBUG_ISR("Scheduler finished to transmit "
5144 "the frame/frames.\n");
5145
5146 /* Alive notification via Rx interrupt will do the real work */
5147 if (inta & CSR_INT_BIT_ALIVE)
5148 IWL_DEBUG_ISR("Alive interrupt\n");
5149 }
5150 #endif
5151 /* Safely ignore these bits for debug checks below */
5152 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
5153
5154 /* HW RF KILL switch toggled */
5155 if (inta & CSR_INT_BIT_RF_KILL) {
5156 int hw_rf_kill = 0;
5157 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
5158 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
5159 hw_rf_kill = 1;
5160
5161 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
5162 "RF_KILL bit toggled to %s.\n",
5163 hw_rf_kill ? "disable radio":"enable radio");
5164
5165 /* Queue restart only if RF_KILL switch was set to "kill"
5166 * when we loaded driver, and is now set to "enable".
5167 * After we're Alive, RF_KILL gets handled by
5168 * iwl_rx_card_state_notif() */
5169 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
5170 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5171 queue_work(priv->workqueue, &priv->restart);
5172 }
5173
5174 handled |= CSR_INT_BIT_RF_KILL;
5175 }
5176
5177 /* Chip got too hot and stopped itself */
5178 if (inta & CSR_INT_BIT_CT_KILL) {
5179 IWL_ERROR("Microcode CT kill error detected.\n");
5180 handled |= CSR_INT_BIT_CT_KILL;
5181 }
5182
5183 /* Error detected by uCode */
5184 if (inta & CSR_INT_BIT_SW_ERR) {
5185 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
5186 inta);
5187 iwl4965_irq_handle_error(priv);
5188 handled |= CSR_INT_BIT_SW_ERR;
5189 }
5190
5191 /* uCode wakes up after power-down sleep */
5192 if (inta & CSR_INT_BIT_WAKEUP) {
5193 IWL_DEBUG_ISR("Wakeup interrupt\n");
5194 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
5195 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
5196 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
5197 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
5198 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
5199 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
5200 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
5201
5202 handled |= CSR_INT_BIT_WAKEUP;
5203 }
5204
5205 /* All uCode command responses, including Tx command responses,
5206 * Rx "responses" (frame-received notification), and other
5207 * notifications from uCode come through here*/
5208 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
5209 iwl4965_rx_handle(priv);
5210 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
5211 }
5212
5213 if (inta & CSR_INT_BIT_FH_TX) {
5214 IWL_DEBUG_ISR("Tx interrupt\n");
5215 handled |= CSR_INT_BIT_FH_TX;
5216 }
5217
5218 if (inta & ~handled)
5219 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
5220
5221 if (inta & ~CSR_INI_SET_MASK) {
5222 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
5223 inta & ~CSR_INI_SET_MASK);
5224 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
5225 }
5226
5227 /* Re-enable all interrupts */
5228 iwl4965_enable_interrupts(priv);
5229
5230 #ifdef CONFIG_IWL4965_DEBUG
5231 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5232 inta = iwl4965_read32(priv, CSR_INT);
5233 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5234 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5235 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
5236 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
5237 }
5238 #endif
5239 spin_unlock_irqrestore(&priv->lock, flags);
5240 }
5241
5242 static irqreturn_t iwl4965_isr(int irq, void *data)
5243 {
5244 struct iwl4965_priv *priv = data;
5245 u32 inta, inta_mask;
5246 u32 inta_fh;
5247 if (!priv)
5248 return IRQ_NONE;
5249
5250 spin_lock(&priv->lock);
5251
5252 /* Disable (but don't clear!) interrupts here to avoid
5253 * back-to-back ISRs and sporadic interrupts from our NIC.
5254 * If we have something to service, the tasklet will re-enable ints.
5255 * If we *don't* have something, we'll re-enable before leaving here. */
5256 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
5257 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
5258
5259 /* Discover which interrupts are active/pending */
5260 inta = iwl4965_read32(priv, CSR_INT);
5261 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5262
5263 /* Ignore interrupt if there's nothing in NIC to service.
5264 * This may be due to IRQ shared with another device,
5265 * or due to sporadic interrupts thrown from our NIC. */
5266 if (!inta && !inta_fh) {
5267 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5268 goto none;
5269 }
5270
5271 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
5272 /* Hardware disappeared. It might have already raised
5273 * an interrupt */
5274 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
5275 goto unplugged;
5276 }
5277
5278 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5279 inta, inta_mask, inta_fh);
5280
5281 inta &= ~CSR_INT_BIT_SCD;
5282
5283 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
5284 if (likely(inta || inta_fh))
5285 tasklet_schedule(&priv->irq_tasklet);
5286
5287 unplugged:
5288 spin_unlock(&priv->lock);
5289 return IRQ_HANDLED;
5290
5291 none:
5292 /* re-enable interrupts here since we don't have anything to service. */
5293 iwl4965_enable_interrupts(priv);
5294 spin_unlock(&priv->lock);
5295 return IRQ_NONE;
5296 }
5297
5298 /************************** EEPROM BANDS ****************************
5299 *
5300 * The iwl4965_eeprom_band definitions below provide the mapping from the
5301 * EEPROM contents to the specific channel number supported for each
5302 * band.
5303 *
5304 * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
5305 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5306 * The specific geography and calibration information for that channel
5307 * is contained in the eeprom map itself.
5308 *
5309 * During init, we copy the eeprom information and channel map
5310 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5311 *
5312 * channel_map_24/52 provides the index in the channel_info array for a
5313 * given channel. We have to have two separate maps as there is channel
5314 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5315 * band_2
5316 *
5317 * A value of 0xff stored in the channel_map indicates that the channel
5318 * is not supported by the hardware at all.
5319 *
5320 * A value of 0xfe in the channel_map indicates that the channel is not
5321 * valid for Tx with the current hardware. This means that
5322 * while the system can tune and receive on a given channel, it may not
5323 * be able to associate or transmit any frames on that
5324 * channel. There is no corresponding channel information for that
5325 * entry.
5326 *
5327 *********************************************************************/
5328
5329 /* 2.4 GHz */
5330 static const u8 iwl4965_eeprom_band_1[14] = {
5331 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5332 };
5333
5334 /* 5.2 GHz bands */
5335 static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
5336 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5337 };
5338
5339 static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
5340 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5341 };
5342
5343 static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
5344 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5345 };
5346
5347 static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
5348 145, 149, 153, 157, 161, 165
5349 };
5350
5351 static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
5352 1, 2, 3, 4, 5, 6, 7
5353 };
5354
5355 static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
5356 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5357 };
5358
5359 static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
5360 int band,
5361 int *eeprom_ch_count,
5362 const struct iwl4965_eeprom_channel
5363 **eeprom_ch_info,
5364 const u8 **eeprom_ch_index)
5365 {
5366 switch (band) {
5367 case 1: /* 2.4GHz band */
5368 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
5369 *eeprom_ch_info = priv->eeprom.band_1_channels;
5370 *eeprom_ch_index = iwl4965_eeprom_band_1;
5371 break;
5372 case 2: /* 4.9GHz band */
5373 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
5374 *eeprom_ch_info = priv->eeprom.band_2_channels;
5375 *eeprom_ch_index = iwl4965_eeprom_band_2;
5376 break;
5377 case 3: /* 5.2GHz band */
5378 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
5379 *eeprom_ch_info = priv->eeprom.band_3_channels;
5380 *eeprom_ch_index = iwl4965_eeprom_band_3;
5381 break;
5382 case 4: /* 5.5GHz band */
5383 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
5384 *eeprom_ch_info = priv->eeprom.band_4_channels;
5385 *eeprom_ch_index = iwl4965_eeprom_band_4;
5386 break;
5387 case 5: /* 5.7GHz band */
5388 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
5389 *eeprom_ch_info = priv->eeprom.band_5_channels;
5390 *eeprom_ch_index = iwl4965_eeprom_band_5;
5391 break;
5392 case 6: /* 2.4GHz FAT channels */
5393 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
5394 *eeprom_ch_info = priv->eeprom.band_24_channels;
5395 *eeprom_ch_index = iwl4965_eeprom_band_6;
5396 break;
5397 case 7: /* 5 GHz FAT channels */
5398 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
5399 *eeprom_ch_info = priv->eeprom.band_52_channels;
5400 *eeprom_ch_index = iwl4965_eeprom_band_7;
5401 break;
5402 default:
5403 BUG();
5404 return;
5405 }
5406 }
5407
5408 /**
5409 * iwl4965_get_channel_info - Find driver's private channel info
5410 *
5411 * Based on band and channel number.
5412 */
5413 const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
5414 int phymode, u16 channel)
5415 {
5416 int i;
5417
5418 switch (phymode) {
5419 case MODE_IEEE80211A:
5420 for (i = 14; i < priv->channel_count; i++) {
5421 if (priv->channel_info[i].channel == channel)
5422 return &priv->channel_info[i];
5423 }
5424 break;
5425
5426 case MODE_IEEE80211B:
5427 case MODE_IEEE80211G:
5428 if (channel >= 1 && channel <= 14)
5429 return &priv->channel_info[channel - 1];
5430 break;
5431
5432 }
5433
5434 return NULL;
5435 }
5436
5437 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5438 ? # x " " : "")
5439
5440 /**
5441 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5442 */
5443 static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
5444 {
5445 int eeprom_ch_count = 0;
5446 const u8 *eeprom_ch_index = NULL;
5447 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
5448 int band, ch;
5449 struct iwl4965_channel_info *ch_info;
5450
5451 if (priv->channel_count) {
5452 IWL_DEBUG_INFO("Channel map already initialized.\n");
5453 return 0;
5454 }
5455
5456 if (priv->eeprom.version < 0x2f) {
5457 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5458 priv->eeprom.version);
5459 return -EINVAL;
5460 }
5461
5462 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5463
5464 priv->channel_count =
5465 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5466 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5467 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5468 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5469 ARRAY_SIZE(iwl4965_eeprom_band_5);
5470
5471 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5472
5473 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
5474 priv->channel_count, GFP_KERNEL);
5475 if (!priv->channel_info) {
5476 IWL_ERROR("Could not allocate channel_info\n");
5477 priv->channel_count = 0;
5478 return -ENOMEM;
5479 }
5480
5481 ch_info = priv->channel_info;
5482
5483 /* Loop through the 5 EEPROM bands adding them in order to the
5484 * channel map we maintain (that contains additional information than
5485 * what just in the EEPROM) */
5486 for (band = 1; band <= 5; band++) {
5487
5488 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
5489 &eeprom_ch_info, &eeprom_ch_index);
5490
5491 /* Loop through each band adding each of the channels */
5492 for (ch = 0; ch < eeprom_ch_count; ch++) {
5493 ch_info->channel = eeprom_ch_index[ch];
5494 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5495 MODE_IEEE80211A;
5496
5497 /* permanently store EEPROM's channel regulatory flags
5498 * and max power in channel info database. */
5499 ch_info->eeprom = eeprom_ch_info[ch];
5500
5501 /* Copy the run-time flags so they are there even on
5502 * invalid channels */
5503 ch_info->flags = eeprom_ch_info[ch].flags;
5504
5505 if (!(is_channel_valid(ch_info))) {
5506 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5507 "No traffic\n",
5508 ch_info->channel,
5509 ch_info->flags,
5510 is_channel_a_band(ch_info) ?
5511 "5.2" : "2.4");
5512 ch_info++;
5513 continue;
5514 }
5515
5516 /* Initialize regulatory-based run-time data */
5517 ch_info->max_power_avg = ch_info->curr_txpow =
5518 eeprom_ch_info[ch].max_power_avg;
5519 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5520 ch_info->min_power = 0;
5521
5522 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5523 " %ddBm): Ad-Hoc %ssupported\n",
5524 ch_info->channel,
5525 is_channel_a_band(ch_info) ?
5526 "5.2" : "2.4",
5527 CHECK_AND_PRINT(IBSS),
5528 CHECK_AND_PRINT(ACTIVE),
5529 CHECK_AND_PRINT(RADAR),
5530 CHECK_AND_PRINT(WIDE),
5531 CHECK_AND_PRINT(NARROW),
5532 CHECK_AND_PRINT(DFS),
5533 eeprom_ch_info[ch].flags,
5534 eeprom_ch_info[ch].max_power_avg,
5535 ((eeprom_ch_info[ch].
5536 flags & EEPROM_CHANNEL_IBSS)
5537 && !(eeprom_ch_info[ch].
5538 flags & EEPROM_CHANNEL_RADAR))
5539 ? "" : "not ");
5540
5541 /* Set the user_txpower_limit to the highest power
5542 * supported by any channel */
5543 if (eeprom_ch_info[ch].max_power_avg >
5544 priv->user_txpower_limit)
5545 priv->user_txpower_limit =
5546 eeprom_ch_info[ch].max_power_avg;
5547
5548 ch_info++;
5549 }
5550 }
5551
5552 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
5553 for (band = 6; band <= 7; band++) {
5554 int phymode;
5555 u8 fat_extension_chan;
5556
5557 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
5558 &eeprom_ch_info, &eeprom_ch_index);
5559
5560 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
5561 phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
5562
5563 /* Loop through each band adding each of the channels */
5564 for (ch = 0; ch < eeprom_ch_count; ch++) {
5565
5566 if ((band == 6) &&
5567 ((eeprom_ch_index[ch] == 5) ||
5568 (eeprom_ch_index[ch] == 6) ||
5569 (eeprom_ch_index[ch] == 7)))
5570 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5571 else
5572 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5573
5574 /* Set up driver's info for lower half */
5575 iwl4965_set_fat_chan_info(priv, phymode,
5576 eeprom_ch_index[ch],
5577 &(eeprom_ch_info[ch]),
5578 fat_extension_chan);
5579
5580 /* Set up driver's info for upper half */
5581 iwl4965_set_fat_chan_info(priv, phymode,
5582 (eeprom_ch_index[ch] + 4),
5583 &(eeprom_ch_info[ch]),
5584 HT_IE_EXT_CHANNEL_BELOW);
5585 }
5586 }
5587
5588 return 0;
5589 }
5590
5591 /*
5592 * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
5593 */
5594 static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
5595 {
5596 kfree(priv->channel_info);
5597 priv->channel_count = 0;
5598 }
5599
5600 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5601 * sending probe req. This should be set long enough to hear probe responses
5602 * from more than one AP. */
5603 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5604 #define IWL_ACTIVE_DWELL_TIME_52 (10)
5605
5606 /* For faster active scanning, scan will move to the next channel if fewer than
5607 * PLCP_QUIET_THRESH packets are heard on this channel within
5608 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5609 * time if it's a quiet channel (nothing responded to our probe, and there's
5610 * no other traffic).
5611 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5612 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5613 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5614
5615 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5616 * Must be set longer than active dwell time.
5617 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5618 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5619 #define IWL_PASSIVE_DWELL_TIME_52 (10)
5620 #define IWL_PASSIVE_DWELL_BASE (100)
5621 #define IWL_CHANNEL_TUNE_TIME 5
5622
5623 static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
5624 {
5625 if (phymode == MODE_IEEE80211A)
5626 return IWL_ACTIVE_DWELL_TIME_52;
5627 else
5628 return IWL_ACTIVE_DWELL_TIME_24;
5629 }
5630
5631 static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
5632 {
5633 u16 active = iwl4965_get_active_dwell_time(priv, phymode);
5634 u16 passive = (phymode != MODE_IEEE80211A) ?
5635 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5636 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5637
5638 if (iwl4965_is_associated(priv)) {
5639 /* If we're associated, we clamp the maximum passive
5640 * dwell time to be 98% of the beacon interval (minus
5641 * 2 * channel tune time) */
5642 passive = priv->beacon_int;
5643 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5644 passive = IWL_PASSIVE_DWELL_BASE;
5645 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5646 }
5647
5648 if (passive <= active)
5649 passive = active + 1;
5650
5651 return passive;
5652 }
5653
5654 static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
5655 u8 is_active, u8 direct_mask,
5656 struct iwl4965_scan_channel *scan_ch)
5657 {
5658 const struct ieee80211_channel *channels = NULL;
5659 const struct ieee80211_hw_mode *hw_mode;
5660 const struct iwl4965_channel_info *ch_info;
5661 u16 passive_dwell = 0;
5662 u16 active_dwell = 0;
5663 int added, i;
5664
5665 hw_mode = iwl4965_get_hw_mode(priv, phymode);
5666 if (!hw_mode)
5667 return 0;
5668
5669 channels = hw_mode->channels;
5670
5671 active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
5672 passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
5673
5674 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5675 if (channels[i].chan ==
5676 le16_to_cpu(priv->active_rxon.channel)) {
5677 if (iwl4965_is_associated(priv)) {
5678 IWL_DEBUG_SCAN
5679 ("Skipping current channel %d\n",
5680 le16_to_cpu(priv->active_rxon.channel));
5681 continue;
5682 }
5683 } else if (priv->only_active_channel)
5684 continue;
5685
5686 scan_ch->channel = channels[i].chan;
5687
5688 ch_info = iwl4965_get_channel_info(priv, phymode,
5689 scan_ch->channel);
5690 if (!is_channel_valid(ch_info)) {
5691 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5692 scan_ch->channel);
5693 continue;
5694 }
5695
5696 if (!is_active || is_channel_passive(ch_info) ||
5697 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5698 scan_ch->type = 0; /* passive */
5699 else
5700 scan_ch->type = 1; /* active */
5701
5702 if (scan_ch->type & 1)
5703 scan_ch->type |= (direct_mask << 1);
5704
5705 if (is_channel_narrow(ch_info))
5706 scan_ch->type |= (1 << 7);
5707
5708 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5709 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5710
5711 /* Set txpower levels to defaults */
5712 scan_ch->tpc.dsp_atten = 110;
5713 /* scan_pwr_info->tpc.dsp_atten; */
5714
5715 /*scan_pwr_info->tpc.tx_gain; */
5716 if (phymode == MODE_IEEE80211A)
5717 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5718 else {
5719 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5720 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
5721 * power level:
5722 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
5723 */
5724 }
5725
5726 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5727 scan_ch->channel,
5728 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5729 (scan_ch->type & 1) ?
5730 active_dwell : passive_dwell);
5731
5732 scan_ch++;
5733 added++;
5734 }
5735
5736 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5737 return added;
5738 }
5739
5740 static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
5741 {
5742 int i, j;
5743 for (i = 0; i < 3; i++) {
5744 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5745 for (j = 0; j < hw_mode->num_channels; j++)
5746 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5747 }
5748 }
5749
5750 static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
5751 struct ieee80211_rate *rates)
5752 {
5753 int i;
5754
5755 for (i = 0; i < IWL_RATE_COUNT; i++) {
5756 rates[i].rate = iwl4965_rates[i].ieee * 5;
5757 rates[i].val = i; /* Rate scaling will work on indexes */
5758 rates[i].val2 = i;
5759 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5760 /* Only OFDM have the bits-per-symbol set */
5761 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5762 rates[i].flags |= IEEE80211_RATE_OFDM;
5763 else {
5764 /*
5765 * If CCK 1M then set rate flag to CCK else CCK_2
5766 * which is CCK | PREAMBLE2
5767 */
5768 rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
5769 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5770 }
5771
5772 /* Set up which ones are basic rates... */
5773 if (IWL_BASIC_RATES_MASK & (1 << i))
5774 rates[i].flags |= IEEE80211_RATE_BASIC;
5775 }
5776 }
5777
5778 /**
5779 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
5780 */
5781 static int iwl4965_init_geos(struct iwl4965_priv *priv)
5782 {
5783 struct iwl4965_channel_info *ch;
5784 struct ieee80211_hw_mode *modes;
5785 struct ieee80211_channel *channels;
5786 struct ieee80211_channel *geo_ch;
5787 struct ieee80211_rate *rates;
5788 int i = 0;
5789 enum {
5790 A = 0,
5791 B = 1,
5792 G = 2,
5793 };
5794 int mode_count = 3;
5795
5796 if (priv->modes) {
5797 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5798 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5799 return 0;
5800 }
5801
5802 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5803 GFP_KERNEL);
5804 if (!modes)
5805 return -ENOMEM;
5806
5807 channels = kzalloc(sizeof(struct ieee80211_channel) *
5808 priv->channel_count, GFP_KERNEL);
5809 if (!channels) {
5810 kfree(modes);
5811 return -ENOMEM;
5812 }
5813
5814 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5815 GFP_KERNEL);
5816 if (!rates) {
5817 kfree(modes);
5818 kfree(channels);
5819 return -ENOMEM;
5820 }
5821
5822 /* 0 = 802.11a
5823 * 1 = 802.11b
5824 * 2 = 802.11g
5825 */
5826
5827 /* 5.2GHz channels start after the 2.4GHz channels */
5828 modes[A].mode = MODE_IEEE80211A;
5829 modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
5830 modes[A].rates = rates;
5831 modes[A].num_rates = 8; /* just OFDM */
5832 modes[A].rates = &rates[4];
5833 modes[A].num_channels = 0;
5834 #ifdef CONFIG_IWL4965_HT
5835 iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
5836 #endif
5837
5838 modes[B].mode = MODE_IEEE80211B;
5839 modes[B].channels = channels;
5840 modes[B].rates = rates;
5841 modes[B].num_rates = 4; /* just CCK */
5842 modes[B].num_channels = 0;
5843
5844 modes[G].mode = MODE_IEEE80211G;
5845 modes[G].channels = channels;
5846 modes[G].rates = rates;
5847 modes[G].num_rates = 12; /* OFDM & CCK */
5848 modes[G].num_channels = 0;
5849 #ifdef CONFIG_IWL4965_HT
5850 iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
5851 #endif
5852
5853 priv->ieee_channels = channels;
5854 priv->ieee_rates = rates;
5855
5856 iwl4965_init_hw_rates(priv, rates);
5857
5858 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5859 ch = &priv->channel_info[i];
5860
5861 if (!is_channel_valid(ch)) {
5862 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5863 "skipping.\n",
5864 ch->channel, is_channel_a_band(ch) ?
5865 "5.2" : "2.4");
5866 continue;
5867 }
5868
5869 if (is_channel_a_band(ch)) {
5870 geo_ch = &modes[A].channels[modes[A].num_channels++];
5871 } else {
5872 geo_ch = &modes[B].channels[modes[B].num_channels++];
5873 modes[G].num_channels++;
5874 }
5875
5876 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5877 geo_ch->chan = ch->channel;
5878 geo_ch->power_level = ch->max_power_avg;
5879 geo_ch->antenna_max = 0xff;
5880
5881 if (is_channel_valid(ch)) {
5882 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5883 if (ch->flags & EEPROM_CHANNEL_IBSS)
5884 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5885
5886 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5887 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5888
5889 if (ch->flags & EEPROM_CHANNEL_RADAR)
5890 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5891
5892 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5893 priv->max_channel_txpower_limit =
5894 ch->max_power_avg;
5895 }
5896
5897 geo_ch->val = geo_ch->flag;
5898 }
5899
5900 if ((modes[A].num_channels == 0) && priv->is_abg) {
5901 printk(KERN_INFO DRV_NAME
5902 ": Incorrectly detected BG card as ABG. Please send "
5903 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5904 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5905 priv->is_abg = 0;
5906 }
5907
5908 printk(KERN_INFO DRV_NAME
5909 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5910 modes[G].num_channels, modes[A].num_channels);
5911
5912 /*
5913 * NOTE: We register these in preference of order -- the
5914 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5915 * a phymode based on rates or AP capabilities but seems to
5916 * configure it purely on if the channel being configured
5917 * is supported by a mode -- and the first match is taken
5918 */
5919
5920 if (modes[G].num_channels)
5921 ieee80211_register_hwmode(priv->hw, &modes[G]);
5922 if (modes[B].num_channels)
5923 ieee80211_register_hwmode(priv->hw, &modes[B]);
5924 if (modes[A].num_channels)
5925 ieee80211_register_hwmode(priv->hw, &modes[A]);
5926
5927 priv->modes = modes;
5928 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5929
5930 return 0;
5931 }
5932
5933 /*
5934 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
5935 */
5936 static void iwl4965_free_geos(struct iwl4965_priv *priv)
5937 {
5938 kfree(priv->modes);
5939 kfree(priv->ieee_channels);
5940 kfree(priv->ieee_rates);
5941 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5942 }
5943
5944 /******************************************************************************
5945 *
5946 * uCode download functions
5947 *
5948 ******************************************************************************/
5949
5950 static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
5951 {
5952 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5953 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5954 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5955 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5956 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5957 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5958 }
5959
5960 /**
5961 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
5962 * looking at all data.
5963 */
5964 static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
5965 u32 len)
5966 {
5967 u32 val;
5968 u32 save_len = len;
5969 int rc = 0;
5970 u32 errcnt;
5971
5972 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5973
5974 rc = iwl4965_grab_nic_access(priv);
5975 if (rc)
5976 return rc;
5977
5978 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5979
5980 errcnt = 0;
5981 for (; len > 0; len -= sizeof(u32), image++) {
5982 /* read data comes through single port, auto-incr addr */
5983 /* NOTE: Use the debugless read so we don't flood kernel log
5984 * if IWL_DL_IO is set */
5985 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5986 if (val != le32_to_cpu(*image)) {
5987 IWL_ERROR("uCode INST section is invalid at "
5988 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5989 save_len - len, val, le32_to_cpu(*image));
5990 rc = -EIO;
5991 errcnt++;
5992 if (errcnt >= 20)
5993 break;
5994 }
5995 }
5996
5997 iwl4965_release_nic_access(priv);
5998
5999 if (!errcnt)
6000 IWL_DEBUG_INFO
6001 ("ucode image in INSTRUCTION memory is good\n");
6002
6003 return rc;
6004 }
6005
6006
6007 /**
6008 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
6009 * using sample data 100 bytes apart. If these sample points are good,
6010 * it's a pretty good bet that everything between them is good, too.
6011 */
6012 static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
6013 {
6014 u32 val;
6015 int rc = 0;
6016 u32 errcnt = 0;
6017 u32 i;
6018
6019 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
6020
6021 rc = iwl4965_grab_nic_access(priv);
6022 if (rc)
6023 return rc;
6024
6025 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
6026 /* read data comes through single port, auto-incr addr */
6027 /* NOTE: Use the debugless read so we don't flood kernel log
6028 * if IWL_DL_IO is set */
6029 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
6030 i + RTC_INST_LOWER_BOUND);
6031 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
6032 if (val != le32_to_cpu(*image)) {
6033 #if 0 /* Enable this if you want to see details */
6034 IWL_ERROR("uCode INST section is invalid at "
6035 "offset 0x%x, is 0x%x, s/b 0x%x\n",
6036 i, val, *image);
6037 #endif
6038 rc = -EIO;
6039 errcnt++;
6040 if (errcnt >= 3)
6041 break;
6042 }
6043 }
6044
6045 iwl4965_release_nic_access(priv);
6046
6047 return rc;
6048 }
6049
6050
6051 /**
6052 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
6053 * and verify its contents
6054 */
6055 static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
6056 {
6057 __le32 *image;
6058 u32 len;
6059 int rc = 0;
6060
6061 /* Try bootstrap */
6062 image = (__le32 *)priv->ucode_boot.v_addr;
6063 len = priv->ucode_boot.len;
6064 rc = iwl4965_verify_inst_sparse(priv, image, len);
6065 if (rc == 0) {
6066 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
6067 return 0;
6068 }
6069
6070 /* Try initialize */
6071 image = (__le32 *)priv->ucode_init.v_addr;
6072 len = priv->ucode_init.len;
6073 rc = iwl4965_verify_inst_sparse(priv, image, len);
6074 if (rc == 0) {
6075 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
6076 return 0;
6077 }
6078
6079 /* Try runtime/protocol */
6080 image = (__le32 *)priv->ucode_code.v_addr;
6081 len = priv->ucode_code.len;
6082 rc = iwl4965_verify_inst_sparse(priv, image, len);
6083 if (rc == 0) {
6084 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
6085 return 0;
6086 }
6087
6088 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
6089
6090 /* Since nothing seems to match, show first several data entries in
6091 * instruction SRAM, so maybe visual inspection will give a clue.
6092 * Selection of bootstrap image (vs. other images) is arbitrary. */
6093 image = (__le32 *)priv->ucode_boot.v_addr;
6094 len = priv->ucode_boot.len;
6095 rc = iwl4965_verify_inst_full(priv, image, len);
6096
6097 return rc;
6098 }
6099
6100
6101 /* check contents of special bootstrap uCode SRAM */
6102 static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
6103 {
6104 __le32 *image = priv->ucode_boot.v_addr;
6105 u32 len = priv->ucode_boot.len;
6106 u32 reg;
6107 u32 val;
6108
6109 IWL_DEBUG_INFO("Begin verify bsm\n");
6110
6111 /* verify BSM SRAM contents */
6112 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
6113 for (reg = BSM_SRAM_LOWER_BOUND;
6114 reg < BSM_SRAM_LOWER_BOUND + len;
6115 reg += sizeof(u32), image ++) {
6116 val = iwl4965_read_prph(priv, reg);
6117 if (val != le32_to_cpu(*image)) {
6118 IWL_ERROR("BSM uCode verification failed at "
6119 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
6120 BSM_SRAM_LOWER_BOUND,
6121 reg - BSM_SRAM_LOWER_BOUND, len,
6122 val, le32_to_cpu(*image));
6123 return -EIO;
6124 }
6125 }
6126
6127 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
6128
6129 return 0;
6130 }
6131
6132 /**
6133 * iwl4965_load_bsm - Load bootstrap instructions
6134 *
6135 * BSM operation:
6136 *
6137 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
6138 * in special SRAM that does not power down during RFKILL. When powering back
6139 * up after power-saving sleeps (or during initial uCode load), the BSM loads
6140 * the bootstrap program into the on-board processor, and starts it.
6141 *
6142 * The bootstrap program loads (via DMA) instructions and data for a new
6143 * program from host DRAM locations indicated by the host driver in the
6144 * BSM_DRAM_* registers. Once the new program is loaded, it starts
6145 * automatically.
6146 *
6147 * When initializing the NIC, the host driver points the BSM to the
6148 * "initialize" uCode image. This uCode sets up some internal data, then
6149 * notifies host via "initialize alive" that it is complete.
6150 *
6151 * The host then replaces the BSM_DRAM_* pointer values to point to the
6152 * normal runtime uCode instructions and a backup uCode data cache buffer
6153 * (filled initially with starting data values for the on-board processor),
6154 * then triggers the "initialize" uCode to load and launch the runtime uCode,
6155 * which begins normal operation.
6156 *
6157 * When doing a power-save shutdown, runtime uCode saves data SRAM into
6158 * the backup data cache in DRAM before SRAM is powered down.
6159 *
6160 * When powering back up, the BSM loads the bootstrap program. This reloads
6161 * the runtime uCode instructions and the backup data cache into SRAM,
6162 * and re-launches the runtime uCode from where it left off.
6163 */
6164 static int iwl4965_load_bsm(struct iwl4965_priv *priv)
6165 {
6166 __le32 *image = priv->ucode_boot.v_addr;
6167 u32 len = priv->ucode_boot.len;
6168 dma_addr_t pinst;
6169 dma_addr_t pdata;
6170 u32 inst_len;
6171 u32 data_len;
6172 int rc;
6173 int i;
6174 u32 done;
6175 u32 reg_offset;
6176
6177 IWL_DEBUG_INFO("Begin load bsm\n");
6178
6179 /* make sure bootstrap program is no larger than BSM's SRAM size */
6180 if (len > IWL_MAX_BSM_SIZE)
6181 return -EINVAL;
6182
6183 /* Tell bootstrap uCode where to find the "Initialize" uCode
6184 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
6185 * NOTE: iwl4965_initialize_alive_start() will replace these values,
6186 * after the "initialize" uCode has run, to point to
6187 * runtime/protocol instructions and backup data cache. */
6188 pinst = priv->ucode_init.p_addr >> 4;
6189 pdata = priv->ucode_init_data.p_addr >> 4;
6190 inst_len = priv->ucode_init.len;
6191 data_len = priv->ucode_init_data.len;
6192
6193 rc = iwl4965_grab_nic_access(priv);
6194 if (rc)
6195 return rc;
6196
6197 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6198 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6199 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
6200 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
6201
6202 /* Fill BSM memory with bootstrap instructions */
6203 for (reg_offset = BSM_SRAM_LOWER_BOUND;
6204 reg_offset < BSM_SRAM_LOWER_BOUND + len;
6205 reg_offset += sizeof(u32), image++)
6206 _iwl4965_write_prph(priv, reg_offset,
6207 le32_to_cpu(*image));
6208
6209 rc = iwl4965_verify_bsm(priv);
6210 if (rc) {
6211 iwl4965_release_nic_access(priv);
6212 return rc;
6213 }
6214
6215 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
6216 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
6217 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
6218 RTC_INST_LOWER_BOUND);
6219 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
6220
6221 /* Load bootstrap code into instruction SRAM now,
6222 * to prepare to load "initialize" uCode */
6223 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
6224 BSM_WR_CTRL_REG_BIT_START);
6225
6226 /* Wait for load of bootstrap uCode to finish */
6227 for (i = 0; i < 100; i++) {
6228 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
6229 if (!(done & BSM_WR_CTRL_REG_BIT_START))
6230 break;
6231 udelay(10);
6232 }
6233 if (i < 100)
6234 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
6235 else {
6236 IWL_ERROR("BSM write did not complete!\n");
6237 return -EIO;
6238 }
6239
6240 /* Enable future boot loads whenever power management unit triggers it
6241 * (e.g. when powering back up after power-save shutdown) */
6242 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
6243 BSM_WR_CTRL_REG_BIT_START_EN);
6244
6245 iwl4965_release_nic_access(priv);
6246
6247 return 0;
6248 }
6249
6250 static void iwl4965_nic_start(struct iwl4965_priv *priv)
6251 {
6252 /* Remove all resets to allow NIC to operate */
6253 iwl4965_write32(priv, CSR_RESET, 0);
6254 }
6255
6256
6257 /**
6258 * iwl4965_read_ucode - Read uCode images from disk file.
6259 *
6260 * Copy into buffers for card to fetch via bus-mastering
6261 */
6262 static int iwl4965_read_ucode(struct iwl4965_priv *priv)
6263 {
6264 struct iwl4965_ucode *ucode;
6265 int ret;
6266 const struct firmware *ucode_raw;
6267 const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
6268 u8 *src;
6269 size_t len;
6270 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
6271
6272 /* Ask kernel firmware_class module to get the boot firmware off disk.
6273 * request_firmware() is synchronous, file is in memory on return. */
6274 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
6275 if (ret < 0) {
6276 IWL_ERROR("%s firmware file req failed: Reason %d\n",
6277 name, ret);
6278 goto error;
6279 }
6280
6281 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
6282 name, ucode_raw->size);
6283
6284 /* Make sure that we got at least our header! */
6285 if (ucode_raw->size < sizeof(*ucode)) {
6286 IWL_ERROR("File size way too small!\n");
6287 ret = -EINVAL;
6288 goto err_release;
6289 }
6290
6291 /* Data from ucode file: header followed by uCode images */
6292 ucode = (void *)ucode_raw->data;
6293
6294 ver = le32_to_cpu(ucode->ver);
6295 inst_size = le32_to_cpu(ucode->inst_size);
6296 data_size = le32_to_cpu(ucode->data_size);
6297 init_size = le32_to_cpu(ucode->init_size);
6298 init_data_size = le32_to_cpu(ucode->init_data_size);
6299 boot_size = le32_to_cpu(ucode->boot_size);
6300
6301 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
6302 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
6303 inst_size);
6304 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
6305 data_size);
6306 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
6307 init_size);
6308 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
6309 init_data_size);
6310 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
6311 boot_size);
6312
6313 /* Verify size of file vs. image size info in file's header */
6314 if (ucode_raw->size < sizeof(*ucode) +
6315 inst_size + data_size + init_size +
6316 init_data_size + boot_size) {
6317
6318 IWL_DEBUG_INFO("uCode file size %d too small\n",
6319 (int)ucode_raw->size);
6320 ret = -EINVAL;
6321 goto err_release;
6322 }
6323
6324 /* Verify that uCode images will fit in card's SRAM */
6325 if (inst_size > IWL_MAX_INST_SIZE) {
6326 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
6327 inst_size);
6328 ret = -EINVAL;
6329 goto err_release;
6330 }
6331
6332 if (data_size > IWL_MAX_DATA_SIZE) {
6333 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
6334 data_size);
6335 ret = -EINVAL;
6336 goto err_release;
6337 }
6338 if (init_size > IWL_MAX_INST_SIZE) {
6339 IWL_DEBUG_INFO
6340 ("uCode init instr len %d too large to fit in\n",
6341 init_size);
6342 ret = -EINVAL;
6343 goto err_release;
6344 }
6345 if (init_data_size > IWL_MAX_DATA_SIZE) {
6346 IWL_DEBUG_INFO
6347 ("uCode init data len %d too large to fit in\n",
6348 init_data_size);
6349 ret = -EINVAL;
6350 goto err_release;
6351 }
6352 if (boot_size > IWL_MAX_BSM_SIZE) {
6353 IWL_DEBUG_INFO
6354 ("uCode boot instr len %d too large to fit in\n",
6355 boot_size);
6356 ret = -EINVAL;
6357 goto err_release;
6358 }
6359
6360 /* Allocate ucode buffers for card's bus-master loading ... */
6361
6362 /* Runtime instructions and 2 copies of data:
6363 * 1) unmodified from disk
6364 * 2) backup cache for save/restore during power-downs */
6365 priv->ucode_code.len = inst_size;
6366 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
6367
6368 priv->ucode_data.len = data_size;
6369 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
6370
6371 priv->ucode_data_backup.len = data_size;
6372 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
6373
6374 /* Initialization instructions and data */
6375 if (init_size && init_data_size) {
6376 priv->ucode_init.len = init_size;
6377 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
6378
6379 priv->ucode_init_data.len = init_data_size;
6380 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
6381
6382 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6383 goto err_pci_alloc;
6384 }
6385
6386 /* Bootstrap (instructions only, no data) */
6387 if (boot_size) {
6388 priv->ucode_boot.len = boot_size;
6389 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
6390
6391 if (!priv->ucode_boot.v_addr)
6392 goto err_pci_alloc;
6393 }
6394
6395 /* Copy images into buffers for card's bus-master reads ... */
6396
6397 /* Runtime instructions (first block of data in file) */
6398 src = &ucode->data[0];
6399 len = priv->ucode_code.len;
6400 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
6401 memcpy(priv->ucode_code.v_addr, src, len);
6402 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6403 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6404
6405 /* Runtime data (2nd block)
6406 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
6407 src = &ucode->data[inst_size];
6408 len = priv->ucode_data.len;
6409 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
6410 memcpy(priv->ucode_data.v_addr, src, len);
6411 memcpy(priv->ucode_data_backup.v_addr, src, len);
6412
6413 /* Initialization instructions (3rd block) */
6414 if (init_size) {
6415 src = &ucode->data[inst_size + data_size];
6416 len = priv->ucode_init.len;
6417 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6418 len);
6419 memcpy(priv->ucode_init.v_addr, src, len);
6420 }
6421
6422 /* Initialization data (4th block) */
6423 if (init_data_size) {
6424 src = &ucode->data[inst_size + data_size + init_size];
6425 len = priv->ucode_init_data.len;
6426 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6427 len);
6428 memcpy(priv->ucode_init_data.v_addr, src, len);
6429 }
6430
6431 /* Bootstrap instructions (5th block) */
6432 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6433 len = priv->ucode_boot.len;
6434 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
6435 memcpy(priv->ucode_boot.v_addr, src, len);
6436
6437 /* We have our copies now, allow OS release its copies */
6438 release_firmware(ucode_raw);
6439 return 0;
6440
6441 err_pci_alloc:
6442 IWL_ERROR("failed to allocate pci memory\n");
6443 ret = -ENOMEM;
6444 iwl4965_dealloc_ucode_pci(priv);
6445
6446 err_release:
6447 release_firmware(ucode_raw);
6448
6449 error:
6450 return ret;
6451 }
6452
6453
6454 /**
6455 * iwl4965_set_ucode_ptrs - Set uCode address location
6456 *
6457 * Tell initialization uCode where to find runtime uCode.
6458 *
6459 * BSM registers initially contain pointers to initialization uCode.
6460 * We need to replace them to load runtime uCode inst and data,
6461 * and to save runtime data when powering down.
6462 */
6463 static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
6464 {
6465 dma_addr_t pinst;
6466 dma_addr_t pdata;
6467 int rc = 0;
6468 unsigned long flags;
6469
6470 /* bits 35:4 for 4965 */
6471 pinst = priv->ucode_code.p_addr >> 4;
6472 pdata = priv->ucode_data_backup.p_addr >> 4;
6473
6474 spin_lock_irqsave(&priv->lock, flags);
6475 rc = iwl4965_grab_nic_access(priv);
6476 if (rc) {
6477 spin_unlock_irqrestore(&priv->lock, flags);
6478 return rc;
6479 }
6480
6481 /* Tell bootstrap uCode where to find image to load */
6482 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6483 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6484 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
6485 priv->ucode_data.len);
6486
6487 /* Inst bytecount must be last to set up, bit 31 signals uCode
6488 * that all new ptr/size info is in place */
6489 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
6490 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6491
6492 iwl4965_release_nic_access(priv);
6493
6494 spin_unlock_irqrestore(&priv->lock, flags);
6495
6496 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6497
6498 return rc;
6499 }
6500
6501 /**
6502 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
6503 *
6504 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6505 *
6506 * The 4965 "initialize" ALIVE reply contains calibration data for:
6507 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6508 * (3945 does not contain this data).
6509 *
6510 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6511 */
6512 static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
6513 {
6514 /* Check alive response for "valid" sign from uCode */
6515 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6516 /* We had an error bringing up the hardware, so take it
6517 * all the way back down so we can try again */
6518 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6519 goto restart;
6520 }
6521
6522 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6523 * This is a paranoid check, because we would not have gotten the
6524 * "initialize" alive if code weren't properly loaded. */
6525 if (iwl4965_verify_ucode(priv)) {
6526 /* Runtime instruction load was bad;
6527 * take it all the way back down so we can try again */
6528 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6529 goto restart;
6530 }
6531
6532 /* Calculate temperature */
6533 priv->temperature = iwl4965_get_temperature(priv);
6534
6535 /* Send pointers to protocol/runtime uCode image ... init code will
6536 * load and launch runtime uCode, which will send us another "Alive"
6537 * notification. */
6538 IWL_DEBUG_INFO("Initialization Alive received.\n");
6539 if (iwl4965_set_ucode_ptrs(priv)) {
6540 /* Runtime instruction load won't happen;
6541 * take it all the way back down so we can try again */
6542 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6543 goto restart;
6544 }
6545 return;
6546
6547 restart:
6548 queue_work(priv->workqueue, &priv->restart);
6549 }
6550
6551
6552 /**
6553 * iwl4965_alive_start - called after REPLY_ALIVE notification received
6554 * from protocol/runtime uCode (initialization uCode's
6555 * Alive gets handled by iwl4965_init_alive_start()).
6556 */
6557 static void iwl4965_alive_start(struct iwl4965_priv *priv)
6558 {
6559 int rc = 0;
6560
6561 IWL_DEBUG_INFO("Runtime Alive received.\n");
6562
6563 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6564 /* We had an error bringing up the hardware, so take it
6565 * all the way back down so we can try again */
6566 IWL_DEBUG_INFO("Alive failed.\n");
6567 goto restart;
6568 }
6569
6570 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6571 * This is a paranoid check, because we would not have gotten the
6572 * "runtime" alive if code weren't properly loaded. */
6573 if (iwl4965_verify_ucode(priv)) {
6574 /* Runtime instruction load was bad;
6575 * take it all the way back down so we can try again */
6576 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6577 goto restart;
6578 }
6579
6580 iwl4965_clear_stations_table(priv);
6581
6582 rc = iwl4965_alive_notify(priv);
6583 if (rc) {
6584 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6585 rc);
6586 goto restart;
6587 }
6588
6589 /* After the ALIVE response, we can send host commands to 4965 uCode */
6590 set_bit(STATUS_ALIVE, &priv->status);
6591
6592 /* Clear out the uCode error bit if it is set */
6593 clear_bit(STATUS_FW_ERROR, &priv->status);
6594
6595 if (iwl4965_is_rfkill(priv))
6596 return;
6597
6598 ieee80211_start_queues(priv->hw);
6599
6600 priv->active_rate = priv->rates_mask;
6601 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6602
6603 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6604
6605 if (iwl4965_is_associated(priv)) {
6606 struct iwl4965_rxon_cmd *active_rxon =
6607 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
6608
6609 memcpy(&priv->staging_rxon, &priv->active_rxon,
6610 sizeof(priv->staging_rxon));
6611 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6612 } else {
6613 /* Initialize our rx_config data */
6614 iwl4965_connection_init_rx_config(priv);
6615 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6616 }
6617
6618 /* Configure Bluetooth device coexistence support */
6619 iwl4965_send_bt_config(priv);
6620
6621 /* Configure the adapter for unassociated operation */
6622 iwl4965_commit_rxon(priv);
6623
6624 /* At this point, the NIC is initialized and operational */
6625 priv->notif_missed_beacons = 0;
6626 set_bit(STATUS_READY, &priv->status);
6627
6628 iwl4965_rf_kill_ct_config(priv);
6629
6630 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6631 wake_up_interruptible(&priv->wait_command_queue);
6632
6633 if (priv->error_recovering)
6634 iwl4965_error_recovery(priv);
6635
6636 return;
6637
6638 restart:
6639 queue_work(priv->workqueue, &priv->restart);
6640 }
6641
6642 static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
6643
6644 static void __iwl4965_down(struct iwl4965_priv *priv)
6645 {
6646 unsigned long flags;
6647 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6648 struct ieee80211_conf *conf = NULL;
6649
6650 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6651
6652 conf = ieee80211_get_hw_conf(priv->hw);
6653
6654 if (!exit_pending)
6655 set_bit(STATUS_EXIT_PENDING, &priv->status);
6656
6657 iwl4965_clear_stations_table(priv);
6658
6659 /* Unblock any waiting calls */
6660 wake_up_interruptible_all(&priv->wait_command_queue);
6661
6662 /* Wipe out the EXIT_PENDING status bit if we are not actually
6663 * exiting the module */
6664 if (!exit_pending)
6665 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6666
6667 /* stop and reset the on-board processor */
6668 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6669
6670 /* tell the device to stop sending interrupts */
6671 iwl4965_disable_interrupts(priv);
6672
6673 if (priv->mac80211_registered)
6674 ieee80211_stop_queues(priv->hw);
6675
6676 /* If we have not previously called iwl4965_init() then
6677 * clear all bits but the RF Kill and SUSPEND bits and return */
6678 if (!iwl4965_is_init(priv)) {
6679 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6680 STATUS_RF_KILL_HW |
6681 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6682 STATUS_RF_KILL_SW |
6683 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6684 STATUS_IN_SUSPEND;
6685 goto exit;
6686 }
6687
6688 /* ...otherwise clear out all the status bits but the RF Kill and
6689 * SUSPEND bits and continue taking the NIC down. */
6690 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6691 STATUS_RF_KILL_HW |
6692 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6693 STATUS_RF_KILL_SW |
6694 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6695 STATUS_IN_SUSPEND |
6696 test_bit(STATUS_FW_ERROR, &priv->status) <<
6697 STATUS_FW_ERROR;
6698
6699 spin_lock_irqsave(&priv->lock, flags);
6700 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6701 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6702 spin_unlock_irqrestore(&priv->lock, flags);
6703
6704 iwl4965_hw_txq_ctx_stop(priv);
6705 iwl4965_hw_rxq_stop(priv);
6706
6707 spin_lock_irqsave(&priv->lock, flags);
6708 if (!iwl4965_grab_nic_access(priv)) {
6709 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
6710 APMG_CLK_VAL_DMA_CLK_RQT);
6711 iwl4965_release_nic_access(priv);
6712 }
6713 spin_unlock_irqrestore(&priv->lock, flags);
6714
6715 udelay(5);
6716
6717 iwl4965_hw_nic_stop_master(priv);
6718 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6719 iwl4965_hw_nic_reset(priv);
6720
6721 exit:
6722 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
6723
6724 if (priv->ibss_beacon)
6725 dev_kfree_skb(priv->ibss_beacon);
6726 priv->ibss_beacon = NULL;
6727
6728 /* clear out any free frames */
6729 iwl4965_clear_free_frames(priv);
6730 }
6731
6732 static void iwl4965_down(struct iwl4965_priv *priv)
6733 {
6734 mutex_lock(&priv->mutex);
6735 __iwl4965_down(priv);
6736 mutex_unlock(&priv->mutex);
6737
6738 iwl4965_cancel_deferred_work(priv);
6739 }
6740
6741 #define MAX_HW_RESTARTS 5
6742
6743 static int __iwl4965_up(struct iwl4965_priv *priv)
6744 {
6745 int rc, i;
6746
6747 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6748 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6749 return -EIO;
6750 }
6751
6752 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6753 IWL_WARNING("Radio disabled by SW RF kill (module "
6754 "parameter)\n");
6755 return -ENODEV;
6756 }
6757
6758 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6759 IWL_ERROR("ucode not available for device bringup\n");
6760 return -EIO;
6761 }
6762
6763 /* If platform's RF_KILL switch is NOT set to KILL */
6764 if (iwl4965_read32(priv, CSR_GP_CNTRL) &
6765 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6766 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6767 else {
6768 set_bit(STATUS_RF_KILL_HW, &priv->status);
6769 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6770 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6771 return -ENODEV;
6772 }
6773 }
6774
6775 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6776
6777 rc = iwl4965_hw_nic_init(priv);
6778 if (rc) {
6779 IWL_ERROR("Unable to int nic\n");
6780 return rc;
6781 }
6782
6783 /* make sure rfkill handshake bits are cleared */
6784 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6785 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6786 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6787
6788 /* clear (again), then enable host interrupts */
6789 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6790 iwl4965_enable_interrupts(priv);
6791
6792 /* really make sure rfkill handshake bits are cleared */
6793 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6794 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6795
6796 /* Copy original ucode data image from disk into backup cache.
6797 * This will be used to initialize the on-board processor's
6798 * data SRAM for a clean start when the runtime program first loads. */
6799 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6800 priv->ucode_data.len);
6801
6802 /* We return success when we resume from suspend and rf_kill is on. */
6803 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6804 return 0;
6805
6806 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6807
6808 iwl4965_clear_stations_table(priv);
6809
6810 /* load bootstrap state machine,
6811 * load bootstrap program into processor's memory,
6812 * prepare to load the "initialize" uCode */
6813 rc = iwl4965_load_bsm(priv);
6814
6815 if (rc) {
6816 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6817 continue;
6818 }
6819
6820 /* start card; "initialize" will load runtime ucode */
6821 iwl4965_nic_start(priv);
6822
6823 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6824
6825 return 0;
6826 }
6827
6828 set_bit(STATUS_EXIT_PENDING, &priv->status);
6829 __iwl4965_down(priv);
6830
6831 /* tried to restart and config the device for as long as our
6832 * patience could withstand */
6833 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6834 return -EIO;
6835 }
6836
6837
6838 /*****************************************************************************
6839 *
6840 * Workqueue callbacks
6841 *
6842 *****************************************************************************/
6843
6844 static void iwl4965_bg_init_alive_start(struct work_struct *data)
6845 {
6846 struct iwl4965_priv *priv =
6847 container_of(data, struct iwl4965_priv, init_alive_start.work);
6848
6849 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6850 return;
6851
6852 mutex_lock(&priv->mutex);
6853 iwl4965_init_alive_start(priv);
6854 mutex_unlock(&priv->mutex);
6855 }
6856
6857 static void iwl4965_bg_alive_start(struct work_struct *data)
6858 {
6859 struct iwl4965_priv *priv =
6860 container_of(data, struct iwl4965_priv, alive_start.work);
6861
6862 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6863 return;
6864
6865 mutex_lock(&priv->mutex);
6866 iwl4965_alive_start(priv);
6867 mutex_unlock(&priv->mutex);
6868 }
6869
6870 static void iwl4965_bg_rf_kill(struct work_struct *work)
6871 {
6872 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
6873
6874 wake_up_interruptible(&priv->wait_command_queue);
6875
6876 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6877 return;
6878
6879 mutex_lock(&priv->mutex);
6880
6881 if (!iwl4965_is_rfkill(priv)) {
6882 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6883 "HW and/or SW RF Kill no longer active, restarting "
6884 "device\n");
6885 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6886 queue_work(priv->workqueue, &priv->restart);
6887 } else {
6888
6889 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6890 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6891 "disabled by SW switch\n");
6892 else
6893 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6894 "Kill switch must be turned off for "
6895 "wireless networking to work.\n");
6896 }
6897 mutex_unlock(&priv->mutex);
6898 }
6899
6900 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6901
6902 static void iwl4965_bg_scan_check(struct work_struct *data)
6903 {
6904 struct iwl4965_priv *priv =
6905 container_of(data, struct iwl4965_priv, scan_check.work);
6906
6907 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6908 return;
6909
6910 mutex_lock(&priv->mutex);
6911 if (test_bit(STATUS_SCANNING, &priv->status) ||
6912 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6913 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6914 "Scan completion watchdog resetting adapter (%dms)\n",
6915 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6916
6917 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6918 iwl4965_send_scan_abort(priv);
6919 }
6920 mutex_unlock(&priv->mutex);
6921 }
6922
6923 static void iwl4965_bg_request_scan(struct work_struct *data)
6924 {
6925 struct iwl4965_priv *priv =
6926 container_of(data, struct iwl4965_priv, request_scan);
6927 struct iwl4965_host_cmd cmd = {
6928 .id = REPLY_SCAN_CMD,
6929 .len = sizeof(struct iwl4965_scan_cmd),
6930 .meta.flags = CMD_SIZE_HUGE,
6931 };
6932 int rc = 0;
6933 struct iwl4965_scan_cmd *scan;
6934 struct ieee80211_conf *conf = NULL;
6935 u8 direct_mask;
6936 int phymode;
6937
6938 conf = ieee80211_get_hw_conf(priv->hw);
6939
6940 mutex_lock(&priv->mutex);
6941
6942 if (!iwl4965_is_ready(priv)) {
6943 IWL_WARNING("request scan called when driver not ready.\n");
6944 goto done;
6945 }
6946
6947 /* Make sure the scan wasn't cancelled before this queued work
6948 * was given the chance to run... */
6949 if (!test_bit(STATUS_SCANNING, &priv->status))
6950 goto done;
6951
6952 /* This should never be called or scheduled if there is currently
6953 * a scan active in the hardware. */
6954 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6955 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6956 "Ignoring second request.\n");
6957 rc = -EIO;
6958 goto done;
6959 }
6960
6961 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6962 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6963 goto done;
6964 }
6965
6966 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6967 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6968 goto done;
6969 }
6970
6971 if (iwl4965_is_rfkill(priv)) {
6972 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6973 goto done;
6974 }
6975
6976 if (!test_bit(STATUS_READY, &priv->status)) {
6977 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6978 goto done;
6979 }
6980
6981 if (!priv->scan_bands) {
6982 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6983 goto done;
6984 }
6985
6986 if (!priv->scan) {
6987 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
6988 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6989 if (!priv->scan) {
6990 rc = -ENOMEM;
6991 goto done;
6992 }
6993 }
6994 scan = priv->scan;
6995 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
6996
6997 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6998 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6999
7000 if (iwl4965_is_associated(priv)) {
7001 u16 interval = 0;
7002 u32 extra;
7003 u32 suspend_time = 100;
7004 u32 scan_suspend_time = 100;
7005 unsigned long flags;
7006
7007 IWL_DEBUG_INFO("Scanning while associated...\n");
7008
7009 spin_lock_irqsave(&priv->lock, flags);
7010 interval = priv->beacon_int;
7011 spin_unlock_irqrestore(&priv->lock, flags);
7012
7013 scan->suspend_time = 0;
7014 scan->max_out_time = cpu_to_le32(200 * 1024);
7015 if (!interval)
7016 interval = suspend_time;
7017
7018 extra = (suspend_time / interval) << 22;
7019 scan_suspend_time = (extra |
7020 ((suspend_time % interval) * 1024));
7021 scan->suspend_time = cpu_to_le32(scan_suspend_time);
7022 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
7023 scan_suspend_time, interval);
7024 }
7025
7026 /* We should add the ability for user to lock to PASSIVE ONLY */
7027 if (priv->one_direct_scan) {
7028 IWL_DEBUG_SCAN
7029 ("Kicking off one direct scan for '%s'\n",
7030 iwl4965_escape_essid(priv->direct_ssid,
7031 priv->direct_ssid_len));
7032 scan->direct_scan[0].id = WLAN_EID_SSID;
7033 scan->direct_scan[0].len = priv->direct_ssid_len;
7034 memcpy(scan->direct_scan[0].ssid,
7035 priv->direct_ssid, priv->direct_ssid_len);
7036 direct_mask = 1;
7037 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
7038 scan->direct_scan[0].id = WLAN_EID_SSID;
7039 scan->direct_scan[0].len = priv->essid_len;
7040 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
7041 direct_mask = 1;
7042 } else
7043 direct_mask = 0;
7044
7045 /* We don't build a direct scan probe request; the uCode will do
7046 * that based on the direct_mask added to each channel entry */
7047 scan->tx_cmd.len = cpu_to_le16(
7048 iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
7049 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
7050 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
7051 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
7052 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
7053
7054 /* flags + rate selection */
7055
7056 scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
7057
7058 switch (priv->scan_bands) {
7059 case 2:
7060 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
7061 scan->tx_cmd.rate_n_flags =
7062 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
7063 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
7064
7065 scan->good_CRC_th = 0;
7066 phymode = MODE_IEEE80211G;
7067 break;
7068
7069 case 1:
7070 scan->tx_cmd.rate_n_flags =
7071 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
7072 RATE_MCS_ANT_B_MSK);
7073 scan->good_CRC_th = IWL_GOOD_CRC_TH;
7074 phymode = MODE_IEEE80211A;
7075 break;
7076
7077 default:
7078 IWL_WARNING("Invalid scan band count\n");
7079 goto done;
7080 }
7081
7082 /* select Rx chains */
7083
7084 /* Force use of chains B and C (0x6) for scan Rx.
7085 * Avoid A (0x1) because of its off-channel reception on A-band.
7086 * MIMO is not used here, but value is required to make uCode happy. */
7087 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
7088 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
7089 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
7090 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
7091
7092 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
7093 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
7094
7095 if (direct_mask)
7096 IWL_DEBUG_SCAN
7097 ("Initiating direct scan for %s.\n",
7098 iwl4965_escape_essid(priv->essid, priv->essid_len));
7099 else
7100 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
7101
7102 scan->channel_count =
7103 iwl4965_get_channels_for_scan(
7104 priv, phymode, 1, /* active */
7105 direct_mask,
7106 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
7107
7108 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
7109 scan->channel_count * sizeof(struct iwl4965_scan_channel);
7110 cmd.data = scan;
7111 scan->len = cpu_to_le16(cmd.len);
7112
7113 set_bit(STATUS_SCAN_HW, &priv->status);
7114 rc = iwl4965_send_cmd_sync(priv, &cmd);
7115 if (rc)
7116 goto done;
7117
7118 queue_delayed_work(priv->workqueue, &priv->scan_check,
7119 IWL_SCAN_CHECK_WATCHDOG);
7120
7121 mutex_unlock(&priv->mutex);
7122 return;
7123
7124 done:
7125 /* inform mac80211 scan aborted */
7126 queue_work(priv->workqueue, &priv->scan_completed);
7127 mutex_unlock(&priv->mutex);
7128 }
7129
7130 static void iwl4965_bg_up(struct work_struct *data)
7131 {
7132 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
7133
7134 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7135 return;
7136
7137 mutex_lock(&priv->mutex);
7138 __iwl4965_up(priv);
7139 mutex_unlock(&priv->mutex);
7140 }
7141
7142 static void iwl4965_bg_restart(struct work_struct *data)
7143 {
7144 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
7145
7146 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7147 return;
7148
7149 iwl4965_down(priv);
7150 queue_work(priv->workqueue, &priv->up);
7151 }
7152
7153 static void iwl4965_bg_rx_replenish(struct work_struct *data)
7154 {
7155 struct iwl4965_priv *priv =
7156 container_of(data, struct iwl4965_priv, rx_replenish);
7157
7158 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7159 return;
7160
7161 mutex_lock(&priv->mutex);
7162 iwl4965_rx_replenish(priv);
7163 mutex_unlock(&priv->mutex);
7164 }
7165
7166 #define IWL_DELAY_NEXT_SCAN (HZ*2)
7167
7168 static void iwl4965_bg_post_associate(struct work_struct *data)
7169 {
7170 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
7171 post_associate.work);
7172
7173 int rc = 0;
7174 struct ieee80211_conf *conf = NULL;
7175 DECLARE_MAC_BUF(mac);
7176
7177 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7178 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
7179 return;
7180 }
7181
7182 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
7183 priv->assoc_id,
7184 print_mac(mac, priv->active_rxon.bssid_addr));
7185
7186
7187 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7188 return;
7189
7190 mutex_lock(&priv->mutex);
7191
7192 if (!priv->vif || !priv->is_open) {
7193 mutex_unlock(&priv->mutex);
7194 return;
7195 }
7196 iwl4965_scan_cancel_timeout(priv, 200);
7197
7198 conf = ieee80211_get_hw_conf(priv->hw);
7199
7200 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7201 iwl4965_commit_rxon(priv);
7202
7203 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7204 iwl4965_setup_rxon_timing(priv);
7205 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7206 sizeof(priv->rxon_timing), &priv->rxon_timing);
7207 if (rc)
7208 IWL_WARNING("REPLY_RXON_TIMING failed - "
7209 "Attempting to continue.\n");
7210
7211 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7212
7213 #ifdef CONFIG_IWL4965_HT
7214 if (priv->current_ht_config.is_ht)
7215 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
7216 #endif /* CONFIG_IWL4965_HT*/
7217 iwl4965_set_rxon_chain(priv);
7218 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7219
7220 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
7221 priv->assoc_id, priv->beacon_int);
7222
7223 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7224 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7225 else
7226 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7227
7228 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7229 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
7230 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
7231 else
7232 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7233
7234 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7235 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7236
7237 }
7238
7239 iwl4965_commit_rxon(priv);
7240
7241 switch (priv->iw_mode) {
7242 case IEEE80211_IF_TYPE_STA:
7243 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
7244 break;
7245
7246 case IEEE80211_IF_TYPE_IBSS:
7247
7248 /* clear out the station table */
7249 iwl4965_clear_stations_table(priv);
7250
7251 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7252 iwl4965_rxon_add_station(priv, priv->bssid, 0);
7253 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
7254 iwl4965_send_beacon_cmd(priv);
7255
7256 break;
7257
7258 default:
7259 IWL_ERROR("%s Should not be called in %d mode\n",
7260 __FUNCTION__, priv->iw_mode);
7261 break;
7262 }
7263
7264 iwl4965_sequence_reset(priv);
7265
7266 #ifdef CONFIG_IWL4965_SENSITIVITY
7267 /* Enable Rx differential gain and sensitivity calibrations */
7268 iwl4965_chain_noise_reset(priv);
7269 priv->start_calib = 1;
7270 #endif /* CONFIG_IWL4965_SENSITIVITY */
7271
7272 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7273 priv->assoc_station_added = 1;
7274
7275 #ifdef CONFIG_IWL4965_QOS
7276 iwl4965_activate_qos(priv, 0);
7277 #endif /* CONFIG_IWL4965_QOS */
7278 /* we have just associated, don't start scan too early */
7279 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
7280 mutex_unlock(&priv->mutex);
7281 }
7282
7283 static void iwl4965_bg_abort_scan(struct work_struct *work)
7284 {
7285 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
7286
7287 if (!iwl4965_is_ready(priv))
7288 return;
7289
7290 mutex_lock(&priv->mutex);
7291
7292 set_bit(STATUS_SCAN_ABORTING, &priv->status);
7293 iwl4965_send_scan_abort(priv);
7294
7295 mutex_unlock(&priv->mutex);
7296 }
7297
7298 static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
7299
7300 static void iwl4965_bg_scan_completed(struct work_struct *work)
7301 {
7302 struct iwl4965_priv *priv =
7303 container_of(work, struct iwl4965_priv, scan_completed);
7304
7305 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
7306
7307 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7308 return;
7309
7310 if (test_bit(STATUS_CONF_PENDING, &priv->status))
7311 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
7312
7313 ieee80211_scan_completed(priv->hw);
7314
7315 /* Since setting the TXPOWER may have been deferred while
7316 * performing the scan, fire one off */
7317 mutex_lock(&priv->mutex);
7318 iwl4965_hw_reg_send_txpower(priv);
7319 mutex_unlock(&priv->mutex);
7320 }
7321
7322 /*****************************************************************************
7323 *
7324 * mac80211 entry point functions
7325 *
7326 *****************************************************************************/
7327
7328 #define UCODE_READY_TIMEOUT (2 * HZ)
7329
7330 static int iwl4965_mac_start(struct ieee80211_hw *hw)
7331 {
7332 struct iwl4965_priv *priv = hw->priv;
7333 int ret;
7334
7335 IWL_DEBUG_MAC80211("enter\n");
7336
7337 if (pci_enable_device(priv->pci_dev)) {
7338 IWL_ERROR("Fail to pci_enable_device\n");
7339 return -ENODEV;
7340 }
7341 pci_restore_state(priv->pci_dev);
7342 pci_enable_msi(priv->pci_dev);
7343
7344 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
7345 DRV_NAME, priv);
7346 if (ret) {
7347 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
7348 goto out_disable_msi;
7349 }
7350
7351 /* we should be verifying the device is ready to be opened */
7352 mutex_lock(&priv->mutex);
7353
7354 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
7355 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
7356 * ucode filename and max sizes are card-specific. */
7357
7358 if (!priv->ucode_code.len) {
7359 ret = iwl4965_read_ucode(priv);
7360 if (ret) {
7361 IWL_ERROR("Could not read microcode: %d\n", ret);
7362 mutex_unlock(&priv->mutex);
7363 goto out_release_irq;
7364 }
7365 }
7366
7367 ret = __iwl4965_up(priv);
7368
7369 mutex_unlock(&priv->mutex);
7370
7371 if (ret)
7372 goto out_release_irq;
7373
7374 IWL_DEBUG_INFO("Start UP work done.\n");
7375
7376 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
7377 return 0;
7378
7379 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
7380 * mac80211 will not be run successfully. */
7381 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
7382 test_bit(STATUS_READY, &priv->status),
7383 UCODE_READY_TIMEOUT);
7384 if (!ret) {
7385 if (!test_bit(STATUS_READY, &priv->status)) {
7386 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
7387 jiffies_to_msecs(UCODE_READY_TIMEOUT));
7388 ret = -ETIMEDOUT;
7389 goto out_release_irq;
7390 }
7391 }
7392
7393 priv->is_open = 1;
7394 IWL_DEBUG_MAC80211("leave\n");
7395 return 0;
7396
7397 out_release_irq:
7398 free_irq(priv->pci_dev->irq, priv);
7399 out_disable_msi:
7400 pci_disable_msi(priv->pci_dev);
7401 pci_disable_device(priv->pci_dev);
7402 priv->is_open = 0;
7403 IWL_DEBUG_MAC80211("leave - failed\n");
7404 return ret;
7405 }
7406
7407 static void iwl4965_mac_stop(struct ieee80211_hw *hw)
7408 {
7409 struct iwl4965_priv *priv = hw->priv;
7410
7411 IWL_DEBUG_MAC80211("enter\n");
7412
7413 if (!priv->is_open) {
7414 IWL_DEBUG_MAC80211("leave - skip\n");
7415 return;
7416 }
7417
7418 priv->is_open = 0;
7419
7420 if (iwl4965_is_ready_rf(priv)) {
7421 /* stop mac, cancel any scan request and clear
7422 * RXON_FILTER_ASSOC_MSK BIT
7423 */
7424 mutex_lock(&priv->mutex);
7425 iwl4965_scan_cancel_timeout(priv, 100);
7426 cancel_delayed_work(&priv->post_associate);
7427 mutex_unlock(&priv->mutex);
7428 }
7429
7430 iwl4965_down(priv);
7431
7432 flush_workqueue(priv->workqueue);
7433 free_irq(priv->pci_dev->irq, priv);
7434 pci_disable_msi(priv->pci_dev);
7435 pci_save_state(priv->pci_dev);
7436 pci_disable_device(priv->pci_dev);
7437
7438 IWL_DEBUG_MAC80211("leave\n");
7439 }
7440
7441 static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
7442 struct ieee80211_tx_control *ctl)
7443 {
7444 struct iwl4965_priv *priv = hw->priv;
7445
7446 IWL_DEBUG_MAC80211("enter\n");
7447
7448 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7449 IWL_DEBUG_MAC80211("leave - monitor\n");
7450 return -1;
7451 }
7452
7453 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7454 ctl->tx_rate);
7455
7456 if (iwl4965_tx_skb(priv, skb, ctl))
7457 dev_kfree_skb_any(skb);
7458
7459 IWL_DEBUG_MAC80211("leave\n");
7460 return 0;
7461 }
7462
7463 static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
7464 struct ieee80211_if_init_conf *conf)
7465 {
7466 struct iwl4965_priv *priv = hw->priv;
7467 unsigned long flags;
7468 DECLARE_MAC_BUF(mac);
7469
7470 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
7471
7472 if (priv->vif) {
7473 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
7474 return -EOPNOTSUPP;
7475 }
7476
7477 spin_lock_irqsave(&priv->lock, flags);
7478 priv->vif = conf->vif;
7479
7480 spin_unlock_irqrestore(&priv->lock, flags);
7481
7482 mutex_lock(&priv->mutex);
7483
7484 if (conf->mac_addr) {
7485 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7486 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7487 }
7488
7489 if (iwl4965_is_ready(priv))
7490 iwl4965_set_mode(priv, conf->type);
7491
7492 mutex_unlock(&priv->mutex);
7493
7494 IWL_DEBUG_MAC80211("leave\n");
7495 return 0;
7496 }
7497
7498 /**
7499 * iwl4965_mac_config - mac80211 config callback
7500 *
7501 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7502 * be set inappropriately and the driver currently sets the hardware up to
7503 * use it whenever needed.
7504 */
7505 static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
7506 {
7507 struct iwl4965_priv *priv = hw->priv;
7508 const struct iwl4965_channel_info *ch_info;
7509 unsigned long flags;
7510 int ret = 0;
7511
7512 mutex_lock(&priv->mutex);
7513 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7514
7515 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7516
7517 if (!iwl4965_is_ready(priv)) {
7518 IWL_DEBUG_MAC80211("leave - not ready\n");
7519 ret = -EIO;
7520 goto out;
7521 }
7522
7523 if (unlikely(!iwl4965_param_disable_hw_scan &&
7524 test_bit(STATUS_SCANNING, &priv->status))) {
7525 IWL_DEBUG_MAC80211("leave - scanning\n");
7526 set_bit(STATUS_CONF_PENDING, &priv->status);
7527 mutex_unlock(&priv->mutex);
7528 return 0;
7529 }
7530
7531 spin_lock_irqsave(&priv->lock, flags);
7532
7533 ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
7534 if (!is_channel_valid(ch_info)) {
7535 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7536 conf->channel, conf->phymode);
7537 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7538 spin_unlock_irqrestore(&priv->lock, flags);
7539 ret = -EINVAL;
7540 goto out;
7541 }
7542
7543 #ifdef CONFIG_IWL4965_HT
7544 /* if we are switching fron ht to 2.4 clear flags
7545 * from any ht related info since 2.4 does not
7546 * support ht */
7547 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
7548 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7549 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7550 #endif
7551 )
7552 priv->staging_rxon.flags = 0;
7553 #endif /* CONFIG_IWL4965_HT */
7554
7555 iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
7556
7557 iwl4965_set_flags_for_phymode(priv, conf->phymode);
7558
7559 /* The list of supported rates and rate mask can be different
7560 * for each phymode; since the phymode may have changed, reset
7561 * the rate mask to what mac80211 lists */
7562 iwl4965_set_rate(priv);
7563
7564 spin_unlock_irqrestore(&priv->lock, flags);
7565
7566 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7567 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7568 iwl4965_hw_channel_switch(priv, conf->channel);
7569 goto out;
7570 }
7571 #endif
7572
7573 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
7574
7575 if (!conf->radio_enabled) {
7576 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7577 goto out;
7578 }
7579
7580 if (iwl4965_is_rfkill(priv)) {
7581 IWL_DEBUG_MAC80211("leave - RF kill\n");
7582 ret = -EIO;
7583 goto out;
7584 }
7585
7586 iwl4965_set_rate(priv);
7587
7588 if (memcmp(&priv->active_rxon,
7589 &priv->staging_rxon, sizeof(priv->staging_rxon)))
7590 iwl4965_commit_rxon(priv);
7591 else
7592 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7593
7594 IWL_DEBUG_MAC80211("leave\n");
7595
7596 out:
7597 clear_bit(STATUS_CONF_PENDING, &priv->status);
7598 mutex_unlock(&priv->mutex);
7599 return ret;
7600 }
7601
7602 static void iwl4965_config_ap(struct iwl4965_priv *priv)
7603 {
7604 int rc = 0;
7605
7606 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7607 return;
7608
7609 /* The following should be done only at AP bring up */
7610 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7611
7612 /* RXON - unassoc (to set timing command) */
7613 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7614 iwl4965_commit_rxon(priv);
7615
7616 /* RXON Timing */
7617 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7618 iwl4965_setup_rxon_timing(priv);
7619 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7620 sizeof(priv->rxon_timing), &priv->rxon_timing);
7621 if (rc)
7622 IWL_WARNING("REPLY_RXON_TIMING failed - "
7623 "Attempting to continue.\n");
7624
7625 iwl4965_set_rxon_chain(priv);
7626
7627 /* FIXME: what should be the assoc_id for AP? */
7628 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7629 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7630 priv->staging_rxon.flags |=
7631 RXON_FLG_SHORT_PREAMBLE_MSK;
7632 else
7633 priv->staging_rxon.flags &=
7634 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7635
7636 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7637 if (priv->assoc_capability &
7638 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7639 priv->staging_rxon.flags |=
7640 RXON_FLG_SHORT_SLOT_MSK;
7641 else
7642 priv->staging_rxon.flags &=
7643 ~RXON_FLG_SHORT_SLOT_MSK;
7644
7645 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7646 priv->staging_rxon.flags &=
7647 ~RXON_FLG_SHORT_SLOT_MSK;
7648 }
7649 /* restore RXON assoc */
7650 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7651 iwl4965_commit_rxon(priv);
7652 #ifdef CONFIG_IWL4965_QOS
7653 iwl4965_activate_qos(priv, 1);
7654 #endif
7655 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7656 }
7657 iwl4965_send_beacon_cmd(priv);
7658
7659 /* FIXME - we need to add code here to detect a totally new
7660 * configuration, reset the AP, unassoc, rxon timing, assoc,
7661 * clear sta table, add BCAST sta... */
7662 }
7663
7664 static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
7665 struct ieee80211_vif *vif,
7666 struct ieee80211_if_conf *conf)
7667 {
7668 struct iwl4965_priv *priv = hw->priv;
7669 DECLARE_MAC_BUF(mac);
7670 unsigned long flags;
7671 int rc;
7672
7673 if (conf == NULL)
7674 return -EIO;
7675
7676 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7677 (!conf->beacon || !conf->ssid_len)) {
7678 IWL_DEBUG_MAC80211
7679 ("Leaving in AP mode because HostAPD is not ready.\n");
7680 return 0;
7681 }
7682
7683 if (!iwl4965_is_alive(priv))
7684 return -EAGAIN;
7685
7686 mutex_lock(&priv->mutex);
7687
7688 if (conf->bssid)
7689 IWL_DEBUG_MAC80211("bssid: %s\n",
7690 print_mac(mac, conf->bssid));
7691
7692 /*
7693 * very dubious code was here; the probe filtering flag is never set:
7694 *
7695 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7696 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7697 */
7698 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
7699 IWL_DEBUG_MAC80211("leave - scanning\n");
7700 mutex_unlock(&priv->mutex);
7701 return 0;
7702 }
7703
7704 if (priv->vif != vif) {
7705 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
7706 mutex_unlock(&priv->mutex);
7707 return 0;
7708 }
7709
7710 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7711 if (!conf->bssid) {
7712 conf->bssid = priv->mac_addr;
7713 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7714 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7715 print_mac(mac, conf->bssid));
7716 }
7717 if (priv->ibss_beacon)
7718 dev_kfree_skb(priv->ibss_beacon);
7719
7720 priv->ibss_beacon = conf->beacon;
7721 }
7722
7723 if (iwl4965_is_rfkill(priv))
7724 goto done;
7725
7726 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7727 !is_multicast_ether_addr(conf->bssid)) {
7728 /* If there is currently a HW scan going on in the background
7729 * then we need to cancel it else the RXON below will fail. */
7730 if (iwl4965_scan_cancel_timeout(priv, 100)) {
7731 IWL_WARNING("Aborted scan still in progress "
7732 "after 100ms\n");
7733 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7734 mutex_unlock(&priv->mutex);
7735 return -EAGAIN;
7736 }
7737 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7738
7739 /* TODO: Audit driver for usage of these members and see
7740 * if mac80211 deprecates them (priv->bssid looks like it
7741 * shouldn't be there, but I haven't scanned the IBSS code
7742 * to verify) - jpk */
7743 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7744
7745 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7746 iwl4965_config_ap(priv);
7747 else {
7748 rc = iwl4965_commit_rxon(priv);
7749 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7750 iwl4965_rxon_add_station(
7751 priv, priv->active_rxon.bssid_addr, 1);
7752 }
7753
7754 } else {
7755 iwl4965_scan_cancel_timeout(priv, 100);
7756 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7757 iwl4965_commit_rxon(priv);
7758 }
7759
7760 done:
7761 spin_lock_irqsave(&priv->lock, flags);
7762 if (!conf->ssid_len)
7763 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7764 else
7765 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7766
7767 priv->essid_len = conf->ssid_len;
7768 spin_unlock_irqrestore(&priv->lock, flags);
7769
7770 IWL_DEBUG_MAC80211("leave\n");
7771 mutex_unlock(&priv->mutex);
7772
7773 return 0;
7774 }
7775
7776 static void iwl4965_configure_filter(struct ieee80211_hw *hw,
7777 unsigned int changed_flags,
7778 unsigned int *total_flags,
7779 int mc_count, struct dev_addr_list *mc_list)
7780 {
7781 /*
7782 * XXX: dummy
7783 * see also iwl4965_connection_init_rx_config
7784 */
7785 *total_flags = 0;
7786 }
7787
7788 static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
7789 struct ieee80211_if_init_conf *conf)
7790 {
7791 struct iwl4965_priv *priv = hw->priv;
7792
7793 IWL_DEBUG_MAC80211("enter\n");
7794
7795 mutex_lock(&priv->mutex);
7796
7797 if (iwl4965_is_ready_rf(priv)) {
7798 iwl4965_scan_cancel_timeout(priv, 100);
7799 cancel_delayed_work(&priv->post_associate);
7800 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7801 iwl4965_commit_rxon(priv);
7802 }
7803 if (priv->vif == conf->vif) {
7804 priv->vif = NULL;
7805 memset(priv->bssid, 0, ETH_ALEN);
7806 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7807 priv->essid_len = 0;
7808 }
7809 mutex_unlock(&priv->mutex);
7810
7811 IWL_DEBUG_MAC80211("leave\n");
7812
7813 }
7814
7815 static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
7816 struct ieee80211_vif *vif,
7817 struct ieee80211_bss_conf *bss_conf,
7818 u32 changes)
7819 {
7820 struct iwl4965_priv *priv = hw->priv;
7821
7822 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
7823 if (bss_conf->use_short_preamble)
7824 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7825 else
7826 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7827 }
7828
7829 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
7830 if (bss_conf->use_cts_prot && (priv->phymode != MODE_IEEE80211A))
7831 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7832 else
7833 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7834 }
7835
7836 if (changes & BSS_CHANGED_ASSOC) {
7837 /*
7838 * TODO:
7839 * do stuff instead of sniffing assoc resp
7840 */
7841 }
7842
7843 if (iwl4965_is_associated(priv))
7844 iwl4965_send_rxon_assoc(priv);
7845 }
7846
7847 static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7848 {
7849 int rc = 0;
7850 unsigned long flags;
7851 struct iwl4965_priv *priv = hw->priv;
7852
7853 IWL_DEBUG_MAC80211("enter\n");
7854
7855 mutex_lock(&priv->mutex);
7856 spin_lock_irqsave(&priv->lock, flags);
7857
7858 if (!iwl4965_is_ready_rf(priv)) {
7859 rc = -EIO;
7860 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7861 goto out_unlock;
7862 }
7863
7864 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7865 rc = -EIO;
7866 IWL_ERROR("ERROR: APs don't scan\n");
7867 goto out_unlock;
7868 }
7869
7870 /* we don't schedule scan within next_scan_jiffies period */
7871 if (priv->next_scan_jiffies &&
7872 time_after(priv->next_scan_jiffies, jiffies)) {
7873 rc = -EAGAIN;
7874 goto out_unlock;
7875 }
7876 /* if we just finished scan ask for delay */
7877 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7878 IWL_DELAY_NEXT_SCAN, jiffies)) {
7879 rc = -EAGAIN;
7880 goto out_unlock;
7881 }
7882 if (len) {
7883 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7884 iwl4965_escape_essid(ssid, len), (int)len);
7885
7886 priv->one_direct_scan = 1;
7887 priv->direct_ssid_len = (u8)
7888 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7889 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7890 } else
7891 priv->one_direct_scan = 0;
7892
7893 rc = iwl4965_scan_initiate(priv);
7894
7895 IWL_DEBUG_MAC80211("leave\n");
7896
7897 out_unlock:
7898 spin_unlock_irqrestore(&priv->lock, flags);
7899 mutex_unlock(&priv->mutex);
7900
7901 return rc;
7902 }
7903
7904 static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7905 const u8 *local_addr, const u8 *addr,
7906 struct ieee80211_key_conf *key)
7907 {
7908 struct iwl4965_priv *priv = hw->priv;
7909 DECLARE_MAC_BUF(mac);
7910 int rc = 0;
7911 u8 sta_id;
7912
7913 IWL_DEBUG_MAC80211("enter\n");
7914
7915 if (!iwl4965_param_hwcrypto) {
7916 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7917 return -EOPNOTSUPP;
7918 }
7919
7920 if (is_zero_ether_addr(addr))
7921 /* only support pairwise keys */
7922 return -EOPNOTSUPP;
7923
7924 sta_id = iwl4965_hw_find_station(priv, addr);
7925 if (sta_id == IWL_INVALID_STATION) {
7926 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7927 print_mac(mac, addr));
7928 return -EINVAL;
7929 }
7930
7931 mutex_lock(&priv->mutex);
7932
7933 iwl4965_scan_cancel_timeout(priv, 100);
7934
7935 switch (cmd) {
7936 case SET_KEY:
7937 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
7938 if (!rc) {
7939 iwl4965_set_rxon_hwcrypto(priv, 1);
7940 iwl4965_commit_rxon(priv);
7941 key->hw_key_idx = sta_id;
7942 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7943 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7944 }
7945 break;
7946 case DISABLE_KEY:
7947 rc = iwl4965_clear_sta_key_info(priv, sta_id);
7948 if (!rc) {
7949 iwl4965_set_rxon_hwcrypto(priv, 0);
7950 iwl4965_commit_rxon(priv);
7951 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7952 }
7953 break;
7954 default:
7955 rc = -EINVAL;
7956 }
7957
7958 IWL_DEBUG_MAC80211("leave\n");
7959 mutex_unlock(&priv->mutex);
7960
7961 return rc;
7962 }
7963
7964 static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7965 const struct ieee80211_tx_queue_params *params)
7966 {
7967 struct iwl4965_priv *priv = hw->priv;
7968 #ifdef CONFIG_IWL4965_QOS
7969 unsigned long flags;
7970 int q;
7971 #endif /* CONFIG_IWL4965_QOS */
7972
7973 IWL_DEBUG_MAC80211("enter\n");
7974
7975 if (!iwl4965_is_ready_rf(priv)) {
7976 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7977 return -EIO;
7978 }
7979
7980 if (queue >= AC_NUM) {
7981 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7982 return 0;
7983 }
7984
7985 #ifdef CONFIG_IWL4965_QOS
7986 if (!priv->qos_data.qos_enable) {
7987 priv->qos_data.qos_active = 0;
7988 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7989 return 0;
7990 }
7991 q = AC_NUM - 1 - queue;
7992
7993 spin_lock_irqsave(&priv->lock, flags);
7994
7995 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7996 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7997 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7998 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7999 cpu_to_le16((params->burst_time * 100));
8000
8001 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
8002 priv->qos_data.qos_active = 1;
8003
8004 spin_unlock_irqrestore(&priv->lock, flags);
8005
8006 mutex_lock(&priv->mutex);
8007 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
8008 iwl4965_activate_qos(priv, 1);
8009 else if (priv->assoc_id && iwl4965_is_associated(priv))
8010 iwl4965_activate_qos(priv, 0);
8011
8012 mutex_unlock(&priv->mutex);
8013
8014 #endif /*CONFIG_IWL4965_QOS */
8015
8016 IWL_DEBUG_MAC80211("leave\n");
8017 return 0;
8018 }
8019
8020 static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
8021 struct ieee80211_tx_queue_stats *stats)
8022 {
8023 struct iwl4965_priv *priv = hw->priv;
8024 int i, avail;
8025 struct iwl4965_tx_queue *txq;
8026 struct iwl4965_queue *q;
8027 unsigned long flags;
8028
8029 IWL_DEBUG_MAC80211("enter\n");
8030
8031 if (!iwl4965_is_ready_rf(priv)) {
8032 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8033 return -EIO;
8034 }
8035
8036 spin_lock_irqsave(&priv->lock, flags);
8037
8038 for (i = 0; i < AC_NUM; i++) {
8039 txq = &priv->txq[i];
8040 q = &txq->q;
8041 avail = iwl4965_queue_space(q);
8042
8043 stats->data[i].len = q->n_window - avail;
8044 stats->data[i].limit = q->n_window - q->high_mark;
8045 stats->data[i].count = q->n_window;
8046
8047 }
8048 spin_unlock_irqrestore(&priv->lock, flags);
8049
8050 IWL_DEBUG_MAC80211("leave\n");
8051
8052 return 0;
8053 }
8054
8055 static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
8056 struct ieee80211_low_level_stats *stats)
8057 {
8058 IWL_DEBUG_MAC80211("enter\n");
8059 IWL_DEBUG_MAC80211("leave\n");
8060
8061 return 0;
8062 }
8063
8064 static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
8065 {
8066 IWL_DEBUG_MAC80211("enter\n");
8067 IWL_DEBUG_MAC80211("leave\n");
8068
8069 return 0;
8070 }
8071
8072 static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
8073 {
8074 struct iwl4965_priv *priv = hw->priv;
8075 unsigned long flags;
8076
8077 mutex_lock(&priv->mutex);
8078 IWL_DEBUG_MAC80211("enter\n");
8079
8080 priv->lq_mngr.lq_ready = 0;
8081 #ifdef CONFIG_IWL4965_HT
8082 spin_lock_irqsave(&priv->lock, flags);
8083 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
8084 spin_unlock_irqrestore(&priv->lock, flags);
8085 #ifdef CONFIG_IWL4965_HT_AGG
8086 /* if (priv->lq_mngr.agg_ctrl.granted_ba)
8087 iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
8088
8089 memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
8090 priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
8091 priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
8092 priv->lq_mngr.agg_ctrl.auto_agg = 1;
8093
8094 if (priv->lq_mngr.agg_ctrl.auto_agg)
8095 priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
8096 #endif /*CONFIG_IWL4965_HT_AGG */
8097 #endif /* CONFIG_IWL4965_HT */
8098
8099 #ifdef CONFIG_IWL4965_QOS
8100 iwl4965_reset_qos(priv);
8101 #endif
8102
8103 cancel_delayed_work(&priv->post_associate);
8104
8105 spin_lock_irqsave(&priv->lock, flags);
8106 priv->assoc_id = 0;
8107 priv->assoc_capability = 0;
8108 priv->call_post_assoc_from_beacon = 0;
8109 priv->assoc_station_added = 0;
8110
8111 /* new association get rid of ibss beacon skb */
8112 if (priv->ibss_beacon)
8113 dev_kfree_skb(priv->ibss_beacon);
8114
8115 priv->ibss_beacon = NULL;
8116
8117 priv->beacon_int = priv->hw->conf.beacon_int;
8118 priv->timestamp1 = 0;
8119 priv->timestamp0 = 0;
8120 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
8121 priv->beacon_int = 0;
8122
8123 spin_unlock_irqrestore(&priv->lock, flags);
8124
8125 if (!iwl4965_is_ready_rf(priv)) {
8126 IWL_DEBUG_MAC80211("leave - not ready\n");
8127 mutex_unlock(&priv->mutex);
8128 return;
8129 }
8130
8131 /* we are restarting association process
8132 * clear RXON_FILTER_ASSOC_MSK bit
8133 */
8134 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
8135 iwl4965_scan_cancel_timeout(priv, 100);
8136 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
8137 iwl4965_commit_rxon(priv);
8138 }
8139
8140 /* Per mac80211.h: This is only used in IBSS mode... */
8141 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8142
8143 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
8144 mutex_unlock(&priv->mutex);
8145 return;
8146 }
8147
8148 priv->only_active_channel = 0;
8149
8150 iwl4965_set_rate(priv);
8151
8152 mutex_unlock(&priv->mutex);
8153
8154 IWL_DEBUG_MAC80211("leave\n");
8155 }
8156
8157 static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
8158 struct ieee80211_tx_control *control)
8159 {
8160 struct iwl4965_priv *priv = hw->priv;
8161 unsigned long flags;
8162
8163 mutex_lock(&priv->mutex);
8164 IWL_DEBUG_MAC80211("enter\n");
8165
8166 if (!iwl4965_is_ready_rf(priv)) {
8167 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8168 mutex_unlock(&priv->mutex);
8169 return -EIO;
8170 }
8171
8172 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8173 IWL_DEBUG_MAC80211("leave - not IBSS\n");
8174 mutex_unlock(&priv->mutex);
8175 return -EIO;
8176 }
8177
8178 spin_lock_irqsave(&priv->lock, flags);
8179
8180 if (priv->ibss_beacon)
8181 dev_kfree_skb(priv->ibss_beacon);
8182
8183 priv->ibss_beacon = skb;
8184
8185 priv->assoc_id = 0;
8186
8187 IWL_DEBUG_MAC80211("leave\n");
8188 spin_unlock_irqrestore(&priv->lock, flags);
8189
8190 #ifdef CONFIG_IWL4965_QOS
8191 iwl4965_reset_qos(priv);
8192 #endif
8193
8194 queue_work(priv->workqueue, &priv->post_associate.work);
8195
8196 mutex_unlock(&priv->mutex);
8197
8198 return 0;
8199 }
8200
8201 #ifdef CONFIG_IWL4965_HT
8202
8203 static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
8204 struct iwl4965_priv *priv)
8205 {
8206 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
8207 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
8208 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
8209
8210 IWL_DEBUG_MAC80211("enter: \n");
8211
8212 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
8213 iwl_conf->is_ht = 0;
8214 return;
8215 }
8216
8217 iwl_conf->is_ht = 1;
8218 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8219
8220 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
8221 iwl_conf->sgf |= 0x1;
8222 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
8223 iwl_conf->sgf |= 0x2;
8224
8225 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
8226 iwl_conf->max_amsdu_size =
8227 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
8228 iwl_conf->supported_chan_width =
8229 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
8230 iwl_conf->tx_mimo_ps_mode =
8231 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8232 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
8233
8234 iwl_conf->control_channel = ht_bss_conf->primary_channel;
8235 iwl_conf->extension_chan_offset =
8236 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
8237 iwl_conf->tx_chan_width =
8238 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
8239 iwl_conf->ht_protection =
8240 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
8241 iwl_conf->non_GF_STA_present =
8242 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
8243
8244 IWL_DEBUG_MAC80211("control channel %d\n",
8245 iwl_conf->control_channel);
8246 IWL_DEBUG_MAC80211("leave\n");
8247 }
8248
8249 static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
8250 struct ieee80211_conf *conf)
8251 {
8252 struct iwl4965_priv *priv = hw->priv;
8253
8254 IWL_DEBUG_MAC80211("enter: \n");
8255
8256 iwl4965_ht_info_fill(conf, priv);
8257 iwl4965_set_rxon_chain(priv);
8258
8259 if (priv && priv->assoc_id &&
8260 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
8261 unsigned long flags;
8262
8263 spin_lock_irqsave(&priv->lock, flags);
8264 if (priv->beacon_int)
8265 queue_work(priv->workqueue, &priv->post_associate.work);
8266 else
8267 priv->call_post_assoc_from_beacon = 1;
8268 spin_unlock_irqrestore(&priv->lock, flags);
8269 }
8270
8271 IWL_DEBUG_MAC80211("leave:\n");
8272 return 0;
8273 }
8274
8275 static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
8276 struct ieee80211_ht_cap *ht_cap,
8277 u8 use_current_config)
8278 {
8279 struct ieee80211_conf *conf = &hw->conf;
8280 struct ieee80211_hw_mode *mode = conf->mode;
8281
8282 if (use_current_config) {
8283 ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
8284 memcpy(ht_cap->supp_mcs_set,
8285 conf->ht_conf.supp_mcs_set, 16);
8286 } else {
8287 ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
8288 memcpy(ht_cap->supp_mcs_set,
8289 mode->ht_info.supp_mcs_set, 16);
8290 }
8291 ht_cap->ampdu_params_info =
8292 (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
8293 ((mode->ht_info.ampdu_density << 2) &
8294 IEEE80211_HT_CAP_AMPDU_DENSITY);
8295 }
8296
8297 #endif /*CONFIG_IWL4965_HT*/
8298
8299 /*****************************************************************************
8300 *
8301 * sysfs attributes
8302 *
8303 *****************************************************************************/
8304
8305 #ifdef CONFIG_IWL4965_DEBUG
8306
8307 /*
8308 * The following adds a new attribute to the sysfs representation
8309 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
8310 * used for controlling the debug level.
8311 *
8312 * See the level definitions in iwl for details.
8313 */
8314
8315 static ssize_t show_debug_level(struct device_driver *d, char *buf)
8316 {
8317 return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
8318 }
8319 static ssize_t store_debug_level(struct device_driver *d,
8320 const char *buf, size_t count)
8321 {
8322 char *p = (char *)buf;
8323 u32 val;
8324
8325 val = simple_strtoul(p, &p, 0);
8326 if (p == buf)
8327 printk(KERN_INFO DRV_NAME
8328 ": %s is not in hex or decimal form.\n", buf);
8329 else
8330 iwl4965_debug_level = val;
8331
8332 return strnlen(buf, count);
8333 }
8334
8335 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
8336 show_debug_level, store_debug_level);
8337
8338 #endif /* CONFIG_IWL4965_DEBUG */
8339
8340 static ssize_t show_rf_kill(struct device *d,
8341 struct device_attribute *attr, char *buf)
8342 {
8343 /*
8344 * 0 - RF kill not enabled
8345 * 1 - SW based RF kill active (sysfs)
8346 * 2 - HW based RF kill active
8347 * 3 - Both HW and SW based RF kill active
8348 */
8349 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8350 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
8351 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
8352
8353 return sprintf(buf, "%i\n", val);
8354 }
8355
8356 static ssize_t store_rf_kill(struct device *d,
8357 struct device_attribute *attr,
8358 const char *buf, size_t count)
8359 {
8360 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8361
8362 mutex_lock(&priv->mutex);
8363 iwl4965_radio_kill_sw(priv, buf[0] == '1');
8364 mutex_unlock(&priv->mutex);
8365
8366 return count;
8367 }
8368
8369 static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
8370
8371 static ssize_t show_temperature(struct device *d,
8372 struct device_attribute *attr, char *buf)
8373 {
8374 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8375
8376 if (!iwl4965_is_alive(priv))
8377 return -EAGAIN;
8378
8379 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
8380 }
8381
8382 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
8383
8384 static ssize_t show_rs_window(struct device *d,
8385 struct device_attribute *attr,
8386 char *buf)
8387 {
8388 struct iwl4965_priv *priv = d->driver_data;
8389 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
8390 }
8391 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8392
8393 static ssize_t show_tx_power(struct device *d,
8394 struct device_attribute *attr, char *buf)
8395 {
8396 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8397 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8398 }
8399
8400 static ssize_t store_tx_power(struct device *d,
8401 struct device_attribute *attr,
8402 const char *buf, size_t count)
8403 {
8404 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8405 char *p = (char *)buf;
8406 u32 val;
8407
8408 val = simple_strtoul(p, &p, 10);
8409 if (p == buf)
8410 printk(KERN_INFO DRV_NAME
8411 ": %s is not in decimal form.\n", buf);
8412 else
8413 iwl4965_hw_reg_set_txpower(priv, val);
8414
8415 return count;
8416 }
8417
8418 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8419
8420 static ssize_t show_flags(struct device *d,
8421 struct device_attribute *attr, char *buf)
8422 {
8423 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8424
8425 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8426 }
8427
8428 static ssize_t store_flags(struct device *d,
8429 struct device_attribute *attr,
8430 const char *buf, size_t count)
8431 {
8432 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8433 u32 flags = simple_strtoul(buf, NULL, 0);
8434
8435 mutex_lock(&priv->mutex);
8436 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8437 /* Cancel any currently running scans... */
8438 if (iwl4965_scan_cancel_timeout(priv, 100))
8439 IWL_WARNING("Could not cancel scan.\n");
8440 else {
8441 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8442 flags);
8443 priv->staging_rxon.flags = cpu_to_le32(flags);
8444 iwl4965_commit_rxon(priv);
8445 }
8446 }
8447 mutex_unlock(&priv->mutex);
8448
8449 return count;
8450 }
8451
8452 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8453
8454 static ssize_t show_filter_flags(struct device *d,
8455 struct device_attribute *attr, char *buf)
8456 {
8457 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8458
8459 return sprintf(buf, "0x%04X\n",
8460 le32_to_cpu(priv->active_rxon.filter_flags));
8461 }
8462
8463 static ssize_t store_filter_flags(struct device *d,
8464 struct device_attribute *attr,
8465 const char *buf, size_t count)
8466 {
8467 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8468 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8469
8470 mutex_lock(&priv->mutex);
8471 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8472 /* Cancel any currently running scans... */
8473 if (iwl4965_scan_cancel_timeout(priv, 100))
8474 IWL_WARNING("Could not cancel scan.\n");
8475 else {
8476 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8477 "0x%04X\n", filter_flags);
8478 priv->staging_rxon.filter_flags =
8479 cpu_to_le32(filter_flags);
8480 iwl4965_commit_rxon(priv);
8481 }
8482 }
8483 mutex_unlock(&priv->mutex);
8484
8485 return count;
8486 }
8487
8488 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8489 store_filter_flags);
8490
8491 static ssize_t show_tune(struct device *d,
8492 struct device_attribute *attr, char *buf)
8493 {
8494 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8495
8496 return sprintf(buf, "0x%04X\n",
8497 (priv->phymode << 8) |
8498 le16_to_cpu(priv->active_rxon.channel));
8499 }
8500
8501 static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
8502
8503 static ssize_t store_tune(struct device *d,
8504 struct device_attribute *attr,
8505 const char *buf, size_t count)
8506 {
8507 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8508 char *p = (char *)buf;
8509 u16 tune = simple_strtoul(p, &p, 0);
8510 u8 phymode = (tune >> 8) & 0xff;
8511 u16 channel = tune & 0xff;
8512
8513 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
8514
8515 mutex_lock(&priv->mutex);
8516 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
8517 (priv->phymode != phymode)) {
8518 const struct iwl4965_channel_info *ch_info;
8519
8520 ch_info = iwl4965_get_channel_info(priv, phymode, channel);
8521 if (!ch_info) {
8522 IWL_WARNING("Requested invalid phymode/channel "
8523 "combination: %d %d\n", phymode, channel);
8524 mutex_unlock(&priv->mutex);
8525 return -EINVAL;
8526 }
8527
8528 /* Cancel any currently running scans... */
8529 if (iwl4965_scan_cancel_timeout(priv, 100))
8530 IWL_WARNING("Could not cancel scan.\n");
8531 else {
8532 IWL_DEBUG_INFO("Committing phymode and "
8533 "rxon.channel = %d %d\n",
8534 phymode, channel);
8535
8536 iwl4965_set_rxon_channel(priv, phymode, channel);
8537 iwl4965_set_flags_for_phymode(priv, phymode);
8538
8539 iwl4965_set_rate(priv);
8540 iwl4965_commit_rxon(priv);
8541 }
8542 }
8543 mutex_unlock(&priv->mutex);
8544
8545 return count;
8546 }
8547
8548 static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
8549
8550 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
8551
8552 static ssize_t show_measurement(struct device *d,
8553 struct device_attribute *attr, char *buf)
8554 {
8555 struct iwl4965_priv *priv = dev_get_drvdata(d);
8556 struct iwl4965_spectrum_notification measure_report;
8557 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8558 u8 *data = (u8 *) & measure_report;
8559 unsigned long flags;
8560
8561 spin_lock_irqsave(&priv->lock, flags);
8562 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8563 spin_unlock_irqrestore(&priv->lock, flags);
8564 return 0;
8565 }
8566 memcpy(&measure_report, &priv->measure_report, size);
8567 priv->measurement_status = 0;
8568 spin_unlock_irqrestore(&priv->lock, flags);
8569
8570 while (size && (PAGE_SIZE - len)) {
8571 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8572 PAGE_SIZE - len, 1);
8573 len = strlen(buf);
8574 if (PAGE_SIZE - len)
8575 buf[len++] = '\n';
8576
8577 ofs += 16;
8578 size -= min(size, 16U);
8579 }
8580
8581 return len;
8582 }
8583
8584 static ssize_t store_measurement(struct device *d,
8585 struct device_attribute *attr,
8586 const char *buf, size_t count)
8587 {
8588 struct iwl4965_priv *priv = dev_get_drvdata(d);
8589 struct ieee80211_measurement_params params = {
8590 .channel = le16_to_cpu(priv->active_rxon.channel),
8591 .start_time = cpu_to_le64(priv->last_tsf),
8592 .duration = cpu_to_le16(1),
8593 };
8594 u8 type = IWL_MEASURE_BASIC;
8595 u8 buffer[32];
8596 u8 channel;
8597
8598 if (count) {
8599 char *p = buffer;
8600 strncpy(buffer, buf, min(sizeof(buffer), count));
8601 channel = simple_strtoul(p, NULL, 0);
8602 if (channel)
8603 params.channel = channel;
8604
8605 p = buffer;
8606 while (*p && *p != ' ')
8607 p++;
8608 if (*p)
8609 type = simple_strtoul(p + 1, NULL, 0);
8610 }
8611
8612 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8613 "channel %d (for '%s')\n", type, params.channel, buf);
8614 iwl4965_get_measurement(priv, &params, type);
8615
8616 return count;
8617 }
8618
8619 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8620 show_measurement, store_measurement);
8621 #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
8622
8623 static ssize_t store_retry_rate(struct device *d,
8624 struct device_attribute *attr,
8625 const char *buf, size_t count)
8626 {
8627 struct iwl4965_priv *priv = dev_get_drvdata(d);
8628
8629 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8630 if (priv->retry_rate <= 0)
8631 priv->retry_rate = 1;
8632
8633 return count;
8634 }
8635
8636 static ssize_t show_retry_rate(struct device *d,
8637 struct device_attribute *attr, char *buf)
8638 {
8639 struct iwl4965_priv *priv = dev_get_drvdata(d);
8640 return sprintf(buf, "%d", priv->retry_rate);
8641 }
8642
8643 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8644 store_retry_rate);
8645
8646 static ssize_t store_power_level(struct device *d,
8647 struct device_attribute *attr,
8648 const char *buf, size_t count)
8649 {
8650 struct iwl4965_priv *priv = dev_get_drvdata(d);
8651 int rc;
8652 int mode;
8653
8654 mode = simple_strtoul(buf, NULL, 0);
8655 mutex_lock(&priv->mutex);
8656
8657 if (!iwl4965_is_ready(priv)) {
8658 rc = -EAGAIN;
8659 goto out;
8660 }
8661
8662 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8663 mode = IWL_POWER_AC;
8664 else
8665 mode |= IWL_POWER_ENABLED;
8666
8667 if (mode != priv->power_mode) {
8668 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
8669 if (rc) {
8670 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8671 goto out;
8672 }
8673 priv->power_mode = mode;
8674 }
8675
8676 rc = count;
8677
8678 out:
8679 mutex_unlock(&priv->mutex);
8680 return rc;
8681 }
8682
8683 #define MAX_WX_STRING 80
8684
8685 /* Values are in microsecond */
8686 static const s32 timeout_duration[] = {
8687 350000,
8688 250000,
8689 75000,
8690 37000,
8691 25000,
8692 };
8693 static const s32 period_duration[] = {
8694 400000,
8695 700000,
8696 1000000,
8697 1000000,
8698 1000000
8699 };
8700
8701 static ssize_t show_power_level(struct device *d,
8702 struct device_attribute *attr, char *buf)
8703 {
8704 struct iwl4965_priv *priv = dev_get_drvdata(d);
8705 int level = IWL_POWER_LEVEL(priv->power_mode);
8706 char *p = buf;
8707
8708 p += sprintf(p, "%d ", level);
8709 switch (level) {
8710 case IWL_POWER_MODE_CAM:
8711 case IWL_POWER_AC:
8712 p += sprintf(p, "(AC)");
8713 break;
8714 case IWL_POWER_BATTERY:
8715 p += sprintf(p, "(BATTERY)");
8716 break;
8717 default:
8718 p += sprintf(p,
8719 "(Timeout %dms, Period %dms)",
8720 timeout_duration[level - 1] / 1000,
8721 period_duration[level - 1] / 1000);
8722 }
8723
8724 if (!(priv->power_mode & IWL_POWER_ENABLED))
8725 p += sprintf(p, " OFF\n");
8726 else
8727 p += sprintf(p, " \n");
8728
8729 return (p - buf + 1);
8730
8731 }
8732
8733 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8734 store_power_level);
8735
8736 static ssize_t show_channels(struct device *d,
8737 struct device_attribute *attr, char *buf)
8738 {
8739 struct iwl4965_priv *priv = dev_get_drvdata(d);
8740 int len = 0, i;
8741 struct ieee80211_channel *channels = NULL;
8742 const struct ieee80211_hw_mode *hw_mode = NULL;
8743 int count = 0;
8744
8745 if (!iwl4965_is_ready(priv))
8746 return -EAGAIN;
8747
8748 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
8749 if (!hw_mode)
8750 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
8751 if (hw_mode) {
8752 channels = hw_mode->channels;
8753 count = hw_mode->num_channels;
8754 }
8755
8756 len +=
8757 sprintf(&buf[len],
8758 "Displaying %d channels in 2.4GHz band "
8759 "(802.11bg):\n", count);
8760
8761 for (i = 0; i < count; i++)
8762 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8763 channels[i].chan,
8764 channels[i].power_level,
8765 channels[i].
8766 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8767 " (IEEE 802.11h required)" : "",
8768 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8769 || (channels[i].
8770 flag &
8771 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8772 ", IBSS",
8773 channels[i].
8774 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8775 "active/passive" : "passive only");
8776
8777 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
8778 if (hw_mode) {
8779 channels = hw_mode->channels;
8780 count = hw_mode->num_channels;
8781 } else {
8782 channels = NULL;
8783 count = 0;
8784 }
8785
8786 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8787 "(802.11a):\n", count);
8788
8789 for (i = 0; i < count; i++)
8790 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8791 channels[i].chan,
8792 channels[i].power_level,
8793 channels[i].
8794 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8795 " (IEEE 802.11h required)" : "",
8796 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8797 || (channels[i].
8798 flag &
8799 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8800 ", IBSS",
8801 channels[i].
8802 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8803 "active/passive" : "passive only");
8804
8805 return len;
8806 }
8807
8808 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8809
8810 static ssize_t show_statistics(struct device *d,
8811 struct device_attribute *attr, char *buf)
8812 {
8813 struct iwl4965_priv *priv = dev_get_drvdata(d);
8814 u32 size = sizeof(struct iwl4965_notif_statistics);
8815 u32 len = 0, ofs = 0;
8816 u8 *data = (u8 *) & priv->statistics;
8817 int rc = 0;
8818
8819 if (!iwl4965_is_alive(priv))
8820 return -EAGAIN;
8821
8822 mutex_lock(&priv->mutex);
8823 rc = iwl4965_send_statistics_request(priv);
8824 mutex_unlock(&priv->mutex);
8825
8826 if (rc) {
8827 len = sprintf(buf,
8828 "Error sending statistics request: 0x%08X\n", rc);
8829 return len;
8830 }
8831
8832 while (size && (PAGE_SIZE - len)) {
8833 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8834 PAGE_SIZE - len, 1);
8835 len = strlen(buf);
8836 if (PAGE_SIZE - len)
8837 buf[len++] = '\n';
8838
8839 ofs += 16;
8840 size -= min(size, 16U);
8841 }
8842
8843 return len;
8844 }
8845
8846 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8847
8848 static ssize_t show_antenna(struct device *d,
8849 struct device_attribute *attr, char *buf)
8850 {
8851 struct iwl4965_priv *priv = dev_get_drvdata(d);
8852
8853 if (!iwl4965_is_alive(priv))
8854 return -EAGAIN;
8855
8856 return sprintf(buf, "%d\n", priv->antenna);
8857 }
8858
8859 static ssize_t store_antenna(struct device *d,
8860 struct device_attribute *attr,
8861 const char *buf, size_t count)
8862 {
8863 int ant;
8864 struct iwl4965_priv *priv = dev_get_drvdata(d);
8865
8866 if (count == 0)
8867 return 0;
8868
8869 if (sscanf(buf, "%1i", &ant) != 1) {
8870 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8871 return count;
8872 }
8873
8874 if ((ant >= 0) && (ant <= 2)) {
8875 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8876 priv->antenna = (enum iwl4965_antenna)ant;
8877 } else
8878 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8879
8880
8881 return count;
8882 }
8883
8884 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8885
8886 static ssize_t show_status(struct device *d,
8887 struct device_attribute *attr, char *buf)
8888 {
8889 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8890 if (!iwl4965_is_alive(priv))
8891 return -EAGAIN;
8892 return sprintf(buf, "0x%08x\n", (int)priv->status);
8893 }
8894
8895 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8896
8897 static ssize_t dump_error_log(struct device *d,
8898 struct device_attribute *attr,
8899 const char *buf, size_t count)
8900 {
8901 char *p = (char *)buf;
8902
8903 if (p[0] == '1')
8904 iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
8905
8906 return strnlen(buf, count);
8907 }
8908
8909 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8910
8911 static ssize_t dump_event_log(struct device *d,
8912 struct device_attribute *attr,
8913 const char *buf, size_t count)
8914 {
8915 char *p = (char *)buf;
8916
8917 if (p[0] == '1')
8918 iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
8919
8920 return strnlen(buf, count);
8921 }
8922
8923 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8924
8925 /*****************************************************************************
8926 *
8927 * driver setup and teardown
8928 *
8929 *****************************************************************************/
8930
8931 static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
8932 {
8933 priv->workqueue = create_workqueue(DRV_NAME);
8934
8935 init_waitqueue_head(&priv->wait_command_queue);
8936
8937 INIT_WORK(&priv->up, iwl4965_bg_up);
8938 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8939 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8940 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
8941 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
8942 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
8943 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
8944 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
8945 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
8946 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
8947 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
8948 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
8949
8950 iwl4965_hw_setup_deferred_work(priv);
8951
8952 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8953 iwl4965_irq_tasklet, (unsigned long)priv);
8954 }
8955
8956 static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
8957 {
8958 iwl4965_hw_cancel_deferred_work(priv);
8959
8960 cancel_delayed_work_sync(&priv->init_alive_start);
8961 cancel_delayed_work(&priv->scan_check);
8962 cancel_delayed_work(&priv->alive_start);
8963 cancel_delayed_work(&priv->post_associate);
8964 cancel_work_sync(&priv->beacon_update);
8965 }
8966
8967 static struct attribute *iwl4965_sysfs_entries[] = {
8968 &dev_attr_antenna.attr,
8969 &dev_attr_channels.attr,
8970 &dev_attr_dump_errors.attr,
8971 &dev_attr_dump_events.attr,
8972 &dev_attr_flags.attr,
8973 &dev_attr_filter_flags.attr,
8974 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
8975 &dev_attr_measurement.attr,
8976 #endif
8977 &dev_attr_power_level.attr,
8978 &dev_attr_retry_rate.attr,
8979 &dev_attr_rf_kill.attr,
8980 &dev_attr_rs_window.attr,
8981 &dev_attr_statistics.attr,
8982 &dev_attr_status.attr,
8983 &dev_attr_temperature.attr,
8984 &dev_attr_tune.attr,
8985 &dev_attr_tx_power.attr,
8986
8987 NULL
8988 };
8989
8990 static struct attribute_group iwl4965_attribute_group = {
8991 .name = NULL, /* put in device directory */
8992 .attrs = iwl4965_sysfs_entries,
8993 };
8994
8995 static struct ieee80211_ops iwl4965_hw_ops = {
8996 .tx = iwl4965_mac_tx,
8997 .start = iwl4965_mac_start,
8998 .stop = iwl4965_mac_stop,
8999 .add_interface = iwl4965_mac_add_interface,
9000 .remove_interface = iwl4965_mac_remove_interface,
9001 .config = iwl4965_mac_config,
9002 .config_interface = iwl4965_mac_config_interface,
9003 .configure_filter = iwl4965_configure_filter,
9004 .set_key = iwl4965_mac_set_key,
9005 .get_stats = iwl4965_mac_get_stats,
9006 .get_tx_stats = iwl4965_mac_get_tx_stats,
9007 .conf_tx = iwl4965_mac_conf_tx,
9008 .get_tsf = iwl4965_mac_get_tsf,
9009 .reset_tsf = iwl4965_mac_reset_tsf,
9010 .beacon_update = iwl4965_mac_beacon_update,
9011 .bss_info_changed = iwl4965_bss_info_changed,
9012 #ifdef CONFIG_IWL4965_HT
9013 .conf_ht = iwl4965_mac_conf_ht,
9014 .ampdu_action = iwl4965_mac_ampdu_action,
9015 #ifdef CONFIG_IWL4965_HT_AGG
9016 .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
9017 .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
9018 #endif /* CONFIG_IWL4965_HT_AGG */
9019 #endif /* CONFIG_IWL4965_HT */
9020 .hw_scan = iwl4965_mac_hw_scan
9021 };
9022
9023 static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9024 {
9025 int err = 0;
9026 struct iwl4965_priv *priv;
9027 struct ieee80211_hw *hw;
9028 int i;
9029 DECLARE_MAC_BUF(mac);
9030
9031 /* Disabling hardware scan means that mac80211 will perform scans
9032 * "the hard way", rather than using device's scan. */
9033 if (iwl4965_param_disable_hw_scan) {
9034 IWL_DEBUG_INFO("Disabling hw_scan\n");
9035 iwl4965_hw_ops.hw_scan = NULL;
9036 }
9037
9038 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
9039 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
9040 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
9041 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
9042 err = -EINVAL;
9043 goto out;
9044 }
9045
9046 /* mac80211 allocates memory for this device instance, including
9047 * space for this driver's private structure */
9048 hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
9049 if (hw == NULL) {
9050 IWL_ERROR("Can not allocate network device\n");
9051 err = -ENOMEM;
9052 goto out;
9053 }
9054 SET_IEEE80211_DEV(hw, &pdev->dev);
9055
9056 hw->rate_control_algorithm = "iwl-4965-rs";
9057
9058 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
9059 priv = hw->priv;
9060 priv->hw = hw;
9061
9062 priv->pci_dev = pdev;
9063 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
9064 #ifdef CONFIG_IWL4965_DEBUG
9065 iwl4965_debug_level = iwl4965_param_debug;
9066 atomic_set(&priv->restrict_refcnt, 0);
9067 #endif
9068 priv->retry_rate = 1;
9069
9070 priv->ibss_beacon = NULL;
9071
9072 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
9073 * the range of signal quality values that we'll provide.
9074 * Negative values for level/noise indicate that we'll provide dBm.
9075 * For WE, at least, non-0 values here *enable* display of values
9076 * in app (iwconfig). */
9077 hw->max_rssi = -20; /* signal level, negative indicates dBm */
9078 hw->max_noise = -20; /* noise level, negative indicates dBm */
9079 hw->max_signal = 100; /* link quality indication (%) */
9080
9081 /* Tell mac80211 our Tx characteristics */
9082 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
9083
9084 /* Default value; 4 EDCA QOS priorities */
9085 hw->queues = 4;
9086 #ifdef CONFIG_IWL4965_HT
9087 #ifdef CONFIG_IWL4965_HT_AGG
9088 /* Enhanced value; more queues, to support 11n aggregation */
9089 hw->queues = 16;
9090 #endif /* CONFIG_IWL4965_HT_AGG */
9091 #endif /* CONFIG_IWL4965_HT */
9092
9093 spin_lock_init(&priv->lock);
9094 spin_lock_init(&priv->power_data.lock);
9095 spin_lock_init(&priv->sta_lock);
9096 spin_lock_init(&priv->hcmd_lock);
9097 spin_lock_init(&priv->lq_mngr.lock);
9098
9099 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
9100 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
9101
9102 INIT_LIST_HEAD(&priv->free_frames);
9103
9104 mutex_init(&priv->mutex);
9105 if (pci_enable_device(pdev)) {
9106 err = -ENODEV;
9107 goto out_ieee80211_free_hw;
9108 }
9109
9110 pci_set_master(pdev);
9111
9112 /* Clear the driver's (not device's) station table */
9113 iwl4965_clear_stations_table(priv);
9114
9115 priv->data_retry_limit = -1;
9116 priv->ieee_channels = NULL;
9117 priv->ieee_rates = NULL;
9118 priv->phymode = -1;
9119
9120 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
9121 if (!err)
9122 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
9123 if (err) {
9124 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
9125 goto out_pci_disable_device;
9126 }
9127
9128 pci_set_drvdata(pdev, priv);
9129 err = pci_request_regions(pdev, DRV_NAME);
9130 if (err)
9131 goto out_pci_disable_device;
9132
9133 /* We disable the RETRY_TIMEOUT register (0x41) to keep
9134 * PCI Tx retries from interfering with C3 CPU state */
9135 pci_write_config_byte(pdev, 0x41, 0x00);
9136
9137 priv->hw_base = pci_iomap(pdev, 0, 0);
9138 if (!priv->hw_base) {
9139 err = -ENODEV;
9140 goto out_pci_release_regions;
9141 }
9142
9143 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
9144 (unsigned long long) pci_resource_len(pdev, 0));
9145 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
9146
9147 /* Initialize module parameter values here */
9148
9149 /* Disable radio (SW RF KILL) via parameter when loading driver */
9150 if (iwl4965_param_disable) {
9151 set_bit(STATUS_RF_KILL_SW, &priv->status);
9152 IWL_DEBUG_INFO("Radio disabled.\n");
9153 }
9154
9155 priv->iw_mode = IEEE80211_IF_TYPE_STA;
9156
9157 priv->ps_mode = 0;
9158 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
9159 priv->valid_antenna = 0x7; /* assume all 3 connected */
9160 priv->ps_mode = IWL_MIMO_PS_NONE;
9161
9162 /* Choose which receivers/antennas to use */
9163 iwl4965_set_rxon_chain(priv);
9164
9165 printk(KERN_INFO DRV_NAME
9166 ": Detected Intel Wireless WiFi Link 4965AGN\n");
9167
9168 /* Device-specific setup */
9169 if (iwl4965_hw_set_hw_setting(priv)) {
9170 IWL_ERROR("failed to set hw settings\n");
9171 goto out_iounmap;
9172 }
9173
9174 #ifdef CONFIG_IWL4965_QOS
9175 if (iwl4965_param_qos_enable)
9176 priv->qos_data.qos_enable = 1;
9177
9178 iwl4965_reset_qos(priv);
9179
9180 priv->qos_data.qos_active = 0;
9181 priv->qos_data.qos_cap.val = 0;
9182 #endif /* CONFIG_IWL4965_QOS */
9183
9184 iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
9185 iwl4965_setup_deferred_work(priv);
9186 iwl4965_setup_rx_handlers(priv);
9187
9188 priv->rates_mask = IWL_RATES_MASK;
9189 /* If power management is turned on, default to AC mode */
9190 priv->power_mode = IWL_POWER_AC;
9191 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
9192
9193 iwl4965_disable_interrupts(priv);
9194
9195 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9196 if (err) {
9197 IWL_ERROR("failed to create sysfs device attributes\n");
9198 goto out_release_irq;
9199 }
9200
9201 /* nic init */
9202 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
9203 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
9204
9205 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
9206 err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
9207 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
9208 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
9209 if (err < 0) {
9210 IWL_DEBUG_INFO("Failed to init the card\n");
9211 goto out_remove_sysfs;
9212 }
9213 /* Read the EEPROM */
9214 err = iwl4965_eeprom_init(priv);
9215 if (err) {
9216 IWL_ERROR("Unable to init EEPROM\n");
9217 goto out_remove_sysfs;
9218 }
9219 /* MAC Address location in EEPROM same for 3945/4965 */
9220 get_eeprom_mac(priv, priv->mac_addr);
9221 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
9222 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
9223
9224 err = iwl4965_init_channel_map(priv);
9225 if (err) {
9226 IWL_ERROR("initializing regulatory failed: %d\n", err);
9227 goto out_remove_sysfs;
9228 }
9229
9230 err = iwl4965_init_geos(priv);
9231 if (err) {
9232 IWL_ERROR("initializing geos failed: %d\n", err);
9233 goto out_free_channel_map;
9234 }
9235 iwl4965_reset_channel_flag(priv);
9236
9237 iwl4965_rate_control_register(priv->hw);
9238 err = ieee80211_register_hw(priv->hw);
9239 if (err) {
9240 IWL_ERROR("Failed to register network device (error %d)\n", err);
9241 goto out_free_geos;
9242 }
9243
9244 priv->hw->conf.beacon_int = 100;
9245 priv->mac80211_registered = 1;
9246 pci_save_state(pdev);
9247 pci_disable_device(pdev);
9248
9249 return 0;
9250
9251 out_free_geos:
9252 iwl4965_free_geos(priv);
9253 out_free_channel_map:
9254 iwl4965_free_channel_map(priv);
9255 out_remove_sysfs:
9256 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9257
9258 out_release_irq:
9259 destroy_workqueue(priv->workqueue);
9260 priv->workqueue = NULL;
9261 iwl4965_unset_hw_setting(priv);
9262
9263 out_iounmap:
9264 pci_iounmap(pdev, priv->hw_base);
9265 out_pci_release_regions:
9266 pci_release_regions(pdev);
9267 out_pci_disable_device:
9268 pci_disable_device(pdev);
9269 pci_set_drvdata(pdev, NULL);
9270 out_ieee80211_free_hw:
9271 ieee80211_free_hw(priv->hw);
9272 out:
9273 return err;
9274 }
9275
9276 static void iwl4965_pci_remove(struct pci_dev *pdev)
9277 {
9278 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9279 struct list_head *p, *q;
9280 int i;
9281
9282 if (!priv)
9283 return;
9284
9285 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
9286
9287 set_bit(STATUS_EXIT_PENDING, &priv->status);
9288
9289 iwl4965_down(priv);
9290
9291 /* Free MAC hash list for ADHOC */
9292 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
9293 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
9294 list_del(p);
9295 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
9296 }
9297 }
9298
9299 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9300
9301 iwl4965_dealloc_ucode_pci(priv);
9302
9303 if (priv->rxq.bd)
9304 iwl4965_rx_queue_free(priv, &priv->rxq);
9305 iwl4965_hw_txq_ctx_free(priv);
9306
9307 iwl4965_unset_hw_setting(priv);
9308 iwl4965_clear_stations_table(priv);
9309
9310 if (priv->mac80211_registered) {
9311 ieee80211_unregister_hw(priv->hw);
9312 iwl4965_rate_control_unregister(priv->hw);
9313 }
9314
9315 /*netif_stop_queue(dev); */
9316 flush_workqueue(priv->workqueue);
9317
9318 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
9319 * priv->workqueue... so we can't take down the workqueue
9320 * until now... */
9321 destroy_workqueue(priv->workqueue);
9322 priv->workqueue = NULL;
9323
9324 pci_iounmap(pdev, priv->hw_base);
9325 pci_release_regions(pdev);
9326 pci_disable_device(pdev);
9327 pci_set_drvdata(pdev, NULL);
9328
9329 iwl4965_free_channel_map(priv);
9330 iwl4965_free_geos(priv);
9331
9332 if (priv->ibss_beacon)
9333 dev_kfree_skb(priv->ibss_beacon);
9334
9335 ieee80211_free_hw(priv->hw);
9336 }
9337
9338 #ifdef CONFIG_PM
9339
9340 static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
9341 {
9342 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9343
9344 if (priv->is_open) {
9345 set_bit(STATUS_IN_SUSPEND, &priv->status);
9346 iwl4965_mac_stop(priv->hw);
9347 priv->is_open = 1;
9348 }
9349
9350 pci_set_power_state(pdev, PCI_D3hot);
9351
9352 return 0;
9353 }
9354
9355 static int iwl4965_pci_resume(struct pci_dev *pdev)
9356 {
9357 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9358
9359 pci_set_power_state(pdev, PCI_D0);
9360
9361 if (priv->is_open)
9362 iwl4965_mac_start(priv->hw);
9363
9364 clear_bit(STATUS_IN_SUSPEND, &priv->status);
9365 return 0;
9366 }
9367
9368 #endif /* CONFIG_PM */
9369
9370 /*****************************************************************************
9371 *
9372 * driver and module entry point
9373 *
9374 *****************************************************************************/
9375
9376 static struct pci_driver iwl4965_driver = {
9377 .name = DRV_NAME,
9378 .id_table = iwl4965_hw_card_ids,
9379 .probe = iwl4965_pci_probe,
9380 .remove = __devexit_p(iwl4965_pci_remove),
9381 #ifdef CONFIG_PM
9382 .suspend = iwl4965_pci_suspend,
9383 .resume = iwl4965_pci_resume,
9384 #endif
9385 };
9386
9387 static int __init iwl4965_init(void)
9388 {
9389
9390 int ret;
9391 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
9392 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
9393 ret = pci_register_driver(&iwl4965_driver);
9394 if (ret) {
9395 IWL_ERROR("Unable to initialize PCI module\n");
9396 return ret;
9397 }
9398 #ifdef CONFIG_IWL4965_DEBUG
9399 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
9400 if (ret) {
9401 IWL_ERROR("Unable to create driver sysfs file\n");
9402 pci_unregister_driver(&iwl4965_driver);
9403 return ret;
9404 }
9405 #endif
9406
9407 return ret;
9408 }
9409
9410 static void __exit iwl4965_exit(void)
9411 {
9412 #ifdef CONFIG_IWL4965_DEBUG
9413 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
9414 #endif
9415 pci_unregister_driver(&iwl4965_driver);
9416 }
9417
9418 module_param_named(antenna, iwl4965_param_antenna, int, 0444);
9419 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
9420 module_param_named(disable, iwl4965_param_disable, int, 0444);
9421 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9422 module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
9423 MODULE_PARM_DESC(hwcrypto,
9424 "using hardware crypto engine (default 0 [software])\n");
9425 module_param_named(debug, iwl4965_param_debug, int, 0444);
9426 MODULE_PARM_DESC(debug, "debug output mask");
9427 module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
9428 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
9429
9430 module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
9431 MODULE_PARM_DESC(queues_num, "number of hw queues.");
9432
9433 /* QoS */
9434 module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
9435 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
9436 module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
9437 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
9438
9439 module_exit(iwl4965_exit);
9440 module_init(iwl4965_init);
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