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Merge branch 'upstream-net26' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik...
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #include "iwl-eeprom.h"
49 #include "iwl-core.h"
50 #include "iwl-4965.h"
51 #include "iwl-helpers.h"
52
53 static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
54 struct iwl4965_tx_queue *txq);
55
56 /******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
62 /* module parameters */
63 static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
64 static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
65 static int iwl4965_param_disable; /* def: enable radio */
66 static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
67 int iwl4965_param_hwcrypto; /* def: using software encryption */
68 static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
69 int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
70 int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
71
72 /*
73 * module name, copyright, version, etc.
74 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
75 */
76
77 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
78
79 #ifdef CONFIG_IWL4965_DEBUG
80 #define VD "d"
81 #else
82 #define VD
83 #endif
84
85 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
86 #define VS "s"
87 #else
88 #define VS
89 #endif
90
91 #define DRV_VERSION IWLWIFI_VERSION VD VS
92
93
94 MODULE_DESCRIPTION(DRV_DESCRIPTION);
95 MODULE_VERSION(DRV_VERSION);
96 MODULE_AUTHOR(DRV_COPYRIGHT);
97 MODULE_LICENSE("GPL");
98
99 __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
100 {
101 u16 fc = le16_to_cpu(hdr->frame_control);
102 int hdr_len = ieee80211_get_hdrlen(fc);
103
104 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
105 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
106 return NULL;
107 }
108
109 static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
110 struct iwl4965_priv *priv, enum ieee80211_band band)
111 {
112 return priv->hw->wiphy->bands[band];
113 }
114
115 static int iwl4965_is_empty_essid(const char *essid, int essid_len)
116 {
117 /* Single white space is for Linksys APs */
118 if (essid_len == 1 && essid[0] == ' ')
119 return 1;
120
121 /* Otherwise, if the entire essid is 0, we assume it is hidden */
122 while (essid_len) {
123 essid_len--;
124 if (essid[essid_len] != '\0')
125 return 0;
126 }
127
128 return 1;
129 }
130
131 static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
132 {
133 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
134 const char *s = essid;
135 char *d = escaped;
136
137 if (iwl4965_is_empty_essid(essid, essid_len)) {
138 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
139 return escaped;
140 }
141
142 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
143 while (essid_len--) {
144 if (*s == '\0') {
145 *d++ = '\\';
146 *d++ = '0';
147 s++;
148 } else
149 *d++ = *s++;
150 }
151 *d = '\0';
152 return escaped;
153 }
154
155 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
156 * DMA services
157 *
158 * Theory of operation
159 *
160 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
161 * of buffer descriptors, each of which points to one or more data buffers for
162 * the device to read from or fill. Driver and device exchange status of each
163 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
164 * entries in each circular buffer, to protect against confusing empty and full
165 * queue states.
166 *
167 * The device reads or writes the data in the queues via the device's several
168 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
169 *
170 * For Tx queue, there are low mark and high mark limits. If, after queuing
171 * the packet for Tx, free space become < low mark, Tx queue stopped. When
172 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
173 * Tx queue resumed.
174 *
175 * The 4965 operates with up to 17 queues: One receive queue, one transmit
176 * queue (#4) for sending commands to the device firmware, and 15 other
177 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
178 *
179 * See more detailed info in iwl-4965-hw.h.
180 ***************************************************/
181
182 int iwl4965_queue_space(const struct iwl4965_queue *q)
183 {
184 int s = q->read_ptr - q->write_ptr;
185
186 if (q->read_ptr > q->write_ptr)
187 s -= q->n_bd;
188
189 if (s <= 0)
190 s += q->n_window;
191 /* keep some reserve to not confuse empty and full situations */
192 s -= 2;
193 if (s < 0)
194 s = 0;
195 return s;
196 }
197
198
199 static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
200 {
201 return q->write_ptr > q->read_ptr ?
202 (i >= q->read_ptr && i < q->write_ptr) :
203 !(i < q->read_ptr && i >= q->write_ptr);
204 }
205
206 static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
207 {
208 /* This is for scan command, the big buffer at end of command array */
209 if (is_huge)
210 return q->n_window; /* must be power of 2 */
211
212 /* Otherwise, use normal size buffers */
213 return index & (q->n_window - 1);
214 }
215
216 /**
217 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
218 */
219 static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
220 int count, int slots_num, u32 id)
221 {
222 q->n_bd = count;
223 q->n_window = slots_num;
224 q->id = id;
225
226 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
227 * and iwl_queue_dec_wrap are broken. */
228 BUG_ON(!is_power_of_2(count));
229
230 /* slots_num must be power-of-two size, otherwise
231 * get_cmd_index is broken. */
232 BUG_ON(!is_power_of_2(slots_num));
233
234 q->low_mark = q->n_window / 4;
235 if (q->low_mark < 4)
236 q->low_mark = 4;
237
238 q->high_mark = q->n_window / 8;
239 if (q->high_mark < 2)
240 q->high_mark = 2;
241
242 q->write_ptr = q->read_ptr = 0;
243
244 return 0;
245 }
246
247 /**
248 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
249 */
250 static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
251 struct iwl4965_tx_queue *txq, u32 id)
252 {
253 struct pci_dev *dev = priv->pci_dev;
254
255 /* Driver private data, only for Tx (not command) queues,
256 * not shared with device. */
257 if (id != IWL_CMD_QUEUE_NUM) {
258 txq->txb = kmalloc(sizeof(txq->txb[0]) *
259 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
260 if (!txq->txb) {
261 IWL_ERROR("kmalloc for auxiliary BD "
262 "structures failed\n");
263 goto error;
264 }
265 } else
266 txq->txb = NULL;
267
268 /* Circular buffer of transmit frame descriptors (TFDs),
269 * shared with device */
270 txq->bd = pci_alloc_consistent(dev,
271 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
272 &txq->q.dma_addr);
273
274 if (!txq->bd) {
275 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
276 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
277 goto error;
278 }
279 txq->q.id = id;
280
281 return 0;
282
283 error:
284 if (txq->txb) {
285 kfree(txq->txb);
286 txq->txb = NULL;
287 }
288
289 return -ENOMEM;
290 }
291
292 /**
293 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
294 */
295 int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
296 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
297 {
298 struct pci_dev *dev = priv->pci_dev;
299 int len;
300 int rc = 0;
301
302 /*
303 * Alloc buffer array for commands (Tx or other types of commands).
304 * For the command queue (#4), allocate command space + one big
305 * command for scan, since scan command is very huge; the system will
306 * not have two scans at the same time, so only one is needed.
307 * For normal Tx queues (all other queues), no super-size command
308 * space is needed.
309 */
310 len = sizeof(struct iwl4965_cmd) * slots_num;
311 if (txq_id == IWL_CMD_QUEUE_NUM)
312 len += IWL_MAX_SCAN_SIZE;
313 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
314 if (!txq->cmd)
315 return -ENOMEM;
316
317 /* Alloc driver data array and TFD circular buffer */
318 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
319 if (rc) {
320 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
321
322 return -ENOMEM;
323 }
324 txq->need_update = 0;
325
326 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
327 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
328 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
329
330 /* Initialize queue's high/low-water marks, and head/tail indexes */
331 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
332
333 /* Tell device where to find queue */
334 iwl4965_hw_tx_queue_init(priv, txq);
335
336 return 0;
337 }
338
339 /**
340 * iwl4965_tx_queue_free - Deallocate DMA queue.
341 * @txq: Transmit queue to deallocate.
342 *
343 * Empty queue by removing and destroying all BD's.
344 * Free all buffers.
345 * 0-fill, but do not free "txq" descriptor structure.
346 */
347 void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
348 {
349 struct iwl4965_queue *q = &txq->q;
350 struct pci_dev *dev = priv->pci_dev;
351 int len;
352
353 if (q->n_bd == 0)
354 return;
355
356 /* first, empty all BD's */
357 for (; q->write_ptr != q->read_ptr;
358 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
359 iwl4965_hw_txq_free_tfd(priv, txq);
360
361 len = sizeof(struct iwl4965_cmd) * q->n_window;
362 if (q->id == IWL_CMD_QUEUE_NUM)
363 len += IWL_MAX_SCAN_SIZE;
364
365 /* De-alloc array of command/tx buffers */
366 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
367
368 /* De-alloc circular buffer of TFDs */
369 if (txq->q.n_bd)
370 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
371 txq->q.n_bd, txq->bd, txq->q.dma_addr);
372
373 /* De-alloc array of per-TFD driver data */
374 if (txq->txb) {
375 kfree(txq->txb);
376 txq->txb = NULL;
377 }
378
379 /* 0-fill queue descriptor structure */
380 memset(txq, 0, sizeof(*txq));
381 }
382
383 const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
384
385 /*************** STATION TABLE MANAGEMENT ****
386 * mac80211 should be examined to determine if sta_info is duplicating
387 * the functionality provided here
388 */
389
390 /**************************************************************/
391
392 #if 0 /* temporary disable till we add real remove station */
393 /**
394 * iwl4965_remove_station - Remove driver's knowledge of station.
395 *
396 * NOTE: This does not remove station from device's station table.
397 */
398 static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
399 {
400 int index = IWL_INVALID_STATION;
401 int i;
402 unsigned long flags;
403
404 spin_lock_irqsave(&priv->sta_lock, flags);
405
406 if (is_ap)
407 index = IWL_AP_ID;
408 else if (is_broadcast_ether_addr(addr))
409 index = priv->hw_setting.bcast_sta_id;
410 else
411 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
412 if (priv->stations[i].used &&
413 !compare_ether_addr(priv->stations[i].sta.sta.addr,
414 addr)) {
415 index = i;
416 break;
417 }
418
419 if (unlikely(index == IWL_INVALID_STATION))
420 goto out;
421
422 if (priv->stations[index].used) {
423 priv->stations[index].used = 0;
424 priv->num_stations--;
425 }
426
427 BUG_ON(priv->num_stations < 0);
428
429 out:
430 spin_unlock_irqrestore(&priv->sta_lock, flags);
431 return 0;
432 }
433 #endif
434
435 /**
436 * iwl4965_clear_stations_table - Clear the driver's station table
437 *
438 * NOTE: This does not clear or otherwise alter the device's station table.
439 */
440 static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
441 {
442 unsigned long flags;
443
444 spin_lock_irqsave(&priv->sta_lock, flags);
445
446 priv->num_stations = 0;
447 memset(priv->stations, 0, sizeof(priv->stations));
448
449 spin_unlock_irqrestore(&priv->sta_lock, flags);
450 }
451
452 /**
453 * iwl4965_add_station_flags - Add station to tables in driver and device
454 */
455 u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
456 int is_ap, u8 flags, void *ht_data)
457 {
458 int i;
459 int index = IWL_INVALID_STATION;
460 struct iwl4965_station_entry *station;
461 unsigned long flags_spin;
462 DECLARE_MAC_BUF(mac);
463
464 spin_lock_irqsave(&priv->sta_lock, flags_spin);
465 if (is_ap)
466 index = IWL_AP_ID;
467 else if (is_broadcast_ether_addr(addr))
468 index = priv->hw_setting.bcast_sta_id;
469 else
470 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
471 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
472 addr)) {
473 index = i;
474 break;
475 }
476
477 if (!priv->stations[i].used &&
478 index == IWL_INVALID_STATION)
479 index = i;
480 }
481
482
483 /* These two conditions have the same outcome, but keep them separate
484 since they have different meanings */
485 if (unlikely(index == IWL_INVALID_STATION)) {
486 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
487 return index;
488 }
489
490 if (priv->stations[index].used &&
491 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
492 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
493 return index;
494 }
495
496
497 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
498 station = &priv->stations[index];
499 station->used = 1;
500 priv->num_stations++;
501
502 /* Set up the REPLY_ADD_STA command to send to device */
503 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
504 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
505 station->sta.mode = 0;
506 station->sta.sta.sta_id = index;
507 station->sta.station_flags = 0;
508
509 #ifdef CONFIG_IWL4965_HT
510 /* BCAST station and IBSS stations do not work in HT mode */
511 if (index != priv->hw_setting.bcast_sta_id &&
512 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
513 iwl4965_set_ht_add_station(priv, index,
514 (struct ieee80211_ht_info *) ht_data);
515 #endif /*CONFIG_IWL4965_HT*/
516
517 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
518
519 /* Add station to device's station table */
520 iwl4965_send_add_station(priv, &station->sta, flags);
521 return index;
522
523 }
524
525 /*************** DRIVER STATUS FUNCTIONS *****/
526
527 static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
528 {
529 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
530 * set but EXIT_PENDING is not */
531 return test_bit(STATUS_READY, &priv->status) &&
532 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
533 !test_bit(STATUS_EXIT_PENDING, &priv->status);
534 }
535
536 static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
537 {
538 return test_bit(STATUS_ALIVE, &priv->status);
539 }
540
541 static inline int iwl4965_is_init(struct iwl4965_priv *priv)
542 {
543 return test_bit(STATUS_INIT, &priv->status);
544 }
545
546 static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
547 {
548 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
549 test_bit(STATUS_RF_KILL_SW, &priv->status);
550 }
551
552 static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
553 {
554
555 if (iwl4965_is_rfkill(priv))
556 return 0;
557
558 return iwl4965_is_ready(priv);
559 }
560
561 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
562
563 #define IWL_CMD(x) case x : return #x
564
565 static const char *get_cmd_string(u8 cmd)
566 {
567 switch (cmd) {
568 IWL_CMD(REPLY_ALIVE);
569 IWL_CMD(REPLY_ERROR);
570 IWL_CMD(REPLY_RXON);
571 IWL_CMD(REPLY_RXON_ASSOC);
572 IWL_CMD(REPLY_QOS_PARAM);
573 IWL_CMD(REPLY_RXON_TIMING);
574 IWL_CMD(REPLY_ADD_STA);
575 IWL_CMD(REPLY_REMOVE_STA);
576 IWL_CMD(REPLY_REMOVE_ALL_STA);
577 IWL_CMD(REPLY_TX);
578 IWL_CMD(REPLY_RATE_SCALE);
579 IWL_CMD(REPLY_LEDS_CMD);
580 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
581 IWL_CMD(RADAR_NOTIFICATION);
582 IWL_CMD(REPLY_QUIET_CMD);
583 IWL_CMD(REPLY_CHANNEL_SWITCH);
584 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
585 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
586 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
587 IWL_CMD(POWER_TABLE_CMD);
588 IWL_CMD(PM_SLEEP_NOTIFICATION);
589 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
590 IWL_CMD(REPLY_SCAN_CMD);
591 IWL_CMD(REPLY_SCAN_ABORT_CMD);
592 IWL_CMD(SCAN_START_NOTIFICATION);
593 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
594 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
595 IWL_CMD(BEACON_NOTIFICATION);
596 IWL_CMD(REPLY_TX_BEACON);
597 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
598 IWL_CMD(QUIET_NOTIFICATION);
599 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
600 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
601 IWL_CMD(REPLY_BT_CONFIG);
602 IWL_CMD(REPLY_STATISTICS_CMD);
603 IWL_CMD(STATISTICS_NOTIFICATION);
604 IWL_CMD(REPLY_CARD_STATE_CMD);
605 IWL_CMD(CARD_STATE_NOTIFICATION);
606 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
607 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
608 IWL_CMD(SENSITIVITY_CMD);
609 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
610 IWL_CMD(REPLY_RX_PHY_CMD);
611 IWL_CMD(REPLY_RX_MPDU_CMD);
612 IWL_CMD(REPLY_4965_RX);
613 IWL_CMD(REPLY_COMPRESSED_BA);
614 default:
615 return "UNKNOWN";
616
617 }
618 }
619
620 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
621
622 /**
623 * iwl4965_enqueue_hcmd - enqueue a uCode command
624 * @priv: device private data point
625 * @cmd: a point to the ucode command structure
626 *
627 * The function returns < 0 values to indicate the operation is
628 * failed. On success, it turns the index (> 0) of command in the
629 * command queue.
630 */
631 static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
632 {
633 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
634 struct iwl4965_queue *q = &txq->q;
635 struct iwl4965_tfd_frame *tfd;
636 u32 *control_flags;
637 struct iwl4965_cmd *out_cmd;
638 u32 idx;
639 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
640 dma_addr_t phys_addr;
641 int ret;
642 unsigned long flags;
643
644 /* If any of the command structures end up being larger than
645 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
646 * we will need to increase the size of the TFD entries */
647 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
648 !(cmd->meta.flags & CMD_SIZE_HUGE));
649
650 if (iwl4965_is_rfkill(priv)) {
651 IWL_DEBUG_INFO("Not sending command - RF KILL");
652 return -EIO;
653 }
654
655 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
656 IWL_ERROR("No space for Tx\n");
657 return -ENOSPC;
658 }
659
660 spin_lock_irqsave(&priv->hcmd_lock, flags);
661
662 tfd = &txq->bd[q->write_ptr];
663 memset(tfd, 0, sizeof(*tfd));
664
665 control_flags = (u32 *) tfd;
666
667 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
668 out_cmd = &txq->cmd[idx];
669
670 out_cmd->hdr.cmd = cmd->id;
671 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
672 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
673
674 /* At this point, the out_cmd now has all of the incoming cmd
675 * information */
676
677 out_cmd->hdr.flags = 0;
678 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
679 INDEX_TO_SEQ(q->write_ptr));
680 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
681 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
682
683 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
684 offsetof(struct iwl4965_cmd, hdr);
685 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
686
687 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
688 "%d bytes at %d[%d]:%d\n",
689 get_cmd_string(out_cmd->hdr.cmd),
690 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
691 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
692
693 txq->need_update = 1;
694
695 /* Set up entry in queue's byte count circular buffer */
696 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
697
698 /* Increment and update queue's write index */
699 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
700 iwl4965_tx_queue_update_write_ptr(priv, txq);
701
702 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
703 return ret ? ret : idx;
704 }
705
706 static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
707 {
708 int ret;
709
710 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
711
712 /* An asynchronous command can not expect an SKB to be set. */
713 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
714
715 /* An asynchronous command MUST have a callback. */
716 BUG_ON(!cmd->meta.u.callback);
717
718 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
719 return -EBUSY;
720
721 ret = iwl4965_enqueue_hcmd(priv, cmd);
722 if (ret < 0) {
723 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
724 get_cmd_string(cmd->id), ret);
725 return ret;
726 }
727 return 0;
728 }
729
730 static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
731 {
732 int cmd_idx;
733 int ret;
734 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
735
736 BUG_ON(cmd->meta.flags & CMD_ASYNC);
737
738 /* A synchronous command can not have a callback set. */
739 BUG_ON(cmd->meta.u.callback != NULL);
740
741 if (atomic_xchg(&entry, 1)) {
742 IWL_ERROR("Error sending %s: Already sending a host command\n",
743 get_cmd_string(cmd->id));
744 return -EBUSY;
745 }
746
747 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
748
749 if (cmd->meta.flags & CMD_WANT_SKB)
750 cmd->meta.source = &cmd->meta;
751
752 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
753 if (cmd_idx < 0) {
754 ret = cmd_idx;
755 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
756 get_cmd_string(cmd->id), ret);
757 goto out;
758 }
759
760 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
761 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
762 HOST_COMPLETE_TIMEOUT);
763 if (!ret) {
764 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
765 IWL_ERROR("Error sending %s: time out after %dms.\n",
766 get_cmd_string(cmd->id),
767 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
768
769 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
770 ret = -ETIMEDOUT;
771 goto cancel;
772 }
773 }
774
775 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
776 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
777 get_cmd_string(cmd->id));
778 ret = -ECANCELED;
779 goto fail;
780 }
781 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
782 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
783 get_cmd_string(cmd->id));
784 ret = -EIO;
785 goto fail;
786 }
787 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
788 IWL_ERROR("Error: Response NULL in '%s'\n",
789 get_cmd_string(cmd->id));
790 ret = -EIO;
791 goto out;
792 }
793
794 ret = 0;
795 goto out;
796
797 cancel:
798 if (cmd->meta.flags & CMD_WANT_SKB) {
799 struct iwl4965_cmd *qcmd;
800
801 /* Cancel the CMD_WANT_SKB flag for the cmd in the
802 * TX cmd queue. Otherwise in case the cmd comes
803 * in later, it will possibly set an invalid
804 * address (cmd->meta.source). */
805 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
806 qcmd->meta.flags &= ~CMD_WANT_SKB;
807 }
808 fail:
809 if (cmd->meta.u.skb) {
810 dev_kfree_skb_any(cmd->meta.u.skb);
811 cmd->meta.u.skb = NULL;
812 }
813 out:
814 atomic_set(&entry, 0);
815 return ret;
816 }
817
818 int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
819 {
820 if (cmd->meta.flags & CMD_ASYNC)
821 return iwl4965_send_cmd_async(priv, cmd);
822
823 return iwl4965_send_cmd_sync(priv, cmd);
824 }
825
826 int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
827 {
828 struct iwl4965_host_cmd cmd = {
829 .id = id,
830 .len = len,
831 .data = data,
832 };
833
834 return iwl4965_send_cmd_sync(priv, &cmd);
835 }
836
837 static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
838 {
839 struct iwl4965_host_cmd cmd = {
840 .id = id,
841 .len = sizeof(val),
842 .data = &val,
843 };
844
845 return iwl4965_send_cmd_sync(priv, &cmd);
846 }
847
848 int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
849 {
850 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
851 }
852
853 /**
854 * iwl4965_rxon_add_station - add station into station table.
855 *
856 * there is only one AP station with id= IWL_AP_ID
857 * NOTE: mutex must be held before calling this fnction
858 */
859 static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
860 const u8 *addr, int is_ap)
861 {
862 u8 sta_id;
863
864 /* Add station to device's station table */
865 #ifdef CONFIG_IWL4965_HT
866 struct ieee80211_conf *conf = &priv->hw->conf;
867 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
868
869 if ((is_ap) &&
870 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
871 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
872 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
873 0, cur_ht_config);
874 else
875 #endif /* CONFIG_IWL4965_HT */
876 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
877 0, NULL);
878
879 /* Set up default rate scaling table in device's station table */
880 iwl4965_add_station(priv, addr, is_ap);
881
882 return sta_id;
883 }
884
885 /**
886 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
887 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
888 * @channel: Any channel valid for the requested phymode
889
890 * In addition to setting the staging RXON, priv->phymode is also set.
891 *
892 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
893 * in the staging RXON flag structure based on the phymode
894 */
895 static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
896 enum ieee80211_band band,
897 u16 channel)
898 {
899 if (!iwl4965_get_channel_info(priv, band, channel)) {
900 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
901 channel, band);
902 return -EINVAL;
903 }
904
905 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
906 (priv->band == band))
907 return 0;
908
909 priv->staging_rxon.channel = cpu_to_le16(channel);
910 if (band == IEEE80211_BAND_5GHZ)
911 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
912 else
913 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
914
915 priv->band = band;
916
917 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
918
919 return 0;
920 }
921
922 /**
923 * iwl4965_check_rxon_cmd - validate RXON structure is valid
924 *
925 * NOTE: This is really only useful during development and can eventually
926 * be #ifdef'd out once the driver is stable and folks aren't actively
927 * making changes
928 */
929 static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
930 {
931 int error = 0;
932 int counter = 1;
933
934 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
935 error |= le32_to_cpu(rxon->flags &
936 (RXON_FLG_TGJ_NARROW_BAND_MSK |
937 RXON_FLG_RADAR_DETECT_MSK));
938 if (error)
939 IWL_WARNING("check 24G fields %d | %d\n",
940 counter++, error);
941 } else {
942 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
943 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
944 if (error)
945 IWL_WARNING("check 52 fields %d | %d\n",
946 counter++, error);
947 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
948 if (error)
949 IWL_WARNING("check 52 CCK %d | %d\n",
950 counter++, error);
951 }
952 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
953 if (error)
954 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
955
956 /* make sure basic rates 6Mbps and 1Mbps are supported */
957 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
958 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
959 if (error)
960 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
961
962 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
963 if (error)
964 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
965
966 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
967 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
968 if (error)
969 IWL_WARNING("check CCK and short slot %d | %d\n",
970 counter++, error);
971
972 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
973 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
974 if (error)
975 IWL_WARNING("check CCK & auto detect %d | %d\n",
976 counter++, error);
977
978 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
979 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
980 if (error)
981 IWL_WARNING("check TGG and auto detect %d | %d\n",
982 counter++, error);
983
984 if (error)
985 IWL_WARNING("Tuning to channel %d\n",
986 le16_to_cpu(rxon->channel));
987
988 if (error) {
989 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
990 return -1;
991 }
992 return 0;
993 }
994
995 /**
996 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
997 * @priv: staging_rxon is compared to active_rxon
998 *
999 * If the RXON structure is changing enough to require a new tune,
1000 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1001 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
1002 */
1003 static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
1004 {
1005
1006 /* These items are only settable from the full RXON command */
1007 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1008 compare_ether_addr(priv->staging_rxon.bssid_addr,
1009 priv->active_rxon.bssid_addr) ||
1010 compare_ether_addr(priv->staging_rxon.node_addr,
1011 priv->active_rxon.node_addr) ||
1012 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1013 priv->active_rxon.wlap_bssid_addr) ||
1014 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1015 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1016 (priv->staging_rxon.air_propagation !=
1017 priv->active_rxon.air_propagation) ||
1018 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1019 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1020 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1021 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1022 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1023 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1024 return 1;
1025
1026 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1027 * be updated with the RXON_ASSOC command -- however only some
1028 * flag transitions are allowed using RXON_ASSOC */
1029
1030 /* Check if we are not switching bands */
1031 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1032 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1033 return 1;
1034
1035 /* Check if we are switching association toggle */
1036 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1037 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1038 return 1;
1039
1040 return 0;
1041 }
1042
1043 static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
1044 {
1045 int rc = 0;
1046 struct iwl4965_rx_packet *res = NULL;
1047 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1048 struct iwl4965_host_cmd cmd = {
1049 .id = REPLY_RXON_ASSOC,
1050 .len = sizeof(rxon_assoc),
1051 .meta.flags = CMD_WANT_SKB,
1052 .data = &rxon_assoc,
1053 };
1054 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1055 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
1056
1057 if ((rxon1->flags == rxon2->flags) &&
1058 (rxon1->filter_flags == rxon2->filter_flags) &&
1059 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1060 (rxon1->ofdm_ht_single_stream_basic_rates ==
1061 rxon2->ofdm_ht_single_stream_basic_rates) &&
1062 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1063 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1064 (rxon1->rx_chain == rxon2->rx_chain) &&
1065 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1066 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1067 return 0;
1068 }
1069
1070 rxon_assoc.flags = priv->staging_rxon.flags;
1071 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1072 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1073 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1074 rxon_assoc.reserved = 0;
1075 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1076 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1077 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1078 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1079 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1080
1081 rc = iwl4965_send_cmd_sync(priv, &cmd);
1082 if (rc)
1083 return rc;
1084
1085 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1086 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1087 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1088 rc = -EIO;
1089 }
1090
1091 priv->alloc_rxb_skb--;
1092 dev_kfree_skb_any(cmd.meta.u.skb);
1093
1094 return rc;
1095 }
1096
1097 /**
1098 * iwl4965_commit_rxon - commit staging_rxon to hardware
1099 *
1100 * The RXON command in staging_rxon is committed to the hardware and
1101 * the active_rxon structure is updated with the new data. This
1102 * function correctly transitions out of the RXON_ASSOC_MSK state if
1103 * a HW tune is required based on the RXON structure changes.
1104 */
1105 static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
1106 {
1107 /* cast away the const for active_rxon in this function */
1108 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1109 DECLARE_MAC_BUF(mac);
1110 int rc = 0;
1111
1112 if (!iwl4965_is_alive(priv))
1113 return -1;
1114
1115 /* always get timestamp with Rx frame */
1116 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1117
1118 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
1119 if (rc) {
1120 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1121 return -EINVAL;
1122 }
1123
1124 /* If we don't need to send a full RXON, we can use
1125 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
1126 * and other flags for the current radio configuration. */
1127 if (!iwl4965_full_rxon_required(priv)) {
1128 rc = iwl4965_send_rxon_assoc(priv);
1129 if (rc) {
1130 IWL_ERROR("Error setting RXON_ASSOC "
1131 "configuration (%d).\n", rc);
1132 return rc;
1133 }
1134
1135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1136
1137 return 0;
1138 }
1139
1140 /* station table will be cleared */
1141 priv->assoc_station_added = 0;
1142
1143 #ifdef CONFIG_IWL4965_SENSITIVITY
1144 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1145 if (!priv->error_recovering)
1146 priv->start_calib = 0;
1147
1148 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
1149 #endif /* CONFIG_IWL4965_SENSITIVITY */
1150
1151 /* If we are currently associated and the new config requires
1152 * an RXON_ASSOC and the new config wants the associated mask enabled,
1153 * we must clear the associated from the active configuration
1154 * before we apply the new config */
1155 if (iwl4965_is_associated(priv) &&
1156 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1157 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1158 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1159
1160 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1161 sizeof(struct iwl4965_rxon_cmd),
1162 &priv->active_rxon);
1163
1164 /* If the mask clearing failed then we set
1165 * active_rxon back to what it was previously */
1166 if (rc) {
1167 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1168 IWL_ERROR("Error clearing ASSOC_MSK on current "
1169 "configuration (%d).\n", rc);
1170 return rc;
1171 }
1172 }
1173
1174 IWL_DEBUG_INFO("Sending RXON\n"
1175 "* with%s RXON_FILTER_ASSOC_MSK\n"
1176 "* channel = %d\n"
1177 "* bssid = %s\n",
1178 ((priv->staging_rxon.filter_flags &
1179 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1180 le16_to_cpu(priv->staging_rxon.channel),
1181 print_mac(mac, priv->staging_rxon.bssid_addr));
1182
1183 /* Apply the new configuration */
1184 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1185 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
1186 if (rc) {
1187 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1188 return rc;
1189 }
1190
1191 iwl4965_clear_stations_table(priv);
1192
1193 #ifdef CONFIG_IWL4965_SENSITIVITY
1194 if (!priv->error_recovering)
1195 priv->start_calib = 0;
1196
1197 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1198 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
1199 #endif /* CONFIG_IWL4965_SENSITIVITY */
1200
1201 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1202
1203 /* If we issue a new RXON command which required a tune then we must
1204 * send a new TXPOWER command or we won't be able to Tx any frames */
1205 rc = iwl4965_hw_reg_send_txpower(priv);
1206 if (rc) {
1207 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1208 return rc;
1209 }
1210
1211 /* Add the broadcast address so we can send broadcast frames */
1212 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
1213 IWL_INVALID_STATION) {
1214 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1215 return -EIO;
1216 }
1217
1218 /* If we have set the ASSOC_MSK and we are in BSS mode then
1219 * add the IWL_AP_ID to the station rate table */
1220 if (iwl4965_is_associated(priv) &&
1221 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
1222 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
1223 == IWL_INVALID_STATION) {
1224 IWL_ERROR("Error adding AP address for transmit.\n");
1225 return -EIO;
1226 }
1227 priv->assoc_station_added = 1;
1228 }
1229
1230 return 0;
1231 }
1232
1233 static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
1234 {
1235 struct iwl4965_bt_cmd bt_cmd = {
1236 .flags = 3,
1237 .lead_time = 0xAA,
1238 .max_kill = 1,
1239 .kill_ack_mask = 0,
1240 .kill_cts_mask = 0,
1241 };
1242
1243 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1244 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
1245 }
1246
1247 static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
1248 {
1249 int rc = 0;
1250 struct iwl4965_rx_packet *res;
1251 struct iwl4965_host_cmd cmd = {
1252 .id = REPLY_SCAN_ABORT_CMD,
1253 .meta.flags = CMD_WANT_SKB,
1254 };
1255
1256 /* If there isn't a scan actively going on in the hardware
1257 * then we are in between scan bands and not actually
1258 * actively scanning, so don't send the abort command */
1259 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1260 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1261 return 0;
1262 }
1263
1264 rc = iwl4965_send_cmd_sync(priv, &cmd);
1265 if (rc) {
1266 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1267 return rc;
1268 }
1269
1270 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1271 if (res->u.status != CAN_ABORT_STATUS) {
1272 /* The scan abort will return 1 for success or
1273 * 2 for "failure". A failure condition can be
1274 * due to simply not being in an active scan which
1275 * can occur if we send the scan abort before we
1276 * the microcode has notified us that a scan is
1277 * completed. */
1278 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1279 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1280 clear_bit(STATUS_SCAN_HW, &priv->status);
1281 }
1282
1283 dev_kfree_skb_any(cmd.meta.u.skb);
1284
1285 return rc;
1286 }
1287
1288 static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
1289 struct iwl4965_cmd *cmd,
1290 struct sk_buff *skb)
1291 {
1292 return 1;
1293 }
1294
1295 /*
1296 * CARD_STATE_CMD
1297 *
1298 * Use: Sets the device's internal card state to enable, disable, or halt
1299 *
1300 * When in the 'enable' state the card operates as normal.
1301 * When in the 'disable' state, the card enters into a low power mode.
1302 * When in the 'halt' state, the card is shut down and must be fully
1303 * restarted to come back on.
1304 */
1305 static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
1306 {
1307 struct iwl4965_host_cmd cmd = {
1308 .id = REPLY_CARD_STATE_CMD,
1309 .len = sizeof(u32),
1310 .data = &flags,
1311 .meta.flags = meta_flag,
1312 };
1313
1314 if (meta_flag & CMD_ASYNC)
1315 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
1316
1317 return iwl4965_send_cmd(priv, &cmd);
1318 }
1319
1320 static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
1321 struct iwl4965_cmd *cmd, struct sk_buff *skb)
1322 {
1323 struct iwl4965_rx_packet *res = NULL;
1324
1325 if (!skb) {
1326 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1327 return 1;
1328 }
1329
1330 res = (struct iwl4965_rx_packet *)skb->data;
1331 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1332 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1333 res->hdr.flags);
1334 return 1;
1335 }
1336
1337 switch (res->u.add_sta.status) {
1338 case ADD_STA_SUCCESS_MSK:
1339 break;
1340 default:
1341 break;
1342 }
1343
1344 /* We didn't cache the SKB; let the caller free it */
1345 return 1;
1346 }
1347
1348 int iwl4965_send_add_station(struct iwl4965_priv *priv,
1349 struct iwl4965_addsta_cmd *sta, u8 flags)
1350 {
1351 struct iwl4965_rx_packet *res = NULL;
1352 int rc = 0;
1353 struct iwl4965_host_cmd cmd = {
1354 .id = REPLY_ADD_STA,
1355 .len = sizeof(struct iwl4965_addsta_cmd),
1356 .meta.flags = flags,
1357 .data = sta,
1358 };
1359
1360 if (flags & CMD_ASYNC)
1361 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
1362 else
1363 cmd.meta.flags |= CMD_WANT_SKB;
1364
1365 rc = iwl4965_send_cmd(priv, &cmd);
1366
1367 if (rc || (flags & CMD_ASYNC))
1368 return rc;
1369
1370 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1371 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1372 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1373 res->hdr.flags);
1374 rc = -EIO;
1375 }
1376
1377 if (rc == 0) {
1378 switch (res->u.add_sta.status) {
1379 case ADD_STA_SUCCESS_MSK:
1380 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1381 break;
1382 default:
1383 rc = -EIO;
1384 IWL_WARNING("REPLY_ADD_STA failed\n");
1385 break;
1386 }
1387 }
1388
1389 priv->alloc_rxb_skb--;
1390 dev_kfree_skb_any(cmd.meta.u.skb);
1391
1392 return rc;
1393 }
1394
1395 static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
1396 struct ieee80211_key_conf *keyconf,
1397 u8 sta_id)
1398 {
1399 unsigned long flags;
1400 __le16 key_flags = 0;
1401
1402 switch (keyconf->alg) {
1403 case ALG_CCMP:
1404 key_flags |= STA_KEY_FLG_CCMP;
1405 key_flags |= cpu_to_le16(
1406 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1407 key_flags &= ~STA_KEY_FLG_INVALID;
1408 break;
1409 case ALG_TKIP:
1410 case ALG_WEP:
1411 default:
1412 return -EINVAL;
1413 }
1414 spin_lock_irqsave(&priv->sta_lock, flags);
1415 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1416 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1417 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1418 keyconf->keylen);
1419
1420 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1421 keyconf->keylen);
1422 priv->stations[sta_id].sta.key.key_flags = key_flags;
1423 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1424 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1425
1426 spin_unlock_irqrestore(&priv->sta_lock, flags);
1427
1428 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1429 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1430 return 0;
1431 }
1432
1433 static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
1434 {
1435 unsigned long flags;
1436
1437 spin_lock_irqsave(&priv->sta_lock, flags);
1438 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1439 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
1440 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1441 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1442 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1443 spin_unlock_irqrestore(&priv->sta_lock, flags);
1444
1445 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1446 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1447 return 0;
1448 }
1449
1450 static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
1451 {
1452 struct list_head *element;
1453
1454 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1455 priv->frames_count);
1456
1457 while (!list_empty(&priv->free_frames)) {
1458 element = priv->free_frames.next;
1459 list_del(element);
1460 kfree(list_entry(element, struct iwl4965_frame, list));
1461 priv->frames_count--;
1462 }
1463
1464 if (priv->frames_count) {
1465 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1466 priv->frames_count);
1467 priv->frames_count = 0;
1468 }
1469 }
1470
1471 static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
1472 {
1473 struct iwl4965_frame *frame;
1474 struct list_head *element;
1475 if (list_empty(&priv->free_frames)) {
1476 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1477 if (!frame) {
1478 IWL_ERROR("Could not allocate frame!\n");
1479 return NULL;
1480 }
1481
1482 priv->frames_count++;
1483 return frame;
1484 }
1485
1486 element = priv->free_frames.next;
1487 list_del(element);
1488 return list_entry(element, struct iwl4965_frame, list);
1489 }
1490
1491 static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
1492 {
1493 memset(frame, 0, sizeof(*frame));
1494 list_add(&frame->list, &priv->free_frames);
1495 }
1496
1497 unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
1498 struct ieee80211_hdr *hdr,
1499 const u8 *dest, int left)
1500 {
1501
1502 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
1503 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1504 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1505 return 0;
1506
1507 if (priv->ibss_beacon->len > left)
1508 return 0;
1509
1510 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1511
1512 return priv->ibss_beacon->len;
1513 }
1514
1515 static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
1516 {
1517 u8 i;
1518
1519 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1520 i = iwl4965_rates[i].next_ieee) {
1521 if (rate_mask & (1 << i))
1522 return iwl4965_rates[i].plcp;
1523 }
1524
1525 return IWL_RATE_INVALID;
1526 }
1527
1528 static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
1529 {
1530 struct iwl4965_frame *frame;
1531 unsigned int frame_size;
1532 int rc;
1533 u8 rate;
1534
1535 frame = iwl4965_get_free_frame(priv);
1536
1537 if (!frame) {
1538 IWL_ERROR("Could not obtain free frame buffer for beacon "
1539 "command.\n");
1540 return -ENOMEM;
1541 }
1542
1543 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1544 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
1545 0xFF0);
1546 if (rate == IWL_INVALID_RATE)
1547 rate = IWL_RATE_6M_PLCP;
1548 } else {
1549 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1550 if (rate == IWL_INVALID_RATE)
1551 rate = IWL_RATE_1M_PLCP;
1552 }
1553
1554 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
1555
1556 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1557 &frame->u.cmd[0]);
1558
1559 iwl4965_free_frame(priv, frame);
1560
1561 return rc;
1562 }
1563
1564 /******************************************************************************
1565 *
1566 * Misc. internal state and helper functions
1567 *
1568 ******************************************************************************/
1569
1570 static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
1571 {
1572 if (priv->hw_setting.shared_virt)
1573 pci_free_consistent(priv->pci_dev,
1574 sizeof(struct iwl4965_shared),
1575 priv->hw_setting.shared_virt,
1576 priv->hw_setting.shared_phys);
1577 }
1578
1579 /**
1580 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
1581 *
1582 * return : set the bit for each supported rate insert in ie
1583 */
1584 static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1585 u16 basic_rate, int *left)
1586 {
1587 u16 ret_rates = 0, bit;
1588 int i;
1589 u8 *cnt = ie;
1590 u8 *rates = ie + 1;
1591
1592 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1593 if (bit & supported_rate) {
1594 ret_rates |= bit;
1595 rates[*cnt] = iwl4965_rates[i].ieee |
1596 ((bit & basic_rate) ? 0x80 : 0x00);
1597 (*cnt)++;
1598 (*left)--;
1599 if ((*left <= 0) ||
1600 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1601 break;
1602 }
1603 }
1604
1605 return ret_rates;
1606 }
1607
1608 /**
1609 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
1610 */
1611 static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
1612 enum ieee80211_band band,
1613 struct ieee80211_mgmt *frame,
1614 int left, int is_direct)
1615 {
1616 int len = 0;
1617 u8 *pos = NULL;
1618 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
1619 #ifdef CONFIG_IWL4965_HT
1620 const struct ieee80211_supported_band *sband =
1621 iwl4965_get_hw_mode(priv, band);
1622 #endif /* CONFIG_IWL4965_HT */
1623
1624 /* Make sure there is enough space for the probe request,
1625 * two mandatory IEs and the data */
1626 left -= 24;
1627 if (left < 0)
1628 return 0;
1629 len += 24;
1630
1631 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1632 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
1633 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1634 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
1635 frame->seq_ctrl = 0;
1636
1637 /* fill in our indirect SSID IE */
1638 /* ...next IE... */
1639
1640 left -= 2;
1641 if (left < 0)
1642 return 0;
1643 len += 2;
1644 pos = &(frame->u.probe_req.variable[0]);
1645 *pos++ = WLAN_EID_SSID;
1646 *pos++ = 0;
1647
1648 /* fill in our direct SSID IE... */
1649 if (is_direct) {
1650 /* ...next IE... */
1651 left -= 2 + priv->essid_len;
1652 if (left < 0)
1653 return 0;
1654 /* ... fill it in... */
1655 *pos++ = WLAN_EID_SSID;
1656 *pos++ = priv->essid_len;
1657 memcpy(pos, priv->essid, priv->essid_len);
1658 pos += priv->essid_len;
1659 len += 2 + priv->essid_len;
1660 }
1661
1662 /* fill in supported rate */
1663 /* ...next IE... */
1664 left -= 2;
1665 if (left < 0)
1666 return 0;
1667
1668 /* ... fill it in... */
1669 *pos++ = WLAN_EID_SUPP_RATES;
1670 *pos = 0;
1671
1672 /* exclude 60M rate */
1673 active_rates = priv->rates_mask;
1674 active_rates &= ~IWL_RATE_60M_MASK;
1675
1676 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
1677
1678 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1679 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
1680 active_rate_basic, &left);
1681 active_rates &= ~ret_rates;
1682
1683 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
1684 active_rate_basic, &left);
1685 active_rates &= ~ret_rates;
1686
1687 len += 2 + *pos;
1688 pos += (*pos) + 1;
1689 if (active_rates == 0)
1690 goto fill_end;
1691
1692 /* fill in supported extended rate */
1693 /* ...next IE... */
1694 left -= 2;
1695 if (left < 0)
1696 return 0;
1697 /* ... fill it in... */
1698 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1699 *pos = 0;
1700 iwl4965_supported_rate_to_ie(pos, active_rates,
1701 active_rate_basic, &left);
1702 if (*pos > 0)
1703 len += 2 + *pos;
1704
1705 #ifdef CONFIG_IWL4965_HT
1706 if (sband && sband->ht_info.ht_supported) {
1707 struct ieee80211_ht_cap *ht_cap;
1708 pos += (*pos) + 1;
1709 *pos++ = WLAN_EID_HT_CAPABILITY;
1710 *pos++ = sizeof(struct ieee80211_ht_cap);
1711 ht_cap = (struct ieee80211_ht_cap *)pos;
1712 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
1713 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
1714 ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
1715 IEEE80211_HT_CAP_AMPDU_FACTOR) |
1716 ((sband->ht_info.ampdu_density << 2) &
1717 IEEE80211_HT_CAP_AMPDU_DENSITY);
1718 len += 2 + sizeof(struct ieee80211_ht_cap);
1719 }
1720 #endif /*CONFIG_IWL4965_HT */
1721
1722 fill_end:
1723 return (u16)len;
1724 }
1725
1726 /*
1727 * QoS support
1728 */
1729 static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
1730 struct iwl4965_qosparam_cmd *qos)
1731 {
1732
1733 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1734 sizeof(struct iwl4965_qosparam_cmd), qos);
1735 }
1736
1737 static void iwl4965_reset_qos(struct iwl4965_priv *priv)
1738 {
1739 u16 cw_min = 15;
1740 u16 cw_max = 1023;
1741 u8 aifs = 2;
1742 u8 is_legacy = 0;
1743 unsigned long flags;
1744 int i;
1745
1746 spin_lock_irqsave(&priv->lock, flags);
1747 priv->qos_data.qos_active = 0;
1748
1749 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1750 if (priv->qos_data.qos_enable)
1751 priv->qos_data.qos_active = 1;
1752 if (!(priv->active_rate & 0xfff0)) {
1753 cw_min = 31;
1754 is_legacy = 1;
1755 }
1756 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1757 if (priv->qos_data.qos_enable)
1758 priv->qos_data.qos_active = 1;
1759 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1760 cw_min = 31;
1761 is_legacy = 1;
1762 }
1763
1764 if (priv->qos_data.qos_active)
1765 aifs = 3;
1766
1767 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1768 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1769 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1770 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1771 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1772
1773 if (priv->qos_data.qos_active) {
1774 i = 1;
1775 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1776 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1777 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1778 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1779 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1780
1781 i = 2;
1782 priv->qos_data.def_qos_parm.ac[i].cw_min =
1783 cpu_to_le16((cw_min + 1) / 2 - 1);
1784 priv->qos_data.def_qos_parm.ac[i].cw_max =
1785 cpu_to_le16(cw_max);
1786 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1787 if (is_legacy)
1788 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1789 cpu_to_le16(6016);
1790 else
1791 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1792 cpu_to_le16(3008);
1793 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1794
1795 i = 3;
1796 priv->qos_data.def_qos_parm.ac[i].cw_min =
1797 cpu_to_le16((cw_min + 1) / 4 - 1);
1798 priv->qos_data.def_qos_parm.ac[i].cw_max =
1799 cpu_to_le16((cw_max + 1) / 2 - 1);
1800 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1801 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1802 if (is_legacy)
1803 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1804 cpu_to_le16(3264);
1805 else
1806 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1807 cpu_to_le16(1504);
1808 } else {
1809 for (i = 1; i < 4; i++) {
1810 priv->qos_data.def_qos_parm.ac[i].cw_min =
1811 cpu_to_le16(cw_min);
1812 priv->qos_data.def_qos_parm.ac[i].cw_max =
1813 cpu_to_le16(cw_max);
1814 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1815 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1816 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1817 }
1818 }
1819 IWL_DEBUG_QOS("set QoS to default \n");
1820
1821 spin_unlock_irqrestore(&priv->lock, flags);
1822 }
1823
1824 static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
1825 {
1826 unsigned long flags;
1827
1828 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1829 return;
1830
1831 if (!priv->qos_data.qos_enable)
1832 return;
1833
1834 spin_lock_irqsave(&priv->lock, flags);
1835 priv->qos_data.def_qos_parm.qos_flags = 0;
1836
1837 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1838 !priv->qos_data.qos_cap.q_AP.txop_request)
1839 priv->qos_data.def_qos_parm.qos_flags |=
1840 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1841 if (priv->qos_data.qos_active)
1842 priv->qos_data.def_qos_parm.qos_flags |=
1843 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1844
1845 #ifdef CONFIG_IWL4965_HT
1846 if (priv->current_ht_config.is_ht)
1847 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
1848 #endif /* CONFIG_IWL4965_HT */
1849
1850 spin_unlock_irqrestore(&priv->lock, flags);
1851
1852 if (force || iwl4965_is_associated(priv)) {
1853 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
1854 priv->qos_data.qos_active,
1855 priv->qos_data.def_qos_parm.qos_flags);
1856
1857 iwl4965_send_qos_params_command(priv,
1858 &(priv->qos_data.def_qos_parm));
1859 }
1860 }
1861
1862 /*
1863 * Power management (not Tx power!) functions
1864 */
1865 #define MSEC_TO_USEC 1024
1866
1867 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1868 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1869 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1870 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1871 __constant_cpu_to_le32(X1), \
1872 __constant_cpu_to_le32(X2), \
1873 __constant_cpu_to_le32(X3), \
1874 __constant_cpu_to_le32(X4)}
1875
1876
1877 /* default power management (not Tx power) table values */
1878 /* for tim 0-10 */
1879 static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
1880 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1881 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1882 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1883 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1884 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1885 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1886 };
1887
1888 /* for tim > 10 */
1889 static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
1890 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1891 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1892 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1893 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1894 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1895 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1896 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1897 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1898 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1899 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1900 };
1901
1902 int iwl4965_power_init_handle(struct iwl4965_priv *priv)
1903 {
1904 int rc = 0, i;
1905 struct iwl4965_power_mgr *pow_data;
1906 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
1907 u16 pci_pm;
1908
1909 IWL_DEBUG_POWER("Initialize power \n");
1910
1911 pow_data = &(priv->power_data);
1912
1913 memset(pow_data, 0, sizeof(*pow_data));
1914
1915 pow_data->active_index = IWL_POWER_RANGE_0;
1916 pow_data->dtim_val = 0xffff;
1917
1918 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1919 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1920
1921 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1922 if (rc != 0)
1923 return 0;
1924 else {
1925 struct iwl4965_powertable_cmd *cmd;
1926
1927 IWL_DEBUG_POWER("adjust power command flags\n");
1928
1929 for (i = 0; i < IWL_POWER_AC; i++) {
1930 cmd = &pow_data->pwr_range_0[i].cmd;
1931
1932 if (pci_pm & 0x1)
1933 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1934 else
1935 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1936 }
1937 }
1938 return rc;
1939 }
1940
1941 static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
1942 struct iwl4965_powertable_cmd *cmd, u32 mode)
1943 {
1944 int rc = 0, i;
1945 u8 skip;
1946 u32 max_sleep = 0;
1947 struct iwl4965_power_vec_entry *range;
1948 u8 period = 0;
1949 struct iwl4965_power_mgr *pow_data;
1950
1951 if (mode > IWL_POWER_INDEX_5) {
1952 IWL_DEBUG_POWER("Error invalid power mode \n");
1953 return -1;
1954 }
1955 pow_data = &(priv->power_data);
1956
1957 if (pow_data->active_index == IWL_POWER_RANGE_0)
1958 range = &pow_data->pwr_range_0[0];
1959 else
1960 range = &pow_data->pwr_range_1[1];
1961
1962 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
1963
1964 #ifdef IWL_MAC80211_DISABLE
1965 if (priv->assoc_network != NULL) {
1966 unsigned long flags;
1967
1968 period = priv->assoc_network->tim.tim_period;
1969 }
1970 #endif /*IWL_MAC80211_DISABLE */
1971 skip = range[mode].no_dtim;
1972
1973 if (period == 0) {
1974 period = 1;
1975 skip = 0;
1976 }
1977
1978 if (skip == 0) {
1979 max_sleep = period;
1980 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1981 } else {
1982 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1983 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1984 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1985 }
1986
1987 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1988 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1989 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1990 }
1991
1992 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1993 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1994 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1995 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1996 le32_to_cpu(cmd->sleep_interval[0]),
1997 le32_to_cpu(cmd->sleep_interval[1]),
1998 le32_to_cpu(cmd->sleep_interval[2]),
1999 le32_to_cpu(cmd->sleep_interval[3]),
2000 le32_to_cpu(cmd->sleep_interval[4]));
2001
2002 return rc;
2003 }
2004
2005 static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
2006 {
2007 u32 uninitialized_var(final_mode);
2008 int rc;
2009 struct iwl4965_powertable_cmd cmd;
2010
2011 /* If on battery, set to 3,
2012 * if plugged into AC power, set to CAM ("continuously aware mode"),
2013 * else user level */
2014 switch (mode) {
2015 case IWL_POWER_BATTERY:
2016 final_mode = IWL_POWER_INDEX_3;
2017 break;
2018 case IWL_POWER_AC:
2019 final_mode = IWL_POWER_MODE_CAM;
2020 break;
2021 default:
2022 final_mode = mode;
2023 break;
2024 }
2025
2026 cmd.keep_alive_beacons = 0;
2027
2028 iwl4965_update_power_cmd(priv, &cmd, final_mode);
2029
2030 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2031
2032 if (final_mode == IWL_POWER_MODE_CAM)
2033 clear_bit(STATUS_POWER_PMI, &priv->status);
2034 else
2035 set_bit(STATUS_POWER_PMI, &priv->status);
2036
2037 return rc;
2038 }
2039
2040 int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
2041 {
2042 /* Filter incoming packets to determine if they are targeted toward
2043 * this network, discarding packets coming from ourselves */
2044 switch (priv->iw_mode) {
2045 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2046 /* packets from our adapter are dropped (echo) */
2047 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2048 return 0;
2049 /* {broad,multi}cast packets to our IBSS go through */
2050 if (is_multicast_ether_addr(header->addr1))
2051 return !compare_ether_addr(header->addr3, priv->bssid);
2052 /* packets to our adapter go through */
2053 return !compare_ether_addr(header->addr1, priv->mac_addr);
2054 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2055 /* packets from our adapter are dropped (echo) */
2056 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2057 return 0;
2058 /* {broad,multi}cast packets to our BSS go through */
2059 if (is_multicast_ether_addr(header->addr1))
2060 return !compare_ether_addr(header->addr2, priv->bssid);
2061 /* packets to our adapter go through */
2062 return !compare_ether_addr(header->addr1, priv->mac_addr);
2063 }
2064
2065 return 1;
2066 }
2067
2068 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2069
2070 static const char *iwl4965_get_tx_fail_reason(u32 status)
2071 {
2072 switch (status & TX_STATUS_MSK) {
2073 case TX_STATUS_SUCCESS:
2074 return "SUCCESS";
2075 TX_STATUS_ENTRY(SHORT_LIMIT);
2076 TX_STATUS_ENTRY(LONG_LIMIT);
2077 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2078 TX_STATUS_ENTRY(MGMNT_ABORT);
2079 TX_STATUS_ENTRY(NEXT_FRAG);
2080 TX_STATUS_ENTRY(LIFE_EXPIRE);
2081 TX_STATUS_ENTRY(DEST_PS);
2082 TX_STATUS_ENTRY(ABORTED);
2083 TX_STATUS_ENTRY(BT_RETRY);
2084 TX_STATUS_ENTRY(STA_INVALID);
2085 TX_STATUS_ENTRY(FRAG_DROPPED);
2086 TX_STATUS_ENTRY(TID_DISABLE);
2087 TX_STATUS_ENTRY(FRAME_FLUSHED);
2088 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2089 TX_STATUS_ENTRY(TX_LOCKED);
2090 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2091 }
2092
2093 return "UNKNOWN";
2094 }
2095
2096 /**
2097 * iwl4965_scan_cancel - Cancel any currently executing HW scan
2098 *
2099 * NOTE: priv->mutex is not required before calling this function
2100 */
2101 static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
2102 {
2103 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2104 clear_bit(STATUS_SCANNING, &priv->status);
2105 return 0;
2106 }
2107
2108 if (test_bit(STATUS_SCANNING, &priv->status)) {
2109 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2110 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2111 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2112 queue_work(priv->workqueue, &priv->abort_scan);
2113
2114 } else
2115 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2116
2117 return test_bit(STATUS_SCANNING, &priv->status);
2118 }
2119
2120 return 0;
2121 }
2122
2123 /**
2124 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
2125 * @ms: amount of time to wait (in milliseconds) for scan to abort
2126 *
2127 * NOTE: priv->mutex must be held before calling this function
2128 */
2129 static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
2130 {
2131 unsigned long now = jiffies;
2132 int ret;
2133
2134 ret = iwl4965_scan_cancel(priv);
2135 if (ret && ms) {
2136 mutex_unlock(&priv->mutex);
2137 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2138 test_bit(STATUS_SCANNING, &priv->status))
2139 msleep(1);
2140 mutex_lock(&priv->mutex);
2141
2142 return test_bit(STATUS_SCANNING, &priv->status);
2143 }
2144
2145 return ret;
2146 }
2147
2148 static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
2149 {
2150 /* Reset ieee stats */
2151
2152 /* We don't reset the net_device_stats (ieee->stats) on
2153 * re-association */
2154
2155 priv->last_seq_num = -1;
2156 priv->last_frag_num = -1;
2157 priv->last_packet_time = 0;
2158
2159 iwl4965_scan_cancel(priv);
2160 }
2161
2162 #define MAX_UCODE_BEACON_INTERVAL 4096
2163 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2164
2165 static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
2166 {
2167 u16 new_val = 0;
2168 u16 beacon_factor = 0;
2169
2170 beacon_factor =
2171 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2172 / MAX_UCODE_BEACON_INTERVAL;
2173 new_val = beacon_val / beacon_factor;
2174
2175 return cpu_to_le16(new_val);
2176 }
2177
2178 static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
2179 {
2180 u64 interval_tm_unit;
2181 u64 tsf, result;
2182 unsigned long flags;
2183 struct ieee80211_conf *conf = NULL;
2184 u16 beacon_int = 0;
2185
2186 conf = ieee80211_get_hw_conf(priv->hw);
2187
2188 spin_lock_irqsave(&priv->lock, flags);
2189 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2190 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2191
2192 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2193
2194 tsf = priv->timestamp1;
2195 tsf = ((tsf << 32) | priv->timestamp0);
2196
2197 beacon_int = priv->beacon_int;
2198 spin_unlock_irqrestore(&priv->lock, flags);
2199
2200 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2201 if (beacon_int == 0) {
2202 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2203 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2204 } else {
2205 priv->rxon_timing.beacon_interval =
2206 cpu_to_le16(beacon_int);
2207 priv->rxon_timing.beacon_interval =
2208 iwl4965_adjust_beacon_interval(
2209 le16_to_cpu(priv->rxon_timing.beacon_interval));
2210 }
2211
2212 priv->rxon_timing.atim_window = 0;
2213 } else {
2214 priv->rxon_timing.beacon_interval =
2215 iwl4965_adjust_beacon_interval(conf->beacon_int);
2216 /* TODO: we need to get atim_window from upper stack
2217 * for now we set to 0 */
2218 priv->rxon_timing.atim_window = 0;
2219 }
2220
2221 interval_tm_unit =
2222 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2223 result = do_div(tsf, interval_tm_unit);
2224 priv->rxon_timing.beacon_init_val =
2225 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2226
2227 IWL_DEBUG_ASSOC
2228 ("beacon interval %d beacon timer %d beacon tim %d\n",
2229 le16_to_cpu(priv->rxon_timing.beacon_interval),
2230 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2231 le16_to_cpu(priv->rxon_timing.atim_window));
2232 }
2233
2234 static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
2235 {
2236 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2237 IWL_ERROR("APs don't scan.\n");
2238 return 0;
2239 }
2240
2241 if (!iwl4965_is_ready_rf(priv)) {
2242 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2243 return -EIO;
2244 }
2245
2246 if (test_bit(STATUS_SCANNING, &priv->status)) {
2247 IWL_DEBUG_SCAN("Scan already in progress.\n");
2248 return -EAGAIN;
2249 }
2250
2251 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2252 IWL_DEBUG_SCAN("Scan request while abort pending. "
2253 "Queuing.\n");
2254 return -EAGAIN;
2255 }
2256
2257 IWL_DEBUG_INFO("Starting scan...\n");
2258 priv->scan_bands = 2;
2259 set_bit(STATUS_SCANNING, &priv->status);
2260 priv->scan_start = jiffies;
2261 priv->scan_pass_start = priv->scan_start;
2262
2263 queue_work(priv->workqueue, &priv->request_scan);
2264
2265 return 0;
2266 }
2267
2268 static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
2269 {
2270 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
2271
2272 if (hw_decrypt)
2273 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2274 else
2275 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2276
2277 return 0;
2278 }
2279
2280 static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
2281 enum ieee80211_band band)
2282 {
2283 if (band == IEEE80211_BAND_5GHZ) {
2284 priv->staging_rxon.flags &=
2285 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2286 | RXON_FLG_CCK_MSK);
2287 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2288 } else {
2289 /* Copied from iwl4965_bg_post_associate() */
2290 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2291 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2292 else
2293 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2294
2295 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2296 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2297
2298 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2299 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2300 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2301 }
2302 }
2303
2304 /*
2305 * initialize rxon structure with default values from eeprom
2306 */
2307 static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
2308 {
2309 const struct iwl4965_channel_info *ch_info;
2310
2311 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2312
2313 switch (priv->iw_mode) {
2314 case IEEE80211_IF_TYPE_AP:
2315 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2316 break;
2317
2318 case IEEE80211_IF_TYPE_STA:
2319 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2320 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2321 break;
2322
2323 case IEEE80211_IF_TYPE_IBSS:
2324 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2325 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2326 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2327 RXON_FILTER_ACCEPT_GRP_MSK;
2328 break;
2329
2330 case IEEE80211_IF_TYPE_MNTR:
2331 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2332 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2333 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2334 break;
2335 }
2336
2337 #if 0
2338 /* TODO: Figure out when short_preamble would be set and cache from
2339 * that */
2340 if (!hw_to_local(priv->hw)->short_preamble)
2341 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2342 else
2343 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2344 #endif
2345
2346 ch_info = iwl4965_get_channel_info(priv, priv->band,
2347 le16_to_cpu(priv->staging_rxon.channel));
2348
2349 if (!ch_info)
2350 ch_info = &priv->channel_info[0];
2351
2352 /*
2353 * in some case A channels are all non IBSS
2354 * in this case force B/G channel
2355 */
2356 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2357 !(is_channel_ibss(ch_info)))
2358 ch_info = &priv->channel_info[0];
2359
2360 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2361 priv->band = ch_info->band;
2362
2363 iwl4965_set_flags_for_phymode(priv, priv->band);
2364
2365 priv->staging_rxon.ofdm_basic_rates =
2366 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2367 priv->staging_rxon.cck_basic_rates =
2368 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2369
2370 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2371 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2372 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2373 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2374 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2375 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2376 iwl4965_set_rxon_chain(priv);
2377 }
2378
2379 static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
2380 {
2381 if (mode == IEEE80211_IF_TYPE_IBSS) {
2382 const struct iwl4965_channel_info *ch_info;
2383
2384 ch_info = iwl4965_get_channel_info(priv,
2385 priv->band,
2386 le16_to_cpu(priv->staging_rxon.channel));
2387
2388 if (!ch_info || !is_channel_ibss(ch_info)) {
2389 IWL_ERROR("channel %d not IBSS channel\n",
2390 le16_to_cpu(priv->staging_rxon.channel));
2391 return -EINVAL;
2392 }
2393 }
2394
2395 priv->iw_mode = mode;
2396
2397 iwl4965_connection_init_rx_config(priv);
2398 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2399
2400 iwl4965_clear_stations_table(priv);
2401
2402 /* dont commit rxon if rf-kill is on*/
2403 if (!iwl4965_is_ready_rf(priv))
2404 return -EAGAIN;
2405
2406 cancel_delayed_work(&priv->scan_check);
2407 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2408 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2409 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2410 return -EAGAIN;
2411 }
2412
2413 iwl4965_commit_rxon(priv);
2414
2415 return 0;
2416 }
2417
2418 static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
2419 struct ieee80211_tx_control *ctl,
2420 struct iwl4965_cmd *cmd,
2421 struct sk_buff *skb_frag,
2422 int last_frag)
2423 {
2424 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2425
2426 switch (keyinfo->alg) {
2427 case ALG_CCMP:
2428 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2429 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2430 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2431 break;
2432
2433 case ALG_TKIP:
2434 #if 0
2435 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2436
2437 if (last_frag)
2438 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2439 8);
2440 else
2441 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2442 #endif
2443 break;
2444
2445 case ALG_WEP:
2446 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2447 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2448
2449 if (keyinfo->keylen == 13)
2450 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2451
2452 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2453
2454 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2455 "with key %d\n", ctl->key_idx);
2456 break;
2457
2458 default:
2459 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2460 break;
2461 }
2462 }
2463
2464 /*
2465 * handle build REPLY_TX command notification.
2466 */
2467 static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
2468 struct iwl4965_cmd *cmd,
2469 struct ieee80211_tx_control *ctrl,
2470 struct ieee80211_hdr *hdr,
2471 int is_unicast, u8 std_id)
2472 {
2473 __le16 *qc;
2474 u16 fc = le16_to_cpu(hdr->frame_control);
2475 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2476
2477 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2478 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2479 tx_flags |= TX_CMD_FLG_ACK_MSK;
2480 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2481 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2482 if (ieee80211_is_probe_response(fc) &&
2483 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2484 tx_flags |= TX_CMD_FLG_TSF_MSK;
2485 } else {
2486 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2487 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2488 }
2489
2490 if (ieee80211_is_back_request(fc))
2491 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2492
2493
2494 cmd->cmd.tx.sta_id = std_id;
2495 if (ieee80211_get_morefrag(hdr))
2496 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2497
2498 qc = ieee80211_get_qos_ctrl(hdr);
2499 if (qc) {
2500 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2501 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2502 } else
2503 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2504
2505 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2506 tx_flags |= TX_CMD_FLG_RTS_MSK;
2507 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2508 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2509 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2510 tx_flags |= TX_CMD_FLG_CTS_MSK;
2511 }
2512
2513 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2514 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2515
2516 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2517 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2518 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2519 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2520 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2521 else
2522 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2523 } else
2524 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2525
2526 cmd->cmd.tx.driver_txop = 0;
2527 cmd->cmd.tx.tx_flags = tx_flags;
2528 cmd->cmd.tx.next_frame_len = 0;
2529 }
2530
2531 /**
2532 * iwl4965_get_sta_id - Find station's index within station table
2533 *
2534 * If new IBSS station, create new entry in station table
2535 */
2536 static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
2537 struct ieee80211_hdr *hdr)
2538 {
2539 int sta_id;
2540 u16 fc = le16_to_cpu(hdr->frame_control);
2541 DECLARE_MAC_BUF(mac);
2542
2543 /* If this frame is broadcast or management, use broadcast station id */
2544 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2545 is_multicast_ether_addr(hdr->addr1))
2546 return priv->hw_setting.bcast_sta_id;
2547
2548 switch (priv->iw_mode) {
2549
2550 /* If we are a client station in a BSS network, use the special
2551 * AP station entry (that's the only station we communicate with) */
2552 case IEEE80211_IF_TYPE_STA:
2553 return IWL_AP_ID;
2554
2555 /* If we are an AP, then find the station, or use BCAST */
2556 case IEEE80211_IF_TYPE_AP:
2557 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
2558 if (sta_id != IWL_INVALID_STATION)
2559 return sta_id;
2560 return priv->hw_setting.bcast_sta_id;
2561
2562 /* If this frame is going out to an IBSS network, find the station,
2563 * or create a new station table entry */
2564 case IEEE80211_IF_TYPE_IBSS:
2565 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
2566 if (sta_id != IWL_INVALID_STATION)
2567 return sta_id;
2568
2569 /* Create new station table entry */
2570 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2571 0, CMD_ASYNC, NULL);
2572
2573 if (sta_id != IWL_INVALID_STATION)
2574 return sta_id;
2575
2576 IWL_DEBUG_DROP("Station %s not in station map. "
2577 "Defaulting to broadcast...\n",
2578 print_mac(mac, hdr->addr1));
2579 iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2580 return priv->hw_setting.bcast_sta_id;
2581
2582 default:
2583 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2584 return priv->hw_setting.bcast_sta_id;
2585 }
2586 }
2587
2588 /*
2589 * start REPLY_TX command process
2590 */
2591 static int iwl4965_tx_skb(struct iwl4965_priv *priv,
2592 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2593 {
2594 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2595 struct iwl4965_tfd_frame *tfd;
2596 u32 *control_flags;
2597 int txq_id = ctl->queue;
2598 struct iwl4965_tx_queue *txq = NULL;
2599 struct iwl4965_queue *q = NULL;
2600 dma_addr_t phys_addr;
2601 dma_addr_t txcmd_phys;
2602 dma_addr_t scratch_phys;
2603 struct iwl4965_cmd *out_cmd = NULL;
2604 u16 len, idx, len_org;
2605 u8 id, hdr_len, unicast;
2606 u8 sta_id;
2607 u16 seq_number = 0;
2608 u16 fc;
2609 __le16 *qc;
2610 u8 wait_write_ptr = 0;
2611 unsigned long flags;
2612 int rc;
2613
2614 spin_lock_irqsave(&priv->lock, flags);
2615 if (iwl4965_is_rfkill(priv)) {
2616 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2617 goto drop_unlock;
2618 }
2619
2620 if (!priv->vif) {
2621 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
2622 goto drop_unlock;
2623 }
2624
2625 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
2626 IWL_ERROR("ERROR: No TX rate available.\n");
2627 goto drop_unlock;
2628 }
2629
2630 unicast = !is_multicast_ether_addr(hdr->addr1);
2631 id = 0;
2632
2633 fc = le16_to_cpu(hdr->frame_control);
2634
2635 #ifdef CONFIG_IWL4965_DEBUG
2636 if (ieee80211_is_auth(fc))
2637 IWL_DEBUG_TX("Sending AUTH frame\n");
2638 else if (ieee80211_is_assoc_request(fc))
2639 IWL_DEBUG_TX("Sending ASSOC frame\n");
2640 else if (ieee80211_is_reassoc_request(fc))
2641 IWL_DEBUG_TX("Sending REASSOC frame\n");
2642 #endif
2643
2644 /* drop all data frame if we are not associated */
2645 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
2646 (!iwl4965_is_associated(priv) ||
2647 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
2648 !priv->assoc_station_added)) {
2649 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
2650 goto drop_unlock;
2651 }
2652
2653 spin_unlock_irqrestore(&priv->lock, flags);
2654
2655 hdr_len = ieee80211_get_hdrlen(fc);
2656
2657 /* Find (or create) index into station table for destination station */
2658 sta_id = iwl4965_get_sta_id(priv, hdr);
2659 if (sta_id == IWL_INVALID_STATION) {
2660 DECLARE_MAC_BUF(mac);
2661
2662 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2663 print_mac(mac, hdr->addr1));
2664 goto drop;
2665 }
2666
2667 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2668
2669 qc = ieee80211_get_qos_ctrl(hdr);
2670 if (qc) {
2671 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2672 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2673 IEEE80211_SCTL_SEQ;
2674 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2675 (hdr->seq_ctrl &
2676 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2677 seq_number += 0x10;
2678 #ifdef CONFIG_IWL4965_HT
2679 /* aggregation is on for this <sta,tid> */
2680 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
2681 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
2682 priv->stations[sta_id].tid[tid].tfds_in_queue++;
2683 #endif /* CONFIG_IWL4965_HT */
2684 }
2685
2686 /* Descriptor for chosen Tx queue */
2687 txq = &priv->txq[txq_id];
2688 q = &txq->q;
2689
2690 spin_lock_irqsave(&priv->lock, flags);
2691
2692 /* Set up first empty TFD within this queue's circular TFD buffer */
2693 tfd = &txq->bd[q->write_ptr];
2694 memset(tfd, 0, sizeof(*tfd));
2695 control_flags = (u32 *) tfd;
2696 idx = get_cmd_index(q, q->write_ptr, 0);
2697
2698 /* Set up driver data for this TFD */
2699 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
2700 txq->txb[q->write_ptr].skb[0] = skb;
2701 memcpy(&(txq->txb[q->write_ptr].status.control),
2702 ctl, sizeof(struct ieee80211_tx_control));
2703
2704 /* Set up first empty entry in queue's array of Tx/cmd buffers */
2705 out_cmd = &txq->cmd[idx];
2706 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2707 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2708
2709 /*
2710 * Set up the Tx-command (not MAC!) header.
2711 * Store the chosen Tx queue and TFD index within the sequence field;
2712 * after Tx, uCode's Tx response will return this value so driver can
2713 * locate the frame within the tx queue and do post-tx processing.
2714 */
2715 out_cmd->hdr.cmd = REPLY_TX;
2716 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2717 INDEX_TO_SEQ(q->write_ptr)));
2718
2719 /* Copy MAC header from skb into command buffer */
2720 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2721
2722 /*
2723 * Use the first empty entry in this queue's command buffer array
2724 * to contain the Tx command and MAC header concatenated together
2725 * (payload data will be in another buffer).
2726 * Size of this varies, due to varying MAC header length.
2727 * If end is not dword aligned, we'll have 2 extra bytes at the end
2728 * of the MAC header (device reads on dword boundaries).
2729 * We'll tell device about this padding later.
2730 */
2731 len = priv->hw_setting.tx_cmd_len +
2732 sizeof(struct iwl4965_cmd_header) + hdr_len;
2733
2734 len_org = len;
2735 len = (len + 3) & ~3;
2736
2737 if (len_org != len)
2738 len_org = 1;
2739 else
2740 len_org = 0;
2741
2742 /* Physical address of this Tx command's header (not MAC header!),
2743 * within command buffer array. */
2744 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
2745 offsetof(struct iwl4965_cmd, hdr);
2746
2747 /* Add buffer containing Tx command and MAC(!) header to TFD's
2748 * first entry */
2749 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2750
2751 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
2752 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
2753
2754 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2755 * if any (802.11 null frames have no payload). */
2756 len = skb->len - hdr_len;
2757 if (len) {
2758 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2759 len, PCI_DMA_TODEVICE);
2760 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2761 }
2762
2763 /* Tell 4965 about any 2-byte padding after MAC header */
2764 if (len_org)
2765 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
2766
2767 /* Total # bytes to be transmitted */
2768 len = (u16)skb->len;
2769 out_cmd->cmd.tx.len = cpu_to_le16(len);
2770
2771 /* TODO need this for burst mode later on */
2772 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
2773
2774 /* set is_hcca to 0; it probably will never be implemented */
2775 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
2776
2777 scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
2778 offsetof(struct iwl4965_tx_cmd, scratch);
2779 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
2780 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
2781
2782 if (!ieee80211_get_morefrag(hdr)) {
2783 txq->need_update = 1;
2784 if (qc) {
2785 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2786 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2787 }
2788 } else {
2789 wait_write_ptr = 1;
2790 txq->need_update = 0;
2791 }
2792
2793 iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2794 sizeof(out_cmd->cmd.tx));
2795
2796 iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2797 ieee80211_get_hdrlen(fc));
2798
2799 /* Set up entry for this TFD in Tx byte-count array */
2800 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
2801
2802 /* Tell device the write index *just past* this latest filled TFD */
2803 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2804 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
2805 spin_unlock_irqrestore(&priv->lock, flags);
2806
2807 if (rc)
2808 return rc;
2809
2810 if ((iwl4965_queue_space(q) < q->high_mark)
2811 && priv->mac80211_registered) {
2812 if (wait_write_ptr) {
2813 spin_lock_irqsave(&priv->lock, flags);
2814 txq->need_update = 1;
2815 iwl4965_tx_queue_update_write_ptr(priv, txq);
2816 spin_unlock_irqrestore(&priv->lock, flags);
2817 }
2818
2819 ieee80211_stop_queue(priv->hw, ctl->queue);
2820 }
2821
2822 return 0;
2823
2824 drop_unlock:
2825 spin_unlock_irqrestore(&priv->lock, flags);
2826 drop:
2827 return -1;
2828 }
2829
2830 static void iwl4965_set_rate(struct iwl4965_priv *priv)
2831 {
2832 const struct ieee80211_supported_band *hw = NULL;
2833 struct ieee80211_rate *rate;
2834 int i;
2835
2836 hw = iwl4965_get_hw_mode(priv, priv->band);
2837 if (!hw) {
2838 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2839 return;
2840 }
2841
2842 priv->active_rate = 0;
2843 priv->active_rate_basic = 0;
2844
2845 for (i = 0; i < hw->n_bitrates; i++) {
2846 rate = &(hw->bitrates[i]);
2847 if (rate->hw_value < IWL_RATE_COUNT)
2848 priv->active_rate |= (1 << rate->hw_value);
2849 }
2850
2851 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2852 priv->active_rate, priv->active_rate_basic);
2853
2854 /*
2855 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2856 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2857 * OFDM
2858 */
2859 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2860 priv->staging_rxon.cck_basic_rates =
2861 ((priv->active_rate_basic &
2862 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2863 else
2864 priv->staging_rxon.cck_basic_rates =
2865 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2866
2867 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2868 priv->staging_rxon.ofdm_basic_rates =
2869 ((priv->active_rate_basic &
2870 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2871 IWL_FIRST_OFDM_RATE) & 0xFF;
2872 else
2873 priv->staging_rxon.ofdm_basic_rates =
2874 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2875 }
2876
2877 static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
2878 {
2879 unsigned long flags;
2880
2881 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2882 return;
2883
2884 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2885 disable_radio ? "OFF" : "ON");
2886
2887 if (disable_radio) {
2888 iwl4965_scan_cancel(priv);
2889 /* FIXME: This is a workaround for AP */
2890 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2891 spin_lock_irqsave(&priv->lock, flags);
2892 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
2893 CSR_UCODE_SW_BIT_RFKILL);
2894 spin_unlock_irqrestore(&priv->lock, flags);
2895 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2896 set_bit(STATUS_RF_KILL_SW, &priv->status);
2897 }
2898 return;
2899 }
2900
2901 spin_lock_irqsave(&priv->lock, flags);
2902 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2903
2904 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2905 spin_unlock_irqrestore(&priv->lock, flags);
2906
2907 /* wake up ucode */
2908 msleep(10);
2909
2910 spin_lock_irqsave(&priv->lock, flags);
2911 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
2912 if (!iwl4965_grab_nic_access(priv))
2913 iwl4965_release_nic_access(priv);
2914 spin_unlock_irqrestore(&priv->lock, flags);
2915
2916 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2917 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2918 "disabled by HW switch\n");
2919 return;
2920 }
2921
2922 queue_work(priv->workqueue, &priv->restart);
2923 return;
2924 }
2925
2926 void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
2927 u32 decrypt_res, struct ieee80211_rx_status *stats)
2928 {
2929 u16 fc =
2930 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2931
2932 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2933 return;
2934
2935 if (!(fc & IEEE80211_FCTL_PROTECTED))
2936 return;
2937
2938 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2939 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2940 case RX_RES_STATUS_SEC_TYPE_TKIP:
2941 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2942 RX_RES_STATUS_BAD_ICV_MIC)
2943 stats->flag |= RX_FLAG_MMIC_ERROR;
2944 case RX_RES_STATUS_SEC_TYPE_WEP:
2945 case RX_RES_STATUS_SEC_TYPE_CCMP:
2946 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2947 RX_RES_STATUS_DECRYPT_OK) {
2948 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2949 stats->flag |= RX_FLAG_DECRYPTED;
2950 }
2951 break;
2952
2953 default:
2954 break;
2955 }
2956 }
2957
2958
2959 #define IWL_PACKET_RETRY_TIME HZ
2960
2961 int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
2962 {
2963 u16 sc = le16_to_cpu(header->seq_ctrl);
2964 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2965 u16 frag = sc & IEEE80211_SCTL_FRAG;
2966 u16 *last_seq, *last_frag;
2967 unsigned long *last_time;
2968
2969 switch (priv->iw_mode) {
2970 case IEEE80211_IF_TYPE_IBSS:{
2971 struct list_head *p;
2972 struct iwl4965_ibss_seq *entry = NULL;
2973 u8 *mac = header->addr2;
2974 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2975
2976 __list_for_each(p, &priv->ibss_mac_hash[index]) {
2977 entry = list_entry(p, struct iwl4965_ibss_seq, list);
2978 if (!compare_ether_addr(entry->mac, mac))
2979 break;
2980 }
2981 if (p == &priv->ibss_mac_hash[index]) {
2982 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2983 if (!entry) {
2984 IWL_ERROR("Cannot malloc new mac entry\n");
2985 return 0;
2986 }
2987 memcpy(entry->mac, mac, ETH_ALEN);
2988 entry->seq_num = seq;
2989 entry->frag_num = frag;
2990 entry->packet_time = jiffies;
2991 list_add(&entry->list, &priv->ibss_mac_hash[index]);
2992 return 0;
2993 }
2994 last_seq = &entry->seq_num;
2995 last_frag = &entry->frag_num;
2996 last_time = &entry->packet_time;
2997 break;
2998 }
2999 case IEEE80211_IF_TYPE_STA:
3000 last_seq = &priv->last_seq_num;
3001 last_frag = &priv->last_frag_num;
3002 last_time = &priv->last_packet_time;
3003 break;
3004 default:
3005 return 0;
3006 }
3007 if ((*last_seq == seq) &&
3008 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3009 if (*last_frag == frag)
3010 goto drop;
3011 if (*last_frag + 1 != frag)
3012 /* out-of-order fragment */
3013 goto drop;
3014 } else
3015 *last_seq = seq;
3016
3017 *last_frag = frag;
3018 *last_time = jiffies;
3019 return 0;
3020
3021 drop:
3022 return 1;
3023 }
3024
3025 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
3026
3027 #include "iwl-spectrum.h"
3028
3029 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
3030 #define BEACON_TIME_MASK_HIGH 0xFF000000
3031 #define TIME_UNIT 1024
3032
3033 /*
3034 * extended beacon time format
3035 * time in usec will be changed into a 32-bit value in 8:24 format
3036 * the high 1 byte is the beacon counts
3037 * the lower 3 bytes is the time in usec within one beacon interval
3038 */
3039
3040 static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
3041 {
3042 u32 quot;
3043 u32 rem;
3044 u32 interval = beacon_interval * 1024;
3045
3046 if (!interval || !usec)
3047 return 0;
3048
3049 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3050 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3051
3052 return (quot << 24) + rem;
3053 }
3054
3055 /* base is usually what we get from ucode with each received frame,
3056 * the same as HW timer counter counting down
3057 */
3058
3059 static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3060 {
3061 u32 base_low = base & BEACON_TIME_MASK_LOW;
3062 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3063 u32 interval = beacon_interval * TIME_UNIT;
3064 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3065 (addon & BEACON_TIME_MASK_HIGH);
3066
3067 if (base_low > addon_low)
3068 res += base_low - addon_low;
3069 else if (base_low < addon_low) {
3070 res += interval + base_low - addon_low;
3071 res += (1 << 24);
3072 } else
3073 res += (1 << 24);
3074
3075 return cpu_to_le32(res);
3076 }
3077
3078 static int iwl4965_get_measurement(struct iwl4965_priv *priv,
3079 struct ieee80211_measurement_params *params,
3080 u8 type)
3081 {
3082 struct iwl4965_spectrum_cmd spectrum;
3083 struct iwl4965_rx_packet *res;
3084 struct iwl4965_host_cmd cmd = {
3085 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3086 .data = (void *)&spectrum,
3087 .meta.flags = CMD_WANT_SKB,
3088 };
3089 u32 add_time = le64_to_cpu(params->start_time);
3090 int rc;
3091 int spectrum_resp_status;
3092 int duration = le16_to_cpu(params->duration);
3093
3094 if (iwl4965_is_associated(priv))
3095 add_time =
3096 iwl4965_usecs_to_beacons(
3097 le64_to_cpu(params->start_time) - priv->last_tsf,
3098 le16_to_cpu(priv->rxon_timing.beacon_interval));
3099
3100 memset(&spectrum, 0, sizeof(spectrum));
3101
3102 spectrum.channel_count = cpu_to_le16(1);
3103 spectrum.flags =
3104 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3105 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3106 cmd.len = sizeof(spectrum);
3107 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3108
3109 if (iwl4965_is_associated(priv))
3110 spectrum.start_time =
3111 iwl4965_add_beacon_time(priv->last_beacon_time,
3112 add_time,
3113 le16_to_cpu(priv->rxon_timing.beacon_interval));
3114 else
3115 spectrum.start_time = 0;
3116
3117 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3118 spectrum.channels[0].channel = params->channel;
3119 spectrum.channels[0].type = type;
3120 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3121 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3122 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3123
3124 rc = iwl4965_send_cmd_sync(priv, &cmd);
3125 if (rc)
3126 return rc;
3127
3128 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
3129 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3130 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3131 rc = -EIO;
3132 }
3133
3134 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3135 switch (spectrum_resp_status) {
3136 case 0: /* Command will be handled */
3137 if (res->u.spectrum.id != 0xff) {
3138 IWL_DEBUG_INFO
3139 ("Replaced existing measurement: %d\n",
3140 res->u.spectrum.id);
3141 priv->measurement_status &= ~MEASUREMENT_READY;
3142 }
3143 priv->measurement_status |= MEASUREMENT_ACTIVE;
3144 rc = 0;
3145 break;
3146
3147 case 1: /* Command will not be handled */
3148 rc = -EAGAIN;
3149 break;
3150 }
3151
3152 dev_kfree_skb_any(cmd.meta.u.skb);
3153
3154 return rc;
3155 }
3156 #endif
3157
3158 static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
3159 struct iwl4965_tx_info *tx_sta)
3160 {
3161
3162 tx_sta->status.ack_signal = 0;
3163 tx_sta->status.excessive_retries = 0;
3164 tx_sta->status.queue_length = 0;
3165 tx_sta->status.queue_number = 0;
3166
3167 if (in_interrupt())
3168 ieee80211_tx_status_irqsafe(priv->hw,
3169 tx_sta->skb[0], &(tx_sta->status));
3170 else
3171 ieee80211_tx_status(priv->hw,
3172 tx_sta->skb[0], &(tx_sta->status));
3173
3174 tx_sta->skb[0] = NULL;
3175 }
3176
3177 /**
3178 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
3179 *
3180 * When FW advances 'R' index, all entries between old and new 'R' index
3181 * need to be reclaimed. As result, some free space forms. If there is
3182 * enough free space (> low mark), wake the stack that feeds us.
3183 */
3184 int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
3185 {
3186 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3187 struct iwl4965_queue *q = &txq->q;
3188 int nfreed = 0;
3189
3190 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3191 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3192 "is out of range [0-%d] %d %d.\n", txq_id,
3193 index, q->n_bd, q->write_ptr, q->read_ptr);
3194 return 0;
3195 }
3196
3197 for (index = iwl_queue_inc_wrap(index, q->n_bd);
3198 q->read_ptr != index;
3199 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3200 if (txq_id != IWL_CMD_QUEUE_NUM) {
3201 iwl4965_txstatus_to_ieee(priv,
3202 &(txq->txb[txq->q.read_ptr]));
3203 iwl4965_hw_txq_free_tfd(priv, txq);
3204 } else if (nfreed > 1) {
3205 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3206 q->write_ptr, q->read_ptr);
3207 queue_work(priv->workqueue, &priv->restart);
3208 }
3209 nfreed++;
3210 }
3211
3212 /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3213 (txq_id != IWL_CMD_QUEUE_NUM) &&
3214 priv->mac80211_registered)
3215 ieee80211_wake_queue(priv->hw, txq_id); */
3216
3217
3218 return nfreed;
3219 }
3220
3221 static int iwl4965_is_tx_success(u32 status)
3222 {
3223 status &= TX_STATUS_MSK;
3224 return (status == TX_STATUS_SUCCESS)
3225 || (status == TX_STATUS_DIRECT_DONE);
3226 }
3227
3228 /******************************************************************************
3229 *
3230 * Generic RX handler implementations
3231 *
3232 ******************************************************************************/
3233 #ifdef CONFIG_IWL4965_HT
3234
3235 static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
3236 struct ieee80211_hdr *hdr)
3237 {
3238 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3239 return IWL_AP_ID;
3240 else {
3241 u8 *da = ieee80211_get_DA(hdr);
3242 return iwl4965_hw_find_station(priv, da);
3243 }
3244 }
3245
3246 static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
3247 struct iwl4965_priv *priv, int txq_id, int idx)
3248 {
3249 if (priv->txq[txq_id].txb[idx].skb[0])
3250 return (struct ieee80211_hdr *)priv->txq[txq_id].
3251 txb[idx].skb[0]->data;
3252 return NULL;
3253 }
3254
3255 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
3256 {
3257 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3258 tx_resp->frame_count);
3259 return le32_to_cpu(*scd_ssn) & MAX_SN;
3260
3261 }
3262
3263 /**
3264 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3265 */
3266 static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
3267 struct iwl4965_ht_agg *agg,
3268 struct iwl4965_tx_resp_agg *tx_resp,
3269 u16 start_idx)
3270 {
3271 u16 status;
3272 struct agg_tx_status *frame_status = &tx_resp->status;
3273 struct ieee80211_tx_status *tx_status = NULL;
3274 struct ieee80211_hdr *hdr = NULL;
3275 int i, sh;
3276 int txq_id, idx;
3277 u16 seq;
3278
3279 if (agg->wait_for_ba)
3280 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
3281
3282 agg->frame_count = tx_resp->frame_count;
3283 agg->start_idx = start_idx;
3284 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3285 agg->bitmap = 0;
3286
3287 /* # frames attempted by Tx command */
3288 if (agg->frame_count == 1) {
3289 /* Only one frame was attempted; no block-ack will arrive */
3290 status = le16_to_cpu(frame_status[0].status);
3291 seq = le16_to_cpu(frame_status[0].sequence);
3292 idx = SEQ_TO_INDEX(seq);
3293 txq_id = SEQ_TO_QUEUE(seq);
3294
3295 /* FIXME: code repetition */
3296 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3297 agg->frame_count, agg->start_idx, idx);
3298
3299 tx_status = &(priv->txq[txq_id].txb[idx].status);
3300 tx_status->retry_count = tx_resp->failure_frame;
3301 tx_status->queue_number = status & 0xff;
3302 tx_status->queue_length = tx_resp->failure_rts;
3303 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
3304 tx_status->flags = iwl4965_is_tx_success(status)?
3305 IEEE80211_TX_STATUS_ACK : 0;
3306 iwl4965_hwrate_to_tx_control(priv,
3307 le32_to_cpu(tx_resp->rate_n_flags),
3308 &tx_status->control);
3309 /* FIXME: code repetition end */
3310
3311 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3312 status & 0xff, tx_resp->failure_frame);
3313 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
3314 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
3315
3316 agg->wait_for_ba = 0;
3317 } else {
3318 /* Two or more frames were attempted; expect block-ack */
3319 u64 bitmap = 0;
3320 int start = agg->start_idx;
3321
3322 /* Construct bit-map of pending frames within Tx window */
3323 for (i = 0; i < agg->frame_count; i++) {
3324 u16 sc;
3325 status = le16_to_cpu(frame_status[i].status);
3326 seq = le16_to_cpu(frame_status[i].sequence);
3327 idx = SEQ_TO_INDEX(seq);
3328 txq_id = SEQ_TO_QUEUE(seq);
3329
3330 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3331 AGG_TX_STATE_ABORT_MSK))
3332 continue;
3333
3334 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3335 agg->frame_count, txq_id, idx);
3336
3337 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
3338
3339 sc = le16_to_cpu(hdr->seq_ctrl);
3340 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3341 IWL_ERROR("BUG_ON idx doesn't match seq control"
3342 " idx=%d, seq_idx=%d, seq=%d\n",
3343 idx, SEQ_TO_SN(sc),
3344 hdr->seq_ctrl);
3345 return -1;
3346 }
3347
3348 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3349 i, idx, SEQ_TO_SN(sc));
3350
3351 sh = idx - start;
3352 if (sh > 64) {
3353 sh = (start - idx) + 0xff;
3354 bitmap = bitmap << sh;
3355 sh = 0;
3356 start = idx;
3357 } else if (sh < -64)
3358 sh = 0xff - (start - idx);
3359 else if (sh < 0) {
3360 sh = start - idx;
3361 start = idx;
3362 bitmap = bitmap << sh;
3363 sh = 0;
3364 }
3365 bitmap |= (1 << sh);
3366 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3367 start, (u32)(bitmap & 0xFFFFFFFF));
3368 }
3369
3370 agg->bitmap = bitmap;
3371 agg->start_idx = start;
3372 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3373 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
3374 agg->frame_count, agg->start_idx,
3375 agg->bitmap);
3376
3377 if (bitmap)
3378 agg->wait_for_ba = 1;
3379 }
3380 return 0;
3381 }
3382 #endif
3383
3384 /**
3385 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3386 */
3387 static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
3388 struct iwl4965_rx_mem_buffer *rxb)
3389 {
3390 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3391 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3392 int txq_id = SEQ_TO_QUEUE(sequence);
3393 int index = SEQ_TO_INDEX(sequence);
3394 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3395 struct ieee80211_tx_status *tx_status;
3396 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3397 u32 status = le32_to_cpu(tx_resp->status);
3398 #ifdef CONFIG_IWL4965_HT
3399 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3400 struct ieee80211_hdr *hdr;
3401 __le16 *qc;
3402 #endif
3403
3404 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3405 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3406 "is out of range [0-%d] %d %d\n", txq_id,
3407 index, txq->q.n_bd, txq->q.write_ptr,
3408 txq->q.read_ptr);
3409 return;
3410 }
3411
3412 #ifdef CONFIG_IWL4965_HT
3413 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3414 qc = ieee80211_get_qos_ctrl(hdr);
3415
3416 if (qc)
3417 tid = le16_to_cpu(*qc) & 0xf;
3418
3419 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
3420 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3421 IWL_ERROR("Station not known\n");
3422 return;
3423 }
3424
3425 if (txq->sched_retry) {
3426 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
3427 struct iwl4965_ht_agg *agg = NULL;
3428
3429 if (!qc)
3430 return;
3431
3432 agg = &priv->stations[sta_id].tid[tid].agg;
3433
3434 iwl4965_tx_status_reply_tx(priv, agg,
3435 (struct iwl4965_tx_resp_agg *)tx_resp, index);
3436
3437 if ((tx_resp->frame_count == 1) &&
3438 !iwl4965_is_tx_success(status)) {
3439 /* TODO: send BAR */
3440 }
3441
3442 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3443 int freed;
3444 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
3445 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3446 "%d index %d\n", scd_ssn , index);
3447 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3448 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3449
3450 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3451 txq_id >= 0 && priv->mac80211_registered &&
3452 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3453 ieee80211_wake_queue(priv->hw, txq_id);
3454
3455 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
3456 }
3457 } else {
3458 #endif /* CONFIG_IWL4965_HT */
3459 tx_status = &(txq->txb[txq->q.read_ptr].status);
3460
3461 tx_status->retry_count = tx_resp->failure_frame;
3462 tx_status->queue_number = status;
3463 tx_status->queue_length = tx_resp->bt_kill_count;
3464 tx_status->queue_length |= tx_resp->failure_rts;
3465 tx_status->flags =
3466 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3467 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
3468 &tx_status->control);
3469
3470 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
3471 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
3472 status, le32_to_cpu(tx_resp->rate_n_flags),
3473 tx_resp->failure_frame);
3474
3475 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3476 if (index != -1) {
3477 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3478 #ifdef CONFIG_IWL4965_HT
3479 if (tid != MAX_TID_COUNT)
3480 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3481 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3482 (txq_id >= 0) &&
3483 priv->mac80211_registered)
3484 ieee80211_wake_queue(priv->hw, txq_id);
3485 if (tid != MAX_TID_COUNT)
3486 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
3487 #endif
3488 }
3489 #ifdef CONFIG_IWL4965_HT
3490 }
3491 #endif /* CONFIG_IWL4965_HT */
3492
3493 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3494 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3495 }
3496
3497
3498 static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
3499 struct iwl4965_rx_mem_buffer *rxb)
3500 {
3501 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3502 struct iwl4965_alive_resp *palive;
3503 struct delayed_work *pwork;
3504
3505 palive = &pkt->u.alive_frame;
3506
3507 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3508 "0x%01X 0x%01X\n",
3509 palive->is_valid, palive->ver_type,
3510 palive->ver_subtype);
3511
3512 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3513 IWL_DEBUG_INFO("Initialization Alive received.\n");
3514 memcpy(&priv->card_alive_init,
3515 &pkt->u.alive_frame,
3516 sizeof(struct iwl4965_init_alive_resp));
3517 pwork = &priv->init_alive_start;
3518 } else {
3519 IWL_DEBUG_INFO("Runtime Alive received.\n");
3520 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3521 sizeof(struct iwl4965_alive_resp));
3522 pwork = &priv->alive_start;
3523 }
3524
3525 /* We delay the ALIVE response by 5ms to
3526 * give the HW RF Kill time to activate... */
3527 if (palive->is_valid == UCODE_VALID_OK)
3528 queue_delayed_work(priv->workqueue, pwork,
3529 msecs_to_jiffies(5));
3530 else
3531 IWL_WARNING("uCode did not respond OK.\n");
3532 }
3533
3534 static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
3535 struct iwl4965_rx_mem_buffer *rxb)
3536 {
3537 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3538
3539 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3540 return;
3541 }
3542
3543 static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
3544 struct iwl4965_rx_mem_buffer *rxb)
3545 {
3546 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3547
3548 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3549 "seq 0x%04X ser 0x%08X\n",
3550 le32_to_cpu(pkt->u.err_resp.error_type),
3551 get_cmd_string(pkt->u.err_resp.cmd_id),
3552 pkt->u.err_resp.cmd_id,
3553 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3554 le32_to_cpu(pkt->u.err_resp.error_info));
3555 }
3556
3557 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3558
3559 static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
3560 {
3561 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3562 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3563 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
3564 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3565 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3566 rxon->channel = csa->channel;
3567 priv->staging_rxon.channel = csa->channel;
3568 }
3569
3570 static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
3571 struct iwl4965_rx_mem_buffer *rxb)
3572 {
3573 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
3574 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3575 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
3576
3577 if (!report->state) {
3578 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3579 "Spectrum Measure Notification: Start\n");
3580 return;
3581 }
3582
3583 memcpy(&priv->measure_report, report, sizeof(*report));
3584 priv->measurement_status |= MEASUREMENT_READY;
3585 #endif
3586 }
3587
3588 static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
3589 struct iwl4965_rx_mem_buffer *rxb)
3590 {
3591 #ifdef CONFIG_IWL4965_DEBUG
3592 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3593 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
3594 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3595 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3596 #endif
3597 }
3598
3599 static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
3600 struct iwl4965_rx_mem_buffer *rxb)
3601 {
3602 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3603 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3604 "notification for %s:\n",
3605 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3606 iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3607 }
3608
3609 static void iwl4965_bg_beacon_update(struct work_struct *work)
3610 {
3611 struct iwl4965_priv *priv =
3612 container_of(work, struct iwl4965_priv, beacon_update);
3613 struct sk_buff *beacon;
3614
3615 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3616 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
3617
3618 if (!beacon) {
3619 IWL_ERROR("update beacon failed\n");
3620 return;
3621 }
3622
3623 mutex_lock(&priv->mutex);
3624 /* new beacon skb is allocated every time; dispose previous.*/
3625 if (priv->ibss_beacon)
3626 dev_kfree_skb(priv->ibss_beacon);
3627
3628 priv->ibss_beacon = beacon;
3629 mutex_unlock(&priv->mutex);
3630
3631 iwl4965_send_beacon_cmd(priv);
3632 }
3633
3634 static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
3635 struct iwl4965_rx_mem_buffer *rxb)
3636 {
3637 #ifdef CONFIG_IWL4965_DEBUG
3638 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3639 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3640 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
3641
3642 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3643 "tsf %d %d rate %d\n",
3644 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3645 beacon->beacon_notify_hdr.failure_frame,
3646 le32_to_cpu(beacon->ibss_mgr_status),
3647 le32_to_cpu(beacon->high_tsf),
3648 le32_to_cpu(beacon->low_tsf), rate);
3649 #endif
3650
3651 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3652 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3653 queue_work(priv->workqueue, &priv->beacon_update);
3654 }
3655
3656 /* Service response to REPLY_SCAN_CMD (0x80) */
3657 static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
3658 struct iwl4965_rx_mem_buffer *rxb)
3659 {
3660 #ifdef CONFIG_IWL4965_DEBUG
3661 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3662 struct iwl4965_scanreq_notification *notif =
3663 (struct iwl4965_scanreq_notification *)pkt->u.raw;
3664
3665 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3666 #endif
3667 }
3668
3669 /* Service SCAN_START_NOTIFICATION (0x82) */
3670 static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
3671 struct iwl4965_rx_mem_buffer *rxb)
3672 {
3673 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3674 struct iwl4965_scanstart_notification *notif =
3675 (struct iwl4965_scanstart_notification *)pkt->u.raw;
3676 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3677 IWL_DEBUG_SCAN("Scan start: "
3678 "%d [802.11%s] "
3679 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3680 notif->channel,
3681 notif->band ? "bg" : "a",
3682 notif->tsf_high,
3683 notif->tsf_low, notif->status, notif->beacon_timer);
3684 }
3685
3686 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3687 static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
3688 struct iwl4965_rx_mem_buffer *rxb)
3689 {
3690 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3691 struct iwl4965_scanresults_notification *notif =
3692 (struct iwl4965_scanresults_notification *)pkt->u.raw;
3693
3694 IWL_DEBUG_SCAN("Scan ch.res: "
3695 "%d [802.11%s] "
3696 "(TSF: 0x%08X:%08X) - %d "
3697 "elapsed=%lu usec (%dms since last)\n",
3698 notif->channel,
3699 notif->band ? "bg" : "a",
3700 le32_to_cpu(notif->tsf_high),
3701 le32_to_cpu(notif->tsf_low),
3702 le32_to_cpu(notif->statistics[0]),
3703 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3704 jiffies_to_msecs(elapsed_jiffies
3705 (priv->last_scan_jiffies, jiffies)));
3706
3707 priv->last_scan_jiffies = jiffies;
3708 priv->next_scan_jiffies = 0;
3709 }
3710
3711 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3712 static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
3713 struct iwl4965_rx_mem_buffer *rxb)
3714 {
3715 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3716 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3717
3718 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3719 scan_notif->scanned_channels,
3720 scan_notif->tsf_low,
3721 scan_notif->tsf_high, scan_notif->status);
3722
3723 /* The HW is no longer scanning */
3724 clear_bit(STATUS_SCAN_HW, &priv->status);
3725
3726 /* The scan completion notification came in, so kill that timer... */
3727 cancel_delayed_work(&priv->scan_check);
3728
3729 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3730 (priv->scan_bands == 2) ? "2.4" : "5.2",
3731 jiffies_to_msecs(elapsed_jiffies
3732 (priv->scan_pass_start, jiffies)));
3733
3734 /* Remove this scanned band from the list
3735 * of pending bands to scan */
3736 priv->scan_bands--;
3737
3738 /* If a request to abort was given, or the scan did not succeed
3739 * then we reset the scan state machine and terminate,
3740 * re-queuing another scan if one has been requested */
3741 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3742 IWL_DEBUG_INFO("Aborted scan completed.\n");
3743 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3744 } else {
3745 /* If there are more bands on this scan pass reschedule */
3746 if (priv->scan_bands > 0)
3747 goto reschedule;
3748 }
3749
3750 priv->last_scan_jiffies = jiffies;
3751 priv->next_scan_jiffies = 0;
3752 IWL_DEBUG_INFO("Setting scan to off\n");
3753
3754 clear_bit(STATUS_SCANNING, &priv->status);
3755
3756 IWL_DEBUG_INFO("Scan took %dms\n",
3757 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3758
3759 queue_work(priv->workqueue, &priv->scan_completed);
3760
3761 return;
3762
3763 reschedule:
3764 priv->scan_pass_start = jiffies;
3765 queue_work(priv->workqueue, &priv->request_scan);
3766 }
3767
3768 /* Handle notification from uCode that card's power state is changing
3769 * due to software, hardware, or critical temperature RFKILL */
3770 static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
3771 struct iwl4965_rx_mem_buffer *rxb)
3772 {
3773 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3774 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3775 unsigned long status = priv->status;
3776
3777 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3778 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3779 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3780
3781 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3782 RF_CARD_DISABLED)) {
3783
3784 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
3785 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3786
3787 if (!iwl4965_grab_nic_access(priv)) {
3788 iwl4965_write_direct32(
3789 priv, HBUS_TARG_MBX_C,
3790 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3791
3792 iwl4965_release_nic_access(priv);
3793 }
3794
3795 if (!(flags & RXON_CARD_DISABLED)) {
3796 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
3797 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3798 if (!iwl4965_grab_nic_access(priv)) {
3799 iwl4965_write_direct32(
3800 priv, HBUS_TARG_MBX_C,
3801 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3802
3803 iwl4965_release_nic_access(priv);
3804 }
3805 }
3806
3807 if (flags & RF_CARD_DISABLED) {
3808 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
3809 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3810 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3811 if (!iwl4965_grab_nic_access(priv))
3812 iwl4965_release_nic_access(priv);
3813 }
3814 }
3815
3816 if (flags & HW_CARD_DISABLED)
3817 set_bit(STATUS_RF_KILL_HW, &priv->status);
3818 else
3819 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3820
3821
3822 if (flags & SW_CARD_DISABLED)
3823 set_bit(STATUS_RF_KILL_SW, &priv->status);
3824 else
3825 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3826
3827 if (!(flags & RXON_CARD_DISABLED))
3828 iwl4965_scan_cancel(priv);
3829
3830 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3831 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3832 (test_bit(STATUS_RF_KILL_SW, &status) !=
3833 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3834 queue_work(priv->workqueue, &priv->rf_kill);
3835 else
3836 wake_up_interruptible(&priv->wait_command_queue);
3837 }
3838
3839 /**
3840 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
3841 *
3842 * Setup the RX handlers for each of the reply types sent from the uCode
3843 * to the host.
3844 *
3845 * This function chains into the hardware specific files for them to setup
3846 * any hardware specific handlers as well.
3847 */
3848 static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
3849 {
3850 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
3851 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
3852 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
3853 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
3854 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3855 iwl4965_rx_spectrum_measure_notif;
3856 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
3857 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3858 iwl4965_rx_pm_debug_statistics_notif;
3859 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
3860
3861 /*
3862 * The same handler is used for both the REPLY to a discrete
3863 * statistics request from the host as well as for the periodic
3864 * statistics notifications (after received beacons) from the uCode.
3865 */
3866 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
3867 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
3868
3869 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
3870 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
3871 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3872 iwl4965_rx_scan_results_notif;
3873 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3874 iwl4965_rx_scan_complete_notif;
3875 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
3876 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
3877
3878 /* Set up hardware specific Rx handlers */
3879 iwl4965_hw_rx_handler_setup(priv);
3880 }
3881
3882 /**
3883 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3884 * @rxb: Rx buffer to reclaim
3885 *
3886 * If an Rx buffer has an async callback associated with it the callback
3887 * will be executed. The attached skb (if present) will only be freed
3888 * if the callback returns 1
3889 */
3890 static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
3891 struct iwl4965_rx_mem_buffer *rxb)
3892 {
3893 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
3894 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3895 int txq_id = SEQ_TO_QUEUE(sequence);
3896 int index = SEQ_TO_INDEX(sequence);
3897 int huge = sequence & SEQ_HUGE_FRAME;
3898 int cmd_index;
3899 struct iwl4965_cmd *cmd;
3900
3901 /* If a Tx command is being handled and it isn't in the actual
3902 * command queue then there a command routing bug has been introduced
3903 * in the queue management code. */
3904 if (txq_id != IWL_CMD_QUEUE_NUM)
3905 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3906 txq_id, pkt->hdr.cmd);
3907 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3908
3909 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3910 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3911
3912 /* Input error checking is done when commands are added to queue. */
3913 if (cmd->meta.flags & CMD_WANT_SKB) {
3914 cmd->meta.source->u.skb = rxb->skb;
3915 rxb->skb = NULL;
3916 } else if (cmd->meta.u.callback &&
3917 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3918 rxb->skb = NULL;
3919
3920 iwl4965_tx_queue_reclaim(priv, txq_id, index);
3921
3922 if (!(cmd->meta.flags & CMD_ASYNC)) {
3923 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3924 wake_up_interruptible(&priv->wait_command_queue);
3925 }
3926 }
3927
3928 /************************** RX-FUNCTIONS ****************************/
3929 /*
3930 * Rx theory of operation
3931 *
3932 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
3933 * each of which point to Receive Buffers to be filled by 4965. These get
3934 * used not only for Rx frames, but for any command response or notification
3935 * from the 4965. The driver and 4965 manage the Rx buffers by means
3936 * of indexes into the circular buffer.
3937 *
3938 * Rx Queue Indexes
3939 * The host/firmware share two index registers for managing the Rx buffers.
3940 *
3941 * The READ index maps to the first position that the firmware may be writing
3942 * to -- the driver can read up to (but not including) this position and get
3943 * good data.
3944 * The READ index is managed by the firmware once the card is enabled.
3945 *
3946 * The WRITE index maps to the last position the driver has read from -- the
3947 * position preceding WRITE is the last slot the firmware can place a packet.
3948 *
3949 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3950 * WRITE = READ.
3951 *
3952 * During initialization, the host sets up the READ queue position to the first
3953 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3954 *
3955 * When the firmware places a packet in a buffer, it will advance the READ index
3956 * and fire the RX interrupt. The driver can then query the READ index and
3957 * process as many packets as possible, moving the WRITE index forward as it
3958 * resets the Rx queue buffers with new memory.
3959 *
3960 * The management in the driver is as follows:
3961 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3962 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3963 * to replenish the iwl->rxq->rx_free.
3964 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
3965 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3966 * 'processed' and 'read' driver indexes as well)
3967 * + A received packet is processed and handed to the kernel network stack,
3968 * detached from the iwl->rxq. The driver 'processed' index is updated.
3969 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3970 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3971 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3972 * were enough free buffers and RX_STALLED is set it is cleared.
3973 *
3974 *
3975 * Driver sequence:
3976 *
3977 * iwl4965_rx_queue_alloc() Allocates rx_free
3978 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
3979 * iwl4965_rx_queue_restock
3980 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
3981 * queue, updates firmware pointers, and updates
3982 * the WRITE index. If insufficient rx_free buffers
3983 * are available, schedules iwl4965_rx_replenish
3984 *
3985 * -- enable interrupts --
3986 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
3987 * READ INDEX, detaching the SKB from the pool.
3988 * Moves the packet buffer from queue to rx_used.
3989 * Calls iwl4965_rx_queue_restock to refill any empty
3990 * slots.
3991 * ...
3992 *
3993 */
3994
3995 /**
3996 * iwl4965_rx_queue_space - Return number of free slots available in queue.
3997 */
3998 static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
3999 {
4000 int s = q->read - q->write;
4001 if (s <= 0)
4002 s += RX_QUEUE_SIZE;
4003 /* keep some buffer to not confuse full and empty queue */
4004 s -= 2;
4005 if (s < 0)
4006 s = 0;
4007 return s;
4008 }
4009
4010 /**
4011 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
4012 */
4013 int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
4014 {
4015 u32 reg = 0;
4016 int rc = 0;
4017 unsigned long flags;
4018
4019 spin_lock_irqsave(&q->lock, flags);
4020
4021 if (q->need_update == 0)
4022 goto exit_unlock;
4023
4024 /* If power-saving is in use, make sure device is awake */
4025 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4026 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4027
4028 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4029 iwl4965_set_bit(priv, CSR_GP_CNTRL,
4030 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4031 goto exit_unlock;
4032 }
4033
4034 rc = iwl4965_grab_nic_access(priv);
4035 if (rc)
4036 goto exit_unlock;
4037
4038 /* Device expects a multiple of 8 */
4039 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
4040 q->write & ~0x7);
4041 iwl4965_release_nic_access(priv);
4042
4043 /* Else device is assumed to be awake */
4044 } else
4045 /* Device expects a multiple of 8 */
4046 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
4047
4048
4049 q->need_update = 0;
4050
4051 exit_unlock:
4052 spin_unlock_irqrestore(&q->lock, flags);
4053 return rc;
4054 }
4055
4056 /**
4057 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
4058 */
4059 static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
4060 dma_addr_t dma_addr)
4061 {
4062 return cpu_to_le32((u32)(dma_addr >> 8));
4063 }
4064
4065
4066 /**
4067 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
4068 *
4069 * If there are slots in the RX queue that need to be restocked,
4070 * and we have free pre-allocated buffers, fill the ranks as much
4071 * as we can, pulling from rx_free.
4072 *
4073 * This moves the 'write' index forward to catch up with 'processed', and
4074 * also updates the memory address in the firmware to reference the new
4075 * target buffer.
4076 */
4077 static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
4078 {
4079 struct iwl4965_rx_queue *rxq = &priv->rxq;
4080 struct list_head *element;
4081 struct iwl4965_rx_mem_buffer *rxb;
4082 unsigned long flags;
4083 int write, rc;
4084
4085 spin_lock_irqsave(&rxq->lock, flags);
4086 write = rxq->write & ~0x7;
4087 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
4088 /* Get next free Rx buffer, remove from free list */
4089 element = rxq->rx_free.next;
4090 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
4091 list_del(element);
4092
4093 /* Point to Rx buffer via next RBD in circular buffer */
4094 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
4095 rxq->queue[rxq->write] = rxb;
4096 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4097 rxq->free_count--;
4098 }
4099 spin_unlock_irqrestore(&rxq->lock, flags);
4100 /* If the pre-allocated buffer pool is dropping low, schedule to
4101 * refill it */
4102 if (rxq->free_count <= RX_LOW_WATERMARK)
4103 queue_work(priv->workqueue, &priv->rx_replenish);
4104
4105
4106 /* If we've added more space for the firmware to place data, tell it.
4107 * Increment device's write pointer in multiples of 8. */
4108 if ((write != (rxq->write & ~0x7))
4109 || (abs(rxq->write - rxq->read) > 7)) {
4110 spin_lock_irqsave(&rxq->lock, flags);
4111 rxq->need_update = 1;
4112 spin_unlock_irqrestore(&rxq->lock, flags);
4113 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
4114 if (rc)
4115 return rc;
4116 }
4117
4118 return 0;
4119 }
4120
4121 /**
4122 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
4123 *
4124 * When moving to rx_free an SKB is allocated for the slot.
4125 *
4126 * Also restock the Rx queue via iwl4965_rx_queue_restock.
4127 * This is called as a scheduled work item (except for during initialization)
4128 */
4129 static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
4130 {
4131 struct iwl4965_rx_queue *rxq = &priv->rxq;
4132 struct list_head *element;
4133 struct iwl4965_rx_mem_buffer *rxb;
4134 unsigned long flags;
4135 spin_lock_irqsave(&rxq->lock, flags);
4136 while (!list_empty(&rxq->rx_used)) {
4137 element = rxq->rx_used.next;
4138 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
4139
4140 /* Alloc a new receive buffer */
4141 rxb->skb =
4142 alloc_skb(priv->hw_setting.rx_buf_size,
4143 __GFP_NOWARN | GFP_ATOMIC);
4144 if (!rxb->skb) {
4145 if (net_ratelimit())
4146 printk(KERN_CRIT DRV_NAME
4147 ": Can not allocate SKB buffers\n");
4148 /* We don't reschedule replenish work here -- we will
4149 * call the restock method and if it still needs
4150 * more buffers it will schedule replenish */
4151 break;
4152 }
4153 priv->alloc_rxb_skb++;
4154 list_del(element);
4155
4156 /* Get physical address of RB/SKB */
4157 rxb->dma_addr =
4158 pci_map_single(priv->pci_dev, rxb->skb->data,
4159 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
4160 list_add_tail(&rxb->list, &rxq->rx_free);
4161 rxq->free_count++;
4162 }
4163 spin_unlock_irqrestore(&rxq->lock, flags);
4164 }
4165
4166 /*
4167 * this should be called while priv->lock is locked
4168 */
4169 static void __iwl4965_rx_replenish(void *data)
4170 {
4171 struct iwl4965_priv *priv = data;
4172
4173 iwl4965_rx_allocate(priv);
4174 iwl4965_rx_queue_restock(priv);
4175 }
4176
4177
4178 void iwl4965_rx_replenish(void *data)
4179 {
4180 struct iwl4965_priv *priv = data;
4181 unsigned long flags;
4182
4183 iwl4965_rx_allocate(priv);
4184
4185 spin_lock_irqsave(&priv->lock, flags);
4186 iwl4965_rx_queue_restock(priv);
4187 spin_unlock_irqrestore(&priv->lock, flags);
4188 }
4189
4190 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
4191 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
4192 * This free routine walks the list of POOL entries and if SKB is set to
4193 * non NULL it is unmapped and freed
4194 */
4195 static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
4196 {
4197 int i;
4198 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4199 if (rxq->pool[i].skb != NULL) {
4200 pci_unmap_single(priv->pci_dev,
4201 rxq->pool[i].dma_addr,
4202 priv->hw_setting.rx_buf_size,
4203 PCI_DMA_FROMDEVICE);
4204 dev_kfree_skb(rxq->pool[i].skb);
4205 }
4206 }
4207
4208 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4209 rxq->dma_addr);
4210 rxq->bd = NULL;
4211 }
4212
4213 int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
4214 {
4215 struct iwl4965_rx_queue *rxq = &priv->rxq;
4216 struct pci_dev *dev = priv->pci_dev;
4217 int i;
4218
4219 spin_lock_init(&rxq->lock);
4220 INIT_LIST_HEAD(&rxq->rx_free);
4221 INIT_LIST_HEAD(&rxq->rx_used);
4222
4223 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
4224 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4225 if (!rxq->bd)
4226 return -ENOMEM;
4227
4228 /* Fill the rx_used queue with _all_ of the Rx buffers */
4229 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4230 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4231
4232 /* Set us so that we have processed and used all buffers, but have
4233 * not restocked the Rx queue with fresh buffers */
4234 rxq->read = rxq->write = 0;
4235 rxq->free_count = 0;
4236 rxq->need_update = 0;
4237 return 0;
4238 }
4239
4240 void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
4241 {
4242 unsigned long flags;
4243 int i;
4244 spin_lock_irqsave(&rxq->lock, flags);
4245 INIT_LIST_HEAD(&rxq->rx_free);
4246 INIT_LIST_HEAD(&rxq->rx_used);
4247 /* Fill the rx_used queue with _all_ of the Rx buffers */
4248 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4249 /* In the reset function, these buffers may have been allocated
4250 * to an SKB, so we need to unmap and free potential storage */
4251 if (rxq->pool[i].skb != NULL) {
4252 pci_unmap_single(priv->pci_dev,
4253 rxq->pool[i].dma_addr,
4254 priv->hw_setting.rx_buf_size,
4255 PCI_DMA_FROMDEVICE);
4256 priv->alloc_rxb_skb--;
4257 dev_kfree_skb(rxq->pool[i].skb);
4258 rxq->pool[i].skb = NULL;
4259 }
4260 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4261 }
4262
4263 /* Set us so that we have processed and used all buffers, but have
4264 * not restocked the Rx queue with fresh buffers */
4265 rxq->read = rxq->write = 0;
4266 rxq->free_count = 0;
4267 spin_unlock_irqrestore(&rxq->lock, flags);
4268 }
4269
4270 /* Convert linear signal-to-noise ratio into dB */
4271 static u8 ratio2dB[100] = {
4272 /* 0 1 2 3 4 5 6 7 8 9 */
4273 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4274 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4275 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4276 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4277 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4278 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4279 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4280 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4281 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4282 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4283 };
4284
4285 /* Calculates a relative dB value from a ratio of linear
4286 * (i.e. not dB) signal levels.
4287 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4288 int iwl4965_calc_db_from_ratio(int sig_ratio)
4289 {
4290 /* 1000:1 or higher just report as 60 dB */
4291 if (sig_ratio >= 1000)
4292 return 60;
4293
4294 /* 100:1 or higher, divide by 10 and use table,
4295 * add 20 dB to make up for divide by 10 */
4296 if (sig_ratio >= 100)
4297 return (20 + (int)ratio2dB[sig_ratio/10]);
4298
4299 /* We shouldn't see this */
4300 if (sig_ratio < 1)
4301 return 0;
4302
4303 /* Use table for ratios 1:1 - 99:1 */
4304 return (int)ratio2dB[sig_ratio];
4305 }
4306
4307 #define PERFECT_RSSI (-20) /* dBm */
4308 #define WORST_RSSI (-95) /* dBm */
4309 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4310
4311 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
4312 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4313 * about formulas used below. */
4314 int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
4315 {
4316 int sig_qual;
4317 int degradation = PERFECT_RSSI - rssi_dbm;
4318
4319 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4320 * as indicator; formula is (signal dbm - noise dbm).
4321 * SNR at or above 40 is a great signal (100%).
4322 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4323 * Weakest usable signal is usually 10 - 15 dB SNR. */
4324 if (noise_dbm) {
4325 if (rssi_dbm - noise_dbm >= 40)
4326 return 100;
4327 else if (rssi_dbm < noise_dbm)
4328 return 0;
4329 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4330
4331 /* Else use just the signal level.
4332 * This formula is a least squares fit of data points collected and
4333 * compared with a reference system that had a percentage (%) display
4334 * for signal quality. */
4335 } else
4336 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4337 (15 * RSSI_RANGE + 62 * degradation)) /
4338 (RSSI_RANGE * RSSI_RANGE);
4339
4340 if (sig_qual > 100)
4341 sig_qual = 100;
4342 else if (sig_qual < 1)
4343 sig_qual = 0;
4344
4345 return sig_qual;
4346 }
4347
4348 /**
4349 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
4350 *
4351 * Uses the priv->rx_handlers callback function array to invoke
4352 * the appropriate handlers, including command responses,
4353 * frame-received notifications, and other notifications.
4354 */
4355 static void iwl4965_rx_handle(struct iwl4965_priv *priv)
4356 {
4357 struct iwl4965_rx_mem_buffer *rxb;
4358 struct iwl4965_rx_packet *pkt;
4359 struct iwl4965_rx_queue *rxq = &priv->rxq;
4360 u32 r, i;
4361 int reclaim;
4362 unsigned long flags;
4363 u8 fill_rx = 0;
4364 u32 count = 8;
4365
4366 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4367 * buffer that the driver may process (last buffer filled by ucode). */
4368 r = iwl4965_hw_get_rx_read(priv);
4369 i = rxq->read;
4370
4371 /* Rx interrupt, but nothing sent from uCode */
4372 if (i == r)
4373 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4374
4375 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4376 fill_rx = 1;
4377
4378 while (i != r) {
4379 rxb = rxq->queue[i];
4380
4381 /* If an RXB doesn't have a Rx queue slot associated with it,
4382 * then a bug has been introduced in the queue refilling
4383 * routines -- catch it here */
4384 BUG_ON(rxb == NULL);
4385
4386 rxq->queue[i] = NULL;
4387
4388 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4389 priv->hw_setting.rx_buf_size,
4390 PCI_DMA_FROMDEVICE);
4391 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
4392
4393 /* Reclaim a command buffer only if this packet is a response
4394 * to a (driver-originated) command.
4395 * If the packet (e.g. Rx frame) originated from uCode,
4396 * there is no command buffer to reclaim.
4397 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4398 * but apparently a few don't get set; catch them here. */
4399 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4400 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4401 (pkt->hdr.cmd != REPLY_4965_RX) &&
4402 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
4403 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4404 (pkt->hdr.cmd != REPLY_TX);
4405
4406 /* Based on type of command response or notification,
4407 * handle those that need handling via function in
4408 * rx_handlers table. See iwl4965_setup_rx_handlers() */
4409 if (priv->rx_handlers[pkt->hdr.cmd]) {
4410 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4411 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4412 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4413 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4414 } else {
4415 /* No handling needed */
4416 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4417 "r %d i %d No handler needed for %s, 0x%02x\n",
4418 r, i, get_cmd_string(pkt->hdr.cmd),
4419 pkt->hdr.cmd);
4420 }
4421
4422 if (reclaim) {
4423 /* Invoke any callbacks, transfer the skb to caller, and
4424 * fire off the (possibly) blocking iwl4965_send_cmd()
4425 * as we reclaim the driver command queue */
4426 if (rxb && rxb->skb)
4427 iwl4965_tx_cmd_complete(priv, rxb);
4428 else
4429 IWL_WARNING("Claim null rxb?\n");
4430 }
4431
4432 /* For now we just don't re-use anything. We can tweak this
4433 * later to try and re-use notification packets and SKBs that
4434 * fail to Rx correctly */
4435 if (rxb->skb != NULL) {
4436 priv->alloc_rxb_skb--;
4437 dev_kfree_skb_any(rxb->skb);
4438 rxb->skb = NULL;
4439 }
4440
4441 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4442 priv->hw_setting.rx_buf_size,
4443 PCI_DMA_FROMDEVICE);
4444 spin_lock_irqsave(&rxq->lock, flags);
4445 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4446 spin_unlock_irqrestore(&rxq->lock, flags);
4447 i = (i + 1) & RX_QUEUE_MASK;
4448 /* If there are a lot of unused frames,
4449 * restock the Rx queue so ucode wont assert. */
4450 if (fill_rx) {
4451 count++;
4452 if (count >= 8) {
4453 priv->rxq.read = i;
4454 __iwl4965_rx_replenish(priv);
4455 count = 0;
4456 }
4457 }
4458 }
4459
4460 /* Backtrack one entry */
4461 priv->rxq.read = i;
4462 iwl4965_rx_queue_restock(priv);
4463 }
4464
4465 /**
4466 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4467 */
4468 static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
4469 struct iwl4965_tx_queue *txq)
4470 {
4471 u32 reg = 0;
4472 int rc = 0;
4473 int txq_id = txq->q.id;
4474
4475 if (txq->need_update == 0)
4476 return rc;
4477
4478 /* if we're trying to save power */
4479 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4480 /* wake up nic if it's powered down ...
4481 * uCode will wake up, and interrupt us again, so next
4482 * time we'll skip this part. */
4483 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4484
4485 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4486 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4487 iwl4965_set_bit(priv, CSR_GP_CNTRL,
4488 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4489 return rc;
4490 }
4491
4492 /* restore this queue's parameters in nic hardware. */
4493 rc = iwl4965_grab_nic_access(priv);
4494 if (rc)
4495 return rc;
4496 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
4497 txq->q.write_ptr | (txq_id << 8));
4498 iwl4965_release_nic_access(priv);
4499
4500 /* else not in power-save mode, uCode will never sleep when we're
4501 * trying to tx (during RFKILL, we're not trying to tx). */
4502 } else
4503 iwl4965_write32(priv, HBUS_TARG_WRPTR,
4504 txq->q.write_ptr | (txq_id << 8));
4505
4506 txq->need_update = 0;
4507
4508 return rc;
4509 }
4510
4511 #ifdef CONFIG_IWL4965_DEBUG
4512 static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
4513 {
4514 DECLARE_MAC_BUF(mac);
4515
4516 IWL_DEBUG_RADIO("RX CONFIG:\n");
4517 iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4518 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4519 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4520 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4521 le32_to_cpu(rxon->filter_flags));
4522 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4523 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4524 rxon->ofdm_basic_rates);
4525 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4526 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4527 print_mac(mac, rxon->node_addr));
4528 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4529 print_mac(mac, rxon->bssid_addr));
4530 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4531 }
4532 #endif
4533
4534 static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
4535 {
4536 IWL_DEBUG_ISR("Enabling interrupts\n");
4537 set_bit(STATUS_INT_ENABLED, &priv->status);
4538 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4539 }
4540
4541 static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
4542 {
4543 clear_bit(STATUS_INT_ENABLED, &priv->status);
4544
4545 /* disable interrupts from uCode/NIC to host */
4546 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
4547
4548 /* acknowledge/clear/reset any interrupts still pending
4549 * from uCode or flow handler (Rx/Tx DMA) */
4550 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4551 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4552 IWL_DEBUG_ISR("Disabled interrupts\n");
4553 }
4554
4555 static const char *desc_lookup(int i)
4556 {
4557 switch (i) {
4558 case 1:
4559 return "FAIL";
4560 case 2:
4561 return "BAD_PARAM";
4562 case 3:
4563 return "BAD_CHECKSUM";
4564 case 4:
4565 return "NMI_INTERRUPT";
4566 case 5:
4567 return "SYSASSERT";
4568 case 6:
4569 return "FATAL_ERROR";
4570 }
4571
4572 return "UNKNOWN";
4573 }
4574
4575 #define ERROR_START_OFFSET (1 * sizeof(u32))
4576 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4577
4578 static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
4579 {
4580 u32 data2, line;
4581 u32 desc, time, count, base, data1;
4582 u32 blink1, blink2, ilink1, ilink2;
4583 int rc;
4584
4585 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4586
4587 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
4588 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4589 return;
4590 }
4591
4592 rc = iwl4965_grab_nic_access(priv);
4593 if (rc) {
4594 IWL_WARNING("Can not read from adapter at this time.\n");
4595 return;
4596 }
4597
4598 count = iwl4965_read_targ_mem(priv, base);
4599
4600 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4601 IWL_ERROR("Start IWL Error Log Dump:\n");
4602 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
4603 }
4604
4605 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4606 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4607 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4608 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4609 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4610 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4611 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4612 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4613 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
4614
4615 IWL_ERROR("Desc Time "
4616 "data1 data2 line\n");
4617 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4618 desc_lookup(desc), desc, time, data1, data2, line);
4619 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4620 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4621 ilink1, ilink2);
4622
4623 iwl4965_release_nic_access(priv);
4624 }
4625
4626 #define EVENT_START_OFFSET (4 * sizeof(u32))
4627
4628 /**
4629 * iwl4965_print_event_log - Dump error event log to syslog
4630 *
4631 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
4632 */
4633 static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
4634 u32 num_events, u32 mode)
4635 {
4636 u32 i;
4637 u32 base; /* SRAM byte address of event log header */
4638 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4639 u32 ptr; /* SRAM byte address of log data */
4640 u32 ev, time, data; /* event log data */
4641
4642 if (num_events == 0)
4643 return;
4644
4645 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4646
4647 if (mode == 0)
4648 event_size = 2 * sizeof(u32);
4649 else
4650 event_size = 3 * sizeof(u32);
4651
4652 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4653
4654 /* "time" is actually "data" for mode 0 (no timestamp).
4655 * place event id # at far right for easier visual parsing. */
4656 for (i = 0; i < num_events; i++) {
4657 ev = iwl4965_read_targ_mem(priv, ptr);
4658 ptr += sizeof(u32);
4659 time = iwl4965_read_targ_mem(priv, ptr);
4660 ptr += sizeof(u32);
4661 if (mode == 0)
4662 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4663 else {
4664 data = iwl4965_read_targ_mem(priv, ptr);
4665 ptr += sizeof(u32);
4666 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4667 }
4668 }
4669 }
4670
4671 static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
4672 {
4673 int rc;
4674 u32 base; /* SRAM byte address of event log header */
4675 u32 capacity; /* event log capacity in # entries */
4676 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4677 u32 num_wraps; /* # times uCode wrapped to top of log */
4678 u32 next_entry; /* index of next entry to be written by uCode */
4679 u32 size; /* # entries that we'll print */
4680
4681 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4682 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
4683 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4684 return;
4685 }
4686
4687 rc = iwl4965_grab_nic_access(priv);
4688 if (rc) {
4689 IWL_WARNING("Can not read from adapter at this time.\n");
4690 return;
4691 }
4692
4693 /* event log header */
4694 capacity = iwl4965_read_targ_mem(priv, base);
4695 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
4696 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
4697 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
4698
4699 size = num_wraps ? capacity : next_entry;
4700
4701 /* bail out if nothing in log */
4702 if (size == 0) {
4703 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4704 iwl4965_release_nic_access(priv);
4705 return;
4706 }
4707
4708 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4709 size, num_wraps);
4710
4711 /* if uCode has wrapped back to top of log, start at the oldest entry,
4712 * i.e the next one that uCode would fill. */
4713 if (num_wraps)
4714 iwl4965_print_event_log(priv, next_entry,
4715 capacity - next_entry, mode);
4716
4717 /* (then/else) start at top of log */
4718 iwl4965_print_event_log(priv, 0, next_entry, mode);
4719
4720 iwl4965_release_nic_access(priv);
4721 }
4722
4723 /**
4724 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
4725 */
4726 static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
4727 {
4728 /* Set the FW error flag -- cleared on iwl4965_down */
4729 set_bit(STATUS_FW_ERROR, &priv->status);
4730
4731 /* Cancel currently queued command. */
4732 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4733
4734 #ifdef CONFIG_IWL4965_DEBUG
4735 if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
4736 iwl4965_dump_nic_error_log(priv);
4737 iwl4965_dump_nic_event_log(priv);
4738 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
4739 }
4740 #endif
4741
4742 wake_up_interruptible(&priv->wait_command_queue);
4743
4744 /* Keep the restart process from trying to send host
4745 * commands by clearing the INIT status bit */
4746 clear_bit(STATUS_READY, &priv->status);
4747
4748 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4749 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4750 "Restarting adapter due to uCode error.\n");
4751
4752 if (iwl4965_is_associated(priv)) {
4753 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4754 sizeof(priv->recovery_rxon));
4755 priv->error_recovering = 1;
4756 }
4757 queue_work(priv->workqueue, &priv->restart);
4758 }
4759 }
4760
4761 static void iwl4965_error_recovery(struct iwl4965_priv *priv)
4762 {
4763 unsigned long flags;
4764
4765 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4766 sizeof(priv->staging_rxon));
4767 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4768 iwl4965_commit_rxon(priv);
4769
4770 iwl4965_rxon_add_station(priv, priv->bssid, 1);
4771
4772 spin_lock_irqsave(&priv->lock, flags);
4773 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4774 priv->error_recovering = 0;
4775 spin_unlock_irqrestore(&priv->lock, flags);
4776 }
4777
4778 static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
4779 {
4780 u32 inta, handled = 0;
4781 u32 inta_fh;
4782 unsigned long flags;
4783 #ifdef CONFIG_IWL4965_DEBUG
4784 u32 inta_mask;
4785 #endif
4786
4787 spin_lock_irqsave(&priv->lock, flags);
4788
4789 /* Ack/clear/reset pending uCode interrupts.
4790 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4791 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4792 inta = iwl4965_read32(priv, CSR_INT);
4793 iwl4965_write32(priv, CSR_INT, inta);
4794
4795 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4796 * Any new interrupts that happen after this, either while we're
4797 * in this tasklet, or later, will show up in next ISR/tasklet. */
4798 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
4799 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4800
4801 #ifdef CONFIG_IWL4965_DEBUG
4802 if (iwl4965_debug_level & IWL_DL_ISR) {
4803 /* just for debug */
4804 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
4805 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4806 inta, inta_mask, inta_fh);
4807 }
4808 #endif
4809
4810 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4811 * atomic, make sure that inta covers all the interrupts that
4812 * we've discovered, even if FH interrupt came in just after
4813 * reading CSR_INT. */
4814 if (inta_fh & CSR49_FH_INT_RX_MASK)
4815 inta |= CSR_INT_BIT_FH_RX;
4816 if (inta_fh & CSR49_FH_INT_TX_MASK)
4817 inta |= CSR_INT_BIT_FH_TX;
4818
4819 /* Now service all interrupt bits discovered above. */
4820 if (inta & CSR_INT_BIT_HW_ERR) {
4821 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4822
4823 /* Tell the device to stop sending interrupts */
4824 iwl4965_disable_interrupts(priv);
4825
4826 iwl4965_irq_handle_error(priv);
4827
4828 handled |= CSR_INT_BIT_HW_ERR;
4829
4830 spin_unlock_irqrestore(&priv->lock, flags);
4831
4832 return;
4833 }
4834
4835 #ifdef CONFIG_IWL4965_DEBUG
4836 if (iwl4965_debug_level & (IWL_DL_ISR)) {
4837 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4838 if (inta & CSR_INT_BIT_SCD)
4839 IWL_DEBUG_ISR("Scheduler finished to transmit "
4840 "the frame/frames.\n");
4841
4842 /* Alive notification via Rx interrupt will do the real work */
4843 if (inta & CSR_INT_BIT_ALIVE)
4844 IWL_DEBUG_ISR("Alive interrupt\n");
4845 }
4846 #endif
4847 /* Safely ignore these bits for debug checks below */
4848 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4849
4850 /* HW RF KILL switch toggled */
4851 if (inta & CSR_INT_BIT_RF_KILL) {
4852 int hw_rf_kill = 0;
4853 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
4854 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4855 hw_rf_kill = 1;
4856
4857 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4858 "RF_KILL bit toggled to %s.\n",
4859 hw_rf_kill ? "disable radio":"enable radio");
4860
4861 /* Queue restart only if RF_KILL switch was set to "kill"
4862 * when we loaded driver, and is now set to "enable".
4863 * After we're Alive, RF_KILL gets handled by
4864 * iwl4965_rx_card_state_notif() */
4865 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4866 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4867 queue_work(priv->workqueue, &priv->restart);
4868 }
4869
4870 handled |= CSR_INT_BIT_RF_KILL;
4871 }
4872
4873 /* Chip got too hot and stopped itself */
4874 if (inta & CSR_INT_BIT_CT_KILL) {
4875 IWL_ERROR("Microcode CT kill error detected.\n");
4876 handled |= CSR_INT_BIT_CT_KILL;
4877 }
4878
4879 /* Error detected by uCode */
4880 if (inta & CSR_INT_BIT_SW_ERR) {
4881 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4882 inta);
4883 iwl4965_irq_handle_error(priv);
4884 handled |= CSR_INT_BIT_SW_ERR;
4885 }
4886
4887 /* uCode wakes up after power-down sleep */
4888 if (inta & CSR_INT_BIT_WAKEUP) {
4889 IWL_DEBUG_ISR("Wakeup interrupt\n");
4890 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
4891 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4892 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4893 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4894 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4895 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4896 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4897
4898 handled |= CSR_INT_BIT_WAKEUP;
4899 }
4900
4901 /* All uCode command responses, including Tx command responses,
4902 * Rx "responses" (frame-received notification), and other
4903 * notifications from uCode come through here*/
4904 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4905 iwl4965_rx_handle(priv);
4906 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4907 }
4908
4909 if (inta & CSR_INT_BIT_FH_TX) {
4910 IWL_DEBUG_ISR("Tx interrupt\n");
4911 handled |= CSR_INT_BIT_FH_TX;
4912 }
4913
4914 if (inta & ~handled)
4915 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4916
4917 if (inta & ~CSR_INI_SET_MASK) {
4918 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4919 inta & ~CSR_INI_SET_MASK);
4920 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4921 }
4922
4923 /* Re-enable all interrupts */
4924 iwl4965_enable_interrupts(priv);
4925
4926 #ifdef CONFIG_IWL4965_DEBUG
4927 if (iwl4965_debug_level & (IWL_DL_ISR)) {
4928 inta = iwl4965_read32(priv, CSR_INT);
4929 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
4930 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
4931 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4932 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4933 }
4934 #endif
4935 spin_unlock_irqrestore(&priv->lock, flags);
4936 }
4937
4938 static irqreturn_t iwl4965_isr(int irq, void *data)
4939 {
4940 struct iwl4965_priv *priv = data;
4941 u32 inta, inta_mask;
4942 u32 inta_fh;
4943 if (!priv)
4944 return IRQ_NONE;
4945
4946 spin_lock(&priv->lock);
4947
4948 /* Disable (but don't clear!) interrupts here to avoid
4949 * back-to-back ISRs and sporadic interrupts from our NIC.
4950 * If we have something to service, the tasklet will re-enable ints.
4951 * If we *don't* have something, we'll re-enable before leaving here. */
4952 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
4953 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
4954
4955 /* Discover which interrupts are active/pending */
4956 inta = iwl4965_read32(priv, CSR_INT);
4957 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
4958
4959 /* Ignore interrupt if there's nothing in NIC to service.
4960 * This may be due to IRQ shared with another device,
4961 * or due to sporadic interrupts thrown from our NIC. */
4962 if (!inta && !inta_fh) {
4963 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4964 goto none;
4965 }
4966
4967 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4968 /* Hardware disappeared. It might have already raised
4969 * an interrupt */
4970 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
4971 goto unplugged;
4972 }
4973
4974 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4975 inta, inta_mask, inta_fh);
4976
4977 inta &= ~CSR_INT_BIT_SCD;
4978
4979 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
4980 if (likely(inta || inta_fh))
4981 tasklet_schedule(&priv->irq_tasklet);
4982
4983 unplugged:
4984 spin_unlock(&priv->lock);
4985 return IRQ_HANDLED;
4986
4987 none:
4988 /* re-enable interrupts here since we don't have anything to service. */
4989 iwl4965_enable_interrupts(priv);
4990 spin_unlock(&priv->lock);
4991 return IRQ_NONE;
4992 }
4993
4994 /************************** EEPROM BANDS ****************************
4995 *
4996 * The iwl4965_eeprom_band definitions below provide the mapping from the
4997 * EEPROM contents to the specific channel number supported for each
4998 * band.
4999 *
5000 * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
5001 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5002 * The specific geography and calibration information for that channel
5003 * is contained in the eeprom map itself.
5004 *
5005 * During init, we copy the eeprom information and channel map
5006 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5007 *
5008 * channel_map_24/52 provides the index in the channel_info array for a
5009 * given channel. We have to have two separate maps as there is channel
5010 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5011 * band_2
5012 *
5013 * A value of 0xff stored in the channel_map indicates that the channel
5014 * is not supported by the hardware at all.
5015 *
5016 * A value of 0xfe in the channel_map indicates that the channel is not
5017 * valid for Tx with the current hardware. This means that
5018 * while the system can tune and receive on a given channel, it may not
5019 * be able to associate or transmit any frames on that
5020 * channel. There is no corresponding channel information for that
5021 * entry.
5022 *
5023 *********************************************************************/
5024
5025 /* 2.4 GHz */
5026 static const u8 iwl4965_eeprom_band_1[14] = {
5027 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5028 };
5029
5030 /* 5.2 GHz bands */
5031 static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
5032 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5033 };
5034
5035 static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
5036 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5037 };
5038
5039 static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
5040 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5041 };
5042
5043 static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
5044 145, 149, 153, 157, 161, 165
5045 };
5046
5047 static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
5048 1, 2, 3, 4, 5, 6, 7
5049 };
5050
5051 static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
5052 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5053 };
5054
5055 static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
5056 int band,
5057 int *eeprom_ch_count,
5058 const struct iwl4965_eeprom_channel
5059 **eeprom_ch_info,
5060 const u8 **eeprom_ch_index)
5061 {
5062 switch (band) {
5063 case 1: /* 2.4GHz band */
5064 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
5065 *eeprom_ch_info = priv->eeprom.band_1_channels;
5066 *eeprom_ch_index = iwl4965_eeprom_band_1;
5067 break;
5068 case 2: /* 4.9GHz band */
5069 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
5070 *eeprom_ch_info = priv->eeprom.band_2_channels;
5071 *eeprom_ch_index = iwl4965_eeprom_band_2;
5072 break;
5073 case 3: /* 5.2GHz band */
5074 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
5075 *eeprom_ch_info = priv->eeprom.band_3_channels;
5076 *eeprom_ch_index = iwl4965_eeprom_band_3;
5077 break;
5078 case 4: /* 5.5GHz band */
5079 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
5080 *eeprom_ch_info = priv->eeprom.band_4_channels;
5081 *eeprom_ch_index = iwl4965_eeprom_band_4;
5082 break;
5083 case 5: /* 5.7GHz band */
5084 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
5085 *eeprom_ch_info = priv->eeprom.band_5_channels;
5086 *eeprom_ch_index = iwl4965_eeprom_band_5;
5087 break;
5088 case 6: /* 2.4GHz FAT channels */
5089 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
5090 *eeprom_ch_info = priv->eeprom.band_24_channels;
5091 *eeprom_ch_index = iwl4965_eeprom_band_6;
5092 break;
5093 case 7: /* 5 GHz FAT channels */
5094 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
5095 *eeprom_ch_info = priv->eeprom.band_52_channels;
5096 *eeprom_ch_index = iwl4965_eeprom_band_7;
5097 break;
5098 default:
5099 BUG();
5100 return;
5101 }
5102 }
5103
5104 /**
5105 * iwl4965_get_channel_info - Find driver's private channel info
5106 *
5107 * Based on band and channel number.
5108 */
5109 const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
5110 enum ieee80211_band band, u16 channel)
5111 {
5112 int i;
5113
5114 switch (band) {
5115 case IEEE80211_BAND_5GHZ:
5116 for (i = 14; i < priv->channel_count; i++) {
5117 if (priv->channel_info[i].channel == channel)
5118 return &priv->channel_info[i];
5119 }
5120 break;
5121 case IEEE80211_BAND_2GHZ:
5122 if (channel >= 1 && channel <= 14)
5123 return &priv->channel_info[channel - 1];
5124 break;
5125 default:
5126 BUG();
5127 }
5128
5129 return NULL;
5130 }
5131
5132 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5133 ? # x " " : "")
5134
5135 /**
5136 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5137 */
5138 static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
5139 {
5140 int eeprom_ch_count = 0;
5141 const u8 *eeprom_ch_index = NULL;
5142 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
5143 int band, ch;
5144 struct iwl4965_channel_info *ch_info;
5145
5146 if (priv->channel_count) {
5147 IWL_DEBUG_INFO("Channel map already initialized.\n");
5148 return 0;
5149 }
5150
5151 if (priv->eeprom.version < 0x2f) {
5152 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5153 priv->eeprom.version);
5154 return -EINVAL;
5155 }
5156
5157 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5158
5159 priv->channel_count =
5160 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5161 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5162 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5163 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5164 ARRAY_SIZE(iwl4965_eeprom_band_5);
5165
5166 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5167
5168 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
5169 priv->channel_count, GFP_KERNEL);
5170 if (!priv->channel_info) {
5171 IWL_ERROR("Could not allocate channel_info\n");
5172 priv->channel_count = 0;
5173 return -ENOMEM;
5174 }
5175
5176 ch_info = priv->channel_info;
5177
5178 /* Loop through the 5 EEPROM bands adding them in order to the
5179 * channel map we maintain (that contains additional information than
5180 * what just in the EEPROM) */
5181 for (band = 1; band <= 5; band++) {
5182
5183 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
5184 &eeprom_ch_info, &eeprom_ch_index);
5185
5186 /* Loop through each band adding each of the channels */
5187 for (ch = 0; ch < eeprom_ch_count; ch++) {
5188 ch_info->channel = eeprom_ch_index[ch];
5189 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
5190 IEEE80211_BAND_5GHZ;
5191
5192 /* permanently store EEPROM's channel regulatory flags
5193 * and max power in channel info database. */
5194 ch_info->eeprom = eeprom_ch_info[ch];
5195
5196 /* Copy the run-time flags so they are there even on
5197 * invalid channels */
5198 ch_info->flags = eeprom_ch_info[ch].flags;
5199
5200 if (!(is_channel_valid(ch_info))) {
5201 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5202 "No traffic\n",
5203 ch_info->channel,
5204 ch_info->flags,
5205 is_channel_a_band(ch_info) ?
5206 "5.2" : "2.4");
5207 ch_info++;
5208 continue;
5209 }
5210
5211 /* Initialize regulatory-based run-time data */
5212 ch_info->max_power_avg = ch_info->curr_txpow =
5213 eeprom_ch_info[ch].max_power_avg;
5214 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5215 ch_info->min_power = 0;
5216
5217 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
5218 " %ddBm): Ad-Hoc %ssupported\n",
5219 ch_info->channel,
5220 is_channel_a_band(ch_info) ?
5221 "5.2" : "2.4",
5222 CHECK_AND_PRINT(VALID),
5223 CHECK_AND_PRINT(IBSS),
5224 CHECK_AND_PRINT(ACTIVE),
5225 CHECK_AND_PRINT(RADAR),
5226 CHECK_AND_PRINT(WIDE),
5227 CHECK_AND_PRINT(NARROW),
5228 CHECK_AND_PRINT(DFS),
5229 eeprom_ch_info[ch].flags,
5230 eeprom_ch_info[ch].max_power_avg,
5231 ((eeprom_ch_info[ch].
5232 flags & EEPROM_CHANNEL_IBSS)
5233 && !(eeprom_ch_info[ch].
5234 flags & EEPROM_CHANNEL_RADAR))
5235 ? "" : "not ");
5236
5237 /* Set the user_txpower_limit to the highest power
5238 * supported by any channel */
5239 if (eeprom_ch_info[ch].max_power_avg >
5240 priv->user_txpower_limit)
5241 priv->user_txpower_limit =
5242 eeprom_ch_info[ch].max_power_avg;
5243
5244 ch_info++;
5245 }
5246 }
5247
5248 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
5249 for (band = 6; band <= 7; band++) {
5250 enum ieee80211_band ieeeband;
5251 u8 fat_extension_chan;
5252
5253 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
5254 &eeprom_ch_info, &eeprom_ch_index);
5255
5256 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
5257 ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
5258
5259 /* Loop through each band adding each of the channels */
5260 for (ch = 0; ch < eeprom_ch_count; ch++) {
5261
5262 if ((band == 6) &&
5263 ((eeprom_ch_index[ch] == 5) ||
5264 (eeprom_ch_index[ch] == 6) ||
5265 (eeprom_ch_index[ch] == 7)))
5266 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5267 else
5268 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5269
5270 /* Set up driver's info for lower half */
5271 iwl4965_set_fat_chan_info(priv, ieeeband,
5272 eeprom_ch_index[ch],
5273 &(eeprom_ch_info[ch]),
5274 fat_extension_chan);
5275
5276 /* Set up driver's info for upper half */
5277 iwl4965_set_fat_chan_info(priv, ieeeband,
5278 (eeprom_ch_index[ch] + 4),
5279 &(eeprom_ch_info[ch]),
5280 HT_IE_EXT_CHANNEL_BELOW);
5281 }
5282 }
5283
5284 return 0;
5285 }
5286
5287 /*
5288 * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
5289 */
5290 static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
5291 {
5292 kfree(priv->channel_info);
5293 priv->channel_count = 0;
5294 }
5295
5296 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5297 * sending probe req. This should be set long enough to hear probe responses
5298 * from more than one AP. */
5299 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5300 #define IWL_ACTIVE_DWELL_TIME_52 (10)
5301
5302 /* For faster active scanning, scan will move to the next channel if fewer than
5303 * PLCP_QUIET_THRESH packets are heard on this channel within
5304 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5305 * time if it's a quiet channel (nothing responded to our probe, and there's
5306 * no other traffic).
5307 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5308 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5309 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5310
5311 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5312 * Must be set longer than active dwell time.
5313 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5314 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5315 #define IWL_PASSIVE_DWELL_TIME_52 (10)
5316 #define IWL_PASSIVE_DWELL_BASE (100)
5317 #define IWL_CHANNEL_TUNE_TIME 5
5318
5319 static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
5320 enum ieee80211_band band)
5321 {
5322 if (band == IEEE80211_BAND_5GHZ)
5323 return IWL_ACTIVE_DWELL_TIME_52;
5324 else
5325 return IWL_ACTIVE_DWELL_TIME_24;
5326 }
5327
5328 static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
5329 enum ieee80211_band band)
5330 {
5331 u16 active = iwl4965_get_active_dwell_time(priv, band);
5332 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
5333 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5334 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5335
5336 if (iwl4965_is_associated(priv)) {
5337 /* If we're associated, we clamp the maximum passive
5338 * dwell time to be 98% of the beacon interval (minus
5339 * 2 * channel tune time) */
5340 passive = priv->beacon_int;
5341 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5342 passive = IWL_PASSIVE_DWELL_BASE;
5343 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5344 }
5345
5346 if (passive <= active)
5347 passive = active + 1;
5348
5349 return passive;
5350 }
5351
5352 static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
5353 enum ieee80211_band band,
5354 u8 is_active, u8 direct_mask,
5355 struct iwl4965_scan_channel *scan_ch)
5356 {
5357 const struct ieee80211_channel *channels = NULL;
5358 const struct ieee80211_supported_band *sband;
5359 const struct iwl4965_channel_info *ch_info;
5360 u16 passive_dwell = 0;
5361 u16 active_dwell = 0;
5362 int added, i;
5363
5364 sband = iwl4965_get_hw_mode(priv, band);
5365 if (!sband)
5366 return 0;
5367
5368 channels = sband->channels;
5369
5370 active_dwell = iwl4965_get_active_dwell_time(priv, band);
5371 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
5372
5373 for (i = 0, added = 0; i < sband->n_channels; i++) {
5374 if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
5375 le16_to_cpu(priv->active_rxon.channel)) {
5376 if (iwl4965_is_associated(priv)) {
5377 IWL_DEBUG_SCAN
5378 ("Skipping current channel %d\n",
5379 le16_to_cpu(priv->active_rxon.channel));
5380 continue;
5381 }
5382 } else if (priv->only_active_channel)
5383 continue;
5384
5385 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
5386
5387 ch_info = iwl4965_get_channel_info(priv, band,
5388 scan_ch->channel);
5389 if (!is_channel_valid(ch_info)) {
5390 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5391 scan_ch->channel);
5392 continue;
5393 }
5394
5395 if (!is_active || is_channel_passive(ch_info) ||
5396 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
5397 scan_ch->type = 0; /* passive */
5398 else
5399 scan_ch->type = 1; /* active */
5400
5401 if (scan_ch->type & 1)
5402 scan_ch->type |= (direct_mask << 1);
5403
5404 if (is_channel_narrow(ch_info))
5405 scan_ch->type |= (1 << 7);
5406
5407 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5408 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5409
5410 /* Set txpower levels to defaults */
5411 scan_ch->tpc.dsp_atten = 110;
5412 /* scan_pwr_info->tpc.dsp_atten; */
5413
5414 /*scan_pwr_info->tpc.tx_gain; */
5415 if (band == IEEE80211_BAND_5GHZ)
5416 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5417 else {
5418 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5419 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
5420 * power level:
5421 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
5422 */
5423 }
5424
5425 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5426 scan_ch->channel,
5427 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5428 (scan_ch->type & 1) ?
5429 active_dwell : passive_dwell);
5430
5431 scan_ch++;
5432 added++;
5433 }
5434
5435 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5436 return added;
5437 }
5438
5439 static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
5440 struct ieee80211_rate *rates)
5441 {
5442 int i;
5443
5444 for (i = 0; i < IWL_RATE_COUNT; i++) {
5445 rates[i].bitrate = iwl4965_rates[i].ieee * 5;
5446 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5447 rates[i].hw_value_short = i;
5448 rates[i].flags = 0;
5449 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
5450 /*
5451 * If CCK != 1M then set short preamble rate flag.
5452 */
5453 rates[i].flags |=
5454 (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
5455 0 : IEEE80211_RATE_SHORT_PREAMBLE;
5456 }
5457 }
5458 }
5459
5460 /**
5461 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
5462 */
5463 static int iwl4965_init_geos(struct iwl4965_priv *priv)
5464 {
5465 struct iwl4965_channel_info *ch;
5466 struct ieee80211_supported_band *sband;
5467 struct ieee80211_channel *channels;
5468 struct ieee80211_channel *geo_ch;
5469 struct ieee80211_rate *rates;
5470 int i = 0;
5471
5472 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5473 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
5474 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5475 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5476 return 0;
5477 }
5478
5479 channels = kzalloc(sizeof(struct ieee80211_channel) *
5480 priv->channel_count, GFP_KERNEL);
5481 if (!channels)
5482 return -ENOMEM;
5483
5484 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
5485 GFP_KERNEL);
5486 if (!rates) {
5487 kfree(channels);
5488 return -ENOMEM;
5489 }
5490
5491 /* 5.2GHz channels start after the 2.4GHz channels */
5492 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5493 sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
5494 /* just OFDM */
5495 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5496 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
5497
5498 iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
5499
5500 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5501 sband->channels = channels;
5502 /* OFDM & CCK */
5503 sband->bitrates = rates;
5504 sband->n_bitrates = IWL_RATE_COUNT;
5505
5506 iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
5507
5508 priv->ieee_channels = channels;
5509 priv->ieee_rates = rates;
5510
5511 iwl4965_init_hw_rates(priv, rates);
5512
5513 for (i = 0; i < priv->channel_count; i++) {
5514 ch = &priv->channel_info[i];
5515
5516 /* FIXME: might be removed if scan is OK */
5517 if (!is_channel_valid(ch))
5518 continue;
5519
5520 if (is_channel_a_band(ch))
5521 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5522 else
5523 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5524
5525 geo_ch = &sband->channels[sband->n_channels++];
5526
5527 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
5528 geo_ch->max_power = ch->max_power_avg;
5529 geo_ch->max_antenna_gain = 0xff;
5530 geo_ch->hw_value = ch->channel;
5531
5532 if (is_channel_valid(ch)) {
5533 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5534 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
5535
5536 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5537 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
5538
5539 if (ch->flags & EEPROM_CHANNEL_RADAR)
5540 geo_ch->flags |= IEEE80211_CHAN_RADAR;
5541
5542 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5543 priv->max_channel_txpower_limit =
5544 ch->max_power_avg;
5545 } else {
5546 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
5547 }
5548
5549 /* Save flags for reg domain usage */
5550 geo_ch->orig_flags = geo_ch->flags;
5551
5552 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5553 ch->channel, geo_ch->center_freq,
5554 is_channel_a_band(ch) ? "5.2" : "2.4",
5555 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5556 "restricted" : "valid",
5557 geo_ch->flags);
5558 }
5559
5560 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5561 priv->cfg->sku & IWL_SKU_A) {
5562 printk(KERN_INFO DRV_NAME
5563 ": Incorrectly detected BG card as ABG. Please send "
5564 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5565 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5566 priv->cfg->sku &= ~IWL_SKU_A;
5567 }
5568
5569 printk(KERN_INFO DRV_NAME
5570 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5571 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5572 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
5573
5574 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
5575 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
5576
5577 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5578
5579 return 0;
5580 }
5581
5582 /*
5583 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
5584 */
5585 static void iwl4965_free_geos(struct iwl4965_priv *priv)
5586 {
5587 kfree(priv->ieee_channels);
5588 kfree(priv->ieee_rates);
5589 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5590 }
5591
5592 /******************************************************************************
5593 *
5594 * uCode download functions
5595 *
5596 ******************************************************************************/
5597
5598 static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
5599 {
5600 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5601 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5602 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5603 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5604 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5605 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5606 }
5607
5608 /**
5609 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
5610 * looking at all data.
5611 */
5612 static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
5613 u32 len)
5614 {
5615 u32 val;
5616 u32 save_len = len;
5617 int rc = 0;
5618 u32 errcnt;
5619
5620 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5621
5622 rc = iwl4965_grab_nic_access(priv);
5623 if (rc)
5624 return rc;
5625
5626 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5627
5628 errcnt = 0;
5629 for (; len > 0; len -= sizeof(u32), image++) {
5630 /* read data comes through single port, auto-incr addr */
5631 /* NOTE: Use the debugless read so we don't flood kernel log
5632 * if IWL_DL_IO is set */
5633 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5634 if (val != le32_to_cpu(*image)) {
5635 IWL_ERROR("uCode INST section is invalid at "
5636 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5637 save_len - len, val, le32_to_cpu(*image));
5638 rc = -EIO;
5639 errcnt++;
5640 if (errcnt >= 20)
5641 break;
5642 }
5643 }
5644
5645 iwl4965_release_nic_access(priv);
5646
5647 if (!errcnt)
5648 IWL_DEBUG_INFO
5649 ("ucode image in INSTRUCTION memory is good\n");
5650
5651 return rc;
5652 }
5653
5654
5655 /**
5656 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
5657 * using sample data 100 bytes apart. If these sample points are good,
5658 * it's a pretty good bet that everything between them is good, too.
5659 */
5660 static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
5661 {
5662 u32 val;
5663 int rc = 0;
5664 u32 errcnt = 0;
5665 u32 i;
5666
5667 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5668
5669 rc = iwl4965_grab_nic_access(priv);
5670 if (rc)
5671 return rc;
5672
5673 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5674 /* read data comes through single port, auto-incr addr */
5675 /* NOTE: Use the debugless read so we don't flood kernel log
5676 * if IWL_DL_IO is set */
5677 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5678 i + RTC_INST_LOWER_BOUND);
5679 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5680 if (val != le32_to_cpu(*image)) {
5681 #if 0 /* Enable this if you want to see details */
5682 IWL_ERROR("uCode INST section is invalid at "
5683 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5684 i, val, *image);
5685 #endif
5686 rc = -EIO;
5687 errcnt++;
5688 if (errcnt >= 3)
5689 break;
5690 }
5691 }
5692
5693 iwl4965_release_nic_access(priv);
5694
5695 return rc;
5696 }
5697
5698
5699 /**
5700 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
5701 * and verify its contents
5702 */
5703 static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
5704 {
5705 __le32 *image;
5706 u32 len;
5707 int rc = 0;
5708
5709 /* Try bootstrap */
5710 image = (__le32 *)priv->ucode_boot.v_addr;
5711 len = priv->ucode_boot.len;
5712 rc = iwl4965_verify_inst_sparse(priv, image, len);
5713 if (rc == 0) {
5714 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5715 return 0;
5716 }
5717
5718 /* Try initialize */
5719 image = (__le32 *)priv->ucode_init.v_addr;
5720 len = priv->ucode_init.len;
5721 rc = iwl4965_verify_inst_sparse(priv, image, len);
5722 if (rc == 0) {
5723 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5724 return 0;
5725 }
5726
5727 /* Try runtime/protocol */
5728 image = (__le32 *)priv->ucode_code.v_addr;
5729 len = priv->ucode_code.len;
5730 rc = iwl4965_verify_inst_sparse(priv, image, len);
5731 if (rc == 0) {
5732 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5733 return 0;
5734 }
5735
5736 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5737
5738 /* Since nothing seems to match, show first several data entries in
5739 * instruction SRAM, so maybe visual inspection will give a clue.
5740 * Selection of bootstrap image (vs. other images) is arbitrary. */
5741 image = (__le32 *)priv->ucode_boot.v_addr;
5742 len = priv->ucode_boot.len;
5743 rc = iwl4965_verify_inst_full(priv, image, len);
5744
5745 return rc;
5746 }
5747
5748
5749 /* check contents of special bootstrap uCode SRAM */
5750 static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
5751 {
5752 __le32 *image = priv->ucode_boot.v_addr;
5753 u32 len = priv->ucode_boot.len;
5754 u32 reg;
5755 u32 val;
5756
5757 IWL_DEBUG_INFO("Begin verify bsm\n");
5758
5759 /* verify BSM SRAM contents */
5760 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
5761 for (reg = BSM_SRAM_LOWER_BOUND;
5762 reg < BSM_SRAM_LOWER_BOUND + len;
5763 reg += sizeof(u32), image ++) {
5764 val = iwl4965_read_prph(priv, reg);
5765 if (val != le32_to_cpu(*image)) {
5766 IWL_ERROR("BSM uCode verification failed at "
5767 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5768 BSM_SRAM_LOWER_BOUND,
5769 reg - BSM_SRAM_LOWER_BOUND, len,
5770 val, le32_to_cpu(*image));
5771 return -EIO;
5772 }
5773 }
5774
5775 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5776
5777 return 0;
5778 }
5779
5780 /**
5781 * iwl4965_load_bsm - Load bootstrap instructions
5782 *
5783 * BSM operation:
5784 *
5785 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5786 * in special SRAM that does not power down during RFKILL. When powering back
5787 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5788 * the bootstrap program into the on-board processor, and starts it.
5789 *
5790 * The bootstrap program loads (via DMA) instructions and data for a new
5791 * program from host DRAM locations indicated by the host driver in the
5792 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5793 * automatically.
5794 *
5795 * When initializing the NIC, the host driver points the BSM to the
5796 * "initialize" uCode image. This uCode sets up some internal data, then
5797 * notifies host via "initialize alive" that it is complete.
5798 *
5799 * The host then replaces the BSM_DRAM_* pointer values to point to the
5800 * normal runtime uCode instructions and a backup uCode data cache buffer
5801 * (filled initially with starting data values for the on-board processor),
5802 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5803 * which begins normal operation.
5804 *
5805 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5806 * the backup data cache in DRAM before SRAM is powered down.
5807 *
5808 * When powering back up, the BSM loads the bootstrap program. This reloads
5809 * the runtime uCode instructions and the backup data cache into SRAM,
5810 * and re-launches the runtime uCode from where it left off.
5811 */
5812 static int iwl4965_load_bsm(struct iwl4965_priv *priv)
5813 {
5814 __le32 *image = priv->ucode_boot.v_addr;
5815 u32 len = priv->ucode_boot.len;
5816 dma_addr_t pinst;
5817 dma_addr_t pdata;
5818 u32 inst_len;
5819 u32 data_len;
5820 int rc;
5821 int i;
5822 u32 done;
5823 u32 reg_offset;
5824
5825 IWL_DEBUG_INFO("Begin load bsm\n");
5826
5827 /* make sure bootstrap program is no larger than BSM's SRAM size */
5828 if (len > IWL_MAX_BSM_SIZE)
5829 return -EINVAL;
5830
5831 /* Tell bootstrap uCode where to find the "Initialize" uCode
5832 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
5833 * NOTE: iwl4965_initialize_alive_start() will replace these values,
5834 * after the "initialize" uCode has run, to point to
5835 * runtime/protocol instructions and backup data cache. */
5836 pinst = priv->ucode_init.p_addr >> 4;
5837 pdata = priv->ucode_init_data.p_addr >> 4;
5838 inst_len = priv->ucode_init.len;
5839 data_len = priv->ucode_init_data.len;
5840
5841 rc = iwl4965_grab_nic_access(priv);
5842 if (rc)
5843 return rc;
5844
5845 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5846 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5847 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5848 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5849
5850 /* Fill BSM memory with bootstrap instructions */
5851 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5852 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5853 reg_offset += sizeof(u32), image++)
5854 _iwl4965_write_prph(priv, reg_offset,
5855 le32_to_cpu(*image));
5856
5857 rc = iwl4965_verify_bsm(priv);
5858 if (rc) {
5859 iwl4965_release_nic_access(priv);
5860 return rc;
5861 }
5862
5863 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5864 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5865 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
5866 RTC_INST_LOWER_BOUND);
5867 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5868
5869 /* Load bootstrap code into instruction SRAM now,
5870 * to prepare to load "initialize" uCode */
5871 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
5872 BSM_WR_CTRL_REG_BIT_START);
5873
5874 /* Wait for load of bootstrap uCode to finish */
5875 for (i = 0; i < 100; i++) {
5876 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
5877 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5878 break;
5879 udelay(10);
5880 }
5881 if (i < 100)
5882 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5883 else {
5884 IWL_ERROR("BSM write did not complete!\n");
5885 return -EIO;
5886 }
5887
5888 /* Enable future boot loads whenever power management unit triggers it
5889 * (e.g. when powering back up after power-save shutdown) */
5890 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
5891 BSM_WR_CTRL_REG_BIT_START_EN);
5892
5893 iwl4965_release_nic_access(priv);
5894
5895 return 0;
5896 }
5897
5898 static void iwl4965_nic_start(struct iwl4965_priv *priv)
5899 {
5900 /* Remove all resets to allow NIC to operate */
5901 iwl4965_write32(priv, CSR_RESET, 0);
5902 }
5903
5904
5905 /**
5906 * iwl4965_read_ucode - Read uCode images from disk file.
5907 *
5908 * Copy into buffers for card to fetch via bus-mastering
5909 */
5910 static int iwl4965_read_ucode(struct iwl4965_priv *priv)
5911 {
5912 struct iwl4965_ucode *ucode;
5913 int ret;
5914 const struct firmware *ucode_raw;
5915 const char *name = priv->cfg->fw_name;
5916 u8 *src;
5917 size_t len;
5918 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5919
5920 /* Ask kernel firmware_class module to get the boot firmware off disk.
5921 * request_firmware() is synchronous, file is in memory on return. */
5922 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5923 if (ret < 0) {
5924 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5925 name, ret);
5926 goto error;
5927 }
5928
5929 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5930 name, ucode_raw->size);
5931
5932 /* Make sure that we got at least our header! */
5933 if (ucode_raw->size < sizeof(*ucode)) {
5934 IWL_ERROR("File size way too small!\n");
5935 ret = -EINVAL;
5936 goto err_release;
5937 }
5938
5939 /* Data from ucode file: header followed by uCode images */
5940 ucode = (void *)ucode_raw->data;
5941
5942 ver = le32_to_cpu(ucode->ver);
5943 inst_size = le32_to_cpu(ucode->inst_size);
5944 data_size = le32_to_cpu(ucode->data_size);
5945 init_size = le32_to_cpu(ucode->init_size);
5946 init_data_size = le32_to_cpu(ucode->init_data_size);
5947 boot_size = le32_to_cpu(ucode->boot_size);
5948
5949 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5950 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
5951 inst_size);
5952 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
5953 data_size);
5954 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
5955 init_size);
5956 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
5957 init_data_size);
5958 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
5959 boot_size);
5960
5961 /* Verify size of file vs. image size info in file's header */
5962 if (ucode_raw->size < sizeof(*ucode) +
5963 inst_size + data_size + init_size +
5964 init_data_size + boot_size) {
5965
5966 IWL_DEBUG_INFO("uCode file size %d too small\n",
5967 (int)ucode_raw->size);
5968 ret = -EINVAL;
5969 goto err_release;
5970 }
5971
5972 /* Verify that uCode images will fit in card's SRAM */
5973 if (inst_size > IWL_MAX_INST_SIZE) {
5974 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5975 inst_size);
5976 ret = -EINVAL;
5977 goto err_release;
5978 }
5979
5980 if (data_size > IWL_MAX_DATA_SIZE) {
5981 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5982 data_size);
5983 ret = -EINVAL;
5984 goto err_release;
5985 }
5986 if (init_size > IWL_MAX_INST_SIZE) {
5987 IWL_DEBUG_INFO
5988 ("uCode init instr len %d too large to fit in\n",
5989 init_size);
5990 ret = -EINVAL;
5991 goto err_release;
5992 }
5993 if (init_data_size > IWL_MAX_DATA_SIZE) {
5994 IWL_DEBUG_INFO
5995 ("uCode init data len %d too large to fit in\n",
5996 init_data_size);
5997 ret = -EINVAL;
5998 goto err_release;
5999 }
6000 if (boot_size > IWL_MAX_BSM_SIZE) {
6001 IWL_DEBUG_INFO
6002 ("uCode boot instr len %d too large to fit in\n",
6003 boot_size);
6004 ret = -EINVAL;
6005 goto err_release;
6006 }
6007
6008 /* Allocate ucode buffers for card's bus-master loading ... */
6009
6010 /* Runtime instructions and 2 copies of data:
6011 * 1) unmodified from disk
6012 * 2) backup cache for save/restore during power-downs */
6013 priv->ucode_code.len = inst_size;
6014 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
6015
6016 priv->ucode_data.len = data_size;
6017 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
6018
6019 priv->ucode_data_backup.len = data_size;
6020 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
6021
6022 /* Initialization instructions and data */
6023 if (init_size && init_data_size) {
6024 priv->ucode_init.len = init_size;
6025 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
6026
6027 priv->ucode_init_data.len = init_data_size;
6028 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
6029
6030 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6031 goto err_pci_alloc;
6032 }
6033
6034 /* Bootstrap (instructions only, no data) */
6035 if (boot_size) {
6036 priv->ucode_boot.len = boot_size;
6037 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
6038
6039 if (!priv->ucode_boot.v_addr)
6040 goto err_pci_alloc;
6041 }
6042
6043 /* Copy images into buffers for card's bus-master reads ... */
6044
6045 /* Runtime instructions (first block of data in file) */
6046 src = &ucode->data[0];
6047 len = priv->ucode_code.len;
6048 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
6049 memcpy(priv->ucode_code.v_addr, src, len);
6050 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6051 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6052
6053 /* Runtime data (2nd block)
6054 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
6055 src = &ucode->data[inst_size];
6056 len = priv->ucode_data.len;
6057 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
6058 memcpy(priv->ucode_data.v_addr, src, len);
6059 memcpy(priv->ucode_data_backup.v_addr, src, len);
6060
6061 /* Initialization instructions (3rd block) */
6062 if (init_size) {
6063 src = &ucode->data[inst_size + data_size];
6064 len = priv->ucode_init.len;
6065 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6066 len);
6067 memcpy(priv->ucode_init.v_addr, src, len);
6068 }
6069
6070 /* Initialization data (4th block) */
6071 if (init_data_size) {
6072 src = &ucode->data[inst_size + data_size + init_size];
6073 len = priv->ucode_init_data.len;
6074 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6075 len);
6076 memcpy(priv->ucode_init_data.v_addr, src, len);
6077 }
6078
6079 /* Bootstrap instructions (5th block) */
6080 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6081 len = priv->ucode_boot.len;
6082 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
6083 memcpy(priv->ucode_boot.v_addr, src, len);
6084
6085 /* We have our copies now, allow OS release its copies */
6086 release_firmware(ucode_raw);
6087 return 0;
6088
6089 err_pci_alloc:
6090 IWL_ERROR("failed to allocate pci memory\n");
6091 ret = -ENOMEM;
6092 iwl4965_dealloc_ucode_pci(priv);
6093
6094 err_release:
6095 release_firmware(ucode_raw);
6096
6097 error:
6098 return ret;
6099 }
6100
6101
6102 /**
6103 * iwl4965_set_ucode_ptrs - Set uCode address location
6104 *
6105 * Tell initialization uCode where to find runtime uCode.
6106 *
6107 * BSM registers initially contain pointers to initialization uCode.
6108 * We need to replace them to load runtime uCode inst and data,
6109 * and to save runtime data when powering down.
6110 */
6111 static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
6112 {
6113 dma_addr_t pinst;
6114 dma_addr_t pdata;
6115 int rc = 0;
6116 unsigned long flags;
6117
6118 /* bits 35:4 for 4965 */
6119 pinst = priv->ucode_code.p_addr >> 4;
6120 pdata = priv->ucode_data_backup.p_addr >> 4;
6121
6122 spin_lock_irqsave(&priv->lock, flags);
6123 rc = iwl4965_grab_nic_access(priv);
6124 if (rc) {
6125 spin_unlock_irqrestore(&priv->lock, flags);
6126 return rc;
6127 }
6128
6129 /* Tell bootstrap uCode where to find image to load */
6130 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6131 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6132 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
6133 priv->ucode_data.len);
6134
6135 /* Inst bytecount must be last to set up, bit 31 signals uCode
6136 * that all new ptr/size info is in place */
6137 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
6138 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6139
6140 iwl4965_release_nic_access(priv);
6141
6142 spin_unlock_irqrestore(&priv->lock, flags);
6143
6144 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6145
6146 return rc;
6147 }
6148
6149 /**
6150 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
6151 *
6152 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6153 *
6154 * The 4965 "initialize" ALIVE reply contains calibration data for:
6155 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6156 * (3945 does not contain this data).
6157 *
6158 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6159 */
6160 static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
6161 {
6162 /* Check alive response for "valid" sign from uCode */
6163 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6164 /* We had an error bringing up the hardware, so take it
6165 * all the way back down so we can try again */
6166 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6167 goto restart;
6168 }
6169
6170 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6171 * This is a paranoid check, because we would not have gotten the
6172 * "initialize" alive if code weren't properly loaded. */
6173 if (iwl4965_verify_ucode(priv)) {
6174 /* Runtime instruction load was bad;
6175 * take it all the way back down so we can try again */
6176 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6177 goto restart;
6178 }
6179
6180 /* Calculate temperature */
6181 priv->temperature = iwl4965_get_temperature(priv);
6182
6183 /* Send pointers to protocol/runtime uCode image ... init code will
6184 * load and launch runtime uCode, which will send us another "Alive"
6185 * notification. */
6186 IWL_DEBUG_INFO("Initialization Alive received.\n");
6187 if (iwl4965_set_ucode_ptrs(priv)) {
6188 /* Runtime instruction load won't happen;
6189 * take it all the way back down so we can try again */
6190 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6191 goto restart;
6192 }
6193 return;
6194
6195 restart:
6196 queue_work(priv->workqueue, &priv->restart);
6197 }
6198
6199
6200 /**
6201 * iwl4965_alive_start - called after REPLY_ALIVE notification received
6202 * from protocol/runtime uCode (initialization uCode's
6203 * Alive gets handled by iwl4965_init_alive_start()).
6204 */
6205 static void iwl4965_alive_start(struct iwl4965_priv *priv)
6206 {
6207 int rc = 0;
6208
6209 IWL_DEBUG_INFO("Runtime Alive received.\n");
6210
6211 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6212 /* We had an error bringing up the hardware, so take it
6213 * all the way back down so we can try again */
6214 IWL_DEBUG_INFO("Alive failed.\n");
6215 goto restart;
6216 }
6217
6218 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6219 * This is a paranoid check, because we would not have gotten the
6220 * "runtime" alive if code weren't properly loaded. */
6221 if (iwl4965_verify_ucode(priv)) {
6222 /* Runtime instruction load was bad;
6223 * take it all the way back down so we can try again */
6224 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6225 goto restart;
6226 }
6227
6228 iwl4965_clear_stations_table(priv);
6229
6230 rc = iwl4965_alive_notify(priv);
6231 if (rc) {
6232 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6233 rc);
6234 goto restart;
6235 }
6236
6237 /* After the ALIVE response, we can send host commands to 4965 uCode */
6238 set_bit(STATUS_ALIVE, &priv->status);
6239
6240 /* Clear out the uCode error bit if it is set */
6241 clear_bit(STATUS_FW_ERROR, &priv->status);
6242
6243 if (iwl4965_is_rfkill(priv))
6244 return;
6245
6246 ieee80211_start_queues(priv->hw);
6247
6248 priv->active_rate = priv->rates_mask;
6249 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6250
6251 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6252
6253 if (iwl4965_is_associated(priv)) {
6254 struct iwl4965_rxon_cmd *active_rxon =
6255 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
6256
6257 memcpy(&priv->staging_rxon, &priv->active_rxon,
6258 sizeof(priv->staging_rxon));
6259 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6260 } else {
6261 /* Initialize our rx_config data */
6262 iwl4965_connection_init_rx_config(priv);
6263 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6264 }
6265
6266 /* Configure Bluetooth device coexistence support */
6267 iwl4965_send_bt_config(priv);
6268
6269 /* Configure the adapter for unassociated operation */
6270 iwl4965_commit_rxon(priv);
6271
6272 /* At this point, the NIC is initialized and operational */
6273 priv->notif_missed_beacons = 0;
6274 set_bit(STATUS_READY, &priv->status);
6275
6276 iwl4965_rf_kill_ct_config(priv);
6277
6278 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6279 wake_up_interruptible(&priv->wait_command_queue);
6280
6281 if (priv->error_recovering)
6282 iwl4965_error_recovery(priv);
6283
6284 return;
6285
6286 restart:
6287 queue_work(priv->workqueue, &priv->restart);
6288 }
6289
6290 static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
6291
6292 static void __iwl4965_down(struct iwl4965_priv *priv)
6293 {
6294 unsigned long flags;
6295 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6296 struct ieee80211_conf *conf = NULL;
6297
6298 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6299
6300 conf = ieee80211_get_hw_conf(priv->hw);
6301
6302 if (!exit_pending)
6303 set_bit(STATUS_EXIT_PENDING, &priv->status);
6304
6305 iwl4965_clear_stations_table(priv);
6306
6307 /* Unblock any waiting calls */
6308 wake_up_interruptible_all(&priv->wait_command_queue);
6309
6310 /* Wipe out the EXIT_PENDING status bit if we are not actually
6311 * exiting the module */
6312 if (!exit_pending)
6313 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6314
6315 /* stop and reset the on-board processor */
6316 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6317
6318 /* tell the device to stop sending interrupts */
6319 iwl4965_disable_interrupts(priv);
6320
6321 if (priv->mac80211_registered)
6322 ieee80211_stop_queues(priv->hw);
6323
6324 /* If we have not previously called iwl4965_init() then
6325 * clear all bits but the RF Kill and SUSPEND bits and return */
6326 if (!iwl4965_is_init(priv)) {
6327 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6328 STATUS_RF_KILL_HW |
6329 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6330 STATUS_RF_KILL_SW |
6331 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6332 STATUS_GEO_CONFIGURED |
6333 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6334 STATUS_IN_SUSPEND;
6335 goto exit;
6336 }
6337
6338 /* ...otherwise clear out all the status bits but the RF Kill and
6339 * SUSPEND bits and continue taking the NIC down. */
6340 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6341 STATUS_RF_KILL_HW |
6342 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6343 STATUS_RF_KILL_SW |
6344 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6345 STATUS_GEO_CONFIGURED |
6346 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6347 STATUS_IN_SUSPEND |
6348 test_bit(STATUS_FW_ERROR, &priv->status) <<
6349 STATUS_FW_ERROR;
6350
6351 spin_lock_irqsave(&priv->lock, flags);
6352 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6353 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6354 spin_unlock_irqrestore(&priv->lock, flags);
6355
6356 iwl4965_hw_txq_ctx_stop(priv);
6357 iwl4965_hw_rxq_stop(priv);
6358
6359 spin_lock_irqsave(&priv->lock, flags);
6360 if (!iwl4965_grab_nic_access(priv)) {
6361 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
6362 APMG_CLK_VAL_DMA_CLK_RQT);
6363 iwl4965_release_nic_access(priv);
6364 }
6365 spin_unlock_irqrestore(&priv->lock, flags);
6366
6367 udelay(5);
6368
6369 iwl4965_hw_nic_stop_master(priv);
6370 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6371 iwl4965_hw_nic_reset(priv);
6372
6373 exit:
6374 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
6375
6376 if (priv->ibss_beacon)
6377 dev_kfree_skb(priv->ibss_beacon);
6378 priv->ibss_beacon = NULL;
6379
6380 /* clear out any free frames */
6381 iwl4965_clear_free_frames(priv);
6382 }
6383
6384 static void iwl4965_down(struct iwl4965_priv *priv)
6385 {
6386 mutex_lock(&priv->mutex);
6387 __iwl4965_down(priv);
6388 mutex_unlock(&priv->mutex);
6389
6390 iwl4965_cancel_deferred_work(priv);
6391 }
6392
6393 #define MAX_HW_RESTARTS 5
6394
6395 static int __iwl4965_up(struct iwl4965_priv *priv)
6396 {
6397 int rc, i;
6398
6399 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6400 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6401 return -EIO;
6402 }
6403
6404 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6405 IWL_WARNING("Radio disabled by SW RF kill (module "
6406 "parameter)\n");
6407 return -ENODEV;
6408 }
6409
6410 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6411 IWL_ERROR("ucode not available for device bringup\n");
6412 return -EIO;
6413 }
6414
6415 /* If platform's RF_KILL switch is NOT set to KILL */
6416 if (iwl4965_read32(priv, CSR_GP_CNTRL) &
6417 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6418 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6419 else {
6420 set_bit(STATUS_RF_KILL_HW, &priv->status);
6421 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6422 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6423 return -ENODEV;
6424 }
6425 }
6426
6427 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6428
6429 rc = iwl4965_hw_nic_init(priv);
6430 if (rc) {
6431 IWL_ERROR("Unable to int nic\n");
6432 return rc;
6433 }
6434
6435 /* make sure rfkill handshake bits are cleared */
6436 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6437 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6438 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6439
6440 /* clear (again), then enable host interrupts */
6441 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6442 iwl4965_enable_interrupts(priv);
6443
6444 /* really make sure rfkill handshake bits are cleared */
6445 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6446 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6447
6448 /* Copy original ucode data image from disk into backup cache.
6449 * This will be used to initialize the on-board processor's
6450 * data SRAM for a clean start when the runtime program first loads. */
6451 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6452 priv->ucode_data.len);
6453
6454 /* We return success when we resume from suspend and rf_kill is on. */
6455 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6456 return 0;
6457
6458 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6459
6460 iwl4965_clear_stations_table(priv);
6461
6462 /* load bootstrap state machine,
6463 * load bootstrap program into processor's memory,
6464 * prepare to load the "initialize" uCode */
6465 rc = iwl4965_load_bsm(priv);
6466
6467 if (rc) {
6468 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6469 continue;
6470 }
6471
6472 /* start card; "initialize" will load runtime ucode */
6473 iwl4965_nic_start(priv);
6474
6475 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6476
6477 return 0;
6478 }
6479
6480 set_bit(STATUS_EXIT_PENDING, &priv->status);
6481 __iwl4965_down(priv);
6482
6483 /* tried to restart and config the device for as long as our
6484 * patience could withstand */
6485 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6486 return -EIO;
6487 }
6488
6489
6490 /*****************************************************************************
6491 *
6492 * Workqueue callbacks
6493 *
6494 *****************************************************************************/
6495
6496 static void iwl4965_bg_init_alive_start(struct work_struct *data)
6497 {
6498 struct iwl4965_priv *priv =
6499 container_of(data, struct iwl4965_priv, init_alive_start.work);
6500
6501 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6502 return;
6503
6504 mutex_lock(&priv->mutex);
6505 iwl4965_init_alive_start(priv);
6506 mutex_unlock(&priv->mutex);
6507 }
6508
6509 static void iwl4965_bg_alive_start(struct work_struct *data)
6510 {
6511 struct iwl4965_priv *priv =
6512 container_of(data, struct iwl4965_priv, alive_start.work);
6513
6514 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6515 return;
6516
6517 mutex_lock(&priv->mutex);
6518 iwl4965_alive_start(priv);
6519 mutex_unlock(&priv->mutex);
6520 }
6521
6522 static void iwl4965_bg_rf_kill(struct work_struct *work)
6523 {
6524 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
6525
6526 wake_up_interruptible(&priv->wait_command_queue);
6527
6528 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6529 return;
6530
6531 mutex_lock(&priv->mutex);
6532
6533 if (!iwl4965_is_rfkill(priv)) {
6534 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6535 "HW and/or SW RF Kill no longer active, restarting "
6536 "device\n");
6537 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6538 queue_work(priv->workqueue, &priv->restart);
6539 } else {
6540
6541 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6542 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6543 "disabled by SW switch\n");
6544 else
6545 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6546 "Kill switch must be turned off for "
6547 "wireless networking to work.\n");
6548 }
6549 mutex_unlock(&priv->mutex);
6550 }
6551
6552 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6553
6554 static void iwl4965_bg_scan_check(struct work_struct *data)
6555 {
6556 struct iwl4965_priv *priv =
6557 container_of(data, struct iwl4965_priv, scan_check.work);
6558
6559 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6560 return;
6561
6562 mutex_lock(&priv->mutex);
6563 if (test_bit(STATUS_SCANNING, &priv->status) ||
6564 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6565 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6566 "Scan completion watchdog resetting adapter (%dms)\n",
6567 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6568
6569 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6570 iwl4965_send_scan_abort(priv);
6571 }
6572 mutex_unlock(&priv->mutex);
6573 }
6574
6575 static void iwl4965_bg_request_scan(struct work_struct *data)
6576 {
6577 struct iwl4965_priv *priv =
6578 container_of(data, struct iwl4965_priv, request_scan);
6579 struct iwl4965_host_cmd cmd = {
6580 .id = REPLY_SCAN_CMD,
6581 .len = sizeof(struct iwl4965_scan_cmd),
6582 .meta.flags = CMD_SIZE_HUGE,
6583 };
6584 int rc = 0;
6585 struct iwl4965_scan_cmd *scan;
6586 struct ieee80211_conf *conf = NULL;
6587 u16 cmd_len;
6588 enum ieee80211_band band;
6589 u8 direct_mask;
6590
6591 conf = ieee80211_get_hw_conf(priv->hw);
6592
6593 mutex_lock(&priv->mutex);
6594
6595 if (!iwl4965_is_ready(priv)) {
6596 IWL_WARNING("request scan called when driver not ready.\n");
6597 goto done;
6598 }
6599
6600 /* Make sure the scan wasn't cancelled before this queued work
6601 * was given the chance to run... */
6602 if (!test_bit(STATUS_SCANNING, &priv->status))
6603 goto done;
6604
6605 /* This should never be called or scheduled if there is currently
6606 * a scan active in the hardware. */
6607 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6608 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6609 "Ignoring second request.\n");
6610 rc = -EIO;
6611 goto done;
6612 }
6613
6614 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6615 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6616 goto done;
6617 }
6618
6619 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6620 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6621 goto done;
6622 }
6623
6624 if (iwl4965_is_rfkill(priv)) {
6625 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6626 goto done;
6627 }
6628
6629 if (!test_bit(STATUS_READY, &priv->status)) {
6630 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6631 goto done;
6632 }
6633
6634 if (!priv->scan_bands) {
6635 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6636 goto done;
6637 }
6638
6639 if (!priv->scan) {
6640 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
6641 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6642 if (!priv->scan) {
6643 rc = -ENOMEM;
6644 goto done;
6645 }
6646 }
6647 scan = priv->scan;
6648 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
6649
6650 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6651 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6652
6653 if (iwl4965_is_associated(priv)) {
6654 u16 interval = 0;
6655 u32 extra;
6656 u32 suspend_time = 100;
6657 u32 scan_suspend_time = 100;
6658 unsigned long flags;
6659
6660 IWL_DEBUG_INFO("Scanning while associated...\n");
6661
6662 spin_lock_irqsave(&priv->lock, flags);
6663 interval = priv->beacon_int;
6664 spin_unlock_irqrestore(&priv->lock, flags);
6665
6666 scan->suspend_time = 0;
6667 scan->max_out_time = cpu_to_le32(200 * 1024);
6668 if (!interval)
6669 interval = suspend_time;
6670
6671 extra = (suspend_time / interval) << 22;
6672 scan_suspend_time = (extra |
6673 ((suspend_time % interval) * 1024));
6674 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6675 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6676 scan_suspend_time, interval);
6677 }
6678
6679 /* We should add the ability for user to lock to PASSIVE ONLY */
6680 if (priv->one_direct_scan) {
6681 IWL_DEBUG_SCAN
6682 ("Kicking off one direct scan for '%s'\n",
6683 iwl4965_escape_essid(priv->direct_ssid,
6684 priv->direct_ssid_len));
6685 scan->direct_scan[0].id = WLAN_EID_SSID;
6686 scan->direct_scan[0].len = priv->direct_ssid_len;
6687 memcpy(scan->direct_scan[0].ssid,
6688 priv->direct_ssid, priv->direct_ssid_len);
6689 direct_mask = 1;
6690 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
6691 scan->direct_scan[0].id = WLAN_EID_SSID;
6692 scan->direct_scan[0].len = priv->essid_len;
6693 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6694 direct_mask = 1;
6695 } else
6696 direct_mask = 0;
6697
6698 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6699 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6700 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6701
6702
6703 switch (priv->scan_bands) {
6704 case 2:
6705 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6706 scan->tx_cmd.rate_n_flags =
6707 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
6708 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
6709
6710 scan->good_CRC_th = 0;
6711 band = IEEE80211_BAND_2GHZ;
6712 break;
6713
6714 case 1:
6715 scan->tx_cmd.rate_n_flags =
6716 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
6717 RATE_MCS_ANT_B_MSK);
6718 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6719 band = IEEE80211_BAND_5GHZ;
6720 break;
6721
6722 default:
6723 IWL_WARNING("Invalid scan band count\n");
6724 goto done;
6725 }
6726
6727 /* We don't build a direct scan probe request; the uCode will do
6728 * that based on the direct_mask added to each channel entry */
6729 cmd_len = iwl4965_fill_probe_req(priv, band,
6730 (struct ieee80211_mgmt *)scan->data,
6731 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
6732
6733 scan->tx_cmd.len = cpu_to_le16(cmd_len);
6734 /* select Rx chains */
6735
6736 /* Force use of chains B and C (0x6) for scan Rx.
6737 * Avoid A (0x1) because of its off-channel reception on A-band.
6738 * MIMO is not used here, but value is required to make uCode happy. */
6739 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
6740 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
6741 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
6742 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
6743
6744 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6745 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6746
6747 if (direct_mask) {
6748 IWL_DEBUG_SCAN
6749 ("Initiating direct scan for %s.\n",
6750 iwl4965_escape_essid(priv->essid, priv->essid_len));
6751 scan->channel_count =
6752 iwl4965_get_channels_for_scan(
6753 priv, band, 1, /* active */
6754 direct_mask,
6755 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6756 } else {
6757 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6758 scan->channel_count =
6759 iwl4965_get_channels_for_scan(
6760 priv, band, 0, /* passive */
6761 direct_mask,
6762 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6763 }
6764
6765 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6766 scan->channel_count * sizeof(struct iwl4965_scan_channel);
6767 cmd.data = scan;
6768 scan->len = cpu_to_le16(cmd.len);
6769
6770 set_bit(STATUS_SCAN_HW, &priv->status);
6771 rc = iwl4965_send_cmd_sync(priv, &cmd);
6772 if (rc)
6773 goto done;
6774
6775 queue_delayed_work(priv->workqueue, &priv->scan_check,
6776 IWL_SCAN_CHECK_WATCHDOG);
6777
6778 mutex_unlock(&priv->mutex);
6779 return;
6780
6781 done:
6782 /* inform mac80211 scan aborted */
6783 queue_work(priv->workqueue, &priv->scan_completed);
6784 mutex_unlock(&priv->mutex);
6785 }
6786
6787 static void iwl4965_bg_up(struct work_struct *data)
6788 {
6789 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
6790
6791 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6792 return;
6793
6794 mutex_lock(&priv->mutex);
6795 __iwl4965_up(priv);
6796 mutex_unlock(&priv->mutex);
6797 }
6798
6799 static void iwl4965_bg_restart(struct work_struct *data)
6800 {
6801 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
6802
6803 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6804 return;
6805
6806 iwl4965_down(priv);
6807 queue_work(priv->workqueue, &priv->up);
6808 }
6809
6810 static void iwl4965_bg_rx_replenish(struct work_struct *data)
6811 {
6812 struct iwl4965_priv *priv =
6813 container_of(data, struct iwl4965_priv, rx_replenish);
6814
6815 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6816 return;
6817
6818 mutex_lock(&priv->mutex);
6819 iwl4965_rx_replenish(priv);
6820 mutex_unlock(&priv->mutex);
6821 }
6822
6823 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6824
6825 static void iwl4965_bg_post_associate(struct work_struct *data)
6826 {
6827 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
6828 post_associate.work);
6829
6830 int rc = 0;
6831 struct ieee80211_conf *conf = NULL;
6832 DECLARE_MAC_BUF(mac);
6833
6834 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6835 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6836 return;
6837 }
6838
6839 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6840 priv->assoc_id,
6841 print_mac(mac, priv->active_rxon.bssid_addr));
6842
6843
6844 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6845 return;
6846
6847 mutex_lock(&priv->mutex);
6848
6849 if (!priv->vif || !priv->is_open) {
6850 mutex_unlock(&priv->mutex);
6851 return;
6852 }
6853 iwl4965_scan_cancel_timeout(priv, 200);
6854
6855 conf = ieee80211_get_hw_conf(priv->hw);
6856
6857 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6858 iwl4965_commit_rxon(priv);
6859
6860 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
6861 iwl4965_setup_rxon_timing(priv);
6862 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6863 sizeof(priv->rxon_timing), &priv->rxon_timing);
6864 if (rc)
6865 IWL_WARNING("REPLY_RXON_TIMING failed - "
6866 "Attempting to continue.\n");
6867
6868 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6869
6870 #ifdef CONFIG_IWL4965_HT
6871 if (priv->current_ht_config.is_ht)
6872 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
6873 #endif /* CONFIG_IWL4965_HT*/
6874 iwl4965_set_rxon_chain(priv);
6875 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6876
6877 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6878 priv->assoc_id, priv->beacon_int);
6879
6880 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6881 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6882 else
6883 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6884
6885 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6886 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6887 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6888 else
6889 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6890
6891 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6892 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6893
6894 }
6895
6896 iwl4965_commit_rxon(priv);
6897
6898 switch (priv->iw_mode) {
6899 case IEEE80211_IF_TYPE_STA:
6900 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
6901 break;
6902
6903 case IEEE80211_IF_TYPE_IBSS:
6904
6905 /* clear out the station table */
6906 iwl4965_clear_stations_table(priv);
6907
6908 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
6909 iwl4965_rxon_add_station(priv, priv->bssid, 0);
6910 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
6911 iwl4965_send_beacon_cmd(priv);
6912
6913 break;
6914
6915 default:
6916 IWL_ERROR("%s Should not be called in %d mode\n",
6917 __FUNCTION__, priv->iw_mode);
6918 break;
6919 }
6920
6921 iwl4965_sequence_reset(priv);
6922
6923 #ifdef CONFIG_IWL4965_SENSITIVITY
6924 /* Enable Rx differential gain and sensitivity calibrations */
6925 iwl4965_chain_noise_reset(priv);
6926 priv->start_calib = 1;
6927 #endif /* CONFIG_IWL4965_SENSITIVITY */
6928
6929 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6930 priv->assoc_station_added = 1;
6931
6932 iwl4965_activate_qos(priv, 0);
6933
6934 /* we have just associated, don't start scan too early */
6935 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6936 mutex_unlock(&priv->mutex);
6937 }
6938
6939 static void iwl4965_bg_abort_scan(struct work_struct *work)
6940 {
6941 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
6942
6943 if (!iwl4965_is_ready(priv))
6944 return;
6945
6946 mutex_lock(&priv->mutex);
6947
6948 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6949 iwl4965_send_scan_abort(priv);
6950
6951 mutex_unlock(&priv->mutex);
6952 }
6953
6954 static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6955
6956 static void iwl4965_bg_scan_completed(struct work_struct *work)
6957 {
6958 struct iwl4965_priv *priv =
6959 container_of(work, struct iwl4965_priv, scan_completed);
6960
6961 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6962
6963 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6964 return;
6965
6966 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6967 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
6968
6969 ieee80211_scan_completed(priv->hw);
6970
6971 /* Since setting the TXPOWER may have been deferred while
6972 * performing the scan, fire one off */
6973 mutex_lock(&priv->mutex);
6974 iwl4965_hw_reg_send_txpower(priv);
6975 mutex_unlock(&priv->mutex);
6976 }
6977
6978 /*****************************************************************************
6979 *
6980 * mac80211 entry point functions
6981 *
6982 *****************************************************************************/
6983
6984 #define UCODE_READY_TIMEOUT (2 * HZ)
6985
6986 static int iwl4965_mac_start(struct ieee80211_hw *hw)
6987 {
6988 struct iwl4965_priv *priv = hw->priv;
6989 int ret;
6990
6991 IWL_DEBUG_MAC80211("enter\n");
6992
6993 if (pci_enable_device(priv->pci_dev)) {
6994 IWL_ERROR("Fail to pci_enable_device\n");
6995 return -ENODEV;
6996 }
6997 pci_restore_state(priv->pci_dev);
6998 pci_enable_msi(priv->pci_dev);
6999
7000 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
7001 DRV_NAME, priv);
7002 if (ret) {
7003 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
7004 goto out_disable_msi;
7005 }
7006
7007 /* we should be verifying the device is ready to be opened */
7008 mutex_lock(&priv->mutex);
7009
7010 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
7011 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
7012 * ucode filename and max sizes are card-specific. */
7013
7014 if (!priv->ucode_code.len) {
7015 ret = iwl4965_read_ucode(priv);
7016 if (ret) {
7017 IWL_ERROR("Could not read microcode: %d\n", ret);
7018 mutex_unlock(&priv->mutex);
7019 goto out_release_irq;
7020 }
7021 }
7022
7023 ret = __iwl4965_up(priv);
7024
7025 mutex_unlock(&priv->mutex);
7026
7027 if (ret)
7028 goto out_release_irq;
7029
7030 IWL_DEBUG_INFO("Start UP work done.\n");
7031
7032 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
7033 return 0;
7034
7035 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
7036 * mac80211 will not be run successfully. */
7037 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
7038 test_bit(STATUS_READY, &priv->status),
7039 UCODE_READY_TIMEOUT);
7040 if (!ret) {
7041 if (!test_bit(STATUS_READY, &priv->status)) {
7042 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
7043 jiffies_to_msecs(UCODE_READY_TIMEOUT));
7044 ret = -ETIMEDOUT;
7045 goto out_release_irq;
7046 }
7047 }
7048
7049 priv->is_open = 1;
7050 IWL_DEBUG_MAC80211("leave\n");
7051 return 0;
7052
7053 out_release_irq:
7054 free_irq(priv->pci_dev->irq, priv);
7055 out_disable_msi:
7056 pci_disable_msi(priv->pci_dev);
7057 pci_disable_device(priv->pci_dev);
7058 priv->is_open = 0;
7059 IWL_DEBUG_MAC80211("leave - failed\n");
7060 return ret;
7061 }
7062
7063 static void iwl4965_mac_stop(struct ieee80211_hw *hw)
7064 {
7065 struct iwl4965_priv *priv = hw->priv;
7066
7067 IWL_DEBUG_MAC80211("enter\n");
7068
7069 if (!priv->is_open) {
7070 IWL_DEBUG_MAC80211("leave - skip\n");
7071 return;
7072 }
7073
7074 priv->is_open = 0;
7075
7076 if (iwl4965_is_ready_rf(priv)) {
7077 /* stop mac, cancel any scan request and clear
7078 * RXON_FILTER_ASSOC_MSK BIT
7079 */
7080 mutex_lock(&priv->mutex);
7081 iwl4965_scan_cancel_timeout(priv, 100);
7082 cancel_delayed_work(&priv->post_associate);
7083 mutex_unlock(&priv->mutex);
7084 }
7085
7086 iwl4965_down(priv);
7087
7088 flush_workqueue(priv->workqueue);
7089 free_irq(priv->pci_dev->irq, priv);
7090 pci_disable_msi(priv->pci_dev);
7091 pci_save_state(priv->pci_dev);
7092 pci_disable_device(priv->pci_dev);
7093
7094 IWL_DEBUG_MAC80211("leave\n");
7095 }
7096
7097 static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
7098 struct ieee80211_tx_control *ctl)
7099 {
7100 struct iwl4965_priv *priv = hw->priv;
7101
7102 IWL_DEBUG_MAC80211("enter\n");
7103
7104 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7105 IWL_DEBUG_MAC80211("leave - monitor\n");
7106 return -1;
7107 }
7108
7109 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7110 ctl->tx_rate->bitrate);
7111
7112 if (iwl4965_tx_skb(priv, skb, ctl))
7113 dev_kfree_skb_any(skb);
7114
7115 IWL_DEBUG_MAC80211("leave\n");
7116 return 0;
7117 }
7118
7119 static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
7120 struct ieee80211_if_init_conf *conf)
7121 {
7122 struct iwl4965_priv *priv = hw->priv;
7123 unsigned long flags;
7124 DECLARE_MAC_BUF(mac);
7125
7126 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
7127
7128 if (priv->vif) {
7129 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
7130 return -EOPNOTSUPP;
7131 }
7132
7133 spin_lock_irqsave(&priv->lock, flags);
7134 priv->vif = conf->vif;
7135
7136 spin_unlock_irqrestore(&priv->lock, flags);
7137
7138 mutex_lock(&priv->mutex);
7139
7140 if (conf->mac_addr) {
7141 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7142 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7143 }
7144
7145 if (iwl4965_is_ready(priv))
7146 iwl4965_set_mode(priv, conf->type);
7147
7148 mutex_unlock(&priv->mutex);
7149
7150 IWL_DEBUG_MAC80211("leave\n");
7151 return 0;
7152 }
7153
7154 /**
7155 * iwl4965_mac_config - mac80211 config callback
7156 *
7157 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7158 * be set inappropriately and the driver currently sets the hardware up to
7159 * use it whenever needed.
7160 */
7161 static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
7162 {
7163 struct iwl4965_priv *priv = hw->priv;
7164 const struct iwl4965_channel_info *ch_info;
7165 unsigned long flags;
7166 int ret = 0;
7167
7168 mutex_lock(&priv->mutex);
7169 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
7170
7171 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7172
7173 if (!iwl4965_is_ready(priv)) {
7174 IWL_DEBUG_MAC80211("leave - not ready\n");
7175 ret = -EIO;
7176 goto out;
7177 }
7178
7179 if (unlikely(!iwl4965_param_disable_hw_scan &&
7180 test_bit(STATUS_SCANNING, &priv->status))) {
7181 IWL_DEBUG_MAC80211("leave - scanning\n");
7182 set_bit(STATUS_CONF_PENDING, &priv->status);
7183 mutex_unlock(&priv->mutex);
7184 return 0;
7185 }
7186
7187 spin_lock_irqsave(&priv->lock, flags);
7188
7189 ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
7190 ieee80211_frequency_to_channel(conf->channel->center_freq));
7191 if (!is_channel_valid(ch_info)) {
7192 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7193 spin_unlock_irqrestore(&priv->lock, flags);
7194 ret = -EINVAL;
7195 goto out;
7196 }
7197
7198 #ifdef CONFIG_IWL4965_HT
7199 /* if we are switching from ht to 2.4 clear flags
7200 * from any ht related info since 2.4 does not
7201 * support ht */
7202 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
7203 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7204 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7205 #endif
7206 )
7207 priv->staging_rxon.flags = 0;
7208 #endif /* CONFIG_IWL4965_HT */
7209
7210 iwl4965_set_rxon_channel(priv, conf->channel->band,
7211 ieee80211_frequency_to_channel(conf->channel->center_freq));
7212
7213 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
7214
7215 /* The list of supported rates and rate mask can be different
7216 * for each band; since the band may have changed, reset
7217 * the rate mask to what mac80211 lists */
7218 iwl4965_set_rate(priv);
7219
7220 spin_unlock_irqrestore(&priv->lock, flags);
7221
7222 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7223 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7224 iwl4965_hw_channel_switch(priv, conf->channel);
7225 goto out;
7226 }
7227 #endif
7228
7229 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
7230
7231 if (!conf->radio_enabled) {
7232 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7233 goto out;
7234 }
7235
7236 if (iwl4965_is_rfkill(priv)) {
7237 IWL_DEBUG_MAC80211("leave - RF kill\n");
7238 ret = -EIO;
7239 goto out;
7240 }
7241
7242 iwl4965_set_rate(priv);
7243
7244 if (memcmp(&priv->active_rxon,
7245 &priv->staging_rxon, sizeof(priv->staging_rxon)))
7246 iwl4965_commit_rxon(priv);
7247 else
7248 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7249
7250 IWL_DEBUG_MAC80211("leave\n");
7251
7252 out:
7253 clear_bit(STATUS_CONF_PENDING, &priv->status);
7254 mutex_unlock(&priv->mutex);
7255 return ret;
7256 }
7257
7258 static void iwl4965_config_ap(struct iwl4965_priv *priv)
7259 {
7260 int rc = 0;
7261
7262 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7263 return;
7264
7265 /* The following should be done only at AP bring up */
7266 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7267
7268 /* RXON - unassoc (to set timing command) */
7269 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7270 iwl4965_commit_rxon(priv);
7271
7272 /* RXON Timing */
7273 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7274 iwl4965_setup_rxon_timing(priv);
7275 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7276 sizeof(priv->rxon_timing), &priv->rxon_timing);
7277 if (rc)
7278 IWL_WARNING("REPLY_RXON_TIMING failed - "
7279 "Attempting to continue.\n");
7280
7281 iwl4965_set_rxon_chain(priv);
7282
7283 /* FIXME: what should be the assoc_id for AP? */
7284 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7285 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7286 priv->staging_rxon.flags |=
7287 RXON_FLG_SHORT_PREAMBLE_MSK;
7288 else
7289 priv->staging_rxon.flags &=
7290 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7291
7292 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7293 if (priv->assoc_capability &
7294 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7295 priv->staging_rxon.flags |=
7296 RXON_FLG_SHORT_SLOT_MSK;
7297 else
7298 priv->staging_rxon.flags &=
7299 ~RXON_FLG_SHORT_SLOT_MSK;
7300
7301 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7302 priv->staging_rxon.flags &=
7303 ~RXON_FLG_SHORT_SLOT_MSK;
7304 }
7305 /* restore RXON assoc */
7306 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7307 iwl4965_commit_rxon(priv);
7308 iwl4965_activate_qos(priv, 1);
7309 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7310 }
7311 iwl4965_send_beacon_cmd(priv);
7312
7313 /* FIXME - we need to add code here to detect a totally new
7314 * configuration, reset the AP, unassoc, rxon timing, assoc,
7315 * clear sta table, add BCAST sta... */
7316 }
7317
7318 static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
7319 struct ieee80211_vif *vif,
7320 struct ieee80211_if_conf *conf)
7321 {
7322 struct iwl4965_priv *priv = hw->priv;
7323 DECLARE_MAC_BUF(mac);
7324 unsigned long flags;
7325 int rc;
7326
7327 if (conf == NULL)
7328 return -EIO;
7329
7330 if (priv->vif != vif) {
7331 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
7332 mutex_unlock(&priv->mutex);
7333 return 0;
7334 }
7335
7336 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7337 (!conf->beacon || !conf->ssid_len)) {
7338 IWL_DEBUG_MAC80211
7339 ("Leaving in AP mode because HostAPD is not ready.\n");
7340 return 0;
7341 }
7342
7343 if (!iwl4965_is_alive(priv))
7344 return -EAGAIN;
7345
7346 mutex_lock(&priv->mutex);
7347
7348 if (conf->bssid)
7349 IWL_DEBUG_MAC80211("bssid: %s\n",
7350 print_mac(mac, conf->bssid));
7351
7352 /*
7353 * very dubious code was here; the probe filtering flag is never set:
7354 *
7355 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7356 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7357 */
7358
7359 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7360 if (!conf->bssid) {
7361 conf->bssid = priv->mac_addr;
7362 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7363 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7364 print_mac(mac, conf->bssid));
7365 }
7366 if (priv->ibss_beacon)
7367 dev_kfree_skb(priv->ibss_beacon);
7368
7369 priv->ibss_beacon = conf->beacon;
7370 }
7371
7372 if (iwl4965_is_rfkill(priv))
7373 goto done;
7374
7375 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7376 !is_multicast_ether_addr(conf->bssid)) {
7377 /* If there is currently a HW scan going on in the background
7378 * then we need to cancel it else the RXON below will fail. */
7379 if (iwl4965_scan_cancel_timeout(priv, 100)) {
7380 IWL_WARNING("Aborted scan still in progress "
7381 "after 100ms\n");
7382 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7383 mutex_unlock(&priv->mutex);
7384 return -EAGAIN;
7385 }
7386 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7387
7388 /* TODO: Audit driver for usage of these members and see
7389 * if mac80211 deprecates them (priv->bssid looks like it
7390 * shouldn't be there, but I haven't scanned the IBSS code
7391 * to verify) - jpk */
7392 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7393
7394 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7395 iwl4965_config_ap(priv);
7396 else {
7397 rc = iwl4965_commit_rxon(priv);
7398 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7399 iwl4965_rxon_add_station(
7400 priv, priv->active_rxon.bssid_addr, 1);
7401 }
7402
7403 } else {
7404 iwl4965_scan_cancel_timeout(priv, 100);
7405 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7406 iwl4965_commit_rxon(priv);
7407 }
7408
7409 done:
7410 spin_lock_irqsave(&priv->lock, flags);
7411 if (!conf->ssid_len)
7412 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7413 else
7414 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7415
7416 priv->essid_len = conf->ssid_len;
7417 spin_unlock_irqrestore(&priv->lock, flags);
7418
7419 IWL_DEBUG_MAC80211("leave\n");
7420 mutex_unlock(&priv->mutex);
7421
7422 return 0;
7423 }
7424
7425 static void iwl4965_configure_filter(struct ieee80211_hw *hw,
7426 unsigned int changed_flags,
7427 unsigned int *total_flags,
7428 int mc_count, struct dev_addr_list *mc_list)
7429 {
7430 /*
7431 * XXX: dummy
7432 * see also iwl4965_connection_init_rx_config
7433 */
7434 *total_flags = 0;
7435 }
7436
7437 static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
7438 struct ieee80211_if_init_conf *conf)
7439 {
7440 struct iwl4965_priv *priv = hw->priv;
7441
7442 IWL_DEBUG_MAC80211("enter\n");
7443
7444 mutex_lock(&priv->mutex);
7445
7446 if (iwl4965_is_ready_rf(priv)) {
7447 iwl4965_scan_cancel_timeout(priv, 100);
7448 cancel_delayed_work(&priv->post_associate);
7449 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7450 iwl4965_commit_rxon(priv);
7451 }
7452 if (priv->vif == conf->vif) {
7453 priv->vif = NULL;
7454 memset(priv->bssid, 0, ETH_ALEN);
7455 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7456 priv->essid_len = 0;
7457 }
7458 mutex_unlock(&priv->mutex);
7459
7460 IWL_DEBUG_MAC80211("leave\n");
7461
7462 }
7463
7464 static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
7465 struct ieee80211_vif *vif,
7466 struct ieee80211_bss_conf *bss_conf,
7467 u32 changes)
7468 {
7469 struct iwl4965_priv *priv = hw->priv;
7470
7471 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
7472 if (bss_conf->use_short_preamble)
7473 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7474 else
7475 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7476 }
7477
7478 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
7479 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
7480 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7481 else
7482 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7483 }
7484
7485 if (changes & BSS_CHANGED_ASSOC) {
7486 /*
7487 * TODO:
7488 * do stuff instead of sniffing assoc resp
7489 */
7490 }
7491
7492 if (iwl4965_is_associated(priv))
7493 iwl4965_send_rxon_assoc(priv);
7494 }
7495
7496 static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7497 {
7498 int rc = 0;
7499 unsigned long flags;
7500 struct iwl4965_priv *priv = hw->priv;
7501
7502 IWL_DEBUG_MAC80211("enter\n");
7503
7504 mutex_lock(&priv->mutex);
7505 spin_lock_irqsave(&priv->lock, flags);
7506
7507 if (!iwl4965_is_ready_rf(priv)) {
7508 rc = -EIO;
7509 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7510 goto out_unlock;
7511 }
7512
7513 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7514 rc = -EIO;
7515 IWL_ERROR("ERROR: APs don't scan\n");
7516 goto out_unlock;
7517 }
7518
7519 /* we don't schedule scan within next_scan_jiffies period */
7520 if (priv->next_scan_jiffies &&
7521 time_after(priv->next_scan_jiffies, jiffies)) {
7522 rc = -EAGAIN;
7523 goto out_unlock;
7524 }
7525 /* if we just finished scan ask for delay */
7526 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7527 IWL_DELAY_NEXT_SCAN, jiffies)) {
7528 rc = -EAGAIN;
7529 goto out_unlock;
7530 }
7531 if (len) {
7532 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7533 iwl4965_escape_essid(ssid, len), (int)len);
7534
7535 priv->one_direct_scan = 1;
7536 priv->direct_ssid_len = (u8)
7537 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7538 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7539 } else
7540 priv->one_direct_scan = 0;
7541
7542 rc = iwl4965_scan_initiate(priv);
7543
7544 IWL_DEBUG_MAC80211("leave\n");
7545
7546 out_unlock:
7547 spin_unlock_irqrestore(&priv->lock, flags);
7548 mutex_unlock(&priv->mutex);
7549
7550 return rc;
7551 }
7552
7553 static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7554 const u8 *local_addr, const u8 *addr,
7555 struct ieee80211_key_conf *key)
7556 {
7557 struct iwl4965_priv *priv = hw->priv;
7558 DECLARE_MAC_BUF(mac);
7559 int rc = 0;
7560 u8 sta_id;
7561
7562 IWL_DEBUG_MAC80211("enter\n");
7563
7564 if (!iwl4965_param_hwcrypto) {
7565 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7566 return -EOPNOTSUPP;
7567 }
7568
7569 if (is_zero_ether_addr(addr))
7570 /* only support pairwise keys */
7571 return -EOPNOTSUPP;
7572
7573 sta_id = iwl4965_hw_find_station(priv, addr);
7574 if (sta_id == IWL_INVALID_STATION) {
7575 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7576 print_mac(mac, addr));
7577 return -EINVAL;
7578 }
7579
7580 mutex_lock(&priv->mutex);
7581
7582 iwl4965_scan_cancel_timeout(priv, 100);
7583
7584 switch (cmd) {
7585 case SET_KEY:
7586 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
7587 if (!rc) {
7588 iwl4965_set_rxon_hwcrypto(priv, 1);
7589 iwl4965_commit_rxon(priv);
7590 key->hw_key_idx = sta_id;
7591 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7592 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7593 }
7594 break;
7595 case DISABLE_KEY:
7596 rc = iwl4965_clear_sta_key_info(priv, sta_id);
7597 if (!rc) {
7598 iwl4965_set_rxon_hwcrypto(priv, 0);
7599 iwl4965_commit_rxon(priv);
7600 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7601 }
7602 break;
7603 default:
7604 rc = -EINVAL;
7605 }
7606
7607 IWL_DEBUG_MAC80211("leave\n");
7608 mutex_unlock(&priv->mutex);
7609
7610 return rc;
7611 }
7612
7613 static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7614 const struct ieee80211_tx_queue_params *params)
7615 {
7616 struct iwl4965_priv *priv = hw->priv;
7617 unsigned long flags;
7618 int q;
7619
7620 IWL_DEBUG_MAC80211("enter\n");
7621
7622 if (!iwl4965_is_ready_rf(priv)) {
7623 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7624 return -EIO;
7625 }
7626
7627 if (queue >= AC_NUM) {
7628 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7629 return 0;
7630 }
7631
7632 if (!priv->qos_data.qos_enable) {
7633 priv->qos_data.qos_active = 0;
7634 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7635 return 0;
7636 }
7637 q = AC_NUM - 1 - queue;
7638
7639 spin_lock_irqsave(&priv->lock, flags);
7640
7641 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7642 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7643 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7644 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7645 cpu_to_le16((params->txop * 32));
7646
7647 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7648 priv->qos_data.qos_active = 1;
7649
7650 spin_unlock_irqrestore(&priv->lock, flags);
7651
7652 mutex_lock(&priv->mutex);
7653 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7654 iwl4965_activate_qos(priv, 1);
7655 else if (priv->assoc_id && iwl4965_is_associated(priv))
7656 iwl4965_activate_qos(priv, 0);
7657
7658 mutex_unlock(&priv->mutex);
7659
7660 IWL_DEBUG_MAC80211("leave\n");
7661 return 0;
7662 }
7663
7664 static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
7665 struct ieee80211_tx_queue_stats *stats)
7666 {
7667 struct iwl4965_priv *priv = hw->priv;
7668 int i, avail;
7669 struct iwl4965_tx_queue *txq;
7670 struct iwl4965_queue *q;
7671 unsigned long flags;
7672
7673 IWL_DEBUG_MAC80211("enter\n");
7674
7675 if (!iwl4965_is_ready_rf(priv)) {
7676 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7677 return -EIO;
7678 }
7679
7680 spin_lock_irqsave(&priv->lock, flags);
7681
7682 for (i = 0; i < AC_NUM; i++) {
7683 txq = &priv->txq[i];
7684 q = &txq->q;
7685 avail = iwl4965_queue_space(q);
7686
7687 stats->data[i].len = q->n_window - avail;
7688 stats->data[i].limit = q->n_window - q->high_mark;
7689 stats->data[i].count = q->n_window;
7690
7691 }
7692 spin_unlock_irqrestore(&priv->lock, flags);
7693
7694 IWL_DEBUG_MAC80211("leave\n");
7695
7696 return 0;
7697 }
7698
7699 static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
7700 struct ieee80211_low_level_stats *stats)
7701 {
7702 IWL_DEBUG_MAC80211("enter\n");
7703 IWL_DEBUG_MAC80211("leave\n");
7704
7705 return 0;
7706 }
7707
7708 static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
7709 {
7710 IWL_DEBUG_MAC80211("enter\n");
7711 IWL_DEBUG_MAC80211("leave\n");
7712
7713 return 0;
7714 }
7715
7716 static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
7717 {
7718 struct iwl4965_priv *priv = hw->priv;
7719 unsigned long flags;
7720
7721 mutex_lock(&priv->mutex);
7722 IWL_DEBUG_MAC80211("enter\n");
7723
7724 priv->lq_mngr.lq_ready = 0;
7725 #ifdef CONFIG_IWL4965_HT
7726 spin_lock_irqsave(&priv->lock, flags);
7727 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
7728 spin_unlock_irqrestore(&priv->lock, flags);
7729 #endif /* CONFIG_IWL4965_HT */
7730
7731 iwl4965_reset_qos(priv);
7732
7733 cancel_delayed_work(&priv->post_associate);
7734
7735 spin_lock_irqsave(&priv->lock, flags);
7736 priv->assoc_id = 0;
7737 priv->assoc_capability = 0;
7738 priv->call_post_assoc_from_beacon = 0;
7739 priv->assoc_station_added = 0;
7740
7741 /* new association get rid of ibss beacon skb */
7742 if (priv->ibss_beacon)
7743 dev_kfree_skb(priv->ibss_beacon);
7744
7745 priv->ibss_beacon = NULL;
7746
7747 priv->beacon_int = priv->hw->conf.beacon_int;
7748 priv->timestamp1 = 0;
7749 priv->timestamp0 = 0;
7750 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7751 priv->beacon_int = 0;
7752
7753 spin_unlock_irqrestore(&priv->lock, flags);
7754
7755 if (!iwl4965_is_ready_rf(priv)) {
7756 IWL_DEBUG_MAC80211("leave - not ready\n");
7757 mutex_unlock(&priv->mutex);
7758 return;
7759 }
7760
7761 /* we are restarting association process
7762 * clear RXON_FILTER_ASSOC_MSK bit
7763 */
7764 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7765 iwl4965_scan_cancel_timeout(priv, 100);
7766 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7767 iwl4965_commit_rxon(priv);
7768 }
7769
7770 /* Per mac80211.h: This is only used in IBSS mode... */
7771 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7772
7773 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7774 mutex_unlock(&priv->mutex);
7775 return;
7776 }
7777
7778 priv->only_active_channel = 0;
7779
7780 iwl4965_set_rate(priv);
7781
7782 mutex_unlock(&priv->mutex);
7783
7784 IWL_DEBUG_MAC80211("leave\n");
7785 }
7786
7787 static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
7788 struct ieee80211_tx_control *control)
7789 {
7790 struct iwl4965_priv *priv = hw->priv;
7791 unsigned long flags;
7792
7793 mutex_lock(&priv->mutex);
7794 IWL_DEBUG_MAC80211("enter\n");
7795
7796 if (!iwl4965_is_ready_rf(priv)) {
7797 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7798 mutex_unlock(&priv->mutex);
7799 return -EIO;
7800 }
7801
7802 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7803 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7804 mutex_unlock(&priv->mutex);
7805 return -EIO;
7806 }
7807
7808 spin_lock_irqsave(&priv->lock, flags);
7809
7810 if (priv->ibss_beacon)
7811 dev_kfree_skb(priv->ibss_beacon);
7812
7813 priv->ibss_beacon = skb;
7814
7815 priv->assoc_id = 0;
7816
7817 IWL_DEBUG_MAC80211("leave\n");
7818 spin_unlock_irqrestore(&priv->lock, flags);
7819
7820 iwl4965_reset_qos(priv);
7821
7822 queue_work(priv->workqueue, &priv->post_associate.work);
7823
7824 mutex_unlock(&priv->mutex);
7825
7826 return 0;
7827 }
7828
7829 #ifdef CONFIG_IWL4965_HT
7830
7831 static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
7832 struct iwl4965_priv *priv)
7833 {
7834 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
7835 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
7836 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
7837
7838 IWL_DEBUG_MAC80211("enter: \n");
7839
7840 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
7841 iwl_conf->is_ht = 0;
7842 return;
7843 }
7844
7845 iwl_conf->is_ht = 1;
7846 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
7847
7848 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
7849 iwl_conf->sgf |= 0x1;
7850 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
7851 iwl_conf->sgf |= 0x2;
7852
7853 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
7854 iwl_conf->max_amsdu_size =
7855 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
7856
7857 iwl_conf->supported_chan_width =
7858 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
7859 iwl_conf->extension_chan_offset =
7860 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
7861 /* If no above or below channel supplied disable FAT channel */
7862 if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
7863 iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
7864 iwl_conf->supported_chan_width = 0;
7865
7866 iwl_conf->tx_mimo_ps_mode =
7867 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
7868 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
7869
7870 iwl_conf->control_channel = ht_bss_conf->primary_channel;
7871 iwl_conf->tx_chan_width =
7872 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
7873 iwl_conf->ht_protection =
7874 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
7875 iwl_conf->non_GF_STA_present =
7876 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
7877
7878 IWL_DEBUG_MAC80211("control channel %d\n",
7879 iwl_conf->control_channel);
7880 IWL_DEBUG_MAC80211("leave\n");
7881 }
7882
7883 static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
7884 struct ieee80211_conf *conf)
7885 {
7886 struct iwl4965_priv *priv = hw->priv;
7887
7888 IWL_DEBUG_MAC80211("enter: \n");
7889
7890 iwl4965_ht_info_fill(conf, priv);
7891 iwl4965_set_rxon_chain(priv);
7892
7893 if (priv && priv->assoc_id &&
7894 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
7895 unsigned long flags;
7896
7897 spin_lock_irqsave(&priv->lock, flags);
7898 if (priv->beacon_int)
7899 queue_work(priv->workqueue, &priv->post_associate.work);
7900 else
7901 priv->call_post_assoc_from_beacon = 1;
7902 spin_unlock_irqrestore(&priv->lock, flags);
7903 }
7904
7905 IWL_DEBUG_MAC80211("leave:\n");
7906 return 0;
7907 }
7908
7909 #endif /*CONFIG_IWL4965_HT*/
7910
7911 /*****************************************************************************
7912 *
7913 * sysfs attributes
7914 *
7915 *****************************************************************************/
7916
7917 #ifdef CONFIG_IWL4965_DEBUG
7918
7919 /*
7920 * The following adds a new attribute to the sysfs representation
7921 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7922 * used for controlling the debug level.
7923 *
7924 * See the level definitions in iwl for details.
7925 */
7926
7927 static ssize_t show_debug_level(struct device_driver *d, char *buf)
7928 {
7929 return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
7930 }
7931 static ssize_t store_debug_level(struct device_driver *d,
7932 const char *buf, size_t count)
7933 {
7934 char *p = (char *)buf;
7935 u32 val;
7936
7937 val = simple_strtoul(p, &p, 0);
7938 if (p == buf)
7939 printk(KERN_INFO DRV_NAME
7940 ": %s is not in hex or decimal form.\n", buf);
7941 else
7942 iwl4965_debug_level = val;
7943
7944 return strnlen(buf, count);
7945 }
7946
7947 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7948 show_debug_level, store_debug_level);
7949
7950 #endif /* CONFIG_IWL4965_DEBUG */
7951
7952 static ssize_t show_rf_kill(struct device *d,
7953 struct device_attribute *attr, char *buf)
7954 {
7955 /*
7956 * 0 - RF kill not enabled
7957 * 1 - SW based RF kill active (sysfs)
7958 * 2 - HW based RF kill active
7959 * 3 - Both HW and SW based RF kill active
7960 */
7961 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
7962 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7963 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7964
7965 return sprintf(buf, "%i\n", val);
7966 }
7967
7968 static ssize_t store_rf_kill(struct device *d,
7969 struct device_attribute *attr,
7970 const char *buf, size_t count)
7971 {
7972 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
7973
7974 mutex_lock(&priv->mutex);
7975 iwl4965_radio_kill_sw(priv, buf[0] == '1');
7976 mutex_unlock(&priv->mutex);
7977
7978 return count;
7979 }
7980
7981 static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7982
7983 static ssize_t show_temperature(struct device *d,
7984 struct device_attribute *attr, char *buf)
7985 {
7986 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
7987
7988 if (!iwl4965_is_alive(priv))
7989 return -EAGAIN;
7990
7991 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
7992 }
7993
7994 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7995
7996 static ssize_t show_rs_window(struct device *d,
7997 struct device_attribute *attr,
7998 char *buf)
7999 {
8000 struct iwl4965_priv *priv = d->driver_data;
8001 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
8002 }
8003 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8004
8005 static ssize_t show_tx_power(struct device *d,
8006 struct device_attribute *attr, char *buf)
8007 {
8008 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8009 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8010 }
8011
8012 static ssize_t store_tx_power(struct device *d,
8013 struct device_attribute *attr,
8014 const char *buf, size_t count)
8015 {
8016 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8017 char *p = (char *)buf;
8018 u32 val;
8019
8020 val = simple_strtoul(p, &p, 10);
8021 if (p == buf)
8022 printk(KERN_INFO DRV_NAME
8023 ": %s is not in decimal form.\n", buf);
8024 else
8025 iwl4965_hw_reg_set_txpower(priv, val);
8026
8027 return count;
8028 }
8029
8030 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8031
8032 static ssize_t show_flags(struct device *d,
8033 struct device_attribute *attr, char *buf)
8034 {
8035 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8036
8037 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8038 }
8039
8040 static ssize_t store_flags(struct device *d,
8041 struct device_attribute *attr,
8042 const char *buf, size_t count)
8043 {
8044 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8045 u32 flags = simple_strtoul(buf, NULL, 0);
8046
8047 mutex_lock(&priv->mutex);
8048 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8049 /* Cancel any currently running scans... */
8050 if (iwl4965_scan_cancel_timeout(priv, 100))
8051 IWL_WARNING("Could not cancel scan.\n");
8052 else {
8053 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8054 flags);
8055 priv->staging_rxon.flags = cpu_to_le32(flags);
8056 iwl4965_commit_rxon(priv);
8057 }
8058 }
8059 mutex_unlock(&priv->mutex);
8060
8061 return count;
8062 }
8063
8064 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8065
8066 static ssize_t show_filter_flags(struct device *d,
8067 struct device_attribute *attr, char *buf)
8068 {
8069 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8070
8071 return sprintf(buf, "0x%04X\n",
8072 le32_to_cpu(priv->active_rxon.filter_flags));
8073 }
8074
8075 static ssize_t store_filter_flags(struct device *d,
8076 struct device_attribute *attr,
8077 const char *buf, size_t count)
8078 {
8079 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8080 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8081
8082 mutex_lock(&priv->mutex);
8083 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8084 /* Cancel any currently running scans... */
8085 if (iwl4965_scan_cancel_timeout(priv, 100))
8086 IWL_WARNING("Could not cancel scan.\n");
8087 else {
8088 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8089 "0x%04X\n", filter_flags);
8090 priv->staging_rxon.filter_flags =
8091 cpu_to_le32(filter_flags);
8092 iwl4965_commit_rxon(priv);
8093 }
8094 }
8095 mutex_unlock(&priv->mutex);
8096
8097 return count;
8098 }
8099
8100 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8101 store_filter_flags);
8102
8103 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
8104
8105 static ssize_t show_measurement(struct device *d,
8106 struct device_attribute *attr, char *buf)
8107 {
8108 struct iwl4965_priv *priv = dev_get_drvdata(d);
8109 struct iwl4965_spectrum_notification measure_report;
8110 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8111 u8 *data = (u8 *) & measure_report;
8112 unsigned long flags;
8113
8114 spin_lock_irqsave(&priv->lock, flags);
8115 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8116 spin_unlock_irqrestore(&priv->lock, flags);
8117 return 0;
8118 }
8119 memcpy(&measure_report, &priv->measure_report, size);
8120 priv->measurement_status = 0;
8121 spin_unlock_irqrestore(&priv->lock, flags);
8122
8123 while (size && (PAGE_SIZE - len)) {
8124 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8125 PAGE_SIZE - len, 1);
8126 len = strlen(buf);
8127 if (PAGE_SIZE - len)
8128 buf[len++] = '\n';
8129
8130 ofs += 16;
8131 size -= min(size, 16U);
8132 }
8133
8134 return len;
8135 }
8136
8137 static ssize_t store_measurement(struct device *d,
8138 struct device_attribute *attr,
8139 const char *buf, size_t count)
8140 {
8141 struct iwl4965_priv *priv = dev_get_drvdata(d);
8142 struct ieee80211_measurement_params params = {
8143 .channel = le16_to_cpu(priv->active_rxon.channel),
8144 .start_time = cpu_to_le64(priv->last_tsf),
8145 .duration = cpu_to_le16(1),
8146 };
8147 u8 type = IWL_MEASURE_BASIC;
8148 u8 buffer[32];
8149 u8 channel;
8150
8151 if (count) {
8152 char *p = buffer;
8153 strncpy(buffer, buf, min(sizeof(buffer), count));
8154 channel = simple_strtoul(p, NULL, 0);
8155 if (channel)
8156 params.channel = channel;
8157
8158 p = buffer;
8159 while (*p && *p != ' ')
8160 p++;
8161 if (*p)
8162 type = simple_strtoul(p + 1, NULL, 0);
8163 }
8164
8165 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8166 "channel %d (for '%s')\n", type, params.channel, buf);
8167 iwl4965_get_measurement(priv, &params, type);
8168
8169 return count;
8170 }
8171
8172 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8173 show_measurement, store_measurement);
8174 #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
8175
8176 static ssize_t store_retry_rate(struct device *d,
8177 struct device_attribute *attr,
8178 const char *buf, size_t count)
8179 {
8180 struct iwl4965_priv *priv = dev_get_drvdata(d);
8181
8182 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8183 if (priv->retry_rate <= 0)
8184 priv->retry_rate = 1;
8185
8186 return count;
8187 }
8188
8189 static ssize_t show_retry_rate(struct device *d,
8190 struct device_attribute *attr, char *buf)
8191 {
8192 struct iwl4965_priv *priv = dev_get_drvdata(d);
8193 return sprintf(buf, "%d", priv->retry_rate);
8194 }
8195
8196 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8197 store_retry_rate);
8198
8199 static ssize_t store_power_level(struct device *d,
8200 struct device_attribute *attr,
8201 const char *buf, size_t count)
8202 {
8203 struct iwl4965_priv *priv = dev_get_drvdata(d);
8204 int rc;
8205 int mode;
8206
8207 mode = simple_strtoul(buf, NULL, 0);
8208 mutex_lock(&priv->mutex);
8209
8210 if (!iwl4965_is_ready(priv)) {
8211 rc = -EAGAIN;
8212 goto out;
8213 }
8214
8215 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8216 mode = IWL_POWER_AC;
8217 else
8218 mode |= IWL_POWER_ENABLED;
8219
8220 if (mode != priv->power_mode) {
8221 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
8222 if (rc) {
8223 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8224 goto out;
8225 }
8226 priv->power_mode = mode;
8227 }
8228
8229 rc = count;
8230
8231 out:
8232 mutex_unlock(&priv->mutex);
8233 return rc;
8234 }
8235
8236 #define MAX_WX_STRING 80
8237
8238 /* Values are in microsecond */
8239 static const s32 timeout_duration[] = {
8240 350000,
8241 250000,
8242 75000,
8243 37000,
8244 25000,
8245 };
8246 static const s32 period_duration[] = {
8247 400000,
8248 700000,
8249 1000000,
8250 1000000,
8251 1000000
8252 };
8253
8254 static ssize_t show_power_level(struct device *d,
8255 struct device_attribute *attr, char *buf)
8256 {
8257 struct iwl4965_priv *priv = dev_get_drvdata(d);
8258 int level = IWL_POWER_LEVEL(priv->power_mode);
8259 char *p = buf;
8260
8261 p += sprintf(p, "%d ", level);
8262 switch (level) {
8263 case IWL_POWER_MODE_CAM:
8264 case IWL_POWER_AC:
8265 p += sprintf(p, "(AC)");
8266 break;
8267 case IWL_POWER_BATTERY:
8268 p += sprintf(p, "(BATTERY)");
8269 break;
8270 default:
8271 p += sprintf(p,
8272 "(Timeout %dms, Period %dms)",
8273 timeout_duration[level - 1] / 1000,
8274 period_duration[level - 1] / 1000);
8275 }
8276
8277 if (!(priv->power_mode & IWL_POWER_ENABLED))
8278 p += sprintf(p, " OFF\n");
8279 else
8280 p += sprintf(p, " \n");
8281
8282 return (p - buf + 1);
8283
8284 }
8285
8286 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8287 store_power_level);
8288
8289 static ssize_t show_channels(struct device *d,
8290 struct device_attribute *attr, char *buf)
8291 {
8292 /* all this shit doesn't belong into sysfs anyway */
8293 return 0;
8294 }
8295
8296 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8297
8298 static ssize_t show_statistics(struct device *d,
8299 struct device_attribute *attr, char *buf)
8300 {
8301 struct iwl4965_priv *priv = dev_get_drvdata(d);
8302 u32 size = sizeof(struct iwl4965_notif_statistics);
8303 u32 len = 0, ofs = 0;
8304 u8 *data = (u8 *) & priv->statistics;
8305 int rc = 0;
8306
8307 if (!iwl4965_is_alive(priv))
8308 return -EAGAIN;
8309
8310 mutex_lock(&priv->mutex);
8311 rc = iwl4965_send_statistics_request(priv);
8312 mutex_unlock(&priv->mutex);
8313
8314 if (rc) {
8315 len = sprintf(buf,
8316 "Error sending statistics request: 0x%08X\n", rc);
8317 return len;
8318 }
8319
8320 while (size && (PAGE_SIZE - len)) {
8321 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8322 PAGE_SIZE - len, 1);
8323 len = strlen(buf);
8324 if (PAGE_SIZE - len)
8325 buf[len++] = '\n';
8326
8327 ofs += 16;
8328 size -= min(size, 16U);
8329 }
8330
8331 return len;
8332 }
8333
8334 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8335
8336 static ssize_t show_antenna(struct device *d,
8337 struct device_attribute *attr, char *buf)
8338 {
8339 struct iwl4965_priv *priv = dev_get_drvdata(d);
8340
8341 if (!iwl4965_is_alive(priv))
8342 return -EAGAIN;
8343
8344 return sprintf(buf, "%d\n", priv->antenna);
8345 }
8346
8347 static ssize_t store_antenna(struct device *d,
8348 struct device_attribute *attr,
8349 const char *buf, size_t count)
8350 {
8351 int ant;
8352 struct iwl4965_priv *priv = dev_get_drvdata(d);
8353
8354 if (count == 0)
8355 return 0;
8356
8357 if (sscanf(buf, "%1i", &ant) != 1) {
8358 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8359 return count;
8360 }
8361
8362 if ((ant >= 0) && (ant <= 2)) {
8363 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8364 priv->antenna = (enum iwl4965_antenna)ant;
8365 } else
8366 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8367
8368
8369 return count;
8370 }
8371
8372 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8373
8374 static ssize_t show_status(struct device *d,
8375 struct device_attribute *attr, char *buf)
8376 {
8377 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8378 if (!iwl4965_is_alive(priv))
8379 return -EAGAIN;
8380 return sprintf(buf, "0x%08x\n", (int)priv->status);
8381 }
8382
8383 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8384
8385 static ssize_t dump_error_log(struct device *d,
8386 struct device_attribute *attr,
8387 const char *buf, size_t count)
8388 {
8389 char *p = (char *)buf;
8390
8391 if (p[0] == '1')
8392 iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
8393
8394 return strnlen(buf, count);
8395 }
8396
8397 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8398
8399 static ssize_t dump_event_log(struct device *d,
8400 struct device_attribute *attr,
8401 const char *buf, size_t count)
8402 {
8403 char *p = (char *)buf;
8404
8405 if (p[0] == '1')
8406 iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
8407
8408 return strnlen(buf, count);
8409 }
8410
8411 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8412
8413 /*****************************************************************************
8414 *
8415 * driver setup and teardown
8416 *
8417 *****************************************************************************/
8418
8419 static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
8420 {
8421 priv->workqueue = create_workqueue(DRV_NAME);
8422
8423 init_waitqueue_head(&priv->wait_command_queue);
8424
8425 INIT_WORK(&priv->up, iwl4965_bg_up);
8426 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8427 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8428 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
8429 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
8430 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
8431 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
8432 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
8433 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
8434 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
8435 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
8436 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
8437
8438 iwl4965_hw_setup_deferred_work(priv);
8439
8440 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8441 iwl4965_irq_tasklet, (unsigned long)priv);
8442 }
8443
8444 static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
8445 {
8446 iwl4965_hw_cancel_deferred_work(priv);
8447
8448 cancel_delayed_work_sync(&priv->init_alive_start);
8449 cancel_delayed_work(&priv->scan_check);
8450 cancel_delayed_work(&priv->alive_start);
8451 cancel_delayed_work(&priv->post_associate);
8452 cancel_work_sync(&priv->beacon_update);
8453 }
8454
8455 static struct attribute *iwl4965_sysfs_entries[] = {
8456 &dev_attr_antenna.attr,
8457 &dev_attr_channels.attr,
8458 &dev_attr_dump_errors.attr,
8459 &dev_attr_dump_events.attr,
8460 &dev_attr_flags.attr,
8461 &dev_attr_filter_flags.attr,
8462 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
8463 &dev_attr_measurement.attr,
8464 #endif
8465 &dev_attr_power_level.attr,
8466 &dev_attr_retry_rate.attr,
8467 &dev_attr_rf_kill.attr,
8468 &dev_attr_rs_window.attr,
8469 &dev_attr_statistics.attr,
8470 &dev_attr_status.attr,
8471 &dev_attr_temperature.attr,
8472 &dev_attr_tx_power.attr,
8473
8474 NULL
8475 };
8476
8477 static struct attribute_group iwl4965_attribute_group = {
8478 .name = NULL, /* put in device directory */
8479 .attrs = iwl4965_sysfs_entries,
8480 };
8481
8482 static struct ieee80211_ops iwl4965_hw_ops = {
8483 .tx = iwl4965_mac_tx,
8484 .start = iwl4965_mac_start,
8485 .stop = iwl4965_mac_stop,
8486 .add_interface = iwl4965_mac_add_interface,
8487 .remove_interface = iwl4965_mac_remove_interface,
8488 .config = iwl4965_mac_config,
8489 .config_interface = iwl4965_mac_config_interface,
8490 .configure_filter = iwl4965_configure_filter,
8491 .set_key = iwl4965_mac_set_key,
8492 .get_stats = iwl4965_mac_get_stats,
8493 .get_tx_stats = iwl4965_mac_get_tx_stats,
8494 .conf_tx = iwl4965_mac_conf_tx,
8495 .get_tsf = iwl4965_mac_get_tsf,
8496 .reset_tsf = iwl4965_mac_reset_tsf,
8497 .beacon_update = iwl4965_mac_beacon_update,
8498 .bss_info_changed = iwl4965_bss_info_changed,
8499 #ifdef CONFIG_IWL4965_HT
8500 .conf_ht = iwl4965_mac_conf_ht,
8501 .ampdu_action = iwl4965_mac_ampdu_action,
8502 #endif /* CONFIG_IWL4965_HT */
8503 .hw_scan = iwl4965_mac_hw_scan
8504 };
8505
8506 static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8507 {
8508 int err = 0;
8509 struct iwl4965_priv *priv;
8510 struct ieee80211_hw *hw;
8511 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
8512 int i;
8513 DECLARE_MAC_BUF(mac);
8514
8515 /* Disabling hardware scan means that mac80211 will perform scans
8516 * "the hard way", rather than using device's scan. */
8517 if (iwl4965_param_disable_hw_scan) {
8518 IWL_DEBUG_INFO("Disabling hw_scan\n");
8519 iwl4965_hw_ops.hw_scan = NULL;
8520 }
8521
8522 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8523 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
8524 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8525 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8526 err = -EINVAL;
8527 goto out;
8528 }
8529
8530 /* mac80211 allocates memory for this device instance, including
8531 * space for this driver's private structure */
8532 hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
8533 if (hw == NULL) {
8534 IWL_ERROR("Can not allocate network device\n");
8535 err = -ENOMEM;
8536 goto out;
8537 }
8538 SET_IEEE80211_DEV(hw, &pdev->dev);
8539
8540 hw->rate_control_algorithm = "iwl-4965-rs";
8541
8542 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8543 priv = hw->priv;
8544 priv->hw = hw;
8545 priv->cfg = cfg;
8546
8547 priv->pci_dev = pdev;
8548 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
8549 #ifdef CONFIG_IWL4965_DEBUG
8550 iwl4965_debug_level = iwl4965_param_debug;
8551 atomic_set(&priv->restrict_refcnt, 0);
8552 #endif
8553 priv->retry_rate = 1;
8554
8555 priv->ibss_beacon = NULL;
8556
8557 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8558 * the range of signal quality values that we'll provide.
8559 * Negative values for level/noise indicate that we'll provide dBm.
8560 * For WE, at least, non-0 values here *enable* display of values
8561 * in app (iwconfig). */
8562 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8563 hw->max_noise = -20; /* noise level, negative indicates dBm */
8564 hw->max_signal = 100; /* link quality indication (%) */
8565
8566 /* Tell mac80211 our Tx characteristics */
8567 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8568
8569 /* Default value; 4 EDCA QOS priorities */
8570 hw->queues = 4;
8571 #ifdef CONFIG_IWL4965_HT
8572 /* Enhanced value; more queues, to support 11n aggregation */
8573 hw->queues = 16;
8574 #endif /* CONFIG_IWL4965_HT */
8575
8576 spin_lock_init(&priv->lock);
8577 spin_lock_init(&priv->power_data.lock);
8578 spin_lock_init(&priv->sta_lock);
8579 spin_lock_init(&priv->hcmd_lock);
8580 spin_lock_init(&priv->lq_mngr.lock);
8581
8582 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8583 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8584
8585 INIT_LIST_HEAD(&priv->free_frames);
8586
8587 mutex_init(&priv->mutex);
8588 if (pci_enable_device(pdev)) {
8589 err = -ENODEV;
8590 goto out_ieee80211_free_hw;
8591 }
8592
8593 pci_set_master(pdev);
8594
8595 /* Clear the driver's (not device's) station table */
8596 iwl4965_clear_stations_table(priv);
8597
8598 priv->data_retry_limit = -1;
8599 priv->ieee_channels = NULL;
8600 priv->ieee_rates = NULL;
8601 priv->band = IEEE80211_BAND_2GHZ;
8602
8603 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8604 if (!err)
8605 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8606 if (err) {
8607 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8608 goto out_pci_disable_device;
8609 }
8610
8611 pci_set_drvdata(pdev, priv);
8612 err = pci_request_regions(pdev, DRV_NAME);
8613 if (err)
8614 goto out_pci_disable_device;
8615
8616 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8617 * PCI Tx retries from interfering with C3 CPU state */
8618 pci_write_config_byte(pdev, 0x41, 0x00);
8619
8620 priv->hw_base = pci_iomap(pdev, 0, 0);
8621 if (!priv->hw_base) {
8622 err = -ENODEV;
8623 goto out_pci_release_regions;
8624 }
8625
8626 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8627 (unsigned long long) pci_resource_len(pdev, 0));
8628 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8629
8630 /* Initialize module parameter values here */
8631
8632 /* Disable radio (SW RF KILL) via parameter when loading driver */
8633 if (iwl4965_param_disable) {
8634 set_bit(STATUS_RF_KILL_SW, &priv->status);
8635 IWL_DEBUG_INFO("Radio disabled.\n");
8636 }
8637
8638 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8639
8640 priv->ps_mode = 0;
8641 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
8642 priv->valid_antenna = 0x7; /* assume all 3 connected */
8643 priv->ps_mode = IWL_MIMO_PS_NONE;
8644
8645 /* Choose which receivers/antennas to use */
8646 iwl4965_set_rxon_chain(priv);
8647
8648
8649 printk(KERN_INFO DRV_NAME
8650 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
8651
8652 /* Device-specific setup */
8653 if (iwl4965_hw_set_hw_setting(priv)) {
8654 IWL_ERROR("failed to set hw settings\n");
8655 goto out_iounmap;
8656 }
8657
8658 if (iwl4965_param_qos_enable)
8659 priv->qos_data.qos_enable = 1;
8660
8661 iwl4965_reset_qos(priv);
8662
8663 priv->qos_data.qos_active = 0;
8664 priv->qos_data.qos_cap.val = 0;
8665
8666 iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
8667 iwl4965_setup_deferred_work(priv);
8668 iwl4965_setup_rx_handlers(priv);
8669
8670 priv->rates_mask = IWL_RATES_MASK;
8671 /* If power management is turned on, default to AC mode */
8672 priv->power_mode = IWL_POWER_AC;
8673 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8674
8675 iwl4965_disable_interrupts(priv);
8676
8677 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
8678 if (err) {
8679 IWL_ERROR("failed to create sysfs device attributes\n");
8680 goto out_release_irq;
8681 }
8682
8683 /* nic init */
8684 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8685 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8686
8687 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8688 err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
8689 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8690 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8691 if (err < 0) {
8692 IWL_DEBUG_INFO("Failed to init the card\n");
8693 goto out_remove_sysfs;
8694 }
8695 /* Read the EEPROM */
8696 err = iwl_eeprom_init(priv);
8697 if (err) {
8698 IWL_ERROR("Unable to init EEPROM\n");
8699 goto out_remove_sysfs;
8700 }
8701 /* MAC Address location in EEPROM same for 3945/4965 */
8702 iwl_eeprom_get_mac(priv, priv->mac_addr);
8703 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8704 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8705
8706 err = iwl4965_init_channel_map(priv);
8707 if (err) {
8708 IWL_ERROR("initializing regulatory failed: %d\n", err);
8709 goto out_remove_sysfs;
8710 }
8711
8712 err = iwl4965_init_geos(priv);
8713 if (err) {
8714 IWL_ERROR("initializing geos failed: %d\n", err);
8715 goto out_free_channel_map;
8716 }
8717
8718 iwl4965_rate_control_register(priv->hw);
8719 err = ieee80211_register_hw(priv->hw);
8720 if (err) {
8721 IWL_ERROR("Failed to register network device (error %d)\n", err);
8722 goto out_free_geos;
8723 }
8724
8725 priv->hw->conf.beacon_int = 100;
8726 priv->mac80211_registered = 1;
8727 pci_save_state(pdev);
8728 pci_disable_device(pdev);
8729
8730 return 0;
8731
8732 out_free_geos:
8733 iwl4965_free_geos(priv);
8734 out_free_channel_map:
8735 iwl4965_free_channel_map(priv);
8736 out_remove_sysfs:
8737 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
8738
8739 out_release_irq:
8740 destroy_workqueue(priv->workqueue);
8741 priv->workqueue = NULL;
8742 iwl4965_unset_hw_setting(priv);
8743
8744 out_iounmap:
8745 pci_iounmap(pdev, priv->hw_base);
8746 out_pci_release_regions:
8747 pci_release_regions(pdev);
8748 out_pci_disable_device:
8749 pci_disable_device(pdev);
8750 pci_set_drvdata(pdev, NULL);
8751 out_ieee80211_free_hw:
8752 ieee80211_free_hw(priv->hw);
8753 out:
8754 return err;
8755 }
8756
8757 static void iwl4965_pci_remove(struct pci_dev *pdev)
8758 {
8759 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
8760 struct list_head *p, *q;
8761 int i;
8762
8763 if (!priv)
8764 return;
8765
8766 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8767
8768 set_bit(STATUS_EXIT_PENDING, &priv->status);
8769
8770 iwl4965_down(priv);
8771
8772 /* Free MAC hash list for ADHOC */
8773 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8774 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8775 list_del(p);
8776 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
8777 }
8778 }
8779
8780 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
8781
8782 iwl4965_dealloc_ucode_pci(priv);
8783
8784 if (priv->rxq.bd)
8785 iwl4965_rx_queue_free(priv, &priv->rxq);
8786 iwl4965_hw_txq_ctx_free(priv);
8787
8788 iwl4965_unset_hw_setting(priv);
8789 iwl4965_clear_stations_table(priv);
8790
8791 if (priv->mac80211_registered) {
8792 ieee80211_unregister_hw(priv->hw);
8793 iwl4965_rate_control_unregister(priv->hw);
8794 }
8795
8796 /*netif_stop_queue(dev); */
8797 flush_workqueue(priv->workqueue);
8798
8799 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
8800 * priv->workqueue... so we can't take down the workqueue
8801 * until now... */
8802 destroy_workqueue(priv->workqueue);
8803 priv->workqueue = NULL;
8804
8805 pci_iounmap(pdev, priv->hw_base);
8806 pci_release_regions(pdev);
8807 pci_disable_device(pdev);
8808 pci_set_drvdata(pdev, NULL);
8809
8810 iwl4965_free_channel_map(priv);
8811 iwl4965_free_geos(priv);
8812
8813 if (priv->ibss_beacon)
8814 dev_kfree_skb(priv->ibss_beacon);
8815
8816 ieee80211_free_hw(priv->hw);
8817 }
8818
8819 #ifdef CONFIG_PM
8820
8821 static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8822 {
8823 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
8824
8825 if (priv->is_open) {
8826 set_bit(STATUS_IN_SUSPEND, &priv->status);
8827 iwl4965_mac_stop(priv->hw);
8828 priv->is_open = 1;
8829 }
8830
8831 pci_set_power_state(pdev, PCI_D3hot);
8832
8833 return 0;
8834 }
8835
8836 static int iwl4965_pci_resume(struct pci_dev *pdev)
8837 {
8838 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
8839
8840 pci_set_power_state(pdev, PCI_D0);
8841
8842 if (priv->is_open)
8843 iwl4965_mac_start(priv->hw);
8844
8845 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8846 return 0;
8847 }
8848
8849 #endif /* CONFIG_PM */
8850
8851 /*****************************************************************************
8852 *
8853 * driver and module entry point
8854 *
8855 *****************************************************************************/
8856
8857 static struct pci_driver iwl4965_driver = {
8858 .name = DRV_NAME,
8859 .id_table = iwl4965_hw_card_ids,
8860 .probe = iwl4965_pci_probe,
8861 .remove = __devexit_p(iwl4965_pci_remove),
8862 #ifdef CONFIG_PM
8863 .suspend = iwl4965_pci_suspend,
8864 .resume = iwl4965_pci_resume,
8865 #endif
8866 };
8867
8868 static int __init iwl4965_init(void)
8869 {
8870
8871 int ret;
8872 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8873 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8874 ret = pci_register_driver(&iwl4965_driver);
8875 if (ret) {
8876 IWL_ERROR("Unable to initialize PCI module\n");
8877 return ret;
8878 }
8879 #ifdef CONFIG_IWL4965_DEBUG
8880 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
8881 if (ret) {
8882 IWL_ERROR("Unable to create driver sysfs file\n");
8883 pci_unregister_driver(&iwl4965_driver);
8884 return ret;
8885 }
8886 #endif
8887
8888 return ret;
8889 }
8890
8891 static void __exit iwl4965_exit(void)
8892 {
8893 #ifdef CONFIG_IWL4965_DEBUG
8894 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
8895 #endif
8896 pci_unregister_driver(&iwl4965_driver);
8897 }
8898
8899 module_param_named(antenna, iwl4965_param_antenna, int, 0444);
8900 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8901 module_param_named(disable, iwl4965_param_disable, int, 0444);
8902 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8903 module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
8904 MODULE_PARM_DESC(hwcrypto,
8905 "using hardware crypto engine (default 0 [software])\n");
8906 module_param_named(debug, iwl4965_param_debug, int, 0444);
8907 MODULE_PARM_DESC(debug, "debug output mask");
8908 module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
8909 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8910
8911 module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
8912 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8913
8914 /* QoS */
8915 module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
8916 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8917 module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
8918 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
8919
8920 module_exit(iwl4965_exit);
8921 module_init(iwl4965_init);
Linux kernel - Deliverables
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