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MAINTAINERS: Add phy-miphy28lp.c and phy-miphy365x.c to ARCH/STI architecture
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / mvm / coex.c
1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
26 * in the file called COPYING.
27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
34 * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved.
35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65
66 #include <linux/ieee80211.h>
67 #include <linux/etherdevice.h>
68 #include <net/mac80211.h>
69
70 #include "fw-api-coex.h"
71 #include "iwl-modparams.h"
72 #include "mvm.h"
73 #include "iwl-debug.h"
74
75 const u32 iwl_bt_ctl_kill_msk[BT_KILL_MSK_MAX] = {
76 [BT_KILL_MSK_DEFAULT] = 0xfffffc00,
77 [BT_KILL_MSK_NEVER] = 0xffffffff,
78 [BT_KILL_MSK_ALWAYS] = 0,
79 };
80
81 const u8 iwl_bt_cts_kill_msk[BT_MAX_AG][BT_COEX_MAX_LUT] = {
82 {
83 BT_KILL_MSK_ALWAYS,
84 BT_KILL_MSK_ALWAYS,
85 BT_KILL_MSK_ALWAYS,
86 },
87 {
88 BT_KILL_MSK_NEVER,
89 BT_KILL_MSK_NEVER,
90 BT_KILL_MSK_NEVER,
91 },
92 {
93 BT_KILL_MSK_NEVER,
94 BT_KILL_MSK_NEVER,
95 BT_KILL_MSK_NEVER,
96 },
97 {
98 BT_KILL_MSK_DEFAULT,
99 BT_KILL_MSK_NEVER,
100 BT_KILL_MSK_DEFAULT,
101 },
102 };
103
104 const u8 iwl_bt_ack_kill_msk[BT_MAX_AG][BT_COEX_MAX_LUT] = {
105 {
106 BT_KILL_MSK_ALWAYS,
107 BT_KILL_MSK_ALWAYS,
108 BT_KILL_MSK_ALWAYS,
109 },
110 {
111 BT_KILL_MSK_ALWAYS,
112 BT_KILL_MSK_ALWAYS,
113 BT_KILL_MSK_ALWAYS,
114 },
115 {
116 BT_KILL_MSK_ALWAYS,
117 BT_KILL_MSK_ALWAYS,
118 BT_KILL_MSK_ALWAYS,
119 },
120 {
121 BT_KILL_MSK_DEFAULT,
122 BT_KILL_MSK_ALWAYS,
123 BT_KILL_MSK_DEFAULT,
124 },
125 };
126
127 static const __le32 iwl_bt_prio_boost[BT_COEX_BOOST_SIZE] = {
128 cpu_to_le32(0xf0f0f0f0), /* 50% */
129 cpu_to_le32(0xc0c0c0c0), /* 25% */
130 cpu_to_le32(0xfcfcfcfc), /* 75% */
131 cpu_to_le32(0xfefefefe), /* 87.5% */
132 };
133
134 static const __le32 iwl_single_shared_ant[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = {
135 {
136 cpu_to_le32(0x40000000),
137 cpu_to_le32(0x00000000),
138 cpu_to_le32(0x44000000),
139 cpu_to_le32(0x00000000),
140 cpu_to_le32(0x40000000),
141 cpu_to_le32(0x00000000),
142 cpu_to_le32(0x44000000),
143 cpu_to_le32(0x00000000),
144 cpu_to_le32(0xc0004000),
145 cpu_to_le32(0xf0005000),
146 cpu_to_le32(0xc0004000),
147 cpu_to_le32(0xf0005000),
148 },
149 {
150 cpu_to_le32(0x40000000),
151 cpu_to_le32(0x00000000),
152 cpu_to_le32(0x44000000),
153 cpu_to_le32(0x00000000),
154 cpu_to_le32(0x40000000),
155 cpu_to_le32(0x00000000),
156 cpu_to_le32(0x44000000),
157 cpu_to_le32(0x00000000),
158 cpu_to_le32(0xc0004000),
159 cpu_to_le32(0xf0005000),
160 cpu_to_le32(0xc0004000),
161 cpu_to_le32(0xf0005000),
162 },
163 {
164 cpu_to_le32(0x40000000),
165 cpu_to_le32(0x00000000),
166 cpu_to_le32(0x44000000),
167 cpu_to_le32(0x00000000),
168 cpu_to_le32(0x40000000),
169 cpu_to_le32(0x00000000),
170 cpu_to_le32(0x44000000),
171 cpu_to_le32(0x00000000),
172 cpu_to_le32(0xc0004000),
173 cpu_to_le32(0xf0005000),
174 cpu_to_le32(0xc0004000),
175 cpu_to_le32(0xf0005000),
176 },
177 };
178
179 static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = {
180 {
181 /* Tight */
182 cpu_to_le32(0xaaaaaaaa),
183 cpu_to_le32(0xaaaaaaaa),
184 cpu_to_le32(0xaeaaaaaa),
185 cpu_to_le32(0xaaaaaaaa),
186 cpu_to_le32(0xcc00ff28),
187 cpu_to_le32(0x0000aaaa),
188 cpu_to_le32(0xcc00aaaa),
189 cpu_to_le32(0x0000aaaa),
190 cpu_to_le32(0xc0004000),
191 cpu_to_le32(0x00004000),
192 cpu_to_le32(0xf0005000),
193 cpu_to_le32(0xf0005000),
194 },
195 {
196 /* Loose */
197 cpu_to_le32(0xaaaaaaaa),
198 cpu_to_le32(0xaaaaaaaa),
199 cpu_to_le32(0xaaaaaaaa),
200 cpu_to_le32(0xaaaaaaaa),
201 cpu_to_le32(0xcc00ff28),
202 cpu_to_le32(0x0000aaaa),
203 cpu_to_le32(0xcc00aaaa),
204 cpu_to_le32(0x0000aaaa),
205 cpu_to_le32(0x00000000),
206 cpu_to_le32(0x00000000),
207 cpu_to_le32(0xf0005000),
208 cpu_to_le32(0xf0005000),
209 },
210 {
211 /* Tx Tx disabled */
212 cpu_to_le32(0xaaaaaaaa),
213 cpu_to_le32(0xaaaaaaaa),
214 cpu_to_le32(0xeeaaaaaa),
215 cpu_to_le32(0xaaaaaaaa),
216 cpu_to_le32(0xcc00ff28),
217 cpu_to_le32(0x0000aaaa),
218 cpu_to_le32(0xcc00aaaa),
219 cpu_to_le32(0x0000aaaa),
220 cpu_to_le32(0xc0004000),
221 cpu_to_le32(0xc0004000),
222 cpu_to_le32(0xf0005000),
223 cpu_to_le32(0xf0005000),
224 },
225 };
226
227 /* 20MHz / 40MHz below / 40Mhz above*/
228 static const __le64 iwl_ci_mask[][3] = {
229 /* dummy entry for channel 0 */
230 {cpu_to_le64(0), cpu_to_le64(0), cpu_to_le64(0)},
231 {
232 cpu_to_le64(0x0000001FFFULL),
233 cpu_to_le64(0x0ULL),
234 cpu_to_le64(0x00007FFFFFULL),
235 },
236 {
237 cpu_to_le64(0x000000FFFFULL),
238 cpu_to_le64(0x0ULL),
239 cpu_to_le64(0x0003FFFFFFULL),
240 },
241 {
242 cpu_to_le64(0x000003FFFCULL),
243 cpu_to_le64(0x0ULL),
244 cpu_to_le64(0x000FFFFFFCULL),
245 },
246 {
247 cpu_to_le64(0x00001FFFE0ULL),
248 cpu_to_le64(0x0ULL),
249 cpu_to_le64(0x007FFFFFE0ULL),
250 },
251 {
252 cpu_to_le64(0x00007FFF80ULL),
253 cpu_to_le64(0x00007FFFFFULL),
254 cpu_to_le64(0x01FFFFFF80ULL),
255 },
256 {
257 cpu_to_le64(0x0003FFFC00ULL),
258 cpu_to_le64(0x0003FFFFFFULL),
259 cpu_to_le64(0x0FFFFFFC00ULL),
260 },
261 {
262 cpu_to_le64(0x000FFFF000ULL),
263 cpu_to_le64(0x000FFFFFFCULL),
264 cpu_to_le64(0x3FFFFFF000ULL),
265 },
266 {
267 cpu_to_le64(0x007FFF8000ULL),
268 cpu_to_le64(0x007FFFFFE0ULL),
269 cpu_to_le64(0xFFFFFF8000ULL),
270 },
271 {
272 cpu_to_le64(0x01FFFE0000ULL),
273 cpu_to_le64(0x01FFFFFF80ULL),
274 cpu_to_le64(0xFFFFFE0000ULL),
275 },
276 {
277 cpu_to_le64(0x0FFFF00000ULL),
278 cpu_to_le64(0x0FFFFFFC00ULL),
279 cpu_to_le64(0x0ULL),
280 },
281 {
282 cpu_to_le64(0x3FFFC00000ULL),
283 cpu_to_le64(0x3FFFFFF000ULL),
284 cpu_to_le64(0x0)
285 },
286 {
287 cpu_to_le64(0xFFFE000000ULL),
288 cpu_to_le64(0xFFFFFF8000ULL),
289 cpu_to_le64(0x0)
290 },
291 {
292 cpu_to_le64(0xFFF8000000ULL),
293 cpu_to_le64(0xFFFFFE0000ULL),
294 cpu_to_le64(0x0)
295 },
296 {
297 cpu_to_le64(0xFFC0000000ULL),
298 cpu_to_le64(0x0ULL),
299 cpu_to_le64(0x0ULL)
300 },
301 };
302
303 struct corunning_block_luts {
304 u8 range;
305 __le32 lut20[BT_COEX_CORUN_LUT_SIZE];
306 };
307
308 /*
309 * Ranges for the antenna coupling calibration / co-running block LUT:
310 * LUT0: [ 0, 12[
311 * LUT1: [12, 20[
312 * LUT2: [20, 21[
313 * LUT3: [21, 23[
314 * LUT4: [23, 27[
315 * LUT5: [27, 30[
316 * LUT6: [30, 32[
317 * LUT7: [32, 33[
318 * LUT8: [33, - [
319 */
320 static const struct corunning_block_luts antenna_coupling_ranges[] = {
321 {
322 .range = 0,
323 .lut20 = {
324 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
325 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
326 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
327 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
328 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
329 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
330 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
331 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
332 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
333 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
334 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
335 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
336 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
337 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
338 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
339 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
340 },
341 },
342 {
343 .range = 12,
344 .lut20 = {
345 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
346 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
347 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
348 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
349 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
350 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
351 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
352 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
353 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
354 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
355 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
356 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
357 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
358 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
359 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
360 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
361 },
362 },
363 {
364 .range = 20,
365 .lut20 = {
366 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
367 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
368 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
369 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
370 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
371 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
372 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
373 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
374 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
375 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
376 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
377 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
378 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
379 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
380 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
381 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
382 },
383 },
384 {
385 .range = 21,
386 .lut20 = {
387 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
388 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
389 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
390 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
391 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
392 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
393 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
394 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
395 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
396 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
397 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
398 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
399 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
400 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
401 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
402 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
403 },
404 },
405 {
406 .range = 23,
407 .lut20 = {
408 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
409 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
410 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
411 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
412 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
413 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
414 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
415 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
416 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
417 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
418 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
419 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
420 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
421 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
422 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
423 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
424 },
425 },
426 {
427 .range = 27,
428 .lut20 = {
429 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
430 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
431 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
432 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
433 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
434 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
435 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
436 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
437 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
438 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
439 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
440 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
441 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
442 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
443 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
444 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
445 },
446 },
447 {
448 .range = 30,
449 .lut20 = {
450 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
451 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
452 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
453 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
454 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
455 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
456 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
457 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
458 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
459 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
460 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
461 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
462 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
463 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
464 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
465 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
466 },
467 },
468 {
469 .range = 32,
470 .lut20 = {
471 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
472 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
473 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
474 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
475 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
476 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
477 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
478 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
479 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
480 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
481 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
482 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
483 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
484 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
485 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
486 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
487 },
488 },
489 {
490 .range = 33,
491 .lut20 = {
492 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
493 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
494 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
495 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
496 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
497 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
498 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
499 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
500 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
501 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
502 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
503 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
504 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
505 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
506 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
507 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
508 },
509 },
510 };
511
512 static enum iwl_bt_coex_lut_type
513 iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif)
514 {
515 struct ieee80211_chanctx_conf *chanctx_conf;
516 enum iwl_bt_coex_lut_type ret;
517 u16 phy_ctx_id;
518 u32 primary_ch_phy_id, secondary_ch_phy_id;
519
520 /*
521 * Checking that we hold mvm->mutex is a good idea, but the rate
522 * control can't acquire the mutex since it runs in Tx path.
523 * So this is racy in that case, but in the worst case, the AMPDU
524 * size limit will be wrong for a short time which is not a big
525 * issue.
526 */
527
528 rcu_read_lock();
529
530 chanctx_conf = rcu_dereference(vif->chanctx_conf);
531
532 if (!chanctx_conf ||
533 chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) {
534 rcu_read_unlock();
535 return BT_COEX_INVALID_LUT;
536 }
537
538 ret = BT_COEX_TX_DIS_LUT;
539
540 if (mvm->cfg->bt_shared_single_ant) {
541 rcu_read_unlock();
542 return ret;
543 }
544
545 phy_ctx_id = *((u16 *)chanctx_conf->drv_priv);
546 primary_ch_phy_id = le32_to_cpu(mvm->last_bt_ci_cmd.primary_ch_phy_id);
547 secondary_ch_phy_id =
548 le32_to_cpu(mvm->last_bt_ci_cmd.secondary_ch_phy_id);
549
550 if (primary_ch_phy_id == phy_ctx_id)
551 ret = le32_to_cpu(mvm->last_bt_notif.primary_ch_lut);
552 else if (secondary_ch_phy_id == phy_ctx_id)
553 ret = le32_to_cpu(mvm->last_bt_notif.secondary_ch_lut);
554 /* else - default = TX TX disallowed */
555
556 rcu_read_unlock();
557
558 return ret;
559 }
560
561 int iwl_send_bt_init_conf(struct iwl_mvm *mvm)
562 {
563 struct iwl_bt_coex_cmd *bt_cmd;
564 struct iwl_host_cmd cmd = {
565 .id = BT_CONFIG,
566 .len = { sizeof(*bt_cmd), },
567 .dataflags = { IWL_HCMD_DFL_NOCOPY, },
568 };
569 int ret;
570 u32 mode;
571
572 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
573 return iwl_send_bt_init_conf_old(mvm);
574
575 bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL);
576 if (!bt_cmd)
577 return -ENOMEM;
578 cmd.data[0] = bt_cmd;
579
580 lockdep_assert_held(&mvm->mutex);
581
582 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) {
583 switch (mvm->bt_force_ant_mode) {
584 case BT_FORCE_ANT_BT:
585 mode = BT_COEX_BT;
586 break;
587 case BT_FORCE_ANT_WIFI:
588 mode = BT_COEX_WIFI;
589 break;
590 default:
591 WARN_ON(1);
592 mode = 0;
593 }
594
595 bt_cmd->mode = cpu_to_le32(mode);
596 goto send_cmd;
597 }
598
599 bt_cmd->max_kill = cpu_to_le32(5);
600 bt_cmd->bt4_antenna_isolation_thr =
601 cpu_to_le32(IWL_MVM_BT_COEX_ANTENNA_COUPLING_THRS);
602 bt_cmd->bt4_tx_tx_delta_freq_thr = cpu_to_le32(15);
603 bt_cmd->bt4_tx_rx_max_freq0 = cpu_to_le32(15);
604 bt_cmd->override_primary_lut = cpu_to_le32(BT_COEX_INVALID_LUT);
605 bt_cmd->override_secondary_lut = cpu_to_le32(BT_COEX_INVALID_LUT);
606
607 mode = iwlwifi_mod_params.bt_coex_active ? BT_COEX_NW : BT_COEX_DISABLE;
608 bt_cmd->mode = cpu_to_le32(mode);
609
610 if (IWL_MVM_BT_COEX_SYNC2SCO)
611 bt_cmd->enabled_modules |=
612 cpu_to_le32(BT_COEX_SYNC2SCO_ENABLED);
613
614 if (IWL_MVM_BT_COEX_CORUNNING)
615 bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_CORUN_ENABLED);
616
617 if (IWL_MVM_BT_COEX_MPLUT) {
618 bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_MPLUT_ENABLED);
619 bt_cmd->enabled_modules |=
620 cpu_to_le32(BT_COEX_MPLUT_BOOST_ENABLED);
621 }
622
623 bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_HIGH_BAND_RET);
624
625 if (mvm->cfg->bt_shared_single_ant)
626 memcpy(&bt_cmd->decision_lut, iwl_single_shared_ant,
627 sizeof(iwl_single_shared_ant));
628 else
629 memcpy(&bt_cmd->decision_lut, iwl_combined_lookup,
630 sizeof(iwl_combined_lookup));
631
632 memcpy(&bt_cmd->mplut_prio_boost, iwl_bt_prio_boost,
633 sizeof(iwl_bt_prio_boost));
634 bt_cmd->multiprio_lut[0] = cpu_to_le32(IWL_MVM_BT_COEX_MPLUT_REG0);
635 bt_cmd->multiprio_lut[1] = cpu_to_le32(IWL_MVM_BT_COEX_MPLUT_REG1);
636
637 send_cmd:
638 memset(&mvm->last_bt_notif, 0, sizeof(mvm->last_bt_notif));
639 memset(&mvm->last_bt_ci_cmd, 0, sizeof(mvm->last_bt_ci_cmd));
640
641 ret = iwl_mvm_send_cmd(mvm, &cmd);
642
643 kfree(bt_cmd);
644 return ret;
645 }
646
647 static int iwl_mvm_bt_udpate_sw_boost(struct iwl_mvm *mvm)
648 {
649 struct iwl_bt_coex_profile_notif *notif = &mvm->last_bt_notif;
650 u32 primary_lut = le32_to_cpu(notif->primary_ch_lut);
651 u32 secondary_lut = le32_to_cpu(notif->secondary_ch_lut);
652 u32 ag = le32_to_cpu(notif->bt_activity_grading);
653 struct iwl_bt_coex_sw_boost_update_cmd cmd = {};
654 u8 ack_kill_msk[NUM_PHY_CTX] = {};
655 u8 cts_kill_msk[NUM_PHY_CTX] = {};
656 int i;
657
658 lockdep_assert_held(&mvm->mutex);
659
660 ack_kill_msk[0] = iwl_bt_ack_kill_msk[ag][primary_lut];
661 cts_kill_msk[0] = iwl_bt_cts_kill_msk[ag][primary_lut];
662
663 ack_kill_msk[1] = iwl_bt_ack_kill_msk[ag][secondary_lut];
664 cts_kill_msk[1] = iwl_bt_cts_kill_msk[ag][secondary_lut];
665
666 /* Don't send HCMD if there is no update */
667 if (!memcmp(ack_kill_msk, mvm->bt_ack_kill_msk, sizeof(ack_kill_msk)) ||
668 !memcmp(cts_kill_msk, mvm->bt_cts_kill_msk, sizeof(cts_kill_msk)))
669 return 0;
670
671 memcpy(mvm->bt_ack_kill_msk, ack_kill_msk,
672 sizeof(mvm->bt_ack_kill_msk));
673 memcpy(mvm->bt_cts_kill_msk, cts_kill_msk,
674 sizeof(mvm->bt_cts_kill_msk));
675
676 BUILD_BUG_ON(ARRAY_SIZE(ack_kill_msk) < ARRAY_SIZE(cmd.boost_values));
677
678 for (i = 0; i < ARRAY_SIZE(cmd.boost_values); i++) {
679 cmd.boost_values[i].kill_ack_msk =
680 cpu_to_le32(iwl_bt_ctl_kill_msk[ack_kill_msk[i]]);
681 cmd.boost_values[i].kill_cts_msk =
682 cpu_to_le32(iwl_bt_ctl_kill_msk[cts_kill_msk[i]]);
683 }
684
685 return iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_SW_BOOST, 0,
686 sizeof(cmd), &cmd);
687 }
688
689 static int iwl_mvm_bt_coex_reduced_txp(struct iwl_mvm *mvm, u8 sta_id,
690 bool enable)
691 {
692 struct iwl_bt_coex_reduced_txp_update_cmd cmd = {};
693 struct iwl_mvm_sta *mvmsta;
694 u32 value;
695 int ret;
696
697 mvmsta = iwl_mvm_sta_from_staid_protected(mvm, sta_id);
698 if (!mvmsta)
699 return 0;
700
701 /* nothing to do */
702 if (mvmsta->bt_reduced_txpower == enable)
703 return 0;
704
705 value = mvmsta->sta_id;
706
707 if (enable)
708 value |= BT_REDUCED_TX_POWER_BIT;
709
710 IWL_DEBUG_COEX(mvm, "%sable reduced Tx Power for sta %d\n",
711 enable ? "en" : "dis", sta_id);
712
713 cmd.reduced_txp = cpu_to_le32(value);
714 mvmsta->bt_reduced_txpower = enable;
715
716 ret = iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_REDUCED_TXP, CMD_ASYNC,
717 sizeof(cmd), &cmd);
718
719 return ret;
720 }
721
722 struct iwl_bt_iterator_data {
723 struct iwl_bt_coex_profile_notif *notif;
724 struct iwl_mvm *mvm;
725 struct ieee80211_chanctx_conf *primary;
726 struct ieee80211_chanctx_conf *secondary;
727 bool primary_ll;
728 };
729
730 static inline
731 void iwl_mvm_bt_coex_enable_rssi_event(struct iwl_mvm *mvm,
732 struct ieee80211_vif *vif,
733 bool enable, int rssi)
734 {
735 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
736
737 mvmvif->bf_data.last_bt_coex_event = rssi;
738 mvmvif->bf_data.bt_coex_max_thold =
739 enable ? -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH : 0;
740 mvmvif->bf_data.bt_coex_min_thold =
741 enable ? -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH : 0;
742 }
743
744 /* must be called under rcu_read_lock */
745 static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac,
746 struct ieee80211_vif *vif)
747 {
748 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
749 struct iwl_bt_iterator_data *data = _data;
750 struct iwl_mvm *mvm = data->mvm;
751 struct ieee80211_chanctx_conf *chanctx_conf;
752 /* default smps_mode is AUTOMATIC - only used for client modes */
753 enum ieee80211_smps_mode smps_mode = IEEE80211_SMPS_AUTOMATIC;
754 u32 bt_activity_grading;
755 int ave_rssi;
756
757 lockdep_assert_held(&mvm->mutex);
758
759 switch (vif->type) {
760 case NL80211_IFTYPE_STATION:
761 break;
762 case NL80211_IFTYPE_AP:
763 if (!mvmvif->ap_ibss_active)
764 return;
765 break;
766 default:
767 return;
768 }
769
770 chanctx_conf = rcu_dereference(vif->chanctx_conf);
771
772 /* If channel context is invalid or not on 2.4GHz .. */
773 if ((!chanctx_conf ||
774 chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ)) {
775 if (vif->type == NL80211_IFTYPE_STATION) {
776 /* ... relax constraints and disable rssi events */
777 iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX,
778 smps_mode);
779 iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id,
780 false);
781 iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0);
782 }
783 return;
784 }
785
786 bt_activity_grading = le32_to_cpu(data->notif->bt_activity_grading);
787 if (bt_activity_grading >= BT_HIGH_TRAFFIC)
788 smps_mode = IEEE80211_SMPS_STATIC;
789 else if (bt_activity_grading >= BT_LOW_TRAFFIC)
790 smps_mode = IEEE80211_SMPS_DYNAMIC;
791
792 /* relax SMPS constraints for next association */
793 if (!vif->bss_conf.assoc)
794 smps_mode = IEEE80211_SMPS_AUTOMATIC;
795
796 if (IWL_COEX_IS_RRC_ON(mvm->last_bt_notif.ttc_rrc_status,
797 mvmvif->phy_ctxt->id))
798 smps_mode = IEEE80211_SMPS_AUTOMATIC;
799
800 IWL_DEBUG_COEX(data->mvm,
801 "mac %d: bt_activity_grading %d smps_req %d\n",
802 mvmvif->id, bt_activity_grading, smps_mode);
803
804 if (vif->type == NL80211_IFTYPE_STATION)
805 iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX,
806 smps_mode);
807
808 /* low latency is always primary */
809 if (iwl_mvm_vif_low_latency(mvmvif)) {
810 data->primary_ll = true;
811
812 data->secondary = data->primary;
813 data->primary = chanctx_conf;
814 }
815
816 if (vif->type == NL80211_IFTYPE_AP) {
817 if (!mvmvif->ap_ibss_active)
818 return;
819
820 if (chanctx_conf == data->primary)
821 return;
822
823 if (!data->primary_ll) {
824 /*
825 * downgrade the current primary no matter what its
826 * type is.
827 */
828 data->secondary = data->primary;
829 data->primary = chanctx_conf;
830 } else {
831 /* there is low latency vif - we will be secondary */
832 data->secondary = chanctx_conf;
833 }
834 return;
835 }
836
837 /*
838 * STA / P2P Client, try to be primary if first vif. If we are in low
839 * latency mode, we are already in primary and just don't do much
840 */
841 if (!data->primary || data->primary == chanctx_conf)
842 data->primary = chanctx_conf;
843 else if (!data->secondary)
844 /* if secondary is not NULL, it might be a GO */
845 data->secondary = chanctx_conf;
846
847 /*
848 * don't reduce the Tx power if one of these is true:
849 * we are in LOOSE
850 * single share antenna product
851 * BT is active
852 * we are associated
853 */
854 if (iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT ||
855 mvm->cfg->bt_shared_single_ant || !vif->bss_conf.assoc ||
856 le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF) {
857 iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false);
858 iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0);
859 return;
860 }
861
862 /* try to get the avg rssi from fw */
863 ave_rssi = mvmvif->bf_data.ave_beacon_signal;
864
865 /* if the RSSI isn't valid, fake it is very low */
866 if (!ave_rssi)
867 ave_rssi = -100;
868 if (ave_rssi > -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH) {
869 if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true))
870 IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n");
871 } else if (ave_rssi < -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH) {
872 if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false))
873 IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n");
874 }
875
876 /* Begin to monitor the RSSI: it may influence the reduced Tx power */
877 iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, true, ave_rssi);
878 }
879
880 static void iwl_mvm_bt_coex_notif_handle(struct iwl_mvm *mvm)
881 {
882 struct iwl_bt_iterator_data data = {
883 .mvm = mvm,
884 .notif = &mvm->last_bt_notif,
885 };
886 struct iwl_bt_coex_ci_cmd cmd = {};
887 u8 ci_bw_idx;
888
889 /* Ignore updates if we are in force mode */
890 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS))
891 return;
892
893 rcu_read_lock();
894 ieee80211_iterate_active_interfaces_atomic(
895 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
896 iwl_mvm_bt_notif_iterator, &data);
897
898 if (data.primary) {
899 struct ieee80211_chanctx_conf *chan = data.primary;
900 if (WARN_ON(!chan->def.chan)) {
901 rcu_read_unlock();
902 return;
903 }
904
905 if (chan->def.width < NL80211_CHAN_WIDTH_40) {
906 ci_bw_idx = 0;
907 } else {
908 if (chan->def.center_freq1 >
909 chan->def.chan->center_freq)
910 ci_bw_idx = 2;
911 else
912 ci_bw_idx = 1;
913 }
914
915 cmd.bt_primary_ci =
916 iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx];
917 cmd.primary_ch_phy_id =
918 cpu_to_le32(*((u16 *)data.primary->drv_priv));
919 }
920
921 if (data.secondary) {
922 struct ieee80211_chanctx_conf *chan = data.secondary;
923 if (WARN_ON(!data.secondary->def.chan)) {
924 rcu_read_unlock();
925 return;
926 }
927
928 if (chan->def.width < NL80211_CHAN_WIDTH_40) {
929 ci_bw_idx = 0;
930 } else {
931 if (chan->def.center_freq1 >
932 chan->def.chan->center_freq)
933 ci_bw_idx = 2;
934 else
935 ci_bw_idx = 1;
936 }
937
938 cmd.bt_secondary_ci =
939 iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx];
940 cmd.secondary_ch_phy_id =
941 cpu_to_le32(*((u16 *)data.secondary->drv_priv));
942 }
943
944 rcu_read_unlock();
945
946 /* Don't spam the fw with the same command over and over */
947 if (memcmp(&cmd, &mvm->last_bt_ci_cmd, sizeof(cmd))) {
948 if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_CI, 0,
949 sizeof(cmd), &cmd))
950 IWL_ERR(mvm, "Failed to send BT_CI cmd\n");
951 memcpy(&mvm->last_bt_ci_cmd, &cmd, sizeof(cmd));
952 }
953
954 if (iwl_mvm_bt_udpate_sw_boost(mvm))
955 IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n");
956 }
957
958 int iwl_mvm_rx_bt_coex_notif(struct iwl_mvm *mvm,
959 struct iwl_rx_cmd_buffer *rxb,
960 struct iwl_device_cmd *dev_cmd)
961 {
962 struct iwl_rx_packet *pkt = rxb_addr(rxb);
963 struct iwl_bt_coex_profile_notif *notif = (void *)pkt->data;
964
965 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
966 return iwl_mvm_rx_bt_coex_notif_old(mvm, rxb, dev_cmd);
967
968 IWL_DEBUG_COEX(mvm, "BT Coex Notification received\n");
969 IWL_DEBUG_COEX(mvm, "\tBT ci compliance %d\n", notif->bt_ci_compliance);
970 IWL_DEBUG_COEX(mvm, "\tBT primary_ch_lut %d\n",
971 le32_to_cpu(notif->primary_ch_lut));
972 IWL_DEBUG_COEX(mvm, "\tBT secondary_ch_lut %d\n",
973 le32_to_cpu(notif->secondary_ch_lut));
974 IWL_DEBUG_COEX(mvm, "\tBT activity grading %d\n",
975 le32_to_cpu(notif->bt_activity_grading));
976
977 /* remember this notification for future use: rssi fluctuations */
978 memcpy(&mvm->last_bt_notif, notif, sizeof(mvm->last_bt_notif));
979
980 iwl_mvm_bt_coex_notif_handle(mvm);
981
982 /*
983 * This is an async handler for a notification, returning anything other
984 * than 0 doesn't make sense even if HCMD failed.
985 */
986 return 0;
987 }
988
989 static void iwl_mvm_bt_rssi_iterator(void *_data, u8 *mac,
990 struct ieee80211_vif *vif)
991 {
992 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
993 struct iwl_bt_iterator_data *data = _data;
994 struct iwl_mvm *mvm = data->mvm;
995
996 struct ieee80211_sta *sta;
997 struct iwl_mvm_sta *mvmsta;
998
999 struct ieee80211_chanctx_conf *chanctx_conf;
1000
1001 rcu_read_lock();
1002 chanctx_conf = rcu_dereference(vif->chanctx_conf);
1003 /* If channel context is invalid or not on 2.4GHz - don't count it */
1004 if (!chanctx_conf ||
1005 chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) {
1006 rcu_read_unlock();
1007 return;
1008 }
1009 rcu_read_unlock();
1010
1011 if (vif->type != NL80211_IFTYPE_STATION ||
1012 mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT)
1013 return;
1014
1015 sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[mvmvif->ap_sta_id],
1016 lockdep_is_held(&mvm->mutex));
1017
1018 /* This can happen if the station has been removed right now */
1019 if (IS_ERR_OR_NULL(sta))
1020 return;
1021
1022 mvmsta = iwl_mvm_sta_from_mac80211(sta);
1023 }
1024
1025 void iwl_mvm_bt_rssi_event(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
1026 enum ieee80211_rssi_event rssi_event)
1027 {
1028 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1029 struct iwl_bt_iterator_data data = {
1030 .mvm = mvm,
1031 };
1032 int ret;
1033
1034 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) {
1035 iwl_mvm_bt_rssi_event_old(mvm, vif, rssi_event);
1036 return;
1037 }
1038
1039 lockdep_assert_held(&mvm->mutex);
1040
1041 /* Ignore updates if we are in force mode */
1042 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS))
1043 return;
1044
1045 /*
1046 * Rssi update while not associated - can happen since the statistics
1047 * are handled asynchronously
1048 */
1049 if (mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT)
1050 return;
1051
1052 /* No BT - reports should be disabled */
1053 if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF)
1054 return;
1055
1056 IWL_DEBUG_COEX(mvm, "RSSI for %pM is now %s\n", vif->bss_conf.bssid,
1057 rssi_event == RSSI_EVENT_HIGH ? "HIGH" : "LOW");
1058
1059 /*
1060 * Check if rssi is good enough for reduced Tx power, but not in loose
1061 * scheme.
1062 */
1063 if (rssi_event == RSSI_EVENT_LOW || mvm->cfg->bt_shared_single_ant ||
1064 iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT)
1065 ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id,
1066 false);
1067 else
1068 ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true);
1069
1070 if (ret)
1071 IWL_ERR(mvm, "couldn't send BT_CONFIG HCMD upon RSSI event\n");
1072
1073 ieee80211_iterate_active_interfaces_atomic(
1074 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1075 iwl_mvm_bt_rssi_iterator, &data);
1076
1077 if (iwl_mvm_bt_udpate_sw_boost(mvm))
1078 IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n");
1079 }
1080
1081 #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000)
1082 #define LINK_QUAL_AGG_TIME_LIMIT_BT_ACT (1200)
1083
1084 u16 iwl_mvm_coex_agg_time_limit(struct iwl_mvm *mvm,
1085 struct ieee80211_sta *sta)
1086 {
1087 struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
1088 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif);
1089 struct iwl_mvm_phy_ctxt *phy_ctxt = mvmvif->phy_ctxt;
1090 enum iwl_bt_coex_lut_type lut_type;
1091
1092 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1093 return iwl_mvm_coex_agg_time_limit_old(mvm, sta);
1094
1095 if (IWL_COEX_IS_TTC_ON(mvm->last_bt_notif.ttc_rrc_status, phy_ctxt->id))
1096 return LINK_QUAL_AGG_TIME_LIMIT_DEF;
1097
1098 if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) <
1099 BT_HIGH_TRAFFIC)
1100 return LINK_QUAL_AGG_TIME_LIMIT_DEF;
1101
1102 lut_type = iwl_get_coex_type(mvm, mvmsta->vif);
1103
1104 if (lut_type == BT_COEX_LOOSE_LUT || lut_type == BT_COEX_INVALID_LUT)
1105 return LINK_QUAL_AGG_TIME_LIMIT_DEF;
1106
1107 /* tight coex, high bt traffic, reduce AGG time limit */
1108 return LINK_QUAL_AGG_TIME_LIMIT_BT_ACT;
1109 }
1110
1111 bool iwl_mvm_bt_coex_is_mimo_allowed(struct iwl_mvm *mvm,
1112 struct ieee80211_sta *sta)
1113 {
1114 struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
1115 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif);
1116 struct iwl_mvm_phy_ctxt *phy_ctxt = mvmvif->phy_ctxt;
1117 enum iwl_bt_coex_lut_type lut_type;
1118
1119 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1120 return iwl_mvm_bt_coex_is_mimo_allowed_old(mvm, sta);
1121
1122 if (IWL_COEX_IS_TTC_ON(mvm->last_bt_notif.ttc_rrc_status, phy_ctxt->id))
1123 return true;
1124
1125 if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) <
1126 BT_HIGH_TRAFFIC)
1127 return true;
1128
1129 /*
1130 * In Tight / TxTxDis, BT can't Rx while we Tx, so use both antennas
1131 * since BT is already killed.
1132 * In Loose, BT can Rx while we Tx, so forbid MIMO to let BT Rx while
1133 * we Tx.
1134 * When we are in 5GHz, we'll get BT_COEX_INVALID_LUT allowing MIMO.
1135 */
1136 lut_type = iwl_get_coex_type(mvm, mvmsta->vif);
1137 return lut_type != BT_COEX_LOOSE_LUT;
1138 }
1139
1140 bool iwl_mvm_bt_coex_is_ant_avail(struct iwl_mvm *mvm, u8 ant)
1141 {
1142 /* there is no other antenna, shared antenna is always available */
1143 if (mvm->cfg->bt_shared_single_ant)
1144 return true;
1145
1146 if (ant & mvm->cfg->non_shared_ant)
1147 return true;
1148
1149 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1150 return iwl_mvm_bt_coex_is_shared_ant_avail_old(mvm);
1151
1152 return le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) <
1153 BT_HIGH_TRAFFIC;
1154 }
1155
1156 bool iwl_mvm_bt_coex_is_shared_ant_avail(struct iwl_mvm *mvm)
1157 {
1158 /* there is no other antenna, shared antenna is always available */
1159 if (mvm->cfg->bt_shared_single_ant)
1160 return true;
1161
1162 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1163 return iwl_mvm_bt_coex_is_shared_ant_avail_old(mvm);
1164
1165 return le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF;
1166 }
1167
1168 bool iwl_mvm_bt_coex_is_tpc_allowed(struct iwl_mvm *mvm,
1169 enum ieee80211_band band)
1170 {
1171 u32 bt_activity = le32_to_cpu(mvm->last_bt_notif.bt_activity_grading);
1172
1173 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1174 return iwl_mvm_bt_coex_is_tpc_allowed_old(mvm, band);
1175
1176 if (band != IEEE80211_BAND_2GHZ)
1177 return false;
1178
1179 return bt_activity >= BT_LOW_TRAFFIC;
1180 }
1181
1182 u8 iwl_mvm_bt_coex_tx_prio(struct iwl_mvm *mvm, struct ieee80211_hdr *hdr,
1183 struct ieee80211_tx_info *info, u8 ac)
1184 {
1185 __le16 fc = hdr->frame_control;
1186
1187 if (info->band != IEEE80211_BAND_2GHZ)
1188 return 0;
1189
1190 if (unlikely(mvm->bt_tx_prio))
1191 return mvm->bt_tx_prio - 1;
1192
1193 /* High prio packet (wrt. BT coex) if it is EAPOL, MCAST or MGMT */
1194 if (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO ||
1195 is_multicast_ether_addr(hdr->addr1) ||
1196 ieee80211_is_ctl(fc) || ieee80211_is_mgmt(fc) ||
1197 ieee80211_is_nullfunc(fc) || ieee80211_is_qos_nullfunc(fc))
1198 return 3;
1199
1200 switch (ac) {
1201 case IEEE80211_AC_BE:
1202 return 1;
1203 case IEEE80211_AC_VO:
1204 return 3;
1205 case IEEE80211_AC_VI:
1206 return 2;
1207 default:
1208 break;
1209 }
1210
1211 return 0;
1212 }
1213
1214 void iwl_mvm_bt_coex_vif_change(struct iwl_mvm *mvm)
1215 {
1216 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) {
1217 iwl_mvm_bt_coex_vif_change_old(mvm);
1218 return;
1219 }
1220
1221 iwl_mvm_bt_coex_notif_handle(mvm);
1222 }
1223
1224 int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm,
1225 struct iwl_rx_cmd_buffer *rxb,
1226 struct iwl_device_cmd *dev_cmd)
1227 {
1228 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1229 u32 ant_isolation = le32_to_cpup((void *)pkt->data);
1230 struct iwl_bt_coex_corun_lut_update_cmd cmd = {};
1231 u8 __maybe_unused lower_bound, upper_bound;
1232 u8 lut;
1233
1234 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1235 return iwl_mvm_rx_ant_coupling_notif_old(mvm, rxb, dev_cmd);
1236
1237 if (!IWL_MVM_BT_COEX_CORUNNING)
1238 return 0;
1239
1240 lockdep_assert_held(&mvm->mutex);
1241
1242 /* Ignore updates if we are in force mode */
1243 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS))
1244 return 0;
1245
1246 if (ant_isolation == mvm->last_ant_isol)
1247 return 0;
1248
1249 for (lut = 0; lut < ARRAY_SIZE(antenna_coupling_ranges) - 1; lut++)
1250 if (ant_isolation < antenna_coupling_ranges[lut + 1].range)
1251 break;
1252
1253 lower_bound = antenna_coupling_ranges[lut].range;
1254
1255 if (lut < ARRAY_SIZE(antenna_coupling_ranges) - 1)
1256 upper_bound = antenna_coupling_ranges[lut + 1].range;
1257 else
1258 upper_bound = antenna_coupling_ranges[lut].range;
1259
1260 IWL_DEBUG_COEX(mvm, "Antenna isolation=%d in range [%d,%d[, lut=%d\n",
1261 ant_isolation, lower_bound, upper_bound, lut);
1262
1263 mvm->last_ant_isol = ant_isolation;
1264
1265 if (mvm->last_corun_lut == lut)
1266 return 0;
1267
1268 mvm->last_corun_lut = lut;
1269
1270 /* For the moment, use the same LUT for 20GHz and 40GHz */
1271 memcpy(&cmd.corun_lut20, antenna_coupling_ranges[lut].lut20,
1272 sizeof(cmd.corun_lut20));
1273
1274 memcpy(&cmd.corun_lut40, antenna_coupling_ranges[lut].lut20,
1275 sizeof(cmd.corun_lut40));
1276
1277 return iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_CORUN_LUT, 0,
1278 sizeof(cmd), &cmd);
1279 }
Linux kernel - Deliverables
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