1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * You should have received a copy of the GNU General Public License
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21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
34 * All rights reserved.
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37 * modification, are permitted provided that the following conditions
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43 * notice, this list of conditions and the following disclaimer in
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48 * from this software without specific prior written permission.
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60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *****************************************************************************/
67 #include "fw-api-rs.h"
68 #include "fw-api-tx.h"
69 #include "fw-api-sta.h"
70 #include "fw-api-mac.h"
71 #include "fw-api-power.h"
72 #include "fw-api-d3.h"
74 /* queue and FIFO numbers by usage */
76 IWL_MVM_OFFCHANNEL_QUEUE
= 8,
77 IWL_MVM_CMD_QUEUE
= 9,
78 IWL_MVM_AUX_QUEUE
= 15,
79 IWL_MVM_FIRST_AGG_QUEUE
= 16,
80 IWL_MVM_NUM_QUEUES
= 20,
81 IWL_MVM_LAST_AGG_QUEUE
= IWL_MVM_NUM_QUEUES
- 1,
85 #define IWL_MVM_STATION_COUNT 16
92 INIT_COMPLETE_NOTIF
= 0x4,
94 /* PHY context commands */
95 PHY_CONTEXT_CMD
= 0x8,
105 MGMT_MCAST_KEY
= 0x1f,
110 /* MAC and Binding commands */
111 MAC_CONTEXT_CMD
= 0x28,
112 TIME_EVENT_CMD
= 0x29, /* both CMD and response */
113 TIME_EVENT_NOTIFICATION
= 0x2a,
114 BINDING_CONTEXT_CMD
= 0x2b,
115 TIME_QUOTA_CMD
= 0x2c,
120 TEMPERATURE_NOTIFICATION
= 0x62,
121 CALIBRATION_CFG_CMD
= 0x65,
122 CALIBRATION_RES_NOTIFICATION
= 0x66,
123 CALIBRATION_COMPLETE_NOTIFICATION
= 0x67,
124 RADIO_VERSION_NOTIFICATION
= 0x68,
127 SCAN_OFFLOAD_REQUEST_CMD
= 0x51,
128 SCAN_OFFLOAD_ABORT_CMD
= 0x52,
129 SCAN_OFFLOAD_COMPLETE
= 0x6D,
130 SCAN_OFFLOAD_UPDATE_PROFILES_CMD
= 0x6E,
131 SCAN_OFFLOAD_CONFIG_CMD
= 0x6f,
134 PHY_CONFIGURATION_CMD
= 0x6a,
135 CALIB_RES_NOTIF_PHY_DB
= 0x6b,
136 /* PHY_DB_CMD = 0x6c, */
139 POWER_TABLE_CMD
= 0x77,
142 SCAN_REQUEST_CMD
= 0x80,
143 SCAN_ABORT_CMD
= 0x81,
144 SCAN_START_NOTIFICATION
= 0x82,
145 SCAN_RESULTS_NOTIFICATION
= 0x83,
146 SCAN_COMPLETE_NOTIFICATION
= 0x84,
149 NVM_ACCESS_CMD
= 0x88,
151 SET_CALIB_DEFAULT_CMD
= 0x8e,
153 BEACON_TEMPLATE_CMD
= 0x91,
154 TX_ANT_CONFIGURATION_CMD
= 0x98,
155 STATISTICS_NOTIFICATION
= 0x9d,
157 /* RF-KILL commands and notifications */
158 CARD_STATE_CMD
= 0xa0,
159 CARD_STATE_NOTIFICATION
= 0xa1,
161 REPLY_RX_PHY_CMD
= 0xc0,
162 REPLY_RX_MPDU_CMD
= 0xc1,
165 REPLY_DEBUG_CMD
= 0xf0,
166 DEBUG_LOG_MSG
= 0xf7,
168 /* D3 commands/notifications */
169 D3_CONFIG_CMD
= 0xd3,
170 PROT_OFFLOAD_CONFIG_CMD
= 0xd4,
171 OFFLOADS_QUERY_CMD
= 0xd5,
172 REMOTE_WAKE_CONFIG_CMD
= 0xd6,
174 /* for WoWLAN in particular */
175 WOWLAN_PATTERNS
= 0xe0,
176 WOWLAN_CONFIGURATION
= 0xe1,
177 WOWLAN_TSC_RSC_PARAM
= 0xe2,
178 WOWLAN_TKIP_PARAM
= 0xe3,
179 WOWLAN_KEK_KCK_MATERIAL
= 0xe4,
180 WOWLAN_GET_STATUSES
= 0xe5,
181 WOWLAN_TX_POWER_PER_DB
= 0xe6,
183 /* and for NetDetect */
184 NET_DETECT_CONFIG_CMD
= 0x54,
185 NET_DETECT_PROFILES_QUERY_CMD
= 0x56,
186 NET_DETECT_PROFILES_CMD
= 0x57,
187 NET_DETECT_HOTSPOTS_CMD
= 0x58,
188 NET_DETECT_HOTSPOTS_QUERY_CMD
= 0x59,
194 * struct iwl_cmd_response - generic response struct for most commands
195 * @status: status of the command asked, changes for each one
197 struct iwl_cmd_response
{
202 * struct iwl_tx_ant_cfg_cmd
203 * @valid: valid antenna configuration
205 struct iwl_tx_ant_cfg_cmd
{
210 * Calibration control struct.
211 * Sent as part of the phy configuration command.
212 * @flow_trigger: bitmap for which calibrations to perform according to
214 * @event_trigger: bitmap for which calibrations to perform according to
217 struct iwl_calib_ctrl
{
219 __le32 event_trigger
;
222 /* This enum defines the bitmap of various calibrations to enable in both
223 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
226 IWL_CALIB_CFG_XTAL_IDX
= BIT(0),
227 IWL_CALIB_CFG_TEMPERATURE_IDX
= BIT(1),
228 IWL_CALIB_CFG_VOLTAGE_READ_IDX
= BIT(2),
229 IWL_CALIB_CFG_PAPD_IDX
= BIT(3),
230 IWL_CALIB_CFG_TX_PWR_IDX
= BIT(4),
231 IWL_CALIB_CFG_DC_IDX
= BIT(5),
232 IWL_CALIB_CFG_BB_FILTER_IDX
= BIT(6),
233 IWL_CALIB_CFG_LO_LEAKAGE_IDX
= BIT(7),
234 IWL_CALIB_CFG_TX_IQ_IDX
= BIT(8),
235 IWL_CALIB_CFG_TX_IQ_SKEW_IDX
= BIT(9),
236 IWL_CALIB_CFG_RX_IQ_IDX
= BIT(10),
237 IWL_CALIB_CFG_RX_IQ_SKEW_IDX
= BIT(11),
238 IWL_CALIB_CFG_SENSITIVITY_IDX
= BIT(12),
239 IWL_CALIB_CFG_CHAIN_NOISE_IDX
= BIT(13),
240 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX
= BIT(14),
241 IWL_CALIB_CFG_ANT_COUPLING_IDX
= BIT(15),
242 IWL_CALIB_CFG_DAC_IDX
= BIT(16),
243 IWL_CALIB_CFG_ABS_IDX
= BIT(17),
244 IWL_CALIB_CFG_AGC_IDX
= BIT(18),
248 * Phy configuration command.
250 struct iwl_phy_cfg_cmd
{
252 struct iwl_calib_ctrl calib_control
;
255 #define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
256 #define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
257 #define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
258 #define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
259 #define PHY_CFG_TX_CHAIN_A BIT(8)
260 #define PHY_CFG_TX_CHAIN_B BIT(9)
261 #define PHY_CFG_TX_CHAIN_C BIT(10)
262 #define PHY_CFG_RX_CHAIN_A BIT(12)
263 #define PHY_CFG_RX_CHAIN_B BIT(13)
264 #define PHY_CFG_RX_CHAIN_C BIT(14)
267 /* Target of the NVM_ACCESS_CMD */
269 NVM_ACCESS_TARGET_CACHE
= 0,
270 NVM_ACCESS_TARGET_OTP
= 1,
271 NVM_ACCESS_TARGET_EEPROM
= 2,
275 * struct iwl_nvm_access_cmd_ver1 - Request the device to send the NVM.
276 * @op_code: 0 - read, 1 - write.
277 * @target: NVM_ACCESS_TARGET_*. should be 0 for read.
278 * @cache_refresh: 0 - None, 1- NVM.
279 * @offset: offset in the nvm data.
280 * @length: of the chunk.
281 * @data: empty on read, the NVM chunk on write
283 struct iwl_nvm_access_cmd_ver1
{
291 } __packed
; /* NVM_ACCESS_CMD_API_S_VER_1 */
294 * struct iwl_nvm_access_resp_ver1 - response to NVM_ACCESS_CMD
295 * @offset: the offset in the nvm data
296 * @length: of the chunk
297 * @data: the nvm chunk on when NVM_ACCESS_CMD was read, nothing on write
299 struct iwl_nvm_access_resp_ver1
{
303 } __packed
; /* NVM_ACCESS_CMD_RESP_API_S_VER_1 */
305 /* Section types for NVM_ACCESS_CMD version 2 */
307 NVM_SECTION_TYPE_HW
= 0,
309 NVM_SECTION_TYPE_PAPD
,
311 NVM_SECTION_TYPE_CALIBRATION
,
312 NVM_SECTION_TYPE_PRODUCTION
,
313 NVM_SECTION_TYPE_POST_FCS_CALIB
,
318 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
319 * @op_code: 0 - read, 1 - write
320 * @target: NVM_ACCESS_TARGET_*
321 * @type: NVM_SECTION_TYPE_*
322 * @offset: offset in bytes into the section
323 * @length: in bytes, to read/write
324 * @data: if write operation, the data to write. On read its empty
326 struct iwl_nvm_access_cmd_ver2
{
333 } __packed
; /* NVM_ACCESS_CMD_API_S_VER_2 */
336 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
337 * @offset: offset in bytes into the section
338 * @length: in bytes, either how much was written or read
339 * @type: NVM_SECTION_TYPE_*
340 * @status: 0 for success, fail otherwise
341 * @data: if read operation, the data returned. Empty on write.
343 struct iwl_nvm_access_resp_ver2
{
349 } __packed
; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
353 /* alive response is_valid values */
354 #define ALIVE_RESP_UCODE_OK BIT(0)
355 #define ALIVE_RESP_RFKILL BIT(1)
357 /* alive response ver_type values */
367 /* alive response ver_subtype values */
369 FW_SUBTYPE_FULL_FEATURE
= 0,
370 FW_SUBTYPE_BOOTSRAP
= 1, /* Not valid */
371 FW_SUBTYPE_REDUCED
= 2,
372 FW_SUBTYPE_ALIVE_ONLY
= 3,
373 FW_SUBTYPE_WOWLAN
= 4,
374 FW_SUBTYPE_AP_SUBTYPE
= 5,
375 FW_SUBTYPE_WIPAN
= 6,
376 FW_SUBTYPE_INITIALIZE
= 9
379 #define IWL_ALIVE_STATUS_ERR 0xDEAD
380 #define IWL_ALIVE_STATUS_OK 0xCAFE
382 #define IWL_ALIVE_FLG_RFKILL BIT(0)
384 struct mvm_alive_resp
{
398 __le32 error_event_table_ptr
; /* SRAM address for error log */
399 __le32 log_event_table_ptr
; /* SRAM address for event log */
400 __le32 cpu_register_ptr
;
401 __le32 dbgm_config_ptr
;
402 __le32 alive_counter_ptr
;
403 __le32 scd_base_ptr
; /* SRAM address for SCD */
404 } __packed
; /* ALIVE_RES_API_S_VER_1 */
406 /* Error response/notification */
408 FW_ERR_UNKNOWN_CMD
= 0x0,
409 FW_ERR_INVALID_CMD_PARAM
= 0x1,
410 FW_ERR_SERVICE
= 0x2,
411 FW_ERR_ARC_MEMORY
= 0x3,
412 FW_ERR_ARC_CODE
= 0x4,
413 FW_ERR_WATCH_DOG
= 0x5,
414 FW_ERR_WEP_GRP_KEY_INDX
= 0x10,
415 FW_ERR_WEP_KEY_SIZE
= 0x11,
416 FW_ERR_OBSOLETE_FUNC
= 0x12,
417 FW_ERR_UNEXPECTED
= 0xFE,
422 * struct iwl_error_resp - FW error indication
423 * ( REPLY_ERROR = 0x2 )
424 * @error_type: one of FW_ERR_*
425 * @cmd_id: the command ID for which the error occured
426 * @bad_cmd_seq_num: sequence number of the erroneous command
427 * @error_service: which service created the error, applicable only if
428 * error_type = 2, otherwise 0
429 * @timestamp: TSF in usecs.
431 struct iwl_error_resp
{
435 __le16 bad_cmd_seq_num
;
436 __le32 error_service
;
441 /* Common PHY, MAC and Bindings definitions */
443 #define MAX_MACS_IN_BINDING (3)
444 #define MAX_BINDINGS (4)
445 #define AUX_BINDING_INDEX (3)
448 /* Used to extract ID and color from the context dword */
449 #define FW_CTXT_ID_POS (0)
450 #define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
451 #define FW_CTXT_COLOR_POS (8)
452 #define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
453 #define FW_CTXT_INVALID (0xffffffff)
455 #define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
456 (_color << FW_CTXT_COLOR_POS))
458 /* Possible actions on PHYs, MACs and Bindings */
460 FW_CTXT_ACTION_STUB
= 0,
462 FW_CTXT_ACTION_MODIFY
,
463 FW_CTXT_ACTION_REMOVE
,
465 }; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
469 /* Time Event types, according to MAC type */
470 enum iwl_time_event_type
{
471 /* BSS Station Events */
472 TE_BSS_STA_AGGRESSIVE_ASSOC
,
474 TE_BSS_EAP_DHCP_PROT
,
477 /* P2P Device Events */
478 TE_P2P_DEVICE_DISCOVERABLE
,
479 TE_P2P_DEVICE_LISTEN
,
480 TE_P2P_DEVICE_ACTION_SCAN
,
481 TE_P2P_DEVICE_FULL_SCAN
,
483 /* P2P Client Events */
484 TE_P2P_CLIENT_AGGRESSIVE_ASSOC
,
486 TE_P2P_CLIENT_QUIET_PERIOD
,
489 TE_P2P_GO_ASSOC_PROT
,
490 TE_P2P_GO_REPETITIVE_NOA
,
493 /* WiDi Sync Events */
497 }; /* MAC_EVENT_TYPE_API_E_VER_1 */
499 /* Time Event dependencies: none, on another TE, or in a specific time */
504 TE_EVENT_SOCIOPATHIC
= 4,
505 }; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
507 /* When to send Time Event notifications and to whom (internal = FW) */
510 TE_NOTIF_HOST_START
= 0x1,
511 TE_NOTIF_HOST_END
= 0x2,
512 TE_NOTIF_INTERNAL_START
= 0x4,
513 TE_NOTIF_INTERNAL_END
= 0x8
514 }; /* MAC_EVENT_ACTION_API_E_VER_1 */
517 * @TE_FRAG_NONE: fragmentation of the time event is NOT allowed.
518 * @TE_FRAG_SINGLE: fragmentation of the time event is allowed, but only
519 * the first fragment is scheduled.
520 * @TE_FRAG_DUAL: fragmentation of the time event is allowed, but only
521 * the first 2 fragments are scheduled.
522 * @TE_FRAG_ENDLESS: fragmentation of the time event is allowed, and any number
523 * of fragments are valid.
525 * Other than the constant defined above, specifying a fragmentation value 'x'
526 * means that the event can be fragmented but only the first 'x' will be
533 TE_FRAG_ENDLESS
= 0xffffffff
536 /* Repeat the time event endlessly (until removed) */
537 #define TE_REPEAT_ENDLESS (0xffffffff)
538 /* If a Time Event has bounded repetitions, this is the maximal value */
539 #define TE_REPEAT_MAX_MSK (0x0fffffff)
540 /* If a Time Event can be fragmented, this is the max number of fragments */
541 #define TE_FRAG_MAX_MSK (0x0fffffff)
544 * struct iwl_time_event_cmd - configuring Time Events
545 * ( TIME_EVENT_CMD = 0x29 )
546 * @id_and_color: ID and color of the relevant MAC
547 * @action: action to perform, one of FW_CTXT_ACTION_*
548 * @id: this field has two meanings, depending on the action:
549 * If the action is ADD, then it means the type of event to add.
550 * For all other actions it is the unique event ID assigned when the
551 * event was added by the FW.
552 * @apply_time: When to start the Time Event (in GP2)
553 * @max_delay: maximum delay to event's start (apply time), in TU
554 * @depends_on: the unique ID of the event we depend on (if any)
555 * @interval: interval between repetitions, in TU
556 * @interval_reciprocal: 2^32 / interval
557 * @duration: duration of event in TU
558 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
559 * @dep_policy: one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
560 * @is_present: 0 or 1, are we present or absent during the Time Event
561 * @max_frags: maximal number of fragments the Time Event can be divided to
562 * @notify: notifications using TE_NOTIF_* (whom to notify when)
564 struct iwl_time_event_cmd
{
565 /* COMMON_INDEX_HDR_API_S_VER_1 */
569 /* MAC_TIME_EVENT_DATA_API_S_VER_1 */
577 __le32 interval_reciprocal
;
581 } __packed
; /* MAC_TIME_EVENT_CMD_API_S_VER_1 */
584 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
585 * @status: bit 0 indicates success, all others specify errors
586 * @id: the Time Event type
587 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
588 * @id_and_color: ID and color of the relevant MAC
590 struct iwl_time_event_resp
{
595 } __packed
; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
598 * struct iwl_time_event_notif - notifications of time event start/stop
599 * ( TIME_EVENT_NOTIFICATION = 0x2a )
600 * @timestamp: action timestamp in GP2
601 * @session_id: session's unique id
602 * @unique_id: unique id of the Time Event itself
603 * @id_and_color: ID and color of the relevant MAC
604 * @action: one of TE_NOTIF_START or TE_NOTIF_END
605 * @status: true if scheduled, false otherwise (not executed)
607 struct iwl_time_event_notif
{
614 } __packed
; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
617 /* Bindings and Time Quota */
620 * struct iwl_binding_cmd - configuring bindings
621 * ( BINDING_CONTEXT_CMD = 0x2b )
622 * @id_and_color: ID and color of the relevant Binding
623 * @action: action to perform, one of FW_CTXT_ACTION_*
624 * @macs: array of MAC id and colors which belong to the binding
625 * @phy: PHY id and color which belongs to the binding
627 struct iwl_binding_cmd
{
628 /* COMMON_INDEX_HDR_API_S_VER_1 */
631 /* BINDING_DATA_API_S_VER_1 */
632 __le32 macs
[MAX_MACS_IN_BINDING
];
634 } __packed
; /* BINDING_CMD_API_S_VER_1 */
636 /* The maximal number of fragments in the FW's schedule session */
637 #define IWL_MVM_MAX_QUOTA 128
640 * struct iwl_time_quota_data - configuration of time quota per binding
641 * @id_and_color: ID and color of the relevant Binding
642 * @quota: absolute time quota in TU. The scheduler will try to divide the
643 * remainig quota (after Time Events) according to this quota.
644 * @max_duration: max uninterrupted context duration in TU
646 struct iwl_time_quota_data
{
650 } __packed
; /* TIME_QUOTA_DATA_API_S_VER_1 */
653 * struct iwl_time_quota_cmd - configuration of time quota between bindings
654 * ( TIME_QUOTA_CMD = 0x2c )
655 * @quotas: allocations per binding
657 struct iwl_time_quota_cmd
{
658 struct iwl_time_quota_data quotas
[MAX_BINDINGS
];
659 } __packed
; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
664 /* Supported bands */
665 #define PHY_BAND_5 (0)
666 #define PHY_BAND_24 (1)
668 /* Supported channel width, vary if there is VHT support */
669 #define PHY_VHT_CHANNEL_MODE20 (0x0)
670 #define PHY_VHT_CHANNEL_MODE40 (0x1)
671 #define PHY_VHT_CHANNEL_MODE80 (0x2)
672 #define PHY_VHT_CHANNEL_MODE160 (0x3)
675 * Control channel position:
676 * For legacy set bit means upper channel, otherwise lower.
677 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
678 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
681 * 40Mhz |_______|_______|
682 * 80Mhz |_______|_______|_______|_______|
683 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
684 * code 011 010 001 000 | 100 101 110 111
686 #define PHY_VHT_CTRL_POS_1_BELOW (0x0)
687 #define PHY_VHT_CTRL_POS_2_BELOW (0x1)
688 #define PHY_VHT_CTRL_POS_3_BELOW (0x2)
689 #define PHY_VHT_CTRL_POS_4_BELOW (0x3)
690 #define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
691 #define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
692 #define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
693 #define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
697 * @channel: channel number
698 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
699 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
701 struct iwl_fw_channel_info
{
708 #define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
709 #define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
710 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
711 #define PHY_RX_CHAIN_VALID_POS (1)
712 #define PHY_RX_CHAIN_VALID_MSK \
713 (0x7 << PHY_RX_CHAIN_VALID_POS)
714 #define PHY_RX_CHAIN_FORCE_SEL_POS (4)
715 #define PHY_RX_CHAIN_FORCE_SEL_MSK \
716 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
717 #define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
718 #define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
719 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
720 #define PHY_RX_CHAIN_CNT_POS (10)
721 #define PHY_RX_CHAIN_CNT_MSK \
722 (0x3 << PHY_RX_CHAIN_CNT_POS)
723 #define PHY_RX_CHAIN_MIMO_CNT_POS (12)
724 #define PHY_RX_CHAIN_MIMO_CNT_MSK \
725 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
726 #define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
727 #define PHY_RX_CHAIN_MIMO_FORCE_MSK \
728 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
730 /* TODO: fix the value, make it depend on firmware at runtime? */
731 #define NUM_PHY_CTX 3
733 /* TODO: complete missing documentation */
735 * struct iwl_phy_context_cmd - config of the PHY context
736 * ( PHY_CONTEXT_CMD = 0x8 )
737 * @id_and_color: ID and color of the relevant Binding
738 * @action: action to perform, one of FW_CTXT_ACTION_*
739 * @apply_time: 0 means immediate apply and context switch.
740 * other value means apply new params after X usecs
741 * @tx_param_color: ???
745 * @acquisition_data: ???
746 * @dsp_cfg_flags: set to 0
748 struct iwl_phy_context_cmd
{
749 /* COMMON_INDEX_HDR_API_S_VER_1 */
752 /* PHY_CONTEXT_DATA_API_S_VER_1 */
754 __le32 tx_param_color
;
755 struct iwl_fw_channel_info ci
;
758 __le32 acquisition_data
;
759 __le32 dsp_cfg_flags
;
760 } __packed
; /* PHY_CONTEXT_CMD_API_VER_1 */
762 #define IWL_RX_INFO_PHY_CNT 8
763 #define IWL_RX_INFO_AGC_IDX 1
764 #define IWL_RX_INFO_RSSI_AB_IDX 2
765 #define IWL_RX_INFO_RSSI_C_IDX 3
766 #define IWL_OFDM_AGC_DB_MSK 0xfe00
767 #define IWL_OFDM_AGC_DB_POS 9
768 #define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
769 #define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
770 #define IWL_OFDM_RSSI_A_POS 0
771 #define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
772 #define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
773 #define IWL_OFDM_RSSI_B_POS 16
774 #define IWL_OFDM_RSSI_INBAND_C_MSK 0x00ff
775 #define IWL_OFDM_RSSI_ALLBAND_C_MSK 0xff00
776 #define IWL_OFDM_RSSI_C_POS 0
779 * struct iwl_rx_phy_info - phy info
780 * (REPLY_RX_PHY_CMD = 0xc0)
781 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
782 * @cfg_phy_cnt: configurable DSP phy data byte count
783 * @stat_id: configurable DSP phy data set ID
785 * @system_timestamp: GP2 at on air rise
786 * @timestamp: TSF at on air rise
787 * @beacon_time_stamp: beacon at on-air rise
788 * @phy_flags: general phy flags: band, modulation, ...
789 * @channel: channel number
790 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
791 * @rate_n_flags: RATE_MCS_*
792 * @byte_count: frame's byte-count
793 * @frame_time: frame's time on the air, based on byte count and frame rate
796 * Before each Rx, the device sends this data. It contains PHY information
797 * about the reception of the packet.
799 struct iwl_rx_phy_info
{
804 __le32 system_timestamp
;
806 __le32 beacon_time_stamp
;
809 __le32 non_cfg_phy
[IWL_RX_INFO_PHY_CNT
];
816 struct iwl_rx_mpdu_res_start
{
822 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
823 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
824 * @RX_RES_PHY_FLAGS_MOD_CCK:
825 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
826 * @RX_RES_PHY_FLAGS_NARROW_BAND:
827 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
828 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
829 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
830 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
831 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
833 enum iwl_rx_phy_flags
{
834 RX_RES_PHY_FLAGS_BAND_24
= BIT(0),
835 RX_RES_PHY_FLAGS_MOD_CCK
= BIT(1),
836 RX_RES_PHY_FLAGS_SHORT_PREAMBLE
= BIT(2),
837 RX_RES_PHY_FLAGS_NARROW_BAND
= BIT(3),
838 RX_RES_PHY_FLAGS_ANTENNA
= (0x7 << 4),
839 RX_RES_PHY_FLAGS_ANTENNA_POS
= 4,
840 RX_RES_PHY_FLAGS_AGG
= BIT(7),
841 RX_RES_PHY_FLAGS_OFDM_HT
= BIT(8),
842 RX_RES_PHY_FLAGS_OFDM_GF
= BIT(9),
843 RX_RES_PHY_FLAGS_OFDM_VHT
= BIT(10),
847 * enum iwl_mvm_rx_status - written by fw for each Rx packet
848 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
849 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
850 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
851 * @RX_MPDU_RES_STATUS_KEY_VALID:
852 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
853 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
854 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
856 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
857 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
858 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
859 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
860 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
861 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
862 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
863 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
864 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
865 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
866 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
867 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
868 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
869 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
870 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
871 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
872 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
873 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
874 * @RX_MPDU_RES_STATUS_RRF_KILL:
875 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
876 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
878 enum iwl_mvm_rx_status
{
879 RX_MPDU_RES_STATUS_CRC_OK
= BIT(0),
880 RX_MPDU_RES_STATUS_OVERRUN_OK
= BIT(1),
881 RX_MPDU_RES_STATUS_SRC_STA_FOUND
= BIT(2),
882 RX_MPDU_RES_STATUS_KEY_VALID
= BIT(3),
883 RX_MPDU_RES_STATUS_KEY_PARAM_OK
= BIT(4),
884 RX_MPDU_RES_STATUS_ICV_OK
= BIT(5),
885 RX_MPDU_RES_STATUS_MIC_OK
= BIT(6),
886 RX_MPDU_RES_STATUS_TTAK_OK
= BIT(7),
887 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR
= BIT(7),
888 RX_MPDU_RES_STATUS_SEC_NO_ENC
= (0 << 8),
889 RX_MPDU_RES_STATUS_SEC_WEP_ENC
= (1 << 8),
890 RX_MPDU_RES_STATUS_SEC_CCM_ENC
= (2 << 8),
891 RX_MPDU_RES_STATUS_SEC_TKIP_ENC
= (3 << 8),
892 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC
= (6 << 8),
893 RX_MPDU_RES_STATUS_SEC_ENC_ERR
= (7 << 8),
894 RX_MPDU_RES_STATUS_SEC_ENC_MSK
= (7 << 8),
895 RX_MPDU_RES_STATUS_DEC_DONE
= BIT(11),
896 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP
= BIT(12),
897 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP
= BIT(13),
898 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT
= BIT(14),
899 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME
= BIT(15),
900 RX_MPDU_RES_STATUS_HASH_INDEX_MSK
= (0x3F0000),
901 RX_MPDU_RES_STATUS_STA_ID_MSK
= (0x1f000000),
902 RX_MPDU_RES_STATUS_RRF_KILL
= BIT(29),
903 RX_MPDU_RES_STATUS_FILTERING_MSK
= (0xc00000),
904 RX_MPDU_RES_STATUS2_FILTERING_MSK
= (0xc0000000),
908 * struct iwl_radio_version_notif - information on the radio version
909 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
914 struct iwl_radio_version_notif
{
918 } __packed
; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
920 enum iwl_card_state_flags
{
922 HW_CARD_DISABLED
= 0x01,
923 SW_CARD_DISABLED
= 0x02,
924 CT_KILL_CARD_DISABLED
= 0x04,
925 HALT_CARD_DISABLED
= 0x08,
926 CARD_DISABLED_MSK
= 0x0f,
927 CARD_IS_RX_ON
= 0x10,
931 * struct iwl_radio_version_notif - information on the radio version
932 * ( CARD_STATE_NOTIFICATION = 0xa1 )
933 * @flags: %iwl_card_state_flags
935 struct iwl_card_state_notif
{
937 } __packed
; /* CARD_STATE_NTFY_API_S_VER_1 */
940 * struct iwl_set_calib_default_cmd - set default value for calibration.
941 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
942 * @calib_index: the calibration to set value for
944 * @data: the value to set for the calibration result
946 struct iwl_set_calib_default_cmd
{
950 } __packed
; /* PHY_CALIB_OVERRIDE_VALUES_S */
952 #endif /* __fw_api_h__ */