Merge ath-next from ath.git
[deliverable/linux.git] / drivers / net / wireless / mwifiex / decl.h
1 /*
2 * Marvell Wireless LAN device driver: generic data structures and APIs
3 *
4 * Copyright (C) 2011-2014, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20 #ifndef _MWIFIEX_DECL_H_
21 #define _MWIFIEX_DECL_H_
22
23 #undef pr_fmt
24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25
26 #include <linux/wait.h>
27 #include <linux/timer.h>
28 #include <linux/ieee80211.h>
29 #include <uapi/linux/if_arp.h>
30 #include <net/mac80211.h>
31
32
33 #define MWIFIEX_MAX_BSS_NUM (3)
34
35 #define MWIFIEX_DMA_ALIGN_SZ 64
36 #define MWIFIEX_RX_HEADROOM 64
37 #define MAX_TXPD_SZ 32
38 #define INTF_HDR_ALIGN 4
39
40 #define MWIFIEX_MIN_DATA_HEADER_LEN (MWIFIEX_DMA_ALIGN_SZ + INTF_HDR_ALIGN + \
41 MAX_TXPD_SZ)
42 #define MWIFIEX_MGMT_FRAME_HEADER_SIZE 8 /* sizeof(pkt_type)
43 * + sizeof(tx_control)
44 */
45
46 #define MWIFIEX_MAX_TX_BASTREAM_SUPPORTED 2
47 #define MWIFIEX_MAX_RX_BASTREAM_SUPPORTED 16
48 #define MWIFIEX_MAX_TDLS_PEER_SUPPORTED 8
49
50 #define MWIFIEX_STA_AMPDU_DEF_TXWINSIZE 64
51 #define MWIFIEX_STA_AMPDU_DEF_RXWINSIZE 64
52 #define MWIFIEX_UAP_AMPDU_DEF_TXWINSIZE 32
53 #define MWIFIEX_UAP_AMPDU_DEF_RXWINSIZE 16
54 #define MWIFIEX_11AC_STA_AMPDU_DEF_TXWINSIZE 64
55 #define MWIFIEX_11AC_STA_AMPDU_DEF_RXWINSIZE 64
56 #define MWIFIEX_11AC_UAP_AMPDU_DEF_TXWINSIZE 64
57 #define MWIFIEX_11AC_UAP_AMPDU_DEF_RXWINSIZE 64
58
59 #define MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT 0xffff
60
61 #define MWIFIEX_RATE_BITMAP_MCS0 32
62
63 #define MWIFIEX_RX_DATA_BUF_SIZE (4 * 1024)
64 #define MWIFIEX_RX_CMD_BUF_SIZE (2 * 1024)
65
66 #define MAX_BEACON_PERIOD (4000)
67 #define MIN_BEACON_PERIOD (50)
68 #define MAX_DTIM_PERIOD (100)
69 #define MIN_DTIM_PERIOD (1)
70
71 #define MWIFIEX_RTS_MIN_VALUE (0)
72 #define MWIFIEX_RTS_MAX_VALUE (2347)
73 #define MWIFIEX_FRAG_MIN_VALUE (256)
74 #define MWIFIEX_FRAG_MAX_VALUE (2346)
75 #define MWIFIEX_WMM_VERSION 0x01
76 #define MWIFIEX_WMM_SUBTYPE 0x01
77
78 #define MWIFIEX_RETRY_LIMIT 14
79 #define MWIFIEX_SDIO_BLOCK_SIZE 256
80
81 #define MWIFIEX_BUF_FLAG_REQUEUED_PKT BIT(0)
82 #define MWIFIEX_BUF_FLAG_BRIDGED_PKT BIT(1)
83 #define MWIFIEX_BUF_FLAG_TDLS_PKT BIT(2)
84 #define MWIFIEX_BUF_FLAG_EAPOL_TX_STATUS BIT(3)
85 #define MWIFIEX_BUF_FLAG_ACTION_TX_STATUS BIT(4)
86
87 #define MWIFIEX_BRIDGED_PKTS_THR_HIGH 1024
88 #define MWIFIEX_BRIDGED_PKTS_THR_LOW 128
89
90 #define MWIFIEX_TDLS_DISABLE_LINK 0x00
91 #define MWIFIEX_TDLS_ENABLE_LINK 0x01
92 #define MWIFIEX_TDLS_CREATE_LINK 0x02
93 #define MWIFIEX_TDLS_CONFIG_LINK 0x03
94
95 #define MWIFIEX_TDLS_RSSI_HIGH 50
96 #define MWIFIEX_TDLS_RSSI_LOW 55
97 #define MWIFIEX_TDLS_MAX_FAIL_COUNT 4
98 #define MWIFIEX_AUTO_TDLS_IDLE_TIME 10
99
100 /* 54M rates, index from 0 to 11 */
101 #define MWIFIEX_RATE_INDEX_MCS0 12
102 /* 12-27=MCS0-15(BW20) */
103 #define MWIFIEX_BW20_MCS_NUM 15
104
105 /* Rate index for OFDM 0 */
106 #define MWIFIEX_RATE_INDEX_OFDM0 4
107
108 #define MWIFIEX_MAX_STA_NUM 1
109 #define MWIFIEX_MAX_UAP_NUM 1
110 #define MWIFIEX_MAX_P2P_NUM 1
111
112 #define MWIFIEX_A_BAND_START_FREQ 5000
113
114 enum mwifiex_bss_type {
115 MWIFIEX_BSS_TYPE_STA = 0,
116 MWIFIEX_BSS_TYPE_UAP = 1,
117 MWIFIEX_BSS_TYPE_P2P = 2,
118 MWIFIEX_BSS_TYPE_ANY = 0xff,
119 };
120
121 enum mwifiex_bss_role {
122 MWIFIEX_BSS_ROLE_STA = 0,
123 MWIFIEX_BSS_ROLE_UAP = 1,
124 MWIFIEX_BSS_ROLE_ANY = 0xff,
125 };
126
127 enum mwifiex_tdls_status {
128 TDLS_NOT_SETUP = 0,
129 TDLS_SETUP_INPROGRESS,
130 TDLS_SETUP_COMPLETE,
131 TDLS_SETUP_FAILURE,
132 TDLS_LINK_TEARDOWN,
133 };
134
135 enum mwifiex_tdls_error_code {
136 TDLS_ERR_NO_ERROR = 0,
137 TDLS_ERR_INTERNAL_ERROR,
138 TDLS_ERR_MAX_LINKS_EST,
139 TDLS_ERR_LINK_EXISTS,
140 TDLS_ERR_LINK_NONEXISTENT,
141 TDLS_ERR_PEER_STA_UNREACHABLE = 25,
142 };
143
144 #define BSS_ROLE_BIT_MASK BIT(0)
145
146 #define GET_BSS_ROLE(priv) ((priv)->bss_role & BSS_ROLE_BIT_MASK)
147
148 enum mwifiex_data_frame_type {
149 MWIFIEX_DATA_FRAME_TYPE_ETH_II = 0,
150 MWIFIEX_DATA_FRAME_TYPE_802_11,
151 };
152
153 struct mwifiex_fw_image {
154 u8 *helper_buf;
155 u32 helper_len;
156 u8 *fw_buf;
157 u32 fw_len;
158 };
159
160 struct mwifiex_802_11_ssid {
161 u32 ssid_len;
162 u8 ssid[IEEE80211_MAX_SSID_LEN];
163 };
164
165 struct mwifiex_wait_queue {
166 wait_queue_head_t wait;
167 int status;
168 };
169
170 struct mwifiex_rxinfo {
171 u8 bss_num;
172 u8 bss_type;
173 struct sk_buff *parent;
174 u8 use_count;
175 };
176
177 struct mwifiex_txinfo {
178 u32 status_code;
179 u8 flags;
180 u8 bss_num;
181 u8 bss_type;
182 u32 pkt_len;
183 u8 ack_frame_id;
184 u64 cookie;
185 };
186
187 enum mwifiex_wmm_ac_e {
188 WMM_AC_BK,
189 WMM_AC_BE,
190 WMM_AC_VI,
191 WMM_AC_VO
192 } __packed;
193
194 struct ieee_types_wmm_ac_parameters {
195 u8 aci_aifsn_bitmap;
196 u8 ecw_bitmap;
197 __le16 tx_op_limit;
198 } __packed;
199
200 struct mwifiex_types_wmm_info {
201 u8 oui[4];
202 u8 subtype;
203 u8 version;
204 u8 qos_info;
205 u8 reserved;
206 struct ieee_types_wmm_ac_parameters ac_params[IEEE80211_NUM_ACS];
207 } __packed;
208
209 struct mwifiex_arp_eth_header {
210 struct arphdr hdr;
211 u8 ar_sha[ETH_ALEN];
212 u8 ar_sip[4];
213 u8 ar_tha[ETH_ALEN];
214 u8 ar_tip[4];
215 } __packed;
216
217 struct mwifiex_chan_stats {
218 u8 chan_num;
219 u8 bandcfg;
220 u8 flags;
221 s8 noise;
222 u16 total_bss;
223 u16 cca_scan_dur;
224 u16 cca_busy_dur;
225 } __packed;
226
227 #define MWIFIEX_HIST_MAX_SAMPLES 1048576
228 #define MWIFIEX_MAX_RX_RATES 44
229 #define MWIFIEX_MAX_AC_RX_RATES 74
230 #define MWIFIEX_MAX_SNR 256
231 #define MWIFIEX_MAX_NOISE_FLR 256
232 #define MWIFIEX_MAX_SIG_STRENGTH 256
233
234 struct mwifiex_histogram_data {
235 atomic_t rx_rate[MWIFIEX_MAX_AC_RX_RATES];
236 atomic_t snr[MWIFIEX_MAX_SNR];
237 atomic_t noise_flr[MWIFIEX_MAX_NOISE_FLR];
238 atomic_t sig_str[MWIFIEX_MAX_SIG_STRENGTH];
239 atomic_t num_samples;
240 };
241
242 struct mwifiex_iface_comb {
243 u8 sta_intf;
244 u8 uap_intf;
245 u8 p2p_intf;
246 };
247
248 struct mwifiex_radar_params {
249 struct cfg80211_chan_def *chandef;
250 u32 cac_time_ms;
251 } __packed;
252
253 struct mwifiex_11h_intf_state {
254 bool is_11h_enabled;
255 bool is_11h_active;
256 } __packed;
257 #endif /* !_MWIFIEX_DECL_H_ */
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