drivers/net/wireless/mwifiex/ioctl.h

   1 /*
   2  * Marvell Wireless LAN device driver: ioctl data structures & APIs
   3  *
   4  * Copyright (C) 2011, Marvell International Ltd.
   5  *
   6  * This software file (the "File") is distributed by Marvell International
   7  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
   8  * (the "License").  You may use, redistribute and/or modify this File in
   9  * accordance with the terms and conditions of the License, a copy of which
  10  * is available by writing to the Free Software Foundation, Inc.,
  11  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
  12  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
  13  *
  14  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
  17  * this warranty disclaimer.
  18  */
  19
  20 #ifndef _MWIFIEX_IOCTL_H_
  21 #define _MWIFIEX_IOCTL_H_
  22
  23 #include <net/mac80211.h>
  24
  25 enum {
  26         MWIFIEX_SCAN_TYPE_UNCHANGED = 0,
  27         MWIFIEX_SCAN_TYPE_ACTIVE,
  28         MWIFIEX_SCAN_TYPE_PASSIVE
  29 };
  30
  31 struct mwifiex_user_scan {
  32         u32 scan_cfg_len;
  33         u8 scan_cfg_buf[1];
  34 };
  35
  36 #define MWIFIEX_PROMISC_MODE            1
  37 #define MWIFIEX_MULTICAST_MODE          2
  38 #define MWIFIEX_ALL_MULTI_MODE          4
  39 #define MWIFIEX_MAX_MULTICAST_LIST_SIZE 32
  40
  41 struct mwifiex_multicast_list {
  42         u32 mode;
  43         u32 num_multicast_addr;
  44         u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
  45 };
  46
  47 struct mwifiex_chan_freq {
  48         u32 channel;
  49         u32 freq;
  50 };
  51
  52 struct mwifiex_ssid_bssid {
  53         struct mwifiex_802_11_ssid ssid;
  54         u8 bssid[ETH_ALEN];
  55 };
  56
  57 enum {
  58         BAND_B = 1,
  59         BAND_G = 2,
  60         BAND_A = 4,
  61         BAND_GN = 8,
  62         BAND_AN = 16,
  63 };
  64
  65 enum {
  66         ADHOC_IDLE,
  67         ADHOC_STARTED,
  68         ADHOC_JOINED,
  69         ADHOC_COALESCED
  70 };
  71
  72 struct mwifiex_ds_get_stats {
  73         u32 mcast_tx_frame;
  74         u32 failed;
  75         u32 retry;
  76         u32 multi_retry;
  77         u32 frame_dup;
  78         u32 rts_success;
  79         u32 rts_failure;
  80         u32 ack_failure;
  81         u32 rx_frag;
  82         u32 mcast_rx_frame;
  83         u32 fcs_error;
  84         u32 tx_frame;
  85         u32 wep_icv_error[4];
  86 };
  87
  88 #define BCN_RSSI_AVG_MASK               0x00000002
  89 #define BCN_NF_AVG_MASK                 0x00000200
  90 #define ALL_RSSI_INFO_MASK              0x00000fff
  91
  92 struct mwifiex_ds_get_signal {
  93         /*
  94          * Bit0:  Last Beacon RSSI,  Bit1:  Average Beacon RSSI,
  95          * Bit2:  Last Data RSSI,    Bit3:  Average Data RSSI,
  96          * Bit4:  Last Beacon SNR,   Bit5:  Average Beacon SNR,
  97          * Bit6:  Last Data SNR,     Bit7:  Average Data SNR,
  98          * Bit8:  Last Beacon NF,    Bit9:  Average Beacon NF,
  99          * Bit10: Last Data NF,      Bit11: Average Data NF
 100          */
 101         u16 selector;
 102         s16 bcn_rssi_last;
 103         s16 bcn_rssi_avg;
 104         s16 data_rssi_last;
 105         s16 data_rssi_avg;
 106         s16 bcn_snr_last;
 107         s16 bcn_snr_avg;
 108         s16 data_snr_last;
 109         s16 data_snr_avg;
 110         s16 bcn_nf_last;
 111         s16 bcn_nf_avg;
 112         s16 data_nf_last;
 113         s16 data_nf_avg;
 114 };
 115
 116 #define MWIFIEX_MAX_VER_STR_LEN    128
 117
 118 struct mwifiex_ver_ext {
 119         u32 version_str_sel;
 120         char version_str[MWIFIEX_MAX_VER_STR_LEN];
 121 };
 122
 123 struct mwifiex_bss_info {
 124         u32 bss_mode;
 125         struct mwifiex_802_11_ssid ssid;
 126         u32 bss_chan;
 127         u32 region_code;
 128         u32 media_connected;
 129         u32 max_power_level;
 130         u32 min_power_level;
 131         u32 adhoc_state;
 132         signed int bcn_nf_last;
 133         u32 wep_status;
 134         u32 is_hs_configured;
 135         u32 is_deep_sleep;
 136         u8 bssid[ETH_ALEN];
 137 };
 138
 139 #define MAX_NUM_TID     8
 140
 141 #define MAX_RX_WINSIZE  64
 142
 143 struct mwifiex_ds_rx_reorder_tbl {
 144         u16 tid;
 145         u8 ta[ETH_ALEN];
 146         u32 start_win;
 147         u32 win_size;
 148         u32 buffer[MAX_RX_WINSIZE];
 149 };
 150
 151 struct mwifiex_ds_tx_ba_stream_tbl {
 152         u16 tid;
 153         u8 ra[ETH_ALEN];
 154 };
 155
 156 #define DBG_CMD_NUM     5
 157
 158 struct mwifiex_debug_info {
 159         u32 int_counter;
 160         u32 packets_out[MAX_NUM_TID];
 161         u32 max_tx_buf_size;
 162         u32 tx_buf_size;
 163         u32 curr_tx_buf_size;
 164         u32 tx_tbl_num;
 165         struct mwifiex_ds_tx_ba_stream_tbl
 166                 tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED];
 167         u32 rx_tbl_num;
 168         struct mwifiex_ds_rx_reorder_tbl rx_tbl
 169                 [MWIFIEX_MAX_RX_BASTREAM_SUPPORTED];
 170         u16 ps_mode;
 171         u32 ps_state;
 172         u8 is_deep_sleep;
 173         u8 pm_wakeup_card_req;
 174         u32 pm_wakeup_fw_try;
 175         u8 is_hs_configured;
 176         u8 hs_activated;
 177         u32 num_cmd_host_to_card_failure;
 178         u32 num_cmd_sleep_cfm_host_to_card_failure;
 179         u32 num_tx_host_to_card_failure;
 180         u32 num_event_deauth;
 181         u32 num_event_disassoc;
 182         u32 num_event_link_lost;
 183         u32 num_cmd_deauth;
 184         u32 num_cmd_assoc_success;
 185         u32 num_cmd_assoc_failure;
 186         u32 num_tx_timeout;
 187         u32 num_cmd_timeout;
 188         u16 timeout_cmd_id;
 189         u16 timeout_cmd_act;
 190         u16 last_cmd_id[DBG_CMD_NUM];
 191         u16 last_cmd_act[DBG_CMD_NUM];
 192         u16 last_cmd_index;
 193         u16 last_cmd_resp_id[DBG_CMD_NUM];
 194         u16 last_cmd_resp_index;
 195         u16 last_event[DBG_CMD_NUM];
 196         u16 last_event_index;
 197         u8 data_sent;
 198         u8 cmd_sent;
 199         u8 cmd_resp_received;
 200         u8 event_received;
 201 };
 202
 203 #define MWIFIEX_KEY_INDEX_UNICAST       0x40000000
 204 #define WAPI_RXPN_LEN                   16
 205
 206 struct mwifiex_ds_encrypt_key {
 207         u32 key_disable;
 208         u32 key_index;
 209         u32 key_len;
 210         u8 key_material[WLAN_MAX_KEY_LEN];
 211         u8 mac_addr[ETH_ALEN];
 212         u32 is_wapi_key;
 213         u8 wapi_rxpn[WAPI_RXPN_LEN];
 214 };
 215
 216 struct mwifiex_rate_cfg {
 217         u32 action;
 218         u32 is_rate_auto;
 219         u32 rate;
 220 };
 221
 222 struct mwifiex_power_cfg {
 223         u32 is_power_auto;
 224         u32 power_level;
 225 };
 226
 227 struct mwifiex_ds_hs_cfg {
 228         u32 is_invoke_hostcmd;
 229         /*  Bit0: non-unicast data
 230          *  Bit1: unicast data
 231          *  Bit2: mac events
 232          *  Bit3: magic packet
 233          */
 234         u32 conditions;
 235         u32 gpio;
 236         u32 gap;
 237 };
 238
 239 #define DEEP_SLEEP_ON  1
 240 #define DEEP_SLEEP_OFF 0
 241 #define DEEP_SLEEP_IDLE_TIME    100
 242 #define PS_MODE_AUTO            1
 243
 244 struct mwifiex_ds_auto_ds {
 245         u16 auto_ds;
 246         u16 idle_time;
 247 };
 248
 249 struct mwifiex_ds_pm_cfg {
 250         union {
 251                 u32 ps_mode;
 252                 struct mwifiex_ds_hs_cfg hs_cfg;
 253                 struct mwifiex_ds_auto_ds auto_deep_sleep;
 254                 u32 sleep_period;
 255         } param;
 256 };
 257
 258 struct mwifiex_ds_11n_tx_cfg {
 259         u16 tx_htcap;
 260         u16 tx_htinfo;
 261 };
 262
 263 struct mwifiex_ds_11n_amsdu_aggr_ctrl {
 264         u16 enable;
 265         u16 curr_buf_size;
 266 };
 267
 268 #define MWIFIEX_NUM_OF_CMD_BUFFER       20
 269 #define MWIFIEX_SIZE_OF_CMD_BUFFER      2048
 270
 271 enum {
 272         MWIFIEX_IE_TYPE_GEN_IE = 0,
 273         MWIFIEX_IE_TYPE_ARP_FILTER,
 274 };
 275
 276 enum {
 277         MWIFIEX_REG_MAC = 1,
 278         MWIFIEX_REG_BBP,
 279         MWIFIEX_REG_RF,
 280         MWIFIEX_REG_PMIC,
 281         MWIFIEX_REG_CAU,
 282 };
 283
 284 struct mwifiex_ds_reg_rw {
 285         __le32 type;
 286         __le32 offset;
 287         __le32 value;
 288 };
 289
 290 #define MAX_EEPROM_DATA 256
 291
 292 struct mwifiex_ds_read_eeprom {
 293         __le16 offset;
 294         __le16 byte_count;
 295         u8 value[MAX_EEPROM_DATA];
 296 };
 297
 298 #define IEEE_MAX_IE_SIZE                256
 299
 300 struct mwifiex_ds_misc_gen_ie {
 301         u32 type;
 302         u32 len;
 303         u8 ie_data[IEEE_MAX_IE_SIZE];
 304 };
 305
 306 struct mwifiex_ds_misc_cmd {
 307         u32 len;
 308         u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
 309 };
 310
 311 #define MWIFIEX_MAX_VSIE_LEN       (256)
 312 #define MWIFIEX_MAX_VSIE_NUM       (8)
 313 #define MWIFIEX_VSIE_MASK_SCAN     0x01
 314 #define MWIFIEX_VSIE_MASK_ASSOC    0x02
 315 #define MWIFIEX_VSIE_MASK_ADHOC    0x04
 316
 317 enum {
 318         MWIFIEX_FUNC_INIT = 1,
 319         MWIFIEX_FUNC_SHUTDOWN,
 320 };
 321
 322 #endif /* !_MWIFIEX_IOCTL_H_ */