Merge branch 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu...
[deliverable/linux.git] / drivers / net / wireless / mwifiex / pcie.c
1 /*
2 * Marvell Wireless LAN device driver: PCIE specific handling
3 *
4 * Copyright (C) 2011-2014, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20 #include <linux/firmware.h>
21
22 #include "decl.h"
23 #include "ioctl.h"
24 #include "util.h"
25 #include "fw.h"
26 #include "main.h"
27 #include "wmm.h"
28 #include "11n.h"
29 #include "pcie.h"
30
31 #define PCIE_VERSION "1.0"
32 #define DRV_NAME "Marvell mwifiex PCIe"
33
34 static u8 user_rmmod;
35
36 static struct mwifiex_if_ops pcie_ops;
37
38 static struct semaphore add_remove_card_sem;
39
40 static struct memory_type_mapping mem_type_mapping_tbl[] = {
41 {"ITCM", NULL, 0, 0xF0},
42 {"DTCM", NULL, 0, 0xF1},
43 {"SQRAM", NULL, 0, 0xF2},
44 {"IRAM", NULL, 0, 0xF3},
45 {"APU", NULL, 0, 0xF4},
46 {"CIU", NULL, 0, 0xF5},
47 {"ICU", NULL, 0, 0xF6},
48 {"MAC", NULL, 0, 0xF7},
49 };
50
51 static int
52 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
53 size_t size, int flags)
54 {
55 struct pcie_service_card *card = adapter->card;
56 struct mwifiex_dma_mapping mapping;
57
58 mapping.addr = pci_map_single(card->dev, skb->data, size, flags);
59 if (pci_dma_mapping_error(card->dev, mapping.addr)) {
60 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
61 return -1;
62 }
63 mapping.len = size;
64 mwifiex_store_mapping(skb, &mapping);
65 return 0;
66 }
67
68 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
69 struct sk_buff *skb, int flags)
70 {
71 struct pcie_service_card *card = adapter->card;
72 struct mwifiex_dma_mapping mapping;
73
74 mwifiex_get_mapping(skb, &mapping);
75 pci_unmap_single(card->dev, mapping.addr, mapping.len, flags);
76 }
77
78 /*
79 * This function reads sleep cookie and checks if FW is ready
80 */
81 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
82 {
83 u32 *cookie_addr;
84 struct pcie_service_card *card = adapter->card;
85 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
86
87 if (!reg->sleep_cookie)
88 return true;
89
90 if (card->sleep_cookie_vbase) {
91 cookie_addr = (u32 *)card->sleep_cookie_vbase;
92 mwifiex_dbg(adapter, INFO,
93 "info: ACCESS_HW: sleep cookie=0x%x\n",
94 *cookie_addr);
95 if (*cookie_addr == FW_AWAKE_COOKIE)
96 return true;
97 }
98
99 return false;
100 }
101
102 #ifdef CONFIG_PM_SLEEP
103 /*
104 * Kernel needs to suspend all functions separately. Therefore all
105 * registered functions must have drivers with suspend and resume
106 * methods. Failing that the kernel simply removes the whole card.
107 *
108 * If already not suspended, this function allocates and sends a host
109 * sleep activate request to the firmware and turns off the traffic.
110 */
111 static int mwifiex_pcie_suspend(struct device *dev)
112 {
113 struct mwifiex_adapter *adapter;
114 struct pcie_service_card *card;
115 int hs_actived;
116 struct pci_dev *pdev = to_pci_dev(dev);
117
118 if (pdev) {
119 card = pci_get_drvdata(pdev);
120 if (!card || !card->adapter) {
121 pr_err("Card or adapter structure is not valid\n");
122 return 0;
123 }
124 } else {
125 pr_err("PCIE device is not specified\n");
126 return 0;
127 }
128
129 adapter = card->adapter;
130
131 hs_actived = mwifiex_enable_hs(adapter);
132
133 /* Indicate device suspended */
134 adapter->is_suspended = true;
135 adapter->hs_enabling = false;
136
137 return 0;
138 }
139
140 /*
141 * Kernel needs to suspend all functions separately. Therefore all
142 * registered functions must have drivers with suspend and resume
143 * methods. Failing that the kernel simply removes the whole card.
144 *
145 * If already not resumed, this function turns on the traffic and
146 * sends a host sleep cancel request to the firmware.
147 */
148 static int mwifiex_pcie_resume(struct device *dev)
149 {
150 struct mwifiex_adapter *adapter;
151 struct pcie_service_card *card;
152 struct pci_dev *pdev = to_pci_dev(dev);
153
154 if (pdev) {
155 card = pci_get_drvdata(pdev);
156 if (!card || !card->adapter) {
157 pr_err("Card or adapter structure is not valid\n");
158 return 0;
159 }
160 } else {
161 pr_err("PCIE device is not specified\n");
162 return 0;
163 }
164
165 adapter = card->adapter;
166
167 if (!adapter->is_suspended) {
168 mwifiex_dbg(adapter, WARN,
169 "Device already resumed\n");
170 return 0;
171 }
172
173 adapter->is_suspended = false;
174
175 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
176 MWIFIEX_ASYNC_CMD);
177
178 return 0;
179 }
180 #endif
181
182 /*
183 * This function probes an mwifiex device and registers it. It allocates
184 * the card structure, enables PCIE function number and initiates the
185 * device registration and initialization procedure by adding a logical
186 * interface.
187 */
188 static int mwifiex_pcie_probe(struct pci_dev *pdev,
189 const struct pci_device_id *ent)
190 {
191 struct pcie_service_card *card;
192
193 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
194 pdev->vendor, pdev->device, pdev->revision);
195
196 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
197 if (!card)
198 return -ENOMEM;
199
200 card->dev = pdev;
201
202 if (ent->driver_data) {
203 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
204 card->pcie.firmware = data->firmware;
205 card->pcie.reg = data->reg;
206 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
207 card->pcie.tx_buf_size = data->tx_buf_size;
208 card->pcie.can_dump_fw = data->can_dump_fw;
209 card->pcie.can_ext_scan = data->can_ext_scan;
210 }
211
212 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
213 MWIFIEX_PCIE)) {
214 pr_err("%s failed\n", __func__);
215 kfree(card);
216 return -1;
217 }
218
219 return 0;
220 }
221
222 /*
223 * This function removes the interface and frees up the card structure.
224 */
225 static void mwifiex_pcie_remove(struct pci_dev *pdev)
226 {
227 struct pcie_service_card *card;
228 struct mwifiex_adapter *adapter;
229 struct mwifiex_private *priv;
230
231 card = pci_get_drvdata(pdev);
232 if (!card)
233 return;
234
235 adapter = card->adapter;
236 if (!adapter || !adapter->priv_num)
237 return;
238
239 if (user_rmmod) {
240 #ifdef CONFIG_PM_SLEEP
241 if (adapter->is_suspended)
242 mwifiex_pcie_resume(&pdev->dev);
243 #endif
244
245 mwifiex_deauthenticate_all(adapter);
246
247 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
248
249 mwifiex_disable_auto_ds(priv);
250
251 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
252 }
253
254 mwifiex_remove_card(card->adapter, &add_remove_card_sem);
255 }
256
257 static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
258 {
259 user_rmmod = 1;
260 mwifiex_pcie_remove(pdev);
261
262 return;
263 }
264
265 static const struct pci_device_id mwifiex_ids[] = {
266 {
267 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
269 .driver_data = (unsigned long) &mwifiex_pcie8766,
270 },
271 {
272 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
273 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
274 .driver_data = (unsigned long) &mwifiex_pcie8897,
275 },
276 {},
277 };
278
279 MODULE_DEVICE_TABLE(pci, mwifiex_ids);
280
281 #ifdef CONFIG_PM_SLEEP
282 /* Power Management Hooks */
283 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
284 mwifiex_pcie_resume);
285 #endif
286
287 /* PCI Device Driver */
288 static struct pci_driver __refdata mwifiex_pcie = {
289 .name = "mwifiex_pcie",
290 .id_table = mwifiex_ids,
291 .probe = mwifiex_pcie_probe,
292 .remove = mwifiex_pcie_remove,
293 #ifdef CONFIG_PM_SLEEP
294 .driver = {
295 .pm = &mwifiex_pcie_pm_ops,
296 },
297 #endif
298 .shutdown = mwifiex_pcie_shutdown,
299 };
300
301 /*
302 * This function writes data into PCIE card register.
303 */
304 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
305 {
306 struct pcie_service_card *card = adapter->card;
307
308 iowrite32(data, card->pci_mmap1 + reg);
309
310 return 0;
311 }
312
313 /*
314 * This function reads data from PCIE card register.
315 */
316 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
317 {
318 struct pcie_service_card *card = adapter->card;
319
320 *data = ioread32(card->pci_mmap1 + reg);
321
322 return 0;
323 }
324
325 /* This function reads u8 data from PCIE card register. */
326 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
327 int reg, u8 *data)
328 {
329 struct pcie_service_card *card = adapter->card;
330
331 *data = ioread8(card->pci_mmap1 + reg);
332
333 return 0;
334 }
335
336 /*
337 * This function adds delay loop to ensure FW is awake before proceeding.
338 */
339 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
340 {
341 int i = 0;
342
343 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
344 i++;
345 usleep_range(10, 20);
346 /* 50ms max wait */
347 if (i == 5000)
348 break;
349 }
350
351 return;
352 }
353
354 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
355 u32 max_delay_loop_cnt)
356 {
357 struct pcie_service_card *card = adapter->card;
358 u8 *buffer;
359 u32 sleep_cookie, count;
360
361 for (count = 0; count < max_delay_loop_cnt; count++) {
362 buffer = card->cmdrsp_buf->data - INTF_HEADER_LEN;
363 sleep_cookie = *(u32 *)buffer;
364
365 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
366 mwifiex_dbg(adapter, INFO,
367 "sleep cookie found at count %d\n", count);
368 break;
369 }
370 usleep_range(20, 30);
371 }
372
373 if (count >= max_delay_loop_cnt)
374 mwifiex_dbg(adapter, INFO,
375 "max count reached while accessing sleep cookie\n");
376 }
377
378 /* This function wakes up the card by reading fw_status register. */
379 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
380 {
381 u32 fw_status;
382 struct pcie_service_card *card = adapter->card;
383 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
384
385 mwifiex_dbg(adapter, EVENT,
386 "event: Wakeup device...\n");
387
388 if (reg->sleep_cookie)
389 mwifiex_pcie_dev_wakeup_delay(adapter);
390
391 /* Reading fw_status register will wakeup device */
392 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) {
393 mwifiex_dbg(adapter, ERROR,
394 "Reading fw_status register failed\n");
395 return -1;
396 }
397
398 if (reg->sleep_cookie) {
399 mwifiex_pcie_dev_wakeup_delay(adapter);
400 mwifiex_dbg(adapter, INFO,
401 "PCIE wakeup: Setting PS_STATE_AWAKE\n");
402 adapter->ps_state = PS_STATE_AWAKE;
403 }
404
405 return 0;
406 }
407
408 /*
409 * This function is called after the card has woken up.
410 *
411 * The card configuration register is reset.
412 */
413 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
414 {
415 mwifiex_dbg(adapter, CMD,
416 "cmd: Wakeup device completed\n");
417
418 return 0;
419 }
420
421 /*
422 * This function disables the host interrupt.
423 *
424 * The host interrupt mask is read, the disable bit is reset and
425 * written back to the card host interrupt mask register.
426 */
427 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
428 {
429 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
430 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
431 0x00000000)) {
432 mwifiex_dbg(adapter, ERROR,
433 "Disable host interrupt failed\n");
434 return -1;
435 }
436 }
437
438 return 0;
439 }
440
441 /*
442 * This function enables the host interrupt.
443 *
444 * The host interrupt enable mask is written to the card
445 * host interrupt mask register.
446 */
447 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
448 {
449 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
450 /* Simply write the mask to the register */
451 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
452 HOST_INTR_MASK)) {
453 mwifiex_dbg(adapter, ERROR,
454 "Enable host interrupt failed\n");
455 return -1;
456 }
457 }
458
459 return 0;
460 }
461
462 /*
463 * This function initializes TX buffer ring descriptors
464 */
465 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
466 {
467 struct pcie_service_card *card = adapter->card;
468 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
469 struct mwifiex_pcie_buf_desc *desc;
470 struct mwifiex_pfu_buf_desc *desc2;
471 int i;
472
473 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
474 card->tx_buf_list[i] = NULL;
475 if (reg->pfu_enabled) {
476 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
477 (sizeof(*desc2) * i);
478 desc2 = card->txbd_ring[i];
479 memset(desc2, 0, sizeof(*desc2));
480 } else {
481 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
482 (sizeof(*desc) * i);
483 desc = card->txbd_ring[i];
484 memset(desc, 0, sizeof(*desc));
485 }
486 }
487
488 return 0;
489 }
490
491 /* This function initializes RX buffer ring descriptors. Each SKB is allocated
492 * here and after mapping PCI memory, its physical address is assigned to
493 * PCIE Rx buffer descriptor's physical address.
494 */
495 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
496 {
497 struct pcie_service_card *card = adapter->card;
498 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
499 struct sk_buff *skb;
500 struct mwifiex_pcie_buf_desc *desc;
501 struct mwifiex_pfu_buf_desc *desc2;
502 dma_addr_t buf_pa;
503 int i;
504
505 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
506 /* Allocate skb here so that firmware can DMA data from it */
507 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
508 GFP_KERNEL | GFP_DMA);
509 if (!skb) {
510 mwifiex_dbg(adapter, ERROR,
511 "Unable to allocate skb for RX ring.\n");
512 kfree(card->rxbd_ring_vbase);
513 return -ENOMEM;
514 }
515
516 if (mwifiex_map_pci_memory(adapter, skb,
517 MWIFIEX_RX_DATA_BUF_SIZE,
518 PCI_DMA_FROMDEVICE))
519 return -1;
520
521 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
522
523 mwifiex_dbg(adapter, INFO,
524 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
525 skb, skb->len, skb->data, (u32)buf_pa,
526 (u32)((u64)buf_pa >> 32));
527
528 card->rx_buf_list[i] = skb;
529 if (reg->pfu_enabled) {
530 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
531 (sizeof(*desc2) * i);
532 desc2 = card->rxbd_ring[i];
533 desc2->paddr = buf_pa;
534 desc2->len = (u16)skb->len;
535 desc2->frag_len = (u16)skb->len;
536 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
537 desc2->offset = 0;
538 } else {
539 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
540 (sizeof(*desc) * i));
541 desc = card->rxbd_ring[i];
542 desc->paddr = buf_pa;
543 desc->len = (u16)skb->len;
544 desc->flags = 0;
545 }
546 }
547
548 return 0;
549 }
550
551 /* This function initializes event buffer ring descriptors. Each SKB is
552 * allocated here and after mapping PCI memory, its physical address is assigned
553 * to PCIE Rx buffer descriptor's physical address
554 */
555 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
556 {
557 struct pcie_service_card *card = adapter->card;
558 struct mwifiex_evt_buf_desc *desc;
559 struct sk_buff *skb;
560 dma_addr_t buf_pa;
561 int i;
562
563 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
564 /* Allocate skb here so that firmware can DMA data from it */
565 skb = dev_alloc_skb(MAX_EVENT_SIZE);
566 if (!skb) {
567 mwifiex_dbg(adapter, ERROR,
568 "Unable to allocate skb for EVENT buf.\n");
569 kfree(card->evtbd_ring_vbase);
570 return -ENOMEM;
571 }
572 skb_put(skb, MAX_EVENT_SIZE);
573
574 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
575 PCI_DMA_FROMDEVICE))
576 return -1;
577
578 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
579
580 mwifiex_dbg(adapter, EVENT,
581 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
582 skb, skb->len, skb->data, (u32)buf_pa,
583 (u32)((u64)buf_pa >> 32));
584
585 card->evt_buf_list[i] = skb;
586 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
587 (sizeof(*desc) * i));
588 desc = card->evtbd_ring[i];
589 desc->paddr = buf_pa;
590 desc->len = (u16)skb->len;
591 desc->flags = 0;
592 }
593
594 return 0;
595 }
596
597 /* This function cleans up TX buffer rings. If any of the buffer list has valid
598 * SKB address, associated SKB is freed.
599 */
600 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
601 {
602 struct pcie_service_card *card = adapter->card;
603 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
604 struct sk_buff *skb;
605 struct mwifiex_pcie_buf_desc *desc;
606 struct mwifiex_pfu_buf_desc *desc2;
607 int i;
608
609 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
610 if (reg->pfu_enabled) {
611 desc2 = card->txbd_ring[i];
612 if (card->tx_buf_list[i]) {
613 skb = card->tx_buf_list[i];
614 mwifiex_unmap_pci_memory(adapter, skb,
615 PCI_DMA_TODEVICE);
616 dev_kfree_skb_any(skb);
617 }
618 memset(desc2, 0, sizeof(*desc2));
619 } else {
620 desc = card->txbd_ring[i];
621 if (card->tx_buf_list[i]) {
622 skb = card->tx_buf_list[i];
623 mwifiex_unmap_pci_memory(adapter, skb,
624 PCI_DMA_TODEVICE);
625 dev_kfree_skb_any(skb);
626 }
627 memset(desc, 0, sizeof(*desc));
628 }
629 card->tx_buf_list[i] = NULL;
630 }
631
632 return;
633 }
634
635 /* This function cleans up RX buffer rings. If any of the buffer list has valid
636 * SKB address, associated SKB is freed.
637 */
638 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
639 {
640 struct pcie_service_card *card = adapter->card;
641 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
642 struct mwifiex_pcie_buf_desc *desc;
643 struct mwifiex_pfu_buf_desc *desc2;
644 struct sk_buff *skb;
645 int i;
646
647 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
648 if (reg->pfu_enabled) {
649 desc2 = card->rxbd_ring[i];
650 if (card->rx_buf_list[i]) {
651 skb = card->rx_buf_list[i];
652 mwifiex_unmap_pci_memory(adapter, skb,
653 PCI_DMA_FROMDEVICE);
654 dev_kfree_skb_any(skb);
655 }
656 memset(desc2, 0, sizeof(*desc2));
657 } else {
658 desc = card->rxbd_ring[i];
659 if (card->rx_buf_list[i]) {
660 skb = card->rx_buf_list[i];
661 mwifiex_unmap_pci_memory(adapter, skb,
662 PCI_DMA_FROMDEVICE);
663 dev_kfree_skb_any(skb);
664 }
665 memset(desc, 0, sizeof(*desc));
666 }
667 card->rx_buf_list[i] = NULL;
668 }
669
670 return;
671 }
672
673 /* This function cleans up event buffer rings. If any of the buffer list has
674 * valid SKB address, associated SKB is freed.
675 */
676 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
677 {
678 struct pcie_service_card *card = adapter->card;
679 struct mwifiex_evt_buf_desc *desc;
680 struct sk_buff *skb;
681 int i;
682
683 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
684 desc = card->evtbd_ring[i];
685 if (card->evt_buf_list[i]) {
686 skb = card->evt_buf_list[i];
687 mwifiex_unmap_pci_memory(adapter, skb,
688 PCI_DMA_FROMDEVICE);
689 dev_kfree_skb_any(skb);
690 }
691 card->evt_buf_list[i] = NULL;
692 memset(desc, 0, sizeof(*desc));
693 }
694
695 return;
696 }
697
698 /* This function creates buffer descriptor ring for TX
699 */
700 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
701 {
702 struct pcie_service_card *card = adapter->card;
703 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
704
705 /*
706 * driver maintaines the write pointer and firmware maintaines the read
707 * pointer. The write pointer starts at 0 (zero) while the read pointer
708 * starts at zero with rollover bit set
709 */
710 card->txbd_wrptr = 0;
711
712 if (reg->pfu_enabled)
713 card->txbd_rdptr = 0;
714 else
715 card->txbd_rdptr |= reg->tx_rollover_ind;
716
717 /* allocate shared memory for the BD ring and divide the same in to
718 several descriptors */
719 if (reg->pfu_enabled)
720 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
721 MWIFIEX_MAX_TXRX_BD;
722 else
723 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
724 MWIFIEX_MAX_TXRX_BD;
725
726 mwifiex_dbg(adapter, INFO,
727 "info: txbd_ring: Allocating %d bytes\n",
728 card->txbd_ring_size);
729 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
730 card->txbd_ring_size,
731 &card->txbd_ring_pbase);
732 if (!card->txbd_ring_vbase) {
733 mwifiex_dbg(adapter, ERROR,
734 "allocate consistent memory (%d bytes) failed!\n",
735 card->txbd_ring_size);
736 return -ENOMEM;
737 }
738 mwifiex_dbg(adapter, DATA,
739 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
740 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
741 (u32)((u64)card->txbd_ring_pbase >> 32),
742 card->txbd_ring_size);
743
744 return mwifiex_init_txq_ring(adapter);
745 }
746
747 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
748 {
749 struct pcie_service_card *card = adapter->card;
750 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
751
752 mwifiex_cleanup_txq_ring(adapter);
753
754 if (card->txbd_ring_vbase)
755 pci_free_consistent(card->dev, card->txbd_ring_size,
756 card->txbd_ring_vbase,
757 card->txbd_ring_pbase);
758 card->txbd_ring_size = 0;
759 card->txbd_wrptr = 0;
760 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
761 card->txbd_ring_vbase = NULL;
762 card->txbd_ring_pbase = 0;
763
764 return 0;
765 }
766
767 /*
768 * This function creates buffer descriptor ring for RX
769 */
770 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
771 {
772 struct pcie_service_card *card = adapter->card;
773 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
774
775 /*
776 * driver maintaines the read pointer and firmware maintaines the write
777 * pointer. The write pointer starts at 0 (zero) while the read pointer
778 * starts at zero with rollover bit set
779 */
780 card->rxbd_wrptr = 0;
781 card->rxbd_rdptr = reg->rx_rollover_ind;
782
783 if (reg->pfu_enabled)
784 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
785 MWIFIEX_MAX_TXRX_BD;
786 else
787 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
788 MWIFIEX_MAX_TXRX_BD;
789
790 mwifiex_dbg(adapter, INFO,
791 "info: rxbd_ring: Allocating %d bytes\n",
792 card->rxbd_ring_size);
793 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
794 card->rxbd_ring_size,
795 &card->rxbd_ring_pbase);
796 if (!card->rxbd_ring_vbase) {
797 mwifiex_dbg(adapter, ERROR,
798 "allocate consistent memory (%d bytes) failed!\n",
799 card->rxbd_ring_size);
800 return -ENOMEM;
801 }
802
803 mwifiex_dbg(adapter, DATA,
804 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
805 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
806 (u32)((u64)card->rxbd_ring_pbase >> 32),
807 card->rxbd_ring_size);
808
809 return mwifiex_init_rxq_ring(adapter);
810 }
811
812 /*
813 * This function deletes Buffer descriptor ring for RX
814 */
815 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
816 {
817 struct pcie_service_card *card = adapter->card;
818 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
819
820 mwifiex_cleanup_rxq_ring(adapter);
821
822 if (card->rxbd_ring_vbase)
823 pci_free_consistent(card->dev, card->rxbd_ring_size,
824 card->rxbd_ring_vbase,
825 card->rxbd_ring_pbase);
826 card->rxbd_ring_size = 0;
827 card->rxbd_wrptr = 0;
828 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
829 card->rxbd_ring_vbase = NULL;
830 card->rxbd_ring_pbase = 0;
831
832 return 0;
833 }
834
835 /*
836 * This function creates buffer descriptor ring for Events
837 */
838 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
839 {
840 struct pcie_service_card *card = adapter->card;
841 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
842
843 /*
844 * driver maintaines the read pointer and firmware maintaines the write
845 * pointer. The write pointer starts at 0 (zero) while the read pointer
846 * starts at zero with rollover bit set
847 */
848 card->evtbd_wrptr = 0;
849 card->evtbd_rdptr = reg->evt_rollover_ind;
850
851 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
852 MWIFIEX_MAX_EVT_BD;
853
854 mwifiex_dbg(adapter, INFO,
855 "info: evtbd_ring: Allocating %d bytes\n",
856 card->evtbd_ring_size);
857 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
858 card->evtbd_ring_size,
859 &card->evtbd_ring_pbase);
860 if (!card->evtbd_ring_vbase) {
861 mwifiex_dbg(adapter, ERROR,
862 "allocate consistent memory (%d bytes) failed!\n",
863 card->evtbd_ring_size);
864 return -ENOMEM;
865 }
866
867 mwifiex_dbg(adapter, EVENT,
868 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
869 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
870 (u32)((u64)card->evtbd_ring_pbase >> 32),
871 card->evtbd_ring_size);
872
873 return mwifiex_pcie_init_evt_ring(adapter);
874 }
875
876 /*
877 * This function deletes Buffer descriptor ring for Events
878 */
879 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
880 {
881 struct pcie_service_card *card = adapter->card;
882 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
883
884 mwifiex_cleanup_evt_ring(adapter);
885
886 if (card->evtbd_ring_vbase)
887 pci_free_consistent(card->dev, card->evtbd_ring_size,
888 card->evtbd_ring_vbase,
889 card->evtbd_ring_pbase);
890 card->evtbd_wrptr = 0;
891 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
892 card->evtbd_ring_size = 0;
893 card->evtbd_ring_vbase = NULL;
894 card->evtbd_ring_pbase = 0;
895
896 return 0;
897 }
898
899 /*
900 * This function allocates a buffer for CMDRSP
901 */
902 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
903 {
904 struct pcie_service_card *card = adapter->card;
905 struct sk_buff *skb;
906
907 /* Allocate memory for receiving command response data */
908 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
909 if (!skb) {
910 mwifiex_dbg(adapter, ERROR,
911 "Unable to allocate skb for command response data.\n");
912 return -ENOMEM;
913 }
914 skb_put(skb, MWIFIEX_UPLD_SIZE);
915 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
916 PCI_DMA_FROMDEVICE))
917 return -1;
918
919 card->cmdrsp_buf = skb;
920
921 return 0;
922 }
923
924 /*
925 * This function deletes a buffer for CMDRSP
926 */
927 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
928 {
929 struct pcie_service_card *card;
930
931 if (!adapter)
932 return 0;
933
934 card = adapter->card;
935
936 if (card && card->cmdrsp_buf) {
937 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
938 PCI_DMA_FROMDEVICE);
939 dev_kfree_skb_any(card->cmdrsp_buf);
940 }
941
942 if (card && card->cmd_buf) {
943 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
944 PCI_DMA_TODEVICE);
945 }
946 return 0;
947 }
948
949 /*
950 * This function allocates a buffer for sleep cookie
951 */
952 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
953 {
954 struct pcie_service_card *card = adapter->card;
955
956 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
957 &card->sleep_cookie_pbase);
958 if (!card->sleep_cookie_vbase) {
959 mwifiex_dbg(adapter, ERROR,
960 "pci_alloc_consistent failed!\n");
961 return -ENOMEM;
962 }
963 /* Init val of Sleep Cookie */
964 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
965
966 mwifiex_dbg(adapter, INFO,
967 "alloc_scook: sleep cookie=0x%x\n",
968 *((u32 *)card->sleep_cookie_vbase));
969
970 return 0;
971 }
972
973 /*
974 * This function deletes buffer for sleep cookie
975 */
976 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
977 {
978 struct pcie_service_card *card;
979
980 if (!adapter)
981 return 0;
982
983 card = adapter->card;
984
985 if (card && card->sleep_cookie_vbase) {
986 pci_free_consistent(card->dev, sizeof(u32),
987 card->sleep_cookie_vbase,
988 card->sleep_cookie_pbase);
989 card->sleep_cookie_vbase = NULL;
990 }
991
992 return 0;
993 }
994
995 /* This function flushes the TX buffer descriptor ring
996 * This function defined as handler is also called while cleaning TXRX
997 * during disconnect/ bss stop.
998 */
999 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1000 {
1001 struct pcie_service_card *card = adapter->card;
1002
1003 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
1004 card->txbd_flush = 1;
1005 /* write pointer already set at last send
1006 * send dnld-rdy intr again, wait for completion.
1007 */
1008 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1009 CPU_INTR_DNLD_RDY)) {
1010 mwifiex_dbg(adapter, ERROR,
1011 "failed to assert dnld-rdy interrupt.\n");
1012 return -1;
1013 }
1014 }
1015 return 0;
1016 }
1017
1018 /*
1019 * This function unmaps and frees downloaded data buffer
1020 */
1021 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
1022 {
1023 struct sk_buff *skb;
1024 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
1025 struct mwifiex_pcie_buf_desc *desc;
1026 struct mwifiex_pfu_buf_desc *desc2;
1027 struct pcie_service_card *card = adapter->card;
1028 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1029
1030 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1031 mwifiex_pm_wakeup_card(adapter);
1032
1033 /* Read the TX ring read pointer set by firmware */
1034 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
1035 mwifiex_dbg(adapter, ERROR,
1036 "SEND COMP: failed to read reg->tx_rdptr\n");
1037 return -1;
1038 }
1039
1040 mwifiex_dbg(adapter, DATA,
1041 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1042 card->txbd_rdptr, rdptr);
1043
1044 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1045 /* free from previous txbd_rdptr to current txbd_rdptr */
1046 while (((card->txbd_rdptr & reg->tx_mask) !=
1047 (rdptr & reg->tx_mask)) ||
1048 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1049 (rdptr & reg->tx_rollover_ind))) {
1050 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1051 reg->tx_start_ptr;
1052
1053 skb = card->tx_buf_list[wrdoneidx];
1054
1055 if (skb) {
1056 mwifiex_dbg(adapter, DATA,
1057 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1058 skb, wrdoneidx);
1059 mwifiex_unmap_pci_memory(adapter, skb,
1060 PCI_DMA_TODEVICE);
1061
1062 unmap_count++;
1063
1064 if (card->txbd_flush)
1065 mwifiex_write_data_complete(adapter, skb, 0,
1066 -1);
1067 else
1068 mwifiex_write_data_complete(adapter, skb, 0, 0);
1069 }
1070
1071 card->tx_buf_list[wrdoneidx] = NULL;
1072
1073 if (reg->pfu_enabled) {
1074 desc2 = card->txbd_ring[wrdoneidx];
1075 memset(desc2, 0, sizeof(*desc2));
1076 } else {
1077 desc = card->txbd_ring[wrdoneidx];
1078 memset(desc, 0, sizeof(*desc));
1079 }
1080 switch (card->dev->device) {
1081 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1082 card->txbd_rdptr++;
1083 break;
1084 case PCIE_DEVICE_ID_MARVELL_88W8897:
1085 card->txbd_rdptr += reg->ring_tx_start_ptr;
1086 break;
1087 }
1088
1089
1090 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
1091 card->txbd_rdptr = ((card->txbd_rdptr &
1092 reg->tx_rollover_ind) ^
1093 reg->tx_rollover_ind);
1094 }
1095
1096 if (unmap_count)
1097 adapter->data_sent = false;
1098
1099 if (card->txbd_flush) {
1100 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
1101 card->txbd_flush = 0;
1102 else
1103 mwifiex_clean_pcie_ring_buf(adapter);
1104 }
1105
1106 return 0;
1107 }
1108
1109 /* This function sends data buffer to device. First 4 bytes of payload
1110 * are filled with payload length and payload type. Then this payload
1111 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1112 * Download ready interrupt to FW is deffered if Tx ring is not full and
1113 * additional payload can be accomodated.
1114 * Caller must ensure tx_param parameter to this function is not NULL.
1115 */
1116 static int
1117 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1118 struct mwifiex_tx_param *tx_param)
1119 {
1120 struct pcie_service_card *card = adapter->card;
1121 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1122 u32 wrindx, num_tx_buffs, rx_val;
1123 int ret;
1124 dma_addr_t buf_pa;
1125 struct mwifiex_pcie_buf_desc *desc = NULL;
1126 struct mwifiex_pfu_buf_desc *desc2 = NULL;
1127 __le16 *tmp;
1128
1129 if (!(skb->data && skb->len)) {
1130 mwifiex_dbg(adapter, ERROR,
1131 "%s(): invalid parameter <%p, %#x>\n",
1132 __func__, skb->data, skb->len);
1133 return -1;
1134 }
1135
1136 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1137 mwifiex_pm_wakeup_card(adapter);
1138
1139 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1140 mwifiex_dbg(adapter, DATA,
1141 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1142 card->txbd_rdptr, card->txbd_wrptr);
1143 if (mwifiex_pcie_txbd_not_full(card)) {
1144 u8 *payload;
1145
1146 adapter->data_sent = true;
1147 payload = skb->data;
1148 tmp = (__le16 *)&payload[0];
1149 *tmp = cpu_to_le16((u16)skb->len);
1150 tmp = (__le16 *)&payload[2];
1151 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
1152
1153 if (mwifiex_map_pci_memory(adapter, skb, skb->len,
1154 PCI_DMA_TODEVICE))
1155 return -1;
1156
1157 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
1158 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1159 card->tx_buf_list[wrindx] = skb;
1160
1161 if (reg->pfu_enabled) {
1162 desc2 = card->txbd_ring[wrindx];
1163 desc2->paddr = buf_pa;
1164 desc2->len = (u16)skb->len;
1165 desc2->frag_len = (u16)skb->len;
1166 desc2->offset = 0;
1167 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1168 MWIFIEX_BD_FLAG_LAST_DESC;
1169 } else {
1170 desc = card->txbd_ring[wrindx];
1171 desc->paddr = buf_pa;
1172 desc->len = (u16)skb->len;
1173 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1174 MWIFIEX_BD_FLAG_LAST_DESC;
1175 }
1176
1177 switch (card->dev->device) {
1178 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1179 card->txbd_wrptr++;
1180 break;
1181 case PCIE_DEVICE_ID_MARVELL_88W8897:
1182 card->txbd_wrptr += reg->ring_tx_start_ptr;
1183 break;
1184 }
1185
1186 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
1187 card->txbd_wrptr = ((card->txbd_wrptr &
1188 reg->tx_rollover_ind) ^
1189 reg->tx_rollover_ind);
1190
1191 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
1192 /* Write the TX ring write pointer in to reg->tx_wrptr */
1193 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
1194 card->txbd_wrptr | rx_val)) {
1195 mwifiex_dbg(adapter, ERROR,
1196 "SEND DATA: failed to write reg->tx_wrptr\n");
1197 ret = -1;
1198 goto done_unmap;
1199 }
1200 if ((mwifiex_pcie_txbd_not_full(card)) &&
1201 tx_param->next_pkt_len) {
1202 /* have more packets and TxBD still can hold more */
1203 mwifiex_dbg(adapter, DATA,
1204 "SEND DATA: delay dnld-rdy interrupt.\n");
1205 adapter->data_sent = false;
1206 } else {
1207 /* Send the TX ready interrupt */
1208 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1209 CPU_INTR_DNLD_RDY)) {
1210 mwifiex_dbg(adapter, ERROR,
1211 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1212 ret = -1;
1213 goto done_unmap;
1214 }
1215 }
1216 mwifiex_dbg(adapter, DATA,
1217 "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1218 "%#x> and sent packet to firmware successfully\n",
1219 card->txbd_rdptr, card->txbd_wrptr);
1220 } else {
1221 mwifiex_dbg(adapter, DATA,
1222 "info: TX Ring full, can't send packets to fw\n");
1223 adapter->data_sent = true;
1224 /* Send the TX ready interrupt */
1225 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1226 CPU_INTR_DNLD_RDY))
1227 mwifiex_dbg(adapter, ERROR,
1228 "SEND DATA: failed to assert door-bell intr\n");
1229 return -EBUSY;
1230 }
1231
1232 return -EINPROGRESS;
1233 done_unmap:
1234 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1235 card->tx_buf_list[wrindx] = NULL;
1236 if (reg->pfu_enabled)
1237 memset(desc2, 0, sizeof(*desc2));
1238 else
1239 memset(desc, 0, sizeof(*desc));
1240
1241 return ret;
1242 }
1243
1244 /*
1245 * This function handles received buffer ring and
1246 * dispatches packets to upper
1247 */
1248 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1249 {
1250 struct pcie_service_card *card = adapter->card;
1251 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1252 u32 wrptr, rd_index, tx_val;
1253 dma_addr_t buf_pa;
1254 int ret = 0;
1255 struct sk_buff *skb_tmp = NULL;
1256 struct mwifiex_pcie_buf_desc *desc;
1257 struct mwifiex_pfu_buf_desc *desc2;
1258
1259 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1260 mwifiex_pm_wakeup_card(adapter);
1261
1262 /* Read the RX ring Write pointer set by firmware */
1263 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1264 mwifiex_dbg(adapter, ERROR,
1265 "RECV DATA: failed to read reg->rx_wrptr\n");
1266 ret = -1;
1267 goto done;
1268 }
1269 card->rxbd_wrptr = wrptr;
1270
1271 while (((wrptr & reg->rx_mask) !=
1272 (card->rxbd_rdptr & reg->rx_mask)) ||
1273 ((wrptr & reg->rx_rollover_ind) ==
1274 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
1275 struct sk_buff *skb_data;
1276 u16 rx_len;
1277 __le16 pkt_len;
1278
1279 rd_index = card->rxbd_rdptr & reg->rx_mask;
1280 skb_data = card->rx_buf_list[rd_index];
1281
1282 /* If skb allocation was failed earlier for Rx packet,
1283 * rx_buf_list[rd_index] would have been left with a NULL.
1284 */
1285 if (!skb_data)
1286 return -ENOMEM;
1287
1288 mwifiex_unmap_pci_memory(adapter, skb_data, PCI_DMA_FROMDEVICE);
1289 card->rx_buf_list[rd_index] = NULL;
1290
1291 /* Get data length from interface header -
1292 * first 2 bytes for len, next 2 bytes is for type
1293 */
1294 pkt_len = *((__le16 *)skb_data->data);
1295 rx_len = le16_to_cpu(pkt_len);
1296 if (WARN_ON(rx_len <= INTF_HEADER_LEN ||
1297 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
1298 mwifiex_dbg(adapter, ERROR,
1299 "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1300 rx_len, card->rxbd_rdptr, wrptr);
1301 dev_kfree_skb_any(skb_data);
1302 } else {
1303 skb_put(skb_data, rx_len);
1304 mwifiex_dbg(adapter, DATA,
1305 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1306 card->rxbd_rdptr, wrptr, rx_len);
1307 skb_pull(skb_data, INTF_HEADER_LEN);
1308 if (adapter->rx_work_enabled) {
1309 skb_queue_tail(&adapter->rx_data_q, skb_data);
1310 adapter->data_received = true;
1311 atomic_inc(&adapter->rx_pending);
1312 } else {
1313 mwifiex_handle_rx_packet(adapter, skb_data);
1314 }
1315 }
1316
1317 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1318 GFP_KERNEL | GFP_DMA);
1319 if (!skb_tmp) {
1320 mwifiex_dbg(adapter, ERROR,
1321 "Unable to allocate skb.\n");
1322 return -ENOMEM;
1323 }
1324
1325 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1326 MWIFIEX_RX_DATA_BUF_SIZE,
1327 PCI_DMA_FROMDEVICE))
1328 return -1;
1329
1330 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
1331
1332 mwifiex_dbg(adapter, INFO,
1333 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1334 skb_tmp, rd_index);
1335 card->rx_buf_list[rd_index] = skb_tmp;
1336
1337 if (reg->pfu_enabled) {
1338 desc2 = card->rxbd_ring[rd_index];
1339 desc2->paddr = buf_pa;
1340 desc2->len = skb_tmp->len;
1341 desc2->frag_len = skb_tmp->len;
1342 desc2->offset = 0;
1343 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1344 } else {
1345 desc = card->rxbd_ring[rd_index];
1346 desc->paddr = buf_pa;
1347 desc->len = skb_tmp->len;
1348 desc->flags = 0;
1349 }
1350
1351 if ((++card->rxbd_rdptr & reg->rx_mask) ==
1352 MWIFIEX_MAX_TXRX_BD) {
1353 card->rxbd_rdptr = ((card->rxbd_rdptr &
1354 reg->rx_rollover_ind) ^
1355 reg->rx_rollover_ind);
1356 }
1357 mwifiex_dbg(adapter, DATA,
1358 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1359 card->rxbd_rdptr, wrptr);
1360
1361 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
1362 /* Write the RX ring read pointer in to reg->rx_rdptr */
1363 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
1364 card->rxbd_rdptr | tx_val)) {
1365 mwifiex_dbg(adapter, DATA,
1366 "RECV DATA: failed to write reg->rx_rdptr\n");
1367 ret = -1;
1368 goto done;
1369 }
1370
1371 /* Read the RX ring Write pointer set by firmware */
1372 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1373 mwifiex_dbg(adapter, ERROR,
1374 "RECV DATA: failed to read reg->rx_wrptr\n");
1375 ret = -1;
1376 goto done;
1377 }
1378 mwifiex_dbg(adapter, DATA,
1379 "info: RECV DATA: Rcvd packet from fw successfully\n");
1380 card->rxbd_wrptr = wrptr;
1381 }
1382
1383 done:
1384 return ret;
1385 }
1386
1387 /*
1388 * This function downloads the boot command to device
1389 */
1390 static int
1391 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1392 {
1393 dma_addr_t buf_pa;
1394 struct pcie_service_card *card = adapter->card;
1395 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1396
1397 if (!(skb->data && skb->len)) {
1398 mwifiex_dbg(adapter, ERROR,
1399 "Invalid parameter in %s <%p. len %d>\n",
1400 __func__, skb->data, skb->len);
1401 return -1;
1402 }
1403
1404 if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE))
1405 return -1;
1406
1407 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1408
1409 /* Write the lower 32bits of the physical address to low command
1410 * address scratch register
1411 */
1412 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
1413 mwifiex_dbg(adapter, ERROR,
1414 "%s: failed to write download command to boot code.\n",
1415 __func__);
1416 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1417 return -1;
1418 }
1419
1420 /* Write the upper 32bits of the physical address to high command
1421 * address scratch register
1422 */
1423 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1424 (u32)((u64)buf_pa >> 32))) {
1425 mwifiex_dbg(adapter, ERROR,
1426 "%s: failed to write download command to boot code.\n",
1427 __func__);
1428 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1429 return -1;
1430 }
1431
1432 /* Write the command length to cmd_size scratch register */
1433 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
1434 mwifiex_dbg(adapter, ERROR,
1435 "%s: failed to write command len to cmd_size scratch reg\n",
1436 __func__);
1437 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1438 return -1;
1439 }
1440
1441 /* Ring the door bell */
1442 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1443 CPU_INTR_DOOR_BELL)) {
1444 mwifiex_dbg(adapter, ERROR,
1445 "%s: failed to assert door-bell intr\n", __func__);
1446 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1447 return -1;
1448 }
1449
1450 return 0;
1451 }
1452
1453 /* This function init rx port in firmware which in turn enables to receive data
1454 * from device before transmitting any packet.
1455 */
1456 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1457 {
1458 struct pcie_service_card *card = adapter->card;
1459 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1460 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
1461
1462 /* Write the RX ring read pointer in to reg->rx_rdptr */
1463 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1464 tx_wrap)) {
1465 mwifiex_dbg(adapter, ERROR,
1466 "RECV DATA: failed to write reg->rx_rdptr\n");
1467 return -1;
1468 }
1469 return 0;
1470 }
1471
1472 /* This function downloads commands to the device
1473 */
1474 static int
1475 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1476 {
1477 struct pcie_service_card *card = adapter->card;
1478 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1479 int ret = 0;
1480 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1481 u8 *payload = (u8 *)skb->data;
1482
1483 if (!(skb->data && skb->len)) {
1484 mwifiex_dbg(adapter, ERROR,
1485 "Invalid parameter in %s <%p, %#x>\n",
1486 __func__, skb->data, skb->len);
1487 return -1;
1488 }
1489
1490 /* Make sure a command response buffer is available */
1491 if (!card->cmdrsp_buf) {
1492 mwifiex_dbg(adapter, ERROR,
1493 "No response buffer available, send command failed\n");
1494 return -EBUSY;
1495 }
1496
1497 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1498 mwifiex_pm_wakeup_card(adapter);
1499
1500 adapter->cmd_sent = true;
1501
1502 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
1503 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
1504
1505 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1506 return -1;
1507
1508 card->cmd_buf = skb;
1509
1510 /* To send a command, the driver will:
1511 1. Write the 64bit physical address of the data buffer to
1512 cmd response address low + cmd response address high
1513 2. Ring the door bell (i.e. set the door bell interrupt)
1514
1515 In response to door bell interrupt, the firmware will perform
1516 the DMA of the command packet (first header to obtain the total
1517 length and then rest of the command).
1518 */
1519
1520 if (card->cmdrsp_buf) {
1521 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
1522 /* Write the lower 32bits of the cmdrsp buffer physical
1523 address */
1524 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
1525 (u32)cmdrsp_buf_pa)) {
1526 mwifiex_dbg(adapter, ERROR,
1527 "Failed to write download cmd to boot code.\n");
1528 ret = -1;
1529 goto done;
1530 }
1531 /* Write the upper 32bits of the cmdrsp buffer physical
1532 address */
1533 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
1534 (u32)((u64)cmdrsp_buf_pa >> 32))) {
1535 mwifiex_dbg(adapter, ERROR,
1536 "Failed to write download cmd to boot code.\n");
1537 ret = -1;
1538 goto done;
1539 }
1540 }
1541
1542 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
1543 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1544 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1545 (u32)cmd_buf_pa)) {
1546 mwifiex_dbg(adapter, ERROR,
1547 "Failed to write download cmd to boot code.\n");
1548 ret = -1;
1549 goto done;
1550 }
1551 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1552 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1553 (u32)((u64)cmd_buf_pa >> 32))) {
1554 mwifiex_dbg(adapter, ERROR,
1555 "Failed to write download cmd to boot code.\n");
1556 ret = -1;
1557 goto done;
1558 }
1559
1560 /* Write the command length to reg->cmd_size */
1561 if (mwifiex_write_reg(adapter, reg->cmd_size,
1562 card->cmd_buf->len)) {
1563 mwifiex_dbg(adapter, ERROR,
1564 "Failed to write cmd len to reg->cmd_size\n");
1565 ret = -1;
1566 goto done;
1567 }
1568
1569 /* Ring the door bell */
1570 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1571 CPU_INTR_DOOR_BELL)) {
1572 mwifiex_dbg(adapter, ERROR,
1573 "Failed to assert door-bell intr\n");
1574 ret = -1;
1575 goto done;
1576 }
1577
1578 done:
1579 if (ret)
1580 adapter->cmd_sent = false;
1581
1582 return 0;
1583 }
1584
1585 /*
1586 * This function handles command complete interrupt
1587 */
1588 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1589 {
1590 struct pcie_service_card *card = adapter->card;
1591 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1592 struct sk_buff *skb = card->cmdrsp_buf;
1593 int count = 0;
1594 u16 rx_len;
1595 __le16 pkt_len;
1596
1597 mwifiex_dbg(adapter, CMD,
1598 "info: Rx CMD Response\n");
1599
1600 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_FROMDEVICE);
1601
1602 /* Unmap the command as a response has been received. */
1603 if (card->cmd_buf) {
1604 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1605 PCI_DMA_TODEVICE);
1606 card->cmd_buf = NULL;
1607 }
1608
1609 pkt_len = *((__le16 *)skb->data);
1610 rx_len = le16_to_cpu(pkt_len);
1611 skb_trim(skb, rx_len);
1612 skb_pull(skb, INTF_HEADER_LEN);
1613
1614 if (!adapter->curr_cmd) {
1615 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
1616 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1617 skb->len);
1618 mwifiex_pcie_enable_host_int(adapter);
1619 if (mwifiex_write_reg(adapter,
1620 PCIE_CPU_INT_EVENT,
1621 CPU_INTR_SLEEP_CFM_DONE)) {
1622 mwifiex_dbg(adapter, ERROR,
1623 "Write register failed\n");
1624 return -1;
1625 }
1626 mwifiex_delay_for_sleep_cookie(adapter,
1627 MWIFIEX_MAX_DELAY_COUNT);
1628 while (reg->sleep_cookie && (count++ < 10) &&
1629 mwifiex_pcie_ok_to_access_hw(adapter))
1630 usleep_range(50, 60);
1631 } else {
1632 mwifiex_dbg(adapter, ERROR,
1633 "There is no command but got cmdrsp\n");
1634 }
1635 memcpy(adapter->upld_buf, skb->data,
1636 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
1637 skb_push(skb, INTF_HEADER_LEN);
1638 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1639 PCI_DMA_FROMDEVICE))
1640 return -1;
1641 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1642 adapter->curr_cmd->resp_skb = skb;
1643 adapter->cmd_resp_received = true;
1644 /* Take the pointer and set it to CMD node and will
1645 return in the response complete callback */
1646 card->cmdrsp_buf = NULL;
1647
1648 /* Clear the cmd-rsp buffer address in scratch registers. This
1649 will prevent firmware from writing to the same response
1650 buffer again. */
1651 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
1652 mwifiex_dbg(adapter, ERROR,
1653 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
1654 return -1;
1655 }
1656 /* Write the upper 32bits of the cmdrsp buffer physical
1657 address */
1658 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
1659 mwifiex_dbg(adapter, ERROR,
1660 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
1661 return -1;
1662 }
1663 }
1664
1665 return 0;
1666 }
1667
1668 /*
1669 * Command Response processing complete handler
1670 */
1671 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1672 struct sk_buff *skb)
1673 {
1674 struct pcie_service_card *card = adapter->card;
1675
1676 if (skb) {
1677 card->cmdrsp_buf = skb;
1678 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
1679 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1680 PCI_DMA_FROMDEVICE))
1681 return -1;
1682 }
1683
1684 return 0;
1685 }
1686
1687 /*
1688 * This function handles firmware event ready interrupt
1689 */
1690 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1691 {
1692 struct pcie_service_card *card = adapter->card;
1693 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1694 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1695 u32 wrptr, event;
1696 struct mwifiex_evt_buf_desc *desc;
1697
1698 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1699 mwifiex_pm_wakeup_card(adapter);
1700
1701 if (adapter->event_received) {
1702 mwifiex_dbg(adapter, EVENT,
1703 "info: Event being processed,\t"
1704 "do not process this interrupt just yet\n");
1705 return 0;
1706 }
1707
1708 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1709 mwifiex_dbg(adapter, ERROR,
1710 "info: Invalid read pointer...\n");
1711 return -1;
1712 }
1713
1714 /* Read the event ring write pointer set by firmware */
1715 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1716 mwifiex_dbg(adapter, ERROR,
1717 "EventReady: failed to read reg->evt_wrptr\n");
1718 return -1;
1719 }
1720
1721 mwifiex_dbg(adapter, EVENT,
1722 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
1723 card->evtbd_rdptr, wrptr);
1724 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1725 & MWIFIEX_EVTBD_MASK)) ||
1726 ((wrptr & reg->evt_rollover_ind) ==
1727 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
1728 struct sk_buff *skb_cmd;
1729 __le16 data_len = 0;
1730 u16 evt_len;
1731
1732 mwifiex_dbg(adapter, INFO,
1733 "info: Read Index: %d\n", rdptr);
1734 skb_cmd = card->evt_buf_list[rdptr];
1735 mwifiex_unmap_pci_memory(adapter, skb_cmd, PCI_DMA_FROMDEVICE);
1736
1737 /* Take the pointer and set it to event pointer in adapter
1738 and will return back after event handling callback */
1739 card->evt_buf_list[rdptr] = NULL;
1740 desc = card->evtbd_ring[rdptr];
1741 memset(desc, 0, sizeof(*desc));
1742
1743 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
1744 adapter->event_cause = event;
1745 /* The first 4bytes will be the event transfer header
1746 len is 2 bytes followed by type which is 2 bytes */
1747 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1748 evt_len = le16_to_cpu(data_len);
1749 skb_trim(skb_cmd, evt_len);
1750 skb_pull(skb_cmd, INTF_HEADER_LEN);
1751 mwifiex_dbg(adapter, EVENT,
1752 "info: Event length: %d\n", evt_len);
1753
1754 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1755 memcpy(adapter->event_body, skb_cmd->data +
1756 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1757 MWIFIEX_EVENT_HEADER_LEN);
1758
1759 adapter->event_received = true;
1760 adapter->event_skb = skb_cmd;
1761
1762 /* Do not update the event read pointer here, wait till the
1763 buffer is released. This is just to make things simpler,
1764 we need to find a better method of managing these buffers.
1765 */
1766 } else {
1767 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1768 CPU_INTR_EVENT_DONE)) {
1769 mwifiex_dbg(adapter, ERROR,
1770 "Write register failed\n");
1771 return -1;
1772 }
1773 }
1774
1775 return 0;
1776 }
1777
1778 /*
1779 * Event processing complete handler
1780 */
1781 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1782 struct sk_buff *skb)
1783 {
1784 struct pcie_service_card *card = adapter->card;
1785 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1786 int ret = 0;
1787 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1788 u32 wrptr;
1789 struct mwifiex_evt_buf_desc *desc;
1790
1791 if (!skb)
1792 return 0;
1793
1794 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1795 mwifiex_dbg(adapter, ERROR,
1796 "event_complete: Invalid rdptr 0x%x\n",
1797 rdptr);
1798 return -EINVAL;
1799 }
1800
1801 /* Read the event ring write pointer set by firmware */
1802 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
1803 mwifiex_dbg(adapter, ERROR,
1804 "event_complete: failed to read reg->evt_wrptr\n");
1805 return -1;
1806 }
1807
1808 if (!card->evt_buf_list[rdptr]) {
1809 skb_push(skb, INTF_HEADER_LEN);
1810 if (mwifiex_map_pci_memory(adapter, skb,
1811 MAX_EVENT_SIZE,
1812 PCI_DMA_FROMDEVICE))
1813 return -1;
1814 card->evt_buf_list[rdptr] = skb;
1815 desc = card->evtbd_ring[rdptr];
1816 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
1817 desc->len = (u16)skb->len;
1818 desc->flags = 0;
1819 skb = NULL;
1820 } else {
1821 mwifiex_dbg(adapter, ERROR,
1822 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1823 rdptr, card->evt_buf_list[rdptr], skb);
1824 }
1825
1826 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1827 card->evtbd_rdptr = ((card->evtbd_rdptr &
1828 reg->evt_rollover_ind) ^
1829 reg->evt_rollover_ind);
1830 }
1831
1832 mwifiex_dbg(adapter, EVENT,
1833 "info: Updated <Rd: 0x%x, Wr: 0x%x>",
1834 card->evtbd_rdptr, wrptr);
1835
1836 /* Write the event ring read pointer in to reg->evt_rdptr */
1837 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1838 card->evtbd_rdptr)) {
1839 mwifiex_dbg(adapter, ERROR,
1840 "event_complete: failed to read reg->evt_rdptr\n");
1841 return -1;
1842 }
1843
1844 mwifiex_dbg(adapter, EVENT,
1845 "info: Check Events Again\n");
1846 ret = mwifiex_pcie_process_event_ready(adapter);
1847
1848 return ret;
1849 }
1850
1851 /*
1852 * This function downloads the firmware to the card.
1853 *
1854 * Firmware is downloaded to the card in blocks. Every block download
1855 * is tested for CRC errors, and retried a number of times before
1856 * returning failure.
1857 */
1858 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1859 struct mwifiex_fw_image *fw)
1860 {
1861 int ret;
1862 u8 *firmware = fw->fw_buf;
1863 u32 firmware_len = fw->fw_len;
1864 u32 offset = 0;
1865 struct sk_buff *skb;
1866 u32 txlen, tx_blocks = 0, tries, len;
1867 u32 block_retry_cnt = 0;
1868 struct pcie_service_card *card = adapter->card;
1869 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1870
1871 if (!firmware || !firmware_len) {
1872 mwifiex_dbg(adapter, ERROR,
1873 "No firmware image found! Terminating download\n");
1874 return -1;
1875 }
1876
1877 mwifiex_dbg(adapter, INFO,
1878 "info: Downloading FW image (%d bytes)\n",
1879 firmware_len);
1880
1881 if (mwifiex_pcie_disable_host_int(adapter)) {
1882 mwifiex_dbg(adapter, ERROR,
1883 "%s: Disabling interrupts failed.\n", __func__);
1884 return -1;
1885 }
1886
1887 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1888 if (!skb) {
1889 ret = -ENOMEM;
1890 goto done;
1891 }
1892
1893 /* Perform firmware data transfer */
1894 do {
1895 u32 ireg_intr = 0;
1896
1897 /* More data? */
1898 if (offset >= firmware_len)
1899 break;
1900
1901 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
1902 ret = mwifiex_read_reg(adapter, reg->cmd_size,
1903 &len);
1904 if (ret) {
1905 mwifiex_dbg(adapter, FATAL,
1906 "Failed reading len from boot code\n");
1907 goto done;
1908 }
1909 if (len)
1910 break;
1911 usleep_range(10, 20);
1912 }
1913
1914 if (!len) {
1915 break;
1916 } else if (len > MWIFIEX_UPLD_SIZE) {
1917 mwifiex_dbg(adapter, ERROR,
1918 "FW download failure @ %d, invalid length %d\n",
1919 offset, len);
1920 ret = -1;
1921 goto done;
1922 }
1923
1924 txlen = len;
1925
1926 if (len & BIT(0)) {
1927 block_retry_cnt++;
1928 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
1929 mwifiex_dbg(adapter, ERROR,
1930 "FW download failure @ %d, over max\t"
1931 "retry count\n", offset);
1932 ret = -1;
1933 goto done;
1934 }
1935 mwifiex_dbg(adapter, ERROR,
1936 "FW CRC error indicated by the\t"
1937 "helper: len = 0x%04X, txlen = %d\n",
1938 len, txlen);
1939 len &= ~BIT(0);
1940 /* Setting this to 0 to resend from same offset */
1941 txlen = 0;
1942 } else {
1943 block_retry_cnt = 0;
1944 /* Set blocksize to transfer - checking for
1945 last block */
1946 if (firmware_len - offset < txlen)
1947 txlen = firmware_len - offset;
1948
1949 mwifiex_dbg(adapter, INFO, ".");
1950
1951 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
1952 card->pcie.blksz_fw_dl;
1953
1954 /* Copy payload to buffer */
1955 memmove(skb->data, &firmware[offset], txlen);
1956 }
1957
1958 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
1959 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
1960
1961 /* Send the boot command to device */
1962 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
1963 mwifiex_dbg(adapter, ERROR,
1964 "Failed to send firmware download command\n");
1965 ret = -1;
1966 goto done;
1967 }
1968
1969 /* Wait for the command done interrupt */
1970 do {
1971 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
1972 &ireg_intr)) {
1973 mwifiex_dbg(adapter, ERROR,
1974 "%s: Failed to read\t"
1975 "interrupt status during fw dnld.\n",
1976 __func__);
1977 mwifiex_unmap_pci_memory(adapter, skb,
1978 PCI_DMA_TODEVICE);
1979 ret = -1;
1980 goto done;
1981 }
1982 } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
1983 CPU_INTR_DOOR_BELL);
1984
1985 mwifiex_unmap_pci_memory(adapter, skb, PCI_DMA_TODEVICE);
1986
1987 offset += txlen;
1988 } while (true);
1989
1990 mwifiex_dbg(adapter, MSG,
1991 "info: FW download over, size %d bytes\n", offset);
1992
1993 ret = 0;
1994
1995 done:
1996 dev_kfree_skb_any(skb);
1997 return ret;
1998 }
1999
2000 /*
2001 * This function checks the firmware status in card.
2002 *
2003 * The winner interface is also determined by this function.
2004 */
2005 static int
2006 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2007 {
2008 int ret = 0;
2009 u32 firmware_stat, winner_status;
2010 struct pcie_service_card *card = adapter->card;
2011 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2012 u32 tries;
2013
2014 /* Mask spurios interrupts */
2015 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
2016 HOST_INTR_MASK)) {
2017 mwifiex_dbg(adapter, ERROR,
2018 "Write register failed\n");
2019 return -1;
2020 }
2021
2022 mwifiex_dbg(adapter, INFO,
2023 "Setting driver ready signature\n");
2024 if (mwifiex_write_reg(adapter, reg->drv_rdy,
2025 FIRMWARE_READY_PCIE)) {
2026 mwifiex_dbg(adapter, ERROR,
2027 "Failed to write driver ready signature\n");
2028 return -1;
2029 }
2030
2031 /* Wait for firmware initialization event */
2032 for (tries = 0; tries < poll_num; tries++) {
2033 if (mwifiex_read_reg(adapter, reg->fw_status,
2034 &firmware_stat))
2035 ret = -1;
2036 else
2037 ret = 0;
2038 if (ret)
2039 continue;
2040 if (firmware_stat == FIRMWARE_READY_PCIE) {
2041 ret = 0;
2042 break;
2043 } else {
2044 msleep(100);
2045 ret = -1;
2046 }
2047 }
2048
2049 if (ret) {
2050 if (mwifiex_read_reg(adapter, reg->fw_status,
2051 &winner_status))
2052 ret = -1;
2053 else if (!winner_status) {
2054 mwifiex_dbg(adapter, INFO,
2055 "PCI-E is the winner\n");
2056 adapter->winner = 1;
2057 } else {
2058 mwifiex_dbg(adapter, ERROR,
2059 "PCI-E is not the winner <%#x,%d>, exit dnld\n",
2060 ret, adapter->winner);
2061 }
2062 }
2063
2064 return ret;
2065 }
2066
2067 /*
2068 * This function reads the interrupt status from card.
2069 */
2070 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
2071 {
2072 u32 pcie_ireg;
2073 unsigned long flags;
2074
2075 if (!mwifiex_pcie_ok_to_access_hw(adapter))
2076 return;
2077
2078 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) {
2079 mwifiex_dbg(adapter, ERROR, "Read register failed\n");
2080 return;
2081 }
2082
2083 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2084
2085 mwifiex_pcie_disable_host_int(adapter);
2086
2087 /* Clear the pending interrupts */
2088 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2089 ~pcie_ireg)) {
2090 mwifiex_dbg(adapter, ERROR,
2091 "Write register failed\n");
2092 return;
2093 }
2094 spin_lock_irqsave(&adapter->int_lock, flags);
2095 adapter->int_status |= pcie_ireg;
2096 spin_unlock_irqrestore(&adapter->int_lock, flags);
2097
2098 if (!adapter->pps_uapsd_mode &&
2099 adapter->ps_state == PS_STATE_SLEEP &&
2100 mwifiex_pcie_ok_to_access_hw(adapter)) {
2101 /* Potentially for PCIe we could get other
2102 * interrupts like shared. Don't change power
2103 * state until cookie is set */
2104 adapter->ps_state = PS_STATE_AWAKE;
2105 adapter->pm_wakeup_fw_try = false;
2106 del_timer(&adapter->wakeup_timer);
2107 }
2108 }
2109 }
2110
2111 /*
2112 * Interrupt handler for PCIe root port
2113 *
2114 * This function reads the interrupt status from firmware and assigns
2115 * the main process in workqueue which will handle the interrupt.
2116 */
2117 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2118 {
2119 struct pci_dev *pdev = (struct pci_dev *)context;
2120 struct pcie_service_card *card;
2121 struct mwifiex_adapter *adapter;
2122
2123 if (!pdev) {
2124 pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev);
2125 goto exit;
2126 }
2127
2128 card = pci_get_drvdata(pdev);
2129 if (!card || !card->adapter) {
2130 pr_debug("info: %s: card=%p adapter=%p\n", __func__, card,
2131 card ? card->adapter : NULL);
2132 goto exit;
2133 }
2134 adapter = card->adapter;
2135
2136 if (adapter->surprise_removed)
2137 goto exit;
2138
2139 mwifiex_interrupt_status(adapter);
2140 mwifiex_queue_main_work(adapter);
2141
2142 exit:
2143 return IRQ_HANDLED;
2144 }
2145
2146 /*
2147 * This function checks the current interrupt status.
2148 *
2149 * The following interrupts are checked and handled by this function -
2150 * - Data sent
2151 * - Command sent
2152 * - Command received
2153 * - Packets received
2154 * - Events received
2155 *
2156 * In case of Rx packets received, the packets are uploaded from card to
2157 * host and processed accordingly.
2158 */
2159 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2160 {
2161 int ret;
2162 u32 pcie_ireg;
2163 unsigned long flags;
2164
2165 spin_lock_irqsave(&adapter->int_lock, flags);
2166 /* Clear out unused interrupts */
2167 pcie_ireg = adapter->int_status;
2168 adapter->int_status = 0;
2169 spin_unlock_irqrestore(&adapter->int_lock, flags);
2170
2171 while (pcie_ireg & HOST_INTR_MASK) {
2172 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2173 pcie_ireg &= ~HOST_INTR_DNLD_DONE;
2174 mwifiex_dbg(adapter, INTR,
2175 "info: TX DNLD Done\n");
2176 ret = mwifiex_pcie_send_data_complete(adapter);
2177 if (ret)
2178 return ret;
2179 }
2180 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2181 pcie_ireg &= ~HOST_INTR_UPLD_RDY;
2182 mwifiex_dbg(adapter, INTR,
2183 "info: Rx DATA\n");
2184 ret = mwifiex_pcie_process_recv_data(adapter);
2185 if (ret)
2186 return ret;
2187 }
2188 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2189 pcie_ireg &= ~HOST_INTR_EVENT_RDY;
2190 mwifiex_dbg(adapter, INTR,
2191 "info: Rx EVENT\n");
2192 ret = mwifiex_pcie_process_event_ready(adapter);
2193 if (ret)
2194 return ret;
2195 }
2196
2197 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2198 pcie_ireg &= ~HOST_INTR_CMD_DONE;
2199 if (adapter->cmd_sent) {
2200 mwifiex_dbg(adapter, INTR,
2201 "info: CMD sent Interrupt\n");
2202 adapter->cmd_sent = false;
2203 }
2204 /* Handle command response */
2205 ret = mwifiex_pcie_process_cmd_complete(adapter);
2206 if (ret)
2207 return ret;
2208 }
2209
2210 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2211 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2212 &pcie_ireg)) {
2213 mwifiex_dbg(adapter, ERROR,
2214 "Read register failed\n");
2215 return -1;
2216 }
2217
2218 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2219 if (mwifiex_write_reg(adapter,
2220 PCIE_HOST_INT_STATUS,
2221 ~pcie_ireg)) {
2222 mwifiex_dbg(adapter, ERROR,
2223 "Write register failed\n");
2224 return -1;
2225 }
2226 }
2227
2228 }
2229 }
2230 mwifiex_dbg(adapter, INTR,
2231 "info: cmd_sent=%d data_sent=%d\n",
2232 adapter->cmd_sent, adapter->data_sent);
2233 if (adapter->ps_state != PS_STATE_SLEEP)
2234 mwifiex_pcie_enable_host_int(adapter);
2235
2236 return 0;
2237 }
2238
2239 /*
2240 * This function downloads data from driver to card.
2241 *
2242 * Both commands and data packets are transferred to the card by this
2243 * function.
2244 *
2245 * This function adds the PCIE specific header to the front of the buffer
2246 * before transferring. The header contains the length of the packet and
2247 * the type. The firmware handles the packets based upon this set type.
2248 */
2249 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2250 struct sk_buff *skb,
2251 struct mwifiex_tx_param *tx_param)
2252 {
2253 if (!skb) {
2254 mwifiex_dbg(adapter, ERROR,
2255 "Passed NULL skb to %s\n", __func__);
2256 return -1;
2257 }
2258
2259 if (type == MWIFIEX_TYPE_DATA)
2260 return mwifiex_pcie_send_data(adapter, skb, tx_param);
2261 else if (type == MWIFIEX_TYPE_CMD)
2262 return mwifiex_pcie_send_cmd(adapter, skb);
2263
2264 return 0;
2265 }
2266
2267 /* This function read/write firmware */
2268 static enum rdwr_status
2269 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2270 {
2271 int ret, tries;
2272 u8 ctrl_data;
2273 struct pcie_service_card *card = adapter->card;
2274 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2275
2276 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl, FW_DUMP_HOST_READY);
2277 if (ret) {
2278 mwifiex_dbg(adapter, ERROR,
2279 "PCIE write err\n");
2280 return RDWR_STATUS_FAILURE;
2281 }
2282
2283 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2284 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2285 if (ctrl_data == FW_DUMP_DONE)
2286 return RDWR_STATUS_SUCCESS;
2287 if (doneflag && ctrl_data == doneflag)
2288 return RDWR_STATUS_DONE;
2289 if (ctrl_data != FW_DUMP_HOST_READY) {
2290 mwifiex_dbg(adapter, WARN,
2291 "The ctrl reg was changed, re-try again!\n");
2292 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2293 FW_DUMP_HOST_READY);
2294 if (ret) {
2295 mwifiex_dbg(adapter, ERROR,
2296 "PCIE write err\n");
2297 return RDWR_STATUS_FAILURE;
2298 }
2299 }
2300 usleep_range(100, 200);
2301 }
2302
2303 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
2304 return RDWR_STATUS_FAILURE;
2305 }
2306
2307 /* This function dump firmware memory to file */
2308 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
2309 {
2310 struct pcie_service_card *card = adapter->card;
2311 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2312 unsigned int reg, reg_start, reg_end;
2313 u8 *dbg_ptr, *end_ptr, dump_num, idx, i, read_reg, doneflag = 0;
2314 enum rdwr_status stat;
2315 u32 memory_size;
2316 int ret;
2317
2318 if (!card->pcie.can_dump_fw)
2319 return;
2320
2321 for (idx = 0; idx < ARRAY_SIZE(mem_type_mapping_tbl); idx++) {
2322 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
2323
2324 if (entry->mem_ptr) {
2325 vfree(entry->mem_ptr);
2326 entry->mem_ptr = NULL;
2327 }
2328 entry->mem_size = 0;
2329 }
2330
2331 mwifiex_dbg(adapter, DUMP, "== mwifiex firmware dump start ==\n");
2332
2333 /* Read the number of the memories which will dump */
2334 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2335 if (stat == RDWR_STATUS_FAILURE)
2336 return;
2337
2338 reg = creg->fw_dump_start;
2339 mwifiex_read_reg_byte(adapter, reg, &dump_num);
2340
2341 /* Read the length of every memory which will dump */
2342 for (idx = 0; idx < dump_num; idx++) {
2343 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
2344
2345 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2346 if (stat == RDWR_STATUS_FAILURE)
2347 return;
2348
2349 memory_size = 0;
2350 reg = creg->fw_dump_start;
2351 for (i = 0; i < 4; i++) {
2352 mwifiex_read_reg_byte(adapter, reg, &read_reg);
2353 memory_size |= (read_reg << (i * 8));
2354 reg++;
2355 }
2356
2357 if (memory_size == 0) {
2358 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
2359 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2360 FW_DUMP_READ_DONE);
2361 if (ret) {
2362 mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
2363 return;
2364 }
2365 break;
2366 }
2367
2368 mwifiex_dbg(adapter, DUMP,
2369 "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2370 entry->mem_ptr = vmalloc(memory_size + 1);
2371 entry->mem_size = memory_size;
2372 if (!entry->mem_ptr) {
2373 mwifiex_dbg(adapter, ERROR,
2374 "Vmalloc %s failed\n", entry->mem_name);
2375 return;
2376 }
2377 dbg_ptr = entry->mem_ptr;
2378 end_ptr = dbg_ptr + memory_size;
2379
2380 doneflag = entry->done_flag;
2381 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2382 entry->mem_name);
2383
2384 do {
2385 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2386 if (RDWR_STATUS_FAILURE == stat)
2387 return;
2388
2389 reg_start = creg->fw_dump_start;
2390 reg_end = creg->fw_dump_end;
2391 for (reg = reg_start; reg <= reg_end; reg++) {
2392 mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
2393 if (dbg_ptr < end_ptr) {
2394 dbg_ptr++;
2395 } else {
2396 mwifiex_dbg(adapter, ERROR,
2397 "Allocated buf not enough\n");
2398 return;
2399 }
2400 }
2401
2402 if (stat != RDWR_STATUS_DONE)
2403 continue;
2404
2405 mwifiex_dbg(adapter, DUMP,
2406 "%s done: size=0x%tx\n",
2407 entry->mem_name, dbg_ptr - entry->mem_ptr);
2408 break;
2409 } while (true);
2410 }
2411 mwifiex_dbg(adapter, DUMP, "== mwifiex firmware dump end ==\n");
2412 }
2413
2414 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2415 {
2416 mwifiex_drv_info_dump(adapter);
2417 mwifiex_pcie_fw_dump(adapter);
2418 mwifiex_upload_device_dump(adapter);
2419 }
2420
2421 static unsigned long iface_work_flags;
2422 static struct mwifiex_adapter *save_adapter;
2423 static void mwifiex_pcie_work(struct work_struct *work)
2424 {
2425 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2426 &iface_work_flags))
2427 mwifiex_pcie_device_dump_work(save_adapter);
2428 }
2429
2430 static DECLARE_WORK(pcie_work, mwifiex_pcie_work);
2431 /* This function dumps FW information */
2432 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
2433 {
2434 save_adapter = adapter;
2435 if (test_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags))
2436 return;
2437
2438 set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &iface_work_flags);
2439
2440 schedule_work(&pcie_work);
2441 }
2442
2443 /*
2444 * This function initializes the PCI-E host memory space, WCB rings, etc.
2445 *
2446 * The following initializations steps are followed -
2447 * - Allocate TXBD ring buffers
2448 * - Allocate RXBD ring buffers
2449 * - Allocate event BD ring buffers
2450 * - Allocate command response ring buffer
2451 * - Allocate sleep cookie buffer
2452 */
2453 static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
2454 {
2455 struct pcie_service_card *card = adapter->card;
2456 int ret;
2457 struct pci_dev *pdev = card->dev;
2458 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2459
2460 pci_set_drvdata(pdev, card);
2461
2462 ret = pci_enable_device(pdev);
2463 if (ret)
2464 goto err_enable_dev;
2465
2466 pci_set_master(pdev);
2467
2468 mwifiex_dbg(adapter, INFO,
2469 "try set_consistent_dma_mask(32)\n");
2470 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2471 if (ret) {
2472 mwifiex_dbg(adapter, ERROR,
2473 "set_dma_mask(32) failed\n");
2474 goto err_set_dma_mask;
2475 }
2476
2477 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2478 if (ret) {
2479 mwifiex_dbg(adapter, ERROR,
2480 "set_consistent_dma_mask(64) failed\n");
2481 goto err_set_dma_mask;
2482 }
2483
2484 ret = pci_request_region(pdev, 0, DRV_NAME);
2485 if (ret) {
2486 mwifiex_dbg(adapter, ERROR,
2487 "req_reg(0) error\n");
2488 goto err_req_region0;
2489 }
2490 card->pci_mmap = pci_iomap(pdev, 0, 0);
2491 if (!card->pci_mmap) {
2492 mwifiex_dbg(adapter, ERROR, "iomap(0) error\n");
2493 ret = -EIO;
2494 goto err_iomap0;
2495 }
2496 ret = pci_request_region(pdev, 2, DRV_NAME);
2497 if (ret) {
2498 mwifiex_dbg(adapter, ERROR, "req_reg(2) error\n");
2499 goto err_req_region2;
2500 }
2501 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2502 if (!card->pci_mmap1) {
2503 mwifiex_dbg(adapter, ERROR,
2504 "iomap(2) error\n");
2505 ret = -EIO;
2506 goto err_iomap2;
2507 }
2508
2509 mwifiex_dbg(adapter, INFO,
2510 "PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2511 card->pci_mmap, card->pci_mmap1);
2512
2513 card->cmdrsp_buf = NULL;
2514 ret = mwifiex_pcie_create_txbd_ring(adapter);
2515 if (ret)
2516 goto err_cre_txbd;
2517 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2518 if (ret)
2519 goto err_cre_rxbd;
2520 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2521 if (ret)
2522 goto err_cre_evtbd;
2523 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2524 if (ret)
2525 goto err_alloc_cmdbuf;
2526 if (reg->sleep_cookie) {
2527 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2528 if (ret)
2529 goto err_alloc_cookie;
2530 } else {
2531 card->sleep_cookie_vbase = NULL;
2532 }
2533 return ret;
2534
2535 err_alloc_cookie:
2536 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2537 err_alloc_cmdbuf:
2538 mwifiex_pcie_delete_evtbd_ring(adapter);
2539 err_cre_evtbd:
2540 mwifiex_pcie_delete_rxbd_ring(adapter);
2541 err_cre_rxbd:
2542 mwifiex_pcie_delete_txbd_ring(adapter);
2543 err_cre_txbd:
2544 pci_iounmap(pdev, card->pci_mmap1);
2545 err_iomap2:
2546 pci_release_region(pdev, 2);
2547 err_req_region2:
2548 pci_iounmap(pdev, card->pci_mmap);
2549 err_iomap0:
2550 pci_release_region(pdev, 0);
2551 err_req_region0:
2552 err_set_dma_mask:
2553 pci_disable_device(pdev);
2554 err_enable_dev:
2555 pci_set_drvdata(pdev, NULL);
2556 return ret;
2557 }
2558
2559 /*
2560 * This function cleans up the allocated card buffers.
2561 *
2562 * The following are freed by this function -
2563 * - TXBD ring buffers
2564 * - RXBD ring buffers
2565 * - Event BD ring buffers
2566 * - Command response ring buffer
2567 * - Sleep cookie buffer
2568 */
2569 static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
2570 {
2571 struct pcie_service_card *card = adapter->card;
2572 struct pci_dev *pdev = card->dev;
2573 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2574
2575 if (user_rmmod) {
2576 mwifiex_dbg(adapter, INFO,
2577 "Clearing driver ready signature\n");
2578 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
2579 mwifiex_dbg(adapter, ERROR,
2580 "Failed to write driver not-ready signature\n");
2581 }
2582
2583 if (pdev) {
2584 pci_iounmap(pdev, card->pci_mmap);
2585 pci_iounmap(pdev, card->pci_mmap1);
2586 pci_disable_device(pdev);
2587 pci_release_region(pdev, 2);
2588 pci_release_region(pdev, 0);
2589 pci_set_drvdata(pdev, NULL);
2590 }
2591 kfree(card);
2592 }
2593
2594 /*
2595 * This function registers the PCIE device.
2596 *
2597 * PCIE IRQ is claimed, block size is set and driver data is initialized.
2598 */
2599 static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2600 {
2601 int ret;
2602 struct pcie_service_card *card = adapter->card;
2603 struct pci_dev *pdev = card->dev;
2604
2605 /* save adapter pointer in card */
2606 card->adapter = adapter;
2607
2608 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
2609 "MRVL_PCIE", pdev);
2610 if (ret) {
2611 mwifiex_dbg(adapter, ERROR,
2612 "request_irq failed: ret=%d\n", ret);
2613 adapter->card = NULL;
2614 return -1;
2615 }
2616
2617 adapter->dev = &pdev->dev;
2618 adapter->tx_buf_size = card->pcie.tx_buf_size;
2619 adapter->mem_type_mapping_tbl = mem_type_mapping_tbl;
2620 adapter->num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl);
2621 strcpy(adapter->fw_name, card->pcie.firmware);
2622 adapter->ext_scan = card->pcie.can_ext_scan;
2623
2624 return 0;
2625 }
2626
2627 /*
2628 * This function unregisters the PCIE device.
2629 *
2630 * The PCIE IRQ is released, the function is disabled and driver
2631 * data is set to null.
2632 */
2633 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2634 {
2635 struct pcie_service_card *card = adapter->card;
2636 const struct mwifiex_pcie_card_reg *reg;
2637
2638 if (card) {
2639 mwifiex_dbg(adapter, INFO,
2640 "%s(): calling free_irq()\n", __func__);
2641 free_irq(card->dev->irq, card->dev);
2642
2643 reg = card->pcie.reg;
2644 if (reg->sleep_cookie)
2645 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2646
2647 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2648 mwifiex_pcie_delete_evtbd_ring(adapter);
2649 mwifiex_pcie_delete_rxbd_ring(adapter);
2650 mwifiex_pcie_delete_txbd_ring(adapter);
2651 card->cmdrsp_buf = NULL;
2652 }
2653 }
2654
2655 static struct mwifiex_if_ops pcie_ops = {
2656 .init_if = mwifiex_pcie_init,
2657 .cleanup_if = mwifiex_pcie_cleanup,
2658 .check_fw_status = mwifiex_check_fw_status,
2659 .prog_fw = mwifiex_prog_fw_w_helper,
2660 .register_dev = mwifiex_register_dev,
2661 .unregister_dev = mwifiex_unregister_dev,
2662 .enable_int = mwifiex_pcie_enable_host_int,
2663 .process_int_status = mwifiex_process_int_status,
2664 .host_to_card = mwifiex_pcie_host_to_card,
2665 .wakeup = mwifiex_pm_wakeup_card,
2666 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
2667
2668 /* PCIE specific */
2669 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
2670 .event_complete = mwifiex_pcie_event_complete,
2671 .update_mp_end_port = NULL,
2672 .cleanup_mpa_buf = NULL,
2673 .init_fw_port = mwifiex_pcie_init_fw_port,
2674 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
2675 .device_dump = mwifiex_pcie_device_dump,
2676 };
2677
2678 /*
2679 * This function initializes the PCIE driver module.
2680 *
2681 * This initiates the semaphore and registers the device with
2682 * PCIE bus.
2683 */
2684 static int mwifiex_pcie_init_module(void)
2685 {
2686 int ret;
2687
2688 pr_debug("Marvell PCIe Driver\n");
2689
2690 sema_init(&add_remove_card_sem, 1);
2691
2692 /* Clear the flag in case user removes the card. */
2693 user_rmmod = 0;
2694
2695 ret = pci_register_driver(&mwifiex_pcie);
2696 if (ret)
2697 pr_err("Driver register failed!\n");
2698 else
2699 pr_debug("info: Driver registered successfully!\n");
2700
2701 return ret;
2702 }
2703
2704 /*
2705 * This function cleans up the PCIE driver.
2706 *
2707 * The following major steps are followed for cleanup -
2708 * - Resume the device if its suspended
2709 * - Disconnect the device if connected
2710 * - Shutdown the firmware
2711 * - Unregister the device from PCIE bus.
2712 */
2713 static void mwifiex_pcie_cleanup_module(void)
2714 {
2715 if (!down_interruptible(&add_remove_card_sem))
2716 up(&add_remove_card_sem);
2717
2718 /* Set the flag as user is removing this module. */
2719 user_rmmod = 1;
2720
2721 cancel_work_sync(&pcie_work);
2722 pci_unregister_driver(&mwifiex_pcie);
2723 }
2724
2725 module_init(mwifiex_pcie_init_module);
2726 module_exit(mwifiex_pcie_cleanup_module);
2727
2728 MODULE_AUTHOR("Marvell International Ltd.");
2729 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
2730 MODULE_VERSION(PCIE_VERSION);
2731 MODULE_LICENSE("GPL v2");
2732 MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME);
2733 MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME);
This page took 0.085086 seconds and 6 git commands to generate.