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mwl8k: keep TX_DONE interrupt masked while transmit reclaim is running
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
26
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
30
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
51
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
68
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
79
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
82
83 struct rxd_ops {
84 int rxd_size;
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
88 __le16 *qos);
89 };
90
91 struct mwl8k_device_info {
92 char *part_name;
93 char *helper_image;
94 char *fw_image;
95 struct rxd_ops *ap_rxd_ops;
96 };
97
98 struct mwl8k_rx_queue {
99 int rxd_count;
100
101 /* hw receives here */
102 int head;
103
104 /* refill descs here */
105 int tail;
106
107 void *rxd;
108 dma_addr_t rxd_dma;
109 struct {
110 struct sk_buff *skb;
111 DECLARE_PCI_UNMAP_ADDR(dma)
112 } *buf;
113 };
114
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
117 int head;
118
119 /* sw appends here */
120 int tail;
121
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
124 dma_addr_t txd_dma;
125 struct sk_buff **skb;
126 };
127
128 struct mwl8k_priv {
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
131
132 struct mwl8k_device_info *device_info;
133
134 void __iomem *sram;
135 void __iomem *regs;
136
137 /* firmware */
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
140
141 /* hardware/firmware parameters */
142 bool ap_fw;
143 struct rxd_ops *rxd_ops;
144
145 /* firmware access */
146 struct mutex fw_mutex;
147 struct task_struct *fw_mutex_owner;
148 int fw_mutex_depth;
149 struct completion *hostcmd_wait;
150
151 /* lock held over TX and TX reap */
152 spinlock_t tx_lock;
153
154 /* TX quiesce completion, protected by fw_mutex and tx_lock */
155 struct completion *tx_wait;
156
157 struct ieee80211_vif *vif;
158
159 struct ieee80211_channel *current_channel;
160
161 /* power management status cookie from firmware */
162 u32 *cookie;
163 dma_addr_t cookie_dma;
164
165 u16 num_mcaddrs;
166 u8 hw_rev;
167 u32 fw_rev;
168
169 /*
170 * Running count of TX packets in flight, to avoid
171 * iterating over the transmit rings each time.
172 */
173 int pending_tx_pkts;
174
175 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
176 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
177
178 /* PHY parameters */
179 struct ieee80211_supported_band band;
180 struct ieee80211_channel channels[14];
181 struct ieee80211_rate rates[14];
182
183 bool radio_on;
184 bool radio_short_preamble;
185 bool sniffer_enabled;
186 bool wmm_enabled;
187
188 struct work_struct sta_notify_worker;
189 spinlock_t sta_notify_list_lock;
190 struct list_head sta_notify_list;
191
192 /* XXX need to convert this to handle multiple interfaces */
193 bool capture_beacon;
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
196
197 /*
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
201 * is checked.
202 */
203 struct work_struct finalize_join_worker;
204
205 /* Tasklet to perform TX reclaim. */
206 struct tasklet_struct poll_tx_task;
207 };
208
209 /* Per interface specific private data */
210 struct mwl8k_vif {
211 /* Non AMPDU sequence number assigned by driver. */
212 u16 seqno;
213 };
214 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
215
216 struct mwl8k_sta {
217 /* Index into station database. Returned by UPDATE_STADB. */
218 u8 peer_id;
219 };
220 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
221
222 static const struct ieee80211_channel mwl8k_channels[] = {
223 { .center_freq = 2412, .hw_value = 1, },
224 { .center_freq = 2417, .hw_value = 2, },
225 { .center_freq = 2422, .hw_value = 3, },
226 { .center_freq = 2427, .hw_value = 4, },
227 { .center_freq = 2432, .hw_value = 5, },
228 { .center_freq = 2437, .hw_value = 6, },
229 { .center_freq = 2442, .hw_value = 7, },
230 { .center_freq = 2447, .hw_value = 8, },
231 { .center_freq = 2452, .hw_value = 9, },
232 { .center_freq = 2457, .hw_value = 10, },
233 { .center_freq = 2462, .hw_value = 11, },
234 { .center_freq = 2467, .hw_value = 12, },
235 { .center_freq = 2472, .hw_value = 13, },
236 { .center_freq = 2484, .hw_value = 14, },
237 };
238
239 static const struct ieee80211_rate mwl8k_rates[] = {
240 { .bitrate = 10, .hw_value = 2, },
241 { .bitrate = 20, .hw_value = 4, },
242 { .bitrate = 55, .hw_value = 11, },
243 { .bitrate = 110, .hw_value = 22, },
244 { .bitrate = 220, .hw_value = 44, },
245 { .bitrate = 60, .hw_value = 12, },
246 { .bitrate = 90, .hw_value = 18, },
247 { .bitrate = 120, .hw_value = 24, },
248 { .bitrate = 180, .hw_value = 36, },
249 { .bitrate = 240, .hw_value = 48, },
250 { .bitrate = 360, .hw_value = 72, },
251 { .bitrate = 480, .hw_value = 96, },
252 { .bitrate = 540, .hw_value = 108, },
253 { .bitrate = 720, .hw_value = 144, },
254 };
255
256 /* Set or get info from Firmware */
257 #define MWL8K_CMD_SET 0x0001
258 #define MWL8K_CMD_GET 0x0000
259
260 /* Firmware command codes */
261 #define MWL8K_CMD_CODE_DNLD 0x0001
262 #define MWL8K_CMD_GET_HW_SPEC 0x0003
263 #define MWL8K_CMD_SET_HW_SPEC 0x0004
264 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
265 #define MWL8K_CMD_GET_STAT 0x0014
266 #define MWL8K_CMD_RADIO_CONTROL 0x001c
267 #define MWL8K_CMD_RF_TX_POWER 0x001e
268 #define MWL8K_CMD_RF_ANTENNA 0x0020
269 #define MWL8K_CMD_SET_BEACON 0x0100
270 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
271 #define MWL8K_CMD_SET_POST_SCAN 0x0108
272 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
273 #define MWL8K_CMD_SET_AID 0x010d
274 #define MWL8K_CMD_SET_RATE 0x0110
275 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
276 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
277 #define MWL8K_CMD_SET_SLOT 0x0114
278 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
279 #define MWL8K_CMD_SET_WMM_MODE 0x0123
280 #define MWL8K_CMD_MIMO_CONFIG 0x0125
281 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
282 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
283 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
284 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
285 #define MWL8K_CMD_BSS_START 0x1100
286 #define MWL8K_CMD_SET_NEW_STN 0x1111
287 #define MWL8K_CMD_UPDATE_STADB 0x1123
288
289 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
290 {
291 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
292 snprintf(buf, bufsize, "%s", #x);\
293 return buf;\
294 } while (0)
295 switch (cmd & ~0x8000) {
296 MWL8K_CMDNAME(CODE_DNLD);
297 MWL8K_CMDNAME(GET_HW_SPEC);
298 MWL8K_CMDNAME(SET_HW_SPEC);
299 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
300 MWL8K_CMDNAME(GET_STAT);
301 MWL8K_CMDNAME(RADIO_CONTROL);
302 MWL8K_CMDNAME(RF_TX_POWER);
303 MWL8K_CMDNAME(RF_ANTENNA);
304 MWL8K_CMDNAME(SET_BEACON);
305 MWL8K_CMDNAME(SET_PRE_SCAN);
306 MWL8K_CMDNAME(SET_POST_SCAN);
307 MWL8K_CMDNAME(SET_RF_CHANNEL);
308 MWL8K_CMDNAME(SET_AID);
309 MWL8K_CMDNAME(SET_RATE);
310 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
311 MWL8K_CMDNAME(RTS_THRESHOLD);
312 MWL8K_CMDNAME(SET_SLOT);
313 MWL8K_CMDNAME(SET_EDCA_PARAMS);
314 MWL8K_CMDNAME(SET_WMM_MODE);
315 MWL8K_CMDNAME(MIMO_CONFIG);
316 MWL8K_CMDNAME(USE_FIXED_RATE);
317 MWL8K_CMDNAME(ENABLE_SNIFFER);
318 MWL8K_CMDNAME(SET_MAC_ADDR);
319 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
320 MWL8K_CMDNAME(BSS_START);
321 MWL8K_CMDNAME(SET_NEW_STN);
322 MWL8K_CMDNAME(UPDATE_STADB);
323 default:
324 snprintf(buf, bufsize, "0x%x", cmd);
325 }
326 #undef MWL8K_CMDNAME
327
328 return buf;
329 }
330
331 /* Hardware and firmware reset */
332 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
333 {
334 iowrite32(MWL8K_H2A_INT_RESET,
335 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
336 iowrite32(MWL8K_H2A_INT_RESET,
337 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
338 msleep(20);
339 }
340
341 /* Release fw image */
342 static void mwl8k_release_fw(struct firmware **fw)
343 {
344 if (*fw == NULL)
345 return;
346 release_firmware(*fw);
347 *fw = NULL;
348 }
349
350 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
351 {
352 mwl8k_release_fw(&priv->fw_ucode);
353 mwl8k_release_fw(&priv->fw_helper);
354 }
355
356 /* Request fw image */
357 static int mwl8k_request_fw(struct mwl8k_priv *priv,
358 const char *fname, struct firmware **fw)
359 {
360 /* release current image */
361 if (*fw != NULL)
362 mwl8k_release_fw(fw);
363
364 return request_firmware((const struct firmware **)fw,
365 fname, &priv->pdev->dev);
366 }
367
368 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
369 {
370 struct mwl8k_device_info *di = priv->device_info;
371 int rc;
372
373 if (di->helper_image != NULL) {
374 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
375 if (rc) {
376 printk(KERN_ERR "%s: Error requesting helper "
377 "firmware file %s\n", pci_name(priv->pdev),
378 di->helper_image);
379 return rc;
380 }
381 }
382
383 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
384 if (rc) {
385 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
386 pci_name(priv->pdev), di->fw_image);
387 mwl8k_release_fw(&priv->fw_helper);
388 return rc;
389 }
390
391 return 0;
392 }
393
394 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
395 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
396
397 struct mwl8k_cmd_pkt {
398 __le16 code;
399 __le16 length;
400 __le16 seq_num;
401 __le16 result;
402 char payload[0];
403 } __attribute__((packed));
404
405 /*
406 * Firmware loading.
407 */
408 static int
409 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
410 {
411 void __iomem *regs = priv->regs;
412 dma_addr_t dma_addr;
413 int loops;
414
415 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
416 if (pci_dma_mapping_error(priv->pdev, dma_addr))
417 return -ENOMEM;
418
419 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
420 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
421 iowrite32(MWL8K_H2A_INT_DOORBELL,
422 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
423 iowrite32(MWL8K_H2A_INT_DUMMY,
424 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
425
426 loops = 1000;
427 do {
428 u32 int_code;
429
430 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
431 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
432 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
433 break;
434 }
435
436 cond_resched();
437 udelay(1);
438 } while (--loops);
439
440 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
441
442 return loops ? 0 : -ETIMEDOUT;
443 }
444
445 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
446 const u8 *data, size_t length)
447 {
448 struct mwl8k_cmd_pkt *cmd;
449 int done;
450 int rc = 0;
451
452 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
453 if (cmd == NULL)
454 return -ENOMEM;
455
456 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
457 cmd->seq_num = 0;
458 cmd->result = 0;
459
460 done = 0;
461 while (length) {
462 int block_size = length > 256 ? 256 : length;
463
464 memcpy(cmd->payload, data + done, block_size);
465 cmd->length = cpu_to_le16(block_size);
466
467 rc = mwl8k_send_fw_load_cmd(priv, cmd,
468 sizeof(*cmd) + block_size);
469 if (rc)
470 break;
471
472 done += block_size;
473 length -= block_size;
474 }
475
476 if (!rc) {
477 cmd->length = 0;
478 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
479 }
480
481 kfree(cmd);
482
483 return rc;
484 }
485
486 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
487 const u8 *data, size_t length)
488 {
489 unsigned char *buffer;
490 int may_continue, rc = 0;
491 u32 done, prev_block_size;
492
493 buffer = kmalloc(1024, GFP_KERNEL);
494 if (buffer == NULL)
495 return -ENOMEM;
496
497 done = 0;
498 prev_block_size = 0;
499 may_continue = 1000;
500 while (may_continue > 0) {
501 u32 block_size;
502
503 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
504 if (block_size & 1) {
505 block_size &= ~1;
506 may_continue--;
507 } else {
508 done += prev_block_size;
509 length -= prev_block_size;
510 }
511
512 if (block_size > 1024 || block_size > length) {
513 rc = -EOVERFLOW;
514 break;
515 }
516
517 if (length == 0) {
518 rc = 0;
519 break;
520 }
521
522 if (block_size == 0) {
523 rc = -EPROTO;
524 may_continue--;
525 udelay(1);
526 continue;
527 }
528
529 prev_block_size = block_size;
530 memcpy(buffer, data + done, block_size);
531
532 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
533 if (rc)
534 break;
535 }
536
537 if (!rc && length != 0)
538 rc = -EREMOTEIO;
539
540 kfree(buffer);
541
542 return rc;
543 }
544
545 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
546 {
547 struct mwl8k_priv *priv = hw->priv;
548 struct firmware *fw = priv->fw_ucode;
549 int rc;
550 int loops;
551
552 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
553 struct firmware *helper = priv->fw_helper;
554
555 if (helper == NULL) {
556 printk(KERN_ERR "%s: helper image needed but none "
557 "given\n", pci_name(priv->pdev));
558 return -EINVAL;
559 }
560
561 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
562 if (rc) {
563 printk(KERN_ERR "%s: unable to load firmware "
564 "helper image\n", pci_name(priv->pdev));
565 return rc;
566 }
567 msleep(5);
568
569 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
570 } else {
571 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
572 }
573
574 if (rc) {
575 printk(KERN_ERR "%s: unable to load firmware image\n",
576 pci_name(priv->pdev));
577 return rc;
578 }
579
580 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
581
582 loops = 500000;
583 do {
584 u32 ready_code;
585
586 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
587 if (ready_code == MWL8K_FWAP_READY) {
588 priv->ap_fw = 1;
589 break;
590 } else if (ready_code == MWL8K_FWSTA_READY) {
591 priv->ap_fw = 0;
592 break;
593 }
594
595 cond_resched();
596 udelay(1);
597 } while (--loops);
598
599 return loops ? 0 : -ETIMEDOUT;
600 }
601
602
603 /* DMA header used by firmware and hardware. */
604 struct mwl8k_dma_data {
605 __le16 fwlen;
606 struct ieee80211_hdr wh;
607 char data[0];
608 } __attribute__((packed));
609
610 /* Routines to add/remove DMA header from skb. */
611 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
612 {
613 struct mwl8k_dma_data *tr;
614 int hdrlen;
615
616 tr = (struct mwl8k_dma_data *)skb->data;
617 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
618
619 if (hdrlen != sizeof(tr->wh)) {
620 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
621 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
622 *((__le16 *)(tr->data - 2)) = qos;
623 } else {
624 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
625 }
626 }
627
628 if (hdrlen != sizeof(*tr))
629 skb_pull(skb, sizeof(*tr) - hdrlen);
630 }
631
632 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
633 {
634 struct ieee80211_hdr *wh;
635 int hdrlen;
636 struct mwl8k_dma_data *tr;
637
638 /*
639 * Add a firmware DMA header; the firmware requires that we
640 * present a 2-byte payload length followed by a 4-address
641 * header (without QoS field), followed (optionally) by any
642 * WEP/ExtIV header (but only filled in for CCMP).
643 */
644 wh = (struct ieee80211_hdr *)skb->data;
645
646 hdrlen = ieee80211_hdrlen(wh->frame_control);
647 if (hdrlen != sizeof(*tr))
648 skb_push(skb, sizeof(*tr) - hdrlen);
649
650 if (ieee80211_is_data_qos(wh->frame_control))
651 hdrlen -= 2;
652
653 tr = (struct mwl8k_dma_data *)skb->data;
654 if (wh != &tr->wh)
655 memmove(&tr->wh, wh, hdrlen);
656 if (hdrlen != sizeof(tr->wh))
657 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
658
659 /*
660 * Firmware length is the length of the fully formed "802.11
661 * payload". That is, everything except for the 802.11 header.
662 * This includes all crypto material including the MIC.
663 */
664 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
665 }
666
667
668 /*
669 * Packet reception for 88w8366 AP firmware.
670 */
671 struct mwl8k_rxd_8366_ap {
672 __le16 pkt_len;
673 __u8 sq2;
674 __u8 rate;
675 __le32 pkt_phys_addr;
676 __le32 next_rxd_phys_addr;
677 __le16 qos_control;
678 __le16 htsig2;
679 __le32 hw_rssi_info;
680 __le32 hw_noise_floor_info;
681 __u8 noise_floor;
682 __u8 pad0[3];
683 __u8 rssi;
684 __u8 rx_status;
685 __u8 channel;
686 __u8 rx_ctrl;
687 } __attribute__((packed));
688
689 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
690 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
691 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
692
693 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
694
695 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
696 {
697 struct mwl8k_rxd_8366_ap *rxd = _rxd;
698
699 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
700 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
701 }
702
703 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
704 {
705 struct mwl8k_rxd_8366_ap *rxd = _rxd;
706
707 rxd->pkt_len = cpu_to_le16(len);
708 rxd->pkt_phys_addr = cpu_to_le32(addr);
709 wmb();
710 rxd->rx_ctrl = 0;
711 }
712
713 static int
714 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
715 __le16 *qos)
716 {
717 struct mwl8k_rxd_8366_ap *rxd = _rxd;
718
719 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
720 return -1;
721 rmb();
722
723 memset(status, 0, sizeof(*status));
724
725 status->signal = -rxd->rssi;
726 status->noise = -rxd->noise_floor;
727
728 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
729 status->flag |= RX_FLAG_HT;
730 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
731 status->flag |= RX_FLAG_40MHZ;
732 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
733 } else {
734 int i;
735
736 for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
737 if (mwl8k_rates[i].hw_value == rxd->rate) {
738 status->rate_idx = i;
739 break;
740 }
741 }
742 }
743
744 status->band = IEEE80211_BAND_2GHZ;
745 status->freq = ieee80211_channel_to_frequency(rxd->channel);
746
747 *qos = rxd->qos_control;
748
749 return le16_to_cpu(rxd->pkt_len);
750 }
751
752 static struct rxd_ops rxd_8366_ap_ops = {
753 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
754 .rxd_init = mwl8k_rxd_8366_ap_init,
755 .rxd_refill = mwl8k_rxd_8366_ap_refill,
756 .rxd_process = mwl8k_rxd_8366_ap_process,
757 };
758
759 /*
760 * Packet reception for STA firmware.
761 */
762 struct mwl8k_rxd_sta {
763 __le16 pkt_len;
764 __u8 link_quality;
765 __u8 noise_level;
766 __le32 pkt_phys_addr;
767 __le32 next_rxd_phys_addr;
768 __le16 qos_control;
769 __le16 rate_info;
770 __le32 pad0[4];
771 __u8 rssi;
772 __u8 channel;
773 __le16 pad1;
774 __u8 rx_ctrl;
775 __u8 rx_status;
776 __u8 pad2[2];
777 } __attribute__((packed));
778
779 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
780 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
781 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
782 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
783 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
784 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
785
786 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
787
788 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
789 {
790 struct mwl8k_rxd_sta *rxd = _rxd;
791
792 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
793 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
794 }
795
796 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
797 {
798 struct mwl8k_rxd_sta *rxd = _rxd;
799
800 rxd->pkt_len = cpu_to_le16(len);
801 rxd->pkt_phys_addr = cpu_to_le32(addr);
802 wmb();
803 rxd->rx_ctrl = 0;
804 }
805
806 static int
807 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
808 __le16 *qos)
809 {
810 struct mwl8k_rxd_sta *rxd = _rxd;
811 u16 rate_info;
812
813 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
814 return -1;
815 rmb();
816
817 rate_info = le16_to_cpu(rxd->rate_info);
818
819 memset(status, 0, sizeof(*status));
820
821 status->signal = -rxd->rssi;
822 status->noise = -rxd->noise_level;
823 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
824 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
825
826 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
827 status->flag |= RX_FLAG_SHORTPRE;
828 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
829 status->flag |= RX_FLAG_40MHZ;
830 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
831 status->flag |= RX_FLAG_SHORT_GI;
832 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
833 status->flag |= RX_FLAG_HT;
834
835 status->band = IEEE80211_BAND_2GHZ;
836 status->freq = ieee80211_channel_to_frequency(rxd->channel);
837
838 *qos = rxd->qos_control;
839
840 return le16_to_cpu(rxd->pkt_len);
841 }
842
843 static struct rxd_ops rxd_sta_ops = {
844 .rxd_size = sizeof(struct mwl8k_rxd_sta),
845 .rxd_init = mwl8k_rxd_sta_init,
846 .rxd_refill = mwl8k_rxd_sta_refill,
847 .rxd_process = mwl8k_rxd_sta_process,
848 };
849
850
851 #define MWL8K_RX_DESCS 256
852 #define MWL8K_RX_MAXSZ 3800
853
854 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
855 {
856 struct mwl8k_priv *priv = hw->priv;
857 struct mwl8k_rx_queue *rxq = priv->rxq + index;
858 int size;
859 int i;
860
861 rxq->rxd_count = 0;
862 rxq->head = 0;
863 rxq->tail = 0;
864
865 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
866
867 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
868 if (rxq->rxd == NULL) {
869 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
870 wiphy_name(hw->wiphy));
871 return -ENOMEM;
872 }
873 memset(rxq->rxd, 0, size);
874
875 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
876 if (rxq->buf == NULL) {
877 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
878 wiphy_name(hw->wiphy));
879 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
880 return -ENOMEM;
881 }
882 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
883
884 for (i = 0; i < MWL8K_RX_DESCS; i++) {
885 int desc_size;
886 void *rxd;
887 int nexti;
888 dma_addr_t next_dma_addr;
889
890 desc_size = priv->rxd_ops->rxd_size;
891 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
892
893 nexti = i + 1;
894 if (nexti == MWL8K_RX_DESCS)
895 nexti = 0;
896 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
897
898 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
899 }
900
901 return 0;
902 }
903
904 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
905 {
906 struct mwl8k_priv *priv = hw->priv;
907 struct mwl8k_rx_queue *rxq = priv->rxq + index;
908 int refilled;
909
910 refilled = 0;
911 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
912 struct sk_buff *skb;
913 dma_addr_t addr;
914 int rx;
915 void *rxd;
916
917 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
918 if (skb == NULL)
919 break;
920
921 addr = pci_map_single(priv->pdev, skb->data,
922 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
923
924 rxq->rxd_count++;
925 rx = rxq->tail++;
926 if (rxq->tail == MWL8K_RX_DESCS)
927 rxq->tail = 0;
928 rxq->buf[rx].skb = skb;
929 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
930
931 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
932 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
933
934 refilled++;
935 }
936
937 return refilled;
938 }
939
940 /* Must be called only when the card's reception is completely halted */
941 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
942 {
943 struct mwl8k_priv *priv = hw->priv;
944 struct mwl8k_rx_queue *rxq = priv->rxq + index;
945 int i;
946
947 for (i = 0; i < MWL8K_RX_DESCS; i++) {
948 if (rxq->buf[i].skb != NULL) {
949 pci_unmap_single(priv->pdev,
950 pci_unmap_addr(&rxq->buf[i], dma),
951 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
952 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
953
954 kfree_skb(rxq->buf[i].skb);
955 rxq->buf[i].skb = NULL;
956 }
957 }
958
959 kfree(rxq->buf);
960 rxq->buf = NULL;
961
962 pci_free_consistent(priv->pdev,
963 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
964 rxq->rxd, rxq->rxd_dma);
965 rxq->rxd = NULL;
966 }
967
968
969 /*
970 * Scan a list of BSSIDs to process for finalize join.
971 * Allows for extension to process multiple BSSIDs.
972 */
973 static inline int
974 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
975 {
976 return priv->capture_beacon &&
977 ieee80211_is_beacon(wh->frame_control) &&
978 !compare_ether_addr(wh->addr3, priv->capture_bssid);
979 }
980
981 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
982 struct sk_buff *skb)
983 {
984 struct mwl8k_priv *priv = hw->priv;
985
986 priv->capture_beacon = false;
987 memset(priv->capture_bssid, 0, ETH_ALEN);
988
989 /*
990 * Use GFP_ATOMIC as rxq_process is called from
991 * the primary interrupt handler, memory allocation call
992 * must not sleep.
993 */
994 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
995 if (priv->beacon_skb != NULL)
996 ieee80211_queue_work(hw, &priv->finalize_join_worker);
997 }
998
999 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1000 {
1001 struct mwl8k_priv *priv = hw->priv;
1002 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1003 int processed;
1004
1005 processed = 0;
1006 while (rxq->rxd_count && limit--) {
1007 struct sk_buff *skb;
1008 void *rxd;
1009 int pkt_len;
1010 struct ieee80211_rx_status status;
1011 __le16 qos;
1012
1013 skb = rxq->buf[rxq->head].skb;
1014 if (skb == NULL)
1015 break;
1016
1017 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1018
1019 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1020 if (pkt_len < 0)
1021 break;
1022
1023 rxq->buf[rxq->head].skb = NULL;
1024
1025 pci_unmap_single(priv->pdev,
1026 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1027 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1028 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1029
1030 rxq->head++;
1031 if (rxq->head == MWL8K_RX_DESCS)
1032 rxq->head = 0;
1033
1034 rxq->rxd_count--;
1035
1036 skb_put(skb, pkt_len);
1037 mwl8k_remove_dma_header(skb, qos);
1038
1039 /*
1040 * Check for a pending join operation. Save a
1041 * copy of the beacon and schedule a tasklet to
1042 * send a FINALIZE_JOIN command to the firmware.
1043 */
1044 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1045 mwl8k_save_beacon(hw, skb);
1046
1047 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1048 ieee80211_rx_irqsafe(hw, skb);
1049
1050 processed++;
1051 }
1052
1053 return processed;
1054 }
1055
1056
1057 /*
1058 * Packet transmission.
1059 */
1060
1061 #define MWL8K_TXD_STATUS_OK 0x00000001
1062 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1063 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1064 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1065 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1066
1067 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1068 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1069 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1070 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1071 #define MWL8K_QOS_EOSP 0x0010
1072
1073 struct mwl8k_tx_desc {
1074 __le32 status;
1075 __u8 data_rate;
1076 __u8 tx_priority;
1077 __le16 qos_control;
1078 __le32 pkt_phys_addr;
1079 __le16 pkt_len;
1080 __u8 dest_MAC_addr[ETH_ALEN];
1081 __le32 next_txd_phys_addr;
1082 __le32 reserved;
1083 __le16 rate_info;
1084 __u8 peer_id;
1085 __u8 tx_frag_cnt;
1086 } __attribute__((packed));
1087
1088 #define MWL8K_TX_DESCS 128
1089
1090 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1091 {
1092 struct mwl8k_priv *priv = hw->priv;
1093 struct mwl8k_tx_queue *txq = priv->txq + index;
1094 int size;
1095 int i;
1096
1097 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1098 txq->stats.limit = MWL8K_TX_DESCS;
1099 txq->head = 0;
1100 txq->tail = 0;
1101
1102 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1103
1104 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1105 if (txq->txd == NULL) {
1106 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1107 wiphy_name(hw->wiphy));
1108 return -ENOMEM;
1109 }
1110 memset(txq->txd, 0, size);
1111
1112 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1113 if (txq->skb == NULL) {
1114 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1115 wiphy_name(hw->wiphy));
1116 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1117 return -ENOMEM;
1118 }
1119 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1120
1121 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1122 struct mwl8k_tx_desc *tx_desc;
1123 int nexti;
1124
1125 tx_desc = txq->txd + i;
1126 nexti = (i + 1) % MWL8K_TX_DESCS;
1127
1128 tx_desc->status = 0;
1129 tx_desc->next_txd_phys_addr =
1130 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1131 }
1132
1133 return 0;
1134 }
1135
1136 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1137 {
1138 iowrite32(MWL8K_H2A_INT_PPA_READY,
1139 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1140 iowrite32(MWL8K_H2A_INT_DUMMY,
1141 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1142 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1143 }
1144
1145 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1146 {
1147 struct mwl8k_priv *priv = hw->priv;
1148 int i;
1149
1150 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1151 struct mwl8k_tx_queue *txq = priv->txq + i;
1152 int fw_owned = 0;
1153 int drv_owned = 0;
1154 int unused = 0;
1155 int desc;
1156
1157 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1158 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1159 u32 status;
1160
1161 status = le32_to_cpu(tx_desc->status);
1162 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1163 fw_owned++;
1164 else
1165 drv_owned++;
1166
1167 if (tx_desc->pkt_len == 0)
1168 unused++;
1169 }
1170
1171 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1172 "fw_owned=%d drv_owned=%d unused=%d\n",
1173 wiphy_name(hw->wiphy), i,
1174 txq->stats.len, txq->head, txq->tail,
1175 fw_owned, drv_owned, unused);
1176 }
1177 }
1178
1179 /*
1180 * Must be called with priv->fw_mutex held and tx queues stopped.
1181 */
1182 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1183
1184 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1185 {
1186 struct mwl8k_priv *priv = hw->priv;
1187 DECLARE_COMPLETION_ONSTACK(tx_wait);
1188 int retry;
1189 int rc;
1190
1191 might_sleep();
1192
1193 /*
1194 * The TX queues are stopped at this point, so this test
1195 * doesn't need to take ->tx_lock.
1196 */
1197 if (!priv->pending_tx_pkts)
1198 return 0;
1199
1200 retry = 0;
1201 rc = 0;
1202
1203 spin_lock_bh(&priv->tx_lock);
1204 priv->tx_wait = &tx_wait;
1205 while (!rc) {
1206 int oldcount;
1207 unsigned long timeout;
1208
1209 oldcount = priv->pending_tx_pkts;
1210
1211 spin_unlock_bh(&priv->tx_lock);
1212 timeout = wait_for_completion_timeout(&tx_wait,
1213 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1214 spin_lock_bh(&priv->tx_lock);
1215
1216 if (timeout) {
1217 WARN_ON(priv->pending_tx_pkts);
1218 if (retry) {
1219 printk(KERN_NOTICE "%s: tx rings drained\n",
1220 wiphy_name(hw->wiphy));
1221 }
1222 break;
1223 }
1224
1225 if (priv->pending_tx_pkts < oldcount) {
1226 printk(KERN_NOTICE "%s: waiting for tx rings "
1227 "to drain (%d -> %d pkts)\n",
1228 wiphy_name(hw->wiphy), oldcount,
1229 priv->pending_tx_pkts);
1230 retry = 1;
1231 continue;
1232 }
1233
1234 priv->tx_wait = NULL;
1235
1236 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1237 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1238 mwl8k_dump_tx_rings(hw);
1239
1240 rc = -ETIMEDOUT;
1241 }
1242 spin_unlock_bh(&priv->tx_lock);
1243
1244 return rc;
1245 }
1246
1247 #define MWL8K_TXD_SUCCESS(status) \
1248 ((status) & (MWL8K_TXD_STATUS_OK | \
1249 MWL8K_TXD_STATUS_OK_RETRY | \
1250 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1251
1252 static int
1253 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1254 {
1255 struct mwl8k_priv *priv = hw->priv;
1256 struct mwl8k_tx_queue *txq = priv->txq + index;
1257 int processed;
1258
1259 processed = 0;
1260 while (txq->stats.len > 0 && limit--) {
1261 int tx;
1262 struct mwl8k_tx_desc *tx_desc;
1263 unsigned long addr;
1264 int size;
1265 struct sk_buff *skb;
1266 struct ieee80211_tx_info *info;
1267 u32 status;
1268
1269 tx = txq->head;
1270 tx_desc = txq->txd + tx;
1271
1272 status = le32_to_cpu(tx_desc->status);
1273
1274 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1275 if (!force)
1276 break;
1277 tx_desc->status &=
1278 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1279 }
1280
1281 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1282 BUG_ON(txq->stats.len == 0);
1283 txq->stats.len--;
1284 priv->pending_tx_pkts--;
1285
1286 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1287 size = le16_to_cpu(tx_desc->pkt_len);
1288 skb = txq->skb[tx];
1289 txq->skb[tx] = NULL;
1290
1291 BUG_ON(skb == NULL);
1292 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1293
1294 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1295
1296 /* Mark descriptor as unused */
1297 tx_desc->pkt_phys_addr = 0;
1298 tx_desc->pkt_len = 0;
1299
1300 info = IEEE80211_SKB_CB(skb);
1301 ieee80211_tx_info_clear_status(info);
1302 if (MWL8K_TXD_SUCCESS(status))
1303 info->flags |= IEEE80211_TX_STAT_ACK;
1304
1305 ieee80211_tx_status_irqsafe(hw, skb);
1306
1307 processed++;
1308 }
1309
1310 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1311 ieee80211_wake_queue(hw, index);
1312
1313 return processed;
1314 }
1315
1316 /* must be called only when the card's transmit is completely halted */
1317 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1318 {
1319 struct mwl8k_priv *priv = hw->priv;
1320 struct mwl8k_tx_queue *txq = priv->txq + index;
1321
1322 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1323
1324 kfree(txq->skb);
1325 txq->skb = NULL;
1326
1327 pci_free_consistent(priv->pdev,
1328 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1329 txq->txd, txq->txd_dma);
1330 txq->txd = NULL;
1331 }
1332
1333 static int
1334 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1335 {
1336 struct mwl8k_priv *priv = hw->priv;
1337 struct ieee80211_tx_info *tx_info;
1338 struct mwl8k_vif *mwl8k_vif;
1339 struct ieee80211_hdr *wh;
1340 struct mwl8k_tx_queue *txq;
1341 struct mwl8k_tx_desc *tx;
1342 dma_addr_t dma;
1343 u32 txstatus;
1344 u8 txdatarate;
1345 u16 qos;
1346
1347 wh = (struct ieee80211_hdr *)skb->data;
1348 if (ieee80211_is_data_qos(wh->frame_control))
1349 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1350 else
1351 qos = 0;
1352
1353 mwl8k_add_dma_header(skb);
1354 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1355
1356 tx_info = IEEE80211_SKB_CB(skb);
1357 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1358
1359 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1360 u16 seqno = mwl8k_vif->seqno;
1361
1362 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1363 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1364 mwl8k_vif->seqno = seqno++ % 4096;
1365 }
1366
1367 /* Setup firmware control bit fields for each frame type. */
1368 txstatus = 0;
1369 txdatarate = 0;
1370 if (ieee80211_is_mgmt(wh->frame_control) ||
1371 ieee80211_is_ctl(wh->frame_control)) {
1372 txdatarate = 0;
1373 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1374 } else if (ieee80211_is_data(wh->frame_control)) {
1375 txdatarate = 1;
1376 if (is_multicast_ether_addr(wh->addr1))
1377 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1378
1379 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1380 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1381 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1382 else
1383 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1384 }
1385
1386 dma = pci_map_single(priv->pdev, skb->data,
1387 skb->len, PCI_DMA_TODEVICE);
1388
1389 if (pci_dma_mapping_error(priv->pdev, dma)) {
1390 printk(KERN_DEBUG "%s: failed to dma map skb, "
1391 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1392 dev_kfree_skb(skb);
1393 return NETDEV_TX_OK;
1394 }
1395
1396 spin_lock_bh(&priv->tx_lock);
1397
1398 txq = priv->txq + index;
1399
1400 BUG_ON(txq->skb[txq->tail] != NULL);
1401 txq->skb[txq->tail] = skb;
1402
1403 tx = txq->txd + txq->tail;
1404 tx->data_rate = txdatarate;
1405 tx->tx_priority = index;
1406 tx->qos_control = cpu_to_le16(qos);
1407 tx->pkt_phys_addr = cpu_to_le32(dma);
1408 tx->pkt_len = cpu_to_le16(skb->len);
1409 tx->rate_info = 0;
1410 if (!priv->ap_fw && tx_info->control.sta != NULL)
1411 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1412 else
1413 tx->peer_id = 0;
1414 wmb();
1415 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1416
1417 txq->stats.count++;
1418 txq->stats.len++;
1419 priv->pending_tx_pkts++;
1420
1421 txq->tail++;
1422 if (txq->tail == MWL8K_TX_DESCS)
1423 txq->tail = 0;
1424
1425 if (txq->head == txq->tail)
1426 ieee80211_stop_queue(hw, index);
1427
1428 mwl8k_tx_start(priv);
1429
1430 spin_unlock_bh(&priv->tx_lock);
1431
1432 return NETDEV_TX_OK;
1433 }
1434
1435
1436 /*
1437 * Firmware access.
1438 *
1439 * We have the following requirements for issuing firmware commands:
1440 * - Some commands require that the packet transmit path is idle when
1441 * the command is issued. (For simplicity, we'll just quiesce the
1442 * transmit path for every command.)
1443 * - There are certain sequences of commands that need to be issued to
1444 * the hardware sequentially, with no other intervening commands.
1445 *
1446 * This leads to an implementation of a "firmware lock" as a mutex that
1447 * can be taken recursively, and which is taken by both the low-level
1448 * command submission function (mwl8k_post_cmd) as well as any users of
1449 * that function that require issuing of an atomic sequence of commands,
1450 * and quiesces the transmit path whenever it's taken.
1451 */
1452 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1453 {
1454 struct mwl8k_priv *priv = hw->priv;
1455
1456 if (priv->fw_mutex_owner != current) {
1457 int rc;
1458
1459 mutex_lock(&priv->fw_mutex);
1460 ieee80211_stop_queues(hw);
1461
1462 rc = mwl8k_tx_wait_empty(hw);
1463 if (rc) {
1464 ieee80211_wake_queues(hw);
1465 mutex_unlock(&priv->fw_mutex);
1466
1467 return rc;
1468 }
1469
1470 priv->fw_mutex_owner = current;
1471 }
1472
1473 priv->fw_mutex_depth++;
1474
1475 return 0;
1476 }
1477
1478 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1479 {
1480 struct mwl8k_priv *priv = hw->priv;
1481
1482 if (!--priv->fw_mutex_depth) {
1483 ieee80211_wake_queues(hw);
1484 priv->fw_mutex_owner = NULL;
1485 mutex_unlock(&priv->fw_mutex);
1486 }
1487 }
1488
1489
1490 /*
1491 * Command processing.
1492 */
1493
1494 /* Timeout firmware commands after 10s */
1495 #define MWL8K_CMD_TIMEOUT_MS 10000
1496
1497 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1498 {
1499 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1500 struct mwl8k_priv *priv = hw->priv;
1501 void __iomem *regs = priv->regs;
1502 dma_addr_t dma_addr;
1503 unsigned int dma_size;
1504 int rc;
1505 unsigned long timeout = 0;
1506 u8 buf[32];
1507
1508 cmd->result = 0xffff;
1509 dma_size = le16_to_cpu(cmd->length);
1510 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1511 PCI_DMA_BIDIRECTIONAL);
1512 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1513 return -ENOMEM;
1514
1515 rc = mwl8k_fw_lock(hw);
1516 if (rc) {
1517 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1518 PCI_DMA_BIDIRECTIONAL);
1519 return rc;
1520 }
1521
1522 priv->hostcmd_wait = &cmd_wait;
1523 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1524 iowrite32(MWL8K_H2A_INT_DOORBELL,
1525 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1526 iowrite32(MWL8K_H2A_INT_DUMMY,
1527 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1528
1529 timeout = wait_for_completion_timeout(&cmd_wait,
1530 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1531
1532 priv->hostcmd_wait = NULL;
1533
1534 mwl8k_fw_unlock(hw);
1535
1536 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1537 PCI_DMA_BIDIRECTIONAL);
1538
1539 if (!timeout) {
1540 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1541 wiphy_name(hw->wiphy),
1542 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1543 MWL8K_CMD_TIMEOUT_MS);
1544 rc = -ETIMEDOUT;
1545 } else {
1546 int ms;
1547
1548 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1549
1550 rc = cmd->result ? -EINVAL : 0;
1551 if (rc)
1552 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1553 wiphy_name(hw->wiphy),
1554 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1555 le16_to_cpu(cmd->result));
1556 else if (ms > 2000)
1557 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1558 wiphy_name(hw->wiphy),
1559 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1560 ms);
1561 }
1562
1563 return rc;
1564 }
1565
1566 /*
1567 * CMD_GET_HW_SPEC (STA version).
1568 */
1569 struct mwl8k_cmd_get_hw_spec_sta {
1570 struct mwl8k_cmd_pkt header;
1571 __u8 hw_rev;
1572 __u8 host_interface;
1573 __le16 num_mcaddrs;
1574 __u8 perm_addr[ETH_ALEN];
1575 __le16 region_code;
1576 __le32 fw_rev;
1577 __le32 ps_cookie;
1578 __le32 caps;
1579 __u8 mcs_bitmap[16];
1580 __le32 rx_queue_ptr;
1581 __le32 num_tx_queues;
1582 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1583 __le32 caps2;
1584 __le32 num_tx_desc_per_queue;
1585 __le32 total_rxd;
1586 } __attribute__((packed));
1587
1588 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1589 #define MWL8K_CAP_GREENFIELD 0x08000000
1590 #define MWL8K_CAP_AMPDU 0x04000000
1591 #define MWL8K_CAP_RX_STBC 0x01000000
1592 #define MWL8K_CAP_TX_STBC 0x00800000
1593 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1594 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1595 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1596 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1597 #define MWL8K_CAP_DELAY_BA 0x00003000
1598 #define MWL8K_CAP_MIMO 0x00000200
1599 #define MWL8K_CAP_40MHZ 0x00000100
1600
1601 static void mwl8k_set_ht_caps(struct ieee80211_hw *hw, u32 cap)
1602 {
1603 struct mwl8k_priv *priv = hw->priv;
1604 int rx_streams;
1605 int tx_streams;
1606
1607 priv->band.ht_cap.ht_supported = 1;
1608
1609 if (cap & MWL8K_CAP_MAX_AMSDU)
1610 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1611 if (cap & MWL8K_CAP_GREENFIELD)
1612 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1613 if (cap & MWL8K_CAP_AMPDU) {
1614 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1615 priv->band.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1616 priv->band.ht_cap.ampdu_density =
1617 IEEE80211_HT_MPDU_DENSITY_NONE;
1618 }
1619 if (cap & MWL8K_CAP_RX_STBC)
1620 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1621 if (cap & MWL8K_CAP_TX_STBC)
1622 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1623 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1624 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1625 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1626 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1627 if (cap & MWL8K_CAP_DELAY_BA)
1628 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1629 if (cap & MWL8K_CAP_40MHZ)
1630 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1631
1632 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1633 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1634
1635 priv->band.ht_cap.mcs.rx_mask[0] = 0xff;
1636 if (rx_streams >= 2)
1637 priv->band.ht_cap.mcs.rx_mask[1] = 0xff;
1638 if (rx_streams >= 3)
1639 priv->band.ht_cap.mcs.rx_mask[2] = 0xff;
1640 priv->band.ht_cap.mcs.rx_mask[4] = 0x01;
1641 priv->band.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1642
1643 if (rx_streams != tx_streams) {
1644 priv->band.ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1645 priv->band.ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1646 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1647 }
1648 }
1649
1650 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1651 {
1652 struct mwl8k_priv *priv = hw->priv;
1653 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1654 int rc;
1655 int i;
1656
1657 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1658 if (cmd == NULL)
1659 return -ENOMEM;
1660
1661 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1662 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1663
1664 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1665 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1666 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1667 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1668 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1669 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1670 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1671 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1672
1673 rc = mwl8k_post_cmd(hw, &cmd->header);
1674
1675 if (!rc) {
1676 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1677 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1678 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1679 priv->hw_rev = cmd->hw_rev;
1680 if (cmd->caps & cpu_to_le32(MWL8K_CAP_MIMO))
1681 mwl8k_set_ht_caps(hw, le32_to_cpu(cmd->caps));
1682 }
1683
1684 kfree(cmd);
1685 return rc;
1686 }
1687
1688 /*
1689 * CMD_GET_HW_SPEC (AP version).
1690 */
1691 struct mwl8k_cmd_get_hw_spec_ap {
1692 struct mwl8k_cmd_pkt header;
1693 __u8 hw_rev;
1694 __u8 host_interface;
1695 __le16 num_wcb;
1696 __le16 num_mcaddrs;
1697 __u8 perm_addr[ETH_ALEN];
1698 __le16 region_code;
1699 __le16 num_antenna;
1700 __le32 fw_rev;
1701 __le32 wcbbase0;
1702 __le32 rxwrptr;
1703 __le32 rxrdptr;
1704 __le32 ps_cookie;
1705 __le32 wcbbase1;
1706 __le32 wcbbase2;
1707 __le32 wcbbase3;
1708 } __attribute__((packed));
1709
1710 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1711 {
1712 struct mwl8k_priv *priv = hw->priv;
1713 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1714 int rc;
1715
1716 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1717 if (cmd == NULL)
1718 return -ENOMEM;
1719
1720 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1721 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1722
1723 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1724 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1725
1726 rc = mwl8k_post_cmd(hw, &cmd->header);
1727
1728 if (!rc) {
1729 int off;
1730
1731 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1732 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1733 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1734 priv->hw_rev = cmd->hw_rev;
1735
1736 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1737 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1738
1739 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1740 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1741
1742 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1743 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1744
1745 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1746 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1747
1748 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1749 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1750
1751 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1752 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1753 }
1754
1755 kfree(cmd);
1756 return rc;
1757 }
1758
1759 /*
1760 * CMD_SET_HW_SPEC.
1761 */
1762 struct mwl8k_cmd_set_hw_spec {
1763 struct mwl8k_cmd_pkt header;
1764 __u8 hw_rev;
1765 __u8 host_interface;
1766 __le16 num_mcaddrs;
1767 __u8 perm_addr[ETH_ALEN];
1768 __le16 region_code;
1769 __le32 fw_rev;
1770 __le32 ps_cookie;
1771 __le32 caps;
1772 __le32 rx_queue_ptr;
1773 __le32 num_tx_queues;
1774 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1775 __le32 flags;
1776 __le32 num_tx_desc_per_queue;
1777 __le32 total_rxd;
1778 } __attribute__((packed));
1779
1780 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1781 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1782 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1783
1784 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1785 {
1786 struct mwl8k_priv *priv = hw->priv;
1787 struct mwl8k_cmd_set_hw_spec *cmd;
1788 int rc;
1789 int i;
1790
1791 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1792 if (cmd == NULL)
1793 return -ENOMEM;
1794
1795 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1796 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1797
1798 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1799 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1800 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1801 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1802 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1803 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1804 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1805 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1806 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1807 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1808
1809 rc = mwl8k_post_cmd(hw, &cmd->header);
1810 kfree(cmd);
1811
1812 return rc;
1813 }
1814
1815 /*
1816 * CMD_MAC_MULTICAST_ADR.
1817 */
1818 struct mwl8k_cmd_mac_multicast_adr {
1819 struct mwl8k_cmd_pkt header;
1820 __le16 action;
1821 __le16 numaddr;
1822 __u8 addr[0][ETH_ALEN];
1823 };
1824
1825 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1826 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1827 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1828 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1829
1830 static struct mwl8k_cmd_pkt *
1831 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1832 int mc_count, struct dev_addr_list *mclist)
1833 {
1834 struct mwl8k_priv *priv = hw->priv;
1835 struct mwl8k_cmd_mac_multicast_adr *cmd;
1836 int size;
1837
1838 if (allmulti || mc_count > priv->num_mcaddrs) {
1839 allmulti = 1;
1840 mc_count = 0;
1841 }
1842
1843 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1844
1845 cmd = kzalloc(size, GFP_ATOMIC);
1846 if (cmd == NULL)
1847 return NULL;
1848
1849 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1850 cmd->header.length = cpu_to_le16(size);
1851 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1852 MWL8K_ENABLE_RX_BROADCAST);
1853
1854 if (allmulti) {
1855 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1856 } else if (mc_count) {
1857 int i;
1858
1859 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1860 cmd->numaddr = cpu_to_le16(mc_count);
1861 for (i = 0; i < mc_count && mclist; i++) {
1862 if (mclist->da_addrlen != ETH_ALEN) {
1863 kfree(cmd);
1864 return NULL;
1865 }
1866 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1867 mclist = mclist->next;
1868 }
1869 }
1870
1871 return &cmd->header;
1872 }
1873
1874 /*
1875 * CMD_GET_STAT.
1876 */
1877 struct mwl8k_cmd_get_stat {
1878 struct mwl8k_cmd_pkt header;
1879 __le32 stats[64];
1880 } __attribute__((packed));
1881
1882 #define MWL8K_STAT_ACK_FAILURE 9
1883 #define MWL8K_STAT_RTS_FAILURE 12
1884 #define MWL8K_STAT_FCS_ERROR 24
1885 #define MWL8K_STAT_RTS_SUCCESS 11
1886
1887 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1888 struct ieee80211_low_level_stats *stats)
1889 {
1890 struct mwl8k_cmd_get_stat *cmd;
1891 int rc;
1892
1893 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1894 if (cmd == NULL)
1895 return -ENOMEM;
1896
1897 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1898 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1899
1900 rc = mwl8k_post_cmd(hw, &cmd->header);
1901 if (!rc) {
1902 stats->dot11ACKFailureCount =
1903 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1904 stats->dot11RTSFailureCount =
1905 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1906 stats->dot11FCSErrorCount =
1907 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1908 stats->dot11RTSSuccessCount =
1909 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1910 }
1911 kfree(cmd);
1912
1913 return rc;
1914 }
1915
1916 /*
1917 * CMD_RADIO_CONTROL.
1918 */
1919 struct mwl8k_cmd_radio_control {
1920 struct mwl8k_cmd_pkt header;
1921 __le16 action;
1922 __le16 control;
1923 __le16 radio_on;
1924 } __attribute__((packed));
1925
1926 static int
1927 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1928 {
1929 struct mwl8k_priv *priv = hw->priv;
1930 struct mwl8k_cmd_radio_control *cmd;
1931 int rc;
1932
1933 if (enable == priv->radio_on && !force)
1934 return 0;
1935
1936 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1937 if (cmd == NULL)
1938 return -ENOMEM;
1939
1940 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1941 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1942 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1943 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1944 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1945
1946 rc = mwl8k_post_cmd(hw, &cmd->header);
1947 kfree(cmd);
1948
1949 if (!rc)
1950 priv->radio_on = enable;
1951
1952 return rc;
1953 }
1954
1955 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
1956 {
1957 return mwl8k_cmd_radio_control(hw, 0, 0);
1958 }
1959
1960 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
1961 {
1962 return mwl8k_cmd_radio_control(hw, 1, 0);
1963 }
1964
1965 static int
1966 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1967 {
1968 struct mwl8k_priv *priv = hw->priv;
1969
1970 priv->radio_short_preamble = short_preamble;
1971
1972 return mwl8k_cmd_radio_control(hw, 1, 1);
1973 }
1974
1975 /*
1976 * CMD_RF_TX_POWER.
1977 */
1978 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1979
1980 struct mwl8k_cmd_rf_tx_power {
1981 struct mwl8k_cmd_pkt header;
1982 __le16 action;
1983 __le16 support_level;
1984 __le16 current_level;
1985 __le16 reserved;
1986 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1987 } __attribute__((packed));
1988
1989 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1990 {
1991 struct mwl8k_cmd_rf_tx_power *cmd;
1992 int rc;
1993
1994 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1995 if (cmd == NULL)
1996 return -ENOMEM;
1997
1998 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1999 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2000 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2001 cmd->support_level = cpu_to_le16(dBm);
2002
2003 rc = mwl8k_post_cmd(hw, &cmd->header);
2004 kfree(cmd);
2005
2006 return rc;
2007 }
2008
2009 /*
2010 * CMD_RF_ANTENNA.
2011 */
2012 struct mwl8k_cmd_rf_antenna {
2013 struct mwl8k_cmd_pkt header;
2014 __le16 antenna;
2015 __le16 mode;
2016 } __attribute__((packed));
2017
2018 #define MWL8K_RF_ANTENNA_RX 1
2019 #define MWL8K_RF_ANTENNA_TX 2
2020
2021 static int
2022 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2023 {
2024 struct mwl8k_cmd_rf_antenna *cmd;
2025 int rc;
2026
2027 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2028 if (cmd == NULL)
2029 return -ENOMEM;
2030
2031 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2032 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2033 cmd->antenna = cpu_to_le16(antenna);
2034 cmd->mode = cpu_to_le16(mask);
2035
2036 rc = mwl8k_post_cmd(hw, &cmd->header);
2037 kfree(cmd);
2038
2039 return rc;
2040 }
2041
2042 /*
2043 * CMD_SET_BEACON.
2044 */
2045 struct mwl8k_cmd_set_beacon {
2046 struct mwl8k_cmd_pkt header;
2047 __le16 beacon_len;
2048 __u8 beacon[0];
2049 };
2050
2051 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, u8 *beacon, int len)
2052 {
2053 struct mwl8k_cmd_set_beacon *cmd;
2054 int rc;
2055
2056 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2057 if (cmd == NULL)
2058 return -ENOMEM;
2059
2060 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2061 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2062 cmd->beacon_len = cpu_to_le16(len);
2063 memcpy(cmd->beacon, beacon, len);
2064
2065 rc = mwl8k_post_cmd(hw, &cmd->header);
2066 kfree(cmd);
2067
2068 return rc;
2069 }
2070
2071 /*
2072 * CMD_SET_PRE_SCAN.
2073 */
2074 struct mwl8k_cmd_set_pre_scan {
2075 struct mwl8k_cmd_pkt header;
2076 } __attribute__((packed));
2077
2078 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2079 {
2080 struct mwl8k_cmd_set_pre_scan *cmd;
2081 int rc;
2082
2083 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2084 if (cmd == NULL)
2085 return -ENOMEM;
2086
2087 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2088 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2089
2090 rc = mwl8k_post_cmd(hw, &cmd->header);
2091 kfree(cmd);
2092
2093 return rc;
2094 }
2095
2096 /*
2097 * CMD_SET_POST_SCAN.
2098 */
2099 struct mwl8k_cmd_set_post_scan {
2100 struct mwl8k_cmd_pkt header;
2101 __le32 isibss;
2102 __u8 bssid[ETH_ALEN];
2103 } __attribute__((packed));
2104
2105 static int
2106 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2107 {
2108 struct mwl8k_cmd_set_post_scan *cmd;
2109 int rc;
2110
2111 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2112 if (cmd == NULL)
2113 return -ENOMEM;
2114
2115 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2116 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2117 cmd->isibss = 0;
2118 memcpy(cmd->bssid, mac, ETH_ALEN);
2119
2120 rc = mwl8k_post_cmd(hw, &cmd->header);
2121 kfree(cmd);
2122
2123 return rc;
2124 }
2125
2126 /*
2127 * CMD_SET_RF_CHANNEL.
2128 */
2129 struct mwl8k_cmd_set_rf_channel {
2130 struct mwl8k_cmd_pkt header;
2131 __le16 action;
2132 __u8 current_channel;
2133 __le32 channel_flags;
2134 } __attribute__((packed));
2135
2136 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2137 struct ieee80211_conf *conf)
2138 {
2139 struct ieee80211_channel *channel = conf->channel;
2140 struct mwl8k_cmd_set_rf_channel *cmd;
2141 int rc;
2142
2143 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2144 if (cmd == NULL)
2145 return -ENOMEM;
2146
2147 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2148 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2149 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2150 cmd->current_channel = channel->hw_value;
2151
2152 if (channel->band == IEEE80211_BAND_2GHZ)
2153 cmd->channel_flags |= cpu_to_le32(0x00000001);
2154
2155 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2156 conf->channel_type == NL80211_CHAN_HT20)
2157 cmd->channel_flags |= cpu_to_le32(0x00000080);
2158 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2159 cmd->channel_flags |= cpu_to_le32(0x000001900);
2160 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2161 cmd->channel_flags |= cpu_to_le32(0x000000900);
2162
2163 rc = mwl8k_post_cmd(hw, &cmd->header);
2164 kfree(cmd);
2165
2166 return rc;
2167 }
2168
2169 /*
2170 * CMD_SET_AID.
2171 */
2172 #define MWL8K_FRAME_PROT_DISABLED 0x00
2173 #define MWL8K_FRAME_PROT_11G 0x07
2174 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2175 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2176
2177 struct mwl8k_cmd_update_set_aid {
2178 struct mwl8k_cmd_pkt header;
2179 __le16 aid;
2180
2181 /* AP's MAC address (BSSID) */
2182 __u8 bssid[ETH_ALEN];
2183 __le16 protection_mode;
2184 __u8 supp_rates[14];
2185 } __attribute__((packed));
2186
2187 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2188 {
2189 int i;
2190 int j;
2191
2192 /*
2193 * Clear nonstandard rates 4 and 13.
2194 */
2195 mask &= 0x1fef;
2196
2197 for (i = 0, j = 0; i < 14; i++) {
2198 if (mask & (1 << i))
2199 rates[j++] = mwl8k_rates[i].hw_value;
2200 }
2201 }
2202
2203 static int
2204 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2205 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2206 {
2207 struct mwl8k_cmd_update_set_aid *cmd;
2208 u16 prot_mode;
2209 int rc;
2210
2211 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2212 if (cmd == NULL)
2213 return -ENOMEM;
2214
2215 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2216 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2217 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2218 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2219
2220 if (vif->bss_conf.use_cts_prot) {
2221 prot_mode = MWL8K_FRAME_PROT_11G;
2222 } else {
2223 switch (vif->bss_conf.ht_operation_mode &
2224 IEEE80211_HT_OP_MODE_PROTECTION) {
2225 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2226 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2227 break;
2228 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2229 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2230 break;
2231 default:
2232 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2233 break;
2234 }
2235 }
2236 cmd->protection_mode = cpu_to_le16(prot_mode);
2237
2238 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2239
2240 rc = mwl8k_post_cmd(hw, &cmd->header);
2241 kfree(cmd);
2242
2243 return rc;
2244 }
2245
2246 /*
2247 * CMD_SET_RATE.
2248 */
2249 struct mwl8k_cmd_set_rate {
2250 struct mwl8k_cmd_pkt header;
2251 __u8 legacy_rates[14];
2252
2253 /* Bitmap for supported MCS codes. */
2254 __u8 mcs_set[16];
2255 __u8 reserved[16];
2256 } __attribute__((packed));
2257
2258 static int
2259 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2260 u32 legacy_rate_mask, u8 *mcs_rates)
2261 {
2262 struct mwl8k_cmd_set_rate *cmd;
2263 int rc;
2264
2265 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2266 if (cmd == NULL)
2267 return -ENOMEM;
2268
2269 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2270 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2271 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2272 memcpy(cmd->mcs_set, mcs_rates, 16);
2273
2274 rc = mwl8k_post_cmd(hw, &cmd->header);
2275 kfree(cmd);
2276
2277 return rc;
2278 }
2279
2280 /*
2281 * CMD_FINALIZE_JOIN.
2282 */
2283 #define MWL8K_FJ_BEACON_MAXLEN 128
2284
2285 struct mwl8k_cmd_finalize_join {
2286 struct mwl8k_cmd_pkt header;
2287 __le32 sleep_interval; /* Number of beacon periods to sleep */
2288 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2289 } __attribute__((packed));
2290
2291 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2292 int framelen, int dtim)
2293 {
2294 struct mwl8k_cmd_finalize_join *cmd;
2295 struct ieee80211_mgmt *payload = frame;
2296 int payload_len;
2297 int rc;
2298
2299 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2300 if (cmd == NULL)
2301 return -ENOMEM;
2302
2303 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2304 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2305 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2306
2307 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2308 if (payload_len < 0)
2309 payload_len = 0;
2310 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2311 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2312
2313 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2314
2315 rc = mwl8k_post_cmd(hw, &cmd->header);
2316 kfree(cmd);
2317
2318 return rc;
2319 }
2320
2321 /*
2322 * CMD_SET_RTS_THRESHOLD.
2323 */
2324 struct mwl8k_cmd_set_rts_threshold {
2325 struct mwl8k_cmd_pkt header;
2326 __le16 action;
2327 __le16 threshold;
2328 } __attribute__((packed));
2329
2330 static int
2331 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2332 {
2333 struct mwl8k_cmd_set_rts_threshold *cmd;
2334 int rc;
2335
2336 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2337 if (cmd == NULL)
2338 return -ENOMEM;
2339
2340 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2341 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2342 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2343 cmd->threshold = cpu_to_le16(rts_thresh);
2344
2345 rc = mwl8k_post_cmd(hw, &cmd->header);
2346 kfree(cmd);
2347
2348 return rc;
2349 }
2350
2351 /*
2352 * CMD_SET_SLOT.
2353 */
2354 struct mwl8k_cmd_set_slot {
2355 struct mwl8k_cmd_pkt header;
2356 __le16 action;
2357 __u8 short_slot;
2358 } __attribute__((packed));
2359
2360 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2361 {
2362 struct mwl8k_cmd_set_slot *cmd;
2363 int rc;
2364
2365 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2366 if (cmd == NULL)
2367 return -ENOMEM;
2368
2369 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2370 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2371 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2372 cmd->short_slot = short_slot_time;
2373
2374 rc = mwl8k_post_cmd(hw, &cmd->header);
2375 kfree(cmd);
2376
2377 return rc;
2378 }
2379
2380 /*
2381 * CMD_SET_EDCA_PARAMS.
2382 */
2383 struct mwl8k_cmd_set_edca_params {
2384 struct mwl8k_cmd_pkt header;
2385
2386 /* See MWL8K_SET_EDCA_XXX below */
2387 __le16 action;
2388
2389 /* TX opportunity in units of 32 us */
2390 __le16 txop;
2391
2392 union {
2393 struct {
2394 /* Log exponent of max contention period: 0...15 */
2395 __le32 log_cw_max;
2396
2397 /* Log exponent of min contention period: 0...15 */
2398 __le32 log_cw_min;
2399
2400 /* Adaptive interframe spacing in units of 32us */
2401 __u8 aifs;
2402
2403 /* TX queue to configure */
2404 __u8 txq;
2405 } ap;
2406 struct {
2407 /* Log exponent of max contention period: 0...15 */
2408 __u8 log_cw_max;
2409
2410 /* Log exponent of min contention period: 0...15 */
2411 __u8 log_cw_min;
2412
2413 /* Adaptive interframe spacing in units of 32us */
2414 __u8 aifs;
2415
2416 /* TX queue to configure */
2417 __u8 txq;
2418 } sta;
2419 };
2420 } __attribute__((packed));
2421
2422 #define MWL8K_SET_EDCA_CW 0x01
2423 #define MWL8K_SET_EDCA_TXOP 0x02
2424 #define MWL8K_SET_EDCA_AIFS 0x04
2425
2426 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2427 MWL8K_SET_EDCA_TXOP | \
2428 MWL8K_SET_EDCA_AIFS)
2429
2430 static int
2431 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2432 __u16 cw_min, __u16 cw_max,
2433 __u8 aifs, __u16 txop)
2434 {
2435 struct mwl8k_priv *priv = hw->priv;
2436 struct mwl8k_cmd_set_edca_params *cmd;
2437 int rc;
2438
2439 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2440 if (cmd == NULL)
2441 return -ENOMEM;
2442
2443 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2444 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2445 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2446 cmd->txop = cpu_to_le16(txop);
2447 if (priv->ap_fw) {
2448 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2449 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2450 cmd->ap.aifs = aifs;
2451 cmd->ap.txq = qnum;
2452 } else {
2453 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2454 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2455 cmd->sta.aifs = aifs;
2456 cmd->sta.txq = qnum;
2457 }
2458
2459 rc = mwl8k_post_cmd(hw, &cmd->header);
2460 kfree(cmd);
2461
2462 return rc;
2463 }
2464
2465 /*
2466 * CMD_SET_WMM_MODE.
2467 */
2468 struct mwl8k_cmd_set_wmm_mode {
2469 struct mwl8k_cmd_pkt header;
2470 __le16 action;
2471 } __attribute__((packed));
2472
2473 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2474 {
2475 struct mwl8k_priv *priv = hw->priv;
2476 struct mwl8k_cmd_set_wmm_mode *cmd;
2477 int rc;
2478
2479 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2480 if (cmd == NULL)
2481 return -ENOMEM;
2482
2483 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2484 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2485 cmd->action = cpu_to_le16(!!enable);
2486
2487 rc = mwl8k_post_cmd(hw, &cmd->header);
2488 kfree(cmd);
2489
2490 if (!rc)
2491 priv->wmm_enabled = enable;
2492
2493 return rc;
2494 }
2495
2496 /*
2497 * CMD_MIMO_CONFIG.
2498 */
2499 struct mwl8k_cmd_mimo_config {
2500 struct mwl8k_cmd_pkt header;
2501 __le32 action;
2502 __u8 rx_antenna_map;
2503 __u8 tx_antenna_map;
2504 } __attribute__((packed));
2505
2506 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2507 {
2508 struct mwl8k_cmd_mimo_config *cmd;
2509 int rc;
2510
2511 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2512 if (cmd == NULL)
2513 return -ENOMEM;
2514
2515 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2516 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2517 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2518 cmd->rx_antenna_map = rx;
2519 cmd->tx_antenna_map = tx;
2520
2521 rc = mwl8k_post_cmd(hw, &cmd->header);
2522 kfree(cmd);
2523
2524 return rc;
2525 }
2526
2527 /*
2528 * CMD_USE_FIXED_RATE (STA version).
2529 */
2530 struct mwl8k_cmd_use_fixed_rate_sta {
2531 struct mwl8k_cmd_pkt header;
2532 __le32 action;
2533 __le32 allow_rate_drop;
2534 __le32 num_rates;
2535 struct {
2536 __le32 is_ht_rate;
2537 __le32 enable_retry;
2538 __le32 rate;
2539 __le32 retry_count;
2540 } rate_entry[8];
2541 __le32 rate_type;
2542 __le32 reserved1;
2543 __le32 reserved2;
2544 } __attribute__((packed));
2545
2546 #define MWL8K_USE_AUTO_RATE 0x0002
2547 #define MWL8K_UCAST_RATE 0
2548
2549 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2550 {
2551 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2552 int rc;
2553
2554 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2555 if (cmd == NULL)
2556 return -ENOMEM;
2557
2558 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2559 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2560 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2561 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2562
2563 rc = mwl8k_post_cmd(hw, &cmd->header);
2564 kfree(cmd);
2565
2566 return rc;
2567 }
2568
2569 /*
2570 * CMD_USE_FIXED_RATE (AP version).
2571 */
2572 struct mwl8k_cmd_use_fixed_rate_ap {
2573 struct mwl8k_cmd_pkt header;
2574 __le32 action;
2575 __le32 allow_rate_drop;
2576 __le32 num_rates;
2577 struct mwl8k_rate_entry_ap {
2578 __le32 is_ht_rate;
2579 __le32 enable_retry;
2580 __le32 rate;
2581 __le32 retry_count;
2582 } rate_entry[4];
2583 u8 multicast_rate;
2584 u8 multicast_rate_type;
2585 u8 management_rate;
2586 } __attribute__((packed));
2587
2588 static int
2589 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2590 {
2591 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2592 int rc;
2593
2594 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2595 if (cmd == NULL)
2596 return -ENOMEM;
2597
2598 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2599 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2600 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2601 cmd->multicast_rate = mcast;
2602 cmd->management_rate = mgmt;
2603
2604 rc = mwl8k_post_cmd(hw, &cmd->header);
2605 kfree(cmd);
2606
2607 return rc;
2608 }
2609
2610 /*
2611 * CMD_ENABLE_SNIFFER.
2612 */
2613 struct mwl8k_cmd_enable_sniffer {
2614 struct mwl8k_cmd_pkt header;
2615 __le32 action;
2616 } __attribute__((packed));
2617
2618 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2619 {
2620 struct mwl8k_cmd_enable_sniffer *cmd;
2621 int rc;
2622
2623 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2624 if (cmd == NULL)
2625 return -ENOMEM;
2626
2627 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2628 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2629 cmd->action = cpu_to_le32(!!enable);
2630
2631 rc = mwl8k_post_cmd(hw, &cmd->header);
2632 kfree(cmd);
2633
2634 return rc;
2635 }
2636
2637 /*
2638 * CMD_SET_MAC_ADDR.
2639 */
2640 struct mwl8k_cmd_set_mac_addr {
2641 struct mwl8k_cmd_pkt header;
2642 union {
2643 struct {
2644 __le16 mac_type;
2645 __u8 mac_addr[ETH_ALEN];
2646 } mbss;
2647 __u8 mac_addr[ETH_ALEN];
2648 };
2649 } __attribute__((packed));
2650
2651 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2652 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2653
2654 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2655 {
2656 struct mwl8k_priv *priv = hw->priv;
2657 struct mwl8k_cmd_set_mac_addr *cmd;
2658 int rc;
2659
2660 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2661 if (cmd == NULL)
2662 return -ENOMEM;
2663
2664 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2665 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2666 if (priv->ap_fw) {
2667 cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
2668 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2669 } else {
2670 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2671 }
2672
2673 rc = mwl8k_post_cmd(hw, &cmd->header);
2674 kfree(cmd);
2675
2676 return rc;
2677 }
2678
2679 /*
2680 * CMD_SET_RATEADAPT_MODE.
2681 */
2682 struct mwl8k_cmd_set_rate_adapt_mode {
2683 struct mwl8k_cmd_pkt header;
2684 __le16 action;
2685 __le16 mode;
2686 } __attribute__((packed));
2687
2688 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2689 {
2690 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2691 int rc;
2692
2693 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2694 if (cmd == NULL)
2695 return -ENOMEM;
2696
2697 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2698 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2699 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2700 cmd->mode = cpu_to_le16(mode);
2701
2702 rc = mwl8k_post_cmd(hw, &cmd->header);
2703 kfree(cmd);
2704
2705 return rc;
2706 }
2707
2708 /*
2709 * CMD_BSS_START.
2710 */
2711 struct mwl8k_cmd_bss_start {
2712 struct mwl8k_cmd_pkt header;
2713 __le32 enable;
2714 } __attribute__((packed));
2715
2716 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, int enable)
2717 {
2718 struct mwl8k_cmd_bss_start *cmd;
2719 int rc;
2720
2721 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2722 if (cmd == NULL)
2723 return -ENOMEM;
2724
2725 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2726 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2727 cmd->enable = cpu_to_le32(enable);
2728
2729 rc = mwl8k_post_cmd(hw, &cmd->header);
2730 kfree(cmd);
2731
2732 return rc;
2733 }
2734
2735 /*
2736 * CMD_SET_NEW_STN.
2737 */
2738 struct mwl8k_cmd_set_new_stn {
2739 struct mwl8k_cmd_pkt header;
2740 __le16 aid;
2741 __u8 mac_addr[6];
2742 __le16 stn_id;
2743 __le16 action;
2744 __le16 rsvd;
2745 __le32 legacy_rates;
2746 __u8 ht_rates[4];
2747 __le16 cap_info;
2748 __le16 ht_capabilities_info;
2749 __u8 mac_ht_param_info;
2750 __u8 rev;
2751 __u8 control_channel;
2752 __u8 add_channel;
2753 __le16 op_mode;
2754 __le16 stbc;
2755 __u8 add_qos_info;
2756 __u8 is_qos_sta;
2757 __le32 fw_sta_ptr;
2758 } __attribute__((packed));
2759
2760 #define MWL8K_STA_ACTION_ADD 0
2761 #define MWL8K_STA_ACTION_REMOVE 2
2762
2763 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2764 struct ieee80211_vif *vif,
2765 struct ieee80211_sta *sta)
2766 {
2767 struct mwl8k_cmd_set_new_stn *cmd;
2768 int rc;
2769
2770 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2771 if (cmd == NULL)
2772 return -ENOMEM;
2773
2774 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2775 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2776 cmd->aid = cpu_to_le16(sta->aid);
2777 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2778 cmd->stn_id = cpu_to_le16(sta->aid);
2779 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2780 cmd->legacy_rates = cpu_to_le32(sta->supp_rates[IEEE80211_BAND_2GHZ]);
2781 if (sta->ht_cap.ht_supported) {
2782 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2783 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2784 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2785 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2786 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2787 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2788 ((sta->ht_cap.ampdu_density & 7) << 2);
2789 cmd->is_qos_sta = 1;
2790 }
2791
2792 rc = mwl8k_post_cmd(hw, &cmd->header);
2793 kfree(cmd);
2794
2795 return rc;
2796 }
2797
2798 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2799 struct ieee80211_vif *vif)
2800 {
2801 struct mwl8k_cmd_set_new_stn *cmd;
2802 int rc;
2803
2804 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2805 if (cmd == NULL)
2806 return -ENOMEM;
2807
2808 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2809 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2810 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2811
2812 rc = mwl8k_post_cmd(hw, &cmd->header);
2813 kfree(cmd);
2814
2815 return rc;
2816 }
2817
2818 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2819 struct ieee80211_vif *vif, u8 *addr)
2820 {
2821 struct mwl8k_cmd_set_new_stn *cmd;
2822 int rc;
2823
2824 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2825 if (cmd == NULL)
2826 return -ENOMEM;
2827
2828 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2829 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2830 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2831 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2832
2833 rc = mwl8k_post_cmd(hw, &cmd->header);
2834 kfree(cmd);
2835
2836 return rc;
2837 }
2838
2839 /*
2840 * CMD_UPDATE_STADB.
2841 */
2842 struct ewc_ht_info {
2843 __le16 control1;
2844 __le16 control2;
2845 __le16 control3;
2846 } __attribute__((packed));
2847
2848 struct peer_capability_info {
2849 /* Peer type - AP vs. STA. */
2850 __u8 peer_type;
2851
2852 /* Basic 802.11 capabilities from assoc resp. */
2853 __le16 basic_caps;
2854
2855 /* Set if peer supports 802.11n high throughput (HT). */
2856 __u8 ht_support;
2857
2858 /* Valid if HT is supported. */
2859 __le16 ht_caps;
2860 __u8 extended_ht_caps;
2861 struct ewc_ht_info ewc_info;
2862
2863 /* Legacy rate table. Intersection of our rates and peer rates. */
2864 __u8 legacy_rates[12];
2865
2866 /* HT rate table. Intersection of our rates and peer rates. */
2867 __u8 ht_rates[16];
2868 __u8 pad[16];
2869
2870 /* If set, interoperability mode, no proprietary extensions. */
2871 __u8 interop;
2872 __u8 pad2;
2873 __u8 station_id;
2874 __le16 amsdu_enabled;
2875 } __attribute__((packed));
2876
2877 struct mwl8k_cmd_update_stadb {
2878 struct mwl8k_cmd_pkt header;
2879
2880 /* See STADB_ACTION_TYPE */
2881 __le32 action;
2882
2883 /* Peer MAC address */
2884 __u8 peer_addr[ETH_ALEN];
2885
2886 __le32 reserved;
2887
2888 /* Peer info - valid during add/update. */
2889 struct peer_capability_info peer_info;
2890 } __attribute__((packed));
2891
2892 #define MWL8K_STA_DB_MODIFY_ENTRY 1
2893 #define MWL8K_STA_DB_DEL_ENTRY 2
2894
2895 /* Peer Entry flags - used to define the type of the peer node */
2896 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
2897
2898 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
2899 struct ieee80211_vif *vif,
2900 struct ieee80211_sta *sta)
2901 {
2902 struct mwl8k_cmd_update_stadb *cmd;
2903 struct peer_capability_info *p;
2904 int rc;
2905
2906 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2907 if (cmd == NULL)
2908 return -ENOMEM;
2909
2910 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2911 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2912 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
2913 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
2914
2915 p = &cmd->peer_info;
2916 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2917 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
2918 p->ht_support = sta->ht_cap.ht_supported;
2919 p->ht_caps = sta->ht_cap.cap;
2920 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
2921 ((sta->ht_cap.ampdu_density & 7) << 2);
2922 legacy_rate_mask_to_array(p->legacy_rates,
2923 sta->supp_rates[IEEE80211_BAND_2GHZ]);
2924 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
2925 p->interop = 1;
2926 p->amsdu_enabled = 0;
2927
2928 rc = mwl8k_post_cmd(hw, &cmd->header);
2929 kfree(cmd);
2930
2931 return rc ? rc : p->station_id;
2932 }
2933
2934 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
2935 struct ieee80211_vif *vif, u8 *addr)
2936 {
2937 struct mwl8k_cmd_update_stadb *cmd;
2938 int rc;
2939
2940 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2941 if (cmd == NULL)
2942 return -ENOMEM;
2943
2944 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2945 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2946 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
2947 memcpy(cmd->peer_addr, addr, ETH_ALEN);
2948
2949 rc = mwl8k_post_cmd(hw, &cmd->header);
2950 kfree(cmd);
2951
2952 return rc;
2953 }
2954
2955
2956 /*
2957 * Interrupt handling.
2958 */
2959 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2960 {
2961 struct ieee80211_hw *hw = dev_id;
2962 struct mwl8k_priv *priv = hw->priv;
2963 u32 status;
2964
2965 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2966 if (!status)
2967 return IRQ_NONE;
2968
2969 if (status & MWL8K_A2H_INT_TX_DONE) {
2970 status &= ~MWL8K_A2H_INT_TX_DONE;
2971 tasklet_schedule(&priv->poll_tx_task);
2972 }
2973
2974 if (status)
2975 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2976
2977 if (status & MWL8K_A2H_INT_RX_READY) {
2978 while (rxq_process(hw, 0, 1))
2979 rxq_refill(hw, 0, 1);
2980 }
2981
2982 if (status & MWL8K_A2H_INT_OPC_DONE) {
2983 if (priv->hostcmd_wait != NULL)
2984 complete(priv->hostcmd_wait);
2985 }
2986
2987 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2988 if (!mutex_is_locked(&priv->fw_mutex) &&
2989 priv->radio_on && priv->pending_tx_pkts)
2990 mwl8k_tx_start(priv);
2991 }
2992
2993 return IRQ_HANDLED;
2994 }
2995
2996 static void mwl8k_tx_poll(unsigned long data)
2997 {
2998 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
2999 struct mwl8k_priv *priv = hw->priv;
3000 int limit;
3001 int i;
3002
3003 limit = 32;
3004
3005 spin_lock_bh(&priv->tx_lock);
3006
3007 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3008 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3009
3010 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3011 complete(priv->tx_wait);
3012 priv->tx_wait = NULL;
3013 }
3014
3015 spin_unlock_bh(&priv->tx_lock);
3016
3017 if (limit) {
3018 writel(~MWL8K_A2H_INT_TX_DONE,
3019 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3020 } else {
3021 tasklet_schedule(&priv->poll_tx_task);
3022 }
3023 }
3024
3025
3026 /*
3027 * Core driver operations.
3028 */
3029 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3030 {
3031 struct mwl8k_priv *priv = hw->priv;
3032 int index = skb_get_queue_mapping(skb);
3033 int rc;
3034
3035 if (priv->current_channel == NULL) {
3036 printk(KERN_DEBUG "%s: dropped TX frame since radio "
3037 "disabled\n", wiphy_name(hw->wiphy));
3038 dev_kfree_skb(skb);
3039 return NETDEV_TX_OK;
3040 }
3041
3042 rc = mwl8k_txq_xmit(hw, index, skb);
3043
3044 return rc;
3045 }
3046
3047 static int mwl8k_start(struct ieee80211_hw *hw)
3048 {
3049 struct mwl8k_priv *priv = hw->priv;
3050 int rc;
3051
3052 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3053 IRQF_SHARED, MWL8K_NAME, hw);
3054 if (rc) {
3055 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3056 wiphy_name(hw->wiphy));
3057 return -EIO;
3058 }
3059
3060 /* Enable tx reclaim tasklet */
3061 tasklet_enable(&priv->poll_tx_task);
3062
3063 /* Enable interrupts */
3064 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3065
3066 rc = mwl8k_fw_lock(hw);
3067 if (!rc) {
3068 rc = mwl8k_cmd_radio_enable(hw);
3069
3070 if (!priv->ap_fw) {
3071 if (!rc)
3072 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3073
3074 if (!rc)
3075 rc = mwl8k_cmd_set_pre_scan(hw);
3076
3077 if (!rc)
3078 rc = mwl8k_cmd_set_post_scan(hw,
3079 "\x00\x00\x00\x00\x00\x00");
3080 }
3081
3082 if (!rc)
3083 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3084
3085 if (!rc)
3086 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3087
3088 mwl8k_fw_unlock(hw);
3089 }
3090
3091 if (rc) {
3092 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3093 free_irq(priv->pdev->irq, hw);
3094 tasklet_disable(&priv->poll_tx_task);
3095 }
3096
3097 return rc;
3098 }
3099
3100 static void mwl8k_stop(struct ieee80211_hw *hw)
3101 {
3102 struct mwl8k_priv *priv = hw->priv;
3103 int i;
3104
3105 mwl8k_cmd_radio_disable(hw);
3106
3107 ieee80211_stop_queues(hw);
3108
3109 /* Disable interrupts */
3110 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3111 free_irq(priv->pdev->irq, hw);
3112
3113 /* Stop finalize join worker */
3114 cancel_work_sync(&priv->finalize_join_worker);
3115 if (priv->beacon_skb != NULL)
3116 dev_kfree_skb(priv->beacon_skb);
3117
3118 /* Stop tx reclaim tasklet */
3119 tasklet_disable(&priv->poll_tx_task);
3120
3121 /* Return all skbs to mac80211 */
3122 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3123 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3124 }
3125
3126 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3127 struct ieee80211_vif *vif)
3128 {
3129 struct mwl8k_priv *priv = hw->priv;
3130 struct mwl8k_vif *mwl8k_vif;
3131
3132 /*
3133 * We only support one active interface at a time.
3134 */
3135 if (priv->vif != NULL)
3136 return -EBUSY;
3137
3138 /*
3139 * Reject interface creation if sniffer mode is active, as
3140 * STA operation is mutually exclusive with hardware sniffer
3141 * mode. (Sniffer mode is only used on STA firmware.)
3142 */
3143 if (priv->sniffer_enabled) {
3144 printk(KERN_INFO "%s: unable to create STA "
3145 "interface due to sniffer mode being enabled\n",
3146 wiphy_name(hw->wiphy));
3147 return -EINVAL;
3148 }
3149
3150 /* Set the mac address. */
3151 mwl8k_cmd_set_mac_addr(hw, vif->addr);
3152
3153 if (priv->ap_fw)
3154 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3155
3156 /* Clean out driver private area */
3157 mwl8k_vif = MWL8K_VIF(vif);
3158 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3159
3160 /* Set Initial sequence number to zero */
3161 mwl8k_vif->seqno = 0;
3162
3163 priv->vif = vif;
3164 priv->current_channel = NULL;
3165
3166 return 0;
3167 }
3168
3169 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3170 struct ieee80211_vif *vif)
3171 {
3172 struct mwl8k_priv *priv = hw->priv;
3173
3174 if (priv->ap_fw)
3175 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3176
3177 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3178
3179 priv->vif = NULL;
3180 }
3181
3182 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3183 {
3184 struct ieee80211_conf *conf = &hw->conf;
3185 struct mwl8k_priv *priv = hw->priv;
3186 int rc;
3187
3188 if (conf->flags & IEEE80211_CONF_IDLE) {
3189 mwl8k_cmd_radio_disable(hw);
3190 priv->current_channel = NULL;
3191 return 0;
3192 }
3193
3194 rc = mwl8k_fw_lock(hw);
3195 if (rc)
3196 return rc;
3197
3198 rc = mwl8k_cmd_radio_enable(hw);
3199 if (rc)
3200 goto out;
3201
3202 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3203 if (rc)
3204 goto out;
3205
3206 priv->current_channel = conf->channel;
3207
3208 if (conf->power_level > 18)
3209 conf->power_level = 18;
3210 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3211 if (rc)
3212 goto out;
3213
3214 if (priv->ap_fw) {
3215 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3216 if (!rc)
3217 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3218 } else {
3219 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3220 }
3221
3222 out:
3223 mwl8k_fw_unlock(hw);
3224
3225 return rc;
3226 }
3227
3228 static void
3229 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3230 struct ieee80211_bss_conf *info, u32 changed)
3231 {
3232 struct mwl8k_priv *priv = hw->priv;
3233 u32 ap_legacy_rates;
3234 u8 ap_mcs_rates[16];
3235 int rc;
3236
3237 if (mwl8k_fw_lock(hw))
3238 return;
3239
3240 /*
3241 * No need to capture a beacon if we're no longer associated.
3242 */
3243 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3244 priv->capture_beacon = false;
3245
3246 /*
3247 * Get the AP's legacy and MCS rates.
3248 */
3249 ap_legacy_rates = 0;
3250 if (vif->bss_conf.assoc) {
3251 struct ieee80211_sta *ap;
3252 rcu_read_lock();
3253
3254 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3255 if (ap == NULL) {
3256 rcu_read_unlock();
3257 goto out;
3258 }
3259
3260 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3261 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3262
3263 rcu_read_unlock();
3264 }
3265
3266 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3267 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3268 if (rc)
3269 goto out;
3270
3271 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3272 if (rc)
3273 goto out;
3274 }
3275
3276 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3277 rc = mwl8k_set_radio_preamble(hw,
3278 vif->bss_conf.use_short_preamble);
3279 if (rc)
3280 goto out;
3281 }
3282
3283 if (changed & BSS_CHANGED_ERP_SLOT) {
3284 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3285 if (rc)
3286 goto out;
3287 }
3288
3289 if (((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) ||
3290 (changed & (BSS_CHANGED_ERP_CTS_PROT | BSS_CHANGED_HT))) {
3291 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3292 if (rc)
3293 goto out;
3294 }
3295
3296 if (vif->bss_conf.assoc &&
3297 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3298 /*
3299 * Finalize the join. Tell rx handler to process
3300 * next beacon from our BSSID.
3301 */
3302 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3303 priv->capture_beacon = true;
3304 }
3305
3306 out:
3307 mwl8k_fw_unlock(hw);
3308 }
3309
3310 static void
3311 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3312 struct ieee80211_bss_conf *info, u32 changed)
3313 {
3314 int rc;
3315
3316 if (mwl8k_fw_lock(hw))
3317 return;
3318
3319 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3320 rc = mwl8k_set_radio_preamble(hw,
3321 vif->bss_conf.use_short_preamble);
3322 if (rc)
3323 goto out;
3324 }
3325
3326 if (changed & BSS_CHANGED_BASIC_RATES) {
3327 int idx;
3328 int rate;
3329
3330 /*
3331 * Use lowest supported basic rate for multicasts
3332 * and management frames (such as probe responses --
3333 * beacons will always go out at 1 Mb/s).
3334 */
3335 idx = ffs(vif->bss_conf.basic_rates);
3336 rate = idx ? mwl8k_rates[idx - 1].hw_value : 2;
3337
3338 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3339 }
3340
3341 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3342 struct sk_buff *skb;
3343
3344 skb = ieee80211_beacon_get(hw, vif);
3345 if (skb != NULL) {
3346 mwl8k_cmd_set_beacon(hw, skb->data, skb->len);
3347 kfree_skb(skb);
3348 }
3349 }
3350
3351 if (changed & BSS_CHANGED_BEACON_ENABLED)
3352 mwl8k_cmd_bss_start(hw, info->enable_beacon);
3353
3354 out:
3355 mwl8k_fw_unlock(hw);
3356 }
3357
3358 static void
3359 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3360 struct ieee80211_bss_conf *info, u32 changed)
3361 {
3362 struct mwl8k_priv *priv = hw->priv;
3363
3364 if (!priv->ap_fw)
3365 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3366 else
3367 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3368 }
3369
3370 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3371 int mc_count, struct dev_addr_list *mclist)
3372 {
3373 struct mwl8k_cmd_pkt *cmd;
3374
3375 /*
3376 * Synthesize and return a command packet that programs the
3377 * hardware multicast address filter. At this point we don't
3378 * know whether FIF_ALLMULTI is being requested, but if it is,
3379 * we'll end up throwing this packet away and creating a new
3380 * one in mwl8k_configure_filter().
3381 */
3382 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3383
3384 return (unsigned long)cmd;
3385 }
3386
3387 static int
3388 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3389 unsigned int changed_flags,
3390 unsigned int *total_flags)
3391 {
3392 struct mwl8k_priv *priv = hw->priv;
3393
3394 /*
3395 * Hardware sniffer mode is mutually exclusive with STA
3396 * operation, so refuse to enable sniffer mode if a STA
3397 * interface is active.
3398 */
3399 if (priv->vif != NULL) {
3400 if (net_ratelimit())
3401 printk(KERN_INFO "%s: not enabling sniffer "
3402 "mode because STA interface is active\n",
3403 wiphy_name(hw->wiphy));
3404 return 0;
3405 }
3406
3407 if (!priv->sniffer_enabled) {
3408 if (mwl8k_cmd_enable_sniffer(hw, 1))
3409 return 0;
3410 priv->sniffer_enabled = true;
3411 }
3412
3413 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3414 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3415 FIF_OTHER_BSS;
3416
3417 return 1;
3418 }
3419
3420 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3421 unsigned int changed_flags,
3422 unsigned int *total_flags,
3423 u64 multicast)
3424 {
3425 struct mwl8k_priv *priv = hw->priv;
3426 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3427
3428 /*
3429 * AP firmware doesn't allow fine-grained control over
3430 * the receive filter.
3431 */
3432 if (priv->ap_fw) {
3433 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3434 kfree(cmd);
3435 return;
3436 }
3437
3438 /*
3439 * Enable hardware sniffer mode if FIF_CONTROL or
3440 * FIF_OTHER_BSS is requested.
3441 */
3442 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3443 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3444 kfree(cmd);
3445 return;
3446 }
3447
3448 /* Clear unsupported feature flags */
3449 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3450
3451 if (mwl8k_fw_lock(hw)) {
3452 kfree(cmd);
3453 return;
3454 }
3455
3456 if (priv->sniffer_enabled) {
3457 mwl8k_cmd_enable_sniffer(hw, 0);
3458 priv->sniffer_enabled = false;
3459 }
3460
3461 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3462 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3463 /*
3464 * Disable the BSS filter.
3465 */
3466 mwl8k_cmd_set_pre_scan(hw);
3467 } else {
3468 const u8 *bssid;
3469
3470 /*
3471 * Enable the BSS filter.
3472 *
3473 * If there is an active STA interface, use that
3474 * interface's BSSID, otherwise use a dummy one
3475 * (where the OUI part needs to be nonzero for
3476 * the BSSID to be accepted by POST_SCAN).
3477 */
3478 bssid = "\x01\x00\x00\x00\x00\x00";
3479 if (priv->vif != NULL)
3480 bssid = priv->vif->bss_conf.bssid;
3481
3482 mwl8k_cmd_set_post_scan(hw, bssid);
3483 }
3484 }
3485
3486 /*
3487 * If FIF_ALLMULTI is being requested, throw away the command
3488 * packet that ->prepare_multicast() built and replace it with
3489 * a command packet that enables reception of all multicast
3490 * packets.
3491 */
3492 if (*total_flags & FIF_ALLMULTI) {
3493 kfree(cmd);
3494 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3495 }
3496
3497 if (cmd != NULL) {
3498 mwl8k_post_cmd(hw, cmd);
3499 kfree(cmd);
3500 }
3501
3502 mwl8k_fw_unlock(hw);
3503 }
3504
3505 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3506 {
3507 return mwl8k_cmd_set_rts_threshold(hw, value);
3508 }
3509
3510 struct mwl8k_sta_notify_item
3511 {
3512 struct list_head list;
3513 struct ieee80211_vif *vif;
3514 enum sta_notify_cmd cmd;
3515 struct ieee80211_sta sta;
3516 };
3517
3518 static void
3519 mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
3520 {
3521 struct mwl8k_priv *priv = hw->priv;
3522
3523 /*
3524 * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
3525 */
3526 if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3527 int rc;
3528
3529 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
3530 if (rc >= 0) {
3531 struct ieee80211_sta *sta;
3532
3533 rcu_read_lock();
3534 sta = ieee80211_find_sta(s->vif, s->sta.addr);
3535 if (sta != NULL)
3536 MWL8K_STA(sta)->peer_id = rc;
3537 rcu_read_unlock();
3538 }
3539 } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3540 mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
3541 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3542 mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
3543 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3544 mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
3545 }
3546 }
3547
3548 static void mwl8k_sta_notify_worker(struct work_struct *work)
3549 {
3550 struct mwl8k_priv *priv =
3551 container_of(work, struct mwl8k_priv, sta_notify_worker);
3552 struct ieee80211_hw *hw = priv->hw;
3553
3554 spin_lock_bh(&priv->sta_notify_list_lock);
3555 while (!list_empty(&priv->sta_notify_list)) {
3556 struct mwl8k_sta_notify_item *s;
3557
3558 s = list_entry(priv->sta_notify_list.next,
3559 struct mwl8k_sta_notify_item, list);
3560 list_del(&s->list);
3561
3562 spin_unlock_bh(&priv->sta_notify_list_lock);
3563
3564 mwl8k_do_sta_notify(hw, s);
3565 kfree(s);
3566
3567 spin_lock_bh(&priv->sta_notify_list_lock);
3568 }
3569 spin_unlock_bh(&priv->sta_notify_list_lock);
3570 }
3571
3572 static void
3573 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3574 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3575 {
3576 struct mwl8k_priv *priv = hw->priv;
3577 struct mwl8k_sta_notify_item *s;
3578
3579 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3580 return;
3581
3582 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3583 if (s != NULL) {
3584 s->vif = vif;
3585 s->cmd = cmd;
3586 s->sta = *sta;
3587
3588 spin_lock(&priv->sta_notify_list_lock);
3589 list_add_tail(&s->list, &priv->sta_notify_list);
3590 spin_unlock(&priv->sta_notify_list_lock);
3591
3592 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3593 }
3594 }
3595
3596 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3597 const struct ieee80211_tx_queue_params *params)
3598 {
3599 struct mwl8k_priv *priv = hw->priv;
3600 int rc;
3601
3602 rc = mwl8k_fw_lock(hw);
3603 if (!rc) {
3604 if (!priv->wmm_enabled)
3605 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3606
3607 if (!rc)
3608 rc = mwl8k_cmd_set_edca_params(hw, queue,
3609 params->cw_min,
3610 params->cw_max,
3611 params->aifs,
3612 params->txop);
3613
3614 mwl8k_fw_unlock(hw);
3615 }
3616
3617 return rc;
3618 }
3619
3620 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3621 struct ieee80211_tx_queue_stats *stats)
3622 {
3623 struct mwl8k_priv *priv = hw->priv;
3624 struct mwl8k_tx_queue *txq;
3625 int index;
3626
3627 spin_lock_bh(&priv->tx_lock);
3628 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3629 txq = priv->txq + index;
3630 memcpy(&stats[index], &txq->stats,
3631 sizeof(struct ieee80211_tx_queue_stats));
3632 }
3633 spin_unlock_bh(&priv->tx_lock);
3634
3635 return 0;
3636 }
3637
3638 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3639 struct ieee80211_low_level_stats *stats)
3640 {
3641 return mwl8k_cmd_get_stat(hw, stats);
3642 }
3643
3644 static int
3645 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3646 enum ieee80211_ampdu_mlme_action action,
3647 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3648 {
3649 switch (action) {
3650 case IEEE80211_AMPDU_RX_START:
3651 case IEEE80211_AMPDU_RX_STOP:
3652 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3653 return -ENOTSUPP;
3654 return 0;
3655 default:
3656 return -ENOTSUPP;
3657 }
3658 }
3659
3660 static const struct ieee80211_ops mwl8k_ops = {
3661 .tx = mwl8k_tx,
3662 .start = mwl8k_start,
3663 .stop = mwl8k_stop,
3664 .add_interface = mwl8k_add_interface,
3665 .remove_interface = mwl8k_remove_interface,
3666 .config = mwl8k_config,
3667 .bss_info_changed = mwl8k_bss_info_changed,
3668 .prepare_multicast = mwl8k_prepare_multicast,
3669 .configure_filter = mwl8k_configure_filter,
3670 .set_rts_threshold = mwl8k_set_rts_threshold,
3671 .sta_notify = mwl8k_sta_notify,
3672 .conf_tx = mwl8k_conf_tx,
3673 .get_tx_stats = mwl8k_get_tx_stats,
3674 .get_stats = mwl8k_get_stats,
3675 .ampdu_action = mwl8k_ampdu_action,
3676 };
3677
3678 static void mwl8k_finalize_join_worker(struct work_struct *work)
3679 {
3680 struct mwl8k_priv *priv =
3681 container_of(work, struct mwl8k_priv, finalize_join_worker);
3682 struct sk_buff *skb = priv->beacon_skb;
3683
3684 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3685 priv->vif->bss_conf.dtim_period);
3686 dev_kfree_skb(skb);
3687
3688 priv->beacon_skb = NULL;
3689 }
3690
3691 enum {
3692 MWL8363 = 0,
3693 MWL8687,
3694 MWL8366,
3695 };
3696
3697 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3698 [MWL8363] = {
3699 .part_name = "88w8363",
3700 .helper_image = "mwl8k/helper_8363.fw",
3701 .fw_image = "mwl8k/fmimage_8363.fw",
3702 },
3703 [MWL8687] = {
3704 .part_name = "88w8687",
3705 .helper_image = "mwl8k/helper_8687.fw",
3706 .fw_image = "mwl8k/fmimage_8687.fw",
3707 },
3708 [MWL8366] = {
3709 .part_name = "88w8366",
3710 .helper_image = "mwl8k/helper_8366.fw",
3711 .fw_image = "mwl8k/fmimage_8366.fw",
3712 .ap_rxd_ops = &rxd_8366_ap_ops,
3713 },
3714 };
3715
3716 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3717 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3718 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3719 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3720 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3721 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3722 { },
3723 };
3724 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3725
3726 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3727 const struct pci_device_id *id)
3728 {
3729 static int printed_version = 0;
3730 struct ieee80211_hw *hw;
3731 struct mwl8k_priv *priv;
3732 int rc;
3733 int i;
3734
3735 if (!printed_version) {
3736 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3737 printed_version = 1;
3738 }
3739
3740
3741 rc = pci_enable_device(pdev);
3742 if (rc) {
3743 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3744 MWL8K_NAME);
3745 return rc;
3746 }
3747
3748 rc = pci_request_regions(pdev, MWL8K_NAME);
3749 if (rc) {
3750 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3751 MWL8K_NAME);
3752 goto err_disable_device;
3753 }
3754
3755 pci_set_master(pdev);
3756
3757
3758 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3759 if (hw == NULL) {
3760 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3761 rc = -ENOMEM;
3762 goto err_free_reg;
3763 }
3764
3765 SET_IEEE80211_DEV(hw, &pdev->dev);
3766 pci_set_drvdata(pdev, hw);
3767
3768 priv = hw->priv;
3769 priv->hw = hw;
3770 priv->pdev = pdev;
3771 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3772
3773
3774 priv->sram = pci_iomap(pdev, 0, 0x10000);
3775 if (priv->sram == NULL) {
3776 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3777 wiphy_name(hw->wiphy));
3778 goto err_iounmap;
3779 }
3780
3781 /*
3782 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3783 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3784 */
3785 priv->regs = pci_iomap(pdev, 1, 0x10000);
3786 if (priv->regs == NULL) {
3787 priv->regs = pci_iomap(pdev, 2, 0x10000);
3788 if (priv->regs == NULL) {
3789 printk(KERN_ERR "%s: Cannot map device registers\n",
3790 wiphy_name(hw->wiphy));
3791 goto err_iounmap;
3792 }
3793 }
3794
3795
3796 /* Reset firmware and hardware */
3797 mwl8k_hw_reset(priv);
3798
3799 /* Ask userland hotplug daemon for the device firmware */
3800 rc = mwl8k_request_firmware(priv);
3801 if (rc) {
3802 printk(KERN_ERR "%s: Firmware files not found\n",
3803 wiphy_name(hw->wiphy));
3804 goto err_stop_firmware;
3805 }
3806
3807 /* Load firmware into hardware */
3808 rc = mwl8k_load_firmware(hw);
3809 if (rc) {
3810 printk(KERN_ERR "%s: Cannot start firmware\n",
3811 wiphy_name(hw->wiphy));
3812 goto err_stop_firmware;
3813 }
3814
3815 /* Reclaim memory once firmware is successfully loaded */
3816 mwl8k_release_firmware(priv);
3817
3818
3819 if (priv->ap_fw) {
3820 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3821 if (priv->rxd_ops == NULL) {
3822 printk(KERN_ERR "%s: Driver does not have AP "
3823 "firmware image support for this hardware\n",
3824 wiphy_name(hw->wiphy));
3825 goto err_stop_firmware;
3826 }
3827 } else {
3828 priv->rxd_ops = &rxd_sta_ops;
3829 }
3830
3831 priv->sniffer_enabled = false;
3832 priv->wmm_enabled = false;
3833 priv->pending_tx_pkts = 0;
3834
3835
3836 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3837 priv->band.band = IEEE80211_BAND_2GHZ;
3838 priv->band.channels = priv->channels;
3839 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3840 priv->band.bitrates = priv->rates;
3841 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3842 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3843
3844 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3845 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3846
3847 /*
3848 * Extra headroom is the size of the required DMA header
3849 * minus the size of the smallest 802.11 frame (CTS frame).
3850 */
3851 hw->extra_tx_headroom =
3852 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3853
3854 hw->channel_change_time = 10;
3855
3856 hw->queues = MWL8K_TX_QUEUES;
3857
3858 /* Set rssi and noise values to dBm */
3859 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3860 hw->vif_data_size = sizeof(struct mwl8k_vif);
3861 hw->sta_data_size = sizeof(struct mwl8k_sta);
3862 priv->vif = NULL;
3863
3864 /* Set default radio state and preamble */
3865 priv->radio_on = 0;
3866 priv->radio_short_preamble = 0;
3867
3868 /* Station database handling */
3869 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
3870 spin_lock_init(&priv->sta_notify_list_lock);
3871 INIT_LIST_HEAD(&priv->sta_notify_list);
3872
3873 /* Finalize join worker */
3874 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3875
3876 /* TX reclaim tasklet */
3877 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
3878 tasklet_disable(&priv->poll_tx_task);
3879
3880 /* Power management cookie */
3881 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3882 if (priv->cookie == NULL)
3883 goto err_stop_firmware;
3884
3885 rc = mwl8k_rxq_init(hw, 0);
3886 if (rc)
3887 goto err_free_cookie;
3888 rxq_refill(hw, 0, INT_MAX);
3889
3890 mutex_init(&priv->fw_mutex);
3891 priv->fw_mutex_owner = NULL;
3892 priv->fw_mutex_depth = 0;
3893 priv->hostcmd_wait = NULL;
3894
3895 spin_lock_init(&priv->tx_lock);
3896
3897 priv->tx_wait = NULL;
3898
3899 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3900 rc = mwl8k_txq_init(hw, i);
3901 if (rc)
3902 goto err_free_queues;
3903 }
3904
3905 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3906 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3907 iowrite32(MWL8K_A2H_INT_TX_DONE,
3908 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3909 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3910
3911 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3912 IRQF_SHARED, MWL8K_NAME, hw);
3913 if (rc) {
3914 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3915 wiphy_name(hw->wiphy));
3916 goto err_free_queues;
3917 }
3918
3919 /*
3920 * Temporarily enable interrupts. Initial firmware host
3921 * commands use interrupts and avoid polling. Disable
3922 * interrupts when done.
3923 */
3924 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3925
3926 /* Get config data, mac addrs etc */
3927 if (priv->ap_fw) {
3928 rc = mwl8k_cmd_get_hw_spec_ap(hw);
3929 if (!rc)
3930 rc = mwl8k_cmd_set_hw_spec(hw);
3931
3932 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
3933 } else {
3934 rc = mwl8k_cmd_get_hw_spec_sta(hw);
3935
3936 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3937 }
3938 if (rc) {
3939 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3940 wiphy_name(hw->wiphy));
3941 goto err_free_irq;
3942 }
3943
3944 /* Turn radio off */
3945 rc = mwl8k_cmd_radio_disable(hw);
3946 if (rc) {
3947 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3948 goto err_free_irq;
3949 }
3950
3951 /* Clear MAC address */
3952 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3953 if (rc) {
3954 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3955 wiphy_name(hw->wiphy));
3956 goto err_free_irq;
3957 }
3958
3959 /* Disable interrupts */
3960 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3961 free_irq(priv->pdev->irq, hw);
3962
3963 rc = ieee80211_register_hw(hw);
3964 if (rc) {
3965 printk(KERN_ERR "%s: Cannot register device\n",
3966 wiphy_name(hw->wiphy));
3967 goto err_free_queues;
3968 }
3969
3970 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3971 wiphy_name(hw->wiphy), priv->device_info->part_name,
3972 priv->hw_rev, hw->wiphy->perm_addr,
3973 priv->ap_fw ? "AP" : "STA",
3974 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3975 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3976
3977 return 0;
3978
3979 err_free_irq:
3980 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3981 free_irq(priv->pdev->irq, hw);
3982
3983 err_free_queues:
3984 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3985 mwl8k_txq_deinit(hw, i);
3986 mwl8k_rxq_deinit(hw, 0);
3987
3988 err_free_cookie:
3989 if (priv->cookie != NULL)
3990 pci_free_consistent(priv->pdev, 4,
3991 priv->cookie, priv->cookie_dma);
3992
3993 err_stop_firmware:
3994 mwl8k_hw_reset(priv);
3995 mwl8k_release_firmware(priv);
3996
3997 err_iounmap:
3998 if (priv->regs != NULL)
3999 pci_iounmap(pdev, priv->regs);
4000
4001 if (priv->sram != NULL)
4002 pci_iounmap(pdev, priv->sram);
4003
4004 pci_set_drvdata(pdev, NULL);
4005 ieee80211_free_hw(hw);
4006
4007 err_free_reg:
4008 pci_release_regions(pdev);
4009
4010 err_disable_device:
4011 pci_disable_device(pdev);
4012
4013 return rc;
4014 }
4015
4016 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4017 {
4018 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4019 }
4020
4021 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4022 {
4023 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4024 struct mwl8k_priv *priv;
4025 int i;
4026
4027 if (hw == NULL)
4028 return;
4029 priv = hw->priv;
4030
4031 ieee80211_stop_queues(hw);
4032
4033 ieee80211_unregister_hw(hw);
4034
4035 /* Remove tx reclaim tasklet */
4036 tasklet_kill(&priv->poll_tx_task);
4037
4038 /* Stop hardware */
4039 mwl8k_hw_reset(priv);
4040
4041 /* Return all skbs to mac80211 */
4042 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4043 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4044
4045 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4046 mwl8k_txq_deinit(hw, i);
4047
4048 mwl8k_rxq_deinit(hw, 0);
4049
4050 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4051
4052 pci_iounmap(pdev, priv->regs);
4053 pci_iounmap(pdev, priv->sram);
4054 pci_set_drvdata(pdev, NULL);
4055 ieee80211_free_hw(hw);
4056 pci_release_regions(pdev);
4057 pci_disable_device(pdev);
4058 }
4059
4060 static struct pci_driver mwl8k_driver = {
4061 .name = MWL8K_NAME,
4062 .id_table = mwl8k_pci_id_table,
4063 .probe = mwl8k_probe,
4064 .remove = __devexit_p(mwl8k_remove),
4065 .shutdown = __devexit_p(mwl8k_shutdown),
4066 };
4067
4068 static int __init mwl8k_init(void)
4069 {
4070 return pci_register_driver(&mwl8k_driver);
4071 }
4072
4073 static void __exit mwl8k_exit(void)
4074 {
4075 pci_unregister_driver(&mwl8k_driver);
4076 }
4077
4078 module_init(mwl8k_init);
4079 module_exit(mwl8k_exit);
4080
4081 MODULE_DESCRIPTION(MWL8K_DESC);
4082 MODULE_VERSION(MWL8K_VERSION);
4083 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4084 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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