2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init
)(void *rxd
, dma_addr_t next_dma_addr
);
86 void (*rxd_refill
)(void *rxd
, dma_addr_t addr
, int len
);
87 int (*rxd_process
)(void *rxd
, struct ieee80211_rx_status
*status
);
90 struct mwl8k_device_info
{
94 struct rxd_ops
*rxd_ops
;
98 struct mwl8k_rx_queue
{
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma
)
115 struct mwl8k_tx_queue
{
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats
;
123 struct mwl8k_tx_desc
*txd
;
125 struct sk_buff
**skb
;
128 /* Pointers to the firmware data and meta information about it. */
129 struct mwl8k_firmware
{
130 /* Boot helper code */
131 struct firmware
*helper
;
134 struct firmware
*ucode
;
140 struct ieee80211_hw
*hw
;
142 struct pci_dev
*pdev
;
144 struct mwl8k_device_info
*device_info
;
146 struct rxd_ops
*rxd_ops
;
148 /* firmware files and meta data */
149 struct mwl8k_firmware fw
;
151 /* firmware access */
152 struct mutex fw_mutex
;
153 struct task_struct
*fw_mutex_owner
;
155 struct completion
*hostcmd_wait
;
157 /* lock held over TX and TX reap */
160 /* TX quiesce completion, protected by fw_mutex and tx_lock */
161 struct completion
*tx_wait
;
163 struct ieee80211_vif
*vif
;
165 struct ieee80211_channel
*current_channel
;
167 /* power management status cookie from firmware */
169 dma_addr_t cookie_dma
;
176 * Running count of TX packets in flight, to avoid
177 * iterating over the transmit rings each time.
181 struct mwl8k_rx_queue rxq
[MWL8K_RX_QUEUES
];
182 struct mwl8k_tx_queue txq
[MWL8K_TX_QUEUES
];
185 struct ieee80211_supported_band band
;
186 struct ieee80211_channel channels
[14];
187 struct ieee80211_rate rates
[13];
190 bool radio_short_preamble
;
191 bool sniffer_enabled
;
194 /* XXX need to convert this to handle multiple interfaces */
196 u8 capture_bssid
[ETH_ALEN
];
197 struct sk_buff
*beacon_skb
;
200 * This FJ worker has to be global as it is scheduled from the
201 * RX handler. At this point we don't know which interface it
202 * belongs to until the list of bssids waiting to complete join
205 struct work_struct finalize_join_worker
;
207 /* Tasklet to reclaim TX descriptors and buffers after tx */
208 struct tasklet_struct tx_reclaim_task
;
211 /* Per interface specific private data */
213 /* backpointer to parent config block */
214 struct mwl8k_priv
*priv
;
216 /* BSS config of AP or IBSS from mac80211*/
217 struct ieee80211_bss_conf bss_info
;
219 /* BSSID of AP or IBSS */
221 u8 mac_addr
[ETH_ALEN
];
224 * Subset of supported legacy rates.
225 * Intersection of AP and STA supported rates.
227 struct ieee80211_rate legacy_rates
[13];
229 /* number of supported legacy rates */
232 /* Index into station database.Returned by update_sta_db call */
235 /* Non AMPDU sequence number assigned by driver */
239 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
241 static const struct ieee80211_channel mwl8k_channels
[] = {
242 { .center_freq
= 2412, .hw_value
= 1, },
243 { .center_freq
= 2417, .hw_value
= 2, },
244 { .center_freq
= 2422, .hw_value
= 3, },
245 { .center_freq
= 2427, .hw_value
= 4, },
246 { .center_freq
= 2432, .hw_value
= 5, },
247 { .center_freq
= 2437, .hw_value
= 6, },
248 { .center_freq
= 2442, .hw_value
= 7, },
249 { .center_freq
= 2447, .hw_value
= 8, },
250 { .center_freq
= 2452, .hw_value
= 9, },
251 { .center_freq
= 2457, .hw_value
= 10, },
252 { .center_freq
= 2462, .hw_value
= 11, },
255 static const struct ieee80211_rate mwl8k_rates
[] = {
256 { .bitrate
= 10, .hw_value
= 2, },
257 { .bitrate
= 20, .hw_value
= 4, },
258 { .bitrate
= 55, .hw_value
= 11, },
259 { .bitrate
= 110, .hw_value
= 22, },
260 { .bitrate
= 220, .hw_value
= 44, },
261 { .bitrate
= 60, .hw_value
= 12, },
262 { .bitrate
= 90, .hw_value
= 18, },
263 { .bitrate
= 120, .hw_value
= 24, },
264 { .bitrate
= 180, .hw_value
= 36, },
265 { .bitrate
= 240, .hw_value
= 48, },
266 { .bitrate
= 360, .hw_value
= 72, },
267 { .bitrate
= 480, .hw_value
= 96, },
268 { .bitrate
= 540, .hw_value
= 108, },
271 /* Set or get info from Firmware */
272 #define MWL8K_CMD_SET 0x0001
273 #define MWL8K_CMD_GET 0x0000
275 /* Firmware command codes */
276 #define MWL8K_CMD_CODE_DNLD 0x0001
277 #define MWL8K_CMD_GET_HW_SPEC 0x0003
278 #define MWL8K_CMD_SET_HW_SPEC 0x0004
279 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
280 #define MWL8K_CMD_GET_STAT 0x0014
281 #define MWL8K_CMD_RADIO_CONTROL 0x001c
282 #define MWL8K_CMD_RF_TX_POWER 0x001e
283 #define MWL8K_CMD_RF_ANTENNA 0x0020
284 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
285 #define MWL8K_CMD_SET_POST_SCAN 0x0108
286 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
287 #define MWL8K_CMD_SET_AID 0x010d
288 #define MWL8K_CMD_SET_RATE 0x0110
289 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
290 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
291 #define MWL8K_CMD_SET_SLOT 0x0114
292 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
293 #define MWL8K_CMD_SET_WMM_MODE 0x0123
294 #define MWL8K_CMD_MIMO_CONFIG 0x0125
295 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
296 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
297 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
298 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
299 #define MWL8K_CMD_UPDATE_STADB 0x1123
301 static const char *mwl8k_cmd_name(u16 cmd
, char *buf
, int bufsize
)
303 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
304 snprintf(buf, bufsize, "%s", #x);\
307 switch (cmd
& ~0x8000) {
308 MWL8K_CMDNAME(CODE_DNLD
);
309 MWL8K_CMDNAME(GET_HW_SPEC
);
310 MWL8K_CMDNAME(SET_HW_SPEC
);
311 MWL8K_CMDNAME(MAC_MULTICAST_ADR
);
312 MWL8K_CMDNAME(GET_STAT
);
313 MWL8K_CMDNAME(RADIO_CONTROL
);
314 MWL8K_CMDNAME(RF_TX_POWER
);
315 MWL8K_CMDNAME(RF_ANTENNA
);
316 MWL8K_CMDNAME(SET_PRE_SCAN
);
317 MWL8K_CMDNAME(SET_POST_SCAN
);
318 MWL8K_CMDNAME(SET_RF_CHANNEL
);
319 MWL8K_CMDNAME(SET_AID
);
320 MWL8K_CMDNAME(SET_RATE
);
321 MWL8K_CMDNAME(SET_FINALIZE_JOIN
);
322 MWL8K_CMDNAME(RTS_THRESHOLD
);
323 MWL8K_CMDNAME(SET_SLOT
);
324 MWL8K_CMDNAME(SET_EDCA_PARAMS
);
325 MWL8K_CMDNAME(SET_WMM_MODE
);
326 MWL8K_CMDNAME(MIMO_CONFIG
);
327 MWL8K_CMDNAME(USE_FIXED_RATE
);
328 MWL8K_CMDNAME(ENABLE_SNIFFER
);
329 MWL8K_CMDNAME(SET_MAC_ADDR
);
330 MWL8K_CMDNAME(SET_RATEADAPT_MODE
);
331 MWL8K_CMDNAME(UPDATE_STADB
);
333 snprintf(buf
, bufsize
, "0x%x", cmd
);
340 /* Hardware and firmware reset */
341 static void mwl8k_hw_reset(struct mwl8k_priv
*priv
)
343 iowrite32(MWL8K_H2A_INT_RESET
,
344 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
345 iowrite32(MWL8K_H2A_INT_RESET
,
346 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
350 /* Release fw image */
351 static void mwl8k_release_fw(struct firmware
**fw
)
355 release_firmware(*fw
);
359 static void mwl8k_release_firmware(struct mwl8k_priv
*priv
)
361 mwl8k_release_fw(&priv
->fw
.ucode
);
362 mwl8k_release_fw(&priv
->fw
.helper
);
365 /* Request fw image */
366 static int mwl8k_request_fw(struct mwl8k_priv
*priv
,
367 const char *fname
, struct firmware
**fw
)
369 /* release current image */
371 mwl8k_release_fw(fw
);
373 return request_firmware((const struct firmware
**)fw
,
374 fname
, &priv
->pdev
->dev
);
377 static int mwl8k_request_firmware(struct mwl8k_priv
*priv
)
379 struct mwl8k_device_info
*di
= priv
->device_info
;
382 if (di
->helper_image
!= NULL
) {
383 rc
= mwl8k_request_fw(priv
, di
->helper_image
, &priv
->fw
.helper
);
385 printk(KERN_ERR
"%s: Error requesting helper "
386 "firmware file %s\n", pci_name(priv
->pdev
),
392 rc
= mwl8k_request_fw(priv
, di
->fw_image
, &priv
->fw
.ucode
);
394 printk(KERN_ERR
"%s: Error requesting firmware file %s\n",
395 pci_name(priv
->pdev
), di
->fw_image
);
396 mwl8k_release_fw(&priv
->fw
.helper
);
403 struct mwl8k_cmd_pkt
{
409 } __attribute__((packed
));
415 mwl8k_send_fw_load_cmd(struct mwl8k_priv
*priv
, void *data
, int length
)
417 void __iomem
*regs
= priv
->regs
;
421 dma_addr
= pci_map_single(priv
->pdev
, data
, length
, PCI_DMA_TODEVICE
);
422 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
425 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
426 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
427 iowrite32(MWL8K_H2A_INT_DOORBELL
,
428 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
429 iowrite32(MWL8K_H2A_INT_DUMMY
,
430 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
436 int_code
= ioread32(regs
+ MWL8K_HIU_INT_CODE
);
437 if (int_code
== MWL8K_INT_CODE_CMD_FINISHED
) {
438 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
446 pci_unmap_single(priv
->pdev
, dma_addr
, length
, PCI_DMA_TODEVICE
);
448 return loops
? 0 : -ETIMEDOUT
;
451 static int mwl8k_load_fw_image(struct mwl8k_priv
*priv
,
452 const u8
*data
, size_t length
)
454 struct mwl8k_cmd_pkt
*cmd
;
458 cmd
= kmalloc(sizeof(*cmd
) + 256, GFP_KERNEL
);
462 cmd
->code
= cpu_to_le16(MWL8K_CMD_CODE_DNLD
);
468 int block_size
= length
> 256 ? 256 : length
;
470 memcpy(cmd
->payload
, data
+ done
, block_size
);
471 cmd
->length
= cpu_to_le16(block_size
);
473 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
,
474 sizeof(*cmd
) + block_size
);
479 length
-= block_size
;
484 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
, sizeof(*cmd
));
492 static int mwl8k_feed_fw_image(struct mwl8k_priv
*priv
,
493 const u8
*data
, size_t length
)
495 unsigned char *buffer
;
496 int may_continue
, rc
= 0;
497 u32 done
, prev_block_size
;
499 buffer
= kmalloc(1024, GFP_KERNEL
);
506 while (may_continue
> 0) {
509 block_size
= ioread32(priv
->regs
+ MWL8K_HIU_SCRATCH
);
510 if (block_size
& 1) {
514 done
+= prev_block_size
;
515 length
-= prev_block_size
;
518 if (block_size
> 1024 || block_size
> length
) {
528 if (block_size
== 0) {
535 prev_block_size
= block_size
;
536 memcpy(buffer
, data
+ done
, block_size
);
538 rc
= mwl8k_send_fw_load_cmd(priv
, buffer
, block_size
);
543 if (!rc
&& length
!= 0)
551 static int mwl8k_load_firmware(struct ieee80211_hw
*hw
)
553 struct mwl8k_priv
*priv
= hw
->priv
;
554 struct firmware
*fw
= priv
->fw
.ucode
;
555 struct mwl8k_device_info
*di
= priv
->device_info
;
559 if (!memcmp(fw
->data
, "\x01\x00\x00\x00", 4)) {
560 struct firmware
*helper
= priv
->fw
.helper
;
562 if (helper
== NULL
) {
563 printk(KERN_ERR
"%s: helper image needed but none "
564 "given\n", pci_name(priv
->pdev
));
568 rc
= mwl8k_load_fw_image(priv
, helper
->data
, helper
->size
);
570 printk(KERN_ERR
"%s: unable to load firmware "
571 "helper image\n", pci_name(priv
->pdev
));
576 rc
= mwl8k_feed_fw_image(priv
, fw
->data
, fw
->size
);
578 rc
= mwl8k_load_fw_image(priv
, fw
->data
, fw
->size
);
582 printk(KERN_ERR
"%s: unable to load firmware image\n",
583 pci_name(priv
->pdev
));
587 if (di
->modes
& BIT(NL80211_IFTYPE_AP
))
588 iowrite32(MWL8K_MODE_AP
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
590 iowrite32(MWL8K_MODE_STA
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
597 ready_code
= ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
598 if (ready_code
== MWL8K_FWAP_READY
) {
601 } else if (ready_code
== MWL8K_FWSTA_READY
) {
610 return loops
? 0 : -ETIMEDOUT
;
615 * Defines shared between transmission and reception.
617 /* HT control fields for firmware */
622 } __attribute__((packed
));
624 /* Firmware Station database operations */
625 #define MWL8K_STA_DB_ADD_ENTRY 0
626 #define MWL8K_STA_DB_MODIFY_ENTRY 1
627 #define MWL8K_STA_DB_DEL_ENTRY 2
628 #define MWL8K_STA_DB_FLUSH 3
630 /* Peer Entry flags - used to define the type of the peer node */
631 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
633 #define MWL8K_IEEE_LEGACY_DATA_RATES 13
634 #define MWL8K_MCS_BITMAP_SIZE 16
636 struct peer_capability_info
{
637 /* Peer type - AP vs. STA. */
640 /* Basic 802.11 capabilities from assoc resp. */
643 /* Set if peer supports 802.11n high throughput (HT). */
646 /* Valid if HT is supported. */
648 __u8 extended_ht_caps
;
649 struct ewc_ht_info ewc_info
;
651 /* Legacy rate table. Intersection of our rates and peer rates. */
652 __u8 legacy_rates
[MWL8K_IEEE_LEGACY_DATA_RATES
];
654 /* HT rate table. Intersection of our rates and peer rates. */
655 __u8 ht_rates
[MWL8K_MCS_BITMAP_SIZE
];
658 /* If set, interoperability mode, no proprietary extensions. */
662 __le16 amsdu_enabled
;
663 } __attribute__((packed
));
665 /* Inline functions to manipulate QoS field in data descriptor. */
666 static inline u16
mwl8k_qos_setbit_eosp(u16 qos
)
668 u16 val_mask
= 1 << 4;
670 /* End of Service Period Bit 4 */
671 return qos
| val_mask
;
674 static inline u16
mwl8k_qos_setbit_ack(u16 qos
, u8 ack_policy
)
678 u16 qos_mask
= ~(val_mask
<< shift
);
680 /* Ack Policy Bit 5-6 */
681 return (qos
& qos_mask
) | ((ack_policy
& val_mask
) << shift
);
684 static inline u16
mwl8k_qos_setbit_amsdu(u16 qos
)
686 u16 val_mask
= 1 << 7;
688 /* AMSDU present Bit 7 */
689 return qos
| val_mask
;
692 static inline u16
mwl8k_qos_setbit_qlen(u16 qos
, u8 len
)
696 u16 qos_mask
= ~(val_mask
<< shift
);
698 /* Queue Length Bits 8-15 */
699 return (qos
& qos_mask
) | ((len
& val_mask
) << shift
);
702 /* DMA header used by firmware and hardware. */
703 struct mwl8k_dma_data
{
705 struct ieee80211_hdr wh
;
706 } __attribute__((packed
));
708 /* Routines to add/remove DMA header from skb. */
709 static inline void mwl8k_remove_dma_header(struct sk_buff
*skb
)
711 struct mwl8k_dma_data
*tr
= (struct mwl8k_dma_data
*)skb
->data
;
712 void *dst
, *src
= &tr
->wh
;
713 int hdrlen
= ieee80211_hdrlen(tr
->wh
.frame_control
);
714 u16 space
= sizeof(struct mwl8k_dma_data
) - hdrlen
;
716 dst
= (void *)tr
+ space
;
718 memmove(dst
, src
, hdrlen
);
719 skb_pull(skb
, space
);
723 static inline void mwl8k_add_dma_header(struct sk_buff
*skb
)
725 struct ieee80211_hdr
*wh
;
727 struct mwl8k_dma_data
*tr
;
729 wh
= (struct ieee80211_hdr
*)skb
->data
;
730 hdrlen
= ieee80211_hdrlen(wh
->frame_control
);
734 * Copy up/down the 802.11 header; the firmware requires
735 * we present a 2-byte payload length followed by a
736 * 4-address header (w/o QoS), followed (optionally) by
737 * any WEP/ExtIV header (but only filled in for CCMP).
739 if (hdrlen
!= sizeof(struct mwl8k_dma_data
))
740 skb_push(skb
, sizeof(struct mwl8k_dma_data
) - hdrlen
);
742 tr
= (struct mwl8k_dma_data
*)skb
->data
;
744 memmove(&tr
->wh
, wh
, hdrlen
);
747 memset(tr
->wh
.addr4
, 0, ETH_ALEN
);
750 * Firmware length is the length of the fully formed "802.11
751 * payload". That is, everything except for the 802.11 header.
752 * This includes all crypto material including the MIC.
754 tr
->fwlen
= cpu_to_le16(pktlen
- hdrlen
);
759 * Packet reception for 88w8366.
761 struct mwl8k_rxd_8366
{
765 __le32 pkt_phys_addr
;
766 __le32 next_rxd_phys_addr
;
770 __le32 hw_noise_floor_info
;
777 } __attribute__((packed
));
779 #define MWL8K_8366_RX_CTRL_OWNED_BY_HOST 0x80
781 static void mwl8k_rxd_8366_init(void *_rxd
, dma_addr_t next_dma_addr
)
783 struct mwl8k_rxd_8366
*rxd
= _rxd
;
785 rxd
->next_rxd_phys_addr
= cpu_to_le32(next_dma_addr
);
786 rxd
->rx_ctrl
= MWL8K_8366_RX_CTRL_OWNED_BY_HOST
;
789 static void mwl8k_rxd_8366_refill(void *_rxd
, dma_addr_t addr
, int len
)
791 struct mwl8k_rxd_8366
*rxd
= _rxd
;
793 rxd
->pkt_len
= cpu_to_le16(len
);
794 rxd
->pkt_phys_addr
= cpu_to_le32(addr
);
800 mwl8k_rxd_8366_process(void *_rxd
, struct ieee80211_rx_status
*status
)
802 struct mwl8k_rxd_8366
*rxd
= _rxd
;
804 if (!(rxd
->rx_ctrl
& MWL8K_8366_RX_CTRL_OWNED_BY_HOST
))
808 memset(status
, 0, sizeof(*status
));
810 status
->signal
= -rxd
->rssi
;
811 status
->noise
= -rxd
->noise_floor
;
813 if (rxd
->rate
& 0x80) {
814 status
->flag
|= RX_FLAG_HT
;
815 status
->rate_idx
= rxd
->rate
& 0x7f;
819 for (i
= 0; i
< ARRAY_SIZE(mwl8k_rates
); i
++) {
820 if (mwl8k_rates
[i
].hw_value
== rxd
->rate
) {
821 status
->rate_idx
= i
;
827 status
->band
= IEEE80211_BAND_2GHZ
;
828 status
->freq
= ieee80211_channel_to_frequency(rxd
->channel
);
830 return le16_to_cpu(rxd
->pkt_len
);
833 static struct rxd_ops rxd_8366_ops
= {
834 .rxd_size
= sizeof(struct mwl8k_rxd_8366
),
835 .rxd_init
= mwl8k_rxd_8366_init
,
836 .rxd_refill
= mwl8k_rxd_8366_refill
,
837 .rxd_process
= mwl8k_rxd_8366_process
,
841 * Packet reception for 88w8687.
843 struct mwl8k_rxd_8687
{
847 __le32 pkt_phys_addr
;
848 __le32 next_rxd_phys_addr
;
858 } __attribute__((packed
));
860 #define MWL8K_8687_RATE_INFO_SHORTPRE 0x8000
861 #define MWL8K_8687_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
862 #define MWL8K_8687_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
863 #define MWL8K_8687_RATE_INFO_40MHZ 0x0004
864 #define MWL8K_8687_RATE_INFO_SHORTGI 0x0002
865 #define MWL8K_8687_RATE_INFO_MCS_FORMAT 0x0001
867 #define MWL8K_8687_RX_CTRL_OWNED_BY_HOST 0x02
869 static void mwl8k_rxd_8687_init(void *_rxd
, dma_addr_t next_dma_addr
)
871 struct mwl8k_rxd_8687
*rxd
= _rxd
;
873 rxd
->next_rxd_phys_addr
= cpu_to_le32(next_dma_addr
);
874 rxd
->rx_ctrl
= MWL8K_8687_RX_CTRL_OWNED_BY_HOST
;
877 static void mwl8k_rxd_8687_refill(void *_rxd
, dma_addr_t addr
, int len
)
879 struct mwl8k_rxd_8687
*rxd
= _rxd
;
881 rxd
->pkt_len
= cpu_to_le16(len
);
882 rxd
->pkt_phys_addr
= cpu_to_le32(addr
);
888 mwl8k_rxd_8687_process(void *_rxd
, struct ieee80211_rx_status
*status
)
890 struct mwl8k_rxd_8687
*rxd
= _rxd
;
893 if (!(rxd
->rx_ctrl
& MWL8K_8687_RX_CTRL_OWNED_BY_HOST
))
897 rate_info
= le16_to_cpu(rxd
->rate_info
);
899 memset(status
, 0, sizeof(*status
));
901 status
->signal
= -rxd
->rssi
;
902 status
->noise
= -rxd
->noise_level
;
903 status
->qual
= rxd
->link_quality
;
904 status
->antenna
= MWL8K_8687_RATE_INFO_ANTSELECT(rate_info
);
905 status
->rate_idx
= MWL8K_8687_RATE_INFO_RATEID(rate_info
);
907 if (rate_info
& MWL8K_8687_RATE_INFO_SHORTPRE
)
908 status
->flag
|= RX_FLAG_SHORTPRE
;
909 if (rate_info
& MWL8K_8687_RATE_INFO_40MHZ
)
910 status
->flag
|= RX_FLAG_40MHZ
;
911 if (rate_info
& MWL8K_8687_RATE_INFO_SHORTGI
)
912 status
->flag
|= RX_FLAG_SHORT_GI
;
913 if (rate_info
& MWL8K_8687_RATE_INFO_MCS_FORMAT
)
914 status
->flag
|= RX_FLAG_HT
;
916 status
->band
= IEEE80211_BAND_2GHZ
;
917 status
->freq
= ieee80211_channel_to_frequency(rxd
->channel
);
919 return le16_to_cpu(rxd
->pkt_len
);
922 static struct rxd_ops rxd_8687_ops
= {
923 .rxd_size
= sizeof(struct mwl8k_rxd_8687
),
924 .rxd_init
= mwl8k_rxd_8687_init
,
925 .rxd_refill
= mwl8k_rxd_8687_refill
,
926 .rxd_process
= mwl8k_rxd_8687_process
,
930 #define MWL8K_RX_DESCS 256
931 #define MWL8K_RX_MAXSZ 3800
933 static int mwl8k_rxq_init(struct ieee80211_hw
*hw
, int index
)
935 struct mwl8k_priv
*priv
= hw
->priv
;
936 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
944 size
= MWL8K_RX_DESCS
* priv
->rxd_ops
->rxd_size
;
946 rxq
->rxd
= pci_alloc_consistent(priv
->pdev
, size
, &rxq
->rxd_dma
);
947 if (rxq
->rxd
== NULL
) {
948 printk(KERN_ERR
"%s: failed to alloc RX descriptors\n",
949 wiphy_name(hw
->wiphy
));
952 memset(rxq
->rxd
, 0, size
);
954 rxq
->buf
= kmalloc(MWL8K_RX_DESCS
* sizeof(*rxq
->buf
), GFP_KERNEL
);
955 if (rxq
->buf
== NULL
) {
956 printk(KERN_ERR
"%s: failed to alloc RX skbuff list\n",
957 wiphy_name(hw
->wiphy
));
958 pci_free_consistent(priv
->pdev
, size
, rxq
->rxd
, rxq
->rxd_dma
);
961 memset(rxq
->buf
, 0, MWL8K_RX_DESCS
* sizeof(*rxq
->buf
));
963 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
967 dma_addr_t next_dma_addr
;
969 desc_size
= priv
->rxd_ops
->rxd_size
;
970 rxd
= rxq
->rxd
+ (i
* priv
->rxd_ops
->rxd_size
);
973 if (nexti
== MWL8K_RX_DESCS
)
975 next_dma_addr
= rxq
->rxd_dma
+ (nexti
* desc_size
);
977 priv
->rxd_ops
->rxd_init(rxd
, next_dma_addr
);
983 static int rxq_refill(struct ieee80211_hw
*hw
, int index
, int limit
)
985 struct mwl8k_priv
*priv
= hw
->priv
;
986 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
990 while (rxq
->rxd_count
< MWL8K_RX_DESCS
&& limit
--) {
996 skb
= dev_alloc_skb(MWL8K_RX_MAXSZ
);
1000 addr
= pci_map_single(priv
->pdev
, skb
->data
,
1001 MWL8K_RX_MAXSZ
, DMA_FROM_DEVICE
);
1005 if (rxq
->tail
== MWL8K_RX_DESCS
)
1007 rxq
->buf
[rx
].skb
= skb
;
1008 pci_unmap_addr_set(&rxq
->buf
[rx
], dma
, addr
);
1010 rxd
= rxq
->rxd
+ (rx
* priv
->rxd_ops
->rxd_size
);
1011 priv
->rxd_ops
->rxd_refill(rxd
, addr
, MWL8K_RX_MAXSZ
);
1019 /* Must be called only when the card's reception is completely halted */
1020 static void mwl8k_rxq_deinit(struct ieee80211_hw
*hw
, int index
)
1022 struct mwl8k_priv
*priv
= hw
->priv
;
1023 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
1026 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
1027 if (rxq
->buf
[i
].skb
!= NULL
) {
1028 pci_unmap_single(priv
->pdev
,
1029 pci_unmap_addr(&rxq
->buf
[i
], dma
),
1030 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
1031 pci_unmap_addr_set(&rxq
->buf
[i
], dma
, 0);
1033 kfree_skb(rxq
->buf
[i
].skb
);
1034 rxq
->buf
[i
].skb
= NULL
;
1041 pci_free_consistent(priv
->pdev
,
1042 MWL8K_RX_DESCS
* priv
->rxd_ops
->rxd_size
,
1043 rxq
->rxd
, rxq
->rxd_dma
);
1049 * Scan a list of BSSIDs to process for finalize join.
1050 * Allows for extension to process multiple BSSIDs.
1053 mwl8k_capture_bssid(struct mwl8k_priv
*priv
, struct ieee80211_hdr
*wh
)
1055 return priv
->capture_beacon
&&
1056 ieee80211_is_beacon(wh
->frame_control
) &&
1057 !compare_ether_addr(wh
->addr3
, priv
->capture_bssid
);
1060 static inline void mwl8k_save_beacon(struct ieee80211_hw
*hw
,
1061 struct sk_buff
*skb
)
1063 struct mwl8k_priv
*priv
= hw
->priv
;
1065 priv
->capture_beacon
= false;
1066 memset(priv
->capture_bssid
, 0, ETH_ALEN
);
1069 * Use GFP_ATOMIC as rxq_process is called from
1070 * the primary interrupt handler, memory allocation call
1073 priv
->beacon_skb
= skb_copy(skb
, GFP_ATOMIC
);
1074 if (priv
->beacon_skb
!= NULL
)
1075 ieee80211_queue_work(hw
, &priv
->finalize_join_worker
);
1078 static int rxq_process(struct ieee80211_hw
*hw
, int index
, int limit
)
1080 struct mwl8k_priv
*priv
= hw
->priv
;
1081 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
1085 while (rxq
->rxd_count
&& limit
--) {
1086 struct sk_buff
*skb
;
1089 struct ieee80211_rx_status status
;
1091 skb
= rxq
->buf
[rxq
->head
].skb
;
1095 rxd
= rxq
->rxd
+ (rxq
->head
* priv
->rxd_ops
->rxd_size
);
1097 pkt_len
= priv
->rxd_ops
->rxd_process(rxd
, &status
);
1101 rxq
->buf
[rxq
->head
].skb
= NULL
;
1103 pci_unmap_single(priv
->pdev
,
1104 pci_unmap_addr(&rxq
->buf
[rxq
->head
], dma
),
1105 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
1106 pci_unmap_addr_set(&rxq
->buf
[rxq
->head
], dma
, 0);
1109 if (rxq
->head
== MWL8K_RX_DESCS
)
1114 skb_put(skb
, pkt_len
);
1115 mwl8k_remove_dma_header(skb
);
1118 * Check for a pending join operation. Save a
1119 * copy of the beacon and schedule a tasklet to
1120 * send a FINALIZE_JOIN command to the firmware.
1122 if (mwl8k_capture_bssid(priv
, (void *)skb
->data
))
1123 mwl8k_save_beacon(hw
, skb
);
1125 memcpy(IEEE80211_SKB_RXCB(skb
), &status
, sizeof(status
));
1126 ieee80211_rx_irqsafe(hw
, skb
);
1136 * Packet transmission.
1139 /* Transmit packet ACK policy */
1140 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1141 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1143 #define MWL8K_TXD_STATUS_OK 0x00000001
1144 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1145 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1146 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1147 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1149 struct mwl8k_tx_desc
{
1154 __le32 pkt_phys_addr
;
1156 __u8 dest_MAC_addr
[ETH_ALEN
];
1157 __le32 next_txd_phys_addr
;
1162 } __attribute__((packed
));
1164 #define MWL8K_TX_DESCS 128
1166 static int mwl8k_txq_init(struct ieee80211_hw
*hw
, int index
)
1168 struct mwl8k_priv
*priv
= hw
->priv
;
1169 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1173 memset(&txq
->stats
, 0, sizeof(struct ieee80211_tx_queue_stats
));
1174 txq
->stats
.limit
= MWL8K_TX_DESCS
;
1178 size
= MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
);
1180 txq
->txd
= pci_alloc_consistent(priv
->pdev
, size
, &txq
->txd_dma
);
1181 if (txq
->txd
== NULL
) {
1182 printk(KERN_ERR
"%s: failed to alloc TX descriptors\n",
1183 wiphy_name(hw
->wiphy
));
1186 memset(txq
->txd
, 0, size
);
1188 txq
->skb
= kmalloc(MWL8K_TX_DESCS
* sizeof(*txq
->skb
), GFP_KERNEL
);
1189 if (txq
->skb
== NULL
) {
1190 printk(KERN_ERR
"%s: failed to alloc TX skbuff list\n",
1191 wiphy_name(hw
->wiphy
));
1192 pci_free_consistent(priv
->pdev
, size
, txq
->txd
, txq
->txd_dma
);
1195 memset(txq
->skb
, 0, MWL8K_TX_DESCS
* sizeof(*txq
->skb
));
1197 for (i
= 0; i
< MWL8K_TX_DESCS
; i
++) {
1198 struct mwl8k_tx_desc
*tx_desc
;
1201 tx_desc
= txq
->txd
+ i
;
1202 nexti
= (i
+ 1) % MWL8K_TX_DESCS
;
1204 tx_desc
->status
= 0;
1205 tx_desc
->next_txd_phys_addr
=
1206 cpu_to_le32(txq
->txd_dma
+ nexti
* sizeof(*tx_desc
));
1212 static inline void mwl8k_tx_start(struct mwl8k_priv
*priv
)
1214 iowrite32(MWL8K_H2A_INT_PPA_READY
,
1215 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1216 iowrite32(MWL8K_H2A_INT_DUMMY
,
1217 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1218 ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
1221 struct mwl8k_txq_info
{
1230 static int mwl8k_scan_tx_ring(struct mwl8k_priv
*priv
,
1231 struct mwl8k_txq_info
*txinfo
)
1233 int count
, desc
, status
;
1234 struct mwl8k_tx_queue
*txq
;
1235 struct mwl8k_tx_desc
*tx_desc
;
1238 memset(txinfo
, 0, MWL8K_TX_QUEUES
* sizeof(struct mwl8k_txq_info
));
1240 for (count
= 0; count
< MWL8K_TX_QUEUES
; count
++) {
1241 txq
= priv
->txq
+ count
;
1242 txinfo
[count
].len
= txq
->stats
.len
;
1243 txinfo
[count
].head
= txq
->head
;
1244 txinfo
[count
].tail
= txq
->tail
;
1245 for (desc
= 0; desc
< MWL8K_TX_DESCS
; desc
++) {
1246 tx_desc
= txq
->txd
+ desc
;
1247 status
= le32_to_cpu(tx_desc
->status
);
1249 if (status
& MWL8K_TXD_STATUS_FW_OWNED
)
1250 txinfo
[count
].fw_owned
++;
1252 txinfo
[count
].drv_owned
++;
1254 if (tx_desc
->pkt_len
== 0)
1255 txinfo
[count
].unused
++;
1263 * Must be called with priv->fw_mutex held and tx queues stopped.
1265 static int mwl8k_tx_wait_empty(struct ieee80211_hw
*hw
)
1267 struct mwl8k_priv
*priv
= hw
->priv
;
1268 DECLARE_COMPLETION_ONSTACK(tx_wait
);
1270 unsigned long timeout
;
1274 spin_lock_bh(&priv
->tx_lock
);
1275 count
= priv
->pending_tx_pkts
;
1277 priv
->tx_wait
= &tx_wait
;
1278 spin_unlock_bh(&priv
->tx_lock
);
1281 struct mwl8k_txq_info txinfo
[MWL8K_TX_QUEUES
];
1285 timeout
= wait_for_completion_timeout(&tx_wait
,
1286 msecs_to_jiffies(5000));
1290 spin_lock_bh(&priv
->tx_lock
);
1291 priv
->tx_wait
= NULL
;
1292 newcount
= priv
->pending_tx_pkts
;
1293 mwl8k_scan_tx_ring(priv
, txinfo
);
1294 spin_unlock_bh(&priv
->tx_lock
);
1296 printk(KERN_ERR
"%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1297 __func__
, __LINE__
, count
, newcount
);
1299 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++)
1300 printk(KERN_ERR
"TXQ:%u L:%u H:%u T:%u FW:%u "
1306 txinfo
[index
].fw_owned
,
1307 txinfo
[index
].drv_owned
,
1308 txinfo
[index
].unused
);
1316 #define MWL8K_TXD_SUCCESS(status) \
1317 ((status) & (MWL8K_TXD_STATUS_OK | \
1318 MWL8K_TXD_STATUS_OK_RETRY | \
1319 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1321 static void mwl8k_txq_reclaim(struct ieee80211_hw
*hw
, int index
, int force
)
1323 struct mwl8k_priv
*priv
= hw
->priv
;
1324 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1327 while (txq
->stats
.len
> 0) {
1329 struct mwl8k_tx_desc
*tx_desc
;
1332 struct sk_buff
*skb
;
1333 struct ieee80211_tx_info
*info
;
1337 tx_desc
= txq
->txd
+ tx
;
1339 status
= le32_to_cpu(tx_desc
->status
);
1341 if (status
& MWL8K_TXD_STATUS_FW_OWNED
) {
1345 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
);
1348 txq
->head
= (tx
+ 1) % MWL8K_TX_DESCS
;
1349 BUG_ON(txq
->stats
.len
== 0);
1351 priv
->pending_tx_pkts
--;
1353 addr
= le32_to_cpu(tx_desc
->pkt_phys_addr
);
1354 size
= le16_to_cpu(tx_desc
->pkt_len
);
1356 txq
->skb
[tx
] = NULL
;
1358 BUG_ON(skb
== NULL
);
1359 pci_unmap_single(priv
->pdev
, addr
, size
, PCI_DMA_TODEVICE
);
1361 mwl8k_remove_dma_header(skb
);
1363 /* Mark descriptor as unused */
1364 tx_desc
->pkt_phys_addr
= 0;
1365 tx_desc
->pkt_len
= 0;
1367 info
= IEEE80211_SKB_CB(skb
);
1368 ieee80211_tx_info_clear_status(info
);
1369 if (MWL8K_TXD_SUCCESS(status
))
1370 info
->flags
|= IEEE80211_TX_STAT_ACK
;
1372 ieee80211_tx_status_irqsafe(hw
, skb
);
1377 if (wake
&& priv
->radio_on
&& !mutex_is_locked(&priv
->fw_mutex
))
1378 ieee80211_wake_queue(hw
, index
);
1381 /* must be called only when the card's transmit is completely halted */
1382 static void mwl8k_txq_deinit(struct ieee80211_hw
*hw
, int index
)
1384 struct mwl8k_priv
*priv
= hw
->priv
;
1385 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1387 mwl8k_txq_reclaim(hw
, index
, 1);
1392 pci_free_consistent(priv
->pdev
,
1393 MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
),
1394 txq
->txd
, txq
->txd_dma
);
1399 mwl8k_txq_xmit(struct ieee80211_hw
*hw
, int index
, struct sk_buff
*skb
)
1401 struct mwl8k_priv
*priv
= hw
->priv
;
1402 struct ieee80211_tx_info
*tx_info
;
1403 struct mwl8k_vif
*mwl8k_vif
;
1404 struct ieee80211_hdr
*wh
;
1405 struct mwl8k_tx_queue
*txq
;
1406 struct mwl8k_tx_desc
*tx
;
1412 wh
= (struct ieee80211_hdr
*)skb
->data
;
1413 if (ieee80211_is_data_qos(wh
->frame_control
))
1414 qos
= le16_to_cpu(*((__le16
*)ieee80211_get_qos_ctl(wh
)));
1418 mwl8k_add_dma_header(skb
);
1419 wh
= &((struct mwl8k_dma_data
*)skb
->data
)->wh
;
1421 tx_info
= IEEE80211_SKB_CB(skb
);
1422 mwl8k_vif
= MWL8K_VIF(tx_info
->control
.vif
);
1424 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
1425 u16 seqno
= mwl8k_vif
->seqno
;
1427 wh
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
1428 wh
->seq_ctrl
|= cpu_to_le16(seqno
<< 4);
1429 mwl8k_vif
->seqno
= seqno
++ % 4096;
1432 /* Setup firmware control bit fields for each frame type. */
1435 if (ieee80211_is_mgmt(wh
->frame_control
) ||
1436 ieee80211_is_ctl(wh
->frame_control
)) {
1438 qos
= mwl8k_qos_setbit_eosp(qos
);
1439 /* Set Queue size to unspecified */
1440 qos
= mwl8k_qos_setbit_qlen(qos
, 0xff);
1441 } else if (ieee80211_is_data(wh
->frame_control
)) {
1443 if (is_multicast_ether_addr(wh
->addr1
))
1444 txstatus
|= MWL8K_TXD_STATUS_MULTICAST_TX
;
1446 /* Send pkt in an aggregate if AMPDU frame. */
1447 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1448 qos
= mwl8k_qos_setbit_ack(qos
,
1449 MWL8K_TXD_ACK_POLICY_BLOCKACK
);
1451 qos
= mwl8k_qos_setbit_ack(qos
,
1452 MWL8K_TXD_ACK_POLICY_NORMAL
);
1454 if (qos
& IEEE80211_QOS_CONTROL_A_MSDU_PRESENT
)
1455 qos
= mwl8k_qos_setbit_amsdu(qos
);
1458 dma
= pci_map_single(priv
->pdev
, skb
->data
,
1459 skb
->len
, PCI_DMA_TODEVICE
);
1461 if (pci_dma_mapping_error(priv
->pdev
, dma
)) {
1462 printk(KERN_DEBUG
"%s: failed to dma map skb, "
1463 "dropping TX frame.\n", wiphy_name(hw
->wiphy
));
1465 return NETDEV_TX_OK
;
1468 spin_lock_bh(&priv
->tx_lock
);
1470 txq
= priv
->txq
+ index
;
1472 BUG_ON(txq
->skb
[txq
->tail
] != NULL
);
1473 txq
->skb
[txq
->tail
] = skb
;
1475 tx
= txq
->txd
+ txq
->tail
;
1476 tx
->data_rate
= txdatarate
;
1477 tx
->tx_priority
= index
;
1478 tx
->qos_control
= cpu_to_le16(qos
);
1479 tx
->pkt_phys_addr
= cpu_to_le32(dma
);
1480 tx
->pkt_len
= cpu_to_le16(skb
->len
);
1482 tx
->peer_id
= mwl8k_vif
->peer_id
;
1484 tx
->status
= cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
| txstatus
);
1488 priv
->pending_tx_pkts
++;
1491 if (txq
->tail
== MWL8K_TX_DESCS
)
1494 if (txq
->head
== txq
->tail
)
1495 ieee80211_stop_queue(hw
, index
);
1497 mwl8k_tx_start(priv
);
1499 spin_unlock_bh(&priv
->tx_lock
);
1501 return NETDEV_TX_OK
;
1508 * We have the following requirements for issuing firmware commands:
1509 * - Some commands require that the packet transmit path is idle when
1510 * the command is issued. (For simplicity, we'll just quiesce the
1511 * transmit path for every command.)
1512 * - There are certain sequences of commands that need to be issued to
1513 * the hardware sequentially, with no other intervening commands.
1515 * This leads to an implementation of a "firmware lock" as a mutex that
1516 * can be taken recursively, and which is taken by both the low-level
1517 * command submission function (mwl8k_post_cmd) as well as any users of
1518 * that function that require issuing of an atomic sequence of commands,
1519 * and quiesces the transmit path whenever it's taken.
1521 static int mwl8k_fw_lock(struct ieee80211_hw
*hw
)
1523 struct mwl8k_priv
*priv
= hw
->priv
;
1525 if (priv
->fw_mutex_owner
!= current
) {
1528 mutex_lock(&priv
->fw_mutex
);
1529 ieee80211_stop_queues(hw
);
1531 rc
= mwl8k_tx_wait_empty(hw
);
1533 ieee80211_wake_queues(hw
);
1534 mutex_unlock(&priv
->fw_mutex
);
1539 priv
->fw_mutex_owner
= current
;
1542 priv
->fw_mutex_depth
++;
1547 static void mwl8k_fw_unlock(struct ieee80211_hw
*hw
)
1549 struct mwl8k_priv
*priv
= hw
->priv
;
1551 if (!--priv
->fw_mutex_depth
) {
1552 ieee80211_wake_queues(hw
);
1553 priv
->fw_mutex_owner
= NULL
;
1554 mutex_unlock(&priv
->fw_mutex
);
1560 * Command processing.
1563 /* Timeout firmware commands after 2000ms */
1564 #define MWL8K_CMD_TIMEOUT_MS 2000
1566 static int mwl8k_post_cmd(struct ieee80211_hw
*hw
, struct mwl8k_cmd_pkt
*cmd
)
1568 DECLARE_COMPLETION_ONSTACK(cmd_wait
);
1569 struct mwl8k_priv
*priv
= hw
->priv
;
1570 void __iomem
*regs
= priv
->regs
;
1571 dma_addr_t dma_addr
;
1572 unsigned int dma_size
;
1574 unsigned long timeout
= 0;
1577 cmd
->result
= 0xffff;
1578 dma_size
= le16_to_cpu(cmd
->length
);
1579 dma_addr
= pci_map_single(priv
->pdev
, cmd
, dma_size
,
1580 PCI_DMA_BIDIRECTIONAL
);
1581 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
1584 rc
= mwl8k_fw_lock(hw
);
1586 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1587 PCI_DMA_BIDIRECTIONAL
);
1591 priv
->hostcmd_wait
= &cmd_wait
;
1592 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
1593 iowrite32(MWL8K_H2A_INT_DOORBELL
,
1594 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1595 iowrite32(MWL8K_H2A_INT_DUMMY
,
1596 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1598 timeout
= wait_for_completion_timeout(&cmd_wait
,
1599 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS
));
1601 priv
->hostcmd_wait
= NULL
;
1603 mwl8k_fw_unlock(hw
);
1605 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1606 PCI_DMA_BIDIRECTIONAL
);
1609 printk(KERN_ERR
"%s: Command %s timeout after %u ms\n",
1610 wiphy_name(hw
->wiphy
),
1611 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1612 MWL8K_CMD_TIMEOUT_MS
);
1615 rc
= cmd
->result
? -EINVAL
: 0;
1617 printk(KERN_ERR
"%s: Command %s error 0x%x\n",
1618 wiphy_name(hw
->wiphy
),
1619 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1620 le16_to_cpu(cmd
->result
));
1627 * CMD_GET_HW_SPEC (STA version).
1629 struct mwl8k_cmd_get_hw_spec_sta
{
1630 struct mwl8k_cmd_pkt header
;
1632 __u8 host_interface
;
1634 __u8 perm_addr
[ETH_ALEN
];
1639 __u8 mcs_bitmap
[16];
1640 __le32 rx_queue_ptr
;
1641 __le32 num_tx_queues
;
1642 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1644 __le32 num_tx_desc_per_queue
;
1646 } __attribute__((packed
));
1648 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw
*hw
)
1650 struct mwl8k_priv
*priv
= hw
->priv
;
1651 struct mwl8k_cmd_get_hw_spec_sta
*cmd
;
1655 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1659 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1660 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1662 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1663 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1664 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rxd_dma
);
1665 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1666 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1667 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].txd_dma
);
1668 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1669 cmd
->total_rxd
= cpu_to_le32(MWL8K_RX_DESCS
);
1671 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1674 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1675 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1676 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1677 priv
->hw_rev
= cmd
->hw_rev
;
1685 * CMD_GET_HW_SPEC (AP version).
1687 struct mwl8k_cmd_get_hw_spec_ap
{
1688 struct mwl8k_cmd_pkt header
;
1690 __u8 host_interface
;
1693 __u8 perm_addr
[ETH_ALEN
];
1704 } __attribute__((packed
));
1706 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw
*hw
)
1708 struct mwl8k_priv
*priv
= hw
->priv
;
1709 struct mwl8k_cmd_get_hw_spec_ap
*cmd
;
1712 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1716 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1717 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1719 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1720 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1722 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1727 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1728 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1729 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1730 priv
->hw_rev
= cmd
->hw_rev
;
1732 off
= le32_to_cpu(cmd
->wcbbase0
) & 0xffff;
1733 iowrite32(cpu_to_le32(priv
->txq
[0].txd_dma
), priv
->sram
+ off
);
1735 off
= le32_to_cpu(cmd
->rxwrptr
) & 0xffff;
1736 iowrite32(cpu_to_le32(priv
->rxq
[0].rxd_dma
), priv
->sram
+ off
);
1738 off
= le32_to_cpu(cmd
->rxrdptr
) & 0xffff;
1739 iowrite32(cpu_to_le32(priv
->rxq
[0].rxd_dma
), priv
->sram
+ off
);
1741 off
= le32_to_cpu(cmd
->wcbbase1
) & 0xffff;
1742 iowrite32(cpu_to_le32(priv
->txq
[1].txd_dma
), priv
->sram
+ off
);
1744 off
= le32_to_cpu(cmd
->wcbbase2
) & 0xffff;
1745 iowrite32(cpu_to_le32(priv
->txq
[2].txd_dma
), priv
->sram
+ off
);
1747 off
= le32_to_cpu(cmd
->wcbbase3
) & 0xffff;
1748 iowrite32(cpu_to_le32(priv
->txq
[3].txd_dma
), priv
->sram
+ off
);
1758 struct mwl8k_cmd_set_hw_spec
{
1759 struct mwl8k_cmd_pkt header
;
1761 __u8 host_interface
;
1763 __u8 perm_addr
[ETH_ALEN
];
1768 __le32 rx_queue_ptr
;
1769 __le32 num_tx_queues
;
1770 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1772 __le32 num_tx_desc_per_queue
;
1774 } __attribute__((packed
));
1776 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1778 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw
*hw
)
1780 struct mwl8k_priv
*priv
= hw
->priv
;
1781 struct mwl8k_cmd_set_hw_spec
*cmd
;
1785 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1789 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_HW_SPEC
);
1790 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1792 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1793 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rxd_dma
);
1794 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1795 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1796 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].txd_dma
);
1797 cmd
->flags
= cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT
);
1798 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1799 cmd
->total_rxd
= cpu_to_le32(MWL8K_RX_DESCS
);
1801 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1808 * CMD_MAC_MULTICAST_ADR.
1810 struct mwl8k_cmd_mac_multicast_adr
{
1811 struct mwl8k_cmd_pkt header
;
1814 __u8 addr
[0][ETH_ALEN
];
1817 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1818 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1819 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1820 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1822 static struct mwl8k_cmd_pkt
*
1823 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw
*hw
, int allmulti
,
1824 int mc_count
, struct dev_addr_list
*mclist
)
1826 struct mwl8k_priv
*priv
= hw
->priv
;
1827 struct mwl8k_cmd_mac_multicast_adr
*cmd
;
1830 if (allmulti
|| mc_count
> priv
->num_mcaddrs
) {
1835 size
= sizeof(*cmd
) + mc_count
* ETH_ALEN
;
1837 cmd
= kzalloc(size
, GFP_ATOMIC
);
1841 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR
);
1842 cmd
->header
.length
= cpu_to_le16(size
);
1843 cmd
->action
= cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED
|
1844 MWL8K_ENABLE_RX_BROADCAST
);
1847 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST
);
1848 } else if (mc_count
) {
1851 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST
);
1852 cmd
->numaddr
= cpu_to_le16(mc_count
);
1853 for (i
= 0; i
< mc_count
&& mclist
; i
++) {
1854 if (mclist
->da_addrlen
!= ETH_ALEN
) {
1858 memcpy(cmd
->addr
[i
], mclist
->da_addr
, ETH_ALEN
);
1859 mclist
= mclist
->next
;
1863 return &cmd
->header
;
1867 * CMD_802_11_GET_STAT.
1869 struct mwl8k_cmd_802_11_get_stat
{
1870 struct mwl8k_cmd_pkt header
;
1872 } __attribute__((packed
));
1874 #define MWL8K_STAT_ACK_FAILURE 9
1875 #define MWL8K_STAT_RTS_FAILURE 12
1876 #define MWL8K_STAT_FCS_ERROR 24
1877 #define MWL8K_STAT_RTS_SUCCESS 11
1879 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw
*hw
,
1880 struct ieee80211_low_level_stats
*stats
)
1882 struct mwl8k_cmd_802_11_get_stat
*cmd
;
1885 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1889 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_STAT
);
1890 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1892 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1894 stats
->dot11ACKFailureCount
=
1895 le32_to_cpu(cmd
->stats
[MWL8K_STAT_ACK_FAILURE
]);
1896 stats
->dot11RTSFailureCount
=
1897 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_FAILURE
]);
1898 stats
->dot11FCSErrorCount
=
1899 le32_to_cpu(cmd
->stats
[MWL8K_STAT_FCS_ERROR
]);
1900 stats
->dot11RTSSuccessCount
=
1901 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_SUCCESS
]);
1909 * CMD_802_11_RADIO_CONTROL.
1911 struct mwl8k_cmd_802_11_radio_control
{
1912 struct mwl8k_cmd_pkt header
;
1916 } __attribute__((packed
));
1919 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw
*hw
, bool enable
, bool force
)
1921 struct mwl8k_priv
*priv
= hw
->priv
;
1922 struct mwl8k_cmd_802_11_radio_control
*cmd
;
1925 if (enable
== priv
->radio_on
&& !force
)
1928 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1932 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RADIO_CONTROL
);
1933 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1934 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1935 cmd
->control
= cpu_to_le16(priv
->radio_short_preamble
? 3 : 1);
1936 cmd
->radio_on
= cpu_to_le16(enable
? 0x0001 : 0x0000);
1938 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1942 priv
->radio_on
= enable
;
1947 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw
*hw
)
1949 return mwl8k_cmd_802_11_radio_control(hw
, 0, 0);
1952 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw
*hw
)
1954 return mwl8k_cmd_802_11_radio_control(hw
, 1, 0);
1958 mwl8k_set_radio_preamble(struct ieee80211_hw
*hw
, bool short_preamble
)
1960 struct mwl8k_priv
*priv
;
1962 if (hw
== NULL
|| hw
->priv
== NULL
)
1966 priv
->radio_short_preamble
= short_preamble
;
1968 return mwl8k_cmd_802_11_radio_control(hw
, 1, 1);
1972 * CMD_802_11_RF_TX_POWER.
1974 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1976 struct mwl8k_cmd_802_11_rf_tx_power
{
1977 struct mwl8k_cmd_pkt header
;
1979 __le16 support_level
;
1980 __le16 current_level
;
1982 __le16 power_level_list
[MWL8K_TX_POWER_LEVEL_TOTAL
];
1983 } __attribute__((packed
));
1985 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw
*hw
, int dBm
)
1987 struct mwl8k_cmd_802_11_rf_tx_power
*cmd
;
1990 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1994 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_TX_POWER
);
1995 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1996 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1997 cmd
->support_level
= cpu_to_le16(dBm
);
1999 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2008 struct mwl8k_cmd_rf_antenna
{
2009 struct mwl8k_cmd_pkt header
;
2012 } __attribute__((packed
));
2014 #define MWL8K_RF_ANTENNA_RX 1
2015 #define MWL8K_RF_ANTENNA_TX 2
2018 mwl8k_cmd_rf_antenna(struct ieee80211_hw
*hw
, int antenna
, int mask
)
2020 struct mwl8k_cmd_rf_antenna
*cmd
;
2023 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2027 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_ANTENNA
);
2028 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2029 cmd
->antenna
= cpu_to_le16(antenna
);
2030 cmd
->mode
= cpu_to_le16(mask
);
2032 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2041 struct mwl8k_cmd_set_pre_scan
{
2042 struct mwl8k_cmd_pkt header
;
2043 } __attribute__((packed
));
2045 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw
*hw
)
2047 struct mwl8k_cmd_set_pre_scan
*cmd
;
2050 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2054 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN
);
2055 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2057 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2064 * CMD_SET_POST_SCAN.
2066 struct mwl8k_cmd_set_post_scan
{
2067 struct mwl8k_cmd_pkt header
;
2069 __u8 bssid
[ETH_ALEN
];
2070 } __attribute__((packed
));
2073 mwl8k_cmd_set_post_scan(struct ieee80211_hw
*hw
, __u8
*mac
)
2075 struct mwl8k_cmd_set_post_scan
*cmd
;
2078 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2082 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_POST_SCAN
);
2083 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2085 memcpy(cmd
->bssid
, mac
, ETH_ALEN
);
2087 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2094 * CMD_SET_RF_CHANNEL.
2096 struct mwl8k_cmd_set_rf_channel
{
2097 struct mwl8k_cmd_pkt header
;
2099 __u8 current_channel
;
2100 __le32 channel_flags
;
2101 } __attribute__((packed
));
2103 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw
*hw
,
2104 struct ieee80211_channel
*channel
)
2106 struct mwl8k_cmd_set_rf_channel
*cmd
;
2109 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2113 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL
);
2114 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2115 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2116 cmd
->current_channel
= channel
->hw_value
;
2117 if (channel
->band
== IEEE80211_BAND_2GHZ
)
2118 cmd
->channel_flags
= cpu_to_le32(0x00000081);
2120 cmd
->channel_flags
= cpu_to_le32(0x00000000);
2122 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2131 struct mwl8k_cmd_set_slot
{
2132 struct mwl8k_cmd_pkt header
;
2135 } __attribute__((packed
));
2137 static int mwl8k_cmd_set_slot(struct ieee80211_hw
*hw
, bool short_slot_time
)
2139 struct mwl8k_cmd_set_slot
*cmd
;
2142 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2146 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_SLOT
);
2147 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2148 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2149 cmd
->short_slot
= short_slot_time
;
2151 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2160 struct mwl8k_cmd_mimo_config
{
2161 struct mwl8k_cmd_pkt header
;
2163 __u8 rx_antenna_map
;
2164 __u8 tx_antenna_map
;
2165 } __attribute__((packed
));
2167 static int mwl8k_cmd_mimo_config(struct ieee80211_hw
*hw
, __u8 rx
, __u8 tx
)
2169 struct mwl8k_cmd_mimo_config
*cmd
;
2172 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2176 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MIMO_CONFIG
);
2177 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2178 cmd
->action
= cpu_to_le32((u32
)MWL8K_CMD_SET
);
2179 cmd
->rx_antenna_map
= rx
;
2180 cmd
->tx_antenna_map
= tx
;
2182 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2189 * CMD_ENABLE_SNIFFER.
2191 struct mwl8k_cmd_enable_sniffer
{
2192 struct mwl8k_cmd_pkt header
;
2194 } __attribute__((packed
));
2196 static int mwl8k_enable_sniffer(struct ieee80211_hw
*hw
, bool enable
)
2198 struct mwl8k_cmd_enable_sniffer
*cmd
;
2201 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2205 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER
);
2206 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2207 cmd
->action
= cpu_to_le32(!!enable
);
2209 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2218 struct mwl8k_cmd_set_mac_addr
{
2219 struct mwl8k_cmd_pkt header
;
2223 __u8 mac_addr
[ETH_ALEN
];
2225 __u8 mac_addr
[ETH_ALEN
];
2227 } __attribute__((packed
));
2229 static int mwl8k_set_mac_addr(struct ieee80211_hw
*hw
, u8
*mac
)
2231 struct mwl8k_priv
*priv
= hw
->priv
;
2232 struct mwl8k_cmd_set_mac_addr
*cmd
;
2235 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2239 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR
);
2240 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2242 cmd
->mbss
.mac_type
= 0;
2243 memcpy(cmd
->mbss
.mac_addr
, mac
, ETH_ALEN
);
2245 memcpy(cmd
->mac_addr
, mac
, ETH_ALEN
);
2248 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2256 * CMD_SET_RATEADAPT_MODE.
2258 struct mwl8k_cmd_set_rate_adapt_mode
{
2259 struct mwl8k_cmd_pkt header
;
2262 } __attribute__((packed
));
2264 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw
*hw
, __u16 mode
)
2266 struct mwl8k_cmd_set_rate_adapt_mode
*cmd
;
2269 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2273 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE
);
2274 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2275 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2276 cmd
->mode
= cpu_to_le16(mode
);
2278 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2287 struct mwl8k_cmd_set_wmm
{
2288 struct mwl8k_cmd_pkt header
;
2290 } __attribute__((packed
));
2292 static int mwl8k_set_wmm(struct ieee80211_hw
*hw
, bool enable
)
2294 struct mwl8k_priv
*priv
= hw
->priv
;
2295 struct mwl8k_cmd_set_wmm
*cmd
;
2298 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2302 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_WMM_MODE
);
2303 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2304 cmd
->action
= cpu_to_le16(!!enable
);
2306 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2310 priv
->wmm_enabled
= enable
;
2316 * CMD_SET_RTS_THRESHOLD.
2318 struct mwl8k_cmd_rts_threshold
{
2319 struct mwl8k_cmd_pkt header
;
2322 } __attribute__((packed
));
2324 static int mwl8k_rts_threshold(struct ieee80211_hw
*hw
,
2325 u16 action
, u16 threshold
)
2327 struct mwl8k_cmd_rts_threshold
*cmd
;
2330 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2334 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD
);
2335 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2336 cmd
->action
= cpu_to_le16(action
);
2337 cmd
->threshold
= cpu_to_le16(threshold
);
2339 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2346 * CMD_SET_EDCA_PARAMS.
2348 struct mwl8k_cmd_set_edca_params
{
2349 struct mwl8k_cmd_pkt header
;
2351 /* See MWL8K_SET_EDCA_XXX below */
2354 /* TX opportunity in units of 32 us */
2359 /* Log exponent of max contention period: 0...15 */
2362 /* Log exponent of min contention period: 0...15 */
2365 /* Adaptive interframe spacing in units of 32us */
2368 /* TX queue to configure */
2372 /* Log exponent of max contention period: 0...15 */
2375 /* Log exponent of min contention period: 0...15 */
2378 /* Adaptive interframe spacing in units of 32us */
2381 /* TX queue to configure */
2385 } __attribute__((packed
));
2387 #define MWL8K_SET_EDCA_CW 0x01
2388 #define MWL8K_SET_EDCA_TXOP 0x02
2389 #define MWL8K_SET_EDCA_AIFS 0x04
2391 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2392 MWL8K_SET_EDCA_TXOP | \
2393 MWL8K_SET_EDCA_AIFS)
2396 mwl8k_set_edca_params(struct ieee80211_hw
*hw
, __u8 qnum
,
2397 __u16 cw_min
, __u16 cw_max
,
2398 __u8 aifs
, __u16 txop
)
2400 struct mwl8k_priv
*priv
= hw
->priv
;
2401 struct mwl8k_cmd_set_edca_params
*cmd
;
2404 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2409 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2412 qnum
^= !(qnum
>> 1);
2414 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS
);
2415 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2416 cmd
->action
= cpu_to_le16(MWL8K_SET_EDCA_ALL
);
2417 cmd
->txop
= cpu_to_le16(txop
);
2419 cmd
->ap
.log_cw_max
= cpu_to_le32(ilog2(cw_max
+ 1));
2420 cmd
->ap
.log_cw_min
= cpu_to_le32(ilog2(cw_min
+ 1));
2421 cmd
->ap
.aifs
= aifs
;
2424 cmd
->sta
.log_cw_max
= (u8
)ilog2(cw_max
+ 1);
2425 cmd
->sta
.log_cw_min
= (u8
)ilog2(cw_min
+ 1);
2426 cmd
->sta
.aifs
= aifs
;
2427 cmd
->sta
.txq
= qnum
;
2430 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2437 * CMD_FINALIZE_JOIN.
2440 /* FJ beacon buffer size is compiled into the firmware. */
2441 #define MWL8K_FJ_BEACON_MAXLEN 128
2443 struct mwl8k_cmd_finalize_join
{
2444 struct mwl8k_cmd_pkt header
;
2445 __le32 sleep_interval
; /* Number of beacon periods to sleep */
2446 __u8 beacon_data
[MWL8K_FJ_BEACON_MAXLEN
];
2447 } __attribute__((packed
));
2449 static int mwl8k_finalize_join(struct ieee80211_hw
*hw
, void *frame
,
2450 __u16 framelen
, __u16 dtim
)
2452 struct mwl8k_cmd_finalize_join
*cmd
;
2453 struct ieee80211_mgmt
*payload
= frame
;
2461 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2465 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN
);
2466 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2467 cmd
->sleep_interval
= cpu_to_le32(dtim
? dtim
: 1);
2469 hdrlen
= ieee80211_hdrlen(payload
->frame_control
);
2471 payload_len
= framelen
> hdrlen
? framelen
- hdrlen
: 0;
2473 /* XXX TBD Might just have to abort and return an error */
2474 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2475 printk(KERN_ERR
"%s(): WARNING: Incomplete beacon "
2476 "sent to firmware. Sz=%u MAX=%u\n", __func__
,
2477 payload_len
, MWL8K_FJ_BEACON_MAXLEN
);
2479 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2480 payload_len
= MWL8K_FJ_BEACON_MAXLEN
;
2482 if (payload
&& payload_len
)
2483 memcpy(cmd
->beacon_data
, &payload
->u
.beacon
, payload_len
);
2485 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2493 struct mwl8k_cmd_update_sta_db
{
2494 struct mwl8k_cmd_pkt header
;
2496 /* See STADB_ACTION_TYPE */
2499 /* Peer MAC address */
2500 __u8 peer_addr
[ETH_ALEN
];
2504 /* Peer info - valid during add/update. */
2505 struct peer_capability_info peer_info
;
2506 } __attribute__((packed
));
2508 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw
*hw
,
2509 struct ieee80211_vif
*vif
, __u32 action
)
2511 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2512 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2513 struct mwl8k_cmd_update_sta_db
*cmd
;
2514 struct peer_capability_info
*peer_info
;
2515 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2519 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2523 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_UPDATE_STADB
);
2524 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2526 cmd
->action
= cpu_to_le32(action
);
2527 peer_info
= &cmd
->peer_info
;
2528 memcpy(cmd
->peer_addr
, mv_vif
->bssid
, ETH_ALEN
);
2531 case MWL8K_STA_DB_ADD_ENTRY
:
2532 case MWL8K_STA_DB_MODIFY_ENTRY
:
2533 /* Build peer_info block */
2534 peer_info
->peer_type
= MWL8K_PEER_TYPE_ACCESSPOINT
;
2535 peer_info
->basic_caps
= cpu_to_le16(info
->assoc_capability
);
2536 peer_info
->interop
= 1;
2537 peer_info
->amsdu_enabled
= 0;
2539 rates
= peer_info
->legacy_rates
;
2540 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2541 rates
[count
] = bitrates
[count
].hw_value
;
2543 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2545 mv_vif
->peer_id
= peer_info
->station_id
;
2549 case MWL8K_STA_DB_DEL_ENTRY
:
2550 case MWL8K_STA_DB_FLUSH
:
2552 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2554 mv_vif
->peer_id
= 0;
2565 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2567 #define MWL8K_FRAME_PROT_DISABLED 0x00
2568 #define MWL8K_FRAME_PROT_11G 0x07
2569 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2570 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2572 struct mwl8k_cmd_update_set_aid
{
2573 struct mwl8k_cmd_pkt header
;
2576 /* AP's MAC address (BSSID) */
2577 __u8 bssid
[ETH_ALEN
];
2578 __le16 protection_mode
;
2579 __u8 supp_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2580 } __attribute__((packed
));
2582 static int mwl8k_cmd_set_aid(struct ieee80211_hw
*hw
,
2583 struct ieee80211_vif
*vif
)
2585 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2586 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2587 struct mwl8k_cmd_update_set_aid
*cmd
;
2588 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2593 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2597 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_AID
);
2598 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2599 cmd
->aid
= cpu_to_le16(info
->aid
);
2601 memcpy(cmd
->bssid
, mv_vif
->bssid
, ETH_ALEN
);
2603 if (info
->use_cts_prot
) {
2604 prot_mode
= MWL8K_FRAME_PROT_11G
;
2606 switch (info
->ht_operation_mode
&
2607 IEEE80211_HT_OP_MODE_PROTECTION
) {
2608 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
:
2609 prot_mode
= MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY
;
2611 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED
:
2612 prot_mode
= MWL8K_FRAME_PROT_11N_HT_ALL
;
2615 prot_mode
= MWL8K_FRAME_PROT_DISABLED
;
2619 cmd
->protection_mode
= cpu_to_le16(prot_mode
);
2621 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2622 cmd
->supp_rates
[count
] = bitrates
[count
].hw_value
;
2624 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2633 struct mwl8k_cmd_update_rateset
{
2634 struct mwl8k_cmd_pkt header
;
2635 __u8 legacy_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2637 /* Bitmap for supported MCS codes. */
2638 __u8 mcs_set
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2639 __u8 reserved
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2640 } __attribute__((packed
));
2642 static int mwl8k_update_rateset(struct ieee80211_hw
*hw
,
2643 struct ieee80211_vif
*vif
)
2645 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2646 struct mwl8k_cmd_update_rateset
*cmd
;
2647 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2651 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2655 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATE
);
2656 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2658 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2659 cmd
->legacy_rates
[count
] = bitrates
[count
].hw_value
;
2661 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2668 * CMD_USE_FIXED_RATE.
2670 #define MWL8K_RATE_TABLE_SIZE 8
2671 #define MWL8K_UCAST_RATE 0
2672 #define MWL8K_USE_AUTO_RATE 0x0002
2674 struct mwl8k_rate_entry
{
2675 /* Set to 1 if HT rate, 0 if legacy. */
2678 /* Set to 1 to use retry_count field. */
2679 __le32 enable_retry
;
2681 /* Specified legacy rate or MCS. */
2684 /* Number of allowed retries. */
2686 } __attribute__((packed
));
2688 struct mwl8k_rate_table
{
2689 /* 1 to allow specified rate and below */
2690 __le32 allow_rate_drop
;
2692 struct mwl8k_rate_entry rate_entry
[MWL8K_RATE_TABLE_SIZE
];
2693 } __attribute__((packed
));
2695 struct mwl8k_cmd_use_fixed_rate
{
2696 struct mwl8k_cmd_pkt header
;
2698 struct mwl8k_rate_table rate_table
;
2700 /* Unicast, Broadcast or Multicast */
2704 } __attribute__((packed
));
2706 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw
*hw
,
2707 u32 action
, u32 rate_type
, struct mwl8k_rate_table
*rate_table
)
2709 struct mwl8k_cmd_use_fixed_rate
*cmd
;
2713 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2717 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE
);
2718 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2720 cmd
->action
= cpu_to_le32(action
);
2721 cmd
->rate_type
= cpu_to_le32(rate_type
);
2723 if (rate_table
!= NULL
) {
2725 * Copy over each field manually so that endian
2726 * conversion can be done.
2728 cmd
->rate_table
.allow_rate_drop
=
2729 cpu_to_le32(rate_table
->allow_rate_drop
);
2730 cmd
->rate_table
.num_rates
=
2731 cpu_to_le32(rate_table
->num_rates
);
2733 for (count
= 0; count
< rate_table
->num_rates
; count
++) {
2734 struct mwl8k_rate_entry
*dst
=
2735 &cmd
->rate_table
.rate_entry
[count
];
2736 struct mwl8k_rate_entry
*src
=
2737 &rate_table
->rate_entry
[count
];
2739 dst
->is_ht_rate
= cpu_to_le32(src
->is_ht_rate
);
2740 dst
->enable_retry
= cpu_to_le32(src
->enable_retry
);
2741 dst
->rate
= cpu_to_le32(src
->rate
);
2742 dst
->retry_count
= cpu_to_le32(src
->retry_count
);
2746 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2754 * Interrupt handling.
2756 static irqreturn_t
mwl8k_interrupt(int irq
, void *dev_id
)
2758 struct ieee80211_hw
*hw
= dev_id
;
2759 struct mwl8k_priv
*priv
= hw
->priv
;
2762 status
= ioread32(priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2763 iowrite32(~status
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2768 if (status
& MWL8K_A2H_INT_TX_DONE
)
2769 tasklet_schedule(&priv
->tx_reclaim_task
);
2771 if (status
& MWL8K_A2H_INT_RX_READY
) {
2772 while (rxq_process(hw
, 0, 1))
2773 rxq_refill(hw
, 0, 1);
2776 if (status
& MWL8K_A2H_INT_OPC_DONE
) {
2777 if (priv
->hostcmd_wait
!= NULL
)
2778 complete(priv
->hostcmd_wait
);
2781 if (status
& MWL8K_A2H_INT_QUEUE_EMPTY
) {
2782 if (!mutex_is_locked(&priv
->fw_mutex
) &&
2783 priv
->radio_on
&& priv
->pending_tx_pkts
)
2784 mwl8k_tx_start(priv
);
2792 * Core driver operations.
2794 static int mwl8k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2796 struct mwl8k_priv
*priv
= hw
->priv
;
2797 int index
= skb_get_queue_mapping(skb
);
2800 if (priv
->current_channel
== NULL
) {
2801 printk(KERN_DEBUG
"%s: dropped TX frame since radio "
2802 "disabled\n", wiphy_name(hw
->wiphy
));
2804 return NETDEV_TX_OK
;
2807 rc
= mwl8k_txq_xmit(hw
, index
, skb
);
2812 static int mwl8k_start(struct ieee80211_hw
*hw
)
2814 struct mwl8k_priv
*priv
= hw
->priv
;
2817 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2818 IRQF_SHARED
, MWL8K_NAME
, hw
);
2820 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2821 wiphy_name(hw
->wiphy
));
2825 /* Enable tx reclaim tasklet */
2826 tasklet_enable(&priv
->tx_reclaim_task
);
2828 /* Enable interrupts */
2829 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2831 rc
= mwl8k_fw_lock(hw
);
2833 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2837 rc
= mwl8k_enable_sniffer(hw
, 0);
2840 rc
= mwl8k_cmd_set_pre_scan(hw
);
2843 rc
= mwl8k_cmd_set_post_scan(hw
,
2844 "\x00\x00\x00\x00\x00\x00");
2848 rc
= mwl8k_cmd_setrateadaptmode(hw
, 0);
2851 rc
= mwl8k_set_wmm(hw
, 0);
2853 mwl8k_fw_unlock(hw
);
2857 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2858 free_irq(priv
->pdev
->irq
, hw
);
2859 tasklet_disable(&priv
->tx_reclaim_task
);
2865 static void mwl8k_stop(struct ieee80211_hw
*hw
)
2867 struct mwl8k_priv
*priv
= hw
->priv
;
2870 mwl8k_cmd_802_11_radio_disable(hw
);
2872 ieee80211_stop_queues(hw
);
2874 /* Disable interrupts */
2875 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2876 free_irq(priv
->pdev
->irq
, hw
);
2878 /* Stop finalize join worker */
2879 cancel_work_sync(&priv
->finalize_join_worker
);
2880 if (priv
->beacon_skb
!= NULL
)
2881 dev_kfree_skb(priv
->beacon_skb
);
2883 /* Stop tx reclaim tasklet */
2884 tasklet_disable(&priv
->tx_reclaim_task
);
2886 /* Return all skbs to mac80211 */
2887 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2888 mwl8k_txq_reclaim(hw
, i
, 1);
2891 static int mwl8k_add_interface(struct ieee80211_hw
*hw
,
2892 struct ieee80211_if_init_conf
*conf
)
2894 struct mwl8k_priv
*priv
= hw
->priv
;
2895 struct mwl8k_vif
*mwl8k_vif
;
2898 * We only support one active interface at a time.
2900 if (priv
->vif
!= NULL
)
2904 * We only support managed interfaces for now.
2906 if (conf
->type
!= NL80211_IFTYPE_STATION
)
2910 * Reject interface creation if sniffer mode is active, as
2911 * STA operation is mutually exclusive with hardware sniffer
2914 if (priv
->sniffer_enabled
) {
2915 printk(KERN_INFO
"%s: unable to create STA "
2916 "interface due to sniffer mode being enabled\n",
2917 wiphy_name(hw
->wiphy
));
2921 /* Clean out driver private area */
2922 mwl8k_vif
= MWL8K_VIF(conf
->vif
);
2923 memset(mwl8k_vif
, 0, sizeof(*mwl8k_vif
));
2925 /* Set and save the mac address */
2926 mwl8k_set_mac_addr(hw
, conf
->mac_addr
);
2927 memcpy(mwl8k_vif
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
2929 /* Back pointer to parent config block */
2930 mwl8k_vif
->priv
= priv
;
2932 /* Setup initial PHY parameters */
2933 memcpy(mwl8k_vif
->legacy_rates
,
2934 priv
->rates
, sizeof(mwl8k_vif
->legacy_rates
));
2935 mwl8k_vif
->legacy_nrates
= ARRAY_SIZE(priv
->rates
);
2937 /* Set Initial sequence number to zero */
2938 mwl8k_vif
->seqno
= 0;
2940 priv
->vif
= conf
->vif
;
2941 priv
->current_channel
= NULL
;
2946 static void mwl8k_remove_interface(struct ieee80211_hw
*hw
,
2947 struct ieee80211_if_init_conf
*conf
)
2949 struct mwl8k_priv
*priv
= hw
->priv
;
2951 if (priv
->vif
== NULL
)
2954 mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
2959 static int mwl8k_config(struct ieee80211_hw
*hw
, u32 changed
)
2961 struct ieee80211_conf
*conf
= &hw
->conf
;
2962 struct mwl8k_priv
*priv
= hw
->priv
;
2965 if (conf
->flags
& IEEE80211_CONF_IDLE
) {
2966 mwl8k_cmd_802_11_radio_disable(hw
);
2967 priv
->current_channel
= NULL
;
2971 rc
= mwl8k_fw_lock(hw
);
2975 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2979 rc
= mwl8k_cmd_set_rf_channel(hw
, conf
->channel
);
2983 priv
->current_channel
= conf
->channel
;
2985 if (conf
->power_level
> 18)
2986 conf
->power_level
= 18;
2987 rc
= mwl8k_cmd_802_11_rf_tx_power(hw
, conf
->power_level
);
2992 rc
= mwl8k_cmd_rf_antenna(hw
, MWL8K_RF_ANTENNA_RX
, 0x7);
2994 rc
= mwl8k_cmd_rf_antenna(hw
, MWL8K_RF_ANTENNA_TX
, 0x7);
2996 rc
= mwl8k_cmd_mimo_config(hw
, 0x7, 0x7);
3000 mwl8k_fw_unlock(hw
);
3005 static void mwl8k_bss_info_changed(struct ieee80211_hw
*hw
,
3006 struct ieee80211_vif
*vif
,
3007 struct ieee80211_bss_conf
*info
,
3010 struct mwl8k_priv
*priv
= hw
->priv
;
3011 struct mwl8k_vif
*mwl8k_vif
= MWL8K_VIF(vif
);
3014 if (changed
& BSS_CHANGED_BSSID
)
3015 memcpy(mwl8k_vif
->bssid
, info
->bssid
, ETH_ALEN
);
3017 if ((changed
& BSS_CHANGED_ASSOC
) == 0)
3020 priv
->capture_beacon
= false;
3022 rc
= mwl8k_fw_lock(hw
);
3027 memcpy(&mwl8k_vif
->bss_info
, info
,
3028 sizeof(struct ieee80211_bss_conf
));
3031 rc
= mwl8k_update_rateset(hw
, vif
);
3035 /* Turn on rate adaptation */
3036 rc
= mwl8k_cmd_use_fixed_rate(hw
, MWL8K_USE_AUTO_RATE
,
3037 MWL8K_UCAST_RATE
, NULL
);
3041 /* Set radio preamble */
3042 rc
= mwl8k_set_radio_preamble(hw
, info
->use_short_preamble
);
3047 rc
= mwl8k_cmd_set_slot(hw
, info
->use_short_slot
);
3051 /* Update peer rate info */
3052 rc
= mwl8k_cmd_update_sta_db(hw
, vif
,
3053 MWL8K_STA_DB_MODIFY_ENTRY
);
3058 rc
= mwl8k_cmd_set_aid(hw
, vif
);
3063 * Finalize the join. Tell rx handler to process
3064 * next beacon from our BSSID.
3066 memcpy(priv
->capture_bssid
, mwl8k_vif
->bssid
, ETH_ALEN
);
3067 priv
->capture_beacon
= true;
3069 rc
= mwl8k_cmd_update_sta_db(hw
, vif
, MWL8K_STA_DB_DEL_ENTRY
);
3070 memset(&mwl8k_vif
->bss_info
, 0,
3071 sizeof(struct ieee80211_bss_conf
));
3072 memset(mwl8k_vif
->bssid
, 0, ETH_ALEN
);
3076 mwl8k_fw_unlock(hw
);
3079 static u64
mwl8k_prepare_multicast(struct ieee80211_hw
*hw
,
3080 int mc_count
, struct dev_addr_list
*mclist
)
3082 struct mwl8k_cmd_pkt
*cmd
;
3085 * Synthesize and return a command packet that programs the
3086 * hardware multicast address filter. At this point we don't
3087 * know whether FIF_ALLMULTI is being requested, but if it is,
3088 * we'll end up throwing this packet away and creating a new
3089 * one in mwl8k_configure_filter().
3091 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 0, mc_count
, mclist
);
3093 return (unsigned long)cmd
;
3097 mwl8k_configure_filter_sniffer(struct ieee80211_hw
*hw
,
3098 unsigned int changed_flags
,
3099 unsigned int *total_flags
)
3101 struct mwl8k_priv
*priv
= hw
->priv
;
3104 * Hardware sniffer mode is mutually exclusive with STA
3105 * operation, so refuse to enable sniffer mode if a STA
3106 * interface is active.
3108 if (priv
->vif
!= NULL
) {
3109 if (net_ratelimit())
3110 printk(KERN_INFO
"%s: not enabling sniffer "
3111 "mode because STA interface is active\n",
3112 wiphy_name(hw
->wiphy
));
3116 if (!priv
->sniffer_enabled
) {
3117 if (mwl8k_enable_sniffer(hw
, 1))
3119 priv
->sniffer_enabled
= true;
3122 *total_flags
&= FIF_PROMISC_IN_BSS
| FIF_ALLMULTI
|
3123 FIF_BCN_PRBRESP_PROMISC
| FIF_CONTROL
|
3129 static void mwl8k_configure_filter(struct ieee80211_hw
*hw
,
3130 unsigned int changed_flags
,
3131 unsigned int *total_flags
,
3134 struct mwl8k_priv
*priv
= hw
->priv
;
3135 struct mwl8k_cmd_pkt
*cmd
= (void *)(unsigned long)multicast
;
3138 * AP firmware doesn't allow fine-grained control over
3139 * the receive filter.
3142 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
3148 * Enable hardware sniffer mode if FIF_CONTROL or
3149 * FIF_OTHER_BSS is requested.
3151 if (*total_flags
& (FIF_CONTROL
| FIF_OTHER_BSS
) &&
3152 mwl8k_configure_filter_sniffer(hw
, changed_flags
, total_flags
)) {
3157 /* Clear unsupported feature flags */
3158 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
3160 if (mwl8k_fw_lock(hw
))
3163 if (priv
->sniffer_enabled
) {
3164 mwl8k_enable_sniffer(hw
, 0);
3165 priv
->sniffer_enabled
= false;
3168 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
3169 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
) {
3171 * Disable the BSS filter.
3173 mwl8k_cmd_set_pre_scan(hw
);
3178 * Enable the BSS filter.
3180 * If there is an active STA interface, use that
3181 * interface's BSSID, otherwise use a dummy one
3182 * (where the OUI part needs to be nonzero for
3183 * the BSSID to be accepted by POST_SCAN).
3185 bssid
= "\x01\x00\x00\x00\x00\x00";
3186 if (priv
->vif
!= NULL
)
3187 bssid
= MWL8K_VIF(priv
->vif
)->bssid
;
3189 mwl8k_cmd_set_post_scan(hw
, bssid
);
3194 * If FIF_ALLMULTI is being requested, throw away the command
3195 * packet that ->prepare_multicast() built and replace it with
3196 * a command packet that enables reception of all multicast
3199 if (*total_flags
& FIF_ALLMULTI
) {
3201 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 1, 0, NULL
);
3205 mwl8k_post_cmd(hw
, cmd
);
3209 mwl8k_fw_unlock(hw
);
3212 static int mwl8k_set_rts_threshold(struct ieee80211_hw
*hw
, u32 value
)
3214 return mwl8k_rts_threshold(hw
, MWL8K_CMD_SET
, value
);
3217 static int mwl8k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
3218 const struct ieee80211_tx_queue_params
*params
)
3220 struct mwl8k_priv
*priv
= hw
->priv
;
3223 rc
= mwl8k_fw_lock(hw
);
3225 if (!priv
->wmm_enabled
)
3226 rc
= mwl8k_set_wmm(hw
, 1);
3229 rc
= mwl8k_set_edca_params(hw
, queue
,
3235 mwl8k_fw_unlock(hw
);
3241 static int mwl8k_get_tx_stats(struct ieee80211_hw
*hw
,
3242 struct ieee80211_tx_queue_stats
*stats
)
3244 struct mwl8k_priv
*priv
= hw
->priv
;
3245 struct mwl8k_tx_queue
*txq
;
3248 spin_lock_bh(&priv
->tx_lock
);
3249 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++) {
3250 txq
= priv
->txq
+ index
;
3251 memcpy(&stats
[index
], &txq
->stats
,
3252 sizeof(struct ieee80211_tx_queue_stats
));
3254 spin_unlock_bh(&priv
->tx_lock
);
3259 static int mwl8k_get_stats(struct ieee80211_hw
*hw
,
3260 struct ieee80211_low_level_stats
*stats
)
3262 return mwl8k_cmd_802_11_get_stat(hw
, stats
);
3265 static const struct ieee80211_ops mwl8k_ops
= {
3267 .start
= mwl8k_start
,
3269 .add_interface
= mwl8k_add_interface
,
3270 .remove_interface
= mwl8k_remove_interface
,
3271 .config
= mwl8k_config
,
3272 .bss_info_changed
= mwl8k_bss_info_changed
,
3273 .prepare_multicast
= mwl8k_prepare_multicast
,
3274 .configure_filter
= mwl8k_configure_filter
,
3275 .set_rts_threshold
= mwl8k_set_rts_threshold
,
3276 .conf_tx
= mwl8k_conf_tx
,
3277 .get_tx_stats
= mwl8k_get_tx_stats
,
3278 .get_stats
= mwl8k_get_stats
,
3281 static void mwl8k_tx_reclaim_handler(unsigned long data
)
3284 struct ieee80211_hw
*hw
= (struct ieee80211_hw
*) data
;
3285 struct mwl8k_priv
*priv
= hw
->priv
;
3287 spin_lock_bh(&priv
->tx_lock
);
3288 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3289 mwl8k_txq_reclaim(hw
, i
, 0);
3291 if (priv
->tx_wait
!= NULL
&& !priv
->pending_tx_pkts
) {
3292 complete(priv
->tx_wait
);
3293 priv
->tx_wait
= NULL
;
3295 spin_unlock_bh(&priv
->tx_lock
);
3298 static void mwl8k_finalize_join_worker(struct work_struct
*work
)
3300 struct mwl8k_priv
*priv
=
3301 container_of(work
, struct mwl8k_priv
, finalize_join_worker
);
3302 struct sk_buff
*skb
= priv
->beacon_skb
;
3303 u8 dtim
= MWL8K_VIF(priv
->vif
)->bss_info
.dtim_period
;
3305 mwl8k_finalize_join(priv
->hw
, skb
->data
, skb
->len
, dtim
);
3308 priv
->beacon_skb
= NULL
;
3316 static struct mwl8k_device_info mwl8k_info_tbl
[] __devinitdata
= {
3318 .part_name
= "88w8687",
3319 .helper_image
= "mwl8k/helper_8687.fw",
3320 .fw_image
= "mwl8k/fmimage_8687.fw",
3321 .rxd_ops
= &rxd_8687_ops
,
3322 .modes
= BIT(NL80211_IFTYPE_STATION
),
3325 .part_name
= "88w8366",
3326 .helper_image
= "mwl8k/helper_8366.fw",
3327 .fw_image
= "mwl8k/fmimage_8366.fw",
3328 .rxd_ops
= &rxd_8366_ops
,
3333 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table
) = {
3334 { PCI_VDEVICE(MARVELL
, 0x2a2b), .driver_data
= MWL8687
, },
3335 { PCI_VDEVICE(MARVELL
, 0x2a30), .driver_data
= MWL8687
, },
3336 { PCI_VDEVICE(MARVELL
, 0x2a40), .driver_data
= MWL8366
, },
3339 MODULE_DEVICE_TABLE(pci
, mwl8k_pci_id_table
);
3341 static int __devinit
mwl8k_probe(struct pci_dev
*pdev
,
3342 const struct pci_device_id
*id
)
3344 static int printed_version
= 0;
3345 struct ieee80211_hw
*hw
;
3346 struct mwl8k_priv
*priv
;
3350 if (!printed_version
) {
3351 printk(KERN_INFO
"%s version %s\n", MWL8K_DESC
, MWL8K_VERSION
);
3352 printed_version
= 1;
3355 rc
= pci_enable_device(pdev
);
3357 printk(KERN_ERR
"%s: Cannot enable new PCI device\n",
3362 rc
= pci_request_regions(pdev
, MWL8K_NAME
);
3364 printk(KERN_ERR
"%s: Cannot obtain PCI resources\n",
3369 pci_set_master(pdev
);
3371 hw
= ieee80211_alloc_hw(sizeof(*priv
), &mwl8k_ops
);
3373 printk(KERN_ERR
"%s: ieee80211 alloc failed\n", MWL8K_NAME
);
3381 priv
->device_info
= &mwl8k_info_tbl
[id
->driver_data
];
3382 priv
->rxd_ops
= priv
->device_info
->rxd_ops
;
3383 priv
->sniffer_enabled
= false;
3384 priv
->wmm_enabled
= false;
3385 priv
->pending_tx_pkts
= 0;
3387 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
3388 pci_set_drvdata(pdev
, hw
);
3390 priv
->sram
= pci_iomap(pdev
, 0, 0x10000);
3391 if (priv
->sram
== NULL
) {
3392 printk(KERN_ERR
"%s: Cannot map device SRAM\n",
3393 wiphy_name(hw
->wiphy
));
3398 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3399 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3401 priv
->regs
= pci_iomap(pdev
, 1, 0x10000);
3402 if (priv
->regs
== NULL
) {
3403 priv
->regs
= pci_iomap(pdev
, 2, 0x10000);
3404 if (priv
->regs
== NULL
) {
3405 printk(KERN_ERR
"%s: Cannot map device registers\n",
3406 wiphy_name(hw
->wiphy
));
3411 memcpy(priv
->channels
, mwl8k_channels
, sizeof(mwl8k_channels
));
3412 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
3413 priv
->band
.channels
= priv
->channels
;
3414 priv
->band
.n_channels
= ARRAY_SIZE(mwl8k_channels
);
3415 priv
->band
.bitrates
= priv
->rates
;
3416 priv
->band
.n_bitrates
= ARRAY_SIZE(mwl8k_rates
);
3417 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
3419 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(mwl8k_rates
));
3420 memcpy(priv
->rates
, mwl8k_rates
, sizeof(mwl8k_rates
));
3423 * Extra headroom is the size of the required DMA header
3424 * minus the size of the smallest 802.11 frame (CTS frame).
3426 hw
->extra_tx_headroom
=
3427 sizeof(struct mwl8k_dma_data
) - sizeof(struct ieee80211_cts
);
3429 hw
->channel_change_time
= 10;
3431 hw
->queues
= MWL8K_TX_QUEUES
;
3433 hw
->wiphy
->interface_modes
= priv
->device_info
->modes
;
3435 /* Set rssi and noise values to dBm */
3436 hw
->flags
|= IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_NOISE_DBM
;
3437 hw
->vif_data_size
= sizeof(struct mwl8k_vif
);
3440 /* Set default radio state and preamble */
3442 priv
->radio_short_preamble
= 0;
3444 /* Finalize join worker */
3445 INIT_WORK(&priv
->finalize_join_worker
, mwl8k_finalize_join_worker
);
3447 /* TX reclaim tasklet */
3448 tasklet_init(&priv
->tx_reclaim_task
,
3449 mwl8k_tx_reclaim_handler
, (unsigned long)hw
);
3450 tasklet_disable(&priv
->tx_reclaim_task
);
3452 /* Power management cookie */
3453 priv
->cookie
= pci_alloc_consistent(priv
->pdev
, 4, &priv
->cookie_dma
);
3454 if (priv
->cookie
== NULL
)
3457 rc
= mwl8k_rxq_init(hw
, 0);
3460 rxq_refill(hw
, 0, INT_MAX
);
3462 mutex_init(&priv
->fw_mutex
);
3463 priv
->fw_mutex_owner
= NULL
;
3464 priv
->fw_mutex_depth
= 0;
3465 priv
->hostcmd_wait
= NULL
;
3467 spin_lock_init(&priv
->tx_lock
);
3469 priv
->tx_wait
= NULL
;
3471 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++) {
3472 rc
= mwl8k_txq_init(hw
, i
);
3474 goto err_free_queues
;
3477 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
3478 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3479 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL
);
3480 iowrite32(0xffffffff, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK
);
3482 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
3483 IRQF_SHARED
, MWL8K_NAME
, hw
);
3485 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
3486 wiphy_name(hw
->wiphy
));
3487 goto err_free_queues
;
3490 /* Reset firmware and hardware */
3491 mwl8k_hw_reset(priv
);
3493 /* Ask userland hotplug daemon for the device firmware */
3494 rc
= mwl8k_request_firmware(priv
);
3496 printk(KERN_ERR
"%s: Firmware files not found\n",
3497 wiphy_name(hw
->wiphy
));
3501 /* Load firmware into hardware */
3502 rc
= mwl8k_load_firmware(hw
);
3504 printk(KERN_ERR
"%s: Cannot start firmware\n",
3505 wiphy_name(hw
->wiphy
));
3506 goto err_stop_firmware
;
3509 /* Reclaim memory once firmware is successfully loaded */
3510 mwl8k_release_firmware(priv
);
3513 * Temporarily enable interrupts. Initial firmware host
3514 * commands use interrupts and avoids polling. Disable
3515 * interrupts when done.
3517 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3519 /* Get config data, mac addrs etc */
3521 rc
= mwl8k_cmd_get_hw_spec_ap(hw
);
3523 rc
= mwl8k_cmd_set_hw_spec(hw
);
3525 rc
= mwl8k_cmd_get_hw_spec_sta(hw
);
3528 printk(KERN_ERR
"%s: Cannot initialise firmware\n",
3529 wiphy_name(hw
->wiphy
));
3530 goto err_stop_firmware
;
3533 /* Turn radio off */
3534 rc
= mwl8k_cmd_802_11_radio_disable(hw
);
3536 printk(KERN_ERR
"%s: Cannot disable\n", wiphy_name(hw
->wiphy
));
3537 goto err_stop_firmware
;
3540 /* Clear MAC address */
3541 rc
= mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
3543 printk(KERN_ERR
"%s: Cannot clear MAC address\n",
3544 wiphy_name(hw
->wiphy
));
3545 goto err_stop_firmware
;
3548 /* Disable interrupts */
3549 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3550 free_irq(priv
->pdev
->irq
, hw
);
3552 rc
= ieee80211_register_hw(hw
);
3554 printk(KERN_ERR
"%s: Cannot register device\n",
3555 wiphy_name(hw
->wiphy
));
3556 goto err_stop_firmware
;
3559 printk(KERN_INFO
"%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3560 wiphy_name(hw
->wiphy
), priv
->device_info
->part_name
,
3561 priv
->hw_rev
, hw
->wiphy
->perm_addr
,
3562 priv
->ap_fw
? "AP" : "STA",
3563 (priv
->fw_rev
>> 24) & 0xff, (priv
->fw_rev
>> 16) & 0xff,
3564 (priv
->fw_rev
>> 8) & 0xff, priv
->fw_rev
& 0xff);
3569 mwl8k_hw_reset(priv
);
3570 mwl8k_release_firmware(priv
);
3573 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3574 free_irq(priv
->pdev
->irq
, hw
);
3577 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3578 mwl8k_txq_deinit(hw
, i
);
3579 mwl8k_rxq_deinit(hw
, 0);
3582 if (priv
->cookie
!= NULL
)
3583 pci_free_consistent(priv
->pdev
, 4,
3584 priv
->cookie
, priv
->cookie_dma
);
3586 if (priv
->regs
!= NULL
)
3587 pci_iounmap(pdev
, priv
->regs
);
3589 if (priv
->sram
!= NULL
)
3590 pci_iounmap(pdev
, priv
->sram
);
3592 pci_set_drvdata(pdev
, NULL
);
3593 ieee80211_free_hw(hw
);
3596 pci_release_regions(pdev
);
3597 pci_disable_device(pdev
);
3602 static void __devexit
mwl8k_shutdown(struct pci_dev
*pdev
)
3604 printk(KERN_ERR
"===>%s(%u)\n", __func__
, __LINE__
);
3607 static void __devexit
mwl8k_remove(struct pci_dev
*pdev
)
3609 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
3610 struct mwl8k_priv
*priv
;
3617 ieee80211_stop_queues(hw
);
3619 ieee80211_unregister_hw(hw
);
3621 /* Remove tx reclaim tasklet */
3622 tasklet_kill(&priv
->tx_reclaim_task
);
3625 mwl8k_hw_reset(priv
);
3627 /* Return all skbs to mac80211 */
3628 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3629 mwl8k_txq_reclaim(hw
, i
, 1);
3631 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3632 mwl8k_txq_deinit(hw
, i
);
3634 mwl8k_rxq_deinit(hw
, 0);
3636 pci_free_consistent(priv
->pdev
, 4, priv
->cookie
, priv
->cookie_dma
);
3638 pci_iounmap(pdev
, priv
->regs
);
3639 pci_iounmap(pdev
, priv
->sram
);
3640 pci_set_drvdata(pdev
, NULL
);
3641 ieee80211_free_hw(hw
);
3642 pci_release_regions(pdev
);
3643 pci_disable_device(pdev
);
3646 static struct pci_driver mwl8k_driver
= {
3648 .id_table
= mwl8k_pci_id_table
,
3649 .probe
= mwl8k_probe
,
3650 .remove
= __devexit_p(mwl8k_remove
),
3651 .shutdown
= __devexit_p(mwl8k_shutdown
),
3654 static int __init
mwl8k_init(void)
3656 return pci_register_driver(&mwl8k_driver
);
3659 static void __exit
mwl8k_exit(void)
3661 pci_unregister_driver(&mwl8k_driver
);
3664 module_init(mwl8k_init
);
3665 module_exit(mwl8k_exit
);
3667 MODULE_DESCRIPTION(MWL8K_DESC
);
3668 MODULE_VERSION(MWL8K_VERSION
);
3669 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3670 MODULE_LICENSE("GPL");