2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init
)(void *rxd
, dma_addr_t next_dma_addr
);
86 void (*rxd_refill
)(void *rxd
, dma_addr_t addr
, int len
);
87 int (*rxd_process
)(void *rxd
, struct ieee80211_rx_status
*status
);
90 struct mwl8k_device_info
{
94 struct rxd_ops
*rxd_ops
;
98 struct mwl8k_rx_queue
{
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma
)
115 struct mwl8k_tx_queue
{
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats
;
123 struct mwl8k_tx_desc
*txd
;
125 struct sk_buff
**skb
;
128 /* Pointers to the firmware data and meta information about it. */
129 struct mwl8k_firmware
{
130 /* Boot helper code */
131 struct firmware
*helper
;
134 struct firmware
*ucode
;
140 struct ieee80211_hw
*hw
;
142 struct pci_dev
*pdev
;
144 struct mwl8k_device_info
*device_info
;
146 struct rxd_ops
*rxd_ops
;
148 /* firmware files and meta data */
149 struct mwl8k_firmware fw
;
151 /* firmware access */
152 struct mutex fw_mutex
;
153 struct task_struct
*fw_mutex_owner
;
155 struct completion
*hostcmd_wait
;
157 /* lock held over TX and TX reap */
160 /* TX quiesce completion, protected by fw_mutex and tx_lock */
161 struct completion
*tx_wait
;
163 struct ieee80211_vif
*vif
;
165 struct ieee80211_channel
*current_channel
;
167 /* power management status cookie from firmware */
169 dma_addr_t cookie_dma
;
176 * Running count of TX packets in flight, to avoid
177 * iterating over the transmit rings each time.
181 struct mwl8k_rx_queue rxq
[MWL8K_RX_QUEUES
];
182 struct mwl8k_tx_queue txq
[MWL8K_TX_QUEUES
];
185 struct ieee80211_supported_band band
;
186 struct ieee80211_channel channels
[14];
187 struct ieee80211_rate rates
[13];
190 bool radio_short_preamble
;
191 bool sniffer_enabled
;
194 /* XXX need to convert this to handle multiple interfaces */
196 u8 capture_bssid
[ETH_ALEN
];
197 struct sk_buff
*beacon_skb
;
200 * This FJ worker has to be global as it is scheduled from the
201 * RX handler. At this point we don't know which interface it
202 * belongs to until the list of bssids waiting to complete join
205 struct work_struct finalize_join_worker
;
207 /* Tasklet to reclaim TX descriptors and buffers after tx */
208 struct tasklet_struct tx_reclaim_task
;
211 /* Per interface specific private data */
213 /* backpointer to parent config block */
214 struct mwl8k_priv
*priv
;
216 /* BSS config of AP or IBSS from mac80211*/
217 struct ieee80211_bss_conf bss_info
;
219 /* BSSID of AP or IBSS */
221 u8 mac_addr
[ETH_ALEN
];
224 * Subset of supported legacy rates.
225 * Intersection of AP and STA supported rates.
227 struct ieee80211_rate legacy_rates
[13];
229 /* number of supported legacy rates */
232 /* Index into station database.Returned by update_sta_db call */
235 /* Non AMPDU sequence number assigned by driver */
239 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
241 static const struct ieee80211_channel mwl8k_channels
[] = {
242 { .center_freq
= 2412, .hw_value
= 1, },
243 { .center_freq
= 2417, .hw_value
= 2, },
244 { .center_freq
= 2422, .hw_value
= 3, },
245 { .center_freq
= 2427, .hw_value
= 4, },
246 { .center_freq
= 2432, .hw_value
= 5, },
247 { .center_freq
= 2437, .hw_value
= 6, },
248 { .center_freq
= 2442, .hw_value
= 7, },
249 { .center_freq
= 2447, .hw_value
= 8, },
250 { .center_freq
= 2452, .hw_value
= 9, },
251 { .center_freq
= 2457, .hw_value
= 10, },
252 { .center_freq
= 2462, .hw_value
= 11, },
255 static const struct ieee80211_rate mwl8k_rates
[] = {
256 { .bitrate
= 10, .hw_value
= 2, },
257 { .bitrate
= 20, .hw_value
= 4, },
258 { .bitrate
= 55, .hw_value
= 11, },
259 { .bitrate
= 110, .hw_value
= 22, },
260 { .bitrate
= 220, .hw_value
= 44, },
261 { .bitrate
= 60, .hw_value
= 12, },
262 { .bitrate
= 90, .hw_value
= 18, },
263 { .bitrate
= 120, .hw_value
= 24, },
264 { .bitrate
= 180, .hw_value
= 36, },
265 { .bitrate
= 240, .hw_value
= 48, },
266 { .bitrate
= 360, .hw_value
= 72, },
267 { .bitrate
= 480, .hw_value
= 96, },
268 { .bitrate
= 540, .hw_value
= 108, },
271 /* Set or get info from Firmware */
272 #define MWL8K_CMD_SET 0x0001
273 #define MWL8K_CMD_GET 0x0000
275 /* Firmware command codes */
276 #define MWL8K_CMD_CODE_DNLD 0x0001
277 #define MWL8K_CMD_GET_HW_SPEC 0x0003
278 #define MWL8K_CMD_SET_HW_SPEC 0x0004
279 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
280 #define MWL8K_CMD_GET_STAT 0x0014
281 #define MWL8K_CMD_RADIO_CONTROL 0x001c
282 #define MWL8K_CMD_RF_TX_POWER 0x001e
283 #define MWL8K_CMD_RF_ANTENNA 0x0020
284 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
285 #define MWL8K_CMD_SET_POST_SCAN 0x0108
286 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
287 #define MWL8K_CMD_SET_AID 0x010d
288 #define MWL8K_CMD_SET_RATE 0x0110
289 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
290 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
291 #define MWL8K_CMD_SET_SLOT 0x0114
292 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
293 #define MWL8K_CMD_SET_WMM_MODE 0x0123
294 #define MWL8K_CMD_MIMO_CONFIG 0x0125
295 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
296 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
297 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
298 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
299 #define MWL8K_CMD_UPDATE_STADB 0x1123
301 static const char *mwl8k_cmd_name(u16 cmd
, char *buf
, int bufsize
)
303 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
304 snprintf(buf, bufsize, "%s", #x);\
307 switch (cmd
& ~0x8000) {
308 MWL8K_CMDNAME(CODE_DNLD
);
309 MWL8K_CMDNAME(GET_HW_SPEC
);
310 MWL8K_CMDNAME(SET_HW_SPEC
);
311 MWL8K_CMDNAME(MAC_MULTICAST_ADR
);
312 MWL8K_CMDNAME(GET_STAT
);
313 MWL8K_CMDNAME(RADIO_CONTROL
);
314 MWL8K_CMDNAME(RF_TX_POWER
);
315 MWL8K_CMDNAME(RF_ANTENNA
);
316 MWL8K_CMDNAME(SET_PRE_SCAN
);
317 MWL8K_CMDNAME(SET_POST_SCAN
);
318 MWL8K_CMDNAME(SET_RF_CHANNEL
);
319 MWL8K_CMDNAME(SET_AID
);
320 MWL8K_CMDNAME(SET_RATE
);
321 MWL8K_CMDNAME(SET_FINALIZE_JOIN
);
322 MWL8K_CMDNAME(RTS_THRESHOLD
);
323 MWL8K_CMDNAME(SET_SLOT
);
324 MWL8K_CMDNAME(SET_EDCA_PARAMS
);
325 MWL8K_CMDNAME(SET_WMM_MODE
);
326 MWL8K_CMDNAME(MIMO_CONFIG
);
327 MWL8K_CMDNAME(USE_FIXED_RATE
);
328 MWL8K_CMDNAME(ENABLE_SNIFFER
);
329 MWL8K_CMDNAME(SET_MAC_ADDR
);
330 MWL8K_CMDNAME(SET_RATEADAPT_MODE
);
331 MWL8K_CMDNAME(UPDATE_STADB
);
333 snprintf(buf
, bufsize
, "0x%x", cmd
);
340 /* Hardware and firmware reset */
341 static void mwl8k_hw_reset(struct mwl8k_priv
*priv
)
343 iowrite32(MWL8K_H2A_INT_RESET
,
344 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
345 iowrite32(MWL8K_H2A_INT_RESET
,
346 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
350 /* Release fw image */
351 static void mwl8k_release_fw(struct firmware
**fw
)
355 release_firmware(*fw
);
359 static void mwl8k_release_firmware(struct mwl8k_priv
*priv
)
361 mwl8k_release_fw(&priv
->fw
.ucode
);
362 mwl8k_release_fw(&priv
->fw
.helper
);
365 /* Request fw image */
366 static int mwl8k_request_fw(struct mwl8k_priv
*priv
,
367 const char *fname
, struct firmware
**fw
)
369 /* release current image */
371 mwl8k_release_fw(fw
);
373 return request_firmware((const struct firmware
**)fw
,
374 fname
, &priv
->pdev
->dev
);
377 static int mwl8k_request_firmware(struct mwl8k_priv
*priv
)
379 struct mwl8k_device_info
*di
= priv
->device_info
;
382 if (di
->helper_image
!= NULL
) {
383 rc
= mwl8k_request_fw(priv
, di
->helper_image
, &priv
->fw
.helper
);
385 printk(KERN_ERR
"%s: Error requesting helper "
386 "firmware file %s\n", pci_name(priv
->pdev
),
392 rc
= mwl8k_request_fw(priv
, di
->fw_image
, &priv
->fw
.ucode
);
394 printk(KERN_ERR
"%s: Error requesting firmware file %s\n",
395 pci_name(priv
->pdev
), di
->fw_image
);
396 mwl8k_release_fw(&priv
->fw
.helper
);
403 struct mwl8k_cmd_pkt
{
409 } __attribute__((packed
));
415 mwl8k_send_fw_load_cmd(struct mwl8k_priv
*priv
, void *data
, int length
)
417 void __iomem
*regs
= priv
->regs
;
421 dma_addr
= pci_map_single(priv
->pdev
, data
, length
, PCI_DMA_TODEVICE
);
422 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
425 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
426 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
427 iowrite32(MWL8K_H2A_INT_DOORBELL
,
428 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
429 iowrite32(MWL8K_H2A_INT_DUMMY
,
430 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
436 int_code
= ioread32(regs
+ MWL8K_HIU_INT_CODE
);
437 if (int_code
== MWL8K_INT_CODE_CMD_FINISHED
) {
438 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
446 pci_unmap_single(priv
->pdev
, dma_addr
, length
, PCI_DMA_TODEVICE
);
448 return loops
? 0 : -ETIMEDOUT
;
451 static int mwl8k_load_fw_image(struct mwl8k_priv
*priv
,
452 const u8
*data
, size_t length
)
454 struct mwl8k_cmd_pkt
*cmd
;
458 cmd
= kmalloc(sizeof(*cmd
) + 256, GFP_KERNEL
);
462 cmd
->code
= cpu_to_le16(MWL8K_CMD_CODE_DNLD
);
468 int block_size
= length
> 256 ? 256 : length
;
470 memcpy(cmd
->payload
, data
+ done
, block_size
);
471 cmd
->length
= cpu_to_le16(block_size
);
473 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
,
474 sizeof(*cmd
) + block_size
);
479 length
-= block_size
;
484 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
, sizeof(*cmd
));
492 static int mwl8k_feed_fw_image(struct mwl8k_priv
*priv
,
493 const u8
*data
, size_t length
)
495 unsigned char *buffer
;
496 int may_continue
, rc
= 0;
497 u32 done
, prev_block_size
;
499 buffer
= kmalloc(1024, GFP_KERNEL
);
506 while (may_continue
> 0) {
509 block_size
= ioread32(priv
->regs
+ MWL8K_HIU_SCRATCH
);
510 if (block_size
& 1) {
514 done
+= prev_block_size
;
515 length
-= prev_block_size
;
518 if (block_size
> 1024 || block_size
> length
) {
528 if (block_size
== 0) {
535 prev_block_size
= block_size
;
536 memcpy(buffer
, data
+ done
, block_size
);
538 rc
= mwl8k_send_fw_load_cmd(priv
, buffer
, block_size
);
543 if (!rc
&& length
!= 0)
551 static int mwl8k_load_firmware(struct ieee80211_hw
*hw
)
553 struct mwl8k_priv
*priv
= hw
->priv
;
554 struct firmware
*fw
= priv
->fw
.ucode
;
555 struct mwl8k_device_info
*di
= priv
->device_info
;
559 if (!memcmp(fw
->data
, "\x01\x00\x00\x00", 4)) {
560 struct firmware
*helper
= priv
->fw
.helper
;
562 if (helper
== NULL
) {
563 printk(KERN_ERR
"%s: helper image needed but none "
564 "given\n", pci_name(priv
->pdev
));
568 rc
= mwl8k_load_fw_image(priv
, helper
->data
, helper
->size
);
570 printk(KERN_ERR
"%s: unable to load firmware "
571 "helper image\n", pci_name(priv
->pdev
));
576 rc
= mwl8k_feed_fw_image(priv
, fw
->data
, fw
->size
);
578 rc
= mwl8k_load_fw_image(priv
, fw
->data
, fw
->size
);
582 printk(KERN_ERR
"%s: unable to load firmware image\n",
583 pci_name(priv
->pdev
));
587 if (di
->modes
& BIT(NL80211_IFTYPE_AP
))
588 iowrite32(MWL8K_MODE_AP
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
590 iowrite32(MWL8K_MODE_STA
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
597 ready_code
= ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
598 if (ready_code
== MWL8K_FWAP_READY
) {
601 } else if (ready_code
== MWL8K_FWSTA_READY
) {
610 return loops
? 0 : -ETIMEDOUT
;
615 * Defines shared between transmission and reception.
617 /* HT control fields for firmware */
622 } __attribute__((packed
));
624 /* Firmware Station database operations */
625 #define MWL8K_STA_DB_ADD_ENTRY 0
626 #define MWL8K_STA_DB_MODIFY_ENTRY 1
627 #define MWL8K_STA_DB_DEL_ENTRY 2
628 #define MWL8K_STA_DB_FLUSH 3
630 /* Peer Entry flags - used to define the type of the peer node */
631 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
633 #define MWL8K_IEEE_LEGACY_DATA_RATES 13
634 #define MWL8K_MCS_BITMAP_SIZE 16
636 struct peer_capability_info
{
637 /* Peer type - AP vs. STA. */
640 /* Basic 802.11 capabilities from assoc resp. */
643 /* Set if peer supports 802.11n high throughput (HT). */
646 /* Valid if HT is supported. */
648 __u8 extended_ht_caps
;
649 struct ewc_ht_info ewc_info
;
651 /* Legacy rate table. Intersection of our rates and peer rates. */
652 __u8 legacy_rates
[MWL8K_IEEE_LEGACY_DATA_RATES
];
654 /* HT rate table. Intersection of our rates and peer rates. */
655 __u8 ht_rates
[MWL8K_MCS_BITMAP_SIZE
];
658 /* If set, interoperability mode, no proprietary extensions. */
662 __le16 amsdu_enabled
;
663 } __attribute__((packed
));
665 /* Inline functions to manipulate QoS field in data descriptor. */
666 static inline u16
mwl8k_qos_setbit_eosp(u16 qos
)
668 u16 val_mask
= 1 << 4;
670 /* End of Service Period Bit 4 */
671 return qos
| val_mask
;
674 static inline u16
mwl8k_qos_setbit_ack(u16 qos
, u8 ack_policy
)
678 u16 qos_mask
= ~(val_mask
<< shift
);
680 /* Ack Policy Bit 5-6 */
681 return (qos
& qos_mask
) | ((ack_policy
& val_mask
) << shift
);
684 static inline u16
mwl8k_qos_setbit_amsdu(u16 qos
)
686 u16 val_mask
= 1 << 7;
688 /* AMSDU present Bit 7 */
689 return qos
| val_mask
;
692 static inline u16
mwl8k_qos_setbit_qlen(u16 qos
, u8 len
)
696 u16 qos_mask
= ~(val_mask
<< shift
);
698 /* Queue Length Bits 8-15 */
699 return (qos
& qos_mask
) | ((len
& val_mask
) << shift
);
702 /* DMA header used by firmware and hardware. */
703 struct mwl8k_dma_data
{
705 struct ieee80211_hdr wh
;
706 } __attribute__((packed
));
708 /* Routines to add/remove DMA header from skb. */
709 static inline void mwl8k_remove_dma_header(struct sk_buff
*skb
)
711 struct mwl8k_dma_data
*tr
= (struct mwl8k_dma_data
*)skb
->data
;
712 void *dst
, *src
= &tr
->wh
;
713 int hdrlen
= ieee80211_hdrlen(tr
->wh
.frame_control
);
714 u16 space
= sizeof(struct mwl8k_dma_data
) - hdrlen
;
716 dst
= (void *)tr
+ space
;
718 memmove(dst
, src
, hdrlen
);
719 skb_pull(skb
, space
);
723 static inline void mwl8k_add_dma_header(struct sk_buff
*skb
)
725 struct ieee80211_hdr
*wh
;
727 struct mwl8k_dma_data
*tr
;
729 wh
= (struct ieee80211_hdr
*)skb
->data
;
730 hdrlen
= ieee80211_hdrlen(wh
->frame_control
);
734 * Copy up/down the 802.11 header; the firmware requires
735 * we present a 2-byte payload length followed by a
736 * 4-address header (w/o QoS), followed (optionally) by
737 * any WEP/ExtIV header (but only filled in for CCMP).
739 if (hdrlen
!= sizeof(struct mwl8k_dma_data
))
740 skb_push(skb
, sizeof(struct mwl8k_dma_data
) - hdrlen
);
742 tr
= (struct mwl8k_dma_data
*)skb
->data
;
744 memmove(&tr
->wh
, wh
, hdrlen
);
747 memset(tr
->wh
.addr4
, 0, ETH_ALEN
);
750 * Firmware length is the length of the fully formed "802.11
751 * payload". That is, everything except for the 802.11 header.
752 * This includes all crypto material including the MIC.
754 tr
->fwlen
= cpu_to_le16(pktlen
- hdrlen
);
761 struct mwl8k_rxd_8687
{
765 __le32 pkt_phys_addr
;
766 __le32 next_rxd_phys_addr
;
776 } __attribute__((packed
));
778 #define MWL8K_8687_RATE_INFO_SHORTPRE 0x8000
779 #define MWL8K_8687_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
780 #define MWL8K_8687_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
781 #define MWL8K_8687_RATE_INFO_40MHZ 0x0004
782 #define MWL8K_8687_RATE_INFO_SHORTGI 0x0002
783 #define MWL8K_8687_RATE_INFO_MCS_FORMAT 0x0001
785 #define MWL8K_8687_RX_CTRL_OWNED_BY_HOST 0x02
787 static void mwl8k_rxd_8687_init(void *_rxd
, dma_addr_t next_dma_addr
)
789 struct mwl8k_rxd_8687
*rxd
= _rxd
;
791 rxd
->next_rxd_phys_addr
= cpu_to_le32(next_dma_addr
);
792 rxd
->rx_ctrl
= MWL8K_8687_RX_CTRL_OWNED_BY_HOST
;
795 static void mwl8k_rxd_8687_refill(void *_rxd
, dma_addr_t addr
, int len
)
797 struct mwl8k_rxd_8687
*rxd
= _rxd
;
799 rxd
->pkt_len
= cpu_to_le16(len
);
800 rxd
->pkt_phys_addr
= cpu_to_le32(addr
);
806 mwl8k_rxd_8687_process(void *_rxd
, struct ieee80211_rx_status
*status
)
808 struct mwl8k_rxd_8687
*rxd
= _rxd
;
811 if (!(rxd
->rx_ctrl
& MWL8K_8687_RX_CTRL_OWNED_BY_HOST
))
815 rate_info
= le16_to_cpu(rxd
->rate_info
);
817 memset(status
, 0, sizeof(*status
));
819 status
->signal
= -rxd
->rssi
;
820 status
->noise
= -rxd
->noise_level
;
821 status
->qual
= rxd
->link_quality
;
822 status
->antenna
= MWL8K_8687_RATE_INFO_ANTSELECT(rate_info
);
823 status
->rate_idx
= MWL8K_8687_RATE_INFO_RATEID(rate_info
);
825 if (rate_info
& MWL8K_8687_RATE_INFO_SHORTPRE
)
826 status
->flag
|= RX_FLAG_SHORTPRE
;
827 if (rate_info
& MWL8K_8687_RATE_INFO_40MHZ
)
828 status
->flag
|= RX_FLAG_40MHZ
;
829 if (rate_info
& MWL8K_8687_RATE_INFO_SHORTGI
)
830 status
->flag
|= RX_FLAG_SHORT_GI
;
831 if (rate_info
& MWL8K_8687_RATE_INFO_MCS_FORMAT
)
832 status
->flag
|= RX_FLAG_HT
;
834 status
->band
= IEEE80211_BAND_2GHZ
;
835 status
->freq
= ieee80211_channel_to_frequency(rxd
->channel
);
837 return le16_to_cpu(rxd
->pkt_len
);
840 static struct rxd_ops rxd_8687_ops
= {
841 .rxd_size
= sizeof(struct mwl8k_rxd_8687
),
842 .rxd_init
= mwl8k_rxd_8687_init
,
843 .rxd_refill
= mwl8k_rxd_8687_refill
,
844 .rxd_process
= mwl8k_rxd_8687_process
,
848 #define MWL8K_RX_DESCS 256
849 #define MWL8K_RX_MAXSZ 3800
851 static int mwl8k_rxq_init(struct ieee80211_hw
*hw
, int index
)
853 struct mwl8k_priv
*priv
= hw
->priv
;
854 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
862 size
= MWL8K_RX_DESCS
* priv
->rxd_ops
->rxd_size
;
864 rxq
->rxd
= pci_alloc_consistent(priv
->pdev
, size
, &rxq
->rxd_dma
);
865 if (rxq
->rxd
== NULL
) {
866 printk(KERN_ERR
"%s: failed to alloc RX descriptors\n",
867 wiphy_name(hw
->wiphy
));
870 memset(rxq
->rxd
, 0, size
);
872 rxq
->buf
= kmalloc(MWL8K_RX_DESCS
* sizeof(*rxq
->buf
), GFP_KERNEL
);
873 if (rxq
->buf
== NULL
) {
874 printk(KERN_ERR
"%s: failed to alloc RX skbuff list\n",
875 wiphy_name(hw
->wiphy
));
876 pci_free_consistent(priv
->pdev
, size
, rxq
->rxd
, rxq
->rxd_dma
);
879 memset(rxq
->buf
, 0, MWL8K_RX_DESCS
* sizeof(*rxq
->buf
));
881 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
885 dma_addr_t next_dma_addr
;
887 desc_size
= priv
->rxd_ops
->rxd_size
;
888 rxd
= rxq
->rxd
+ (i
* priv
->rxd_ops
->rxd_size
);
891 if (nexti
== MWL8K_RX_DESCS
)
893 next_dma_addr
= rxq
->rxd_dma
+ (nexti
* desc_size
);
895 priv
->rxd_ops
->rxd_init(rxd
, next_dma_addr
);
901 static int rxq_refill(struct ieee80211_hw
*hw
, int index
, int limit
)
903 struct mwl8k_priv
*priv
= hw
->priv
;
904 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
908 while (rxq
->rxd_count
< MWL8K_RX_DESCS
&& limit
--) {
914 skb
= dev_alloc_skb(MWL8K_RX_MAXSZ
);
918 addr
= pci_map_single(priv
->pdev
, skb
->data
,
919 MWL8K_RX_MAXSZ
, DMA_FROM_DEVICE
);
923 if (rxq
->tail
== MWL8K_RX_DESCS
)
925 rxq
->buf
[rx
].skb
= skb
;
926 pci_unmap_addr_set(&rxq
->buf
[rx
], dma
, addr
);
928 rxd
= rxq
->rxd
+ (rx
* priv
->rxd_ops
->rxd_size
);
929 priv
->rxd_ops
->rxd_refill(rxd
, addr
, MWL8K_RX_MAXSZ
);
937 /* Must be called only when the card's reception is completely halted */
938 static void mwl8k_rxq_deinit(struct ieee80211_hw
*hw
, int index
)
940 struct mwl8k_priv
*priv
= hw
->priv
;
941 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
944 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
945 if (rxq
->buf
[i
].skb
!= NULL
) {
946 pci_unmap_single(priv
->pdev
,
947 pci_unmap_addr(&rxq
->buf
[i
], dma
),
948 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
949 pci_unmap_addr_set(&rxq
->buf
[i
], dma
, 0);
951 kfree_skb(rxq
->buf
[i
].skb
);
952 rxq
->buf
[i
].skb
= NULL
;
959 pci_free_consistent(priv
->pdev
,
960 MWL8K_RX_DESCS
* priv
->rxd_ops
->rxd_size
,
961 rxq
->rxd
, rxq
->rxd_dma
);
967 * Scan a list of BSSIDs to process for finalize join.
968 * Allows for extension to process multiple BSSIDs.
971 mwl8k_capture_bssid(struct mwl8k_priv
*priv
, struct ieee80211_hdr
*wh
)
973 return priv
->capture_beacon
&&
974 ieee80211_is_beacon(wh
->frame_control
) &&
975 !compare_ether_addr(wh
->addr3
, priv
->capture_bssid
);
978 static inline void mwl8k_save_beacon(struct ieee80211_hw
*hw
,
981 struct mwl8k_priv
*priv
= hw
->priv
;
983 priv
->capture_beacon
= false;
984 memset(priv
->capture_bssid
, 0, ETH_ALEN
);
987 * Use GFP_ATOMIC as rxq_process is called from
988 * the primary interrupt handler, memory allocation call
991 priv
->beacon_skb
= skb_copy(skb
, GFP_ATOMIC
);
992 if (priv
->beacon_skb
!= NULL
)
993 ieee80211_queue_work(hw
, &priv
->finalize_join_worker
);
996 static int rxq_process(struct ieee80211_hw
*hw
, int index
, int limit
)
998 struct mwl8k_priv
*priv
= hw
->priv
;
999 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
1003 while (rxq
->rxd_count
&& limit
--) {
1004 struct sk_buff
*skb
;
1007 struct ieee80211_rx_status status
;
1009 skb
= rxq
->buf
[rxq
->head
].skb
;
1013 rxd
= rxq
->rxd
+ (rxq
->head
* priv
->rxd_ops
->rxd_size
);
1015 pkt_len
= priv
->rxd_ops
->rxd_process(rxd
, &status
);
1019 rxq
->buf
[rxq
->head
].skb
= NULL
;
1021 pci_unmap_single(priv
->pdev
,
1022 pci_unmap_addr(&rxq
->buf
[rxq
->head
], dma
),
1023 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
1024 pci_unmap_addr_set(&rxq
->buf
[rxq
->head
], dma
, 0);
1027 if (rxq
->head
== MWL8K_RX_DESCS
)
1032 skb_put(skb
, pkt_len
);
1033 mwl8k_remove_dma_header(skb
);
1036 * Check for a pending join operation. Save a
1037 * copy of the beacon and schedule a tasklet to
1038 * send a FINALIZE_JOIN command to the firmware.
1040 if (mwl8k_capture_bssid(priv
, (void *)skb
->data
))
1041 mwl8k_save_beacon(hw
, skb
);
1043 memcpy(IEEE80211_SKB_RXCB(skb
), &status
, sizeof(status
));
1044 ieee80211_rx_irqsafe(hw
, skb
);
1054 * Packet transmission.
1057 /* Transmit packet ACK policy */
1058 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1059 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1061 #define MWL8K_TXD_STATUS_OK 0x00000001
1062 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1063 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1064 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1065 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1067 struct mwl8k_tx_desc
{
1072 __le32 pkt_phys_addr
;
1074 __u8 dest_MAC_addr
[ETH_ALEN
];
1075 __le32 next_txd_phys_addr
;
1080 } __attribute__((packed
));
1082 #define MWL8K_TX_DESCS 128
1084 static int mwl8k_txq_init(struct ieee80211_hw
*hw
, int index
)
1086 struct mwl8k_priv
*priv
= hw
->priv
;
1087 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1091 memset(&txq
->stats
, 0, sizeof(struct ieee80211_tx_queue_stats
));
1092 txq
->stats
.limit
= MWL8K_TX_DESCS
;
1096 size
= MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
);
1098 txq
->txd
= pci_alloc_consistent(priv
->pdev
, size
, &txq
->txd_dma
);
1099 if (txq
->txd
== NULL
) {
1100 printk(KERN_ERR
"%s: failed to alloc TX descriptors\n",
1101 wiphy_name(hw
->wiphy
));
1104 memset(txq
->txd
, 0, size
);
1106 txq
->skb
= kmalloc(MWL8K_TX_DESCS
* sizeof(*txq
->skb
), GFP_KERNEL
);
1107 if (txq
->skb
== NULL
) {
1108 printk(KERN_ERR
"%s: failed to alloc TX skbuff list\n",
1109 wiphy_name(hw
->wiphy
));
1110 pci_free_consistent(priv
->pdev
, size
, txq
->txd
, txq
->txd_dma
);
1113 memset(txq
->skb
, 0, MWL8K_TX_DESCS
* sizeof(*txq
->skb
));
1115 for (i
= 0; i
< MWL8K_TX_DESCS
; i
++) {
1116 struct mwl8k_tx_desc
*tx_desc
;
1119 tx_desc
= txq
->txd
+ i
;
1120 nexti
= (i
+ 1) % MWL8K_TX_DESCS
;
1122 tx_desc
->status
= 0;
1123 tx_desc
->next_txd_phys_addr
=
1124 cpu_to_le32(txq
->txd_dma
+ nexti
* sizeof(*tx_desc
));
1130 static inline void mwl8k_tx_start(struct mwl8k_priv
*priv
)
1132 iowrite32(MWL8K_H2A_INT_PPA_READY
,
1133 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1134 iowrite32(MWL8K_H2A_INT_DUMMY
,
1135 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1136 ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
1139 struct mwl8k_txq_info
{
1148 static int mwl8k_scan_tx_ring(struct mwl8k_priv
*priv
,
1149 struct mwl8k_txq_info
*txinfo
)
1151 int count
, desc
, status
;
1152 struct mwl8k_tx_queue
*txq
;
1153 struct mwl8k_tx_desc
*tx_desc
;
1156 memset(txinfo
, 0, MWL8K_TX_QUEUES
* sizeof(struct mwl8k_txq_info
));
1158 for (count
= 0; count
< MWL8K_TX_QUEUES
; count
++) {
1159 txq
= priv
->txq
+ count
;
1160 txinfo
[count
].len
= txq
->stats
.len
;
1161 txinfo
[count
].head
= txq
->head
;
1162 txinfo
[count
].tail
= txq
->tail
;
1163 for (desc
= 0; desc
< MWL8K_TX_DESCS
; desc
++) {
1164 tx_desc
= txq
->txd
+ desc
;
1165 status
= le32_to_cpu(tx_desc
->status
);
1167 if (status
& MWL8K_TXD_STATUS_FW_OWNED
)
1168 txinfo
[count
].fw_owned
++;
1170 txinfo
[count
].drv_owned
++;
1172 if (tx_desc
->pkt_len
== 0)
1173 txinfo
[count
].unused
++;
1181 * Must be called with priv->fw_mutex held and tx queues stopped.
1183 static int mwl8k_tx_wait_empty(struct ieee80211_hw
*hw
)
1185 struct mwl8k_priv
*priv
= hw
->priv
;
1186 DECLARE_COMPLETION_ONSTACK(tx_wait
);
1188 unsigned long timeout
;
1192 spin_lock_bh(&priv
->tx_lock
);
1193 count
= priv
->pending_tx_pkts
;
1195 priv
->tx_wait
= &tx_wait
;
1196 spin_unlock_bh(&priv
->tx_lock
);
1199 struct mwl8k_txq_info txinfo
[MWL8K_TX_QUEUES
];
1203 timeout
= wait_for_completion_timeout(&tx_wait
,
1204 msecs_to_jiffies(5000));
1208 spin_lock_bh(&priv
->tx_lock
);
1209 priv
->tx_wait
= NULL
;
1210 newcount
= priv
->pending_tx_pkts
;
1211 mwl8k_scan_tx_ring(priv
, txinfo
);
1212 spin_unlock_bh(&priv
->tx_lock
);
1214 printk(KERN_ERR
"%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1215 __func__
, __LINE__
, count
, newcount
);
1217 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++)
1218 printk(KERN_ERR
"TXQ:%u L:%u H:%u T:%u FW:%u "
1224 txinfo
[index
].fw_owned
,
1225 txinfo
[index
].drv_owned
,
1226 txinfo
[index
].unused
);
1234 #define MWL8K_TXD_SUCCESS(status) \
1235 ((status) & (MWL8K_TXD_STATUS_OK | \
1236 MWL8K_TXD_STATUS_OK_RETRY | \
1237 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1239 static void mwl8k_txq_reclaim(struct ieee80211_hw
*hw
, int index
, int force
)
1241 struct mwl8k_priv
*priv
= hw
->priv
;
1242 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1245 while (txq
->stats
.len
> 0) {
1247 struct mwl8k_tx_desc
*tx_desc
;
1250 struct sk_buff
*skb
;
1251 struct ieee80211_tx_info
*info
;
1255 tx_desc
= txq
->txd
+ tx
;
1257 status
= le32_to_cpu(tx_desc
->status
);
1259 if (status
& MWL8K_TXD_STATUS_FW_OWNED
) {
1263 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
);
1266 txq
->head
= (tx
+ 1) % MWL8K_TX_DESCS
;
1267 BUG_ON(txq
->stats
.len
== 0);
1269 priv
->pending_tx_pkts
--;
1271 addr
= le32_to_cpu(tx_desc
->pkt_phys_addr
);
1272 size
= le16_to_cpu(tx_desc
->pkt_len
);
1274 txq
->skb
[tx
] = NULL
;
1276 BUG_ON(skb
== NULL
);
1277 pci_unmap_single(priv
->pdev
, addr
, size
, PCI_DMA_TODEVICE
);
1279 mwl8k_remove_dma_header(skb
);
1281 /* Mark descriptor as unused */
1282 tx_desc
->pkt_phys_addr
= 0;
1283 tx_desc
->pkt_len
= 0;
1285 info
= IEEE80211_SKB_CB(skb
);
1286 ieee80211_tx_info_clear_status(info
);
1287 if (MWL8K_TXD_SUCCESS(status
))
1288 info
->flags
|= IEEE80211_TX_STAT_ACK
;
1290 ieee80211_tx_status_irqsafe(hw
, skb
);
1295 if (wake
&& priv
->radio_on
&& !mutex_is_locked(&priv
->fw_mutex
))
1296 ieee80211_wake_queue(hw
, index
);
1299 /* must be called only when the card's transmit is completely halted */
1300 static void mwl8k_txq_deinit(struct ieee80211_hw
*hw
, int index
)
1302 struct mwl8k_priv
*priv
= hw
->priv
;
1303 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1305 mwl8k_txq_reclaim(hw
, index
, 1);
1310 pci_free_consistent(priv
->pdev
,
1311 MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
),
1312 txq
->txd
, txq
->txd_dma
);
1317 mwl8k_txq_xmit(struct ieee80211_hw
*hw
, int index
, struct sk_buff
*skb
)
1319 struct mwl8k_priv
*priv
= hw
->priv
;
1320 struct ieee80211_tx_info
*tx_info
;
1321 struct mwl8k_vif
*mwl8k_vif
;
1322 struct ieee80211_hdr
*wh
;
1323 struct mwl8k_tx_queue
*txq
;
1324 struct mwl8k_tx_desc
*tx
;
1330 wh
= (struct ieee80211_hdr
*)skb
->data
;
1331 if (ieee80211_is_data_qos(wh
->frame_control
))
1332 qos
= le16_to_cpu(*((__le16
*)ieee80211_get_qos_ctl(wh
)));
1336 mwl8k_add_dma_header(skb
);
1337 wh
= &((struct mwl8k_dma_data
*)skb
->data
)->wh
;
1339 tx_info
= IEEE80211_SKB_CB(skb
);
1340 mwl8k_vif
= MWL8K_VIF(tx_info
->control
.vif
);
1342 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
1343 u16 seqno
= mwl8k_vif
->seqno
;
1345 wh
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
1346 wh
->seq_ctrl
|= cpu_to_le16(seqno
<< 4);
1347 mwl8k_vif
->seqno
= seqno
++ % 4096;
1350 /* Setup firmware control bit fields for each frame type. */
1353 if (ieee80211_is_mgmt(wh
->frame_control
) ||
1354 ieee80211_is_ctl(wh
->frame_control
)) {
1356 qos
= mwl8k_qos_setbit_eosp(qos
);
1357 /* Set Queue size to unspecified */
1358 qos
= mwl8k_qos_setbit_qlen(qos
, 0xff);
1359 } else if (ieee80211_is_data(wh
->frame_control
)) {
1361 if (is_multicast_ether_addr(wh
->addr1
))
1362 txstatus
|= MWL8K_TXD_STATUS_MULTICAST_TX
;
1364 /* Send pkt in an aggregate if AMPDU frame. */
1365 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1366 qos
= mwl8k_qos_setbit_ack(qos
,
1367 MWL8K_TXD_ACK_POLICY_BLOCKACK
);
1369 qos
= mwl8k_qos_setbit_ack(qos
,
1370 MWL8K_TXD_ACK_POLICY_NORMAL
);
1372 if (qos
& IEEE80211_QOS_CONTROL_A_MSDU_PRESENT
)
1373 qos
= mwl8k_qos_setbit_amsdu(qos
);
1376 dma
= pci_map_single(priv
->pdev
, skb
->data
,
1377 skb
->len
, PCI_DMA_TODEVICE
);
1379 if (pci_dma_mapping_error(priv
->pdev
, dma
)) {
1380 printk(KERN_DEBUG
"%s: failed to dma map skb, "
1381 "dropping TX frame.\n", wiphy_name(hw
->wiphy
));
1383 return NETDEV_TX_OK
;
1386 spin_lock_bh(&priv
->tx_lock
);
1388 txq
= priv
->txq
+ index
;
1390 BUG_ON(txq
->skb
[txq
->tail
] != NULL
);
1391 txq
->skb
[txq
->tail
] = skb
;
1393 tx
= txq
->txd
+ txq
->tail
;
1394 tx
->data_rate
= txdatarate
;
1395 tx
->tx_priority
= index
;
1396 tx
->qos_control
= cpu_to_le16(qos
);
1397 tx
->pkt_phys_addr
= cpu_to_le32(dma
);
1398 tx
->pkt_len
= cpu_to_le16(skb
->len
);
1400 tx
->peer_id
= mwl8k_vif
->peer_id
;
1402 tx
->status
= cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
| txstatus
);
1406 priv
->pending_tx_pkts
++;
1409 if (txq
->tail
== MWL8K_TX_DESCS
)
1412 if (txq
->head
== txq
->tail
)
1413 ieee80211_stop_queue(hw
, index
);
1415 mwl8k_tx_start(priv
);
1417 spin_unlock_bh(&priv
->tx_lock
);
1419 return NETDEV_TX_OK
;
1426 * We have the following requirements for issuing firmware commands:
1427 * - Some commands require that the packet transmit path is idle when
1428 * the command is issued. (For simplicity, we'll just quiesce the
1429 * transmit path for every command.)
1430 * - There are certain sequences of commands that need to be issued to
1431 * the hardware sequentially, with no other intervening commands.
1433 * This leads to an implementation of a "firmware lock" as a mutex that
1434 * can be taken recursively, and which is taken by both the low-level
1435 * command submission function (mwl8k_post_cmd) as well as any users of
1436 * that function that require issuing of an atomic sequence of commands,
1437 * and quiesces the transmit path whenever it's taken.
1439 static int mwl8k_fw_lock(struct ieee80211_hw
*hw
)
1441 struct mwl8k_priv
*priv
= hw
->priv
;
1443 if (priv
->fw_mutex_owner
!= current
) {
1446 mutex_lock(&priv
->fw_mutex
);
1447 ieee80211_stop_queues(hw
);
1449 rc
= mwl8k_tx_wait_empty(hw
);
1451 ieee80211_wake_queues(hw
);
1452 mutex_unlock(&priv
->fw_mutex
);
1457 priv
->fw_mutex_owner
= current
;
1460 priv
->fw_mutex_depth
++;
1465 static void mwl8k_fw_unlock(struct ieee80211_hw
*hw
)
1467 struct mwl8k_priv
*priv
= hw
->priv
;
1469 if (!--priv
->fw_mutex_depth
) {
1470 ieee80211_wake_queues(hw
);
1471 priv
->fw_mutex_owner
= NULL
;
1472 mutex_unlock(&priv
->fw_mutex
);
1478 * Command processing.
1481 /* Timeout firmware commands after 2000ms */
1482 #define MWL8K_CMD_TIMEOUT_MS 2000
1484 static int mwl8k_post_cmd(struct ieee80211_hw
*hw
, struct mwl8k_cmd_pkt
*cmd
)
1486 DECLARE_COMPLETION_ONSTACK(cmd_wait
);
1487 struct mwl8k_priv
*priv
= hw
->priv
;
1488 void __iomem
*regs
= priv
->regs
;
1489 dma_addr_t dma_addr
;
1490 unsigned int dma_size
;
1492 unsigned long timeout
= 0;
1495 cmd
->result
= 0xffff;
1496 dma_size
= le16_to_cpu(cmd
->length
);
1497 dma_addr
= pci_map_single(priv
->pdev
, cmd
, dma_size
,
1498 PCI_DMA_BIDIRECTIONAL
);
1499 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
1502 rc
= mwl8k_fw_lock(hw
);
1504 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1505 PCI_DMA_BIDIRECTIONAL
);
1509 priv
->hostcmd_wait
= &cmd_wait
;
1510 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
1511 iowrite32(MWL8K_H2A_INT_DOORBELL
,
1512 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1513 iowrite32(MWL8K_H2A_INT_DUMMY
,
1514 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1516 timeout
= wait_for_completion_timeout(&cmd_wait
,
1517 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS
));
1519 priv
->hostcmd_wait
= NULL
;
1521 mwl8k_fw_unlock(hw
);
1523 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1524 PCI_DMA_BIDIRECTIONAL
);
1527 printk(KERN_ERR
"%s: Command %s timeout after %u ms\n",
1528 wiphy_name(hw
->wiphy
),
1529 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1530 MWL8K_CMD_TIMEOUT_MS
);
1533 rc
= cmd
->result
? -EINVAL
: 0;
1535 printk(KERN_ERR
"%s: Command %s error 0x%x\n",
1536 wiphy_name(hw
->wiphy
),
1537 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1538 le16_to_cpu(cmd
->result
));
1545 * CMD_GET_HW_SPEC (STA version).
1547 struct mwl8k_cmd_get_hw_spec_sta
{
1548 struct mwl8k_cmd_pkt header
;
1550 __u8 host_interface
;
1552 __u8 perm_addr
[ETH_ALEN
];
1557 __u8 mcs_bitmap
[16];
1558 __le32 rx_queue_ptr
;
1559 __le32 num_tx_queues
;
1560 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1562 __le32 num_tx_desc_per_queue
;
1564 } __attribute__((packed
));
1566 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw
*hw
)
1568 struct mwl8k_priv
*priv
= hw
->priv
;
1569 struct mwl8k_cmd_get_hw_spec_sta
*cmd
;
1573 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1577 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1578 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1580 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1581 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1582 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rxd_dma
);
1583 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1584 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1585 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].txd_dma
);
1586 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1587 cmd
->total_rxd
= cpu_to_le32(MWL8K_RX_DESCS
);
1589 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1592 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1593 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1594 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1595 priv
->hw_rev
= cmd
->hw_rev
;
1603 * CMD_GET_HW_SPEC (AP version).
1605 struct mwl8k_cmd_get_hw_spec_ap
{
1606 struct mwl8k_cmd_pkt header
;
1608 __u8 host_interface
;
1611 __u8 perm_addr
[ETH_ALEN
];
1622 } __attribute__((packed
));
1624 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw
*hw
)
1626 struct mwl8k_priv
*priv
= hw
->priv
;
1627 struct mwl8k_cmd_get_hw_spec_ap
*cmd
;
1630 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1634 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1635 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1637 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1638 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1640 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1645 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1646 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1647 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1648 priv
->hw_rev
= cmd
->hw_rev
;
1650 off
= le32_to_cpu(cmd
->wcbbase0
) & 0xffff;
1651 iowrite32(cpu_to_le32(priv
->txq
[0].txd_dma
), priv
->sram
+ off
);
1653 off
= le32_to_cpu(cmd
->rxwrptr
) & 0xffff;
1654 iowrite32(cpu_to_le32(priv
->rxq
[0].rxd_dma
), priv
->sram
+ off
);
1656 off
= le32_to_cpu(cmd
->rxrdptr
) & 0xffff;
1657 iowrite32(cpu_to_le32(priv
->rxq
[0].rxd_dma
), priv
->sram
+ off
);
1659 off
= le32_to_cpu(cmd
->wcbbase1
) & 0xffff;
1660 iowrite32(cpu_to_le32(priv
->txq
[1].txd_dma
), priv
->sram
+ off
);
1662 off
= le32_to_cpu(cmd
->wcbbase2
) & 0xffff;
1663 iowrite32(cpu_to_le32(priv
->txq
[2].txd_dma
), priv
->sram
+ off
);
1665 off
= le32_to_cpu(cmd
->wcbbase3
) & 0xffff;
1666 iowrite32(cpu_to_le32(priv
->txq
[3].txd_dma
), priv
->sram
+ off
);
1676 struct mwl8k_cmd_set_hw_spec
{
1677 struct mwl8k_cmd_pkt header
;
1679 __u8 host_interface
;
1681 __u8 perm_addr
[ETH_ALEN
];
1686 __le32 rx_queue_ptr
;
1687 __le32 num_tx_queues
;
1688 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1690 __le32 num_tx_desc_per_queue
;
1692 } __attribute__((packed
));
1694 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1696 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw
*hw
)
1698 struct mwl8k_priv
*priv
= hw
->priv
;
1699 struct mwl8k_cmd_set_hw_spec
*cmd
;
1703 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1707 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_HW_SPEC
);
1708 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1710 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1711 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rxd_dma
);
1712 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1713 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1714 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].txd_dma
);
1715 cmd
->flags
= cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT
);
1716 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1717 cmd
->total_rxd
= cpu_to_le32(MWL8K_RX_DESCS
);
1719 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1726 * CMD_MAC_MULTICAST_ADR.
1728 struct mwl8k_cmd_mac_multicast_adr
{
1729 struct mwl8k_cmd_pkt header
;
1732 __u8 addr
[0][ETH_ALEN
];
1735 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1736 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1737 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1738 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1740 static struct mwl8k_cmd_pkt
*
1741 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw
*hw
, int allmulti
,
1742 int mc_count
, struct dev_addr_list
*mclist
)
1744 struct mwl8k_priv
*priv
= hw
->priv
;
1745 struct mwl8k_cmd_mac_multicast_adr
*cmd
;
1748 if (allmulti
|| mc_count
> priv
->num_mcaddrs
) {
1753 size
= sizeof(*cmd
) + mc_count
* ETH_ALEN
;
1755 cmd
= kzalloc(size
, GFP_ATOMIC
);
1759 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR
);
1760 cmd
->header
.length
= cpu_to_le16(size
);
1761 cmd
->action
= cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED
|
1762 MWL8K_ENABLE_RX_BROADCAST
);
1765 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST
);
1766 } else if (mc_count
) {
1769 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST
);
1770 cmd
->numaddr
= cpu_to_le16(mc_count
);
1771 for (i
= 0; i
< mc_count
&& mclist
; i
++) {
1772 if (mclist
->da_addrlen
!= ETH_ALEN
) {
1776 memcpy(cmd
->addr
[i
], mclist
->da_addr
, ETH_ALEN
);
1777 mclist
= mclist
->next
;
1781 return &cmd
->header
;
1785 * CMD_802_11_GET_STAT.
1787 struct mwl8k_cmd_802_11_get_stat
{
1788 struct mwl8k_cmd_pkt header
;
1790 } __attribute__((packed
));
1792 #define MWL8K_STAT_ACK_FAILURE 9
1793 #define MWL8K_STAT_RTS_FAILURE 12
1794 #define MWL8K_STAT_FCS_ERROR 24
1795 #define MWL8K_STAT_RTS_SUCCESS 11
1797 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw
*hw
,
1798 struct ieee80211_low_level_stats
*stats
)
1800 struct mwl8k_cmd_802_11_get_stat
*cmd
;
1803 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1807 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_STAT
);
1808 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1810 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1812 stats
->dot11ACKFailureCount
=
1813 le32_to_cpu(cmd
->stats
[MWL8K_STAT_ACK_FAILURE
]);
1814 stats
->dot11RTSFailureCount
=
1815 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_FAILURE
]);
1816 stats
->dot11FCSErrorCount
=
1817 le32_to_cpu(cmd
->stats
[MWL8K_STAT_FCS_ERROR
]);
1818 stats
->dot11RTSSuccessCount
=
1819 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_SUCCESS
]);
1827 * CMD_802_11_RADIO_CONTROL.
1829 struct mwl8k_cmd_802_11_radio_control
{
1830 struct mwl8k_cmd_pkt header
;
1834 } __attribute__((packed
));
1837 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw
*hw
, bool enable
, bool force
)
1839 struct mwl8k_priv
*priv
= hw
->priv
;
1840 struct mwl8k_cmd_802_11_radio_control
*cmd
;
1843 if (enable
== priv
->radio_on
&& !force
)
1846 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1850 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RADIO_CONTROL
);
1851 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1852 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1853 cmd
->control
= cpu_to_le16(priv
->radio_short_preamble
? 3 : 1);
1854 cmd
->radio_on
= cpu_to_le16(enable
? 0x0001 : 0x0000);
1856 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1860 priv
->radio_on
= enable
;
1865 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw
*hw
)
1867 return mwl8k_cmd_802_11_radio_control(hw
, 0, 0);
1870 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw
*hw
)
1872 return mwl8k_cmd_802_11_radio_control(hw
, 1, 0);
1876 mwl8k_set_radio_preamble(struct ieee80211_hw
*hw
, bool short_preamble
)
1878 struct mwl8k_priv
*priv
;
1880 if (hw
== NULL
|| hw
->priv
== NULL
)
1884 priv
->radio_short_preamble
= short_preamble
;
1886 return mwl8k_cmd_802_11_radio_control(hw
, 1, 1);
1890 * CMD_802_11_RF_TX_POWER.
1892 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1894 struct mwl8k_cmd_802_11_rf_tx_power
{
1895 struct mwl8k_cmd_pkt header
;
1897 __le16 support_level
;
1898 __le16 current_level
;
1900 __le16 power_level_list
[MWL8K_TX_POWER_LEVEL_TOTAL
];
1901 } __attribute__((packed
));
1903 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw
*hw
, int dBm
)
1905 struct mwl8k_cmd_802_11_rf_tx_power
*cmd
;
1908 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1912 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_TX_POWER
);
1913 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1914 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1915 cmd
->support_level
= cpu_to_le16(dBm
);
1917 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1926 struct mwl8k_cmd_rf_antenna
{
1927 struct mwl8k_cmd_pkt header
;
1930 } __attribute__((packed
));
1932 #define MWL8K_RF_ANTENNA_RX 1
1933 #define MWL8K_RF_ANTENNA_TX 2
1936 mwl8k_cmd_rf_antenna(struct ieee80211_hw
*hw
, int antenna
, int mask
)
1938 struct mwl8k_cmd_rf_antenna
*cmd
;
1941 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1945 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_ANTENNA
);
1946 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1947 cmd
->antenna
= cpu_to_le16(antenna
);
1948 cmd
->mode
= cpu_to_le16(mask
);
1950 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1959 struct mwl8k_cmd_set_pre_scan
{
1960 struct mwl8k_cmd_pkt header
;
1961 } __attribute__((packed
));
1963 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw
*hw
)
1965 struct mwl8k_cmd_set_pre_scan
*cmd
;
1968 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1972 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN
);
1973 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1975 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1982 * CMD_SET_POST_SCAN.
1984 struct mwl8k_cmd_set_post_scan
{
1985 struct mwl8k_cmd_pkt header
;
1987 __u8 bssid
[ETH_ALEN
];
1988 } __attribute__((packed
));
1991 mwl8k_cmd_set_post_scan(struct ieee80211_hw
*hw
, __u8
*mac
)
1993 struct mwl8k_cmd_set_post_scan
*cmd
;
1996 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2000 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_POST_SCAN
);
2001 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2003 memcpy(cmd
->bssid
, mac
, ETH_ALEN
);
2005 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2012 * CMD_SET_RF_CHANNEL.
2014 struct mwl8k_cmd_set_rf_channel
{
2015 struct mwl8k_cmd_pkt header
;
2017 __u8 current_channel
;
2018 __le32 channel_flags
;
2019 } __attribute__((packed
));
2021 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw
*hw
,
2022 struct ieee80211_channel
*channel
)
2024 struct mwl8k_cmd_set_rf_channel
*cmd
;
2027 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2031 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL
);
2032 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2033 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2034 cmd
->current_channel
= channel
->hw_value
;
2035 if (channel
->band
== IEEE80211_BAND_2GHZ
)
2036 cmd
->channel_flags
= cpu_to_le32(0x00000081);
2038 cmd
->channel_flags
= cpu_to_le32(0x00000000);
2040 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2049 struct mwl8k_cmd_set_slot
{
2050 struct mwl8k_cmd_pkt header
;
2053 } __attribute__((packed
));
2055 static int mwl8k_cmd_set_slot(struct ieee80211_hw
*hw
, bool short_slot_time
)
2057 struct mwl8k_cmd_set_slot
*cmd
;
2060 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2064 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_SLOT
);
2065 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2066 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2067 cmd
->short_slot
= short_slot_time
;
2069 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2078 struct mwl8k_cmd_mimo_config
{
2079 struct mwl8k_cmd_pkt header
;
2081 __u8 rx_antenna_map
;
2082 __u8 tx_antenna_map
;
2083 } __attribute__((packed
));
2085 static int mwl8k_cmd_mimo_config(struct ieee80211_hw
*hw
, __u8 rx
, __u8 tx
)
2087 struct mwl8k_cmd_mimo_config
*cmd
;
2090 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2094 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MIMO_CONFIG
);
2095 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2096 cmd
->action
= cpu_to_le32((u32
)MWL8K_CMD_SET
);
2097 cmd
->rx_antenna_map
= rx
;
2098 cmd
->tx_antenna_map
= tx
;
2100 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2107 * CMD_ENABLE_SNIFFER.
2109 struct mwl8k_cmd_enable_sniffer
{
2110 struct mwl8k_cmd_pkt header
;
2112 } __attribute__((packed
));
2114 static int mwl8k_enable_sniffer(struct ieee80211_hw
*hw
, bool enable
)
2116 struct mwl8k_cmd_enable_sniffer
*cmd
;
2119 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2123 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER
);
2124 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2125 cmd
->action
= cpu_to_le32(!!enable
);
2127 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2136 struct mwl8k_cmd_set_mac_addr
{
2137 struct mwl8k_cmd_pkt header
;
2138 __u8 mac_addr
[ETH_ALEN
];
2139 } __attribute__((packed
));
2141 static int mwl8k_set_mac_addr(struct ieee80211_hw
*hw
, u8
*mac
)
2143 struct mwl8k_cmd_set_mac_addr
*cmd
;
2146 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2150 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR
);
2151 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2152 memcpy(cmd
->mac_addr
, mac
, ETH_ALEN
);
2154 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2162 * CMD_SET_RATEADAPT_MODE.
2164 struct mwl8k_cmd_set_rate_adapt_mode
{
2165 struct mwl8k_cmd_pkt header
;
2168 } __attribute__((packed
));
2170 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw
*hw
, __u16 mode
)
2172 struct mwl8k_cmd_set_rate_adapt_mode
*cmd
;
2175 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2179 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE
);
2180 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2181 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2182 cmd
->mode
= cpu_to_le16(mode
);
2184 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2193 struct mwl8k_cmd_set_wmm
{
2194 struct mwl8k_cmd_pkt header
;
2196 } __attribute__((packed
));
2198 static int mwl8k_set_wmm(struct ieee80211_hw
*hw
, bool enable
)
2200 struct mwl8k_priv
*priv
= hw
->priv
;
2201 struct mwl8k_cmd_set_wmm
*cmd
;
2204 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2208 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_WMM_MODE
);
2209 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2210 cmd
->action
= cpu_to_le16(!!enable
);
2212 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2216 priv
->wmm_enabled
= enable
;
2222 * CMD_SET_RTS_THRESHOLD.
2224 struct mwl8k_cmd_rts_threshold
{
2225 struct mwl8k_cmd_pkt header
;
2228 } __attribute__((packed
));
2230 static int mwl8k_rts_threshold(struct ieee80211_hw
*hw
,
2231 u16 action
, u16 threshold
)
2233 struct mwl8k_cmd_rts_threshold
*cmd
;
2236 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2240 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD
);
2241 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2242 cmd
->action
= cpu_to_le16(action
);
2243 cmd
->threshold
= cpu_to_le16(threshold
);
2245 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2252 * CMD_SET_EDCA_PARAMS.
2254 struct mwl8k_cmd_set_edca_params
{
2255 struct mwl8k_cmd_pkt header
;
2257 /* See MWL8K_SET_EDCA_XXX below */
2260 /* TX opportunity in units of 32 us */
2263 /* Log exponent of max contention period: 0...15*/
2266 /* Log exponent of min contention period: 0...15 */
2269 /* Adaptive interframe spacing in units of 32us */
2272 /* TX queue to configure */
2274 } __attribute__((packed
));
2276 #define MWL8K_SET_EDCA_CW 0x01
2277 #define MWL8K_SET_EDCA_TXOP 0x02
2278 #define MWL8K_SET_EDCA_AIFS 0x04
2280 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2281 MWL8K_SET_EDCA_TXOP | \
2282 MWL8K_SET_EDCA_AIFS)
2285 mwl8k_set_edca_params(struct ieee80211_hw
*hw
, __u8 qnum
,
2286 __u16 cw_min
, __u16 cw_max
,
2287 __u8 aifs
, __u16 txop
)
2289 struct mwl8k_cmd_set_edca_params
*cmd
;
2292 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2297 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2300 qnum
^= !(qnum
>> 1);
2302 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS
);
2303 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2304 cmd
->action
= cpu_to_le16(MWL8K_SET_EDCA_ALL
);
2305 cmd
->txop
= cpu_to_le16(txop
);
2306 cmd
->log_cw_max
= (u8
)ilog2(cw_max
+ 1);
2307 cmd
->log_cw_min
= (u8
)ilog2(cw_min
+ 1);
2311 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2318 * CMD_FINALIZE_JOIN.
2321 /* FJ beacon buffer size is compiled into the firmware. */
2322 #define MWL8K_FJ_BEACON_MAXLEN 128
2324 struct mwl8k_cmd_finalize_join
{
2325 struct mwl8k_cmd_pkt header
;
2326 __le32 sleep_interval
; /* Number of beacon periods to sleep */
2327 __u8 beacon_data
[MWL8K_FJ_BEACON_MAXLEN
];
2328 } __attribute__((packed
));
2330 static int mwl8k_finalize_join(struct ieee80211_hw
*hw
, void *frame
,
2331 __u16 framelen
, __u16 dtim
)
2333 struct mwl8k_cmd_finalize_join
*cmd
;
2334 struct ieee80211_mgmt
*payload
= frame
;
2342 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2346 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN
);
2347 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2348 cmd
->sleep_interval
= cpu_to_le32(dtim
? dtim
: 1);
2350 hdrlen
= ieee80211_hdrlen(payload
->frame_control
);
2352 payload_len
= framelen
> hdrlen
? framelen
- hdrlen
: 0;
2354 /* XXX TBD Might just have to abort and return an error */
2355 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2356 printk(KERN_ERR
"%s(): WARNING: Incomplete beacon "
2357 "sent to firmware. Sz=%u MAX=%u\n", __func__
,
2358 payload_len
, MWL8K_FJ_BEACON_MAXLEN
);
2360 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2361 payload_len
= MWL8K_FJ_BEACON_MAXLEN
;
2363 if (payload
&& payload_len
)
2364 memcpy(cmd
->beacon_data
, &payload
->u
.beacon
, payload_len
);
2366 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2374 struct mwl8k_cmd_update_sta_db
{
2375 struct mwl8k_cmd_pkt header
;
2377 /* See STADB_ACTION_TYPE */
2380 /* Peer MAC address */
2381 __u8 peer_addr
[ETH_ALEN
];
2385 /* Peer info - valid during add/update. */
2386 struct peer_capability_info peer_info
;
2387 } __attribute__((packed
));
2389 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw
*hw
,
2390 struct ieee80211_vif
*vif
, __u32 action
)
2392 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2393 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2394 struct mwl8k_cmd_update_sta_db
*cmd
;
2395 struct peer_capability_info
*peer_info
;
2396 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2400 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2404 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_UPDATE_STADB
);
2405 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2407 cmd
->action
= cpu_to_le32(action
);
2408 peer_info
= &cmd
->peer_info
;
2409 memcpy(cmd
->peer_addr
, mv_vif
->bssid
, ETH_ALEN
);
2412 case MWL8K_STA_DB_ADD_ENTRY
:
2413 case MWL8K_STA_DB_MODIFY_ENTRY
:
2414 /* Build peer_info block */
2415 peer_info
->peer_type
= MWL8K_PEER_TYPE_ACCESSPOINT
;
2416 peer_info
->basic_caps
= cpu_to_le16(info
->assoc_capability
);
2417 peer_info
->interop
= 1;
2418 peer_info
->amsdu_enabled
= 0;
2420 rates
= peer_info
->legacy_rates
;
2421 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2422 rates
[count
] = bitrates
[count
].hw_value
;
2424 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2426 mv_vif
->peer_id
= peer_info
->station_id
;
2430 case MWL8K_STA_DB_DEL_ENTRY
:
2431 case MWL8K_STA_DB_FLUSH
:
2433 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2435 mv_vif
->peer_id
= 0;
2446 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2448 #define MWL8K_FRAME_PROT_DISABLED 0x00
2449 #define MWL8K_FRAME_PROT_11G 0x07
2450 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2451 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2453 struct mwl8k_cmd_update_set_aid
{
2454 struct mwl8k_cmd_pkt header
;
2457 /* AP's MAC address (BSSID) */
2458 __u8 bssid
[ETH_ALEN
];
2459 __le16 protection_mode
;
2460 __u8 supp_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2461 } __attribute__((packed
));
2463 static int mwl8k_cmd_set_aid(struct ieee80211_hw
*hw
,
2464 struct ieee80211_vif
*vif
)
2466 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2467 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2468 struct mwl8k_cmd_update_set_aid
*cmd
;
2469 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2474 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2478 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_AID
);
2479 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2480 cmd
->aid
= cpu_to_le16(info
->aid
);
2482 memcpy(cmd
->bssid
, mv_vif
->bssid
, ETH_ALEN
);
2484 if (info
->use_cts_prot
) {
2485 prot_mode
= MWL8K_FRAME_PROT_11G
;
2487 switch (info
->ht_operation_mode
&
2488 IEEE80211_HT_OP_MODE_PROTECTION
) {
2489 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
:
2490 prot_mode
= MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY
;
2492 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED
:
2493 prot_mode
= MWL8K_FRAME_PROT_11N_HT_ALL
;
2496 prot_mode
= MWL8K_FRAME_PROT_DISABLED
;
2500 cmd
->protection_mode
= cpu_to_le16(prot_mode
);
2502 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2503 cmd
->supp_rates
[count
] = bitrates
[count
].hw_value
;
2505 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2514 struct mwl8k_cmd_update_rateset
{
2515 struct mwl8k_cmd_pkt header
;
2516 __u8 legacy_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2518 /* Bitmap for supported MCS codes. */
2519 __u8 mcs_set
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2520 __u8 reserved
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2521 } __attribute__((packed
));
2523 static int mwl8k_update_rateset(struct ieee80211_hw
*hw
,
2524 struct ieee80211_vif
*vif
)
2526 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2527 struct mwl8k_cmd_update_rateset
*cmd
;
2528 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2532 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2536 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATE
);
2537 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2539 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2540 cmd
->legacy_rates
[count
] = bitrates
[count
].hw_value
;
2542 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2549 * CMD_USE_FIXED_RATE.
2551 #define MWL8K_RATE_TABLE_SIZE 8
2552 #define MWL8K_UCAST_RATE 0
2553 #define MWL8K_USE_AUTO_RATE 0x0002
2555 struct mwl8k_rate_entry
{
2556 /* Set to 1 if HT rate, 0 if legacy. */
2559 /* Set to 1 to use retry_count field. */
2560 __le32 enable_retry
;
2562 /* Specified legacy rate or MCS. */
2565 /* Number of allowed retries. */
2567 } __attribute__((packed
));
2569 struct mwl8k_rate_table
{
2570 /* 1 to allow specified rate and below */
2571 __le32 allow_rate_drop
;
2573 struct mwl8k_rate_entry rate_entry
[MWL8K_RATE_TABLE_SIZE
];
2574 } __attribute__((packed
));
2576 struct mwl8k_cmd_use_fixed_rate
{
2577 struct mwl8k_cmd_pkt header
;
2579 struct mwl8k_rate_table rate_table
;
2581 /* Unicast, Broadcast or Multicast */
2585 } __attribute__((packed
));
2587 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw
*hw
,
2588 u32 action
, u32 rate_type
, struct mwl8k_rate_table
*rate_table
)
2590 struct mwl8k_cmd_use_fixed_rate
*cmd
;
2594 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2598 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE
);
2599 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2601 cmd
->action
= cpu_to_le32(action
);
2602 cmd
->rate_type
= cpu_to_le32(rate_type
);
2604 if (rate_table
!= NULL
) {
2606 * Copy over each field manually so that endian
2607 * conversion can be done.
2609 cmd
->rate_table
.allow_rate_drop
=
2610 cpu_to_le32(rate_table
->allow_rate_drop
);
2611 cmd
->rate_table
.num_rates
=
2612 cpu_to_le32(rate_table
->num_rates
);
2614 for (count
= 0; count
< rate_table
->num_rates
; count
++) {
2615 struct mwl8k_rate_entry
*dst
=
2616 &cmd
->rate_table
.rate_entry
[count
];
2617 struct mwl8k_rate_entry
*src
=
2618 &rate_table
->rate_entry
[count
];
2620 dst
->is_ht_rate
= cpu_to_le32(src
->is_ht_rate
);
2621 dst
->enable_retry
= cpu_to_le32(src
->enable_retry
);
2622 dst
->rate
= cpu_to_le32(src
->rate
);
2623 dst
->retry_count
= cpu_to_le32(src
->retry_count
);
2627 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2635 * Interrupt handling.
2637 static irqreturn_t
mwl8k_interrupt(int irq
, void *dev_id
)
2639 struct ieee80211_hw
*hw
= dev_id
;
2640 struct mwl8k_priv
*priv
= hw
->priv
;
2643 status
= ioread32(priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2644 iowrite32(~status
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2649 if (status
& MWL8K_A2H_INT_TX_DONE
)
2650 tasklet_schedule(&priv
->tx_reclaim_task
);
2652 if (status
& MWL8K_A2H_INT_RX_READY
) {
2653 while (rxq_process(hw
, 0, 1))
2654 rxq_refill(hw
, 0, 1);
2657 if (status
& MWL8K_A2H_INT_OPC_DONE
) {
2658 if (priv
->hostcmd_wait
!= NULL
)
2659 complete(priv
->hostcmd_wait
);
2662 if (status
& MWL8K_A2H_INT_QUEUE_EMPTY
) {
2663 if (!mutex_is_locked(&priv
->fw_mutex
) &&
2664 priv
->radio_on
&& priv
->pending_tx_pkts
)
2665 mwl8k_tx_start(priv
);
2673 * Core driver operations.
2675 static int mwl8k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2677 struct mwl8k_priv
*priv
= hw
->priv
;
2678 int index
= skb_get_queue_mapping(skb
);
2681 if (priv
->current_channel
== NULL
) {
2682 printk(KERN_DEBUG
"%s: dropped TX frame since radio "
2683 "disabled\n", wiphy_name(hw
->wiphy
));
2685 return NETDEV_TX_OK
;
2688 rc
= mwl8k_txq_xmit(hw
, index
, skb
);
2693 static int mwl8k_start(struct ieee80211_hw
*hw
)
2695 struct mwl8k_priv
*priv
= hw
->priv
;
2698 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2699 IRQF_SHARED
, MWL8K_NAME
, hw
);
2701 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2702 wiphy_name(hw
->wiphy
));
2706 /* Enable tx reclaim tasklet */
2707 tasklet_enable(&priv
->tx_reclaim_task
);
2709 /* Enable interrupts */
2710 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2712 rc
= mwl8k_fw_lock(hw
);
2714 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2717 rc
= mwl8k_cmd_set_pre_scan(hw
);
2720 rc
= mwl8k_cmd_set_post_scan(hw
,
2721 "\x00\x00\x00\x00\x00\x00");
2724 rc
= mwl8k_cmd_setrateadaptmode(hw
, 0);
2727 rc
= mwl8k_set_wmm(hw
, 0);
2730 rc
= mwl8k_enable_sniffer(hw
, 0);
2732 mwl8k_fw_unlock(hw
);
2736 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2737 free_irq(priv
->pdev
->irq
, hw
);
2738 tasklet_disable(&priv
->tx_reclaim_task
);
2744 static void mwl8k_stop(struct ieee80211_hw
*hw
)
2746 struct mwl8k_priv
*priv
= hw
->priv
;
2749 mwl8k_cmd_802_11_radio_disable(hw
);
2751 ieee80211_stop_queues(hw
);
2753 /* Disable interrupts */
2754 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2755 free_irq(priv
->pdev
->irq
, hw
);
2757 /* Stop finalize join worker */
2758 cancel_work_sync(&priv
->finalize_join_worker
);
2759 if (priv
->beacon_skb
!= NULL
)
2760 dev_kfree_skb(priv
->beacon_skb
);
2762 /* Stop tx reclaim tasklet */
2763 tasklet_disable(&priv
->tx_reclaim_task
);
2765 /* Return all skbs to mac80211 */
2766 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2767 mwl8k_txq_reclaim(hw
, i
, 1);
2770 static int mwl8k_add_interface(struct ieee80211_hw
*hw
,
2771 struct ieee80211_if_init_conf
*conf
)
2773 struct mwl8k_priv
*priv
= hw
->priv
;
2774 struct mwl8k_vif
*mwl8k_vif
;
2777 * We only support one active interface at a time.
2779 if (priv
->vif
!= NULL
)
2783 * We only support managed interfaces for now.
2785 if (conf
->type
!= NL80211_IFTYPE_STATION
)
2789 * Reject interface creation if sniffer mode is active, as
2790 * STA operation is mutually exclusive with hardware sniffer
2793 if (priv
->sniffer_enabled
) {
2794 printk(KERN_INFO
"%s: unable to create STA "
2795 "interface due to sniffer mode being enabled\n",
2796 wiphy_name(hw
->wiphy
));
2800 /* Clean out driver private area */
2801 mwl8k_vif
= MWL8K_VIF(conf
->vif
);
2802 memset(mwl8k_vif
, 0, sizeof(*mwl8k_vif
));
2804 /* Set and save the mac address */
2805 mwl8k_set_mac_addr(hw
, conf
->mac_addr
);
2806 memcpy(mwl8k_vif
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
2808 /* Back pointer to parent config block */
2809 mwl8k_vif
->priv
= priv
;
2811 /* Setup initial PHY parameters */
2812 memcpy(mwl8k_vif
->legacy_rates
,
2813 priv
->rates
, sizeof(mwl8k_vif
->legacy_rates
));
2814 mwl8k_vif
->legacy_nrates
= ARRAY_SIZE(priv
->rates
);
2816 /* Set Initial sequence number to zero */
2817 mwl8k_vif
->seqno
= 0;
2819 priv
->vif
= conf
->vif
;
2820 priv
->current_channel
= NULL
;
2825 static void mwl8k_remove_interface(struct ieee80211_hw
*hw
,
2826 struct ieee80211_if_init_conf
*conf
)
2828 struct mwl8k_priv
*priv
= hw
->priv
;
2830 if (priv
->vif
== NULL
)
2833 mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
2838 static int mwl8k_config(struct ieee80211_hw
*hw
, u32 changed
)
2840 struct ieee80211_conf
*conf
= &hw
->conf
;
2841 struct mwl8k_priv
*priv
= hw
->priv
;
2844 if (conf
->flags
& IEEE80211_CONF_IDLE
) {
2845 mwl8k_cmd_802_11_radio_disable(hw
);
2846 priv
->current_channel
= NULL
;
2850 rc
= mwl8k_fw_lock(hw
);
2854 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2858 rc
= mwl8k_cmd_set_rf_channel(hw
, conf
->channel
);
2862 priv
->current_channel
= conf
->channel
;
2864 if (conf
->power_level
> 18)
2865 conf
->power_level
= 18;
2866 rc
= mwl8k_cmd_802_11_rf_tx_power(hw
, conf
->power_level
);
2871 rc
= mwl8k_cmd_rf_antenna(hw
, MWL8K_RF_ANTENNA_RX
, 0x7);
2873 rc
= mwl8k_cmd_rf_antenna(hw
, MWL8K_RF_ANTENNA_TX
, 0x7);
2875 rc
= mwl8k_cmd_mimo_config(hw
, 0x7, 0x7);
2879 mwl8k_fw_unlock(hw
);
2884 static void mwl8k_bss_info_changed(struct ieee80211_hw
*hw
,
2885 struct ieee80211_vif
*vif
,
2886 struct ieee80211_bss_conf
*info
,
2889 struct mwl8k_priv
*priv
= hw
->priv
;
2890 struct mwl8k_vif
*mwl8k_vif
= MWL8K_VIF(vif
);
2893 if (changed
& BSS_CHANGED_BSSID
)
2894 memcpy(mwl8k_vif
->bssid
, info
->bssid
, ETH_ALEN
);
2896 if ((changed
& BSS_CHANGED_ASSOC
) == 0)
2899 priv
->capture_beacon
= false;
2901 rc
= mwl8k_fw_lock(hw
);
2906 memcpy(&mwl8k_vif
->bss_info
, info
,
2907 sizeof(struct ieee80211_bss_conf
));
2910 rc
= mwl8k_update_rateset(hw
, vif
);
2914 /* Turn on rate adaptation */
2915 rc
= mwl8k_cmd_use_fixed_rate(hw
, MWL8K_USE_AUTO_RATE
,
2916 MWL8K_UCAST_RATE
, NULL
);
2920 /* Set radio preamble */
2921 rc
= mwl8k_set_radio_preamble(hw
, info
->use_short_preamble
);
2926 rc
= mwl8k_cmd_set_slot(hw
, info
->use_short_slot
);
2930 /* Update peer rate info */
2931 rc
= mwl8k_cmd_update_sta_db(hw
, vif
,
2932 MWL8K_STA_DB_MODIFY_ENTRY
);
2937 rc
= mwl8k_cmd_set_aid(hw
, vif
);
2942 * Finalize the join. Tell rx handler to process
2943 * next beacon from our BSSID.
2945 memcpy(priv
->capture_bssid
, mwl8k_vif
->bssid
, ETH_ALEN
);
2946 priv
->capture_beacon
= true;
2948 rc
= mwl8k_cmd_update_sta_db(hw
, vif
, MWL8K_STA_DB_DEL_ENTRY
);
2949 memset(&mwl8k_vif
->bss_info
, 0,
2950 sizeof(struct ieee80211_bss_conf
));
2951 memset(mwl8k_vif
->bssid
, 0, ETH_ALEN
);
2955 mwl8k_fw_unlock(hw
);
2958 static u64
mwl8k_prepare_multicast(struct ieee80211_hw
*hw
,
2959 int mc_count
, struct dev_addr_list
*mclist
)
2961 struct mwl8k_cmd_pkt
*cmd
;
2964 * Synthesize and return a command packet that programs the
2965 * hardware multicast address filter. At this point we don't
2966 * know whether FIF_ALLMULTI is being requested, but if it is,
2967 * we'll end up throwing this packet away and creating a new
2968 * one in mwl8k_configure_filter().
2970 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 0, mc_count
, mclist
);
2972 return (unsigned long)cmd
;
2976 mwl8k_configure_filter_sniffer(struct ieee80211_hw
*hw
,
2977 unsigned int changed_flags
,
2978 unsigned int *total_flags
)
2980 struct mwl8k_priv
*priv
= hw
->priv
;
2983 * Hardware sniffer mode is mutually exclusive with STA
2984 * operation, so refuse to enable sniffer mode if a STA
2985 * interface is active.
2987 if (priv
->vif
!= NULL
) {
2988 if (net_ratelimit())
2989 printk(KERN_INFO
"%s: not enabling sniffer "
2990 "mode because STA interface is active\n",
2991 wiphy_name(hw
->wiphy
));
2995 if (!priv
->sniffer_enabled
) {
2996 if (mwl8k_enable_sniffer(hw
, 1))
2998 priv
->sniffer_enabled
= true;
3001 *total_flags
&= FIF_PROMISC_IN_BSS
| FIF_ALLMULTI
|
3002 FIF_BCN_PRBRESP_PROMISC
| FIF_CONTROL
|
3008 static void mwl8k_configure_filter(struct ieee80211_hw
*hw
,
3009 unsigned int changed_flags
,
3010 unsigned int *total_flags
,
3013 struct mwl8k_priv
*priv
= hw
->priv
;
3014 struct mwl8k_cmd_pkt
*cmd
= (void *)(unsigned long)multicast
;
3017 * AP firmware doesn't allow fine-grained control over
3018 * the receive filter.
3021 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
3027 * Enable hardware sniffer mode if FIF_CONTROL or
3028 * FIF_OTHER_BSS is requested.
3030 if (*total_flags
& (FIF_CONTROL
| FIF_OTHER_BSS
) &&
3031 mwl8k_configure_filter_sniffer(hw
, changed_flags
, total_flags
)) {
3036 /* Clear unsupported feature flags */
3037 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
3039 if (mwl8k_fw_lock(hw
))
3042 if (priv
->sniffer_enabled
) {
3043 mwl8k_enable_sniffer(hw
, 0);
3044 priv
->sniffer_enabled
= false;
3047 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
3048 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
) {
3050 * Disable the BSS filter.
3052 mwl8k_cmd_set_pre_scan(hw
);
3057 * Enable the BSS filter.
3059 * If there is an active STA interface, use that
3060 * interface's BSSID, otherwise use a dummy one
3061 * (where the OUI part needs to be nonzero for
3062 * the BSSID to be accepted by POST_SCAN).
3064 bssid
= "\x01\x00\x00\x00\x00\x00";
3065 if (priv
->vif
!= NULL
)
3066 bssid
= MWL8K_VIF(priv
->vif
)->bssid
;
3068 mwl8k_cmd_set_post_scan(hw
, bssid
);
3073 * If FIF_ALLMULTI is being requested, throw away the command
3074 * packet that ->prepare_multicast() built and replace it with
3075 * a command packet that enables reception of all multicast
3078 if (*total_flags
& FIF_ALLMULTI
) {
3080 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 1, 0, NULL
);
3084 mwl8k_post_cmd(hw
, cmd
);
3088 mwl8k_fw_unlock(hw
);
3091 static int mwl8k_set_rts_threshold(struct ieee80211_hw
*hw
, u32 value
)
3093 return mwl8k_rts_threshold(hw
, MWL8K_CMD_SET
, value
);
3096 static int mwl8k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
3097 const struct ieee80211_tx_queue_params
*params
)
3099 struct mwl8k_priv
*priv
= hw
->priv
;
3102 rc
= mwl8k_fw_lock(hw
);
3104 if (!priv
->wmm_enabled
)
3105 rc
= mwl8k_set_wmm(hw
, 1);
3108 rc
= mwl8k_set_edca_params(hw
, queue
,
3114 mwl8k_fw_unlock(hw
);
3120 static int mwl8k_get_tx_stats(struct ieee80211_hw
*hw
,
3121 struct ieee80211_tx_queue_stats
*stats
)
3123 struct mwl8k_priv
*priv
= hw
->priv
;
3124 struct mwl8k_tx_queue
*txq
;
3127 spin_lock_bh(&priv
->tx_lock
);
3128 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++) {
3129 txq
= priv
->txq
+ index
;
3130 memcpy(&stats
[index
], &txq
->stats
,
3131 sizeof(struct ieee80211_tx_queue_stats
));
3133 spin_unlock_bh(&priv
->tx_lock
);
3138 static int mwl8k_get_stats(struct ieee80211_hw
*hw
,
3139 struct ieee80211_low_level_stats
*stats
)
3141 return mwl8k_cmd_802_11_get_stat(hw
, stats
);
3144 static const struct ieee80211_ops mwl8k_ops
= {
3146 .start
= mwl8k_start
,
3148 .add_interface
= mwl8k_add_interface
,
3149 .remove_interface
= mwl8k_remove_interface
,
3150 .config
= mwl8k_config
,
3151 .bss_info_changed
= mwl8k_bss_info_changed
,
3152 .prepare_multicast
= mwl8k_prepare_multicast
,
3153 .configure_filter
= mwl8k_configure_filter
,
3154 .set_rts_threshold
= mwl8k_set_rts_threshold
,
3155 .conf_tx
= mwl8k_conf_tx
,
3156 .get_tx_stats
= mwl8k_get_tx_stats
,
3157 .get_stats
= mwl8k_get_stats
,
3160 static void mwl8k_tx_reclaim_handler(unsigned long data
)
3163 struct ieee80211_hw
*hw
= (struct ieee80211_hw
*) data
;
3164 struct mwl8k_priv
*priv
= hw
->priv
;
3166 spin_lock_bh(&priv
->tx_lock
);
3167 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3168 mwl8k_txq_reclaim(hw
, i
, 0);
3170 if (priv
->tx_wait
!= NULL
&& !priv
->pending_tx_pkts
) {
3171 complete(priv
->tx_wait
);
3172 priv
->tx_wait
= NULL
;
3174 spin_unlock_bh(&priv
->tx_lock
);
3177 static void mwl8k_finalize_join_worker(struct work_struct
*work
)
3179 struct mwl8k_priv
*priv
=
3180 container_of(work
, struct mwl8k_priv
, finalize_join_worker
);
3181 struct sk_buff
*skb
= priv
->beacon_skb
;
3182 u8 dtim
= MWL8K_VIF(priv
->vif
)->bss_info
.dtim_period
;
3184 mwl8k_finalize_join(priv
->hw
, skb
->data
, skb
->len
, dtim
);
3187 priv
->beacon_skb
= NULL
;
3190 static struct mwl8k_device_info di_8687
= {
3191 .part_name
= "88w8687",
3192 .helper_image
= "mwl8k/helper_8687.fw",
3193 .fw_image
= "mwl8k/fmimage_8687.fw",
3194 .rxd_ops
= &rxd_8687_ops
,
3195 .modes
= BIT(NL80211_IFTYPE_STATION
),
3198 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table
) = {
3200 PCI_VDEVICE(MARVELL
, 0x2a2b),
3201 .driver_data
= (unsigned long)&di_8687
,
3203 PCI_VDEVICE(MARVELL
, 0x2a30),
3204 .driver_data
= (unsigned long)&di_8687
,
3208 MODULE_DEVICE_TABLE(pci
, mwl8k_pci_id_table
);
3210 static int __devinit
mwl8k_probe(struct pci_dev
*pdev
,
3211 const struct pci_device_id
*id
)
3213 static int printed_version
= 0;
3214 struct ieee80211_hw
*hw
;
3215 struct mwl8k_priv
*priv
;
3219 if (!printed_version
) {
3220 printk(KERN_INFO
"%s version %s\n", MWL8K_DESC
, MWL8K_VERSION
);
3221 printed_version
= 1;
3224 rc
= pci_enable_device(pdev
);
3226 printk(KERN_ERR
"%s: Cannot enable new PCI device\n",
3231 rc
= pci_request_regions(pdev
, MWL8K_NAME
);
3233 printk(KERN_ERR
"%s: Cannot obtain PCI resources\n",
3238 pci_set_master(pdev
);
3240 hw
= ieee80211_alloc_hw(sizeof(*priv
), &mwl8k_ops
);
3242 printk(KERN_ERR
"%s: ieee80211 alloc failed\n", MWL8K_NAME
);
3250 priv
->device_info
= (void *)id
->driver_data
;
3251 priv
->rxd_ops
= priv
->device_info
->rxd_ops
;
3252 priv
->sniffer_enabled
= false;
3253 priv
->wmm_enabled
= false;
3254 priv
->pending_tx_pkts
= 0;
3256 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
3257 pci_set_drvdata(pdev
, hw
);
3259 priv
->sram
= pci_iomap(pdev
, 0, 0x10000);
3260 if (priv
->sram
== NULL
) {
3261 printk(KERN_ERR
"%s: Cannot map device SRAM\n",
3262 wiphy_name(hw
->wiphy
));
3267 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3268 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3270 priv
->regs
= pci_iomap(pdev
, 1, 0x10000);
3271 if (priv
->regs
== NULL
) {
3272 priv
->regs
= pci_iomap(pdev
, 2, 0x10000);
3273 if (priv
->regs
== NULL
) {
3274 printk(KERN_ERR
"%s: Cannot map device registers\n",
3275 wiphy_name(hw
->wiphy
));
3280 memcpy(priv
->channels
, mwl8k_channels
, sizeof(mwl8k_channels
));
3281 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
3282 priv
->band
.channels
= priv
->channels
;
3283 priv
->band
.n_channels
= ARRAY_SIZE(mwl8k_channels
);
3284 priv
->band
.bitrates
= priv
->rates
;
3285 priv
->band
.n_bitrates
= ARRAY_SIZE(mwl8k_rates
);
3286 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
3288 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(mwl8k_rates
));
3289 memcpy(priv
->rates
, mwl8k_rates
, sizeof(mwl8k_rates
));
3292 * Extra headroom is the size of the required DMA header
3293 * minus the size of the smallest 802.11 frame (CTS frame).
3295 hw
->extra_tx_headroom
=
3296 sizeof(struct mwl8k_dma_data
) - sizeof(struct ieee80211_cts
);
3298 hw
->channel_change_time
= 10;
3300 hw
->queues
= MWL8K_TX_QUEUES
;
3302 hw
->wiphy
->interface_modes
= priv
->device_info
->modes
;
3304 /* Set rssi and noise values to dBm */
3305 hw
->flags
|= IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_NOISE_DBM
;
3306 hw
->vif_data_size
= sizeof(struct mwl8k_vif
);
3309 /* Set default radio state and preamble */
3311 priv
->radio_short_preamble
= 0;
3313 /* Finalize join worker */
3314 INIT_WORK(&priv
->finalize_join_worker
, mwl8k_finalize_join_worker
);
3316 /* TX reclaim tasklet */
3317 tasklet_init(&priv
->tx_reclaim_task
,
3318 mwl8k_tx_reclaim_handler
, (unsigned long)hw
);
3319 tasklet_disable(&priv
->tx_reclaim_task
);
3321 /* Power management cookie */
3322 priv
->cookie
= pci_alloc_consistent(priv
->pdev
, 4, &priv
->cookie_dma
);
3323 if (priv
->cookie
== NULL
)
3326 rc
= mwl8k_rxq_init(hw
, 0);
3329 rxq_refill(hw
, 0, INT_MAX
);
3331 mutex_init(&priv
->fw_mutex
);
3332 priv
->fw_mutex_owner
= NULL
;
3333 priv
->fw_mutex_depth
= 0;
3334 priv
->hostcmd_wait
= NULL
;
3336 spin_lock_init(&priv
->tx_lock
);
3338 priv
->tx_wait
= NULL
;
3340 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++) {
3341 rc
= mwl8k_txq_init(hw
, i
);
3343 goto err_free_queues
;
3346 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
3347 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3348 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL
);
3349 iowrite32(0xffffffff, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK
);
3351 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
3352 IRQF_SHARED
, MWL8K_NAME
, hw
);
3354 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
3355 wiphy_name(hw
->wiphy
));
3356 goto err_free_queues
;
3359 /* Reset firmware and hardware */
3360 mwl8k_hw_reset(priv
);
3362 /* Ask userland hotplug daemon for the device firmware */
3363 rc
= mwl8k_request_firmware(priv
);
3365 printk(KERN_ERR
"%s: Firmware files not found\n",
3366 wiphy_name(hw
->wiphy
));
3370 /* Load firmware into hardware */
3371 rc
= mwl8k_load_firmware(hw
);
3373 printk(KERN_ERR
"%s: Cannot start firmware\n",
3374 wiphy_name(hw
->wiphy
));
3375 goto err_stop_firmware
;
3378 /* Reclaim memory once firmware is successfully loaded */
3379 mwl8k_release_firmware(priv
);
3382 * Temporarily enable interrupts. Initial firmware host
3383 * commands use interrupts and avoids polling. Disable
3384 * interrupts when done.
3386 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3388 /* Get config data, mac addrs etc */
3390 rc
= mwl8k_cmd_get_hw_spec_ap(hw
);
3392 rc
= mwl8k_cmd_set_hw_spec(hw
);
3394 rc
= mwl8k_cmd_get_hw_spec_sta(hw
);
3397 printk(KERN_ERR
"%s: Cannot initialise firmware\n",
3398 wiphy_name(hw
->wiphy
));
3399 goto err_stop_firmware
;
3402 /* Turn radio off */
3403 rc
= mwl8k_cmd_802_11_radio_disable(hw
);
3405 printk(KERN_ERR
"%s: Cannot disable\n", wiphy_name(hw
->wiphy
));
3406 goto err_stop_firmware
;
3409 /* Clear MAC address */
3410 rc
= mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
3412 printk(KERN_ERR
"%s: Cannot clear MAC address\n",
3413 wiphy_name(hw
->wiphy
));
3414 goto err_stop_firmware
;
3417 /* Disable interrupts */
3418 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3419 free_irq(priv
->pdev
->irq
, hw
);
3421 rc
= ieee80211_register_hw(hw
);
3423 printk(KERN_ERR
"%s: Cannot register device\n",
3424 wiphy_name(hw
->wiphy
));
3425 goto err_stop_firmware
;
3428 printk(KERN_INFO
"%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3429 wiphy_name(hw
->wiphy
), priv
->device_info
->part_name
,
3430 priv
->hw_rev
, hw
->wiphy
->perm_addr
,
3431 priv
->ap_fw
? "AP" : "STA",
3432 (priv
->fw_rev
>> 24) & 0xff, (priv
->fw_rev
>> 16) & 0xff,
3433 (priv
->fw_rev
>> 8) & 0xff, priv
->fw_rev
& 0xff);
3438 mwl8k_hw_reset(priv
);
3439 mwl8k_release_firmware(priv
);
3442 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3443 free_irq(priv
->pdev
->irq
, hw
);
3446 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3447 mwl8k_txq_deinit(hw
, i
);
3448 mwl8k_rxq_deinit(hw
, 0);
3451 if (priv
->cookie
!= NULL
)
3452 pci_free_consistent(priv
->pdev
, 4,
3453 priv
->cookie
, priv
->cookie_dma
);
3455 if (priv
->regs
!= NULL
)
3456 pci_iounmap(pdev
, priv
->regs
);
3458 if (priv
->sram
!= NULL
)
3459 pci_iounmap(pdev
, priv
->sram
);
3461 pci_set_drvdata(pdev
, NULL
);
3462 ieee80211_free_hw(hw
);
3465 pci_release_regions(pdev
);
3466 pci_disable_device(pdev
);
3471 static void __devexit
mwl8k_shutdown(struct pci_dev
*pdev
)
3473 printk(KERN_ERR
"===>%s(%u)\n", __func__
, __LINE__
);
3476 static void __devexit
mwl8k_remove(struct pci_dev
*pdev
)
3478 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
3479 struct mwl8k_priv
*priv
;
3486 ieee80211_stop_queues(hw
);
3488 ieee80211_unregister_hw(hw
);
3490 /* Remove tx reclaim tasklet */
3491 tasklet_kill(&priv
->tx_reclaim_task
);
3494 mwl8k_hw_reset(priv
);
3496 /* Return all skbs to mac80211 */
3497 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3498 mwl8k_txq_reclaim(hw
, i
, 1);
3500 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3501 mwl8k_txq_deinit(hw
, i
);
3503 mwl8k_rxq_deinit(hw
, 0);
3505 pci_free_consistent(priv
->pdev
, 4, priv
->cookie
, priv
->cookie_dma
);
3507 pci_iounmap(pdev
, priv
->regs
);
3508 pci_iounmap(pdev
, priv
->sram
);
3509 pci_set_drvdata(pdev
, NULL
);
3510 ieee80211_free_hw(hw
);
3511 pci_release_regions(pdev
);
3512 pci_disable_device(pdev
);
3515 static struct pci_driver mwl8k_driver
= {
3517 .id_table
= mwl8k_pci_id_table
,
3518 .probe
= mwl8k_probe
,
3519 .remove
= __devexit_p(mwl8k_remove
),
3520 .shutdown
= __devexit_p(mwl8k_shutdown
),
3523 static int __init
mwl8k_init(void)
3525 return pci_register_driver(&mwl8k_driver
);
3528 static void __exit
mwl8k_exit(void)
3530 pci_unregister_driver(&mwl8k_driver
);
3533 module_init(mwl8k_init
);
3534 module_exit(mwl8k_exit
);
3536 MODULE_DESCRIPTION(MWL8K_DESC
);
3537 MODULE_VERSION(MWL8K_VERSION
);
3538 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3539 MODULE_LICENSE("GPL");